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a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC
25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
39a96b4c
MCC
28#include <linux/workqueue.h>
29#include <linux/i2c.h>
30#include <linux/mutex.h>
cb77d010 31#include <linux/videodev2.h>
39a96b4c 32
ad0ebb96 33#include <media/videobuf-vmalloc.h>
f2cf250a 34#include <media/v4l2-device.h>
d5e52653 35#include <media/ir-kbd-i2c.h>
6bda9644 36#include <media/rc-core.h>
3aefb79a
MCC
37#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
38#include <media/videobuf-dvb.h>
39#endif
3ca9c093 40#include "tuner-xc2028.h"
2ba890ec 41#include "em28xx-reg.h"
3aefb79a
MCC
42
43/* Boards supported by driver */
44#define EM2800_BOARD_UNKNOWN 0
45#define EM2820_BOARD_UNKNOWN 1
46#define EM2820_BOARD_TERRATEC_CINERGY_250 2
47#define EM2820_BOARD_PINNACLE_USB_2 3
48#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
49#define EM2820_BOARD_MSI_VOX_USB_2 5
50#define EM2800_BOARD_TERRATEC_CINERGY_200 6
51#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
52#define EM2800_BOARD_KWORLD_USB2800 8
53#define EM2820_BOARD_PINNACLE_DVC_90 9
54#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
55#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
56#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
57#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
58#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
59#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 60#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 61#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 62#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
3ed58baf 63#define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19
e14b3658 64#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 65#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL
66#define EM2750_BOARD_UNKNOWN 22
67#define EM2750_BOARD_DLCW_130 23
68#define EM2820_BOARD_DLINK_USB_TV 24
69#define EM2820_BOARD_GADMEI_UTV310 25
70#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
71#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
72#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
443fed9f 73#define EM2860_BOARD_TVP5150_REFERENCE_DESIGN 29
95b86a9a
DSL
74#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
75#define EM2821_BOARD_USBGEAR_VD204 31
76#define EM2821_BOARD_SUPERCOMP_USB_2 32
8298f2f8 77#define EM2860_BOARD_ELGATO_VIDEO_CAPTURE 33
95b86a9a
DSL
78#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
79#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
80#define EM2860_BOARD_NETGMBH_CAM 36
81#define EM2860_BOARD_GADMEI_UTV330 37
82#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
83#define EM2861_BOARD_KWORLD_PVRTV_300U 39
84#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
85#define EM2870_BOARD_KWORLD_350U 41
86#define EM2870_BOARD_KWORLD_355U 42
87#define EM2870_BOARD_TERRATEC_XS 43
88#define EM2870_BOARD_TERRATEC_XS_MT2060 44
89#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
90#define EM2870_BOARD_COMPRO_VIDEOMATE 46
91#define EM2880_BOARD_KWORLD_DVB_305U 47
92#define EM2880_BOARD_KWORLD_DVB_310U 48
93#define EM2880_BOARD_MSI_DIGIVOX_AD 49
94#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
95#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
96#define EM2881_BOARD_DNT_DA2_HYBRID 52
97#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
98#define EM2882_BOARD_KWORLD_VS_DVBT 54
99#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
09bc1942 100#define EM2882_BOARD_PINNACLE_HYBRID_PRO_330E 56
6e7b9ea0 101#define EM2883_BOARD_KWORLD_HYBRID_330U 57
ee281b85 102#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 103#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 104#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
f7fe3e6f 105#define EM2820_BOARD_GADMEI_TVR200 62
56ee3807
MCC
106#define EM2860_BOARD_KAIOMY_TVNPC_U2 63
107#define EM2860_BOARD_EASYCAP 64
f74a61e3 108#define EM2820_BOARD_IODATA_GVMVP_SZ 65
e5db5d44 109#define EM2880_BOARD_EMPIRE_DUAL_TV 66
4557af9c 110#define EM2860_BOARD_TERRATEC_GRABBY 67
766ed64d 111#define EM2860_BOARD_TERRATEC_AV350 68
d7de5d8f 112#define EM2882_BOARD_KWORLD_ATSC_315U 69
19859229 113#define EM2882_BOARD_EVGA_INDTUBE 70
02e7804b 114#define EM2820_BOARD_SILVERCREST_WEBCAM 71
6d888a66 115#define EM2861_BOARD_GADMEI_UTV330PLUS 72
285eb1a4 116#define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73
694a101e 117#define EM2800_BOARD_VC211A 74
7ca7ef60 118#define EM2882_BOARD_DIKOM_DK300 75
7e48b30a 119#define EM2870_BOARD_KWORLD_A340 76
ebaefdb7 120#define EM2874_BOARD_LEADERSHIP_ISDBT 77
d6a5f921 121#define EM28174_BOARD_PCTV_290E 78
ca3dfd6a 122
3aefb79a
MCC
123
124/* Limits minimum and default number of buffers */
125#define EM28XX_MIN_BUF 4
126#define EM28XX_DEF_BUF 8
a6c2ba28 127
c4a98793
MCC
128/*Limits the max URB message size */
129#define URB_MAX_CTRL_SIZE 80
130
95b86a9a
DSL
131/* Params for validated field */
132#define EM28XX_BOARD_NOT_VALIDATED 1
133#define EM28XX_BOARD_VALIDATED 0
134
22cff7b3
DSL
135/* Params for em28xx_cmd() audio */
136#define EM28XX_START_AUDIO 1
137#define EM28XX_STOP_AUDIO 0
138
596d92d5 139/* maximum number of em28xx boards */
3687e1e6 140#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 141
a6c2ba28 142/* maximum number of frames that can be queued */
3acf2809 143#define EM28XX_NUM_FRAMES 5
a6c2ba28 144/* number of frames that get used for v4l2_read() */
3acf2809 145#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 146
147/* number of buffers for isoc transfers */
3acf2809 148#define EM28XX_NUM_BUFS 5
a6c2ba28 149
d5e52653 150/* number of packets for each buffer
33c02fac 151 windows requests only 64 packets .. so we better do the same
d5e52653
MCC
152 this is what I found out for all alternate numbers there!
153 */
33c02fac 154#define EM28XX_NUM_PACKETS 64
a6c2ba28 155
3acf2809 156#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 157
158/*
159#define (use usbview if you want to get the other alternate number infos)
160#define
161#define alternate number 2
162#define Endpoint Address: 82
163 Direction: in
164 Attribute: 1
165 Type: Isoc
166 Max Packet Size: 1448
167 Interval: 125us
168
169 alternate number 7
170
171 Endpoint Address: 82
172 Direction: in
173 Attribute: 1
174 Type: Isoc
175 Max Packet Size: 3072
176 Interval: 125us
177*/
178
179/* time to wait when stopping the isoc transfer */
a1a6ee74
NS
180#define EM28XX_URB_TIMEOUT \
181 msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 182
596d92d5
MCC
183/* time in msecs to wait for i2c writes to finish */
184#define EM2800_I2C_WRITE_TIMEOUT 20
185
3aefb79a 186enum em28xx_mode {
2fe3e2ee 187 EM28XX_SUSPEND,
3aefb79a
MCC
188 EM28XX_ANALOG_MODE,
189 EM28XX_DIGITAL_MODE,
190};
191
a6c2ba28 192
579f72e4
AT
193struct em28xx;
194
ad0ebb96
MCC
195struct em28xx_usb_isoc_ctl {
196 /* max packet size of isoc transaction */
197 int max_pkt_size;
198
199 /* number of allocated urbs */
200 int num_bufs;
201
202 /* urb for isoc transfers */
203 struct urb **urb;
204
205 /* transfer buffers for isoc transfer */
206 char **transfer_buffer;
207
208 /* Last buffer command and region */
209 u8 cmd;
210 int pos, size, pktsize;
211
212 /* Last field: ODD or EVEN? */
213 int field;
214
215 /* Stores incomplete commands */
216 u32 tmp_buf;
217 int tmp_buf_len;
218
219 /* Stores already requested buffers */
28abf083
DH
220 struct em28xx_buffer *vid_buf;
221 struct em28xx_buffer *vbi_buf;
ad0ebb96
MCC
222
223 /* Stores the number of received fields */
224 int nfields;
579f72e4
AT
225
226 /* isoc urb callback */
227 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
228
ad0ebb96
MCC
229};
230
bddcf633 231/* Struct to enumberate video formats */
ad0ebb96
MCC
232struct em28xx_fmt {
233 char *name;
234 u32 fourcc; /* v4l2 format id */
bddcf633
MCC
235 int depth;
236 int reg;
ad0ebb96
MCC
237};
238
239/* buffer for one video frame */
240struct em28xx_buffer {
241 /* common v4l buffer stuff -- must be first */
242 struct videobuf_buffer vb;
243
a6c2ba28 244 struct list_head frame;
a6c2ba28 245 int top_field;
ad0ebb96
MCC
246 int receiving;
247};
248
249struct em28xx_dmaqueue {
250 struct list_head active;
251 struct list_head queued;
ad0ebb96
MCC
252
253 wait_queue_head_t wq;
254
255 /* Counters to control buffer fill */
256 int pos;
a6c2ba28 257};
258
259/* io methods */
3acf2809 260enum em28xx_io_method {
a6c2ba28 261 IO_NONE,
262 IO_READ,
263 IO_MMAP,
264};
265
266/* inputs */
267
3acf2809
MCC
268#define MAX_EM28XX_INPUT 4
269enum enum28xx_itype {
270 EM28XX_VMUX_COMPOSITE1 = 1,
271 EM28XX_VMUX_COMPOSITE2,
272 EM28XX_VMUX_COMPOSITE3,
273 EM28XX_VMUX_COMPOSITE4,
274 EM28XX_VMUX_SVIDEO,
275 EM28XX_VMUX_TELEVISION,
276 EM28XX_VMUX_CABLE,
277 EM28XX_VMUX_DVB,
278 EM28XX_VMUX_DEBUG,
279 EM28XX_RADIO,
a6c2ba28 280};
281
35643943
MCC
282enum em28xx_ac97_mode {
283 EM28XX_NO_AC97 = 0,
284 EM28XX_AC97_EM202,
209acc02 285 EM28XX_AC97_SIGMATEL,
35643943
MCC
286 EM28XX_AC97_OTHER,
287};
288
289struct em28xx_audio_mode {
290 enum em28xx_ac97_mode ac97;
291
292 u16 ac97_feat;
16c7bcad 293 u32 ac97_vendor_id;
35643943
MCC
294
295 unsigned int has_audio:1;
296
297 unsigned int i2s_3rates:1;
298 unsigned int i2s_5rates:1;
5c2231c8
DH
299};
300
5faff789
MCC
301/* em28xx has two audio inputs: tuner and line in.
302 However, on most devices, an auxiliary AC97 codec device is used.
303 The AC97 device may have several different inputs and outputs,
304 depending on their model. So, it is possible to use AC97 mixer to
305 address more than two different entries.
306 */
539c96d0 307enum em28xx_amux {
5faff789
MCC
308 /* This is the only entry for em28xx tuner input */
309 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
310
311 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
312
313 /* Some less-common mixer setups */
314 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
315 EM28XX_AMUX_PHONE,
316 EM28XX_AMUX_MIC,
317 EM28XX_AMUX_CD,
318 EM28XX_AMUX_AUX,
319 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC
320};
321
35ae6f04 322enum em28xx_aout {
8866f9cf 323 /* AC97 outputs */
e879b8eb
MCC
324 EM28XX_AOUT_MASTER = 1 << 0,
325 EM28XX_AOUT_LINE = 1 << 1,
326 EM28XX_AOUT_MONO = 1 << 2,
327 EM28XX_AOUT_LFE = 1 << 3,
328 EM28XX_AOUT_SURR = 1 << 4,
8866f9cf
MCC
329
330 /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
331 EM28XX_AOUT_PCM_IN = 1 << 7,
332
333 /* Bits 10-8 are used to indicate the PCM IN record select */
334 EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
335 EM28XX_AOUT_PCM_CD = 1 << 8,
336 EM28XX_AOUT_PCM_VIDEO = 2 << 8,
337 EM28XX_AOUT_PCM_AUX = 3 << 8,
338 EM28XX_AOUT_PCM_LINE = 4 << 8,
339 EM28XX_AOUT_PCM_STEREO = 5 << 8,
340 EM28XX_AOUT_PCM_MONO = 6 << 8,
341 EM28XX_AOUT_PCM_PHONE = 7 << 8,
35ae6f04
MCC
342};
343
32929fb4 344static inline int ac97_return_record_select(int a_out)
8866f9cf
MCC
345{
346 return (a_out & 0x700) >> 8;
347}
348
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MCC
349struct em28xx_reg_seq {
350 int reg;
351 unsigned char val, mask;
352 int sleep;
353};
354
3acf2809
MCC
355struct em28xx_input {
356 enum enum28xx_itype type;
a6c2ba28 357 unsigned int vmux;
539c96d0 358 enum em28xx_amux amux;
35ae6f04 359 enum em28xx_aout aout;
122b77e5 360 struct em28xx_reg_seq *gpio;
a6c2ba28 361};
362
3acf2809 363#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 364
3acf2809 365enum em28xx_decoder {
527f09a9 366 EM28XX_NODECODER = 0,
3acf2809 367 EM28XX_TVP5150,
ec5de990 368 EM28XX_SAA711X,
527f09a9
MCC
369};
370
371enum em28xx_sensor {
372 EM28XX_NOSENSOR = 0,
02e7804b 373 EM28XX_MT9V011,
b80fd2d8 374 EM28XX_MT9M001,
f2e26ae7 375 EM28XX_MT9M111,
a6c2ba28 376};
377
df7fa09c
MCC
378enum em28xx_adecoder {
379 EM28XX_NOADECODER = 0,
380 EM28XX_TVAUDIO,
381};
382
3acf2809 383struct em28xx_board {
a6c2ba28 384 char *name;
505b6d0b 385 int vchannels;
a6c2ba28 386 int tuner_type;
66767920 387 int tuner_addr;
a6c2ba28 388
389 /* i2c flags */
390 unsigned int tda9887_conf;
391
017ab4b1 392 /* GPIO sequences */
122b77e5 393 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 394 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 395 struct em28xx_reg_seq *tuner_gpio;
2bd1d9eb 396 struct em28xx_reg_seq *mute_gpio;
122b77e5 397
74f38a82 398 unsigned int is_em2800:1;
a6c2ba28 399 unsigned int has_msp34xx:1;
5add9a6f 400 unsigned int mts_firmware:1;
c8793b03 401 unsigned int max_range_640_480:1;
3aefb79a 402 unsigned int has_dvb:1;
a9fc52bc 403 unsigned int has_snapshot_button:1;
c43221df 404 unsigned int is_webcam:1;
95b86a9a 405 unsigned int valid:1;
ac07bb73 406 unsigned int has_ir_i2c:1;
3abee53e 407
a2070c66 408 unsigned char xclk, i2c_speed;
f2cf250a
DSL
409 unsigned char radio_addr;
410 unsigned short tvaudio_addr;
a2070c66 411
3acf2809 412 enum em28xx_decoder decoder;
df7fa09c 413 enum em28xx_adecoder adecoder;
a6c2ba28 414
3acf2809 415 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 416 struct em28xx_input radio;
02858eed 417 char *ir_codes;
a6c2ba28 418};
419
3acf2809 420struct em28xx_eeprom {
a6c2ba28 421 u32 id; /* 0x9567eb1a */
422 u16 vendor_ID;
423 u16 product_ID;
424
425 u16 chip_conf;
426
427 u16 board_conf;
428
429 u16 string1, string2, string3;
430
431 u8 string_idx_table;
432};
433
434/* device states */
3acf2809 435enum em28xx_dev_state {
a6c2ba28 436 DEV_INITIALIZED = 0x01,
437 DEV_DISCONNECTED = 0x02,
438 DEV_MISCONFIGURED = 0x04,
439};
440
6d79468d
MCC
441#define EM28XX_AUDIO_BUFS 5
442#define EM28XX_NUM_AUDIO_PACKETS 64
443#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
444#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC
445
446/* em28xx extensions */
6d79468d 447#define EM28XX_AUDIO 0x10
3aefb79a 448#define EM28XX_DVB 0x20
6d79468d 449
8c873d31
DH
450/* em28xx resource types (used for res_get/res_lock etc */
451#define EM28XX_RESOURCE_VIDEO 0x01
452#define EM28XX_RESOURCE_VBI 0x02
453
6d79468d
MCC
454struct em28xx_audio {
455 char name[50];
456 char *transfer_buffer[EM28XX_AUDIO_BUFS];
457 struct urb *urb[EM28XX_AUDIO_BUFS];
458 struct usb_device *udev;
459 unsigned int capture_transfer_done;
460 struct snd_pcm_substream *capture_pcm_substream;
461
462 unsigned int hwptr_done_capture;
463 struct snd_card *sndcard;
464
c744dff2 465 int users;
6d79468d
MCC
466 spinlock_t slock;
467};
468
52284c3e
MCC
469struct em28xx;
470
471struct em28xx_fh {
472 struct em28xx *dev;
52284c3e 473 int radio;
8c873d31 474 unsigned int resources;
52284c3e
MCC
475
476 struct videobuf_queue vb_vidq;
28abf083 477 struct videobuf_queue vb_vbiq;
52284c3e
MCC
478
479 enum v4l2_buf_type type;
480};
481
a6c2ba28 482/* main device struct */
3acf2809 483struct em28xx {
a6c2ba28 484 /* generic device properties */
485 char name[30]; /* name (including minor) of the device */
486 int model; /* index in the device_data struct */
e5589bef 487 int devno; /* marks the number of this device */
600bd7f0 488 enum em28xx_chip_id chip_id;
505b6d0b 489
4f83e7b3
MCC
490 int audio_ifnum;
491
f2cf250a 492 struct v4l2_device v4l2_dev;
505b6d0b
MCC
493 struct em28xx_board board;
494
d36bb4e7 495 /* Webcam specific fields */
527f09a9 496 enum em28xx_sensor em28xx_sensor;
55699964 497 int sensor_xres, sensor_yres;
d36bb4e7 498 int sensor_xtal;
527f09a9 499
c2a6b54a
MCC
500 /* Allows progressive (e. g. non-interlaced) mode */
501 int progressive;
502
579d3152
MCC
503 /* Vinmode/Vinctl used at the driver */
504 int vinmode, vinctl;
505
d7448a8d 506 unsigned int has_audio_class:1;
24a613e4 507 unsigned int has_alsa_audio:1;
4f83e7b3 508 unsigned int is_audio_only:1;
a2070c66 509
39a96b4c
MCC
510 /* Controls audio streaming */
511 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
512 atomic_t stream_started; /* stream should be running if true */
513
bddcf633
MCC
514 struct em28xx_fmt *format;
515
a924a499
MCC
516 struct em28xx_IR *ir;
517
89b329ef
MCC
518 /* Some older em28xx chips needs a waiting time after writing */
519 unsigned int wait_after_write;
520
74f38a82
MCC
521 struct list_head devlist;
522
9bb13a6d
MCC
523 u32 i2s_speed; /* I2S speed for audio digital stream */
524
35643943 525 struct em28xx_audio_mode audio_mode;
a6c2ba28 526
527 int tuner_type; /* type of the tuner */
528 int tuner_addr; /* tuner address */
529 int tda9887_conf;
530 /* i2c i/o */
531 struct i2c_adapter i2c_adap;
532 struct i2c_client i2c_client;
533 /* video for linux */
534 int users; /* user count for exclusive use */
535 struct video_device *vdev; /* video for linux device struct */
7d497f8a 536 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 537 int ctl_freq; /* selected frequency */
538 unsigned int ctl_input; /* selected input */
95b86a9a 539 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 540 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 541 int mute;
542 int volume;
543 /* frame properties */
a6c2ba28 544 int width; /* current frame width */
545 int height; /* current frame height */
d45b9b8a
HV
546 unsigned hscale; /* horizontal scale factor (see datasheet) */
547 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 548 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 549 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 550
03910cc3 551 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL
552 unsigned long i2c_hash; /* i2c devicelist hash -
553 for boards with generic ID */
03910cc3 554
9baed99e 555 struct em28xx_audio adev;
6d79468d 556
a6c2ba28 557 /* states */
3acf2809 558 enum em28xx_dev_state state;
3acf2809 559 enum em28xx_io_method io;
9e31ced8 560
da52a55c
DH
561 /* vbi related state tracking */
562 int capture_type;
563 int vbi_read;
564 unsigned char cur_field;
66d9cbad
DH
565 unsigned int vbi_width;
566 unsigned int vbi_height; /* lines per field */
da52a55c 567
d7448a8d
MCC
568 struct work_struct request_module_wk;
569
a6c2ba28 570 /* locks */
5a80415b 571 struct mutex lock;
f2a2e491 572 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 573 /* spinlock_t queue_lock; */
a6c2ba28 574 struct list_head inqueue, outqueue;
575 wait_queue_head_t open, wait_frame, wait_stream;
576 struct video_device *vbi_dev;
0be43754 577 struct video_device *radio_dev;
a6c2ba28 578
8c873d31
DH
579 /* resources in use */
580 unsigned int resources;
581
a6c2ba28 582 unsigned char eedata[256];
583
ad0ebb96
MCC
584 /* Isoc control struct */
585 struct em28xx_dmaqueue vidq;
28abf083 586 struct em28xx_dmaqueue vbiq;
ad0ebb96
MCC
587 struct em28xx_usb_isoc_ctl isoc_ctl;
588 spinlock_t slock;
589
a6c2ba28 590 /* usb transfer */
591 struct usb_device *udev; /* the usb device */
592 int alt; /* alternate */
593 int max_pkt_size; /* max packet size of isoc transaction */
9d4d9c05
MCC
594 int num_alt; /* Number of alternative settings */
595 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809 596 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
a1a6ee74
NS
597 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc
598 transfer */
c4a98793
MCC
599 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
600
a6c2ba28 601 /* helper funcs that call usb_control_msg */
6ea54d93 602 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 603 char *buf, int len);
6ea54d93
DSL
604 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
605 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
606 char *buf, int len);
607 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 608 char *buf, int len);
6ea54d93 609 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
3aefb79a
MCC
610
611 enum em28xx_mode mode;
612
6a1acc3b
DH
613 /* register numbers for GPO/GPIO registers */
614 u16 reg_gpo_num, reg_gpio_num;
615
c67ec53f
MCC
616 /* Caches GPO and GPIO registers */
617 unsigned char reg_gpo, reg_gpio;
618
a9fc52bc
DH
619 /* Snapshot button */
620 char snapshot_button_path[30]; /* path of the input dev */
621 struct input_dev *sbutton_input_dev;
622 struct delayed_work sbutton_query_work;
623
3421b778 624 struct em28xx_dvb *dvb;
d2ebd0f8
MCC
625
626 /* I2C keyboard data */
d2ebd0f8 627 struct IR_i2c_init_data init_data;
a6c2ba28 628};
629
6d79468d
MCC
630struct em28xx_ops {
631 struct list_head next;
632 char *name;
633 int id;
634 int (*init)(struct em28xx *);
635 int (*fini)(struct em28xx *);
a3a048ce
MCC
636};
637
3acf2809 638/* Provided by em28xx-i2c.c */
fad7b958 639void em28xx_do_i2c_scan(struct em28xx *dev);
f2cf250a
DSL
640int em28xx_i2c_register(struct em28xx *dev);
641int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 642
3acf2809 643/* Provided by em28xx-core.c */
a6c2ba28 644
3acf2809
MCC
645u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
646void em28xx_queue_unusedframes(struct em28xx *dev);
647void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 648
3acf2809 649int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 650 char *buf, int len);
3acf2809
MCC
651int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
652int em28xx_read_reg(struct em28xx *dev, u16 reg);
653int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 654 int len);
3acf2809 655int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
b6972489 656int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
1bad429e
MCC
657int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
658 u8 bitmask);
b6972489 659
531c98e7
MCC
660int em28xx_read_ac97(struct em28xx *dev, u8 reg);
661int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
662
3acf2809 663int em28xx_audio_analog_set(struct em28xx *dev);
35643943 664int em28xx_audio_setup(struct em28xx *dev);
539c96d0 665
3acf2809
MCC
666int em28xx_colorlevels_set_default(struct em28xx *dev);
667int em28xx_capture_start(struct em28xx *dev, int start);
da52a55c 668int em28xx_vbi_supported(struct em28xx *dev);
bddcf633 669int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 670int em28xx_resolution_set(struct em28xx *dev);
3acf2809 671int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT
672int em28xx_init_isoc(struct em28xx *dev, int max_packets,
673 int num_bufs, int max_pkt_size,
c67ec53f 674 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 675void em28xx_uninit_isoc(struct em28xx *dev);
d18e2fda 676int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev);
c67ec53f
MCC
677int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
678int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b
MCC
679void em28xx_wake_i2c(struct em28xx *dev);
680void em28xx_remove_from_devlist(struct em28xx *dev);
681void em28xx_add_into_devlist(struct em28xx *dev);
6d79468d
MCC
682int em28xx_register_extension(struct em28xx_ops *dev);
683void em28xx_unregister_extension(struct em28xx_ops *dev);
1a23f81b
MCC
684void em28xx_init_extension(struct em28xx *dev);
685void em28xx_close_extension(struct em28xx *dev);
686
687/* Provided by em28xx-video.c */
1a23f81b
MCC
688int em28xx_register_analog_devices(struct em28xx *dev);
689void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 690
3acf2809 691/* Provided by em28xx-cards.c */
6ea54d93 692extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 693extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC
694extern void em28xx_card_setup(struct em28xx *dev);
695extern struct em28xx_board em28xx_boards[];
696extern struct usb_device_id em28xx_id_table[];
697extern const unsigned int em28xx_bcount;
c668f32d 698void em28xx_register_i2c_ir(struct em28xx *dev);
d7cba043 699int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 700void em28xx_release_resources(struct em28xx *dev);
c8793b03
MCC
701
702/* Provided by em28xx-input.c */
5b89ecf9
MCC
703
704#ifdef CONFIG_VIDEO_EM28XX_RC
705
c8793b03
MCC
706int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
707int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
708int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
709 u32 *ir_raw);
ca39d84d
MA
710int em28xx_get_key_winfast_usbii_deluxe(struct IR_i2c *ir, u32 *ir_key,
711 u32 *ir_raw);
a9fc52bc
DH
712void em28xx_register_snapshot_button(struct em28xx *dev);
713void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 714
a924a499
MCC
715int em28xx_ir_init(struct em28xx *dev);
716int em28xx_ir_fini(struct em28xx *dev);
717
5b89ecf9
MCC
718#else
719
720#define em28xx_get_key_terratec NULL
721#define em28xx_get_key_em_haup NULL
722#define em28xx_get_key_pinnacle_usb_grey NULL
723#define em28xx_get_key_winfast_usbii_deluxe NULL
724
725static inline void em28xx_register_snapshot_button(struct em28xx *dev) {}
726static inline void em28xx_deregister_snapshot_button(struct em28xx *dev) {}
727static inline int em28xx_ir_init(struct em28xx *dev) { return 0; }
728static inline int em28xx_ir_fini(struct em28xx *dev) { return 0; }
729
730#endif
731
28abf083
DH
732/* Provided by em28xx-vbi.c */
733extern struct videobuf_queue_ops em28xx_vbi_qops;
734
a6c2ba28 735/* printk macros */
736
3acf2809 737#define em28xx_err(fmt, arg...) do {\
f85c657f 738 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 739
3acf2809 740#define em28xx_errdev(fmt, arg...) do {\
4ac97914 741 printk(KERN_ERR "%s: "fmt,\
f85c657f 742 dev->name , ##arg); } while (0)
a6c2ba28 743
3acf2809 744#define em28xx_info(fmt, arg...) do {\
4ac97914 745 printk(KERN_INFO "%s: "fmt,\
f85c657f 746 dev->name , ##arg); } while (0)
3acf2809 747#define em28xx_warn(fmt, arg...) do {\
4ac97914 748 printk(KERN_WARNING "%s: "fmt,\
f85c657f 749 dev->name , ##arg); } while (0)
a6c2ba28 750
6ea54d93 751static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 752{
753 /* side effect of disabling scaler and mixer */
2a29a0d7 754 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 755}
756
6ea54d93 757static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 758{
41facaa4 759 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 760}
761
6ea54d93 762static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 763{
41facaa4 764 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 765}
766
6ea54d93 767static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 768{
41facaa4 769 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 770}
771
6ea54d93 772static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 773{
41facaa4 774 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 775}
776
6ea54d93 777static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 778{
41facaa4 779 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 780}
781
6ea54d93 782static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 783{
41facaa4 784 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 785}
786
6ea54d93 787static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 788{
789 u8 tmp = (u8) val;
41facaa4 790 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 791}
792
6ea54d93 793static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 794{
795 u8 tmp = (u8) val;
41facaa4 796 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 797}
798
6ea54d93 799static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 800{
801 u8 tmp = (u8) val;
41facaa4 802 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 803}
804
6ea54d93 805static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 806{
807 u8 tmp = (u8) val;
41facaa4 808 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 809}
810
6ea54d93 811static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 812{
813 u8 tmp = (u8) val;
41facaa4 814 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 815}
816
6ea54d93 817static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 818{
819 u8 tmp = (u8) val;
41facaa4 820 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 821}
822
823/*FIXME: maxw should be dependent of alt mode */
6ea54d93 824static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 825{
55699964
MCC
826 if (dev->board.is_webcam)
827 return dev->sensor_xres;
828
1ca31892 829 if (dev->board.max_range_640_480 || dev->board.is_em2800)
7d497f8a 830 return 640;
55699964
MCC
831
832 return 720;
30556b23
MR
833}
834
6ea54d93 835static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 836{
55699964
MCC
837 if (dev->board.is_webcam)
838 return dev->sensor_yres;
839
505b6d0b 840 if (dev->board.max_range_640_480)
7d497f8a 841 return 480;
55699964
MCC
842
843 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 844}
a6c2ba28 845#endif