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a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC
25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
cb77d010 28#include <linux/videodev2.h>
ad0ebb96 29#include <media/videobuf-vmalloc.h>
f2cf250a 30#include <media/v4l2-device.h>
ad0ebb96 31
a6c2ba28 32#include <linux/i2c.h>
3593cab5 33#include <linux/mutex.h>
d5e52653 34#include <media/ir-kbd-i2c.h>
3aefb79a
MCC
35#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
36#include <media/videobuf-dvb.h>
37#endif
3ca9c093 38#include "tuner-xc2028.h"
2ba890ec 39#include "em28xx-reg.h"
3aefb79a
MCC
40
41/* Boards supported by driver */
42#define EM2800_BOARD_UNKNOWN 0
43#define EM2820_BOARD_UNKNOWN 1
44#define EM2820_BOARD_TERRATEC_CINERGY_250 2
45#define EM2820_BOARD_PINNACLE_USB_2 3
46#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
47#define EM2820_BOARD_MSI_VOX_USB_2 5
48#define EM2800_BOARD_TERRATEC_CINERGY_200 6
49#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
50#define EM2800_BOARD_KWORLD_USB2800 8
51#define EM2820_BOARD_PINNACLE_DVC_90 9
52#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
53#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
54#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
55#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
56#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
57#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 58#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 59#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 60#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
a9fc52bc 61#define EM2860_BOARD_POINTNIX_INTRAORAL_CAMERA 19
e14b3658 62#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 63#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL
64#define EM2750_BOARD_UNKNOWN 22
65#define EM2750_BOARD_DLCW_130 23
66#define EM2820_BOARD_DLINK_USB_TV 24
67#define EM2820_BOARD_GADMEI_UTV310 25
68#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
69#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
70#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
95b86a9a
DSL
71#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
72#define EM2821_BOARD_USBGEAR_VD204 31
73#define EM2821_BOARD_SUPERCOMP_USB_2 32
95b86a9a
DSL
74#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
75#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
76#define EM2860_BOARD_NETGMBH_CAM 36
77#define EM2860_BOARD_GADMEI_UTV330 37
78#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
79#define EM2861_BOARD_KWORLD_PVRTV_300U 39
80#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
81#define EM2870_BOARD_KWORLD_350U 41
82#define EM2870_BOARD_KWORLD_355U 42
83#define EM2870_BOARD_TERRATEC_XS 43
84#define EM2870_BOARD_TERRATEC_XS_MT2060 44
85#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
86#define EM2870_BOARD_COMPRO_VIDEOMATE 46
87#define EM2880_BOARD_KWORLD_DVB_305U 47
88#define EM2880_BOARD_KWORLD_DVB_310U 48
89#define EM2880_BOARD_MSI_DIGIVOX_AD 49
90#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
91#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
92#define EM2881_BOARD_DNT_DA2_HYBRID 52
93#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
94#define EM2882_BOARD_KWORLD_VS_DVBT 54
95#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
96#define EM2882_BOARD_PINNACLE_HYBRID_PRO 56
6e7b9ea0 97#define EM2883_BOARD_KWORLD_HYBRID_330U 57
ee281b85 98#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 99#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 100#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
f7fe3e6f 101#define EM2820_BOARD_GADMEI_TVR200 62
56ee3807
MCC
102#define EM2860_BOARD_KAIOMY_TVNPC_U2 63
103#define EM2860_BOARD_EASYCAP 64
f74a61e3 104#define EM2820_BOARD_IODATA_GVMVP_SZ 65
3aefb79a
MCC
105
106/* Limits minimum and default number of buffers */
107#define EM28XX_MIN_BUF 4
108#define EM28XX_DEF_BUF 8
a6c2ba28 109
c4a98793
MCC
110/*Limits the max URB message size */
111#define URB_MAX_CTRL_SIZE 80
112
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DSL
113/* Params for validated field */
114#define EM28XX_BOARD_NOT_VALIDATED 1
115#define EM28XX_BOARD_VALIDATED 0
116
22cff7b3
DSL
117/* Params for em28xx_cmd() audio */
118#define EM28XX_START_AUDIO 1
119#define EM28XX_STOP_AUDIO 0
120
596d92d5 121/* maximum number of em28xx boards */
3687e1e6 122#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 123
a6c2ba28 124/* maximum number of frames that can be queued */
3acf2809 125#define EM28XX_NUM_FRAMES 5
a6c2ba28 126/* number of frames that get used for v4l2_read() */
3acf2809 127#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 128
129/* number of buffers for isoc transfers */
3acf2809 130#define EM28XX_NUM_BUFS 5
a6c2ba28 131
d5e52653
MCC
132/* number of packets for each buffer
133 windows requests only 40 packets .. so we better do the same
134 this is what I found out for all alternate numbers there!
135 */
3acf2809 136#define EM28XX_NUM_PACKETS 40
a6c2ba28 137
a6c2ba28 138/* default alternate; 0 means choose the best */
3acf2809 139#define EM28XX_PINOUT 0
a6c2ba28 140
3acf2809 141#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 142
143/*
144#define (use usbview if you want to get the other alternate number infos)
145#define
146#define alternate number 2
147#define Endpoint Address: 82
148 Direction: in
149 Attribute: 1
150 Type: Isoc
151 Max Packet Size: 1448
152 Interval: 125us
153
154 alternate number 7
155
156 Endpoint Address: 82
157 Direction: in
158 Attribute: 1
159 Type: Isoc
160 Max Packet Size: 3072
161 Interval: 125us
162*/
163
164/* time to wait when stopping the isoc transfer */
a1a6ee74
NS
165#define EM28XX_URB_TIMEOUT \
166 msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 167
596d92d5
MCC
168/* time in msecs to wait for i2c writes to finish */
169#define EM2800_I2C_WRITE_TIMEOUT 20
170
3aefb79a 171enum em28xx_mode {
2fe3e2ee 172 EM28XX_SUSPEND,
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MCC
173 EM28XX_ANALOG_MODE,
174 EM28XX_DIGITAL_MODE,
175};
176
3acf2809 177enum em28xx_stream_state {
a6c2ba28 178 STREAM_OFF,
179 STREAM_INTERRUPT,
180 STREAM_ON,
181};
182
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AT
183struct em28xx;
184
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185struct em28xx_usb_isoc_ctl {
186 /* max packet size of isoc transaction */
187 int max_pkt_size;
188
189 /* number of allocated urbs */
190 int num_bufs;
191
192 /* urb for isoc transfers */
193 struct urb **urb;
194
195 /* transfer buffers for isoc transfer */
196 char **transfer_buffer;
197
198 /* Last buffer command and region */
199 u8 cmd;
200 int pos, size, pktsize;
201
202 /* Last field: ODD or EVEN? */
203 int field;
204
205 /* Stores incomplete commands */
206 u32 tmp_buf;
207 int tmp_buf_len;
208
209 /* Stores already requested buffers */
210 struct em28xx_buffer *buf;
211
212 /* Stores the number of received fields */
213 int nfields;
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AT
214
215 /* isoc urb callback */
216 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
217
ad0ebb96
MCC
218};
219
bddcf633 220/* Struct to enumberate video formats */
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221struct em28xx_fmt {
222 char *name;
223 u32 fourcc; /* v4l2 format id */
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224 int depth;
225 int reg;
ad0ebb96
MCC
226};
227
228/* buffer for one video frame */
229struct em28xx_buffer {
230 /* common v4l buffer stuff -- must be first */
231 struct videobuf_buffer vb;
232
a6c2ba28 233 struct list_head frame;
a6c2ba28 234 int top_field;
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MCC
235 int receiving;
236};
237
238struct em28xx_dmaqueue {
239 struct list_head active;
240 struct list_head queued;
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MCC
241
242 wait_queue_head_t wq;
243
244 /* Counters to control buffer fill */
245 int pos;
a6c2ba28 246};
247
248/* io methods */
3acf2809 249enum em28xx_io_method {
a6c2ba28 250 IO_NONE,
251 IO_READ,
252 IO_MMAP,
253};
254
255/* inputs */
256
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MCC
257#define MAX_EM28XX_INPUT 4
258enum enum28xx_itype {
259 EM28XX_VMUX_COMPOSITE1 = 1,
260 EM28XX_VMUX_COMPOSITE2,
261 EM28XX_VMUX_COMPOSITE3,
262 EM28XX_VMUX_COMPOSITE4,
263 EM28XX_VMUX_SVIDEO,
264 EM28XX_VMUX_TELEVISION,
265 EM28XX_VMUX_CABLE,
266 EM28XX_VMUX_DVB,
267 EM28XX_VMUX_DEBUG,
268 EM28XX_RADIO,
a6c2ba28 269};
270
35643943
MCC
271enum em28xx_ac97_mode {
272 EM28XX_NO_AC97 = 0,
273 EM28XX_AC97_EM202,
209acc02 274 EM28XX_AC97_SIGMATEL,
35643943
MCC
275 EM28XX_AC97_OTHER,
276};
277
278struct em28xx_audio_mode {
279 enum em28xx_ac97_mode ac97;
280
281 u16 ac97_feat;
16c7bcad 282 u32 ac97_vendor_id;
35643943
MCC
283
284 unsigned int has_audio:1;
285
286 unsigned int i2s_3rates:1;
287 unsigned int i2s_5rates:1;
5c2231c8
DH
288};
289
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MCC
290/* em28xx has two audio inputs: tuner and line in.
291 However, on most devices, an auxiliary AC97 codec device is used.
292 The AC97 device may have several different inputs and outputs,
293 depending on their model. So, it is possible to use AC97 mixer to
294 address more than two different entries.
295 */
539c96d0 296enum em28xx_amux {
5faff789
MCC
297 /* This is the only entry for em28xx tuner input */
298 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
299
300 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
301
302 /* Some less-common mixer setups */
303 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
304 EM28XX_AMUX_PHONE,
305 EM28XX_AMUX_MIC,
306 EM28XX_AMUX_CD,
307 EM28XX_AMUX_AUX,
308 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC
309};
310
35ae6f04 311enum em28xx_aout {
8866f9cf 312 /* AC97 outputs */
e879b8eb
MCC
313 EM28XX_AOUT_MASTER = 1 << 0,
314 EM28XX_AOUT_LINE = 1 << 1,
315 EM28XX_AOUT_MONO = 1 << 2,
316 EM28XX_AOUT_LFE = 1 << 3,
317 EM28XX_AOUT_SURR = 1 << 4,
8866f9cf
MCC
318
319 /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
320 EM28XX_AOUT_PCM_IN = 1 << 7,
321
322 /* Bits 10-8 are used to indicate the PCM IN record select */
323 EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
324 EM28XX_AOUT_PCM_CD = 1 << 8,
325 EM28XX_AOUT_PCM_VIDEO = 2 << 8,
326 EM28XX_AOUT_PCM_AUX = 3 << 8,
327 EM28XX_AOUT_PCM_LINE = 4 << 8,
328 EM28XX_AOUT_PCM_STEREO = 5 << 8,
329 EM28XX_AOUT_PCM_MONO = 6 << 8,
330 EM28XX_AOUT_PCM_PHONE = 7 << 8,
35ae6f04
MCC
331};
332
32929fb4 333static inline int ac97_return_record_select(int a_out)
8866f9cf
MCC
334{
335 return (a_out & 0x700) >> 8;
336}
337
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338struct em28xx_reg_seq {
339 int reg;
340 unsigned char val, mask;
341 int sleep;
342};
343
3acf2809
MCC
344struct em28xx_input {
345 enum enum28xx_itype type;
a6c2ba28 346 unsigned int vmux;
539c96d0 347 enum em28xx_amux amux;
35ae6f04 348 enum em28xx_aout aout;
122b77e5 349 struct em28xx_reg_seq *gpio;
a6c2ba28 350};
351
3acf2809 352#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 353
3acf2809 354enum em28xx_decoder {
1ed1dd54 355 EM28XX_NODECODER,
3acf2809 356 EM28XX_TVP5150,
ec5de990 357 EM28XX_SAA711X,
a6c2ba28 358};
359
df7fa09c
MCC
360enum em28xx_adecoder {
361 EM28XX_NOADECODER = 0,
362 EM28XX_TVAUDIO,
363};
364
3acf2809 365struct em28xx_board {
a6c2ba28 366 char *name;
505b6d0b 367 int vchannels;
a6c2ba28 368 int tuner_type;
66767920 369 int tuner_addr;
a6c2ba28 370
371 /* i2c flags */
372 unsigned int tda9887_conf;
373
017ab4b1 374 /* GPIO sequences */
122b77e5 375 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 376 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 377 struct em28xx_reg_seq *tuner_gpio;
2bd1d9eb 378 struct em28xx_reg_seq *mute_gpio;
122b77e5 379
74f38a82 380 unsigned int is_em2800:1;
a6c2ba28 381 unsigned int has_msp34xx:1;
5add9a6f 382 unsigned int mts_firmware:1;
c8793b03 383 unsigned int max_range_640_480:1;
3aefb79a 384 unsigned int has_dvb:1;
a9fc52bc 385 unsigned int has_snapshot_button:1;
95b86a9a 386 unsigned int valid:1;
3abee53e 387
a2070c66 388 unsigned char xclk, i2c_speed;
f2cf250a
DSL
389 unsigned char radio_addr;
390 unsigned short tvaudio_addr;
a2070c66 391
3acf2809 392 enum em28xx_decoder decoder;
df7fa09c 393 enum em28xx_adecoder adecoder;
a6c2ba28 394
3acf2809 395 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 396 struct em28xx_input radio;
4b92253a 397 IR_KEYTAB_TYPE *ir_codes;
a6c2ba28 398};
399
3acf2809 400struct em28xx_eeprom {
a6c2ba28 401 u32 id; /* 0x9567eb1a */
402 u16 vendor_ID;
403 u16 product_ID;
404
405 u16 chip_conf;
406
407 u16 board_conf;
408
409 u16 string1, string2, string3;
410
411 u8 string_idx_table;
412};
413
414/* device states */
3acf2809 415enum em28xx_dev_state {
a6c2ba28 416 DEV_INITIALIZED = 0x01,
417 DEV_DISCONNECTED = 0x02,
418 DEV_MISCONFIGURED = 0x04,
419};
420
6d79468d
MCC
421#define EM28XX_AUDIO_BUFS 5
422#define EM28XX_NUM_AUDIO_PACKETS 64
423#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
424#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC
425
426/* em28xx extensions */
6d79468d 427#define EM28XX_AUDIO 0x10
3aefb79a 428#define EM28XX_DVB 0x20
6d79468d
MCC
429
430struct em28xx_audio {
431 char name[50];
432 char *transfer_buffer[EM28XX_AUDIO_BUFS];
433 struct urb *urb[EM28XX_AUDIO_BUFS];
434 struct usb_device *udev;
435 unsigned int capture_transfer_done;
436 struct snd_pcm_substream *capture_pcm_substream;
437
438 unsigned int hwptr_done_capture;
439 struct snd_card *sndcard;
440
c744dff2 441 int users;
6d79468d
MCC
442 enum em28xx_stream_state capture_stream;
443 spinlock_t slock;
444};
445
52284c3e
MCC
446struct em28xx;
447
448struct em28xx_fh {
449 struct em28xx *dev;
450 unsigned int stream_on:1; /* Locks streams */
451 int radio;
452
453 struct videobuf_queue vb_vidq;
454
455 enum v4l2_buf_type type;
456};
457
a6c2ba28 458/* main device struct */
3acf2809 459struct em28xx {
a6c2ba28 460 /* generic device properties */
461 char name[30]; /* name (including minor) of the device */
462 int model; /* index in the device_data struct */
e5589bef 463 int devno; /* marks the number of this device */
600bd7f0 464 enum em28xx_chip_id chip_id;
505b6d0b 465
f2cf250a 466 struct v4l2_device v4l2_dev;
505b6d0b
MCC
467 struct em28xx_board board;
468
a225452e 469 unsigned int stream_on:1; /* Locks streams */
d7448a8d 470 unsigned int has_audio_class:1;
24a613e4 471 unsigned int has_alsa_audio:1;
a2070c66 472
bddcf633
MCC
473 struct em28xx_fmt *format;
474
a924a499
MCC
475 struct em28xx_IR *ir;
476
89b329ef
MCC
477 /* Some older em28xx chips needs a waiting time after writing */
478 unsigned int wait_after_write;
479
74f38a82
MCC
480 struct list_head devlist;
481
9bb13a6d
MCC
482 u32 i2s_speed; /* I2S speed for audio digital stream */
483
35643943 484 struct em28xx_audio_mode audio_mode;
a6c2ba28 485
486 int tuner_type; /* type of the tuner */
487 int tuner_addr; /* tuner address */
488 int tda9887_conf;
489 /* i2c i/o */
490 struct i2c_adapter i2c_adap;
491 struct i2c_client i2c_client;
492 /* video for linux */
493 int users; /* user count for exclusive use */
494 struct video_device *vdev; /* video for linux device struct */
7d497f8a 495 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 496 int ctl_freq; /* selected frequency */
497 unsigned int ctl_input; /* selected input */
95b86a9a 498 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 499 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 500 int mute;
501 int volume;
502 /* frame properties */
a6c2ba28 503 int width; /* current frame width */
504 int height; /* current frame height */
d45b9b8a
HV
505 unsigned hscale; /* horizontal scale factor (see datasheet) */
506 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 507 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 508 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 509
03910cc3 510 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL
511 unsigned long i2c_hash; /* i2c devicelist hash -
512 for boards with generic ID */
03910cc3 513
9baed99e 514 struct em28xx_audio adev;
6d79468d 515
a6c2ba28 516 /* states */
3acf2809 517 enum em28xx_dev_state state;
3acf2809 518 enum em28xx_io_method io;
9e31ced8 519
d7448a8d
MCC
520 struct work_struct request_module_wk;
521
a6c2ba28 522 /* locks */
5a80415b 523 struct mutex lock;
f2a2e491 524 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 525 /* spinlock_t queue_lock; */
a6c2ba28 526 struct list_head inqueue, outqueue;
527 wait_queue_head_t open, wait_frame, wait_stream;
528 struct video_device *vbi_dev;
0be43754 529 struct video_device *radio_dev;
a6c2ba28 530
531 unsigned char eedata[256];
532
ad0ebb96
MCC
533 /* Isoc control struct */
534 struct em28xx_dmaqueue vidq;
535 struct em28xx_usb_isoc_ctl isoc_ctl;
536 spinlock_t slock;
537
a6c2ba28 538 /* usb transfer */
539 struct usb_device *udev; /* the usb device */
540 int alt; /* alternate */
541 int max_pkt_size; /* max packet size of isoc transaction */
9d4d9c05
MCC
542 int num_alt; /* Number of alternative settings */
543 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809 544 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
a1a6ee74
NS
545 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc
546 transfer */
c4a98793
MCC
547 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
548
a6c2ba28 549 /* helper funcs that call usb_control_msg */
6ea54d93 550 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 551 char *buf, int len);
6ea54d93
DSL
552 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
553 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
554 char *buf, int len);
555 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 556 char *buf, int len);
6ea54d93 557 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
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MCC
558
559 enum em28xx_mode mode;
560
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DH
561 /* register numbers for GPO/GPIO registers */
562 u16 reg_gpo_num, reg_gpio_num;
563
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MCC
564 /* Caches GPO and GPIO registers */
565 unsigned char reg_gpo, reg_gpio;
566
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DH
567 /* Snapshot button */
568 char snapshot_button_path[30]; /* path of the input dev */
569 struct input_dev *sbutton_input_dev;
570 struct delayed_work sbutton_query_work;
571
3421b778 572 struct em28xx_dvb *dvb;
a6c2ba28 573};
574
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MCC
575struct em28xx_ops {
576 struct list_head next;
577 char *name;
578 int id;
579 int (*init)(struct em28xx *);
580 int (*fini)(struct em28xx *);
a3a048ce
MCC
581};
582
3acf2809 583/* Provided by em28xx-i2c.c */
fad7b958 584void em28xx_do_i2c_scan(struct em28xx *dev);
f2cf250a
DSL
585int em28xx_i2c_register(struct em28xx *dev);
586int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 587
3acf2809 588/* Provided by em28xx-core.c */
a6c2ba28 589
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MCC
590u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
591void em28xx_queue_unusedframes(struct em28xx *dev);
592void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 593
3acf2809 594int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 595 char *buf, int len);
3acf2809
MCC
596int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
597int em28xx_read_reg(struct em28xx *dev, u16 reg);
598int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 599 int len);
3acf2809 600int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
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DH
601int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
602
531c98e7
MCC
603int em28xx_read_ac97(struct em28xx *dev, u8 reg);
604int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
605
3acf2809 606int em28xx_audio_analog_set(struct em28xx *dev);
35643943 607int em28xx_audio_setup(struct em28xx *dev);
539c96d0 608
3acf2809
MCC
609int em28xx_colorlevels_set_default(struct em28xx *dev);
610int em28xx_capture_start(struct em28xx *dev, int start);
bddcf633 611int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 612int em28xx_resolution_set(struct em28xx *dev);
3acf2809 613int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT
614int em28xx_init_isoc(struct em28xx *dev, int max_packets,
615 int num_bufs, int max_pkt_size,
c67ec53f 616 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 617void em28xx_uninit_isoc(struct em28xx *dev);
c67ec53f
MCC
618int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
619int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b
MCC
620void em28xx_wake_i2c(struct em28xx *dev);
621void em28xx_remove_from_devlist(struct em28xx *dev);
622void em28xx_add_into_devlist(struct em28xx *dev);
bec43661 623struct em28xx *em28xx_get_device(int minor,
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MCC
624 enum v4l2_buf_type *fh_type,
625 int *has_radio);
6d79468d
MCC
626int em28xx_register_extension(struct em28xx_ops *dev);
627void em28xx_unregister_extension(struct em28xx_ops *dev);
1a23f81b
MCC
628void em28xx_init_extension(struct em28xx *dev);
629void em28xx_close_extension(struct em28xx *dev);
630
631/* Provided by em28xx-video.c */
1a23f81b
MCC
632int em28xx_register_analog_devices(struct em28xx *dev);
633void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 634
3acf2809 635/* Provided by em28xx-cards.c */
6ea54d93 636extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 637extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC
638extern void em28xx_card_setup(struct em28xx *dev);
639extern struct em28xx_board em28xx_boards[];
640extern struct usb_device_id em28xx_id_table[];
641extern const unsigned int em28xx_bcount;
c8793b03 642void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir);
d7cba043 643int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 644void em28xx_release_resources(struct em28xx *dev);
c8793b03
MCC
645
646/* Provided by em28xx-input.c */
c8793b03
MCC
647int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
648int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
649int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
650 u32 *ir_raw);
a9fc52bc
DH
651void em28xx_register_snapshot_button(struct em28xx *dev);
652void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 653
a924a499
MCC
654int em28xx_ir_init(struct em28xx *dev);
655int em28xx_ir_fini(struct em28xx *dev);
656
a6c2ba28 657/* printk macros */
658
3acf2809 659#define em28xx_err(fmt, arg...) do {\
f85c657f 660 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 661
3acf2809 662#define em28xx_errdev(fmt, arg...) do {\
4ac97914 663 printk(KERN_ERR "%s: "fmt,\
f85c657f 664 dev->name , ##arg); } while (0)
a6c2ba28 665
3acf2809 666#define em28xx_info(fmt, arg...) do {\
4ac97914 667 printk(KERN_INFO "%s: "fmt,\
f85c657f 668 dev->name , ##arg); } while (0)
3acf2809 669#define em28xx_warn(fmt, arg...) do {\
4ac97914 670 printk(KERN_WARNING "%s: "fmt,\
f85c657f 671 dev->name , ##arg); } while (0)
a6c2ba28 672
6ea54d93 673static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 674{
675 /* side effect of disabling scaler and mixer */
2a29a0d7 676 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 677}
678
6ea54d93 679static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 680{
41facaa4 681 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 682}
683
6ea54d93 684static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 685{
41facaa4 686 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 687}
688
6ea54d93 689static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 690{
41facaa4 691 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 692}
693
6ea54d93 694static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 695{
41facaa4 696 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 697}
698
6ea54d93 699static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 700{
41facaa4 701 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 702}
703
6ea54d93 704static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 705{
41facaa4 706 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 707}
708
6ea54d93 709static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 710{
711 u8 tmp = (u8) val;
41facaa4 712 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 713}
714
6ea54d93 715static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 716{
717 u8 tmp = (u8) val;
41facaa4 718 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 719}
720
6ea54d93 721static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 722{
723 u8 tmp = (u8) val;
41facaa4 724 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 725}
726
6ea54d93 727static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 728{
729 u8 tmp = (u8) val;
41facaa4 730 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 731}
732
6ea54d93 733static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 734{
735 u8 tmp = (u8) val;
41facaa4 736 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 737}
738
6ea54d93 739static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 740{
741 u8 tmp = (u8) val;
41facaa4 742 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 743}
744
745/*FIXME: maxw should be dependent of alt mode */
6ea54d93 746static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 747{
505b6d0b 748 if (dev->board.max_range_640_480)
7d497f8a 749 return 640;
c8793b03 750 else
7d497f8a 751 return 720;
30556b23
MR
752}
753
6ea54d93 754static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 755{
505b6d0b 756 if (dev->board.max_range_640_480)
7d497f8a 757 return 480;
c8793b03 758 else
7d497f8a 759 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 760}
a6c2ba28 761#endif