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V4L/DVB (11810): em28xx: properly set packet size based on the device's eeprom config...
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a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC
25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
cb77d010 28#include <linux/videodev2.h>
ad0ebb96 29#include <media/videobuf-vmalloc.h>
f2cf250a 30#include <media/v4l2-device.h>
ad0ebb96 31
a6c2ba28 32#include <linux/i2c.h>
3593cab5 33#include <linux/mutex.h>
d5e52653 34#include <media/ir-kbd-i2c.h>
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MCC
35#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
36#include <media/videobuf-dvb.h>
37#endif
3ca9c093 38#include "tuner-xc2028.h"
2ba890ec 39#include "em28xx-reg.h"
3aefb79a
MCC
40
41/* Boards supported by driver */
42#define EM2800_BOARD_UNKNOWN 0
43#define EM2820_BOARD_UNKNOWN 1
44#define EM2820_BOARD_TERRATEC_CINERGY_250 2
45#define EM2820_BOARD_PINNACLE_USB_2 3
46#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
47#define EM2820_BOARD_MSI_VOX_USB_2 5
48#define EM2800_BOARD_TERRATEC_CINERGY_200 6
49#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
50#define EM2800_BOARD_KWORLD_USB2800 8
51#define EM2820_BOARD_PINNACLE_DVC_90 9
52#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
53#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
54#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
55#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
56#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
57#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 58#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 59#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 60#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
a9fc52bc 61#define EM2860_BOARD_POINTNIX_INTRAORAL_CAMERA 19
e14b3658 62#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 63#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
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64#define EM2750_BOARD_UNKNOWN 22
65#define EM2750_BOARD_DLCW_130 23
66#define EM2820_BOARD_DLINK_USB_TV 24
67#define EM2820_BOARD_GADMEI_UTV310 25
68#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
69#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
70#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
95b86a9a
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71#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
72#define EM2821_BOARD_USBGEAR_VD204 31
73#define EM2821_BOARD_SUPERCOMP_USB_2 32
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74#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
75#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
76#define EM2860_BOARD_NETGMBH_CAM 36
77#define EM2860_BOARD_GADMEI_UTV330 37
78#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
79#define EM2861_BOARD_KWORLD_PVRTV_300U 39
80#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
81#define EM2870_BOARD_KWORLD_350U 41
82#define EM2870_BOARD_KWORLD_355U 42
83#define EM2870_BOARD_TERRATEC_XS 43
84#define EM2870_BOARD_TERRATEC_XS_MT2060 44
85#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
86#define EM2870_BOARD_COMPRO_VIDEOMATE 46
87#define EM2880_BOARD_KWORLD_DVB_305U 47
88#define EM2880_BOARD_KWORLD_DVB_310U 48
89#define EM2880_BOARD_MSI_DIGIVOX_AD 49
90#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
91#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
92#define EM2881_BOARD_DNT_DA2_HYBRID 52
93#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
94#define EM2882_BOARD_KWORLD_VS_DVBT 54
95#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
96#define EM2882_BOARD_PINNACLE_HYBRID_PRO 56
6e7b9ea0 97#define EM2883_BOARD_KWORLD_HYBRID_330U 57
ee281b85 98#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 99#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 100#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
f7fe3e6f 101#define EM2820_BOARD_GADMEI_TVR200 62
56ee3807
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102#define EM2860_BOARD_KAIOMY_TVNPC_U2 63
103#define EM2860_BOARD_EASYCAP 64
f74a61e3 104#define EM2820_BOARD_IODATA_GVMVP_SZ 65
e5db5d44 105#define EM2880_BOARD_EMPIRE_DUAL_TV 66
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MCC
106
107/* Limits minimum and default number of buffers */
108#define EM28XX_MIN_BUF 4
109#define EM28XX_DEF_BUF 8
a6c2ba28 110
c4a98793
MCC
111/*Limits the max URB message size */
112#define URB_MAX_CTRL_SIZE 80
113
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DSL
114/* Params for validated field */
115#define EM28XX_BOARD_NOT_VALIDATED 1
116#define EM28XX_BOARD_VALIDATED 0
117
22cff7b3
DSL
118/* Params for em28xx_cmd() audio */
119#define EM28XX_START_AUDIO 1
120#define EM28XX_STOP_AUDIO 0
121
596d92d5 122/* maximum number of em28xx boards */
3687e1e6 123#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 124
a6c2ba28 125/* maximum number of frames that can be queued */
3acf2809 126#define EM28XX_NUM_FRAMES 5
a6c2ba28 127/* number of frames that get used for v4l2_read() */
3acf2809 128#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 129
130/* number of buffers for isoc transfers */
3acf2809 131#define EM28XX_NUM_BUFS 5
a6c2ba28 132
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MCC
133/* number of packets for each buffer
134 windows requests only 40 packets .. so we better do the same
135 this is what I found out for all alternate numbers there!
136 */
3acf2809 137#define EM28XX_NUM_PACKETS 40
a6c2ba28 138
a6c2ba28 139/* default alternate; 0 means choose the best */
3acf2809 140#define EM28XX_PINOUT 0
a6c2ba28 141
3acf2809 142#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 143
144/*
145#define (use usbview if you want to get the other alternate number infos)
146#define
147#define alternate number 2
148#define Endpoint Address: 82
149 Direction: in
150 Attribute: 1
151 Type: Isoc
152 Max Packet Size: 1448
153 Interval: 125us
154
155 alternate number 7
156
157 Endpoint Address: 82
158 Direction: in
159 Attribute: 1
160 Type: Isoc
161 Max Packet Size: 3072
162 Interval: 125us
163*/
164
165/* time to wait when stopping the isoc transfer */
a1a6ee74
NS
166#define EM28XX_URB_TIMEOUT \
167 msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 168
596d92d5
MCC
169/* time in msecs to wait for i2c writes to finish */
170#define EM2800_I2C_WRITE_TIMEOUT 20
171
3aefb79a 172enum em28xx_mode {
2fe3e2ee 173 EM28XX_SUSPEND,
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MCC
174 EM28XX_ANALOG_MODE,
175 EM28XX_DIGITAL_MODE,
176};
177
3acf2809 178enum em28xx_stream_state {
a6c2ba28 179 STREAM_OFF,
180 STREAM_INTERRUPT,
181 STREAM_ON,
182};
183
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AT
184struct em28xx;
185
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186struct em28xx_usb_isoc_ctl {
187 /* max packet size of isoc transaction */
188 int max_pkt_size;
189
190 /* number of allocated urbs */
191 int num_bufs;
192
193 /* urb for isoc transfers */
194 struct urb **urb;
195
196 /* transfer buffers for isoc transfer */
197 char **transfer_buffer;
198
199 /* Last buffer command and region */
200 u8 cmd;
201 int pos, size, pktsize;
202
203 /* Last field: ODD or EVEN? */
204 int field;
205
206 /* Stores incomplete commands */
207 u32 tmp_buf;
208 int tmp_buf_len;
209
210 /* Stores already requested buffers */
211 struct em28xx_buffer *buf;
212
213 /* Stores the number of received fields */
214 int nfields;
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AT
215
216 /* isoc urb callback */
217 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
218
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MCC
219};
220
bddcf633 221/* Struct to enumberate video formats */
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222struct em28xx_fmt {
223 char *name;
224 u32 fourcc; /* v4l2 format id */
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MCC
225 int depth;
226 int reg;
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MCC
227};
228
229/* buffer for one video frame */
230struct em28xx_buffer {
231 /* common v4l buffer stuff -- must be first */
232 struct videobuf_buffer vb;
233
a6c2ba28 234 struct list_head frame;
a6c2ba28 235 int top_field;
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MCC
236 int receiving;
237};
238
239struct em28xx_dmaqueue {
240 struct list_head active;
241 struct list_head queued;
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MCC
242
243 wait_queue_head_t wq;
244
245 /* Counters to control buffer fill */
246 int pos;
a6c2ba28 247};
248
249/* io methods */
3acf2809 250enum em28xx_io_method {
a6c2ba28 251 IO_NONE,
252 IO_READ,
253 IO_MMAP,
254};
255
256/* inputs */
257
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MCC
258#define MAX_EM28XX_INPUT 4
259enum enum28xx_itype {
260 EM28XX_VMUX_COMPOSITE1 = 1,
261 EM28XX_VMUX_COMPOSITE2,
262 EM28XX_VMUX_COMPOSITE3,
263 EM28XX_VMUX_COMPOSITE4,
264 EM28XX_VMUX_SVIDEO,
265 EM28XX_VMUX_TELEVISION,
266 EM28XX_VMUX_CABLE,
267 EM28XX_VMUX_DVB,
268 EM28XX_VMUX_DEBUG,
269 EM28XX_RADIO,
a6c2ba28 270};
271
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MCC
272enum em28xx_ac97_mode {
273 EM28XX_NO_AC97 = 0,
274 EM28XX_AC97_EM202,
209acc02 275 EM28XX_AC97_SIGMATEL,
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MCC
276 EM28XX_AC97_OTHER,
277};
278
279struct em28xx_audio_mode {
280 enum em28xx_ac97_mode ac97;
281
282 u16 ac97_feat;
16c7bcad 283 u32 ac97_vendor_id;
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MCC
284
285 unsigned int has_audio:1;
286
287 unsigned int i2s_3rates:1;
288 unsigned int i2s_5rates:1;
5c2231c8
DH
289};
290
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MCC
291/* em28xx has two audio inputs: tuner and line in.
292 However, on most devices, an auxiliary AC97 codec device is used.
293 The AC97 device may have several different inputs and outputs,
294 depending on their model. So, it is possible to use AC97 mixer to
295 address more than two different entries.
296 */
539c96d0 297enum em28xx_amux {
5faff789
MCC
298 /* This is the only entry for em28xx tuner input */
299 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
300
301 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
302
303 /* Some less-common mixer setups */
304 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
305 EM28XX_AMUX_PHONE,
306 EM28XX_AMUX_MIC,
307 EM28XX_AMUX_CD,
308 EM28XX_AMUX_AUX,
309 EM28XX_AMUX_PCM_OUT,
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MCC
310};
311
35ae6f04 312enum em28xx_aout {
8866f9cf 313 /* AC97 outputs */
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MCC
314 EM28XX_AOUT_MASTER = 1 << 0,
315 EM28XX_AOUT_LINE = 1 << 1,
316 EM28XX_AOUT_MONO = 1 << 2,
317 EM28XX_AOUT_LFE = 1 << 3,
318 EM28XX_AOUT_SURR = 1 << 4,
8866f9cf
MCC
319
320 /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
321 EM28XX_AOUT_PCM_IN = 1 << 7,
322
323 /* Bits 10-8 are used to indicate the PCM IN record select */
324 EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
325 EM28XX_AOUT_PCM_CD = 1 << 8,
326 EM28XX_AOUT_PCM_VIDEO = 2 << 8,
327 EM28XX_AOUT_PCM_AUX = 3 << 8,
328 EM28XX_AOUT_PCM_LINE = 4 << 8,
329 EM28XX_AOUT_PCM_STEREO = 5 << 8,
330 EM28XX_AOUT_PCM_MONO = 6 << 8,
331 EM28XX_AOUT_PCM_PHONE = 7 << 8,
35ae6f04
MCC
332};
333
32929fb4 334static inline int ac97_return_record_select(int a_out)
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MCC
335{
336 return (a_out & 0x700) >> 8;
337}
338
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339struct em28xx_reg_seq {
340 int reg;
341 unsigned char val, mask;
342 int sleep;
343};
344
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MCC
345struct em28xx_input {
346 enum enum28xx_itype type;
a6c2ba28 347 unsigned int vmux;
539c96d0 348 enum em28xx_amux amux;
35ae6f04 349 enum em28xx_aout aout;
122b77e5 350 struct em28xx_reg_seq *gpio;
a6c2ba28 351};
352
3acf2809 353#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 354
3acf2809 355enum em28xx_decoder {
1ed1dd54 356 EM28XX_NODECODER,
3acf2809 357 EM28XX_TVP5150,
ec5de990 358 EM28XX_SAA711X,
a6c2ba28 359};
360
df7fa09c
MCC
361enum em28xx_adecoder {
362 EM28XX_NOADECODER = 0,
363 EM28XX_TVAUDIO,
364};
365
3acf2809 366struct em28xx_board {
a6c2ba28 367 char *name;
505b6d0b 368 int vchannels;
a6c2ba28 369 int tuner_type;
66767920 370 int tuner_addr;
a6c2ba28 371
372 /* i2c flags */
373 unsigned int tda9887_conf;
374
017ab4b1 375 /* GPIO sequences */
122b77e5 376 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 377 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 378 struct em28xx_reg_seq *tuner_gpio;
2bd1d9eb 379 struct em28xx_reg_seq *mute_gpio;
122b77e5 380
74f38a82 381 unsigned int is_em2800:1;
a6c2ba28 382 unsigned int has_msp34xx:1;
5add9a6f 383 unsigned int mts_firmware:1;
c8793b03 384 unsigned int max_range_640_480:1;
3aefb79a 385 unsigned int has_dvb:1;
a9fc52bc 386 unsigned int has_snapshot_button:1;
95b86a9a 387 unsigned int valid:1;
3abee53e 388
a2070c66 389 unsigned char xclk, i2c_speed;
f2cf250a
DSL
390 unsigned char radio_addr;
391 unsigned short tvaudio_addr;
a2070c66 392
3acf2809 393 enum em28xx_decoder decoder;
df7fa09c 394 enum em28xx_adecoder adecoder;
a6c2ba28 395
3acf2809 396 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 397 struct em28xx_input radio;
4b92253a 398 IR_KEYTAB_TYPE *ir_codes;
a6c2ba28 399};
400
3acf2809 401struct em28xx_eeprom {
a6c2ba28 402 u32 id; /* 0x9567eb1a */
403 u16 vendor_ID;
404 u16 product_ID;
405
406 u16 chip_conf;
407
408 u16 board_conf;
409
410 u16 string1, string2, string3;
411
412 u8 string_idx_table;
413};
414
415/* device states */
3acf2809 416enum em28xx_dev_state {
a6c2ba28 417 DEV_INITIALIZED = 0x01,
418 DEV_DISCONNECTED = 0x02,
419 DEV_MISCONFIGURED = 0x04,
420};
421
6d79468d
MCC
422#define EM28XX_AUDIO_BUFS 5
423#define EM28XX_NUM_AUDIO_PACKETS 64
424#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
425#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC
426
427/* em28xx extensions */
6d79468d 428#define EM28XX_AUDIO 0x10
3aefb79a 429#define EM28XX_DVB 0x20
6d79468d
MCC
430
431struct em28xx_audio {
432 char name[50];
433 char *transfer_buffer[EM28XX_AUDIO_BUFS];
434 struct urb *urb[EM28XX_AUDIO_BUFS];
435 struct usb_device *udev;
436 unsigned int capture_transfer_done;
437 struct snd_pcm_substream *capture_pcm_substream;
438
439 unsigned int hwptr_done_capture;
440 struct snd_card *sndcard;
441
c744dff2 442 int users;
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MCC
443 enum em28xx_stream_state capture_stream;
444 spinlock_t slock;
445};
446
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MCC
447struct em28xx;
448
449struct em28xx_fh {
450 struct em28xx *dev;
451 unsigned int stream_on:1; /* Locks streams */
452 int radio;
453
454 struct videobuf_queue vb_vidq;
455
456 enum v4l2_buf_type type;
457};
458
a6c2ba28 459/* main device struct */
3acf2809 460struct em28xx {
a6c2ba28 461 /* generic device properties */
462 char name[30]; /* name (including minor) of the device */
463 int model; /* index in the device_data struct */
e5589bef 464 int devno; /* marks the number of this device */
600bd7f0 465 enum em28xx_chip_id chip_id;
505b6d0b 466
f2cf250a 467 struct v4l2_device v4l2_dev;
505b6d0b
MCC
468 struct em28xx_board board;
469
a225452e 470 unsigned int stream_on:1; /* Locks streams */
d7448a8d 471 unsigned int has_audio_class:1;
24a613e4 472 unsigned int has_alsa_audio:1;
a2070c66 473
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MCC
474 struct em28xx_fmt *format;
475
a924a499
MCC
476 struct em28xx_IR *ir;
477
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MCC
478 /* Some older em28xx chips needs a waiting time after writing */
479 unsigned int wait_after_write;
480
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MCC
481 struct list_head devlist;
482
9bb13a6d
MCC
483 u32 i2s_speed; /* I2S speed for audio digital stream */
484
35643943 485 struct em28xx_audio_mode audio_mode;
a6c2ba28 486
487 int tuner_type; /* type of the tuner */
488 int tuner_addr; /* tuner address */
489 int tda9887_conf;
490 /* i2c i/o */
491 struct i2c_adapter i2c_adap;
492 struct i2c_client i2c_client;
493 /* video for linux */
494 int users; /* user count for exclusive use */
495 struct video_device *vdev; /* video for linux device struct */
7d497f8a 496 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 497 int ctl_freq; /* selected frequency */
498 unsigned int ctl_input; /* selected input */
95b86a9a 499 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 500 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 501 int mute;
502 int volume;
503 /* frame properties */
a6c2ba28 504 int width; /* current frame width */
505 int height; /* current frame height */
d45b9b8a
HV
506 unsigned hscale; /* horizontal scale factor (see datasheet) */
507 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 508 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 509 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 510
03910cc3 511 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL
512 unsigned long i2c_hash; /* i2c devicelist hash -
513 for boards with generic ID */
03910cc3 514
9baed99e 515 struct em28xx_audio adev;
6d79468d 516
a6c2ba28 517 /* states */
3acf2809 518 enum em28xx_dev_state state;
3acf2809 519 enum em28xx_io_method io;
9e31ced8 520
d7448a8d
MCC
521 struct work_struct request_module_wk;
522
a6c2ba28 523 /* locks */
5a80415b 524 struct mutex lock;
f2a2e491 525 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 526 /* spinlock_t queue_lock; */
a6c2ba28 527 struct list_head inqueue, outqueue;
528 wait_queue_head_t open, wait_frame, wait_stream;
529 struct video_device *vbi_dev;
0be43754 530 struct video_device *radio_dev;
a6c2ba28 531
532 unsigned char eedata[256];
533
ad0ebb96
MCC
534 /* Isoc control struct */
535 struct em28xx_dmaqueue vidq;
536 struct em28xx_usb_isoc_ctl isoc_ctl;
537 spinlock_t slock;
538
a6c2ba28 539 /* usb transfer */
540 struct usb_device *udev; /* the usb device */
541 int alt; /* alternate */
542 int max_pkt_size; /* max packet size of isoc transaction */
9d4d9c05
MCC
543 int num_alt; /* Number of alternative settings */
544 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809 545 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
a1a6ee74
NS
546 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc
547 transfer */
c4a98793
MCC
548 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
549
a6c2ba28 550 /* helper funcs that call usb_control_msg */
6ea54d93 551 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 552 char *buf, int len);
6ea54d93
DSL
553 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
554 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
555 char *buf, int len);
556 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 557 char *buf, int len);
6ea54d93 558 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
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MCC
559
560 enum em28xx_mode mode;
561
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DH
562 /* register numbers for GPO/GPIO registers */
563 u16 reg_gpo_num, reg_gpio_num;
564
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MCC
565 /* Caches GPO and GPIO registers */
566 unsigned char reg_gpo, reg_gpio;
567
a9fc52bc
DH
568 /* Snapshot button */
569 char snapshot_button_path[30]; /* path of the input dev */
570 struct input_dev *sbutton_input_dev;
571 struct delayed_work sbutton_query_work;
572
3421b778 573 struct em28xx_dvb *dvb;
a6c2ba28 574};
575
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MCC
576struct em28xx_ops {
577 struct list_head next;
578 char *name;
579 int id;
580 int (*init)(struct em28xx *);
581 int (*fini)(struct em28xx *);
a3a048ce
MCC
582};
583
3acf2809 584/* Provided by em28xx-i2c.c */
fad7b958 585void em28xx_do_i2c_scan(struct em28xx *dev);
f2cf250a
DSL
586int em28xx_i2c_register(struct em28xx *dev);
587int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 588
3acf2809 589/* Provided by em28xx-core.c */
a6c2ba28 590
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MCC
591u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
592void em28xx_queue_unusedframes(struct em28xx *dev);
593void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 594
3acf2809 595int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 596 char *buf, int len);
3acf2809
MCC
597int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
598int em28xx_read_reg(struct em28xx *dev, u16 reg);
599int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 600 int len);
3acf2809 601int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
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DH
602int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
603
531c98e7
MCC
604int em28xx_read_ac97(struct em28xx *dev, u8 reg);
605int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
606
3acf2809 607int em28xx_audio_analog_set(struct em28xx *dev);
35643943 608int em28xx_audio_setup(struct em28xx *dev);
539c96d0 609
3acf2809
MCC
610int em28xx_colorlevels_set_default(struct em28xx *dev);
611int em28xx_capture_start(struct em28xx *dev, int start);
bddcf633 612int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 613int em28xx_resolution_set(struct em28xx *dev);
3acf2809 614int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT
615int em28xx_init_isoc(struct em28xx *dev, int max_packets,
616 int num_bufs, int max_pkt_size,
c67ec53f 617 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 618void em28xx_uninit_isoc(struct em28xx *dev);
d18e2fda 619int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev);
c67ec53f
MCC
620int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
621int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b
MCC
622void em28xx_wake_i2c(struct em28xx *dev);
623void em28xx_remove_from_devlist(struct em28xx *dev);
624void em28xx_add_into_devlist(struct em28xx *dev);
bec43661 625struct em28xx *em28xx_get_device(int minor,
1a23f81b
MCC
626 enum v4l2_buf_type *fh_type,
627 int *has_radio);
6d79468d
MCC
628int em28xx_register_extension(struct em28xx_ops *dev);
629void em28xx_unregister_extension(struct em28xx_ops *dev);
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MCC
630void em28xx_init_extension(struct em28xx *dev);
631void em28xx_close_extension(struct em28xx *dev);
632
633/* Provided by em28xx-video.c */
1a23f81b
MCC
634int em28xx_register_analog_devices(struct em28xx *dev);
635void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 636
3acf2809 637/* Provided by em28xx-cards.c */
6ea54d93 638extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 639extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC
640extern void em28xx_card_setup(struct em28xx *dev);
641extern struct em28xx_board em28xx_boards[];
642extern struct usb_device_id em28xx_id_table[];
643extern const unsigned int em28xx_bcount;
c8793b03 644void em28xx_set_ir(struct em28xx *dev, struct IR_i2c *ir);
d7cba043 645int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 646void em28xx_release_resources(struct em28xx *dev);
c8793b03
MCC
647
648/* Provided by em28xx-input.c */
c8793b03
MCC
649int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
650int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
651int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
652 u32 *ir_raw);
a9fc52bc
DH
653void em28xx_register_snapshot_button(struct em28xx *dev);
654void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 655
a924a499
MCC
656int em28xx_ir_init(struct em28xx *dev);
657int em28xx_ir_fini(struct em28xx *dev);
658
a6c2ba28 659/* printk macros */
660
3acf2809 661#define em28xx_err(fmt, arg...) do {\
f85c657f 662 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 663
3acf2809 664#define em28xx_errdev(fmt, arg...) do {\
4ac97914 665 printk(KERN_ERR "%s: "fmt,\
f85c657f 666 dev->name , ##arg); } while (0)
a6c2ba28 667
3acf2809 668#define em28xx_info(fmt, arg...) do {\
4ac97914 669 printk(KERN_INFO "%s: "fmt,\
f85c657f 670 dev->name , ##arg); } while (0)
3acf2809 671#define em28xx_warn(fmt, arg...) do {\
4ac97914 672 printk(KERN_WARNING "%s: "fmt,\
f85c657f 673 dev->name , ##arg); } while (0)
a6c2ba28 674
6ea54d93 675static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 676{
677 /* side effect of disabling scaler and mixer */
2a29a0d7 678 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 679}
680
6ea54d93 681static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 682{
41facaa4 683 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 684}
685
6ea54d93 686static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 687{
41facaa4 688 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 689}
690
6ea54d93 691static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 692{
41facaa4 693 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 694}
695
6ea54d93 696static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 697{
41facaa4 698 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 699}
700
6ea54d93 701static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 702{
41facaa4 703 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 704}
705
6ea54d93 706static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 707{
41facaa4 708 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 709}
710
6ea54d93 711static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 712{
713 u8 tmp = (u8) val;
41facaa4 714 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 715}
716
6ea54d93 717static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 718{
719 u8 tmp = (u8) val;
41facaa4 720 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 721}
722
6ea54d93 723static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 724{
725 u8 tmp = (u8) val;
41facaa4 726 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 727}
728
6ea54d93 729static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 730{
731 u8 tmp = (u8) val;
41facaa4 732 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 733}
734
6ea54d93 735static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 736{
737 u8 tmp = (u8) val;
41facaa4 738 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 739}
740
6ea54d93 741static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 742{
743 u8 tmp = (u8) val;
41facaa4 744 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 745}
746
747/*FIXME: maxw should be dependent of alt mode */
6ea54d93 748static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 749{
505b6d0b 750 if (dev->board.max_range_640_480)
7d497f8a 751 return 640;
c8793b03 752 else
7d497f8a 753 return 720;
30556b23
MR
754}
755
6ea54d93 756static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 757{
505b6d0b 758 if (dev->board.max_range_640_480)
7d497f8a 759 return 480;
c8793b03 760 else
7d497f8a 761 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 762}
a6c2ba28 763#endif