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V4L/DVB (12449): adds webcam for Micron device MT9M111 0x143A to em28xx
[mirror_ubuntu-zesty-kernel.git] / drivers / media / video / em28xx / em28xx.h
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a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
a6c2ba28 7
8 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
3acf2809
MCC
25#ifndef _EM28XX_H
26#define _EM28XX_H
a6c2ba28 27
cb77d010 28#include <linux/videodev2.h>
ad0ebb96 29#include <media/videobuf-vmalloc.h>
f2cf250a 30#include <media/v4l2-device.h>
ad0ebb96 31
a6c2ba28 32#include <linux/i2c.h>
3593cab5 33#include <linux/mutex.h>
d5e52653 34#include <media/ir-kbd-i2c.h>
3aefb79a
MCC
35#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
36#include <media/videobuf-dvb.h>
37#endif
3ca9c093 38#include "tuner-xc2028.h"
2ba890ec 39#include "em28xx-reg.h"
3aefb79a
MCC
40
41/* Boards supported by driver */
42#define EM2800_BOARD_UNKNOWN 0
43#define EM2820_BOARD_UNKNOWN 1
44#define EM2820_BOARD_TERRATEC_CINERGY_250 2
45#define EM2820_BOARD_PINNACLE_USB_2 3
46#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
47#define EM2820_BOARD_MSI_VOX_USB_2 5
48#define EM2800_BOARD_TERRATEC_CINERGY_200 6
49#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
50#define EM2800_BOARD_KWORLD_USB2800 8
51#define EM2820_BOARD_PINNACLE_DVC_90 9
52#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
53#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
54#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
55#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
56#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
57#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 58#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 59#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 60#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
3ed58baf 61#define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19
e14b3658 62#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 63#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL
64#define EM2750_BOARD_UNKNOWN 22
65#define EM2750_BOARD_DLCW_130 23
66#define EM2820_BOARD_DLINK_USB_TV 24
67#define EM2820_BOARD_GADMEI_UTV310 25
68#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
69#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
70#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
95b86a9a
DSL
71#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
72#define EM2821_BOARD_USBGEAR_VD204 31
73#define EM2821_BOARD_SUPERCOMP_USB_2 32
95b86a9a
DSL
74#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
75#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
76#define EM2860_BOARD_NETGMBH_CAM 36
77#define EM2860_BOARD_GADMEI_UTV330 37
78#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
79#define EM2861_BOARD_KWORLD_PVRTV_300U 39
80#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
81#define EM2870_BOARD_KWORLD_350U 41
82#define EM2870_BOARD_KWORLD_355U 42
83#define EM2870_BOARD_TERRATEC_XS 43
84#define EM2870_BOARD_TERRATEC_XS_MT2060 44
85#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
86#define EM2870_BOARD_COMPRO_VIDEOMATE 46
87#define EM2880_BOARD_KWORLD_DVB_305U 47
88#define EM2880_BOARD_KWORLD_DVB_310U 48
89#define EM2880_BOARD_MSI_DIGIVOX_AD 49
90#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
91#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
92#define EM2881_BOARD_DNT_DA2_HYBRID 52
93#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
94#define EM2882_BOARD_KWORLD_VS_DVBT 54
95#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
96#define EM2882_BOARD_PINNACLE_HYBRID_PRO 56
6e7b9ea0 97#define EM2883_BOARD_KWORLD_HYBRID_330U 57
ee281b85 98#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 99#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 100#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
f7fe3e6f 101#define EM2820_BOARD_GADMEI_TVR200 62
56ee3807
MCC
102#define EM2860_BOARD_KAIOMY_TVNPC_U2 63
103#define EM2860_BOARD_EASYCAP 64
f74a61e3 104#define EM2820_BOARD_IODATA_GVMVP_SZ 65
e5db5d44 105#define EM2880_BOARD_EMPIRE_DUAL_TV 66
4557af9c 106#define EM2860_BOARD_TERRATEC_GRABBY 67
766ed64d 107#define EM2860_BOARD_TERRATEC_AV350 68
d7de5d8f 108#define EM2882_BOARD_KWORLD_ATSC_315U 69
19859229 109#define EM2882_BOARD_EVGA_INDTUBE 70
02e7804b 110#define EM2820_BOARD_SILVERCREST_WEBCAM 71
3aefb79a
MCC
111
112/* Limits minimum and default number of buffers */
113#define EM28XX_MIN_BUF 4
114#define EM28XX_DEF_BUF 8
a6c2ba28 115
c4a98793
MCC
116/*Limits the max URB message size */
117#define URB_MAX_CTRL_SIZE 80
118
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DSL
119/* Params for validated field */
120#define EM28XX_BOARD_NOT_VALIDATED 1
121#define EM28XX_BOARD_VALIDATED 0
122
22cff7b3
DSL
123/* Params for em28xx_cmd() audio */
124#define EM28XX_START_AUDIO 1
125#define EM28XX_STOP_AUDIO 0
126
596d92d5 127/* maximum number of em28xx boards */
3687e1e6 128#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 129
a6c2ba28 130/* maximum number of frames that can be queued */
3acf2809 131#define EM28XX_NUM_FRAMES 5
a6c2ba28 132/* number of frames that get used for v4l2_read() */
3acf2809 133#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 134
135/* number of buffers for isoc transfers */
3acf2809 136#define EM28XX_NUM_BUFS 5
a6c2ba28 137
d5e52653
MCC
138/* number of packets for each buffer
139 windows requests only 40 packets .. so we better do the same
140 this is what I found out for all alternate numbers there!
141 */
3acf2809 142#define EM28XX_NUM_PACKETS 40
a6c2ba28 143
a6c2ba28 144/* default alternate; 0 means choose the best */
3acf2809 145#define EM28XX_PINOUT 0
a6c2ba28 146
3acf2809 147#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 148
149/*
150#define (use usbview if you want to get the other alternate number infos)
151#define
152#define alternate number 2
153#define Endpoint Address: 82
154 Direction: in
155 Attribute: 1
156 Type: Isoc
157 Max Packet Size: 1448
158 Interval: 125us
159
160 alternate number 7
161
162 Endpoint Address: 82
163 Direction: in
164 Attribute: 1
165 Type: Isoc
166 Max Packet Size: 3072
167 Interval: 125us
168*/
169
170/* time to wait when stopping the isoc transfer */
a1a6ee74
NS
171#define EM28XX_URB_TIMEOUT \
172 msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS)
a6c2ba28 173
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MCC
174/* time in msecs to wait for i2c writes to finish */
175#define EM2800_I2C_WRITE_TIMEOUT 20
176
3aefb79a 177enum em28xx_mode {
2fe3e2ee 178 EM28XX_SUSPEND,
3aefb79a
MCC
179 EM28XX_ANALOG_MODE,
180 EM28XX_DIGITAL_MODE,
181};
182
3acf2809 183enum em28xx_stream_state {
a6c2ba28 184 STREAM_OFF,
185 STREAM_INTERRUPT,
186 STREAM_ON,
187};
188
579f72e4
AT
189struct em28xx;
190
ad0ebb96
MCC
191struct em28xx_usb_isoc_ctl {
192 /* max packet size of isoc transaction */
193 int max_pkt_size;
194
195 /* number of allocated urbs */
196 int num_bufs;
197
198 /* urb for isoc transfers */
199 struct urb **urb;
200
201 /* transfer buffers for isoc transfer */
202 char **transfer_buffer;
203
204 /* Last buffer command and region */
205 u8 cmd;
206 int pos, size, pktsize;
207
208 /* Last field: ODD or EVEN? */
209 int field;
210
211 /* Stores incomplete commands */
212 u32 tmp_buf;
213 int tmp_buf_len;
214
215 /* Stores already requested buffers */
216 struct em28xx_buffer *buf;
217
218 /* Stores the number of received fields */
219 int nfields;
579f72e4
AT
220
221 /* isoc urb callback */
222 int (*isoc_copy) (struct em28xx *dev, struct urb *urb);
223
ad0ebb96
MCC
224};
225
bddcf633 226/* Struct to enumberate video formats */
ad0ebb96
MCC
227struct em28xx_fmt {
228 char *name;
229 u32 fourcc; /* v4l2 format id */
bddcf633
MCC
230 int depth;
231 int reg;
ad0ebb96
MCC
232};
233
234/* buffer for one video frame */
235struct em28xx_buffer {
236 /* common v4l buffer stuff -- must be first */
237 struct videobuf_buffer vb;
238
a6c2ba28 239 struct list_head frame;
a6c2ba28 240 int top_field;
ad0ebb96
MCC
241 int receiving;
242};
243
244struct em28xx_dmaqueue {
245 struct list_head active;
246 struct list_head queued;
ad0ebb96
MCC
247
248 wait_queue_head_t wq;
249
250 /* Counters to control buffer fill */
251 int pos;
a6c2ba28 252};
253
254/* io methods */
3acf2809 255enum em28xx_io_method {
a6c2ba28 256 IO_NONE,
257 IO_READ,
258 IO_MMAP,
259};
260
261/* inputs */
262
3acf2809
MCC
263#define MAX_EM28XX_INPUT 4
264enum enum28xx_itype {
265 EM28XX_VMUX_COMPOSITE1 = 1,
266 EM28XX_VMUX_COMPOSITE2,
267 EM28XX_VMUX_COMPOSITE3,
268 EM28XX_VMUX_COMPOSITE4,
269 EM28XX_VMUX_SVIDEO,
270 EM28XX_VMUX_TELEVISION,
271 EM28XX_VMUX_CABLE,
272 EM28XX_VMUX_DVB,
273 EM28XX_VMUX_DEBUG,
274 EM28XX_RADIO,
a6c2ba28 275};
276
35643943
MCC
277enum em28xx_ac97_mode {
278 EM28XX_NO_AC97 = 0,
279 EM28XX_AC97_EM202,
209acc02 280 EM28XX_AC97_SIGMATEL,
35643943
MCC
281 EM28XX_AC97_OTHER,
282};
283
284struct em28xx_audio_mode {
285 enum em28xx_ac97_mode ac97;
286
287 u16 ac97_feat;
16c7bcad 288 u32 ac97_vendor_id;
35643943
MCC
289
290 unsigned int has_audio:1;
291
292 unsigned int i2s_3rates:1;
293 unsigned int i2s_5rates:1;
5c2231c8
DH
294};
295
5faff789
MCC
296/* em28xx has two audio inputs: tuner and line in.
297 However, on most devices, an auxiliary AC97 codec device is used.
298 The AC97 device may have several different inputs and outputs,
299 depending on their model. So, it is possible to use AC97 mixer to
300 address more than two different entries.
301 */
539c96d0 302enum em28xx_amux {
5faff789
MCC
303 /* This is the only entry for em28xx tuner input */
304 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
305
306 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
307
308 /* Some less-common mixer setups */
309 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
310 EM28XX_AMUX_PHONE,
311 EM28XX_AMUX_MIC,
312 EM28XX_AMUX_CD,
313 EM28XX_AMUX_AUX,
314 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC
315};
316
35ae6f04 317enum em28xx_aout {
8866f9cf 318 /* AC97 outputs */
e879b8eb
MCC
319 EM28XX_AOUT_MASTER = 1 << 0,
320 EM28XX_AOUT_LINE = 1 << 1,
321 EM28XX_AOUT_MONO = 1 << 2,
322 EM28XX_AOUT_LFE = 1 << 3,
323 EM28XX_AOUT_SURR = 1 << 4,
8866f9cf
MCC
324
325 /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
326 EM28XX_AOUT_PCM_IN = 1 << 7,
327
328 /* Bits 10-8 are used to indicate the PCM IN record select */
329 EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
330 EM28XX_AOUT_PCM_CD = 1 << 8,
331 EM28XX_AOUT_PCM_VIDEO = 2 << 8,
332 EM28XX_AOUT_PCM_AUX = 3 << 8,
333 EM28XX_AOUT_PCM_LINE = 4 << 8,
334 EM28XX_AOUT_PCM_STEREO = 5 << 8,
335 EM28XX_AOUT_PCM_MONO = 6 << 8,
336 EM28XX_AOUT_PCM_PHONE = 7 << 8,
35ae6f04
MCC
337};
338
32929fb4 339static inline int ac97_return_record_select(int a_out)
8866f9cf
MCC
340{
341 return (a_out & 0x700) >> 8;
342}
343
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MCC
344struct em28xx_reg_seq {
345 int reg;
346 unsigned char val, mask;
347 int sleep;
348};
349
3acf2809
MCC
350struct em28xx_input {
351 enum enum28xx_itype type;
a6c2ba28 352 unsigned int vmux;
539c96d0 353 enum em28xx_amux amux;
35ae6f04 354 enum em28xx_aout aout;
122b77e5 355 struct em28xx_reg_seq *gpio;
a6c2ba28 356};
357
3acf2809 358#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 359
3acf2809 360enum em28xx_decoder {
527f09a9 361 EM28XX_NODECODER = 0,
3acf2809 362 EM28XX_TVP5150,
ec5de990 363 EM28XX_SAA711X,
527f09a9
MCC
364};
365
366enum em28xx_sensor {
367 EM28XX_NOSENSOR = 0,
02e7804b 368 EM28XX_MT9V011,
b80fd2d8 369 EM28XX_MT9M001,
f2e26ae7 370 EM28XX_MT9M111,
a6c2ba28 371};
372
df7fa09c
MCC
373enum em28xx_adecoder {
374 EM28XX_NOADECODER = 0,
375 EM28XX_TVAUDIO,
376};
377
3acf2809 378struct em28xx_board {
a6c2ba28 379 char *name;
505b6d0b 380 int vchannels;
a6c2ba28 381 int tuner_type;
66767920 382 int tuner_addr;
a6c2ba28 383
384 /* i2c flags */
385 unsigned int tda9887_conf;
386
017ab4b1 387 /* GPIO sequences */
122b77e5 388 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 389 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 390 struct em28xx_reg_seq *tuner_gpio;
2bd1d9eb 391 struct em28xx_reg_seq *mute_gpio;
122b77e5 392
74f38a82 393 unsigned int is_em2800:1;
a6c2ba28 394 unsigned int has_msp34xx:1;
5add9a6f 395 unsigned int mts_firmware:1;
c8793b03 396 unsigned int max_range_640_480:1;
3aefb79a 397 unsigned int has_dvb:1;
a9fc52bc 398 unsigned int has_snapshot_button:1;
c43221df 399 unsigned int is_webcam:1;
95b86a9a 400 unsigned int valid:1;
3abee53e 401
a2070c66 402 unsigned char xclk, i2c_speed;
f2cf250a
DSL
403 unsigned char radio_addr;
404 unsigned short tvaudio_addr;
a2070c66 405
3acf2809 406 enum em28xx_decoder decoder;
df7fa09c 407 enum em28xx_adecoder adecoder;
a6c2ba28 408
3acf2809 409 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 410 struct em28xx_input radio;
4b92253a 411 IR_KEYTAB_TYPE *ir_codes;
a6c2ba28 412};
413
3acf2809 414struct em28xx_eeprom {
a6c2ba28 415 u32 id; /* 0x9567eb1a */
416 u16 vendor_ID;
417 u16 product_ID;
418
419 u16 chip_conf;
420
421 u16 board_conf;
422
423 u16 string1, string2, string3;
424
425 u8 string_idx_table;
426};
427
428/* device states */
3acf2809 429enum em28xx_dev_state {
a6c2ba28 430 DEV_INITIALIZED = 0x01,
431 DEV_DISCONNECTED = 0x02,
432 DEV_MISCONFIGURED = 0x04,
433};
434
6d79468d
MCC
435#define EM28XX_AUDIO_BUFS 5
436#define EM28XX_NUM_AUDIO_PACKETS 64
437#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
438#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC
439
440/* em28xx extensions */
6d79468d 441#define EM28XX_AUDIO 0x10
3aefb79a 442#define EM28XX_DVB 0x20
6d79468d
MCC
443
444struct em28xx_audio {
445 char name[50];
446 char *transfer_buffer[EM28XX_AUDIO_BUFS];
447 struct urb *urb[EM28XX_AUDIO_BUFS];
448 struct usb_device *udev;
449 unsigned int capture_transfer_done;
450 struct snd_pcm_substream *capture_pcm_substream;
451
452 unsigned int hwptr_done_capture;
453 struct snd_card *sndcard;
454
c744dff2 455 int users;
6d79468d
MCC
456 enum em28xx_stream_state capture_stream;
457 spinlock_t slock;
458};
459
52284c3e
MCC
460struct em28xx;
461
462struct em28xx_fh {
463 struct em28xx *dev;
464 unsigned int stream_on:1; /* Locks streams */
465 int radio;
466
467 struct videobuf_queue vb_vidq;
468
469 enum v4l2_buf_type type;
470};
471
a6c2ba28 472/* main device struct */
3acf2809 473struct em28xx {
a6c2ba28 474 /* generic device properties */
475 char name[30]; /* name (including minor) of the device */
476 int model; /* index in the device_data struct */
e5589bef 477 int devno; /* marks the number of this device */
600bd7f0 478 enum em28xx_chip_id chip_id;
505b6d0b 479
f2cf250a 480 struct v4l2_device v4l2_dev;
505b6d0b
MCC
481 struct em28xx_board board;
482
d36bb4e7 483 /* Webcam specific fields */
527f09a9 484 enum em28xx_sensor em28xx_sensor;
55699964 485 int sensor_xres, sensor_yres;
d36bb4e7 486 int sensor_xtal;
527f09a9 487
c2a6b54a
MCC
488 /* Allows progressive (e. g. non-interlaced) mode */
489 int progressive;
490
579d3152
MCC
491 /* Vinmode/Vinctl used at the driver */
492 int vinmode, vinctl;
493
a225452e 494 unsigned int stream_on:1; /* Locks streams */
d7448a8d 495 unsigned int has_audio_class:1;
24a613e4 496 unsigned int has_alsa_audio:1;
a2070c66 497
bddcf633
MCC
498 struct em28xx_fmt *format;
499
a924a499
MCC
500 struct em28xx_IR *ir;
501
89b329ef
MCC
502 /* Some older em28xx chips needs a waiting time after writing */
503 unsigned int wait_after_write;
504
74f38a82
MCC
505 struct list_head devlist;
506
9bb13a6d
MCC
507 u32 i2s_speed; /* I2S speed for audio digital stream */
508
35643943 509 struct em28xx_audio_mode audio_mode;
a6c2ba28 510
511 int tuner_type; /* type of the tuner */
512 int tuner_addr; /* tuner address */
513 int tda9887_conf;
514 /* i2c i/o */
515 struct i2c_adapter i2c_adap;
516 struct i2c_client i2c_client;
517 /* video for linux */
518 int users; /* user count for exclusive use */
519 struct video_device *vdev; /* video for linux device struct */
7d497f8a 520 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 521 int ctl_freq; /* selected frequency */
522 unsigned int ctl_input; /* selected input */
95b86a9a 523 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 524 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 525 int mute;
526 int volume;
527 /* frame properties */
a6c2ba28 528 int width; /* current frame width */
529 int height; /* current frame height */
d45b9b8a
HV
530 unsigned hscale; /* horizontal scale factor (see datasheet) */
531 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 532 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 533 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 534
03910cc3 535 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL
536 unsigned long i2c_hash; /* i2c devicelist hash -
537 for boards with generic ID */
03910cc3 538
9baed99e 539 struct em28xx_audio adev;
6d79468d 540
a6c2ba28 541 /* states */
3acf2809 542 enum em28xx_dev_state state;
3acf2809 543 enum em28xx_io_method io;
9e31ced8 544
d7448a8d
MCC
545 struct work_struct request_module_wk;
546
a6c2ba28 547 /* locks */
5a80415b 548 struct mutex lock;
f2a2e491 549 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 550 /* spinlock_t queue_lock; */
a6c2ba28 551 struct list_head inqueue, outqueue;
552 wait_queue_head_t open, wait_frame, wait_stream;
553 struct video_device *vbi_dev;
0be43754 554 struct video_device *radio_dev;
a6c2ba28 555
556 unsigned char eedata[256];
557
ad0ebb96
MCC
558 /* Isoc control struct */
559 struct em28xx_dmaqueue vidq;
560 struct em28xx_usb_isoc_ctl isoc_ctl;
561 spinlock_t slock;
562
a6c2ba28 563 /* usb transfer */
564 struct usb_device *udev; /* the usb device */
565 int alt; /* alternate */
566 int max_pkt_size; /* max packet size of isoc transaction */
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MCC
567 int num_alt; /* Number of alternative settings */
568 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
3acf2809 569 struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */
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NS
570 char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc
571 transfer */
c4a98793
MCC
572 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
573
a6c2ba28 574 /* helper funcs that call usb_control_msg */
6ea54d93 575 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 576 char *buf, int len);
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DSL
577 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
578 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
579 char *buf, int len);
580 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 581 char *buf, int len);
6ea54d93 582 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
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MCC
583
584 enum em28xx_mode mode;
585
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DH
586 /* register numbers for GPO/GPIO registers */
587 u16 reg_gpo_num, reg_gpio_num;
588
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MCC
589 /* Caches GPO and GPIO registers */
590 unsigned char reg_gpo, reg_gpio;
591
a9fc52bc
DH
592 /* Snapshot button */
593 char snapshot_button_path[30]; /* path of the input dev */
594 struct input_dev *sbutton_input_dev;
595 struct delayed_work sbutton_query_work;
596
3421b778 597 struct em28xx_dvb *dvb;
a6c2ba28 598};
599
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MCC
600struct em28xx_ops {
601 struct list_head next;
602 char *name;
603 int id;
604 int (*init)(struct em28xx *);
605 int (*fini)(struct em28xx *);
a3a048ce
MCC
606};
607
3acf2809 608/* Provided by em28xx-i2c.c */
fad7b958 609void em28xx_do_i2c_scan(struct em28xx *dev);
f2cf250a
DSL
610int em28xx_i2c_register(struct em28xx *dev);
611int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 612
3acf2809 613/* Provided by em28xx-core.c */
a6c2ba28 614
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MCC
615u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
616void em28xx_queue_unusedframes(struct em28xx *dev);
617void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 618
3acf2809 619int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 620 char *buf, int len);
3acf2809
MCC
621int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
622int em28xx_read_reg(struct em28xx *dev, u16 reg);
623int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 624 int len);
3acf2809 625int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
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DH
626int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
627
531c98e7
MCC
628int em28xx_read_ac97(struct em28xx *dev, u8 reg);
629int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
630
3acf2809 631int em28xx_audio_analog_set(struct em28xx *dev);
35643943 632int em28xx_audio_setup(struct em28xx *dev);
539c96d0 633
3acf2809
MCC
634int em28xx_colorlevels_set_default(struct em28xx *dev);
635int em28xx_capture_start(struct em28xx *dev, int start);
bddcf633 636int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 637int em28xx_resolution_set(struct em28xx *dev);
3acf2809 638int em28xx_set_alternate(struct em28xx *dev);
579f72e4
AT
639int em28xx_init_isoc(struct em28xx *dev, int max_packets,
640 int num_bufs, int max_pkt_size,
c67ec53f 641 int (*isoc_copy) (struct em28xx *dev, struct urb *urb));
579f72e4 642void em28xx_uninit_isoc(struct em28xx *dev);
d18e2fda 643int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev);
c67ec53f
MCC
644int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
645int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b
MCC
646void em28xx_wake_i2c(struct em28xx *dev);
647void em28xx_remove_from_devlist(struct em28xx *dev);
648void em28xx_add_into_devlist(struct em28xx *dev);
bec43661 649struct em28xx *em28xx_get_device(int minor,
1a23f81b
MCC
650 enum v4l2_buf_type *fh_type,
651 int *has_radio);
6d79468d
MCC
652int em28xx_register_extension(struct em28xx_ops *dev);
653void em28xx_unregister_extension(struct em28xx_ops *dev);
1a23f81b
MCC
654void em28xx_init_extension(struct em28xx *dev);
655void em28xx_close_extension(struct em28xx *dev);
656
657/* Provided by em28xx-video.c */
1a23f81b
MCC
658int em28xx_register_analog_devices(struct em28xx *dev);
659void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 660
3acf2809 661/* Provided by em28xx-cards.c */
6ea54d93 662extern int em2800_variant_detect(struct usb_device *udev, int model);
a94e95b4 663extern void em28xx_pre_card_setup(struct em28xx *dev);
3acf2809
MCC
664extern void em28xx_card_setup(struct em28xx *dev);
665extern struct em28xx_board em28xx_boards[];
666extern struct usb_device_id em28xx_id_table[];
667extern const unsigned int em28xx_bcount;
c668f32d 668void em28xx_register_i2c_ir(struct em28xx *dev);
d7cba043 669int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 670void em28xx_release_resources(struct em28xx *dev);
c8793b03
MCC
671
672/* Provided by em28xx-input.c */
c8793b03
MCC
673int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
674int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
675int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key,
676 u32 *ir_raw);
a9fc52bc
DH
677void em28xx_register_snapshot_button(struct em28xx *dev);
678void em28xx_deregister_snapshot_button(struct em28xx *dev);
a6c2ba28 679
a924a499
MCC
680int em28xx_ir_init(struct em28xx *dev);
681int em28xx_ir_fini(struct em28xx *dev);
682
a6c2ba28 683/* printk macros */
684
3acf2809 685#define em28xx_err(fmt, arg...) do {\
f85c657f 686 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 687
3acf2809 688#define em28xx_errdev(fmt, arg...) do {\
4ac97914 689 printk(KERN_ERR "%s: "fmt,\
f85c657f 690 dev->name , ##arg); } while (0)
a6c2ba28 691
3acf2809 692#define em28xx_info(fmt, arg...) do {\
4ac97914 693 printk(KERN_INFO "%s: "fmt,\
f85c657f 694 dev->name , ##arg); } while (0)
3acf2809 695#define em28xx_warn(fmt, arg...) do {\
4ac97914 696 printk(KERN_WARNING "%s: "fmt,\
f85c657f 697 dev->name , ##arg); } while (0)
a6c2ba28 698
6ea54d93 699static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 700{
701 /* side effect of disabling scaler and mixer */
2a29a0d7 702 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 703}
704
6ea54d93 705static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 706{
41facaa4 707 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 708}
709
6ea54d93 710static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 711{
41facaa4 712 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 713}
714
6ea54d93 715static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 716{
41facaa4 717 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 718}
719
6ea54d93 720static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 721{
41facaa4 722 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 723}
724
6ea54d93 725static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 726{
41facaa4 727 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 728}
729
6ea54d93 730static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 731{
41facaa4 732 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 733}
734
6ea54d93 735static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 736{
737 u8 tmp = (u8) val;
41facaa4 738 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 739}
740
6ea54d93 741static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 742{
743 u8 tmp = (u8) val;
41facaa4 744 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 745}
746
6ea54d93 747static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 748{
749 u8 tmp = (u8) val;
41facaa4 750 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 751}
752
6ea54d93 753static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 754{
755 u8 tmp = (u8) val;
41facaa4 756 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 757}
758
6ea54d93 759static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 760{
761 u8 tmp = (u8) val;
41facaa4 762 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 763}
764
6ea54d93 765static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 766{
767 u8 tmp = (u8) val;
41facaa4 768 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 769}
770
771/*FIXME: maxw should be dependent of alt mode */
6ea54d93 772static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 773{
55699964
MCC
774 if (dev->board.is_webcam)
775 return dev->sensor_xres;
776
505b6d0b 777 if (dev->board.max_range_640_480)
7d497f8a 778 return 640;
55699964
MCC
779
780 return 720;
30556b23
MR
781}
782
6ea54d93 783static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 784{
55699964
MCC
785 if (dev->board.is_webcam)
786 return dev->sensor_yres;
787
505b6d0b 788 if (dev->board.max_range_640_480)
7d497f8a 789 return 480;
55699964
MCC
790
791 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 792}
a6c2ba28 793#endif