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V4L/DVB (12072): gspca-ov519: add extra controls
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / gspca / ov519.c
CommitLineData
6a7eba24
JFM		 1/**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 *
2961e875
RB		 6 * This module is adapted from the ov51x-jpeg package, which itself
7 * was adapted from the ov511 driver.
8 *
9 * Original copyright for the ov511 driver is:
10 *
11 * Copyright (c) 1999-2004 Mark W. McClelland
12 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
13 *
14 * ov51x-jpeg original copyright is:
15 *
16 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
17 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
6a7eba24
JFM		 18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 *
33 */
34#define MODULE_NAME "ov519"
35
36#include "gspca.h"
37
6a7eba24
JFM		 38MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
39MODULE_DESCRIPTION("OV519 USB Camera Driver");
40MODULE_LICENSE("GPL");
41
42/* global parameters */
43static int frame_rate;
44
45/* Number of times to retry a failed I2C transaction. Increase this if you
46 * are getting "Failed to read sensor ID..." */
47static int i2c_detect_tries = 10;
48
49/* ov519 device descriptor */
50struct sd {
51 struct gspca_dev gspca_dev; /* !! must be the first item */
52
49809d6a
HG		 53 char bridge;
54#define BRIDGE_OV511 0
55#define BRIDGE_OV511PLUS 1
56#define BRIDGE_OV518 2
57#define BRIDGE_OV518PLUS 3
58#define BRIDGE_OV519 4
59
6a7eba24 60 /* Determined by sensor type */
ac40b1fa 61 __u8 sif;
6a7eba24 62
ac40b1fa
JFM		 63 __u8 brightness;
64 __u8 contrast;
65 __u8 colors;
0cd6759d
JFM		 66 __u8 hflip;
67 __u8 vflip;
02ab18b0
HG		 68 __u8 autobrightness;
69 __u8 freq;
6a7eba24 70
ac40b1fa 71 __u8 stopped; /* Streaming is temporarily paused */
6a7eba24 72
ac40b1fa
JFM		 73 __u8 frame_rate; /* current Framerate (OV519 only) */
74 __u8 clockdiv; /* clockdiv override for OV519 only */
6a7eba24
JFM		 75
76 char sensor; /* Type of image sensor chip (SEN_*) */
77#define SEN_UNKNOWN 0
78#define SEN_OV6620 1
79#define SEN_OV6630 2
80#define SEN_OV7610 3
81#define SEN_OV7620 4
4202f71c
JFM		 82#define SEN_OV7640 5
83#define SEN_OV7670 6
84#define SEN_OV76BE 7
85#define SEN_OV8610 8
6a7eba24
JFM		 86};
87
88/* V4L2 controls supported by the driver */
89static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
90static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
91static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
92static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
93static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
94static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
0cd6759d
JFM		 95static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
96static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
97static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
98static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
02ab18b0
HG		 99static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
100static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
101static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
102static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
49809d6a
HG		 103static void setbrightness(struct gspca_dev *gspca_dev);
104static void setcontrast(struct gspca_dev *gspca_dev);
105static void setcolors(struct gspca_dev *gspca_dev);
02ab18b0
HG		 106static void setautobrightness(struct sd *sd);
107static void setfreq(struct sd *sd);
6a7eba24 108
02ab18b0 109static const struct ctrl sd_ctrls[] = {
6a7eba24
JFM		 110 {
111 {
112 .id = V4L2_CID_BRIGHTNESS,
113 .type = V4L2_CTRL_TYPE_INTEGER,
114 .name = "Brightness",
115 .minimum = 0,
116 .maximum = 255,
117 .step = 1,
594f5b8b
JFM		 118#define BRIGHTNESS_DEF 127
119 .default_value = BRIGHTNESS_DEF,
6a7eba24
JFM		 120 },
121 .set = sd_setbrightness,
122 .get = sd_getbrightness,
123 },
6a7eba24
JFM		 124 {
125 {
126 .id = V4L2_CID_CONTRAST,
127 .type = V4L2_CTRL_TYPE_INTEGER,
128 .name = "Contrast",
129 .minimum = 0,
130 .maximum = 255,
131 .step = 1,
594f5b8b
JFM		 132#define CONTRAST_DEF 127
133 .default_value = CONTRAST_DEF,
6a7eba24
JFM		 134 },
135 .set = sd_setcontrast,
136 .get = sd_getcontrast,
137 },
6a7eba24
JFM		 138 {
139 {
140 .id = V4L2_CID_SATURATION,
141 .type = V4L2_CTRL_TYPE_INTEGER,
594f5b8b 142 .name = "Color",
6a7eba24
JFM		 143 .minimum = 0,
144 .maximum = 255,
145 .step = 1,
594f5b8b
JFM		 146#define COLOR_DEF 127
147 .default_value = COLOR_DEF,
6a7eba24
JFM		 148 },
149 .set = sd_setcolors,
150 .get = sd_getcolors,
151 },
02ab18b0 152/* The flip controls work with ov7670 only */
de00448f 153#define HFLIP_IDX 3
0cd6759d
JFM		 154 {
155 {
156 .id = V4L2_CID_HFLIP,
157 .type = V4L2_CTRL_TYPE_BOOLEAN,
158 .name = "Mirror",
159 .minimum = 0,
160 .maximum = 1,
161 .step = 1,
162#define HFLIP_DEF 0
163 .default_value = HFLIP_DEF,
164 },
165 .set = sd_sethflip,
166 .get = sd_gethflip,
167 },
de00448f 168#define VFLIP_IDX 4
0cd6759d
JFM		 169 {
170 {
171 .id = V4L2_CID_VFLIP,
172 .type = V4L2_CTRL_TYPE_BOOLEAN,
173 .name = "Vflip",
174 .minimum = 0,
175 .maximum = 1,
176 .step = 1,
177#define VFLIP_DEF 0
178 .default_value = VFLIP_DEF,
179 },
180 .set = sd_setvflip,
181 .get = sd_getvflip,
182 },
02ab18b0
HG		 183#define AUTOBRIGHT_IDX 5
184 {
185 {
186 .id = V4L2_CID_AUTOBRIGHTNESS,
187 .type = V4L2_CTRL_TYPE_BOOLEAN,
188 .name = "Auto Brightness",
189 .minimum = 0,
190 .maximum = 1,
191 .step = 1,
192#define AUTOBRIGHT_DEF 1
193 .default_value = AUTOBRIGHT_DEF,
194 },
195 .set = sd_setautobrightness,
196 .get = sd_getautobrightness,
197 },
198#define FREQ_IDX 6
199 {
200 {
201 .id = V4L2_CID_POWER_LINE_FREQUENCY,
202 .type = V4L2_CTRL_TYPE_MENU,
203 .name = "Light frequency filter",
204 .minimum = 0,
205 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
206 .step = 1,
207#define FREQ_DEF 0
208 .default_value = FREQ_DEF,
209 },
210 .set = sd_setfreq,
211 .get = sd_getfreq,
212 },
213#define OV7670_FREQ_IDX 7
214 {
215 {
216 .id = V4L2_CID_POWER_LINE_FREQUENCY,
217 .type = V4L2_CTRL_TYPE_MENU,
218 .name = "Light frequency filter",
219 .minimum = 0,
220 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
221 .step = 1,
222#define OV7670_FREQ_DEF 3
223 .default_value = OV7670_FREQ_DEF,
224 },
225 .set = sd_setfreq,
226 .get = sd_getfreq,
227 },
6a7eba24
JFM		 228};
229
49809d6a 230static const struct v4l2_pix_format ov519_vga_mode[] = {
c2446b3e
JFM		 231 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
232 .bytesperline = 320,
594f5b8b 233 .sizeimage = 320 * 240 * 3 / 8 + 590,
c2446b3e
JFM		 234 .colorspace = V4L2_COLORSPACE_JPEG,
235 .priv = 1},
236 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
237 .bytesperline = 640,
238 .sizeimage = 640 * 480 * 3 / 8 + 590,
239 .colorspace = V4L2_COLORSPACE_JPEG,
240 .priv = 0},
6a7eba24 241};
49809d6a 242static const struct v4l2_pix_format ov519_sif_mode[] = {
c2446b3e
JFM		 243 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
244 .bytesperline = 176,
594f5b8b 245 .sizeimage = 176 * 144 * 3 / 8 + 590,
c2446b3e
JFM		 246 .colorspace = V4L2_COLORSPACE_JPEG,
247 .priv = 1},
248 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
249 .bytesperline = 352,
594f5b8b 250 .sizeimage = 352 * 288 * 3 / 8 + 590,
c2446b3e
JFM		 251 .colorspace = V4L2_COLORSPACE_JPEG,
252 .priv = 0},
6a7eba24
JFM		 253};
254
49809d6a
HG		 255static const struct v4l2_pix_format ov518_vga_mode[] = {
256 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
257 .bytesperline = 320,
258 .sizeimage = 320 * 240 * 3 / 8 + 590,
259 .colorspace = V4L2_COLORSPACE_JPEG,
260 .priv = 1},
261 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
262 .bytesperline = 640,
263 .sizeimage = 640 * 480 * 3 / 8 + 590,
264 .colorspace = V4L2_COLORSPACE_JPEG,
265 .priv = 0},
266};
267static const struct v4l2_pix_format ov518_sif_mode[] = {
268 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
269 .bytesperline = 176,
270 .sizeimage = 40000,
271 .colorspace = V4L2_COLORSPACE_JPEG,
272 .priv = 1},
273 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
274 .bytesperline = 352,
275 .sizeimage = 352 * 288 * 3 / 8 + 590,
276 .colorspace = V4L2_COLORSPACE_JPEG,
277 .priv = 0},
278};
279
280
281/* Registers common to OV511 / OV518 */
282#define R51x_SYS_RESET 0x50
283#define R51x_SYS_INIT 0x53
284#define R51x_SYS_SNAP 0x52
285#define R51x_SYS_CUST_ID 0x5F
286#define R51x_COMP_LUT_BEGIN 0x80
287
288/* OV511 Camera interface register numbers */
289#define R511_SYS_LED_CTL 0x55 /* OV511+ only */
290#define OV511_RESET_NOREGS 0x3F /* All but OV511 & regs */
291
292/* OV518 Camera interface register numbers */
293#define R518_GPIO_OUT 0x56 /* OV518(+) only */
294#define R518_GPIO_CTL 0x57 /* OV518(+) only */
295
6a7eba24 296/* OV519 Camera interface register numbers */
ac40b1fa
JFM		 297#define OV519_R10_H_SIZE 0x10
298#define OV519_R11_V_SIZE 0x11
299#define OV519_R12_X_OFFSETL 0x12
300#define OV519_R13_X_OFFSETH 0x13
301#define OV519_R14_Y_OFFSETL 0x14
302#define OV519_R15_Y_OFFSETH 0x15
303#define OV519_R16_DIVIDER 0x16
304#define OV519_R20_DFR 0x20
305#define OV519_R25_FORMAT 0x25
6a7eba24
JFM		 306
307/* OV519 System Controller register numbers */
308#define OV519_SYS_RESET1 0x51
309#define OV519_SYS_EN_CLK1 0x54
310
311#define OV519_GPIO_DATA_OUT0 0x71
312#define OV519_GPIO_IO_CTRL0 0x72
313
314#define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
315
316/* I2C registers */
317#define R51x_I2C_W_SID 0x41
318#define R51x_I2C_SADDR_3 0x42
319#define R51x_I2C_SADDR_2 0x43
320#define R51x_I2C_R_SID 0x44
321#define R51x_I2C_DATA 0x45
322#define R518_I2C_CTL 0x47 /* OV518(+) only */
323
324/* I2C ADDRESSES */
325#define OV7xx0_SID 0x42
326#define OV8xx0_SID 0xa0
327#define OV6xx0_SID 0xc0
328
329/* OV7610 registers */
330#define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
49809d6a
HG		 331#define OV7610_REG_BLUE 0x01 /* blue channel balance */
332#define OV7610_REG_RED 0x02 /* red channel balance */
6a7eba24
JFM		 333#define OV7610_REG_SAT 0x03 /* saturation */
334#define OV8610_REG_HUE 0x04 /* 04 reserved */
335#define OV7610_REG_CNT 0x05 /* Y contrast */
336#define OV7610_REG_BRT 0x06 /* Y brightness */
337#define OV7610_REG_COM_C 0x14 /* misc common regs */
338#define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
339#define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
340#define OV7610_REG_COM_I 0x29 /* misc settings */
341
342/* OV7670 registers */
343#define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
344#define OV7670_REG_BLUE 0x01 /* blue gain */
345#define OV7670_REG_RED 0x02 /* red gain */
346#define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
347#define OV7670_REG_COM1 0x04 /* Control 1 */
348#define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
349#define OV7670_REG_COM3 0x0c /* Control 3 */
350#define OV7670_REG_COM4 0x0d /* Control 4 */
351#define OV7670_REG_COM5 0x0e /* All "reserved" */
352#define OV7670_REG_COM6 0x0f /* Control 6 */
353#define OV7670_REG_AECH 0x10 /* More bits of AEC value */
354#define OV7670_REG_CLKRC 0x11 /* Clock control */
355#define OV7670_REG_COM7 0x12 /* Control 7 */
356#define OV7670_COM7_FMT_VGA 0x00
357#define OV7670_COM7_YUV 0x00 /* YUV */
358#define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
359#define OV7670_COM7_FMT_MASK 0x38
360#define OV7670_COM7_RESET 0x80 /* Register reset */
361#define OV7670_REG_COM8 0x13 /* Control 8 */
362#define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
363#define OV7670_COM8_AWB 0x02 /* White balance enable */
364#define OV7670_COM8_AGC 0x04 /* Auto gain enable */
365#define OV7670_COM8_BFILT 0x20 /* Band filter enable */
366#define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
367#define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
368#define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
369#define OV7670_REG_COM10 0x15 /* Control 10 */
370#define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
371#define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
372#define OV7670_REG_VSTART 0x19 /* Vert start high bits */
373#define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
374#define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
0cd6759d 375#define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
6a7eba24
JFM		 376#define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
377#define OV7670_REG_AEW 0x24 /* AGC upper limit */
378#define OV7670_REG_AEB 0x25 /* AGC lower limit */
379#define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
380#define OV7670_REG_HREF 0x32 /* HREF pieces */
381#define OV7670_REG_TSLB 0x3a /* lots of stuff */
382#define OV7670_REG_COM11 0x3b /* Control 11 */
383#define OV7670_COM11_EXP 0x02
384#define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
385#define OV7670_REG_COM12 0x3c /* Control 12 */
386#define OV7670_REG_COM13 0x3d /* Control 13 */
387#define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
388#define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
389#define OV7670_REG_COM14 0x3e /* Control 14 */
390#define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
391#define OV7670_REG_COM15 0x40 /* Control 15 */
392#define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
393#define OV7670_REG_COM16 0x41 /* Control 16 */
394#define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
395#define OV7670_REG_BRIGHT 0x55 /* Brightness */
396#define OV7670_REG_CONTRAS 0x56 /* Contrast control */
397#define OV7670_REG_GFIX 0x69 /* Fix gain control */
398#define OV7670_REG_RGB444 0x8c /* RGB 444 control */
399#define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
400#define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
401#define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
402#define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
403#define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
404#define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
405#define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
406#define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
407#define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
408
4202f71c
JFM		 409struct ov_regvals {
410 __u8 reg;
411 __u8 val;
412};
413struct ov_i2c_regvals {
414 __u8 reg;
415 __u8 val;
416};
417
418static const struct ov_i2c_regvals norm_6x20[] = {
419 { 0x12, 0x80 }, /* reset */
420 { 0x11, 0x01 },
421 { 0x03, 0x60 },
422 { 0x05, 0x7f }, /* For when autoadjust is off */
423 { 0x07, 0xa8 },
424 /* The ratio of 0x0c and 0x0d controls the white point */
425 { 0x0c, 0x24 },
426 { 0x0d, 0x24 },
427 { 0x0f, 0x15 }, /* COMS */
428 { 0x10, 0x75 }, /* AEC Exposure time */
429 { 0x12, 0x24 }, /* Enable AGC */
430 { 0x14, 0x04 },
431 /* 0x16: 0x06 helps frame stability with moving objects */
432 { 0x16, 0x06 },
433/* { 0x20, 0x30 }, * Aperture correction enable */
434 { 0x26, 0xb2 }, /* BLC enable */
435 /* 0x28: 0x05 Selects RGB format if RGB on */
436 { 0x28, 0x05 },
437 { 0x2a, 0x04 }, /* Disable framerate adjust */
438/* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
439 { 0x2d, 0x99 },
440 { 0x33, 0xa0 }, /* Color Processing Parameter */
441 { 0x34, 0xd2 }, /* Max A/D range */
442 { 0x38, 0x8b },
443 { 0x39, 0x40 },
444
445 { 0x3c, 0x39 }, /* Enable AEC mode changing */
446 { 0x3c, 0x3c }, /* Change AEC mode */
447 { 0x3c, 0x24 }, /* Disable AEC mode changing */
448
449 { 0x3d, 0x80 },
450 /* These next two registers (0x4a, 0x4b) are undocumented.
451 * They control the color balance */
452 { 0x4a, 0x80 },
453 { 0x4b, 0x80 },
454 { 0x4d, 0xd2 }, /* This reduces noise a bit */
455 { 0x4e, 0xc1 },
456 { 0x4f, 0x04 },
457/* Do 50-53 have any effect? */
458/* Toggle 0x12[2] off and on here? */
459};
460
461static const struct ov_i2c_regvals norm_6x30[] = {
462 { 0x12, 0x80 }, /* Reset */
463 { 0x00, 0x1f }, /* Gain */
464 { 0x01, 0x99 }, /* Blue gain */
465 { 0x02, 0x7c }, /* Red gain */
466 { 0x03, 0xc0 }, /* Saturation */
467 { 0x05, 0x0a }, /* Contrast */
468 { 0x06, 0x95 }, /* Brightness */
469 { 0x07, 0x2d }, /* Sharpness */
470 { 0x0c, 0x20 },
471 { 0x0d, 0x20 },
02ab18b0 472 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
4202f71c
JFM		 473 { 0x0f, 0x05 },
474 { 0x10, 0x9a },
475 { 0x11, 0x00 }, /* Pixel clock = fastest */
476 { 0x12, 0x24 }, /* Enable AGC and AWB */
477 { 0x13, 0x21 },
478 { 0x14, 0x80 },
479 { 0x15, 0x01 },
480 { 0x16, 0x03 },
481 { 0x17, 0x38 },
482 { 0x18, 0xea },
483 { 0x19, 0x04 },
484 { 0x1a, 0x93 },
485 { 0x1b, 0x00 },
486 { 0x1e, 0xc4 },
487 { 0x1f, 0x04 },
488 { 0x20, 0x20 },
489 { 0x21, 0x10 },
490 { 0x22, 0x88 },
491 { 0x23, 0xc0 }, /* Crystal circuit power level */
492 { 0x25, 0x9a }, /* Increase AEC black ratio */
493 { 0x26, 0xb2 }, /* BLC enable */
494 { 0x27, 0xa2 },
495 { 0x28, 0x00 },
496 { 0x29, 0x00 },
497 { 0x2a, 0x84 }, /* 60 Hz power */
498 { 0x2b, 0xa8 }, /* 60 Hz power */
499 { 0x2c, 0xa0 },
500 { 0x2d, 0x95 }, /* Enable auto-brightness */
501 { 0x2e, 0x88 },
502 { 0x33, 0x26 },
503 { 0x34, 0x03 },
504 { 0x36, 0x8f },
505 { 0x37, 0x80 },
506 { 0x38, 0x83 },
507 { 0x39, 0x80 },
508 { 0x3a, 0x0f },
509 { 0x3b, 0x3c },
510 { 0x3c, 0x1a },
511 { 0x3d, 0x80 },
512 { 0x3e, 0x80 },
513 { 0x3f, 0x0e },
514 { 0x40, 0x00 }, /* White bal */
515 { 0x41, 0x00 }, /* White bal */
516 { 0x42, 0x80 },
517 { 0x43, 0x3f }, /* White bal */
518 { 0x44, 0x80 },
519 { 0x45, 0x20 },
520 { 0x46, 0x20 },
521 { 0x47, 0x80 },
522 { 0x48, 0x7f },
523 { 0x49, 0x00 },
524 { 0x4a, 0x00 },
525 { 0x4b, 0x80 },
526 { 0x4c, 0xd0 },
527 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
528 { 0x4e, 0x40 },
529 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
530 { 0x50, 0xff },
531 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
532 { 0x55, 0xff },
533 { 0x56, 0x12 },
534 { 0x57, 0x81 },
535 { 0x58, 0x75 },
536 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
537 { 0x5a, 0x2c },
538 { 0x5b, 0x0f }, /* AWB chrominance levels */
539 { 0x5c, 0x10 },
540 { 0x3d, 0x80 },
541 { 0x27, 0xa6 },
542 { 0x12, 0x20 }, /* Toggle AWB */
543 { 0x12, 0x24 },
544};
545
546/* Lawrence Glaister <lg@jfm.bc.ca> reports:
547 *
548 * Register 0x0f in the 7610 has the following effects:
549 *
550 * 0x85 (AEC method 1): Best overall, good contrast range
551 * 0x45 (AEC method 2): Very overexposed
552 * 0xa5 (spec sheet default): Ok, but the black level is
553 * shifted resulting in loss of contrast
554 * 0x05 (old driver setting): very overexposed, too much
555 * contrast
556 */
557static const struct ov_i2c_regvals norm_7610[] = {
558 { 0x10, 0xff },
559 { 0x16, 0x06 },
560 { 0x28, 0x24 },
561 { 0x2b, 0xac },
562 { 0x12, 0x00 },
563 { 0x38, 0x81 },
564 { 0x28, 0x24 }, /* 0c */
565 { 0x0f, 0x85 }, /* lg's setting */
566 { 0x15, 0x01 },
567 { 0x20, 0x1c },
568 { 0x23, 0x2a },
569 { 0x24, 0x10 },
570 { 0x25, 0x8a },
571 { 0x26, 0xa2 },
572 { 0x27, 0xc2 },
573 { 0x2a, 0x04 },
574 { 0x2c, 0xfe },
575 { 0x2d, 0x93 },
576 { 0x30, 0x71 },
577 { 0x31, 0x60 },
578 { 0x32, 0x26 },
579 { 0x33, 0x20 },
580 { 0x34, 0x48 },
581 { 0x12, 0x24 },
582 { 0x11, 0x01 },
583 { 0x0c, 0x24 },
584 { 0x0d, 0x24 },
585};
586
587static const struct ov_i2c_regvals norm_7620[] = {
588 { 0x00, 0x00 }, /* gain */
589 { 0x01, 0x80 }, /* blue gain */
590 { 0x02, 0x80 }, /* red gain */
591 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
592 { 0x06, 0x60 },
593 { 0x07, 0x00 },
594 { 0x0c, 0x24 },
595 { 0x0c, 0x24 },
596 { 0x0d, 0x24 },
597 { 0x11, 0x01 },
598 { 0x12, 0x24 },
599 { 0x13, 0x01 },
600 { 0x14, 0x84 },
601 { 0x15, 0x01 },
602 { 0x16, 0x03 },
603 { 0x17, 0x2f },
604 { 0x18, 0xcf },
605 { 0x19, 0x06 },
606 { 0x1a, 0xf5 },
607 { 0x1b, 0x00 },
608 { 0x20, 0x18 },
609 { 0x21, 0x80 },
610 { 0x22, 0x80 },
611 { 0x23, 0x00 },
612 { 0x26, 0xa2 },
613 { 0x27, 0xea },
614 { 0x28, 0x20 },
615 { 0x29, 0x00 },
616 { 0x2a, 0x10 },
617 { 0x2b, 0x00 },
618 { 0x2c, 0x88 },
619 { 0x2d, 0x91 },
620 { 0x2e, 0x80 },
621 { 0x2f, 0x44 },
622 { 0x60, 0x27 },
623 { 0x61, 0x02 },
624 { 0x62, 0x5f },
625 { 0x63, 0xd5 },
626 { 0x64, 0x57 },
627 { 0x65, 0x83 },
628 { 0x66, 0x55 },
629 { 0x67, 0x92 },
630 { 0x68, 0xcf },
631 { 0x69, 0x76 },
632 { 0x6a, 0x22 },
633 { 0x6b, 0x00 },
634 { 0x6c, 0x02 },
635 { 0x6d, 0x44 },
636 { 0x6e, 0x80 },
637 { 0x6f, 0x1d },
638 { 0x70, 0x8b },
639 { 0x71, 0x00 },
640 { 0x72, 0x14 },
641 { 0x73, 0x54 },
642 { 0x74, 0x00 },
643 { 0x75, 0x8e },
644 { 0x76, 0x00 },
645 { 0x77, 0xff },
646 { 0x78, 0x80 },
647 { 0x79, 0x80 },
648 { 0x7a, 0x80 },
649 { 0x7b, 0xe2 },
650 { 0x7c, 0x00 },
651};
652
653/* 7640 and 7648. The defaults should be OK for most registers. */
654static const struct ov_i2c_regvals norm_7640[] = {
655 { 0x12, 0x80 },
656 { 0x12, 0x14 },
657};
658
659/* 7670. Defaults taken from OmniVision provided data,
660* as provided by Jonathan Corbet of OLPC */
661static const struct ov_i2c_regvals norm_7670[] = {
662 { OV7670_REG_COM7, OV7670_COM7_RESET },
663 { OV7670_REG_TSLB, 0x04 }, /* OV */
664 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
665 { OV7670_REG_CLKRC, 0x01 },
666/*
667 * Set the hardware window. These values from OV don't entirely
668 * make sense - hstop is less than hstart. But they work...
669 */
670 { OV7670_REG_HSTART, 0x13 },
671 { OV7670_REG_HSTOP, 0x01 },
672 { OV7670_REG_HREF, 0xb6 },
673 { OV7670_REG_VSTART, 0x02 },
674 { OV7670_REG_VSTOP, 0x7a },
675 { OV7670_REG_VREF, 0x0a },
676
ac40b1fa
JFM		 677 { OV7670_REG_COM3, 0x00 },
678 { OV7670_REG_COM14, 0x00 },
4202f71c
JFM		 679/* Mystery scaling numbers */
680 { 0x70, 0x3a },
681 { 0x71, 0x35 },
682 { 0x72, 0x11 },
683 { 0x73, 0xf0 },
684 { 0xa2, 0x02 },
685/* { OV7670_REG_COM10, 0x0 }, */
686
687/* Gamma curve values */
688 { 0x7a, 0x20 },
689 { 0x7b, 0x10 },
690 { 0x7c, 0x1e },
691 { 0x7d, 0x35 },
692 { 0x7e, 0x5a },
693 { 0x7f, 0x69 },
694 { 0x80, 0x76 },
695 { 0x81, 0x80 },
696 { 0x82, 0x88 },
697 { 0x83, 0x8f },
698 { 0x84, 0x96 },
699 { 0x85, 0xa3 },
700 { 0x86, 0xaf },
701 { 0x87, 0xc4 },
702 { 0x88, 0xd7 },
703 { 0x89, 0xe8 },
704
705/* AGC and AEC parameters. Note we start by disabling those features,
706 then turn them only after tweaking the values. */
707 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
708 | OV7670_COM8_AECSTEP
709 | OV7670_COM8_BFILT },
ac40b1fa
JFM		 710 { OV7670_REG_GAIN, 0x00 },
711 { OV7670_REG_AECH, 0x00 },
4202f71c
JFM		 712 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
713 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
714 { OV7670_REG_BD50MAX, 0x05 },
715 { OV7670_REG_BD60MAX, 0x07 },
716 { OV7670_REG_AEW, 0x95 },
717 { OV7670_REG_AEB, 0x33 },
718 { OV7670_REG_VPT, 0xe3 },
719 { OV7670_REG_HAECC1, 0x78 },
720 { OV7670_REG_HAECC2, 0x68 },
721 { 0xa1, 0x03 }, /* magic */
722 { OV7670_REG_HAECC3, 0xd8 },
723 { OV7670_REG_HAECC4, 0xd8 },
724 { OV7670_REG_HAECC5, 0xf0 },
725 { OV7670_REG_HAECC6, 0x90 },
726 { OV7670_REG_HAECC7, 0x94 },
727 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
728 | OV7670_COM8_AECSTEP
729 | OV7670_COM8_BFILT
730 | OV7670_COM8_AGC
731 | OV7670_COM8_AEC },
732
733/* Almost all of these are magic "reserved" values. */
734 { OV7670_REG_COM5, 0x61 },
735 { OV7670_REG_COM6, 0x4b },
736 { 0x16, 0x02 },
737 { OV7670_REG_MVFP, 0x07 },
738 { 0x21, 0x02 },
739 { 0x22, 0x91 },
740 { 0x29, 0x07 },
741 { 0x33, 0x0b },
742 { 0x35, 0x0b },
743 { 0x37, 0x1d },
744 { 0x38, 0x71 },
745 { 0x39, 0x2a },
746 { OV7670_REG_COM12, 0x78 },
747 { 0x4d, 0x40 },
748 { 0x4e, 0x20 },
ac40b1fa 749 { OV7670_REG_GFIX, 0x00 },
4202f71c
JFM		 750 { 0x6b, 0x4a },
751 { 0x74, 0x10 },
752 { 0x8d, 0x4f },
ac40b1fa
JFM		 753 { 0x8e, 0x00 },
754 { 0x8f, 0x00 },
755 { 0x90, 0x00 },
756 { 0x91, 0x00 },
757 { 0x96, 0x00 },
758 { 0x9a, 0x00 },
4202f71c
JFM		 759 { 0xb0, 0x84 },
760 { 0xb1, 0x0c },
761 { 0xb2, 0x0e },
762 { 0xb3, 0x82 },
763 { 0xb8, 0x0a },
764
765/* More reserved magic, some of which tweaks white balance */
766 { 0x43, 0x0a },
767 { 0x44, 0xf0 },
768 { 0x45, 0x34 },
769 { 0x46, 0x58 },
770 { 0x47, 0x28 },
771 { 0x48, 0x3a },
772 { 0x59, 0x88 },
773 { 0x5a, 0x88 },
774 { 0x5b, 0x44 },
775 { 0x5c, 0x67 },
776 { 0x5d, 0x49 },
777 { 0x5e, 0x0e },
778 { 0x6c, 0x0a },
779 { 0x6d, 0x55 },
780 { 0x6e, 0x11 },
781 { 0x6f, 0x9f },
782 /* "9e for advance AWB" */
783 { 0x6a, 0x40 },
784 { OV7670_REG_BLUE, 0x40 },
785 { OV7670_REG_RED, 0x60 },
786 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
787 | OV7670_COM8_AECSTEP
788 | OV7670_COM8_BFILT
789 | OV7670_COM8_AGC
790 | OV7670_COM8_AEC
791 | OV7670_COM8_AWB },
792
793/* Matrix coefficients */
794 { 0x4f, 0x80 },
795 { 0x50, 0x80 },
ac40b1fa 796 { 0x51, 0x00 },
4202f71c
JFM		 797 { 0x52, 0x22 },
798 { 0x53, 0x5e },
799 { 0x54, 0x80 },
800 { 0x58, 0x9e },
801
802 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
ac40b1fa 803 { OV7670_REG_EDGE, 0x00 },
4202f71c
JFM		 804 { 0x75, 0x05 },
805 { 0x76, 0xe1 },
ac40b1fa 806 { 0x4c, 0x00 },
4202f71c
JFM		 807 { 0x77, 0x01 },
808 { OV7670_REG_COM13, OV7670_COM13_GAMMA
809 | OV7670_COM13_UVSAT
810 | 2}, /* was 3 */
811 { 0x4b, 0x09 },
812 { 0xc9, 0x60 },
813 { OV7670_REG_COM16, 0x38 },
814 { 0x56, 0x40 },
815
816 { 0x34, 0x11 },
817 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
818 { 0xa4, 0x88 },
ac40b1fa 819 { 0x96, 0x00 },
4202f71c
JFM		 820 { 0x97, 0x30 },
821 { 0x98, 0x20 },
822 { 0x99, 0x30 },
823 { 0x9a, 0x84 },
824 { 0x9b, 0x29 },
825 { 0x9c, 0x03 },
826 { 0x9d, 0x4c },
827 { 0x9e, 0x3f },
828 { 0x78, 0x04 },
829
830/* Extra-weird stuff. Some sort of multiplexor register */
831 { 0x79, 0x01 },
832 { 0xc8, 0xf0 },
833 { 0x79, 0x0f },
834 { 0xc8, 0x00 },
835 { 0x79, 0x10 },
836 { 0xc8, 0x7e },
837 { 0x79, 0x0a },
838 { 0xc8, 0x80 },
839 { 0x79, 0x0b },
840 { 0xc8, 0x01 },
841 { 0x79, 0x0c },
842 { 0xc8, 0x0f },
843 { 0x79, 0x0d },
844 { 0xc8, 0x20 },
845 { 0x79, 0x09 },
846 { 0xc8, 0x80 },
847 { 0x79, 0x02 },
848 { 0xc8, 0xc0 },
849 { 0x79, 0x03 },
850 { 0xc8, 0x40 },
851 { 0x79, 0x05 },
852 { 0xc8, 0x30 },
853 { 0x79, 0x26 },
854};
855
856static const struct ov_i2c_regvals norm_8610[] = {
857 { 0x12, 0x80 },
858 { 0x00, 0x00 },
859 { 0x01, 0x80 },
860 { 0x02, 0x80 },
861 { 0x03, 0xc0 },
862 { 0x04, 0x30 },
863 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
864 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
865 { 0x0a, 0x86 },
866 { 0x0b, 0xb0 },
867 { 0x0c, 0x20 },
868 { 0x0d, 0x20 },
869 { 0x11, 0x01 },
870 { 0x12, 0x25 },
871 { 0x13, 0x01 },
872 { 0x14, 0x04 },
873 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
874 { 0x16, 0x03 },
875 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
876 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
877 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
878 { 0x1a, 0xf5 },
879 { 0x1b, 0x00 },
880 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
881 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
882 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
883 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
884 { 0x26, 0xa2 },
885 { 0x27, 0xea },
886 { 0x28, 0x00 },
887 { 0x29, 0x00 },
888 { 0x2a, 0x80 },
889 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
890 { 0x2c, 0xac },
891 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
892 { 0x2e, 0x80 },
893 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
894 { 0x4c, 0x00 },
895 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
896 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
897 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
898 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
899 { 0x63, 0xff },
900 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
901 * maybe thats wrong */
902 { 0x65, 0x00 },
903 { 0x66, 0x55 },
904 { 0x67, 0xb0 },
905 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
906 { 0x69, 0x02 },
907 { 0x6a, 0x22 },
908 { 0x6b, 0x00 },
909 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
910 * deleting bit7 colors the first images red */
911 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
912 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
913 { 0x6f, 0x01 },
914 { 0x70, 0x8b },
915 { 0x71, 0x00 },
916 { 0x72, 0x14 },
917 { 0x73, 0x54 },
918 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
919 { 0x75, 0x0e },
920 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
921 { 0x77, 0xff },
922 { 0x78, 0x80 },
923 { 0x79, 0x80 },
924 { 0x7a, 0x80 },
925 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
926 { 0x7c, 0x00 },
927 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
928 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
929 { 0x7f, 0xfb },
930 { 0x80, 0x28 },
931 { 0x81, 0x00 },
932 { 0x82, 0x23 },
933 { 0x83, 0x0b },
934 { 0x84, 0x00 },
935 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
936 { 0x86, 0xc9 },
937 { 0x87, 0x00 },
938 { 0x88, 0x00 },
939 { 0x89, 0x01 },
940 { 0x12, 0x20 },
941 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
942};
943
6a7eba24
JFM		 944static unsigned char ov7670_abs_to_sm(unsigned char v)
945{
946 if (v > 127)
947 return v & 0x7f;
948 return (128 - v) | 0x80;
949}
950
951/* Write a OV519 register */
952static int reg_w(struct sd *sd, __u16 index, __u8 value)
953{
954 int ret;
49809d6a 955 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 2 : 1;
6a7eba24 956
739570bb 957 sd->gspca_dev.usb_buf[0] = value;
6a7eba24
JFM		 958 ret = usb_control_msg(sd->gspca_dev.dev,
959 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 960 req,
6a7eba24
JFM		 961 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
962 0, index,
739570bb 963 sd->gspca_dev.usb_buf, 1, 500);
6a7eba24
JFM		 964 if (ret < 0)
965 PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
966 return ret;
967}
968
969/* Read from a OV519 register */
970/* returns: negative is error, pos or zero is data */
971static int reg_r(struct sd *sd, __u16 index)
972{
973 int ret;
49809d6a 974 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 3 : 1;
6a7eba24
JFM		 975
976 ret = usb_control_msg(sd->gspca_dev.dev,
977 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 978 req,
6a7eba24 979 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 980 0, index, sd->gspca_dev.usb_buf, 1, 500);
6a7eba24
JFM		 981
982 if (ret >= 0)
739570bb 983 ret = sd->gspca_dev.usb_buf[0];
6a7eba24
JFM		 984 else
985 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
986 return ret;
987}
988
989/* Read 8 values from a OV519 register */
990static int reg_r8(struct sd *sd,
a5ae2062 991 __u16 index)
6a7eba24
JFM		 992{
993 int ret;
6a7eba24
JFM		 994
995 ret = usb_control_msg(sd->gspca_dev.dev,
996 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
997 1, /* REQ_IO */
998 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 999 0, index, sd->gspca_dev.usb_buf, 8, 500);
6a7eba24
JFM		 1000
1001 if (ret >= 0)
739570bb 1002 ret = sd->gspca_dev.usb_buf[0];
6a7eba24
JFM		 1003 else
1004 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1005 return ret;
1006}
1007
1008/*
1009 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1010 * the same position as 1's in "mask" are cleared and set to "value". Bits
1011 * that are in the same position as 0's in "mask" are preserved, regardless
1012 * of their respective state in "value".
1013 */
1014static int reg_w_mask(struct sd *sd,
1015 __u16 index,
1016 __u8 value,
1017 __u8 mask)
1018{
1019 int ret;
1020 __u8 oldval;
1021
1022 if (mask != 0xff) {
1023 value &= mask; /* Enforce mask on value */
1024 ret = reg_r(sd, index);
1025 if (ret < 0)
1026 return ret;
1027
1028 oldval = ret & ~mask; /* Clear the masked bits */
1029 value |= oldval; /* Set the desired bits */
1030 }
1031 return reg_w(sd, index, value);
1032}
1033
49809d6a
HG		 1034/*
1035 * Writes multiple (n) byte value to a single register. Only valid with certain
1036 * registers (0x30 and 0xc4 - 0xce).
1037 */
1038static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1039{
1040 int ret;
1041
1042 *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1043
1044 ret = usb_control_msg(sd->gspca_dev.dev,
1045 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1046 1 /* REG_IO */,
1047 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1048 0, index,
1049 sd->gspca_dev.usb_buf, n, 500);
1050 if (ret < 0)
1051 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1052 return ret;
1053}
1054
1055
6a7eba24
JFM		 1056/*
1057 * The OV518 I2C I/O procedure is different, hence, this function.
1058 * This is normally only called from i2c_w(). Note that this function
1059 * always succeeds regardless of whether the sensor is present and working.
1060 */
1061static int i2c_w(struct sd *sd,
1062 __u8 reg,
1063 __u8 value)
1064{
1065 int rc;
1066
1067 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1068
1069 /* Select camera register */
1070 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1071 if (rc < 0)
1072 return rc;
1073
1074 /* Write "value" to I2C data port of OV511 */
1075 rc = reg_w(sd, R51x_I2C_DATA, value);
1076 if (rc < 0)
1077 return rc;
1078
1079 /* Initiate 3-byte write cycle */
1080 rc = reg_w(sd, R518_I2C_CTL, 0x01);
ac40b1fa
JFM		 1081 if (rc < 0)
1082 return rc;
6a7eba24
JFM		 1083
1084 /* wait for write complete */
1085 msleep(4);
6a7eba24
JFM		 1086 return reg_r8(sd, R518_I2C_CTL);
1087}
1088
1089/*
1090 * returns: negative is error, pos or zero is data
1091 *
1092 * The OV518 I2C I/O procedure is different, hence, this function.
1093 * This is normally only called from i2c_r(). Note that this function
1094 * always succeeds regardless of whether the sensor is present and working.
1095 */
1096static int i2c_r(struct sd *sd, __u8 reg)
1097{
1098 int rc, value;
1099
1100 /* Select camera register */
1101 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
1102 if (rc < 0)
1103 return rc;
1104
1105 /* Initiate 2-byte write cycle */
1106 rc = reg_w(sd, R518_I2C_CTL, 0x03);
1107 if (rc < 0)
1108 return rc;
1109
1110 /* Initiate 2-byte read cycle */
1111 rc = reg_w(sd, R518_I2C_CTL, 0x05);
1112 if (rc < 0)
1113 return rc;
1114 value = reg_r(sd, R51x_I2C_DATA);
1115 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
1116 return value;
1117}
1118
1119/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
1120 * the same position as 1's in "mask" are cleared and set to "value". Bits
1121 * that are in the same position as 0's in "mask" are preserved, regardless
1122 * of their respective state in "value".
1123 */
1124static int i2c_w_mask(struct sd *sd,
1125 __u8 reg,
1126 __u8 value,
1127 __u8 mask)
1128{
1129 int rc;
1130 __u8 oldval;
1131
1132 value &= mask; /* Enforce mask on value */
1133 rc = i2c_r(sd, reg);
1134 if (rc < 0)
1135 return rc;
1136 oldval = rc & ~mask; /* Clear the masked bits */
1137 value |= oldval; /* Set the desired bits */
1138 return i2c_w(sd, reg, value);
1139}
1140
1141/* Temporarily stops OV511 from functioning. Must do this before changing
1142 * registers while the camera is streaming */
1143static inline int ov51x_stop(struct sd *sd)
1144{
1145 PDEBUG(D_STREAM, "stopping");
1146 sd->stopped = 1;
49809d6a
HG		 1147 switch (sd->bridge) {
1148 case BRIDGE_OV511:
1149 case BRIDGE_OV511PLUS:
1150 return reg_w(sd, R51x_SYS_RESET, 0x3d);
1151 case BRIDGE_OV518:
1152 case BRIDGE_OV518PLUS:
1153 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
1154 case BRIDGE_OV519:
1155 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
1156 }
1157
1158 return 0;
6a7eba24
JFM		 1159}
1160
1161/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
1162 * actually stopped (for performance). */
1163static inline int ov51x_restart(struct sd *sd)
1164{
49809d6a
HG		 1165 int rc;
1166
6a7eba24
JFM		 1167 PDEBUG(D_STREAM, "restarting");
1168 if (!sd->stopped)
1169 return 0;
1170 sd->stopped = 0;
1171
1172 /* Reinitialize the stream */
49809d6a
HG		 1173 switch (sd->bridge) {
1174 case BRIDGE_OV511:
1175 case BRIDGE_OV511PLUS:
1176 return reg_w(sd, R51x_SYS_RESET, 0x00);
1177 case BRIDGE_OV518:
1178 case BRIDGE_OV518PLUS:
1179 rc = reg_w(sd, 0x2f, 0x80);
1180 if (rc < 0)
1181 return rc;
1182 return reg_w(sd, R51x_SYS_RESET, 0x00);
1183 case BRIDGE_OV519:
1184 return reg_w(sd, OV519_SYS_RESET1, 0x00);
1185 }
1186
1187 return 0;
6a7eba24
JFM		 1188}
1189
1190/* This does an initial reset of an OmniVision sensor and ensures that I2C
1191 * is synchronized. Returns <0 on failure.
1192 */
1193static int init_ov_sensor(struct sd *sd)
1194{
ac40b1fa 1195 int i;
6a7eba24
JFM		 1196
1197 /* Reset the sensor */
1198 if (i2c_w(sd, 0x12, 0x80) < 0)
1199 return -EIO;
1200
1201 /* Wait for it to initialize */
1202 msleep(150);
1203
ac40b1fa 1204 for (i = 0; i < i2c_detect_tries; i++) {
6a7eba24
JFM		 1205 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
1206 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
ac40b1fa
JFM		 1207 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
1208 return 0;
6a7eba24
JFM		 1209 }
1210
1211 /* Reset the sensor */
1212 if (i2c_w(sd, 0x12, 0x80) < 0)
1213 return -EIO;
1214 /* Wait for it to initialize */
1215 msleep(150);
1216 /* Dummy read to sync I2C */
1217 if (i2c_r(sd, 0x00) < 0)
1218 return -EIO;
1219 }
ac40b1fa 1220 return -EIO;
6a7eba24
JFM		 1221}
1222
6a7eba24
JFM		 1223/* Set the read and write slave IDs. The "slave" argument is the write slave,
1224 * and the read slave will be set to (slave + 1).
1225 * This should not be called from outside the i2c I/O functions.
1226 * Sets I2C read and write slave IDs. Returns <0 for error
1227 */
1228static int ov51x_set_slave_ids(struct sd *sd,
1229 __u8 slave)
1230{
1231 int rc;
1232
1233 rc = reg_w(sd, R51x_I2C_W_SID, slave);
1234 if (rc < 0)
1235 return rc;
1236 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
1237}
1238
6a7eba24 1239static int write_regvals(struct sd *sd,
a5ae2062 1240 const struct ov_regvals *regvals,
6a7eba24
JFM		 1241 int n)
1242{
1243 int rc;
1244
1245 while (--n >= 0) {
1246 rc = reg_w(sd, regvals->reg, regvals->val);
1247 if (rc < 0)
1248 return rc;
1249 regvals++;
1250 }
1251 return 0;
1252}
1253
1254static int write_i2c_regvals(struct sd *sd,
a5ae2062 1255 const struct ov_i2c_regvals *regvals,
6a7eba24
JFM		 1256 int n)
1257{
1258 int rc;
1259
1260 while (--n >= 0) {
1261 rc = i2c_w(sd, regvals->reg, regvals->val);
1262 if (rc < 0)
1263 return rc;
1264 regvals++;
1265 }
1266 return 0;
1267}
1268
1269/****************************************************************************
1270 *
1271 * OV511 and sensor configuration
1272 *
1273 ***************************************************************************/
1274
1275/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
1276 * the same register settings as the OV8610, since they are very similar.
1277 */
1278static int ov8xx0_configure(struct sd *sd)
1279{
1280 int rc;
6a7eba24
JFM		 1281
1282 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
1283
6a7eba24
JFM		 1284 /* Detect sensor (sub)type */
1285 rc = i2c_r(sd, OV7610_REG_COM_I);
1286 if (rc < 0) {
1287 PDEBUG(D_ERR, "Error detecting sensor type");
1288 return -1;
1289 }
1290 if ((rc & 3) == 1) {
6a7eba24
JFM		 1291 sd->sensor = SEN_OV8610;
1292 } else {
1293 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1294 return -1;
1295 }
6a7eba24
JFM		 1296
1297 /* Set sensor-specific vars */
594f5b8b 1298/* sd->sif = 0; already done */
6a7eba24
JFM		 1299 return 0;
1300}
1301
1302/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
1303 * the same register settings as the OV7610, since they are very similar.
1304 */
1305static int ov7xx0_configure(struct sd *sd)
1306{
1307 int rc, high, low;
1308
6a7eba24
JFM		 1309
1310 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
1311
6a7eba24
JFM		 1312 /* Detect sensor (sub)type */
1313 rc = i2c_r(sd, OV7610_REG_COM_I);
1314
1315 /* add OV7670 here
1316 * it appears to be wrongly detected as a 7610 by default */
1317 if (rc < 0) {
1318 PDEBUG(D_ERR, "Error detecting sensor type");
1319 return -1;
1320 }
1321 if ((rc & 3) == 3) {
1322 /* quick hack to make OV7670s work */
1323 high = i2c_r(sd, 0x0a);
1324 low = i2c_r(sd, 0x0b);
1325 /* info("%x, %x", high, low); */
1326 if (high == 0x76 && low == 0x73) {
1327 PDEBUG(D_PROBE, "Sensor is an OV7670");
1328 sd->sensor = SEN_OV7670;
1329 } else {
1330 PDEBUG(D_PROBE, "Sensor is an OV7610");
1331 sd->sensor = SEN_OV7610;
1332 }
1333 } else if ((rc & 3) == 1) {
1334 /* I don't know what's different about the 76BE yet. */
1335 if (i2c_r(sd, 0x15) & 1)
1336 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
1337 else
1338 PDEBUG(D_PROBE, "Sensor is an OV76BE");
1339
1340 /* OV511+ will return all zero isoc data unless we
1341 * configure the sensor as a 7620. Someone needs to
1342 * find the exact reg. setting that causes this. */
1343 sd->sensor = SEN_OV76BE;
1344 } else if ((rc & 3) == 0) {
1345 /* try to read product id registers */
1346 high = i2c_r(sd, 0x0a);
1347 if (high < 0) {
1348 PDEBUG(D_ERR, "Error detecting camera chip PID");
1349 return high;
1350 }
1351 low = i2c_r(sd, 0x0b);
1352 if (low < 0) {
1353 PDEBUG(D_ERR, "Error detecting camera chip VER");
1354 return low;
1355 }
1356 if (high == 0x76) {
594f5b8b
JFM		 1357 switch (low) {
1358 case 0x30:
6a7eba24 1359 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
4202f71c
JFM		 1360 PDEBUG(D_ERR,
1361 "7630 is not supported by this driver");
1362 return -1;
594f5b8b 1363 case 0x40:
6a7eba24
JFM		 1364 PDEBUG(D_PROBE, "Sensor is an OV7645");
1365 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 1366 break;
1367 case 0x45:
6a7eba24
JFM		 1368 PDEBUG(D_PROBE, "Sensor is an OV7645B");
1369 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 1370 break;
1371 case 0x48:
6a7eba24
JFM		 1372 PDEBUG(D_PROBE, "Sensor is an OV7648");
1373 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 1374 break;
1375 default:
1376 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
6a7eba24
JFM		 1377 return -1;
1378 }
1379 } else {
1380 PDEBUG(D_PROBE, "Sensor is an OV7620");
1381 sd->sensor = SEN_OV7620;
1382 }
1383 } else {
1384 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1385 return -1;
1386 }
1387
6a7eba24 1388 /* Set sensor-specific vars */
594f5b8b 1389/* sd->sif = 0; already done */
6a7eba24
JFM		 1390 return 0;
1391}
1392
1393/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
1394static int ov6xx0_configure(struct sd *sd)
1395{
1396 int rc;
4202f71c 1397 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
6a7eba24
JFM		 1398
1399 /* Detect sensor (sub)type */
1400 rc = i2c_r(sd, OV7610_REG_COM_I);
1401 if (rc < 0) {
1402 PDEBUG(D_ERR, "Error detecting sensor type");
1403 return -1;
1404 }
1405
1406 /* Ugh. The first two bits are the version bits, but
1407 * the entire register value must be used. I guess OVT
1408 * underestimated how many variants they would make. */
594f5b8b
JFM		 1409 switch (rc) {
1410 case 0x00:
6a7eba24
JFM		 1411 sd->sensor = SEN_OV6630;
1412 PDEBUG(D_ERR,
1413 "WARNING: Sensor is an OV66308. Your camera may have");
1414 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 1415 break;
1416 case 0x01:
6a7eba24 1417 sd->sensor = SEN_OV6620;
594f5b8b
JFM		 1418 break;
1419 case 0x02:
6a7eba24
JFM		 1420 sd->sensor = SEN_OV6630;
1421 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
594f5b8b
JFM		 1422 break;
1423 case 0x03:
6a7eba24
JFM		 1424 sd->sensor = SEN_OV6630;
1425 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
594f5b8b
JFM		 1426 break;
1427 case 0x90:
6a7eba24
JFM		 1428 sd->sensor = SEN_OV6630;
1429 PDEBUG(D_ERR,
1430 "WARNING: Sensor is an OV66307. Your camera may have");
1431 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 1432 break;
1433 default:
6a7eba24
JFM		 1434 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
1435 return -1;
1436 }
1437
1438 /* Set sensor-specific vars */
594f5b8b 1439 sd->sif = 1;
6a7eba24 1440
6a7eba24
JFM		 1441 return 0;
1442}
1443
1444/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
1445static void ov51x_led_control(struct sd *sd, int on)
1446{
49809d6a
HG		 1447 switch (sd->bridge) {
1448 /* OV511 has no LED control */
1449 case BRIDGE_OV511PLUS:
1450 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
1451 break;
1452 case BRIDGE_OV518:
1453 case BRIDGE_OV518PLUS:
1454 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
1455 break;
1456 case BRIDGE_OV519:
1457 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
1458 break;
1459 }
6a7eba24
JFM		 1460}
1461
49809d6a
HG		 1462/* OV518 quantization tables are 8x4 (instead of 8x8) */
1463static int ov518_upload_quan_tables(struct sd *sd)
1464{
1465 const unsigned char yQuanTable518[] = {
1466 5, 4, 5, 6, 6, 7, 7, 7,
1467 5, 5, 5, 5, 6, 7, 7, 7,
1468 6, 6, 6, 6, 7, 7, 7, 8,
1469 7, 7, 6, 7, 7, 7, 8, 8
1470 };
1471
1472 const unsigned char uvQuanTable518[] = {
1473 6, 6, 6, 7, 7, 7, 7, 7,
1474 6, 6, 6, 7, 7, 7, 7, 7,
1475 6, 6, 6, 7, 7, 7, 7, 8,
1476 7, 7, 7, 7, 7, 7, 8, 8
1477 };
1478
1479 const unsigned char *pYTable = yQuanTable518;
1480 const unsigned char *pUVTable = uvQuanTable518;
1481 unsigned char val0, val1;
1482 int i, rc, reg = R51x_COMP_LUT_BEGIN;
1483
1484 PDEBUG(D_PROBE, "Uploading quantization tables");
1485
1486 for (i = 0; i < 16; i++) {
1487 val0 = *pYTable++;
1488 val1 = *pYTable++;
1489 val0 &= 0x0f;
1490 val1 &= 0x0f;
1491 val0 |= val1 << 4;
1492 rc = reg_w(sd, reg, val0);
1493 if (rc < 0)
1494 return rc;
1495
1496 val0 = *pUVTable++;
1497 val1 = *pUVTable++;
1498 val0 &= 0x0f;
1499 val1 &= 0x0f;
1500 val0 |= val1 << 4;
1501 rc = reg_w(sd, reg + 16, val0);
1502 if (rc < 0)
1503 return rc;
1504
1505 reg++;
1506 }
1507
1508 return 0;
1509}
1510
1511/* This initializes the OV518/OV518+ and the sensor */
1512static int ov518_configure(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 1513{
1514 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 1515 int rc;
1516
1517 /* For 518 and 518+ */
1518 static struct ov_regvals init_518[] = {
1519 { R51x_SYS_RESET, 0x40 },
1520 { R51x_SYS_INIT, 0xe1 },
1521 { R51x_SYS_RESET, 0x3e },
1522 { R51x_SYS_INIT, 0xe1 },
1523 { R51x_SYS_RESET, 0x00 },
1524 { R51x_SYS_INIT, 0xe1 },
1525 { 0x46, 0x00 },
1526 { 0x5d, 0x03 },
1527 };
1528
1529 static struct ov_regvals norm_518[] = {
1530 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1531 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1532 { 0x31, 0x0f },
1533 { 0x5d, 0x03 },
1534 { 0x24, 0x9f },
1535 { 0x25, 0x90 },
1536 { 0x20, 0x00 },
1537 { 0x51, 0x04 },
1538 { 0x71, 0x19 },
1539 { 0x2f, 0x80 },
1540 };
1541
1542 static struct ov_regvals norm_518_p[] = {
1543 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1544 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1545 { 0x31, 0x0f },
1546 { 0x5d, 0x03 },
1547 { 0x24, 0x9f },
1548 { 0x25, 0x90 },
1549 { 0x20, 0x60 },
1550 { 0x51, 0x02 },
1551 { 0x71, 0x19 },
1552 { 0x40, 0xff },
1553 { 0x41, 0x42 },
1554 { 0x46, 0x00 },
1555 { 0x33, 0x04 },
1556 { 0x21, 0x19 },
1557 { 0x3f, 0x10 },
1558 { 0x2f, 0x80 },
1559 };
1560
1561 /* First 5 bits of custom ID reg are a revision ID on OV518 */
1562 PDEBUG(D_PROBE, "Device revision %d",
1563 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
1564
1565 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
1566 if (rc < 0)
1567 return rc;
1568
1569 /* Set LED GPIO pin to output mode */
1570 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
1571 if (rc < 0)
1572 return rc;
6a7eba24 1573
49809d6a
HG		 1574 switch (sd->bridge) {
1575 case BRIDGE_OV518:
1576 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
1577 if (rc < 0)
1578 return rc;
1579 break;
1580 case BRIDGE_OV518PLUS:
1581 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
1582 if (rc < 0)
1583 return rc;
1584 break;
1585 }
1586
1587 rc = ov518_upload_quan_tables(sd);
1588 if (rc < 0) {
1589 PDEBUG(D_ERR, "Error uploading quantization tables");
1590 return rc;
1591 }
1592
1593 rc = reg_w(sd, 0x2f, 0x80);
1594 if (rc < 0)
1595 return rc;
1596
1597 return 0;
1598}
1599
1600static int ov519_configure(struct sd *sd)
1601{
a5ae2062 1602 static const struct ov_regvals init_519[] = {
6a7eba24 1603 { 0x5a, 0x6d }, /* EnableSystem */
6a7eba24
JFM		 1604 { 0x53, 0x9b },
1605 { 0x54, 0xff }, /* set bit2 to enable jpeg */
1606 { 0x5d, 0x03 },
1607 { 0x49, 0x01 },
1608 { 0x48, 0x00 },
1609 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
1610 * detection will fail. This deserves further investigation. */
1611 { OV519_GPIO_IO_CTRL0, 0xee },
1612 { 0x51, 0x0f }, /* SetUsbInit */
1613 { 0x51, 0x00 },
1614 { 0x22, 0x00 },
1615 /* windows reads 0x55 at this point*/
1616 };
1617
49809d6a
HG		 1618 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
1619}
1620
1621/* this function is called at probe time */
1622static int sd_config(struct gspca_dev *gspca_dev,
1623 const struct usb_device_id *id)
1624{
1625 struct sd *sd = (struct sd *) gspca_dev;
1626 struct cam *cam;
1627 int ret = 0;
1628
1629 sd->bridge = id->driver_info;
1630
1631 switch (sd->bridge) {
1632 case BRIDGE_OV518:
1633 case BRIDGE_OV518PLUS:
1634 ret = ov518_configure(gspca_dev);
1635 break;
1636 case BRIDGE_OV519:
1637 ret = ov519_configure(sd);
1638 break;
1639 }
1640
1641 if (ret)
6a7eba24 1642 goto error;
49809d6a 1643
6a7eba24
JFM		 1644 ov51x_led_control(sd, 0); /* turn LED off */
1645
1646 /* Test for 76xx */
6a7eba24
JFM		 1647 if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0)
1648 goto error;
1649
1650 /* The OV519 must be more aggressive about sensor detection since
1651 * I2C write will never fail if the sensor is not present. We have
1652 * to try to initialize the sensor to detect its presence */
4202f71c
JFM		 1653 if (init_ov_sensor(sd) >= 0) {
1654 if (ov7xx0_configure(sd) < 0) {
1655 PDEBUG(D_ERR, "Failed to configure OV7xx0");
1656 goto error;
1657 }
1658 } else {
1659
6a7eba24 1660 /* Test for 6xx0 */
6a7eba24
JFM		 1661 if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0)
1662 goto error;
1663
4202f71c
JFM		 1664 if (init_ov_sensor(sd) >= 0) {
1665 if (ov6xx0_configure(sd) < 0) {
1666 PDEBUG(D_ERR, "Failed to configure OV6xx0");
1667 goto error;
1668 }
1669 } else {
1670
6a7eba24 1671 /* Test for 8xx0 */
6a7eba24
JFM		 1672 if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0)
1673 goto error;
1674
1675 if (init_ov_sensor(sd) < 0) {
1676 PDEBUG(D_ERR,
1677 "Can't determine sensor slave IDs");
1678 goto error;
6a7eba24 1679 }
4202f71c
JFM		 1680 if (ov8xx0_configure(sd) < 0) {
1681 PDEBUG(D_ERR,
ac40b1fa 1682 "Failed to configure OV8xx0 sensor");
6a7eba24
JFM		 1683 goto error;
1684 }
1685 }
6a7eba24
JFM		 1686 }
1687
1688 cam = &gspca_dev->cam;
49809d6a
HG		 1689 switch (sd->bridge) {
1690 case BRIDGE_OV518:
1691 case BRIDGE_OV518PLUS:
1692 if (!sd->sif) {
1693 cam->cam_mode = ov518_vga_mode;
1694 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
1695 } else {
1696 cam->cam_mode = ov518_sif_mode;
1697 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
1698 }
1699 break;
1700 case BRIDGE_OV519:
1701 if (!sd->sif) {
1702 cam->cam_mode = ov519_vga_mode;
1703 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
1704 } else {
1705 cam->cam_mode = ov519_sif_mode;
1706 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
1707 }
1708 break;
6a7eba24 1709 }
594f5b8b
JFM		 1710 sd->brightness = BRIGHTNESS_DEF;
1711 sd->contrast = CONTRAST_DEF;
1712 sd->colors = COLOR_DEF;
0cd6759d
JFM		 1713 sd->hflip = HFLIP_DEF;
1714 sd->vflip = VFLIP_DEF;
02ab18b0
HG		 1715 sd->autobrightness = AUTOBRIGHT_DEF;
1716 if (sd->sensor == SEN_OV7670) {
1717 sd->freq = OV7670_FREQ_DEF;
1718 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
1719 } else {
1720 sd->freq = FREQ_DEF;
1721 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
1722 (1 << OV7670_FREQ_IDX);
1723 }
1724 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
1725 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
1726 /* OV8610 Frequency filter control should work but needs testing */
1727 if (sd->sensor == SEN_OV8610)
1728 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
1729
6a7eba24
JFM		 1730 return 0;
1731error:
1732 PDEBUG(D_ERR, "OV519 Config failed");
1733 return -EBUSY;
1734}
1735
012d6b02
JFM		 1736/* this function is called at probe and resume time */
1737static int sd_init(struct gspca_dev *gspca_dev)
6a7eba24 1738{
4202f71c
JFM		 1739 struct sd *sd = (struct sd *) gspca_dev;
1740
1741 /* initialize the sensor */
1742 switch (sd->sensor) {
1743 case SEN_OV6620:
1744 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
1745 return -EIO;
1746 break;
1747 case SEN_OV6630:
1748 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
1749 return -EIO;
1750 break;
1751 default:
1752/* case SEN_OV7610: */
1753/* case SEN_OV76BE: */
1754 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
1755 return -EIO;
1756 break;
1757 case SEN_OV7620:
1758 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
1759 return -EIO;
1760 break;
1761 case SEN_OV7640:
1762 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
1763 return -EIO;
1764 break;
1765 case SEN_OV7670:
1766 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
1767 return -EIO;
1768 break;
1769 case SEN_OV8610:
1770 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
1771 return -EIO;
1772 break;
1773 }
6a7eba24
JFM		 1774 return 0;
1775}
1776
49809d6a
HG		 1777/* Sets up the OV518/OV518+ with the given image parameters
1778 *
1779 * OV518 needs a completely different approach, until we can figure out what
1780 * the individual registers do. Also, only 15 FPS is supported now.
1781 *
1782 * Do not put any sensor-specific code in here (including I2C I/O functions)
1783 */
1784static int ov518_mode_init_regs(struct sd *sd)
1785{
1786 int hsegs, vsegs;
1787
1788 /******** Set the mode ********/
1789
1790 reg_w(sd, 0x2b, 0);
1791 reg_w(sd, 0x2c, 0);
1792 reg_w(sd, 0x2d, 0);
1793 reg_w(sd, 0x2e, 0);
1794 reg_w(sd, 0x3b, 0);
1795 reg_w(sd, 0x3c, 0);
1796 reg_w(sd, 0x3d, 0);
1797 reg_w(sd, 0x3e, 0);
1798
1799 if (sd->bridge == BRIDGE_OV518) {
1800 /* Set 8-bit (YVYU) input format */
1801 reg_w_mask(sd, 0x20, 0x08, 0x08);
1802
1803 /* Set 12-bit (4:2:0) output format */
1804 reg_w_mask(sd, 0x28, 0x80, 0xf0);
1805 reg_w_mask(sd, 0x38, 0x80, 0xf0);
1806 } else {
1807 reg_w(sd, 0x28, 0x80);
1808 reg_w(sd, 0x38, 0x80);
1809 }
1810
1811 hsegs = sd->gspca_dev.width / 16;
1812 vsegs = sd->gspca_dev.height / 4;
1813
1814 reg_w(sd, 0x29, hsegs);
1815 reg_w(sd, 0x2a, vsegs);
1816
1817 reg_w(sd, 0x39, hsegs);
1818 reg_w(sd, 0x3a, vsegs);
1819
1820 /* Windows driver does this here; who knows why */
1821 reg_w(sd, 0x2f, 0x80);
1822
1823 /******** Set the framerate (to 30 FPS) ********/
1824 if (sd->bridge == BRIDGE_OV518PLUS)
1825 sd->clockdiv = 1;
1826 else
1827 sd->clockdiv = 0;
1828
1829 /* Mode independent, but framerate dependent, regs */
1830 reg_w(sd, 0x51, 0x04); /* Clock divider; lower==faster */
1831 reg_w(sd, 0x22, 0x18);
1832 reg_w(sd, 0x23, 0xff);
1833
1834 if (sd->bridge == BRIDGE_OV518PLUS)
1835 reg_w(sd, 0x21, 0x19);
1836 else
1837 reg_w(sd, 0x71, 0x17); /* Compression-related? */
1838
1839 /* FIXME: Sensor-specific */
1840 /* Bit 5 is what matters here. Of course, it is "reserved" */
1841 i2c_w(sd, 0x54, 0x23);
1842
1843 reg_w(sd, 0x2f, 0x80);
1844
1845 if (sd->bridge == BRIDGE_OV518PLUS) {
1846 reg_w(sd, 0x24, 0x94);
1847 reg_w(sd, 0x25, 0x90);
1848 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
1849 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
1850 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
1851 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
1852 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
1853 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
1854 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
1855 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
1856 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
1857 } else {
1858 reg_w(sd, 0x24, 0x9f);
1859 reg_w(sd, 0x25, 0x90);
1860 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
1861 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
1862 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
1863 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
1864 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
1865 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
1866 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
1867 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
1868 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
1869 }
1870
1871 reg_w(sd, 0x2f, 0x80);
1872
1873 return 0;
1874}
1875
1876
6a7eba24
JFM		 1877/* Sets up the OV519 with the given image parameters
1878 *
1879 * OV519 needs a completely different approach, until we can figure out what
1880 * the individual registers do.
1881 *
1882 * Do not put any sensor-specific code in here (including I2C I/O functions)
1883 */
594f5b8b 1884static int ov519_mode_init_regs(struct sd *sd)
6a7eba24 1885{
a5ae2062 1886 static const struct ov_regvals mode_init_519_ov7670[] = {
6a7eba24
JFM		 1887 { 0x5d, 0x03 }, /* Turn off suspend mode */
1888 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1889 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1890 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1891 { 0xa3, 0x18 },
1892 { 0xa4, 0x04 },
1893 { 0xa5, 0x28 },
1894 { 0x37, 0x00 }, /* SetUsbInit */
1895 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1896 /* Enable both fields, YUV Input, disable defect comp (why?) */
1897 { 0x20, 0x0c },
1898 { 0x21, 0x38 },
1899 { 0x22, 0x1d },
1900 { 0x17, 0x50 }, /* undocumented */
1901 { 0x37, 0x00 }, /* undocumented */
1902 { 0x40, 0xff }, /* I2C timeout counter */
1903 { 0x46, 0x00 }, /* I2C clock prescaler */
1904 { 0x59, 0x04 }, /* new from windrv 090403 */
1905 { 0xff, 0x00 }, /* undocumented */
1906 /* windows reads 0x55 at this point, why? */
1907 };
1908
a5ae2062 1909 static const struct ov_regvals mode_init_519[] = {
6a7eba24
JFM		 1910 { 0x5d, 0x03 }, /* Turn off suspend mode */
1911 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1912 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1913 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1914 { 0xa3, 0x18 },
1915 { 0xa4, 0x04 },
1916 { 0xa5, 0x28 },
1917 { 0x37, 0x00 }, /* SetUsbInit */
1918 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1919 /* Enable both fields, YUV Input, disable defect comp (why?) */
1920 { 0x22, 0x1d },
1921 { 0x17, 0x50 }, /* undocumented */
1922 { 0x37, 0x00 }, /* undocumented */
1923 { 0x40, 0xff }, /* I2C timeout counter */
1924 { 0x46, 0x00 }, /* I2C clock prescaler */
1925 { 0x59, 0x04 }, /* new from windrv 090403 */
1926 { 0xff, 0x00 }, /* undocumented */
1927 /* windows reads 0x55 at this point, why? */
1928 };
1929
6a7eba24
JFM		 1930 /******** Set the mode ********/
1931 if (sd->sensor != SEN_OV7670) {
1932 if (write_regvals(sd, mode_init_519,
a5ae2062 1933 ARRAY_SIZE(mode_init_519)))
6a7eba24 1934 return -EIO;
594f5b8b
JFM		 1935 if (sd->sensor == SEN_OV7640) {
1936 /* Select 8-bit input mode */
ac40b1fa 1937 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
594f5b8b 1938 }
6a7eba24
JFM		 1939 } else {
1940 if (write_regvals(sd, mode_init_519_ov7670,
a5ae2062 1941 ARRAY_SIZE(mode_init_519_ov7670)))
6a7eba24
JFM		 1942 return -EIO;
1943 }
1944
ac40b1fa
JFM		 1945 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
1946 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
1947 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
1948 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
1949 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
1950 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
1951 reg_w(sd, OV519_R16_DIVIDER, 0x00);
1952 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
6a7eba24
JFM		 1953 reg_w(sd, 0x26, 0x00); /* Undocumented */
1954
1955 /******** Set the framerate ********/
1956 if (frame_rate > 0)
1957 sd->frame_rate = frame_rate;
1958
1959/* FIXME: These are only valid at the max resolution. */
1960 sd->clockdiv = 0;
594f5b8b
JFM		 1961 switch (sd->sensor) {
1962 case SEN_OV7640:
6a7eba24 1963 switch (sd->frame_rate) {
53e74515
JFM		 1964 default:
1965/* case 30: */
6a7eba24
JFM		 1966 reg_w(sd, 0xa4, 0x0c);
1967 reg_w(sd, 0x23, 0xff);
1968 break;
1969 case 25:
1970 reg_w(sd, 0xa4, 0x0c);
1971 reg_w(sd, 0x23, 0x1f);
1972 break;
1973 case 20:
1974 reg_w(sd, 0xa4, 0x0c);
1975 reg_w(sd, 0x23, 0x1b);
1976 break;
53e74515 1977 case 15:
6a7eba24
JFM		 1978 reg_w(sd, 0xa4, 0x04);
1979 reg_w(sd, 0x23, 0xff);
1980 sd->clockdiv = 1;
1981 break;
1982 case 10:
1983 reg_w(sd, 0xa4, 0x04);
1984 reg_w(sd, 0x23, 0x1f);
1985 sd->clockdiv = 1;
1986 break;
1987 case 5:
1988 reg_w(sd, 0xa4, 0x04);
1989 reg_w(sd, 0x23, 0x1b);
1990 sd->clockdiv = 1;
1991 break;
1992 }
594f5b8b
JFM		 1993 break;
1994 case SEN_OV8610:
6a7eba24
JFM		 1995 switch (sd->frame_rate) {
1996 default: /* 15 fps */
1997/* case 15: */
1998 reg_w(sd, 0xa4, 0x06);
1999 reg_w(sd, 0x23, 0xff);
2000 break;
2001 case 10:
2002 reg_w(sd, 0xa4, 0x06);
2003 reg_w(sd, 0x23, 0x1f);
2004 break;
2005 case 5:
2006 reg_w(sd, 0xa4, 0x06);
2007 reg_w(sd, 0x23, 0x1b);
2008 break;
2009 }
594f5b8b
JFM		 2010 break;
2011 case SEN_OV7670: /* guesses, based on 7640 */
6a7eba24
JFM		 2012 PDEBUG(D_STREAM, "Setting framerate to %d fps",
2013 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
594f5b8b 2014 reg_w(sd, 0xa4, 0x10);
6a7eba24
JFM		 2015 switch (sd->frame_rate) {
2016 case 30:
6a7eba24
JFM		 2017 reg_w(sd, 0x23, 0xff);
2018 break;
2019 case 20:
6a7eba24
JFM		 2020 reg_w(sd, 0x23, 0x1b);
2021 break;
594f5b8b
JFM		 2022 default:
2023/* case 15: */
6a7eba24
JFM		 2024 reg_w(sd, 0x23, 0xff);
2025 sd->clockdiv = 1;
2026 break;
2027 }
594f5b8b 2028 break;
6a7eba24 2029 }
6a7eba24
JFM		 2030 return 0;
2031}
2032
594f5b8b 2033static int mode_init_ov_sensor_regs(struct sd *sd)
6a7eba24 2034{
594f5b8b
JFM		 2035 struct gspca_dev *gspca_dev;
2036 int qvga;
2037
2038 gspca_dev = &sd->gspca_dev;
2039 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
6a7eba24
JFM		 2040
2041 /******** Mode (VGA/QVGA) and sensor specific regs ********/
2042 switch (sd->sensor) {
2043 case SEN_OV8610:
2044 /* For OV8610 qvga means qsvga */
2045 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
2046 break;
2047 case SEN_OV7610:
2048 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2049 break;
2050 case SEN_OV7620:
2051/* i2c_w(sd, 0x2b, 0x00); */
2052 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2053 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2054 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
2055 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
2056 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
2057 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
2058 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
2059 break;
2060 case SEN_OV76BE:
2061/* i2c_w(sd, 0x2b, 0x00); */
2062 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2063 break;
2064 case SEN_OV7640:
2065/* i2c_w(sd, 0x2b, 0x00); */
2066 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2067 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2068/* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
2069/* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
2070/* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
2071/* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
2072/* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
2073 break;
2074 case SEN_OV7670:
2075 /* set COM7_FMT_VGA or COM7_FMT_QVGA
2076 * do we need to set anything else?
2077 * HSTART etc are set in set_ov_sensor_window itself */
2078 i2c_w_mask(sd, OV7670_REG_COM7,
2079 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
2080 OV7670_COM7_FMT_MASK);
2081 break;
2082 case SEN_OV6620:
6a7eba24
JFM		 2083 case SEN_OV6630:
2084 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2085 break;
2086 default:
2087 return -EINVAL;
2088 }
2089
2090 /******** Palette-specific regs ********/
594f5b8b
JFM		 2091 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
2092 /* not valid on the OV6620/OV7620/6630? */
2093 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
2094 }
6a7eba24 2095
594f5b8b
JFM		 2096 /* The OV518 needs special treatment. Although both the OV518
2097 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
2098 * bus is actually used. The UV bus is tied to ground.
2099 * Therefore, the OV6630 needs to be in 8-bit multiplexed
2100 * output mode */
6a7eba24 2101
594f5b8b 2102 /* OV7640 is 8-bit only */
6a7eba24 2103
594f5b8b
JFM		 2104 if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV7640)
2105 i2c_w_mask(sd, 0x13, 0x00, 0x20);
6a7eba24
JFM		 2106
2107 /******** Clock programming ********/
2108 /* The OV6620 needs special handling. This prevents the
2109 * severe banding that normally occurs */
2110 if (sd->sensor == SEN_OV6620) {
2111
2112 /* Clock down */
2113 i2c_w(sd, 0x2a, 0x04);
594f5b8b 2114 i2c_w(sd, 0x11, sd->clockdiv);
6a7eba24
JFM		 2115 i2c_w(sd, 0x2a, 0x84);
2116 /* This next setting is critical. It seems to improve
2117 * the gain or the contrast. The "reserved" bits seem
2118 * to have some effect in this case. */
2119 i2c_w(sd, 0x2d, 0x85);
ac40b1fa 2120 } else {
594f5b8b 2121 i2c_w(sd, 0x11, sd->clockdiv);
6a7eba24
JFM		 2122 }
2123
2124 /******** Special Features ********/
2125/* no evidence this is possible with OV7670, either */
2126 /* Test Pattern */
2127 if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
2128 i2c_w_mask(sd, 0x12, 0x00, 0x02);
2129
2130 /* Enable auto white balance */
2131 if (sd->sensor == SEN_OV7670)
2132 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
2133 OV7670_COM8_AWB);
2134 else
2135 i2c_w_mask(sd, 0x12, 0x04, 0x04);
2136
2137 /* This will go away as soon as ov51x_mode_init_sensor_regs() */
2138 /* is fully tested. */
2139 /* 7620/6620/6630? don't have register 0x35, so play it safe */
2140 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
594f5b8b 2141 if (!qvga)
6a7eba24
JFM		 2142 i2c_w(sd, 0x35, 0x9e);
2143 else
2144 i2c_w(sd, 0x35, 0x1e);
2145 }
2146 return 0;
2147}
2148
594f5b8b 2149static void sethvflip(struct sd *sd)
0cd6759d 2150{
594f5b8b
JFM		 2151 if (sd->sensor != SEN_OV7670)
2152 return;
0cd6759d
JFM		 2153 if (sd->gspca_dev.streaming)
2154 ov51x_stop(sd);
2155 i2c_w_mask(sd, OV7670_REG_MVFP,
594f5b8b
JFM		 2156 OV7670_MVFP_MIRROR * sd->hflip
2157 | OV7670_MVFP_VFLIP * sd->vflip,
2158 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
0cd6759d
JFM		 2159 if (sd->gspca_dev.streaming)
2160 ov51x_restart(sd);
2161}
2162
594f5b8b 2163static int set_ov_sensor_window(struct sd *sd)
6a7eba24 2164{
594f5b8b
JFM		 2165 struct gspca_dev *gspca_dev;
2166 int qvga;
6a7eba24
JFM		 2167 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
2168 int ret, hstart, hstop, vstop, vstart;
2169 __u8 v;
2170
594f5b8b
JFM		 2171 gspca_dev = &sd->gspca_dev;
2172 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
2173
6a7eba24
JFM		 2174 /* The different sensor ICs handle setting up of window differently.
2175 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
2176 switch (sd->sensor) {
2177 case SEN_OV8610:
2178 hwsbase = 0x1e;
2179 hwebase = 0x1e;
2180 vwsbase = 0x02;
2181 vwebase = 0x02;
2182 break;
2183 case SEN_OV7610:
2184 case SEN_OV76BE:
2185 hwsbase = 0x38;
2186 hwebase = 0x3a;
2187 vwsbase = vwebase = 0x05;
2188 break;
2189 case SEN_OV6620:
2190 case SEN_OV6630:
2191 hwsbase = 0x38;
2192 hwebase = 0x3a;
2193 vwsbase = 0x05;
2194 vwebase = 0x06;
49809d6a
HG		 2195 if (qvga) {
2196 /* HDG: this fixes U and V getting swapped */
2197 hwsbase--;
2198 vwsbase--;
2199 }
6a7eba24
JFM		 2200 break;
2201 case SEN_OV7620:
2202 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
2203 hwebase = 0x2f;
2204 vwsbase = vwebase = 0x05;
2205 break;
2206 case SEN_OV7640:
2207 hwsbase = 0x1a;
2208 hwebase = 0x1a;
2209 vwsbase = vwebase = 0x03;
2210 break;
2211 case SEN_OV7670:
2212 /*handling of OV7670 hardware sensor start and stop values
2213 * is very odd, compared to the other OV sensors */
2214 vwsbase = vwebase = hwebase = hwsbase = 0x00;
2215 break;
2216 default:
2217 return -EINVAL;
2218 }
2219
2220 switch (sd->sensor) {
2221 case SEN_OV6620:
2222 case SEN_OV6630:
594f5b8b 2223 if (qvga) { /* QCIF */
6a7eba24
JFM		 2224 hwscale = 0;
2225 vwscale = 0;
2226 } else { /* CIF */
2227 hwscale = 1;
2228 vwscale = 1; /* The datasheet says 0;
2229 * it's wrong */
2230 }
2231 break;
2232 case SEN_OV8610:
594f5b8b 2233 if (qvga) { /* QSVGA */
6a7eba24
JFM		 2234 hwscale = 1;
2235 vwscale = 1;
2236 } else { /* SVGA */
2237 hwscale = 2;
2238 vwscale = 2;
2239 }
2240 break;
2241 default: /* SEN_OV7xx0 */
594f5b8b 2242 if (qvga) { /* QVGA */
6a7eba24
JFM		 2243 hwscale = 1;
2244 vwscale = 0;
2245 } else { /* VGA */
2246 hwscale = 2;
2247 vwscale = 1;
2248 }
2249 }
2250
594f5b8b 2251 ret = mode_init_ov_sensor_regs(sd);
6a7eba24
JFM		 2252 if (ret < 0)
2253 return ret;
2254
2255 if (sd->sensor == SEN_OV8610) {
2256 i2c_w_mask(sd, 0x2d, 0x05, 0x40);
2257 /* old 0x95, new 0x05 from windrv 090403 */
2258 /* bits 5-7: reserved */
2259 i2c_w_mask(sd, 0x28, 0x20, 0x20);
2260 /* bit 5: progressive mode on */
2261 }
2262
2263 /* The below is wrong for OV7670s because their window registers
2264 * only store the high bits in 0x17 to 0x1a */
2265
2266 /* SRH Use sd->max values instead of requested win values */
2267 /* SCS Since we're sticking with only the max hardware widths
2268 * for a given mode */
2269 /* I can hard code this for OV7670s */
2270 /* Yes, these numbers do look odd, but they're tested and work! */
2271 if (sd->sensor == SEN_OV7670) {
594f5b8b 2272 if (qvga) { /* QVGA from ov7670.c by
6a7eba24
JFM		 2273 * Jonathan Corbet */
2274 hstart = 164;
2275 hstop = 20;
2276 vstart = 14;
2277 vstop = 494;
2278 } else { /* VGA */
2279 hstart = 158;
2280 hstop = 14;
2281 vstart = 10;
2282 vstop = 490;
2283 }
2284 /* OV7670 hardware window registers are split across
2285 * multiple locations */
594f5b8b
JFM		 2286 i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
2287 i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
6a7eba24
JFM		 2288 v = i2c_r(sd, OV7670_REG_HREF);
2289 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
2290 msleep(10); /* need to sleep between read and write to
2291 * same reg! */
2292 i2c_w(sd, OV7670_REG_HREF, v);
2293
594f5b8b
JFM		 2294 i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
2295 i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
6a7eba24
JFM		 2296 v = i2c_r(sd, OV7670_REG_VREF);
2297 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
2298 msleep(10); /* need to sleep between read and write to
2299 * same reg! */
2300 i2c_w(sd, OV7670_REG_VREF, v);
6a7eba24 2301 } else {
594f5b8b
JFM		 2302 i2c_w(sd, 0x17, hwsbase);
2303 i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
2304 i2c_w(sd, 0x19, vwsbase);
2305 i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
6a7eba24
JFM		 2306 }
2307 return 0;
2308}
2309
6a7eba24 2310/* -- start the camera -- */
72ab97ce 2311static int sd_start(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 2312{
2313 struct sd *sd = (struct sd *) gspca_dev;
49809d6a 2314 int ret = 0;
6a7eba24 2315
49809d6a
HG		 2316 switch (sd->bridge) {
2317 case BRIDGE_OV518:
2318 case BRIDGE_OV518PLUS:
2319 ret = ov518_mode_init_regs(sd);
2320 break;
2321 case BRIDGE_OV519:
2322 ret = ov519_mode_init_regs(sd);
2323 break;
2324 }
6a7eba24
JFM		 2325 if (ret < 0)
2326 goto out;
49809d6a 2327
594f5b8b 2328 ret = set_ov_sensor_window(sd);
6a7eba24
JFM		 2329 if (ret < 0)
2330 goto out;
2331
49809d6a
HG		 2332 setcontrast(gspca_dev);
2333 setbrightness(gspca_dev);
2334 setcolors(gspca_dev);
02ab18b0
HG		 2335 sethvflip(sd);
2336 setautobrightness(sd);
2337 setfreq(sd);
49809d6a 2338
594f5b8b 2339 ret = ov51x_restart(sd);
6a7eba24
JFM		 2340 if (ret < 0)
2341 goto out;
6a7eba24 2342 ov51x_led_control(sd, 1);
72ab97ce 2343 return 0;
6a7eba24
JFM		 2344out:
2345 PDEBUG(D_ERR, "camera start error:%d", ret);
72ab97ce 2346 return ret;
6a7eba24
JFM		 2347}
2348
2349static void sd_stopN(struct gspca_dev *gspca_dev)
2350{
ac40b1fa
JFM		 2351 struct sd *sd = (struct sd *) gspca_dev;
2352
2353 ov51x_stop(sd);
2354 ov51x_led_control(sd, 0);
6a7eba24
JFM		 2355}
2356
49809d6a
HG		 2357static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
2358 struct gspca_frame *frame, /* target */
2359 __u8 *data, /* isoc packet */
2360 int len) /* iso packet length */
2361{
2362 PDEBUG(D_STREAM, "ov518_pkt_scan: %d bytes", len);
2363
2364 if (len & 7) {
2365 len--;
2366 PDEBUG(D_STREAM, "packet number: %d\n", (int)data[len]);
2367 }
2368
2369 /* A false positive here is likely, until OVT gives me
2370 * the definitive SOF/EOF format */
2371 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
2372 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
2373 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
2374 }
2375
2376 /* intermediate packet */
2377 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
2378}
2379
2380static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
6a7eba24 2381 struct gspca_frame *frame, /* target */
a5ae2062 2382 __u8 *data, /* isoc packet */
6a7eba24
JFM		 2383 int len) /* iso packet length */
2384{
2385 /* Header of ov519 is 16 bytes:
2386 * Byte Value Description
2387 * 0 0xff magic
2388 * 1 0xff magic
2389 * 2 0xff magic
2390 * 3 0xXX 0x50 = SOF, 0x51 = EOF
2391 * 9 0xXX 0x01 initial frame without data,
2392 * 0x00 standard frame with image
2393 * 14 Lo in EOF: length of image data / 8
2394 * 15 Hi
2395 */
2396
2397 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
2398 switch (data[3]) {
2399 case 0x50: /* start of frame */
2400#define HDRSZ 16
2401 data += HDRSZ;
2402 len -= HDRSZ;
2403#undef HDRSZ
2404 if (data[0] == 0xff || data[1] == 0xd8)
2405 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
2406 data, len);
2407 else
2408 gspca_dev->last_packet_type = DISCARD_PACKET;
2409 return;
2410 case 0x51: /* end of frame */
2411 if (data[9] != 0)
2412 gspca_dev->last_packet_type = DISCARD_PACKET;
2413 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
2414 data, 0);
2415 return;
2416 }
2417 }
2418
2419 /* intermediate packet */
2420 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
2421 data, len);
2422}
2423
49809d6a
HG		 2424static void sd_pkt_scan(struct gspca_dev *gspca_dev,
2425 struct gspca_frame *frame, /* target */
2426 __u8 *data, /* isoc packet */
2427 int len) /* iso packet length */
2428{
2429 struct sd *sd = (struct sd *) gspca_dev;
2430
2431 switch (sd->bridge) {
2432 case BRIDGE_OV511:
2433 case BRIDGE_OV511PLUS:
2434 break;
2435 case BRIDGE_OV518:
2436 case BRIDGE_OV518PLUS:
2437 ov518_pkt_scan(gspca_dev, frame, data, len);
2438 break;
2439 case BRIDGE_OV519:
2440 ov519_pkt_scan(gspca_dev, frame, data, len);
2441 break;
2442 }
2443}
2444
6a7eba24
JFM		 2445/* -- management routines -- */
2446
2447static void setbrightness(struct gspca_dev *gspca_dev)
2448{
2449 struct sd *sd = (struct sd *) gspca_dev;
2450 int val;
6a7eba24
JFM		 2451
2452 val = sd->brightness;
6a7eba24
JFM		 2453 switch (sd->sensor) {
2454 case SEN_OV8610:
2455 case SEN_OV7610:
2456 case SEN_OV76BE:
2457 case SEN_OV6620:
2458 case SEN_OV6630:
2459 case SEN_OV7640:
2460 i2c_w(sd, OV7610_REG_BRT, val);
2461 break;
2462 case SEN_OV7620:
2463 /* 7620 doesn't like manual changes when in auto mode */
02ab18b0 2464 if (!sd->autobrightness)
6a7eba24
JFM		 2465 i2c_w(sd, OV7610_REG_BRT, val);
2466 break;
2467 case SEN_OV7670:
594f5b8b 2468/*win trace
6a7eba24
JFM		 2469 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
2470 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
2471 break;
2472 }
6a7eba24
JFM		 2473}
2474
2475static void setcontrast(struct gspca_dev *gspca_dev)
2476{
2477 struct sd *sd = (struct sd *) gspca_dev;
2478 int val;
6a7eba24
JFM		 2479
2480 val = sd->contrast;
6a7eba24
JFM		 2481 switch (sd->sensor) {
2482 case SEN_OV7610:
2483 case SEN_OV6620:
2484 i2c_w(sd, OV7610_REG_CNT, val);
2485 break;
2486 case SEN_OV6630:
2487 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
49809d6a 2488 break;
6a7eba24 2489 case SEN_OV8610: {
a5ae2062 2490 static const __u8 ctab[] = {
6a7eba24
JFM		 2491 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
2492 };
2493
2494 /* Use Y gamma control instead. Bit 0 enables it. */
2495 i2c_w(sd, 0x64, ctab[val >> 5]);
2496 break;
2497 }
2498 case SEN_OV7620: {
a5ae2062 2499 static const __u8 ctab[] = {
6a7eba24
JFM		 2500 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
2501 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
2502 };
2503
2504 /* Use Y gamma control instead. Bit 0 enables it. */
2505 i2c_w(sd, 0x64, ctab[val >> 4]);
2506 break;
2507 }
2508 case SEN_OV7640:
2509 /* Use gain control instead. */
2510 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
2511 break;
2512 case SEN_OV7670:
2513 /* check that this isn't just the same as ov7610 */
2514 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
2515 break;
2516 }
6a7eba24
JFM		 2517}
2518
2519static void setcolors(struct gspca_dev *gspca_dev)
2520{
2521 struct sd *sd = (struct sd *) gspca_dev;
2522 int val;
6a7eba24
JFM		 2523
2524 val = sd->colors;
6a7eba24
JFM		 2525 switch (sd->sensor) {
2526 case SEN_OV8610:
2527 case SEN_OV7610:
2528 case SEN_OV76BE:
2529 case SEN_OV6620:
2530 case SEN_OV6630:
2531 i2c_w(sd, OV7610_REG_SAT, val);
2532 break;
2533 case SEN_OV7620:
2534 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
2535/* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
2536 if (rc < 0)
2537 goto out; */
2538 i2c_w(sd, OV7610_REG_SAT, val);
2539 break;
2540 case SEN_OV7640:
2541 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
2542 break;
2543 case SEN_OV7670:
2544 /* supported later once I work out how to do it
2545 * transparently fail now! */
2546 /* set REG_COM13 values for UV sat auto mode */
2547 break;
2548 }
6a7eba24
JFM		 2549}
2550
02ab18b0
HG		 2551static void setautobrightness(struct sd *sd)
2552{
2553 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
2554 return;
2555
2556 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
2557}
2558
2559static void setfreq(struct sd *sd)
2560{
2561 if (sd->sensor == SEN_OV7670) {
2562 switch (sd->freq) {
2563 case 0: /* Banding filter disabled */
2564 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
2565 break;
2566 case 1: /* 50 hz */
2567 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2568 OV7670_COM8_BFILT);
2569 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
2570 break;
2571 case 2: /* 60 hz */
2572 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2573 OV7670_COM8_BFILT);
2574 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
2575 break;
2576 case 3: /* Auto hz */
2577 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2578 OV7670_COM8_BFILT);
2579 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
2580 0x18);
2581 break;
2582 }
2583 } else {
2584 switch (sd->freq) {
2585 case 0: /* Banding filter disabled */
2586 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
2587 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
2588 break;
2589 case 1: /* 50 hz (filter on and framerate adj) */
2590 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
2591 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
2592 /* 20 fps -> 16.667 fps */
2593 if (sd->sensor == SEN_OV6620 ||
2594 sd->sensor == SEN_OV6630)
2595 i2c_w(sd, 0x2b, 0x5e);
2596 else
2597 i2c_w(sd, 0x2b, 0xac);
2598 break;
2599 case 2: /* 60 hz (filter on, ...) */
2600 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
2601 if (sd->sensor == SEN_OV6620 ||
2602 sd->sensor == SEN_OV6630) {
2603 /* 20 fps -> 15 fps */
2604 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
2605 i2c_w(sd, 0x2b, 0xa8);
2606 } else {
2607 /* no framerate adj. */
2608 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
2609 }
2610 break;
2611 }
2612 }
2613}
2614
6a7eba24
JFM		 2615static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
2616{
2617 struct sd *sd = (struct sd *) gspca_dev;
2618
2619 sd->brightness = val;
ac40b1fa
JFM		 2620 if (gspca_dev->streaming)
2621 setbrightness(gspca_dev);
6a7eba24
JFM		 2622 return 0;
2623}
2624
2625static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
2626{
2627 struct sd *sd = (struct sd *) gspca_dev;
2628
2629 *val = sd->brightness;
2630 return 0;
2631}
2632
2633static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
2634{
2635 struct sd *sd = (struct sd *) gspca_dev;
2636
2637 sd->contrast = val;
ac40b1fa
JFM		 2638 if (gspca_dev->streaming)
2639 setcontrast(gspca_dev);
6a7eba24
JFM		 2640 return 0;
2641}
2642
2643static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
2644{
2645 struct sd *sd = (struct sd *) gspca_dev;
2646
2647 *val = sd->contrast;
2648 return 0;
2649}
2650
2651static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
2652{
2653 struct sd *sd = (struct sd *) gspca_dev;
2654
2655 sd->colors = val;
ac40b1fa
JFM		 2656 if (gspca_dev->streaming)
2657 setcolors(gspca_dev);
6a7eba24
JFM		 2658 return 0;
2659}
2660
2661static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
2662{
2663 struct sd *sd = (struct sd *) gspca_dev;
2664
2665 *val = sd->colors;
2666 return 0;
2667}
2668
0cd6759d
JFM		 2669static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
2670{
2671 struct sd *sd = (struct sd *) gspca_dev;
2672
2673 sd->hflip = val;
ac40b1fa
JFM		 2674 if (gspca_dev->streaming)
2675 sethvflip(sd);
0cd6759d
JFM		 2676 return 0;
2677}
2678
2679static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
2680{
2681 struct sd *sd = (struct sd *) gspca_dev;
2682
2683 *val = sd->hflip;
2684 return 0;
2685}
2686
2687static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
2688{
2689 struct sd *sd = (struct sd *) gspca_dev;
2690
2691 sd->vflip = val;
ac40b1fa
JFM		 2692 if (gspca_dev->streaming)
2693 sethvflip(sd);
0cd6759d
JFM		 2694 return 0;
2695}
2696
2697static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
2698{
2699 struct sd *sd = (struct sd *) gspca_dev;
2700
2701 *val = sd->vflip;
2702 return 0;
2703}
2704
02ab18b0
HG		 2705static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
2706{
2707 struct sd *sd = (struct sd *) gspca_dev;
2708
2709 sd->autobrightness = val;
2710 if (gspca_dev->streaming)
2711 setautobrightness(sd);
2712 return 0;
2713}
2714
2715static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
2716{
2717 struct sd *sd = (struct sd *) gspca_dev;
2718
2719 *val = sd->autobrightness;
2720 return 0;
2721}
2722
2723static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
2724{
2725 struct sd *sd = (struct sd *) gspca_dev;
2726
2727 sd->freq = val;
2728 if (gspca_dev->streaming)
2729 setfreq(sd);
2730 return 0;
2731}
2732
2733static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
2734{
2735 struct sd *sd = (struct sd *) gspca_dev;
2736
2737 *val = sd->freq;
2738 return 0;
2739}
2740
2741static int sd_querymenu(struct gspca_dev *gspca_dev,
2742 struct v4l2_querymenu *menu)
2743{
2744 struct sd *sd = (struct sd *) gspca_dev;
2745
2746 switch (menu->id) {
2747 case V4L2_CID_POWER_LINE_FREQUENCY:
2748 switch (menu->index) {
2749 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
2750 strcpy((char *) menu->name, "NoFliker");
2751 return 0;
2752 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
2753 strcpy((char *) menu->name, "50 Hz");
2754 return 0;
2755 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
2756 strcpy((char *) menu->name, "60 Hz");
2757 return 0;
2758 case 3:
2759 if (sd->sensor != SEN_OV7670)
2760 return -EINVAL;
2761
2762 strcpy((char *) menu->name, "Automatic");
2763 return 0;
2764 }
2765 break;
2766 }
2767 return -EINVAL;
2768}
2769
6a7eba24 2770/* sub-driver description */
a5ae2062 2771static const struct sd_desc sd_desc = {
6a7eba24
JFM		 2772 .name = MODULE_NAME,
2773 .ctrls = sd_ctrls,
2774 .nctrls = ARRAY_SIZE(sd_ctrls),
2775 .config = sd_config,
012d6b02 2776 .init = sd_init,
6a7eba24
JFM		 2777 .start = sd_start,
2778 .stopN = sd_stopN,
6a7eba24 2779 .pkt_scan = sd_pkt_scan,
02ab18b0 2780 .querymenu = sd_querymenu,
6a7eba24
JFM		 2781};
2782
2783/* -- module initialisation -- */
a5ae2062 2784static const __devinitdata struct usb_device_id device_table[] = {
49809d6a
HG		 2785 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
2786 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
2787 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
2788 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
2789 {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
2790 {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
2791 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
2792 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
2793 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
2794 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
2795 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
2796 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
2797 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
2798 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
2799 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
6a7eba24
JFM		 2800 {}
2801};
ac40b1fa 2802
6a7eba24
JFM		 2803MODULE_DEVICE_TABLE(usb, device_table);
2804
2805/* -- device connect -- */
2806static int sd_probe(struct usb_interface *intf,
2807 const struct usb_device_id *id)
2808{
2809 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
2810 THIS_MODULE);
2811}
2812
2813static struct usb_driver sd_driver = {
2814 .name = MODULE_NAME,
2815 .id_table = device_table,
2816 .probe = sd_probe,
2817 .disconnect = gspca_disconnect,
6a709749
JFM		 2818#ifdef CONFIG_PM
2819 .suspend = gspca_suspend,
2820 .resume = gspca_resume,
2821#endif
6a7eba24
JFM		 2822};
2823
2824/* -- module insert / remove -- */
2825static int __init sd_mod_init(void)
2826{
f69e9529
AK		 2827 int ret;
2828 ret = usb_register(&sd_driver);
2829 if (ret < 0)
e6b14849 2830 return ret;
10b0e96e 2831 PDEBUG(D_PROBE, "registered");
6a7eba24
JFM		 2832 return 0;
2833}
2834static void __exit sd_mod_exit(void)
2835{
2836 usb_deregister(&sd_driver);
2837 PDEBUG(D_PROBE, "deregistered");
2838}
2839
2840module_init(sd_mod_init);
2841module_exit(sd_mod_exit);
2842
2843module_param(frame_rate, int, 0644);
2844MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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