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V4L/DVB (13143): gspca_ov519 cleanup sensor detection
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / gspca / ov519.c
CommitLineData
6a7eba24
JFM		 1/**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 *
2961e875
RB		 6 * This module is adapted from the ov51x-jpeg package, which itself
7 * was adapted from the ov511 driver.
8 *
9 * Original copyright for the ov511 driver is:
10 *
11 * Copyright (c) 1999-2004 Mark W. McClelland
12 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
13 *
14 * ov51x-jpeg original copyright is:
15 *
16 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
17 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
6a7eba24
JFM		 18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 *
33 */
34#define MODULE_NAME "ov519"
35
36#include "gspca.h"
37
6a7eba24
JFM		 38MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
39MODULE_DESCRIPTION("OV519 USB Camera Driver");
40MODULE_LICENSE("GPL");
41
42/* global parameters */
43static int frame_rate;
44
45/* Number of times to retry a failed I2C transaction. Increase this if you
46 * are getting "Failed to read sensor ID..." */
47static int i2c_detect_tries = 10;
48
49/* ov519 device descriptor */
50struct sd {
51 struct gspca_dev gspca_dev; /* !! must be the first item */
52
92918a53
HG		 53 __u8 packet_nr;
54
49809d6a
HG		 55 char bridge;
56#define BRIDGE_OV511 0
57#define BRIDGE_OV511PLUS 1
58#define BRIDGE_OV518 2
59#define BRIDGE_OV518PLUS 3
60#define BRIDGE_OV519 4
9e4d8258
HG		 61#define BRIDGE_MASK 7
62
63 char invert_led;
64#define BRIDGE_INVERT_LED 8
49809d6a 65
6a7eba24 66 /* Determined by sensor type */
ac40b1fa 67 __u8 sif;
6a7eba24 68
ac40b1fa
JFM		 69 __u8 brightness;
70 __u8 contrast;
71 __u8 colors;
0cd6759d
JFM		 72 __u8 hflip;
73 __u8 vflip;
02ab18b0
HG		 74 __u8 autobrightness;
75 __u8 freq;
6a7eba24 76
ac40b1fa 77 __u8 stopped; /* Streaming is temporarily paused */
6a7eba24 78
1876bb92
HG		 79 __u8 frame_rate; /* current Framerate */
80 __u8 clockdiv; /* clockdiv override */
6a7eba24
JFM		 81
82 char sensor; /* Type of image sensor chip (SEN_*) */
83#define SEN_UNKNOWN 0
84#define SEN_OV6620 1
85#define SEN_OV6630 2
7d971373
HG		 86#define SEN_OV66308AF 3
87#define SEN_OV7610 4
88#define SEN_OV7620 5
89#define SEN_OV7640 6
90#define SEN_OV7670 7
91#define SEN_OV76BE 8
92#define SEN_OV8610 9
6a7eba24
JFM		 93};
94
95/* V4L2 controls supported by the driver */
96static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
97static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
98static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
99static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
100static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
101static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
0cd6759d
JFM		 102static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
103static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
104static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
105static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
02ab18b0
HG		 106static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
107static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
108static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
109static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
49809d6a
HG		 110static void setbrightness(struct gspca_dev *gspca_dev);
111static void setcontrast(struct gspca_dev *gspca_dev);
112static void setcolors(struct gspca_dev *gspca_dev);
02ab18b0
HG		 113static void setautobrightness(struct sd *sd);
114static void setfreq(struct sd *sd);
6a7eba24 115
02ab18b0 116static const struct ctrl sd_ctrls[] = {
6a7eba24
JFM		 117 {
118 {
119 .id = V4L2_CID_BRIGHTNESS,
120 .type = V4L2_CTRL_TYPE_INTEGER,
121 .name = "Brightness",
122 .minimum = 0,
123 .maximum = 255,
124 .step = 1,
594f5b8b
JFM		 125#define BRIGHTNESS_DEF 127
126 .default_value = BRIGHTNESS_DEF,
6a7eba24
JFM		 127 },
128 .set = sd_setbrightness,
129 .get = sd_getbrightness,
130 },
6a7eba24
JFM		 131 {
132 {
133 .id = V4L2_CID_CONTRAST,
134 .type = V4L2_CTRL_TYPE_INTEGER,
135 .name = "Contrast",
136 .minimum = 0,
137 .maximum = 255,
138 .step = 1,
594f5b8b
JFM		 139#define CONTRAST_DEF 127
140 .default_value = CONTRAST_DEF,
6a7eba24
JFM		 141 },
142 .set = sd_setcontrast,
143 .get = sd_getcontrast,
144 },
6a7eba24
JFM		 145 {
146 {
147 .id = V4L2_CID_SATURATION,
148 .type = V4L2_CTRL_TYPE_INTEGER,
594f5b8b 149 .name = "Color",
6a7eba24
JFM		 150 .minimum = 0,
151 .maximum = 255,
152 .step = 1,
594f5b8b
JFM		 153#define COLOR_DEF 127
154 .default_value = COLOR_DEF,
6a7eba24
JFM		 155 },
156 .set = sd_setcolors,
157 .get = sd_getcolors,
158 },
02ab18b0 159/* The flip controls work with ov7670 only */
de00448f 160#define HFLIP_IDX 3
0cd6759d
JFM		 161 {
162 {
163 .id = V4L2_CID_HFLIP,
164 .type = V4L2_CTRL_TYPE_BOOLEAN,
165 .name = "Mirror",
166 .minimum = 0,
167 .maximum = 1,
168 .step = 1,
169#define HFLIP_DEF 0
170 .default_value = HFLIP_DEF,
171 },
172 .set = sd_sethflip,
173 .get = sd_gethflip,
174 },
de00448f 175#define VFLIP_IDX 4
0cd6759d
JFM		 176 {
177 {
178 .id = V4L2_CID_VFLIP,
179 .type = V4L2_CTRL_TYPE_BOOLEAN,
180 .name = "Vflip",
181 .minimum = 0,
182 .maximum = 1,
183 .step = 1,
184#define VFLIP_DEF 0
185 .default_value = VFLIP_DEF,
186 },
187 .set = sd_setvflip,
188 .get = sd_getvflip,
189 },
02ab18b0
HG		 190#define AUTOBRIGHT_IDX 5
191 {
192 {
193 .id = V4L2_CID_AUTOBRIGHTNESS,
194 .type = V4L2_CTRL_TYPE_BOOLEAN,
195 .name = "Auto Brightness",
196 .minimum = 0,
197 .maximum = 1,
198 .step = 1,
199#define AUTOBRIGHT_DEF 1
200 .default_value = AUTOBRIGHT_DEF,
201 },
202 .set = sd_setautobrightness,
203 .get = sd_getautobrightness,
204 },
205#define FREQ_IDX 6
206 {
207 {
208 .id = V4L2_CID_POWER_LINE_FREQUENCY,
209 .type = V4L2_CTRL_TYPE_MENU,
210 .name = "Light frequency filter",
211 .minimum = 0,
212 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
213 .step = 1,
214#define FREQ_DEF 0
215 .default_value = FREQ_DEF,
216 },
217 .set = sd_setfreq,
218 .get = sd_getfreq,
219 },
220#define OV7670_FREQ_IDX 7
221 {
222 {
223 .id = V4L2_CID_POWER_LINE_FREQUENCY,
224 .type = V4L2_CTRL_TYPE_MENU,
225 .name = "Light frequency filter",
226 .minimum = 0,
227 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
228 .step = 1,
229#define OV7670_FREQ_DEF 3
230 .default_value = OV7670_FREQ_DEF,
231 },
232 .set = sd_setfreq,
233 .get = sd_getfreq,
234 },
6a7eba24
JFM		 235};
236
49809d6a 237static const struct v4l2_pix_format ov519_vga_mode[] = {
c2446b3e
JFM		 238 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
239 .bytesperline = 320,
594f5b8b 240 .sizeimage = 320 * 240 * 3 / 8 + 590,
c2446b3e
JFM		 241 .colorspace = V4L2_COLORSPACE_JPEG,
242 .priv = 1},
243 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
244 .bytesperline = 640,
245 .sizeimage = 640 * 480 * 3 / 8 + 590,
246 .colorspace = V4L2_COLORSPACE_JPEG,
247 .priv = 0},
6a7eba24 248};
49809d6a 249static const struct v4l2_pix_format ov519_sif_mode[] = {
124cc9c0
HG		 250 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
251 .bytesperline = 160,
252 .sizeimage = 160 * 120 * 3 / 8 + 590,
253 .colorspace = V4L2_COLORSPACE_JPEG,
254 .priv = 3},
c2446b3e
JFM		 255 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
256 .bytesperline = 176,
594f5b8b 257 .sizeimage = 176 * 144 * 3 / 8 + 590,
c2446b3e
JFM		 258 .colorspace = V4L2_COLORSPACE_JPEG,
259 .priv = 1},
124cc9c0
HG		 260 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
261 .bytesperline = 320,
262 .sizeimage = 320 * 240 * 3 / 8 + 590,
263 .colorspace = V4L2_COLORSPACE_JPEG,
264 .priv = 2},
c2446b3e
JFM		 265 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
266 .bytesperline = 352,
594f5b8b 267 .sizeimage = 352 * 288 * 3 / 8 + 590,
c2446b3e
JFM		 268 .colorspace = V4L2_COLORSPACE_JPEG,
269 .priv = 0},
6a7eba24
JFM		 270};
271
b282d873
HG		 272/* Note some of the sizeimage values for the ov511 / ov518 may seem
273 larger then necessary, however they need to be this big as the ov511 /
274 ov518 always fills the entire isoc frame, using 0 padding bytes when
275 it doesn't have any data. So with low framerates the amount of data
276 transfered can become quite large (libv4l will remove all the 0 padding
277 in userspace). */
49809d6a
HG		 278static const struct v4l2_pix_format ov518_vga_mode[] = {
279 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
280 .bytesperline = 320,
b282d873 281 .sizeimage = 320 * 240 * 3,
49809d6a
HG		 282 .colorspace = V4L2_COLORSPACE_JPEG,
283 .priv = 1},
284 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
285 .bytesperline = 640,
b282d873 286 .sizeimage = 640 * 480 * 2,
49809d6a
HG		 287 .colorspace = V4L2_COLORSPACE_JPEG,
288 .priv = 0},
289};
290static const struct v4l2_pix_format ov518_sif_mode[] = {
124cc9c0
HG		 291 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
292 .bytesperline = 160,
b282d873 293 .sizeimage = 70000,
124cc9c0
HG		 294 .colorspace = V4L2_COLORSPACE_JPEG,
295 .priv = 3},
49809d6a
HG		 296 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
297 .bytesperline = 176,
b282d873 298 .sizeimage = 70000,
49809d6a
HG		 299 .colorspace = V4L2_COLORSPACE_JPEG,
300 .priv = 1},
124cc9c0
HG		 301 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
302 .bytesperline = 320,
b282d873 303 .sizeimage = 320 * 240 * 3,
124cc9c0
HG		 304 .colorspace = V4L2_COLORSPACE_JPEG,
305 .priv = 2},
49809d6a
HG		 306 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
307 .bytesperline = 352,
b282d873 308 .sizeimage = 352 * 288 * 3,
49809d6a
HG		 309 .colorspace = V4L2_COLORSPACE_JPEG,
310 .priv = 0},
311};
312
1876bb92
HG		 313static const struct v4l2_pix_format ov511_vga_mode[] = {
314 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
315 .bytesperline = 320,
316 .sizeimage = 320 * 240 * 3,
317 .colorspace = V4L2_COLORSPACE_JPEG,
318 .priv = 1},
319 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
320 .bytesperline = 640,
321 .sizeimage = 640 * 480 * 2,
322 .colorspace = V4L2_COLORSPACE_JPEG,
323 .priv = 0},
324};
325static const struct v4l2_pix_format ov511_sif_mode[] = {
326 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
327 .bytesperline = 160,
b282d873 328 .sizeimage = 70000,
1876bb92
HG		 329 .colorspace = V4L2_COLORSPACE_JPEG,
330 .priv = 3},
331 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
332 .bytesperline = 176,
b282d873 333 .sizeimage = 70000,
1876bb92
HG		 334 .colorspace = V4L2_COLORSPACE_JPEG,
335 .priv = 1},
336 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
337 .bytesperline = 320,
338 .sizeimage = 320 * 240 * 3,
339 .colorspace = V4L2_COLORSPACE_JPEG,
340 .priv = 2},
341 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
342 .bytesperline = 352,
343 .sizeimage = 352 * 288 * 3,
344 .colorspace = V4L2_COLORSPACE_JPEG,
345 .priv = 0},
346};
49809d6a
HG		 347
348/* Registers common to OV511 / OV518 */
1876bb92 349#define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
49809d6a 350#define R51x_SYS_RESET 0x50
1876bb92
HG		 351 /* Reset type flags */
352 #define OV511_RESET_OMNICE 0x08
49809d6a
HG		 353#define R51x_SYS_INIT 0x53
354#define R51x_SYS_SNAP 0x52
355#define R51x_SYS_CUST_ID 0x5F
356#define R51x_COMP_LUT_BEGIN 0x80
357
358/* OV511 Camera interface register numbers */
1876bb92
HG		 359#define R511_CAM_DELAY 0x10
360#define R511_CAM_EDGE 0x11
361#define R511_CAM_PXCNT 0x12
362#define R511_CAM_LNCNT 0x13
363#define R511_CAM_PXDIV 0x14
364#define R511_CAM_LNDIV 0x15
365#define R511_CAM_UV_EN 0x16
366#define R511_CAM_LINE_MODE 0x17
367#define R511_CAM_OPTS 0x18
368
369#define R511_SNAP_FRAME 0x19
370#define R511_SNAP_PXCNT 0x1A
371#define R511_SNAP_LNCNT 0x1B
372#define R511_SNAP_PXDIV 0x1C
373#define R511_SNAP_LNDIV 0x1D
374#define R511_SNAP_UV_EN 0x1E
375#define R511_SNAP_UV_EN 0x1E
376#define R511_SNAP_OPTS 0x1F
377
378#define R511_DRAM_FLOW_CTL 0x20
379#define R511_FIFO_OPTS 0x31
380#define R511_I2C_CTL 0x40
49809d6a 381#define R511_SYS_LED_CTL 0x55 /* OV511+ only */
1876bb92
HG		 382#define R511_COMP_EN 0x78
383#define R511_COMP_LUT_EN 0x79
49809d6a
HG		 384
385/* OV518 Camera interface register numbers */
386#define R518_GPIO_OUT 0x56 /* OV518(+) only */
387#define R518_GPIO_CTL 0x57 /* OV518(+) only */
388
6a7eba24 389/* OV519 Camera interface register numbers */
ac40b1fa
JFM		 390#define OV519_R10_H_SIZE 0x10
391#define OV519_R11_V_SIZE 0x11
392#define OV519_R12_X_OFFSETL 0x12
393#define OV519_R13_X_OFFSETH 0x13
394#define OV519_R14_Y_OFFSETL 0x14
395#define OV519_R15_Y_OFFSETH 0x15
396#define OV519_R16_DIVIDER 0x16
397#define OV519_R20_DFR 0x20
398#define OV519_R25_FORMAT 0x25
6a7eba24
JFM		 399
400/* OV519 System Controller register numbers */
401#define OV519_SYS_RESET1 0x51
402#define OV519_SYS_EN_CLK1 0x54
403
404#define OV519_GPIO_DATA_OUT0 0x71
405#define OV519_GPIO_IO_CTRL0 0x72
406
407#define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
408
409/* I2C registers */
410#define R51x_I2C_W_SID 0x41
411#define R51x_I2C_SADDR_3 0x42
412#define R51x_I2C_SADDR_2 0x43
413#define R51x_I2C_R_SID 0x44
414#define R51x_I2C_DATA 0x45
415#define R518_I2C_CTL 0x47 /* OV518(+) only */
416
417/* I2C ADDRESSES */
418#define OV7xx0_SID 0x42
229bb7dc 419#define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
6a7eba24
JFM		 420#define OV8xx0_SID 0xa0
421#define OV6xx0_SID 0xc0
422
423/* OV7610 registers */
424#define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
49809d6a
HG		 425#define OV7610_REG_BLUE 0x01 /* blue channel balance */
426#define OV7610_REG_RED 0x02 /* red channel balance */
6a7eba24
JFM		 427#define OV7610_REG_SAT 0x03 /* saturation */
428#define OV8610_REG_HUE 0x04 /* 04 reserved */
429#define OV7610_REG_CNT 0x05 /* Y contrast */
430#define OV7610_REG_BRT 0x06 /* Y brightness */
431#define OV7610_REG_COM_C 0x14 /* misc common regs */
432#define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
433#define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
434#define OV7610_REG_COM_I 0x29 /* misc settings */
435
436/* OV7670 registers */
437#define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
438#define OV7670_REG_BLUE 0x01 /* blue gain */
439#define OV7670_REG_RED 0x02 /* red gain */
440#define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
441#define OV7670_REG_COM1 0x04 /* Control 1 */
442#define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
443#define OV7670_REG_COM3 0x0c /* Control 3 */
444#define OV7670_REG_COM4 0x0d /* Control 4 */
445#define OV7670_REG_COM5 0x0e /* All "reserved" */
446#define OV7670_REG_COM6 0x0f /* Control 6 */
447#define OV7670_REG_AECH 0x10 /* More bits of AEC value */
448#define OV7670_REG_CLKRC 0x11 /* Clock control */
449#define OV7670_REG_COM7 0x12 /* Control 7 */
450#define OV7670_COM7_FMT_VGA 0x00
451#define OV7670_COM7_YUV 0x00 /* YUV */
452#define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
453#define OV7670_COM7_FMT_MASK 0x38
454#define OV7670_COM7_RESET 0x80 /* Register reset */
455#define OV7670_REG_COM8 0x13 /* Control 8 */
456#define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
457#define OV7670_COM8_AWB 0x02 /* White balance enable */
458#define OV7670_COM8_AGC 0x04 /* Auto gain enable */
459#define OV7670_COM8_BFILT 0x20 /* Band filter enable */
460#define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
461#define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
462#define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
463#define OV7670_REG_COM10 0x15 /* Control 10 */
464#define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
465#define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
466#define OV7670_REG_VSTART 0x19 /* Vert start high bits */
467#define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
468#define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
0cd6759d 469#define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
6a7eba24
JFM		 470#define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
471#define OV7670_REG_AEW 0x24 /* AGC upper limit */
472#define OV7670_REG_AEB 0x25 /* AGC lower limit */
473#define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
474#define OV7670_REG_HREF 0x32 /* HREF pieces */
475#define OV7670_REG_TSLB 0x3a /* lots of stuff */
476#define OV7670_REG_COM11 0x3b /* Control 11 */
477#define OV7670_COM11_EXP 0x02
478#define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
479#define OV7670_REG_COM12 0x3c /* Control 12 */
480#define OV7670_REG_COM13 0x3d /* Control 13 */
481#define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
482#define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
483#define OV7670_REG_COM14 0x3e /* Control 14 */
484#define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
485#define OV7670_REG_COM15 0x40 /* Control 15 */
486#define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
487#define OV7670_REG_COM16 0x41 /* Control 16 */
488#define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
489#define OV7670_REG_BRIGHT 0x55 /* Brightness */
490#define OV7670_REG_CONTRAS 0x56 /* Contrast control */
491#define OV7670_REG_GFIX 0x69 /* Fix gain control */
492#define OV7670_REG_RGB444 0x8c /* RGB 444 control */
493#define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
494#define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
495#define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
496#define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
497#define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
498#define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
499#define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
500#define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
501#define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
502
4202f71c
JFM		 503struct ov_regvals {
504 __u8 reg;
505 __u8 val;
506};
507struct ov_i2c_regvals {
508 __u8 reg;
509 __u8 val;
510};
511
512static const struct ov_i2c_regvals norm_6x20[] = {
513 { 0x12, 0x80 }, /* reset */
514 { 0x11, 0x01 },
515 { 0x03, 0x60 },
516 { 0x05, 0x7f }, /* For when autoadjust is off */
517 { 0x07, 0xa8 },
518 /* The ratio of 0x0c and 0x0d controls the white point */
519 { 0x0c, 0x24 },
520 { 0x0d, 0x24 },
521 { 0x0f, 0x15 }, /* COMS */
522 { 0x10, 0x75 }, /* AEC Exposure time */
523 { 0x12, 0x24 }, /* Enable AGC */
524 { 0x14, 0x04 },
525 /* 0x16: 0x06 helps frame stability with moving objects */
526 { 0x16, 0x06 },
527/* { 0x20, 0x30 }, * Aperture correction enable */
528 { 0x26, 0xb2 }, /* BLC enable */
529 /* 0x28: 0x05 Selects RGB format if RGB on */
530 { 0x28, 0x05 },
531 { 0x2a, 0x04 }, /* Disable framerate adjust */
532/* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
ae49c404 533 { 0x2d, 0x85 },
4202f71c
JFM		 534 { 0x33, 0xa0 }, /* Color Processing Parameter */
535 { 0x34, 0xd2 }, /* Max A/D range */
536 { 0x38, 0x8b },
537 { 0x39, 0x40 },
538
539 { 0x3c, 0x39 }, /* Enable AEC mode changing */
540 { 0x3c, 0x3c }, /* Change AEC mode */
541 { 0x3c, 0x24 }, /* Disable AEC mode changing */
542
543 { 0x3d, 0x80 },
544 /* These next two registers (0x4a, 0x4b) are undocumented.
545 * They control the color balance */
546 { 0x4a, 0x80 },
547 { 0x4b, 0x80 },
548 { 0x4d, 0xd2 }, /* This reduces noise a bit */
549 { 0x4e, 0xc1 },
550 { 0x4f, 0x04 },
551/* Do 50-53 have any effect? */
552/* Toggle 0x12[2] off and on here? */
553};
554
555static const struct ov_i2c_regvals norm_6x30[] = {
556 { 0x12, 0x80 }, /* Reset */
557 { 0x00, 0x1f }, /* Gain */
558 { 0x01, 0x99 }, /* Blue gain */
559 { 0x02, 0x7c }, /* Red gain */
560 { 0x03, 0xc0 }, /* Saturation */
561 { 0x05, 0x0a }, /* Contrast */
562 { 0x06, 0x95 }, /* Brightness */
563 { 0x07, 0x2d }, /* Sharpness */
564 { 0x0c, 0x20 },
565 { 0x0d, 0x20 },
02ab18b0 566 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
4202f71c
JFM		 567 { 0x0f, 0x05 },
568 { 0x10, 0x9a },
569 { 0x11, 0x00 }, /* Pixel clock = fastest */
570 { 0x12, 0x24 }, /* Enable AGC and AWB */
571 { 0x13, 0x21 },
572 { 0x14, 0x80 },
573 { 0x15, 0x01 },
574 { 0x16, 0x03 },
575 { 0x17, 0x38 },
576 { 0x18, 0xea },
577 { 0x19, 0x04 },
578 { 0x1a, 0x93 },
579 { 0x1b, 0x00 },
580 { 0x1e, 0xc4 },
581 { 0x1f, 0x04 },
582 { 0x20, 0x20 },
583 { 0x21, 0x10 },
584 { 0x22, 0x88 },
585 { 0x23, 0xc0 }, /* Crystal circuit power level */
586 { 0x25, 0x9a }, /* Increase AEC black ratio */
587 { 0x26, 0xb2 }, /* BLC enable */
588 { 0x27, 0xa2 },
589 { 0x28, 0x00 },
590 { 0x29, 0x00 },
591 { 0x2a, 0x84 }, /* 60 Hz power */
592 { 0x2b, 0xa8 }, /* 60 Hz power */
593 { 0x2c, 0xa0 },
594 { 0x2d, 0x95 }, /* Enable auto-brightness */
595 { 0x2e, 0x88 },
596 { 0x33, 0x26 },
597 { 0x34, 0x03 },
598 { 0x36, 0x8f },
599 { 0x37, 0x80 },
600 { 0x38, 0x83 },
601 { 0x39, 0x80 },
602 { 0x3a, 0x0f },
603 { 0x3b, 0x3c },
604 { 0x3c, 0x1a },
605 { 0x3d, 0x80 },
606 { 0x3e, 0x80 },
607 { 0x3f, 0x0e },
608 { 0x40, 0x00 }, /* White bal */
609 { 0x41, 0x00 }, /* White bal */
610 { 0x42, 0x80 },
611 { 0x43, 0x3f }, /* White bal */
612 { 0x44, 0x80 },
613 { 0x45, 0x20 },
614 { 0x46, 0x20 },
615 { 0x47, 0x80 },
616 { 0x48, 0x7f },
617 { 0x49, 0x00 },
618 { 0x4a, 0x00 },
619 { 0x4b, 0x80 },
620 { 0x4c, 0xd0 },
621 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
622 { 0x4e, 0x40 },
623 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
624 { 0x50, 0xff },
625 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
626 { 0x55, 0xff },
627 { 0x56, 0x12 },
628 { 0x57, 0x81 },
629 { 0x58, 0x75 },
630 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
631 { 0x5a, 0x2c },
632 { 0x5b, 0x0f }, /* AWB chrominance levels */
633 { 0x5c, 0x10 },
634 { 0x3d, 0x80 },
635 { 0x27, 0xa6 },
636 { 0x12, 0x20 }, /* Toggle AWB */
637 { 0x12, 0x24 },
638};
639
640/* Lawrence Glaister <lg@jfm.bc.ca> reports:
641 *
642 * Register 0x0f in the 7610 has the following effects:
643 *
644 * 0x85 (AEC method 1): Best overall, good contrast range
645 * 0x45 (AEC method 2): Very overexposed
646 * 0xa5 (spec sheet default): Ok, but the black level is
647 * shifted resulting in loss of contrast
648 * 0x05 (old driver setting): very overexposed, too much
649 * contrast
650 */
651static const struct ov_i2c_regvals norm_7610[] = {
652 { 0x10, 0xff },
653 { 0x16, 0x06 },
654 { 0x28, 0x24 },
655 { 0x2b, 0xac },
656 { 0x12, 0x00 },
657 { 0x38, 0x81 },
658 { 0x28, 0x24 }, /* 0c */
659 { 0x0f, 0x85 }, /* lg's setting */
660 { 0x15, 0x01 },
661 { 0x20, 0x1c },
662 { 0x23, 0x2a },
663 { 0x24, 0x10 },
664 { 0x25, 0x8a },
665 { 0x26, 0xa2 },
666 { 0x27, 0xc2 },
667 { 0x2a, 0x04 },
668 { 0x2c, 0xfe },
669 { 0x2d, 0x93 },
670 { 0x30, 0x71 },
671 { 0x31, 0x60 },
672 { 0x32, 0x26 },
673 { 0x33, 0x20 },
674 { 0x34, 0x48 },
675 { 0x12, 0x24 },
676 { 0x11, 0x01 },
677 { 0x0c, 0x24 },
678 { 0x0d, 0x24 },
679};
680
681static const struct ov_i2c_regvals norm_7620[] = {
682 { 0x00, 0x00 }, /* gain */
683 { 0x01, 0x80 }, /* blue gain */
684 { 0x02, 0x80 }, /* red gain */
685 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
686 { 0x06, 0x60 },
687 { 0x07, 0x00 },
688 { 0x0c, 0x24 },
689 { 0x0c, 0x24 },
690 { 0x0d, 0x24 },
691 { 0x11, 0x01 },
692 { 0x12, 0x24 },
693 { 0x13, 0x01 },
694 { 0x14, 0x84 },
695 { 0x15, 0x01 },
696 { 0x16, 0x03 },
697 { 0x17, 0x2f },
698 { 0x18, 0xcf },
699 { 0x19, 0x06 },
700 { 0x1a, 0xf5 },
701 { 0x1b, 0x00 },
702 { 0x20, 0x18 },
703 { 0x21, 0x80 },
704 { 0x22, 0x80 },
705 { 0x23, 0x00 },
706 { 0x26, 0xa2 },
707 { 0x27, 0xea },
b282d873 708 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
4202f71c
JFM		 709 { 0x29, 0x00 },
710 { 0x2a, 0x10 },
711 { 0x2b, 0x00 },
712 { 0x2c, 0x88 },
713 { 0x2d, 0x91 },
714 { 0x2e, 0x80 },
715 { 0x2f, 0x44 },
716 { 0x60, 0x27 },
717 { 0x61, 0x02 },
718 { 0x62, 0x5f },
719 { 0x63, 0xd5 },
720 { 0x64, 0x57 },
721 { 0x65, 0x83 },
722 { 0x66, 0x55 },
723 { 0x67, 0x92 },
724 { 0x68, 0xcf },
725 { 0x69, 0x76 },
726 { 0x6a, 0x22 },
727 { 0x6b, 0x00 },
728 { 0x6c, 0x02 },
729 { 0x6d, 0x44 },
730 { 0x6e, 0x80 },
731 { 0x6f, 0x1d },
732 { 0x70, 0x8b },
733 { 0x71, 0x00 },
734 { 0x72, 0x14 },
735 { 0x73, 0x54 },
736 { 0x74, 0x00 },
737 { 0x75, 0x8e },
738 { 0x76, 0x00 },
739 { 0x77, 0xff },
740 { 0x78, 0x80 },
741 { 0x79, 0x80 },
742 { 0x7a, 0x80 },
743 { 0x7b, 0xe2 },
744 { 0x7c, 0x00 },
745};
746
747/* 7640 and 7648. The defaults should be OK for most registers. */
748static const struct ov_i2c_regvals norm_7640[] = {
749 { 0x12, 0x80 },
750 { 0x12, 0x14 },
751};
752
753/* 7670. Defaults taken from OmniVision provided data,
754* as provided by Jonathan Corbet of OLPC */
755static const struct ov_i2c_regvals norm_7670[] = {
756 { OV7670_REG_COM7, OV7670_COM7_RESET },
757 { OV7670_REG_TSLB, 0x04 }, /* OV */
758 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
759 { OV7670_REG_CLKRC, 0x01 },
760/*
761 * Set the hardware window. These values from OV don't entirely
762 * make sense - hstop is less than hstart. But they work...
763 */
764 { OV7670_REG_HSTART, 0x13 },
765 { OV7670_REG_HSTOP, 0x01 },
766 { OV7670_REG_HREF, 0xb6 },
767 { OV7670_REG_VSTART, 0x02 },
768 { OV7670_REG_VSTOP, 0x7a },
769 { OV7670_REG_VREF, 0x0a },
770
ac40b1fa
JFM		 771 { OV7670_REG_COM3, 0x00 },
772 { OV7670_REG_COM14, 0x00 },
4202f71c
JFM		 773/* Mystery scaling numbers */
774 { 0x70, 0x3a },
775 { 0x71, 0x35 },
776 { 0x72, 0x11 },
777 { 0x73, 0xf0 },
778 { 0xa2, 0x02 },
779/* { OV7670_REG_COM10, 0x0 }, */
780
781/* Gamma curve values */
782 { 0x7a, 0x20 },
783 { 0x7b, 0x10 },
784 { 0x7c, 0x1e },
785 { 0x7d, 0x35 },
786 { 0x7e, 0x5a },
787 { 0x7f, 0x69 },
788 { 0x80, 0x76 },
789 { 0x81, 0x80 },
790 { 0x82, 0x88 },
791 { 0x83, 0x8f },
792 { 0x84, 0x96 },
793 { 0x85, 0xa3 },
794 { 0x86, 0xaf },
795 { 0x87, 0xc4 },
796 { 0x88, 0xd7 },
797 { 0x89, 0xe8 },
798
799/* AGC and AEC parameters. Note we start by disabling those features,
800 then turn them only after tweaking the values. */
801 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
802 | OV7670_COM8_AECSTEP
803 | OV7670_COM8_BFILT },
ac40b1fa
JFM		 804 { OV7670_REG_GAIN, 0x00 },
805 { OV7670_REG_AECH, 0x00 },
4202f71c
JFM		 806 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
807 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
808 { OV7670_REG_BD50MAX, 0x05 },
809 { OV7670_REG_BD60MAX, 0x07 },
810 { OV7670_REG_AEW, 0x95 },
811 { OV7670_REG_AEB, 0x33 },
812 { OV7670_REG_VPT, 0xe3 },
813 { OV7670_REG_HAECC1, 0x78 },
814 { OV7670_REG_HAECC2, 0x68 },
815 { 0xa1, 0x03 }, /* magic */
816 { OV7670_REG_HAECC3, 0xd8 },
817 { OV7670_REG_HAECC4, 0xd8 },
818 { OV7670_REG_HAECC5, 0xf0 },
819 { OV7670_REG_HAECC6, 0x90 },
820 { OV7670_REG_HAECC7, 0x94 },
821 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
822 | OV7670_COM8_AECSTEP
823 | OV7670_COM8_BFILT
824 | OV7670_COM8_AGC
825 | OV7670_COM8_AEC },
826
827/* Almost all of these are magic "reserved" values. */
828 { OV7670_REG_COM5, 0x61 },
829 { OV7670_REG_COM6, 0x4b },
830 { 0x16, 0x02 },
831 { OV7670_REG_MVFP, 0x07 },
832 { 0x21, 0x02 },
833 { 0x22, 0x91 },
834 { 0x29, 0x07 },
835 { 0x33, 0x0b },
836 { 0x35, 0x0b },
837 { 0x37, 0x1d },
838 { 0x38, 0x71 },
839 { 0x39, 0x2a },
840 { OV7670_REG_COM12, 0x78 },
841 { 0x4d, 0x40 },
842 { 0x4e, 0x20 },
ac40b1fa 843 { OV7670_REG_GFIX, 0x00 },
4202f71c
JFM		 844 { 0x6b, 0x4a },
845 { 0x74, 0x10 },
846 { 0x8d, 0x4f },
ac40b1fa
JFM		 847 { 0x8e, 0x00 },
848 { 0x8f, 0x00 },
849 { 0x90, 0x00 },
850 { 0x91, 0x00 },
851 { 0x96, 0x00 },
852 { 0x9a, 0x00 },
4202f71c
JFM		 853 { 0xb0, 0x84 },
854 { 0xb1, 0x0c },
855 { 0xb2, 0x0e },
856 { 0xb3, 0x82 },
857 { 0xb8, 0x0a },
858
859/* More reserved magic, some of which tweaks white balance */
860 { 0x43, 0x0a },
861 { 0x44, 0xf0 },
862 { 0x45, 0x34 },
863 { 0x46, 0x58 },
864 { 0x47, 0x28 },
865 { 0x48, 0x3a },
866 { 0x59, 0x88 },
867 { 0x5a, 0x88 },
868 { 0x5b, 0x44 },
869 { 0x5c, 0x67 },
870 { 0x5d, 0x49 },
871 { 0x5e, 0x0e },
872 { 0x6c, 0x0a },
873 { 0x6d, 0x55 },
874 { 0x6e, 0x11 },
875 { 0x6f, 0x9f },
876 /* "9e for advance AWB" */
877 { 0x6a, 0x40 },
878 { OV7670_REG_BLUE, 0x40 },
879 { OV7670_REG_RED, 0x60 },
880 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
881 | OV7670_COM8_AECSTEP
882 | OV7670_COM8_BFILT
883 | OV7670_COM8_AGC
884 | OV7670_COM8_AEC
885 | OV7670_COM8_AWB },
886
887/* Matrix coefficients */
888 { 0x4f, 0x80 },
889 { 0x50, 0x80 },
ac40b1fa 890 { 0x51, 0x00 },
4202f71c
JFM		 891 { 0x52, 0x22 },
892 { 0x53, 0x5e },
893 { 0x54, 0x80 },
894 { 0x58, 0x9e },
895
896 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
ac40b1fa 897 { OV7670_REG_EDGE, 0x00 },
4202f71c
JFM		 898 { 0x75, 0x05 },
899 { 0x76, 0xe1 },
ac40b1fa 900 { 0x4c, 0x00 },
4202f71c
JFM		 901 { 0x77, 0x01 },
902 { OV7670_REG_COM13, OV7670_COM13_GAMMA
903 | OV7670_COM13_UVSAT
904 | 2}, /* was 3 */
905 { 0x4b, 0x09 },
906 { 0xc9, 0x60 },
907 { OV7670_REG_COM16, 0x38 },
908 { 0x56, 0x40 },
909
910 { 0x34, 0x11 },
911 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
912 { 0xa4, 0x88 },
ac40b1fa 913 { 0x96, 0x00 },
4202f71c
JFM		 914 { 0x97, 0x30 },
915 { 0x98, 0x20 },
916 { 0x99, 0x30 },
917 { 0x9a, 0x84 },
918 { 0x9b, 0x29 },
919 { 0x9c, 0x03 },
920 { 0x9d, 0x4c },
921 { 0x9e, 0x3f },
922 { 0x78, 0x04 },
923
924/* Extra-weird stuff. Some sort of multiplexor register */
925 { 0x79, 0x01 },
926 { 0xc8, 0xf0 },
927 { 0x79, 0x0f },
928 { 0xc8, 0x00 },
929 { 0x79, 0x10 },
930 { 0xc8, 0x7e },
931 { 0x79, 0x0a },
932 { 0xc8, 0x80 },
933 { 0x79, 0x0b },
934 { 0xc8, 0x01 },
935 { 0x79, 0x0c },
936 { 0xc8, 0x0f },
937 { 0x79, 0x0d },
938 { 0xc8, 0x20 },
939 { 0x79, 0x09 },
940 { 0xc8, 0x80 },
941 { 0x79, 0x02 },
942 { 0xc8, 0xc0 },
943 { 0x79, 0x03 },
944 { 0xc8, 0x40 },
945 { 0x79, 0x05 },
946 { 0xc8, 0x30 },
947 { 0x79, 0x26 },
948};
949
950static const struct ov_i2c_regvals norm_8610[] = {
951 { 0x12, 0x80 },
952 { 0x00, 0x00 },
953 { 0x01, 0x80 },
954 { 0x02, 0x80 },
955 { 0x03, 0xc0 },
956 { 0x04, 0x30 },
957 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
958 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
959 { 0x0a, 0x86 },
960 { 0x0b, 0xb0 },
961 { 0x0c, 0x20 },
962 { 0x0d, 0x20 },
963 { 0x11, 0x01 },
964 { 0x12, 0x25 },
965 { 0x13, 0x01 },
966 { 0x14, 0x04 },
967 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
968 { 0x16, 0x03 },
969 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
970 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
971 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
972 { 0x1a, 0xf5 },
973 { 0x1b, 0x00 },
974 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
975 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
976 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
977 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
978 { 0x26, 0xa2 },
979 { 0x27, 0xea },
980 { 0x28, 0x00 },
981 { 0x29, 0x00 },
982 { 0x2a, 0x80 },
983 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
984 { 0x2c, 0xac },
985 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
986 { 0x2e, 0x80 },
987 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
988 { 0x4c, 0x00 },
989 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
990 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
991 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
992 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
993 { 0x63, 0xff },
994 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
995 * maybe thats wrong */
996 { 0x65, 0x00 },
997 { 0x66, 0x55 },
998 { 0x67, 0xb0 },
999 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1000 { 0x69, 0x02 },
1001 { 0x6a, 0x22 },
1002 { 0x6b, 0x00 },
1003 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1004 * deleting bit7 colors the first images red */
1005 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1006 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1007 { 0x6f, 0x01 },
1008 { 0x70, 0x8b },
1009 { 0x71, 0x00 },
1010 { 0x72, 0x14 },
1011 { 0x73, 0x54 },
1012 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1013 { 0x75, 0x0e },
1014 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1015 { 0x77, 0xff },
1016 { 0x78, 0x80 },
1017 { 0x79, 0x80 },
1018 { 0x7a, 0x80 },
1019 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1020 { 0x7c, 0x00 },
1021 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1022 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1023 { 0x7f, 0xfb },
1024 { 0x80, 0x28 },
1025 { 0x81, 0x00 },
1026 { 0x82, 0x23 },
1027 { 0x83, 0x0b },
1028 { 0x84, 0x00 },
1029 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1030 { 0x86, 0xc9 },
1031 { 0x87, 0x00 },
1032 { 0x88, 0x00 },
1033 { 0x89, 0x01 },
1034 { 0x12, 0x20 },
1035 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1036};
1037
6a7eba24
JFM		 1038static unsigned char ov7670_abs_to_sm(unsigned char v)
1039{
1040 if (v > 127)
1041 return v & 0x7f;
1042 return (128 - v) | 0x80;
1043}
1044
1045/* Write a OV519 register */
1046static int reg_w(struct sd *sd, __u16 index, __u8 value)
1047{
1048 int ret;
49809d6a 1049 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 2 : 1;
6a7eba24 1050
739570bb 1051 sd->gspca_dev.usb_buf[0] = value;
6a7eba24
JFM		 1052 ret = usb_control_msg(sd->gspca_dev.dev,
1053 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 1054 req,
6a7eba24
JFM		 1055 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1056 0, index,
739570bb 1057 sd->gspca_dev.usb_buf, 1, 500);
6a7eba24
JFM		 1058 if (ret < 0)
1059 PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
1060 return ret;
1061}
1062
1063/* Read from a OV519 register */
1064/* returns: negative is error, pos or zero is data */
1065static int reg_r(struct sd *sd, __u16 index)
1066{
1067 int ret;
49809d6a 1068 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 3 : 1;
6a7eba24
JFM		 1069
1070 ret = usb_control_msg(sd->gspca_dev.dev,
1071 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 1072 req,
6a7eba24 1073 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 1074 0, index, sd->gspca_dev.usb_buf, 1, 500);
6a7eba24
JFM		 1075
1076 if (ret >= 0)
739570bb 1077 ret = sd->gspca_dev.usb_buf[0];
6a7eba24
JFM		 1078 else
1079 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1080 return ret;
1081}
1082
1083/* Read 8 values from a OV519 register */
1084static int reg_r8(struct sd *sd,
a5ae2062 1085 __u16 index)
6a7eba24
JFM		 1086{
1087 int ret;
6a7eba24
JFM		 1088
1089 ret = usb_control_msg(sd->gspca_dev.dev,
1090 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1091 1, /* REQ_IO */
1092 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 1093 0, index, sd->gspca_dev.usb_buf, 8, 500);
6a7eba24
JFM		 1094
1095 if (ret >= 0)
739570bb 1096 ret = sd->gspca_dev.usb_buf[0];
6a7eba24
JFM		 1097 else
1098 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1099 return ret;
1100}
1101
1102/*
1103 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1104 * the same position as 1's in "mask" are cleared and set to "value". Bits
1105 * that are in the same position as 0's in "mask" are preserved, regardless
1106 * of their respective state in "value".
1107 */
1108static int reg_w_mask(struct sd *sd,
1109 __u16 index,
1110 __u8 value,
1111 __u8 mask)
1112{
1113 int ret;
1114 __u8 oldval;
1115
1116 if (mask != 0xff) {
1117 value &= mask; /* Enforce mask on value */
1118 ret = reg_r(sd, index);
1119 if (ret < 0)
1120 return ret;
1121
1122 oldval = ret & ~mask; /* Clear the masked bits */
1123 value |= oldval; /* Set the desired bits */
1124 }
1125 return reg_w(sd, index, value);
1126}
1127
49809d6a
HG		 1128/*
1129 * Writes multiple (n) byte value to a single register. Only valid with certain
1130 * registers (0x30 and 0xc4 - 0xce).
1131 */
1132static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1133{
1134 int ret;
1135
1136 *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1137
1138 ret = usb_control_msg(sd->gspca_dev.dev,
1139 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1140 1 /* REG_IO */,
1141 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1142 0, index,
1143 sd->gspca_dev.usb_buf, n, 500);
1144 if (ret < 0)
1145 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1146 return ret;
1147}
1148
1876bb92
HG		 1149static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
1150{
1151 int rc, retries;
1152
1153 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1154
1155 /* Three byte write cycle */
1156 for (retries = 6; ; ) {
1157 /* Select camera register */
1158 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1159 if (rc < 0)
1160 return rc;
1161
1162 /* Write "value" to I2C data port of OV511 */
1163 rc = reg_w(sd, R51x_I2C_DATA, value);
1164 if (rc < 0)
1165 return rc;
1166
1167 /* Initiate 3-byte write cycle */
1168 rc = reg_w(sd, R511_I2C_CTL, 0x01);
1169 if (rc < 0)
1170 return rc;
1171
1172 do
1173 rc = reg_r(sd, R511_I2C_CTL);
1174 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1175
1176 if (rc < 0)
1177 return rc;
1178
1179 if ((rc & 2) == 0) /* Ack? */
1180 break;
1181 if (--retries < 0) {
1182 PDEBUG(D_USBO, "i2c write retries exhausted");
1183 return -1;
1184 }
1185 }
1186
1187 return 0;
1188}
1189
1190static int ov511_i2c_r(struct sd *sd, __u8 reg)
1191{
1192 int rc, value, retries;
1193
1194 /* Two byte write cycle */
1195 for (retries = 6; ; ) {
1196 /* Select camera register */
1197 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
1198 if (rc < 0)
1199 return rc;
1200
1201 /* Initiate 2-byte write cycle */
1202 rc = reg_w(sd, R511_I2C_CTL, 0x03);
1203 if (rc < 0)
1204 return rc;
1205
1206 do
1207 rc = reg_r(sd, R511_I2C_CTL);
1208 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1209
1210 if (rc < 0)
1211 return rc;
1212
1213 if ((rc & 2) == 0) /* Ack? */
1214 break;
1215
1216 /* I2C abort */
1217 reg_w(sd, R511_I2C_CTL, 0x10);
1218
1219 if (--retries < 0) {
1220 PDEBUG(D_USBI, "i2c write retries exhausted");
1221 return -1;
1222 }
1223 }
1224
1225 /* Two byte read cycle */
1226 for (retries = 6; ; ) {
1227 /* Initiate 2-byte read cycle */
1228 rc = reg_w(sd, R511_I2C_CTL, 0x05);
1229 if (rc < 0)
1230 return rc;
1231
1232 do
1233 rc = reg_r(sd, R511_I2C_CTL);
1234 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1235
1236 if (rc < 0)
1237 return rc;
1238
1239 if ((rc & 2) == 0) /* Ack? */
1240 break;
1241
1242 /* I2C abort */
1243 rc = reg_w(sd, R511_I2C_CTL, 0x10);
1244 if (rc < 0)
1245 return rc;
1246
1247 if (--retries < 0) {
1248 PDEBUG(D_USBI, "i2c read retries exhausted");
1249 return -1;
1250 }
1251 }
1252
1253 value = reg_r(sd, R51x_I2C_DATA);
1254
1255 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
1256
1257 /* This is needed to make i2c_w() work */
1258 rc = reg_w(sd, R511_I2C_CTL, 0x05);
1259 if (rc < 0)
1260 return rc;
1261
1262 return value;
1263}
49809d6a 1264
6a7eba24
JFM		 1265/*
1266 * The OV518 I2C I/O procedure is different, hence, this function.
1267 * This is normally only called from i2c_w(). Note that this function
1268 * always succeeds regardless of whether the sensor is present and working.
1269 */
1876bb92 1270static int ov518_i2c_w(struct sd *sd,
6a7eba24
JFM		 1271 __u8 reg,
1272 __u8 value)
1273{
1274 int rc;
1275
1276 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1277
1278 /* Select camera register */
1279 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1280 if (rc < 0)
1281 return rc;
1282
1283 /* Write "value" to I2C data port of OV511 */
1284 rc = reg_w(sd, R51x_I2C_DATA, value);
1285 if (rc < 0)
1286 return rc;
1287
1288 /* Initiate 3-byte write cycle */
1289 rc = reg_w(sd, R518_I2C_CTL, 0x01);
ac40b1fa
JFM		 1290 if (rc < 0)
1291 return rc;
6a7eba24
JFM		 1292
1293 /* wait for write complete */
1294 msleep(4);
6a7eba24
JFM		 1295 return reg_r8(sd, R518_I2C_CTL);
1296}
1297
1298/*
1299 * returns: negative is error, pos or zero is data
1300 *
1301 * The OV518 I2C I/O procedure is different, hence, this function.
1302 * This is normally only called from i2c_r(). Note that this function
1303 * always succeeds regardless of whether the sensor is present and working.
1304 */
1876bb92 1305static int ov518_i2c_r(struct sd *sd, __u8 reg)
6a7eba24
JFM		 1306{
1307 int rc, value;
1308
1309 /* Select camera register */
1310 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
1311 if (rc < 0)
1312 return rc;
1313
1314 /* Initiate 2-byte write cycle */
1315 rc = reg_w(sd, R518_I2C_CTL, 0x03);
1316 if (rc < 0)
1317 return rc;
1318
1319 /* Initiate 2-byte read cycle */
1320 rc = reg_w(sd, R518_I2C_CTL, 0x05);
1321 if (rc < 0)
1322 return rc;
1323 value = reg_r(sd, R51x_I2C_DATA);
1324 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
1325 return value;
1326}
1327
1876bb92
HG		 1328static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
1329{
1330 switch (sd->bridge) {
1331 case BRIDGE_OV511:
1332 case BRIDGE_OV511PLUS:
1333 return ov511_i2c_w(sd, reg, value);
1334 case BRIDGE_OV518:
1335 case BRIDGE_OV518PLUS:
1336 case BRIDGE_OV519:
1337 return ov518_i2c_w(sd, reg, value);
1338 }
1339 return -1; /* Should never happen */
1340}
1341
1342static int i2c_r(struct sd *sd, __u8 reg)
1343{
1344 switch (sd->bridge) {
1345 case BRIDGE_OV511:
1346 case BRIDGE_OV511PLUS:
1347 return ov511_i2c_r(sd, reg);
1348 case BRIDGE_OV518:
1349 case BRIDGE_OV518PLUS:
1350 case BRIDGE_OV519:
1351 return ov518_i2c_r(sd, reg);
1352 }
1353 return -1; /* Should never happen */
1354}
1355
6a7eba24
JFM		 1356/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
1357 * the same position as 1's in "mask" are cleared and set to "value". Bits
1358 * that are in the same position as 0's in "mask" are preserved, regardless
1359 * of their respective state in "value".
1360 */
1361static int i2c_w_mask(struct sd *sd,
1362 __u8 reg,
1363 __u8 value,
1364 __u8 mask)
1365{
1366 int rc;
1367 __u8 oldval;
1368
1369 value &= mask; /* Enforce mask on value */
1370 rc = i2c_r(sd, reg);
1371 if (rc < 0)
1372 return rc;
1373 oldval = rc & ~mask; /* Clear the masked bits */
1374 value |= oldval; /* Set the desired bits */
1375 return i2c_w(sd, reg, value);
1376}
1377
1378/* Temporarily stops OV511 from functioning. Must do this before changing
1379 * registers while the camera is streaming */
1380static inline int ov51x_stop(struct sd *sd)
1381{
1382 PDEBUG(D_STREAM, "stopping");
1383 sd->stopped = 1;
49809d6a
HG		 1384 switch (sd->bridge) {
1385 case BRIDGE_OV511:
1386 case BRIDGE_OV511PLUS:
1387 return reg_w(sd, R51x_SYS_RESET, 0x3d);
1388 case BRIDGE_OV518:
1389 case BRIDGE_OV518PLUS:
1390 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
1391 case BRIDGE_OV519:
1392 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
1393 }
1394
1395 return 0;
6a7eba24
JFM		 1396}
1397
1398/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
1399 * actually stopped (for performance). */
1400static inline int ov51x_restart(struct sd *sd)
1401{
49809d6a
HG		 1402 int rc;
1403
6a7eba24
JFM		 1404 PDEBUG(D_STREAM, "restarting");
1405 if (!sd->stopped)
1406 return 0;
1407 sd->stopped = 0;
1408
1409 /* Reinitialize the stream */
49809d6a
HG		 1410 switch (sd->bridge) {
1411 case BRIDGE_OV511:
1412 case BRIDGE_OV511PLUS:
1413 return reg_w(sd, R51x_SYS_RESET, 0x00);
1414 case BRIDGE_OV518:
1415 case BRIDGE_OV518PLUS:
1416 rc = reg_w(sd, 0x2f, 0x80);
1417 if (rc < 0)
1418 return rc;
1419 return reg_w(sd, R51x_SYS_RESET, 0x00);
1420 case BRIDGE_OV519:
1421 return reg_w(sd, OV519_SYS_RESET1, 0x00);
1422 }
1423
1424 return 0;
6a7eba24
JFM		 1425}
1426
229bb7dc
HG		 1427static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
1428
6a7eba24
JFM		 1429/* This does an initial reset of an OmniVision sensor and ensures that I2C
1430 * is synchronized. Returns <0 on failure.
1431 */
229bb7dc 1432static int init_ov_sensor(struct sd *sd, __u8 slave)
6a7eba24 1433{
ac40b1fa 1434 int i;
6a7eba24 1435
229bb7dc
HG		 1436 if (ov51x_set_slave_ids(sd, slave) < 0)
1437 return -EIO;
1438
6a7eba24
JFM		 1439 /* Reset the sensor */
1440 if (i2c_w(sd, 0x12, 0x80) < 0)
1441 return -EIO;
1442
1443 /* Wait for it to initialize */
1444 msleep(150);
1445
ac40b1fa 1446 for (i = 0; i < i2c_detect_tries; i++) {
6a7eba24
JFM		 1447 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
1448 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
ac40b1fa
JFM		 1449 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
1450 return 0;
6a7eba24
JFM		 1451 }
1452
1453 /* Reset the sensor */
1454 if (i2c_w(sd, 0x12, 0x80) < 0)
1455 return -EIO;
1456 /* Wait for it to initialize */
1457 msleep(150);
1458 /* Dummy read to sync I2C */
1459 if (i2c_r(sd, 0x00) < 0)
1460 return -EIO;
1461 }
ac40b1fa 1462 return -EIO;
6a7eba24
JFM		 1463}
1464
6a7eba24
JFM		 1465/* Set the read and write slave IDs. The "slave" argument is the write slave,
1466 * and the read slave will be set to (slave + 1).
1467 * This should not be called from outside the i2c I/O functions.
1468 * Sets I2C read and write slave IDs. Returns <0 for error
1469 */
1470static int ov51x_set_slave_ids(struct sd *sd,
1471 __u8 slave)
1472{
1473 int rc;
1474
1475 rc = reg_w(sd, R51x_I2C_W_SID, slave);
1476 if (rc < 0)
1477 return rc;
1478 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
1479}
1480
6a7eba24 1481static int write_regvals(struct sd *sd,
a5ae2062 1482 const struct ov_regvals *regvals,
6a7eba24
JFM		 1483 int n)
1484{
1485 int rc;
1486
1487 while (--n >= 0) {
1488 rc = reg_w(sd, regvals->reg, regvals->val);
1489 if (rc < 0)
1490 return rc;
1491 regvals++;
1492 }
1493 return 0;
1494}
1495
1496static int write_i2c_regvals(struct sd *sd,
a5ae2062 1497 const struct ov_i2c_regvals *regvals,
6a7eba24
JFM		 1498 int n)
1499{
1500 int rc;
1501
1502 while (--n >= 0) {
1503 rc = i2c_w(sd, regvals->reg, regvals->val);
1504 if (rc < 0)
1505 return rc;
1506 regvals++;
1507 }
1508 return 0;
1509}
1510
1511/****************************************************************************
1512 *
1513 * OV511 and sensor configuration
1514 *
1515 ***************************************************************************/
1516
1517/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
1518 * the same register settings as the OV8610, since they are very similar.
1519 */
1520static int ov8xx0_configure(struct sd *sd)
1521{
1522 int rc;
6a7eba24
JFM		 1523
1524 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
1525
6a7eba24
JFM		 1526 /* Detect sensor (sub)type */
1527 rc = i2c_r(sd, OV7610_REG_COM_I);
1528 if (rc < 0) {
1529 PDEBUG(D_ERR, "Error detecting sensor type");
1530 return -1;
1531 }
1532 if ((rc & 3) == 1) {
6a7eba24
JFM		 1533 sd->sensor = SEN_OV8610;
1534 } else {
1535 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1536 return -1;
1537 }
6a7eba24
JFM		 1538
1539 /* Set sensor-specific vars */
6a7eba24
JFM		 1540 return 0;
1541}
1542
1543/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
1544 * the same register settings as the OV7610, since they are very similar.
1545 */
1546static int ov7xx0_configure(struct sd *sd)
1547{
1548 int rc, high, low;
1549
6a7eba24
JFM		 1550
1551 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
1552
6a7eba24
JFM		 1553 /* Detect sensor (sub)type */
1554 rc = i2c_r(sd, OV7610_REG_COM_I);
1555
1556 /* add OV7670 here
1557 * it appears to be wrongly detected as a 7610 by default */
1558 if (rc < 0) {
1559 PDEBUG(D_ERR, "Error detecting sensor type");
1560 return -1;
1561 }
1562 if ((rc & 3) == 3) {
1563 /* quick hack to make OV7670s work */
1564 high = i2c_r(sd, 0x0a);
1565 low = i2c_r(sd, 0x0b);
1566 /* info("%x, %x", high, low); */
1567 if (high == 0x76 && low == 0x73) {
1568 PDEBUG(D_PROBE, "Sensor is an OV7670");
1569 sd->sensor = SEN_OV7670;
1570 } else {
1571 PDEBUG(D_PROBE, "Sensor is an OV7610");
1572 sd->sensor = SEN_OV7610;
1573 }
1574 } else if ((rc & 3) == 1) {
1575 /* I don't know what's different about the 76BE yet. */
b282d873 1576 if (i2c_r(sd, 0x15) & 1) {
6a7eba24 1577 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
b282d873
HG		 1578 sd->sensor = SEN_OV7620;
1579 } else {
6a7eba24 1580 PDEBUG(D_PROBE, "Sensor is an OV76BE");
b282d873
HG		 1581 sd->sensor = SEN_OV76BE;
1582 }
6a7eba24
JFM		 1583 } else if ((rc & 3) == 0) {
1584 /* try to read product id registers */
1585 high = i2c_r(sd, 0x0a);
1586 if (high < 0) {
1587 PDEBUG(D_ERR, "Error detecting camera chip PID");
1588 return high;
1589 }
1590 low = i2c_r(sd, 0x0b);
1591 if (low < 0) {
1592 PDEBUG(D_ERR, "Error detecting camera chip VER");
1593 return low;
1594 }
1595 if (high == 0x76) {
594f5b8b
JFM		 1596 switch (low) {
1597 case 0x30:
6a7eba24 1598 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
4202f71c
JFM		 1599 PDEBUG(D_ERR,
1600 "7630 is not supported by this driver");
1601 return -1;
594f5b8b 1602 case 0x40:
6a7eba24
JFM		 1603 PDEBUG(D_PROBE, "Sensor is an OV7645");
1604 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 1605 break;
1606 case 0x45:
6a7eba24
JFM		 1607 PDEBUG(D_PROBE, "Sensor is an OV7645B");
1608 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 1609 break;
1610 case 0x48:
6a7eba24
JFM		 1611 PDEBUG(D_PROBE, "Sensor is an OV7648");
1612 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 1613 break;
1614 default:
1615 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
6a7eba24
JFM		 1616 return -1;
1617 }
1618 } else {
1619 PDEBUG(D_PROBE, "Sensor is an OV7620");
1620 sd->sensor = SEN_OV7620;
1621 }
1622 } else {
1623 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1624 return -1;
1625 }
1626
6a7eba24 1627 /* Set sensor-specific vars */
6a7eba24
JFM		 1628 return 0;
1629}
1630
1631/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
1632static int ov6xx0_configure(struct sd *sd)
1633{
1634 int rc;
4202f71c 1635 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
6a7eba24
JFM		 1636
1637 /* Detect sensor (sub)type */
1638 rc = i2c_r(sd, OV7610_REG_COM_I);
1639 if (rc < 0) {
1640 PDEBUG(D_ERR, "Error detecting sensor type");
1641 return -1;
1642 }
1643
1644 /* Ugh. The first two bits are the version bits, but
1645 * the entire register value must be used. I guess OVT
1646 * underestimated how many variants they would make. */
594f5b8b
JFM		 1647 switch (rc) {
1648 case 0x00:
6a7eba24
JFM		 1649 sd->sensor = SEN_OV6630;
1650 PDEBUG(D_ERR,
1651 "WARNING: Sensor is an OV66308. Your camera may have");
1652 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 1653 break;
1654 case 0x01:
6a7eba24 1655 sd->sensor = SEN_OV6620;
7d971373 1656 PDEBUG(D_PROBE, "Sensor is an OV6620");
594f5b8b
JFM		 1657 break;
1658 case 0x02:
6a7eba24
JFM		 1659 sd->sensor = SEN_OV6630;
1660 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
594f5b8b
JFM		 1661 break;
1662 case 0x03:
7d971373 1663 sd->sensor = SEN_OV66308AF;
6a7eba24 1664 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
594f5b8b
JFM		 1665 break;
1666 case 0x90:
6a7eba24
JFM		 1667 sd->sensor = SEN_OV6630;
1668 PDEBUG(D_ERR,
1669 "WARNING: Sensor is an OV66307. Your camera may have");
1670 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 1671 break;
1672 default:
6a7eba24
JFM		 1673 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
1674 return -1;
1675 }
1676
1677 /* Set sensor-specific vars */
594f5b8b 1678 sd->sif = 1;
6a7eba24 1679
6a7eba24
JFM		 1680 return 0;
1681}
1682
1683/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
1684static void ov51x_led_control(struct sd *sd, int on)
1685{
9e4d8258
HG		 1686 if (sd->invert_led)
1687 on = !on;
1688
49809d6a
HG		 1689 switch (sd->bridge) {
1690 /* OV511 has no LED control */
1691 case BRIDGE_OV511PLUS:
1692 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
1693 break;
1694 case BRIDGE_OV518:
1695 case BRIDGE_OV518PLUS:
1696 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
1697 break;
1698 case BRIDGE_OV519:
1699 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
1700 break;
1701 }
6a7eba24
JFM		 1702}
1703
1876bb92 1704static int ov51x_upload_quan_tables(struct sd *sd)
49809d6a 1705{
1876bb92
HG		 1706 const unsigned char yQuanTable511[] = {
1707 0, 1, 1, 2, 2, 3, 3, 4,
1708 1, 1, 1, 2, 2, 3, 4, 4,
1709 1, 1, 2, 2, 3, 4, 4, 4,
1710 2, 2, 2, 3, 4, 4, 4, 4,
1711 2, 2, 3, 4, 4, 5, 5, 5,
1712 3, 3, 4, 4, 5, 5, 5, 5,
1713 3, 4, 4, 4, 5, 5, 5, 5,
1714 4, 4, 4, 4, 5, 5, 5, 5
1715 };
1716
1717 const unsigned char uvQuanTable511[] = {
1718 0, 2, 2, 3, 4, 4, 4, 4,
1719 2, 2, 2, 4, 4, 4, 4, 4,
1720 2, 2, 3, 4, 4, 4, 4, 4,
1721 3, 4, 4, 4, 4, 4, 4, 4,
1722 4, 4, 4, 4, 4, 4, 4, 4,
1723 4, 4, 4, 4, 4, 4, 4, 4,
1724 4, 4, 4, 4, 4, 4, 4, 4,
1725 4, 4, 4, 4, 4, 4, 4, 4
1726 };
1727
1728 /* OV518 quantization tables are 8x4 (instead of 8x8) */
49809d6a
HG		 1729 const unsigned char yQuanTable518[] = {
1730 5, 4, 5, 6, 6, 7, 7, 7,
1731 5, 5, 5, 5, 6, 7, 7, 7,
1732 6, 6, 6, 6, 7, 7, 7, 8,
1733 7, 7, 6, 7, 7, 7, 8, 8
1734 };
1735
1736 const unsigned char uvQuanTable518[] = {
1737 6, 6, 6, 7, 7, 7, 7, 7,
1738 6, 6, 6, 7, 7, 7, 7, 7,
1739 6, 6, 6, 7, 7, 7, 7, 8,
1740 7, 7, 7, 7, 7, 7, 8, 8
1741 };
1742
1876bb92 1743 const unsigned char *pYTable, *pUVTable;
49809d6a 1744 unsigned char val0, val1;
1876bb92 1745 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
49809d6a
HG		 1746
1747 PDEBUG(D_PROBE, "Uploading quantization tables");
1748
1876bb92
HG		 1749 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
1750 pYTable = yQuanTable511;
1751 pUVTable = uvQuanTable511;
1752 size = 32;
1753 } else {
1754 pYTable = yQuanTable518;
1755 pUVTable = uvQuanTable518;
1756 size = 16;
1757 }
1758
1759 for (i = 0; i < size; i++) {
49809d6a
HG		 1760 val0 = *pYTable++;
1761 val1 = *pYTable++;
1762 val0 &= 0x0f;
1763 val1 &= 0x0f;
1764 val0 |= val1 << 4;
1765 rc = reg_w(sd, reg, val0);
1766 if (rc < 0)
1767 return rc;
1768
1769 val0 = *pUVTable++;
1770 val1 = *pUVTable++;
1771 val0 &= 0x0f;
1772 val1 &= 0x0f;
1773 val0 |= val1 << 4;
1876bb92 1774 rc = reg_w(sd, reg + size, val0);
49809d6a
HG		 1775 if (rc < 0)
1776 return rc;
1777
1778 reg++;
1779 }
1780
1781 return 0;
1782}
1783
1876bb92
HG		 1784/* This initializes the OV511/OV511+ and the sensor */
1785static int ov511_configure(struct gspca_dev *gspca_dev)
1786{
1787 struct sd *sd = (struct sd *) gspca_dev;
1788 int rc;
1789
1790 /* For 511 and 511+ */
1791 const struct ov_regvals init_511[] = {
1792 { R51x_SYS_RESET, 0x7f },
1793 { R51x_SYS_INIT, 0x01 },
1794 { R51x_SYS_RESET, 0x7f },
1795 { R51x_SYS_INIT, 0x01 },
1796 { R51x_SYS_RESET, 0x3f },
1797 { R51x_SYS_INIT, 0x01 },
1798 { R51x_SYS_RESET, 0x3d },
1799 };
1800
1801 const struct ov_regvals norm_511[] = {
1802 { R511_DRAM_FLOW_CTL, 0x01 },
1803 { R51x_SYS_SNAP, 0x00 },
1804 { R51x_SYS_SNAP, 0x02 },
1805 { R51x_SYS_SNAP, 0x00 },
1806 { R511_FIFO_OPTS, 0x1f },
1807 { R511_COMP_EN, 0x00 },
1808 { R511_COMP_LUT_EN, 0x03 },
1809 };
1810
1811 const struct ov_regvals norm_511_p[] = {
1812 { R511_DRAM_FLOW_CTL, 0xff },
1813 { R51x_SYS_SNAP, 0x00 },
1814 { R51x_SYS_SNAP, 0x02 },
1815 { R51x_SYS_SNAP, 0x00 },
1816 { R511_FIFO_OPTS, 0xff },
1817 { R511_COMP_EN, 0x00 },
1818 { R511_COMP_LUT_EN, 0x03 },
1819 };
1820
1821 const struct ov_regvals compress_511[] = {
1822 { 0x70, 0x1f },
1823 { 0x71, 0x05 },
1824 { 0x72, 0x06 },
1825 { 0x73, 0x06 },
1826 { 0x74, 0x14 },
1827 { 0x75, 0x03 },
1828 { 0x76, 0x04 },
1829 { 0x77, 0x04 },
1830 };
1831
1832 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
1833
1834 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
1835 if (rc < 0)
1836 return rc;
1837
1838 switch (sd->bridge) {
1839 case BRIDGE_OV511:
1840 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
1841 if (rc < 0)
1842 return rc;
1843 break;
1844 case BRIDGE_OV511PLUS:
1845 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
1846 if (rc < 0)
1847 return rc;
1848 break;
1849 }
1850
1851 /* Init compression */
1852 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
1853 if (rc < 0)
1854 return rc;
1855
1856 rc = ov51x_upload_quan_tables(sd);
1857 if (rc < 0) {
1858 PDEBUG(D_ERR, "Error uploading quantization tables");
1859 return rc;
1860 }
1861
1862 return 0;
1863}
1864
49809d6a
HG		 1865/* This initializes the OV518/OV518+ and the sensor */
1866static int ov518_configure(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 1867{
1868 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 1869 int rc;
1870
1871 /* For 518 and 518+ */
e080fcd9 1872 const struct ov_regvals init_518[] = {
49809d6a
HG		 1873 { R51x_SYS_RESET, 0x40 },
1874 { R51x_SYS_INIT, 0xe1 },
1875 { R51x_SYS_RESET, 0x3e },
1876 { R51x_SYS_INIT, 0xe1 },
1877 { R51x_SYS_RESET, 0x00 },
1878 { R51x_SYS_INIT, 0xe1 },
1879 { 0x46, 0x00 },
1880 { 0x5d, 0x03 },
1881 };
1882
e080fcd9 1883 const struct ov_regvals norm_518[] = {
49809d6a
HG		 1884 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1885 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1886 { 0x31, 0x0f },
1887 { 0x5d, 0x03 },
1888 { 0x24, 0x9f },
1889 { 0x25, 0x90 },
1890 { 0x20, 0x00 },
1891 { 0x51, 0x04 },
1892 { 0x71, 0x19 },
1893 { 0x2f, 0x80 },
1894 };
1895
e080fcd9 1896 const struct ov_regvals norm_518_p[] = {
49809d6a
HG		 1897 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1898 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1899 { 0x31, 0x0f },
1900 { 0x5d, 0x03 },
1901 { 0x24, 0x9f },
1902 { 0x25, 0x90 },
1903 { 0x20, 0x60 },
1904 { 0x51, 0x02 },
1905 { 0x71, 0x19 },
1906 { 0x40, 0xff },
1907 { 0x41, 0x42 },
1908 { 0x46, 0x00 },
1909 { 0x33, 0x04 },
1910 { 0x21, 0x19 },
1911 { 0x3f, 0x10 },
1912 { 0x2f, 0x80 },
1913 };
1914
1915 /* First 5 bits of custom ID reg are a revision ID on OV518 */
1916 PDEBUG(D_PROBE, "Device revision %d",
1917 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
1918
1919 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
1920 if (rc < 0)
1921 return rc;
1922
1923 /* Set LED GPIO pin to output mode */
1924 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
1925 if (rc < 0)
1926 return rc;
6a7eba24 1927
49809d6a
HG		 1928 switch (sd->bridge) {
1929 case BRIDGE_OV518:
1930 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
1931 if (rc < 0)
1932 return rc;
1933 break;
1934 case BRIDGE_OV518PLUS:
1935 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
1936 if (rc < 0)
1937 return rc;
1938 break;
1939 }
1940
1876bb92 1941 rc = ov51x_upload_quan_tables(sd);
49809d6a
HG		 1942 if (rc < 0) {
1943 PDEBUG(D_ERR, "Error uploading quantization tables");
1944 return rc;
1945 }
1946
1947 rc = reg_w(sd, 0x2f, 0x80);
1948 if (rc < 0)
1949 return rc;
1950
1951 return 0;
1952}
1953
1954static int ov519_configure(struct sd *sd)
1955{
a5ae2062 1956 static const struct ov_regvals init_519[] = {
6a7eba24 1957 { 0x5a, 0x6d }, /* EnableSystem */
6a7eba24
JFM		 1958 { 0x53, 0x9b },
1959 { 0x54, 0xff }, /* set bit2 to enable jpeg */
1960 { 0x5d, 0x03 },
1961 { 0x49, 0x01 },
1962 { 0x48, 0x00 },
1963 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
1964 * detection will fail. This deserves further investigation. */
1965 { OV519_GPIO_IO_CTRL0, 0xee },
1966 { 0x51, 0x0f }, /* SetUsbInit */
1967 { 0x51, 0x00 },
1968 { 0x22, 0x00 },
1969 /* windows reads 0x55 at this point*/
1970 };
1971
49809d6a
HG		 1972 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
1973}
1974
1975/* this function is called at probe time */
1976static int sd_config(struct gspca_dev *gspca_dev,
1977 const struct usb_device_id *id)
1978{
1979 struct sd *sd = (struct sd *) gspca_dev;
1980 struct cam *cam;
1981 int ret = 0;
1982
9e4d8258
HG		 1983 sd->bridge = id->driver_info & BRIDGE_MASK;
1984 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
49809d6a
HG		 1985
1986 switch (sd->bridge) {
1876bb92
HG		 1987 case BRIDGE_OV511:
1988 case BRIDGE_OV511PLUS:
1989 ret = ov511_configure(gspca_dev);
1990 break;
49809d6a
HG		 1991 case BRIDGE_OV518:
1992 case BRIDGE_OV518PLUS:
1993 ret = ov518_configure(gspca_dev);
1994 break;
1995 case BRIDGE_OV519:
1996 ret = ov519_configure(sd);
1997 break;
1998 }
1999
2000 if (ret)
6a7eba24 2001 goto error;
49809d6a 2002
6a7eba24
JFM		 2003 ov51x_led_control(sd, 0); /* turn LED off */
2004
6a7eba24
JFM		 2005 /* The OV519 must be more aggressive about sensor detection since
2006 * I2C write will never fail if the sensor is not present. We have
2007 * to try to initialize the sensor to detect its presence */
229bb7dc
HG		 2008
2009 /* Test for 76xx */
2010 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
4202f71c
JFM		 2011 if (ov7xx0_configure(sd) < 0) {
2012 PDEBUG(D_ERR, "Failed to configure OV7xx0");
2013 goto error;
2014 }
229bb7dc
HG		 2015 /* Test for 6xx0 */
2016 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
2017 if (ov6xx0_configure(sd) < 0) {
2018 PDEBUG(D_ERR, "Failed to configure OV6xx0");
2019 goto error;
2020 }
2021 /* Test for 8xx0 */
2022 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
2023 if (ov8xx0_configure(sd) < 0) {
2024 PDEBUG(D_ERR, "Failed to configure OV8xx0");
6a7eba24 2025 goto error;
6a7eba24 2026 }
229bb7dc
HG		 2027 } else {
2028 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
2029 goto error;
6a7eba24
JFM		 2030 }
2031
2032 cam = &gspca_dev->cam;
49809d6a 2033 switch (sd->bridge) {
1876bb92
HG		 2034 case BRIDGE_OV511:
2035 case BRIDGE_OV511PLUS:
2036 if (!sd->sif) {
2037 cam->cam_mode = ov511_vga_mode;
2038 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
2039 } else {
2040 cam->cam_mode = ov511_sif_mode;
2041 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
2042 }
2043 break;
49809d6a
HG		 2044 case BRIDGE_OV518:
2045 case BRIDGE_OV518PLUS:
2046 if (!sd->sif) {
2047 cam->cam_mode = ov518_vga_mode;
2048 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
2049 } else {
2050 cam->cam_mode = ov518_sif_mode;
2051 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
2052 }
2053 break;
2054 case BRIDGE_OV519:
2055 if (!sd->sif) {
2056 cam->cam_mode = ov519_vga_mode;
2057 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
2058 } else {
2059 cam->cam_mode = ov519_sif_mode;
2060 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
2061 }
2062 break;
6a7eba24 2063 }
594f5b8b 2064 sd->brightness = BRIGHTNESS_DEF;
f5cee95c
HG		 2065 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
2066 sd->contrast = 200; /* The default is too low for the ov6630 */
2067 else
2068 sd->contrast = CONTRAST_DEF;
594f5b8b 2069 sd->colors = COLOR_DEF;
0cd6759d
JFM		 2070 sd->hflip = HFLIP_DEF;
2071 sd->vflip = VFLIP_DEF;
02ab18b0
HG		 2072 sd->autobrightness = AUTOBRIGHT_DEF;
2073 if (sd->sensor == SEN_OV7670) {
2074 sd->freq = OV7670_FREQ_DEF;
2075 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
2076 } else {
2077 sd->freq = FREQ_DEF;
2078 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
2079 (1 << OV7670_FREQ_IDX);
2080 }
2081 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
2082 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
2083 /* OV8610 Frequency filter control should work but needs testing */
2084 if (sd->sensor == SEN_OV8610)
2085 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
2086
6a7eba24
JFM		 2087 return 0;
2088error:
2089 PDEBUG(D_ERR, "OV519 Config failed");
2090 return -EBUSY;
2091}
2092
012d6b02
JFM		 2093/* this function is called at probe and resume time */
2094static int sd_init(struct gspca_dev *gspca_dev)
6a7eba24 2095{
4202f71c
JFM		 2096 struct sd *sd = (struct sd *) gspca_dev;
2097
2098 /* initialize the sensor */
2099 switch (sd->sensor) {
2100 case SEN_OV6620:
2101 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
2102 return -EIO;
2103 break;
2104 case SEN_OV6630:
7d971373 2105 case SEN_OV66308AF:
4202f71c
JFM		 2106 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
2107 return -EIO;
2108 break;
2109 default:
2110/* case SEN_OV7610: */
2111/* case SEN_OV76BE: */
2112 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
2113 return -EIO;
ae49c404
HG		 2114 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
2115 return -EIO;
4202f71c
JFM		 2116 break;
2117 case SEN_OV7620:
2118 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
2119 return -EIO;
2120 break;
2121 case SEN_OV7640:
2122 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
2123 return -EIO;
2124 break;
2125 case SEN_OV7670:
2126 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
2127 return -EIO;
2128 break;
2129 case SEN_OV8610:
2130 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
2131 return -EIO;
2132 break;
2133 }
6a7eba24
JFM		 2134 return 0;
2135}
2136
1876bb92
HG		 2137/* Set up the OV511/OV511+ with the given image parameters.
2138 *
2139 * Do not put any sensor-specific code in here (including I2C I/O functions)
2140 */
2141static int ov511_mode_init_regs(struct sd *sd)
2142{
2143 int hsegs, vsegs, packet_size, fps, needed;
2144 int interlaced = 0;
2145 struct usb_host_interface *alt;
2146 struct usb_interface *intf;
2147
2148 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
2149 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
2150 if (!alt) {
2151 PDEBUG(D_ERR, "Couldn't get altsetting");
2152 return -EIO;
2153 }
2154
2155 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
2156 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
2157
2158 reg_w(sd, R511_CAM_UV_EN, 0x01);
2159 reg_w(sd, R511_SNAP_UV_EN, 0x01);
2160 reg_w(sd, R511_SNAP_OPTS, 0x03);
2161
2162 /* Here I'm assuming that snapshot size == image size.
2163 * I hope that's always true. --claudio
2164 */
2165 hsegs = (sd->gspca_dev.width >> 3) - 1;
2166 vsegs = (sd->gspca_dev.height >> 3) - 1;
2167
2168 reg_w(sd, R511_CAM_PXCNT, hsegs);
2169 reg_w(sd, R511_CAM_LNCNT, vsegs);
2170 reg_w(sd, R511_CAM_PXDIV, 0x00);
2171 reg_w(sd, R511_CAM_LNDIV, 0x00);
2172
2173 /* YUV420, low pass filter on */
2174 reg_w(sd, R511_CAM_OPTS, 0x03);
2175
2176 /* Snapshot additions */
2177 reg_w(sd, R511_SNAP_PXCNT, hsegs);
2178 reg_w(sd, R511_SNAP_LNCNT, vsegs);
2179 reg_w(sd, R511_SNAP_PXDIV, 0x00);
2180 reg_w(sd, R511_SNAP_LNDIV, 0x00);
2181
2182 /******** Set the framerate ********/
2183 if (frame_rate > 0)
2184 sd->frame_rate = frame_rate;
2185
2186 switch (sd->sensor) {
2187 case SEN_OV6620:
2188 /* No framerate control, doesn't like higher rates yet */
2189 sd->clockdiv = 3;
2190 break;
2191
2192 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
2193 for more sensors we need to do this for them too */
2194 case SEN_OV7620:
2195 case SEN_OV7640:
b282d873 2196 case SEN_OV76BE:
1876bb92
HG		 2197 if (sd->gspca_dev.width == 320)
2198 interlaced = 1;
2199 /* Fall through */
2200 case SEN_OV6630:
1876bb92
HG		 2201 case SEN_OV7610:
2202 case SEN_OV7670:
2203 switch (sd->frame_rate) {
2204 case 30:
2205 case 25:
2206 /* Not enough bandwidth to do 640x480 @ 30 fps */
2207 if (sd->gspca_dev.width != 640) {
2208 sd->clockdiv = 0;
2209 break;
2210 }
2211 /* Fall through for 640x480 case */
2212 default:
2213/* case 20: */
2214/* case 15: */
2215 sd->clockdiv = 1;
2216 break;
2217 case 10:
2218 sd->clockdiv = 2;
2219 break;
2220 case 5:
2221 sd->clockdiv = 5;
2222 break;
2223 }
2224 if (interlaced) {
2225 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
2226 /* Higher then 10 does not work */
2227 if (sd->clockdiv > 10)
2228 sd->clockdiv = 10;
2229 }
2230 break;
2231
2232 case SEN_OV8610:
2233 /* No framerate control ?? */
2234 sd->clockdiv = 0;
2235 break;
2236 }
2237
2238 /* Check if we have enough bandwidth to disable compression */
2239 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
2240 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
2241 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
2242 if (needed > 1400 * packet_size) {
2243 /* Enable Y and UV quantization and compression */
2244 reg_w(sd, R511_COMP_EN, 0x07);
2245 reg_w(sd, R511_COMP_LUT_EN, 0x03);
2246 } else {
2247 reg_w(sd, R511_COMP_EN, 0x06);
2248 reg_w(sd, R511_COMP_LUT_EN, 0x00);
2249 }
2250
2251 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
2252 reg_w(sd, R51x_SYS_RESET, 0);
2253
2254 return 0;
2255}
2256
49809d6a
HG		 2257/* Sets up the OV518/OV518+ with the given image parameters
2258 *
2259 * OV518 needs a completely different approach, until we can figure out what
2260 * the individual registers do. Also, only 15 FPS is supported now.
2261 *
2262 * Do not put any sensor-specific code in here (including I2C I/O functions)
2263 */
2264static int ov518_mode_init_regs(struct sd *sd)
2265{
b282d873
HG		 2266 int hsegs, vsegs, packet_size;
2267 struct usb_host_interface *alt;
2268 struct usb_interface *intf;
2269
2270 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
2271 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
2272 if (!alt) {
2273 PDEBUG(D_ERR, "Couldn't get altsetting");
2274 return -EIO;
2275 }
2276
2277 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
2278 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
49809d6a
HG		 2279
2280 /******** Set the mode ********/
2281
2282 reg_w(sd, 0x2b, 0);
2283 reg_w(sd, 0x2c, 0);
2284 reg_w(sd, 0x2d, 0);
2285 reg_w(sd, 0x2e, 0);
2286 reg_w(sd, 0x3b, 0);
2287 reg_w(sd, 0x3c, 0);
2288 reg_w(sd, 0x3d, 0);
2289 reg_w(sd, 0x3e, 0);
2290
2291 if (sd->bridge == BRIDGE_OV518) {
2292 /* Set 8-bit (YVYU) input format */
2293 reg_w_mask(sd, 0x20, 0x08, 0x08);
2294
2295 /* Set 12-bit (4:2:0) output format */
2296 reg_w_mask(sd, 0x28, 0x80, 0xf0);
2297 reg_w_mask(sd, 0x38, 0x80, 0xf0);
2298 } else {
2299 reg_w(sd, 0x28, 0x80);
2300 reg_w(sd, 0x38, 0x80);
2301 }
2302
2303 hsegs = sd->gspca_dev.width / 16;
2304 vsegs = sd->gspca_dev.height / 4;
2305
2306 reg_w(sd, 0x29, hsegs);
2307 reg_w(sd, 0x2a, vsegs);
2308
2309 reg_w(sd, 0x39, hsegs);
2310 reg_w(sd, 0x3a, vsegs);
2311
2312 /* Windows driver does this here; who knows why */
2313 reg_w(sd, 0x2f, 0x80);
2314
b282d873
HG		 2315 /******** Set the framerate ********/
2316 sd->clockdiv = 1;
49809d6a
HG		 2317
2318 /* Mode independent, but framerate dependent, regs */
b282d873
HG		 2319 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
2320 reg_w(sd, 0x51, 0x04);
49809d6a
HG		 2321 reg_w(sd, 0x22, 0x18);
2322 reg_w(sd, 0x23, 0xff);
2323
b282d873
HG		 2324 if (sd->bridge == BRIDGE_OV518PLUS) {
2325 switch (sd->sensor) {
2326 case SEN_OV7620:
2327 if (sd->gspca_dev.width == 320) {
2328 reg_w(sd, 0x20, 0x00);
2329 reg_w(sd, 0x21, 0x19);
2330 } else {
2331 reg_w(sd, 0x20, 0x60);
2332 reg_w(sd, 0x21, 0x1f);
2333 }
2334 break;
2335 default:
2336 reg_w(sd, 0x21, 0x19);
2337 }
2338 } else
49809d6a
HG		 2339 reg_w(sd, 0x71, 0x17); /* Compression-related? */
2340
2341 /* FIXME: Sensor-specific */
2342 /* Bit 5 is what matters here. Of course, it is "reserved" */
2343 i2c_w(sd, 0x54, 0x23);
2344
2345 reg_w(sd, 0x2f, 0x80);
2346
2347 if (sd->bridge == BRIDGE_OV518PLUS) {
2348 reg_w(sd, 0x24, 0x94);
2349 reg_w(sd, 0x25, 0x90);
2350 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
2351 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
2352 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
2353 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
2354 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
2355 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
2356 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
2357 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
2358 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
2359 } else {
2360 reg_w(sd, 0x24, 0x9f);
2361 reg_w(sd, 0x25, 0x90);
2362 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
2363 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
2364 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
2365 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
2366 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
2367 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
2368 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
2369 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
2370 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
2371 }
2372
2373 reg_w(sd, 0x2f, 0x80);
2374
2375 return 0;
2376}
2377
2378
6a7eba24
JFM		 2379/* Sets up the OV519 with the given image parameters
2380 *
2381 * OV519 needs a completely different approach, until we can figure out what
2382 * the individual registers do.
2383 *
2384 * Do not put any sensor-specific code in here (including I2C I/O functions)
2385 */
594f5b8b 2386static int ov519_mode_init_regs(struct sd *sd)
6a7eba24 2387{
a5ae2062 2388 static const struct ov_regvals mode_init_519_ov7670[] = {
6a7eba24
JFM		 2389 { 0x5d, 0x03 }, /* Turn off suspend mode */
2390 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
2391 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
2392 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
2393 { 0xa3, 0x18 },
2394 { 0xa4, 0x04 },
2395 { 0xa5, 0x28 },
2396 { 0x37, 0x00 }, /* SetUsbInit */
2397 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
2398 /* Enable both fields, YUV Input, disable defect comp (why?) */
2399 { 0x20, 0x0c },
2400 { 0x21, 0x38 },
2401 { 0x22, 0x1d },
2402 { 0x17, 0x50 }, /* undocumented */
2403 { 0x37, 0x00 }, /* undocumented */
2404 { 0x40, 0xff }, /* I2C timeout counter */
2405 { 0x46, 0x00 }, /* I2C clock prescaler */
2406 { 0x59, 0x04 }, /* new from windrv 090403 */
2407 { 0xff, 0x00 }, /* undocumented */
2408 /* windows reads 0x55 at this point, why? */
2409 };
2410
a5ae2062 2411 static const struct ov_regvals mode_init_519[] = {
6a7eba24
JFM		 2412 { 0x5d, 0x03 }, /* Turn off suspend mode */
2413 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
2414 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
2415 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
2416 { 0xa3, 0x18 },
2417 { 0xa4, 0x04 },
2418 { 0xa5, 0x28 },
2419 { 0x37, 0x00 }, /* SetUsbInit */
2420 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
2421 /* Enable both fields, YUV Input, disable defect comp (why?) */
2422 { 0x22, 0x1d },
2423 { 0x17, 0x50 }, /* undocumented */
2424 { 0x37, 0x00 }, /* undocumented */
2425 { 0x40, 0xff }, /* I2C timeout counter */
2426 { 0x46, 0x00 }, /* I2C clock prescaler */
2427 { 0x59, 0x04 }, /* new from windrv 090403 */
2428 { 0xff, 0x00 }, /* undocumented */
2429 /* windows reads 0x55 at this point, why? */
2430 };
2431
6a7eba24
JFM		 2432 /******** Set the mode ********/
2433 if (sd->sensor != SEN_OV7670) {
2434 if (write_regvals(sd, mode_init_519,
a5ae2062 2435 ARRAY_SIZE(mode_init_519)))
6a7eba24 2436 return -EIO;
594f5b8b
JFM		 2437 if (sd->sensor == SEN_OV7640) {
2438 /* Select 8-bit input mode */
ac40b1fa 2439 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
594f5b8b 2440 }
6a7eba24
JFM		 2441 } else {
2442 if (write_regvals(sd, mode_init_519_ov7670,
a5ae2062 2443 ARRAY_SIZE(mode_init_519_ov7670)))
6a7eba24
JFM		 2444 return -EIO;
2445 }
2446
ac40b1fa
JFM		 2447 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
2448 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
80142efa
HG		 2449 if (sd->sensor == SEN_OV7670 &&
2450 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
2451 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
2452 else
2453 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
ac40b1fa
JFM		 2454 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
2455 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
2456 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
2457 reg_w(sd, OV519_R16_DIVIDER, 0x00);
2458 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
6a7eba24
JFM		 2459 reg_w(sd, 0x26, 0x00); /* Undocumented */
2460
2461 /******** Set the framerate ********/
2462 if (frame_rate > 0)
2463 sd->frame_rate = frame_rate;
2464
2465/* FIXME: These are only valid at the max resolution. */
2466 sd->clockdiv = 0;
594f5b8b
JFM		 2467 switch (sd->sensor) {
2468 case SEN_OV7640:
6a7eba24 2469 switch (sd->frame_rate) {
53e74515
JFM		 2470 default:
2471/* case 30: */
6a7eba24
JFM		 2472 reg_w(sd, 0xa4, 0x0c);
2473 reg_w(sd, 0x23, 0xff);
2474 break;
2475 case 25:
2476 reg_w(sd, 0xa4, 0x0c);
2477 reg_w(sd, 0x23, 0x1f);
2478 break;
2479 case 20:
2480 reg_w(sd, 0xa4, 0x0c);
2481 reg_w(sd, 0x23, 0x1b);
2482 break;
53e74515 2483 case 15:
6a7eba24
JFM		 2484 reg_w(sd, 0xa4, 0x04);
2485 reg_w(sd, 0x23, 0xff);
2486 sd->clockdiv = 1;
2487 break;
2488 case 10:
2489 reg_w(sd, 0xa4, 0x04);
2490 reg_w(sd, 0x23, 0x1f);
2491 sd->clockdiv = 1;
2492 break;
2493 case 5:
2494 reg_w(sd, 0xa4, 0x04);
2495 reg_w(sd, 0x23, 0x1b);
2496 sd->clockdiv = 1;
2497 break;
2498 }
594f5b8b
JFM		 2499 break;
2500 case SEN_OV8610:
6a7eba24
JFM		 2501 switch (sd->frame_rate) {
2502 default: /* 15 fps */
2503/* case 15: */
2504 reg_w(sd, 0xa4, 0x06);
2505 reg_w(sd, 0x23, 0xff);
2506 break;
2507 case 10:
2508 reg_w(sd, 0xa4, 0x06);
2509 reg_w(sd, 0x23, 0x1f);
2510 break;
2511 case 5:
2512 reg_w(sd, 0xa4, 0x06);
2513 reg_w(sd, 0x23, 0x1b);
2514 break;
2515 }
594f5b8b
JFM		 2516 break;
2517 case SEN_OV7670: /* guesses, based on 7640 */
6a7eba24
JFM		 2518 PDEBUG(D_STREAM, "Setting framerate to %d fps",
2519 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
594f5b8b 2520 reg_w(sd, 0xa4, 0x10);
6a7eba24
JFM		 2521 switch (sd->frame_rate) {
2522 case 30:
6a7eba24
JFM		 2523 reg_w(sd, 0x23, 0xff);
2524 break;
2525 case 20:
6a7eba24
JFM		 2526 reg_w(sd, 0x23, 0x1b);
2527 break;
594f5b8b
JFM		 2528 default:
2529/* case 15: */
6a7eba24
JFM		 2530 reg_w(sd, 0x23, 0xff);
2531 sd->clockdiv = 1;
2532 break;
2533 }
594f5b8b 2534 break;
6a7eba24 2535 }
6a7eba24
JFM		 2536 return 0;
2537}
2538
594f5b8b 2539static int mode_init_ov_sensor_regs(struct sd *sd)
6a7eba24 2540{
594f5b8b
JFM		 2541 struct gspca_dev *gspca_dev;
2542 int qvga;
2543
2544 gspca_dev = &sd->gspca_dev;
124cc9c0 2545 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
6a7eba24
JFM		 2546
2547 /******** Mode (VGA/QVGA) and sensor specific regs ********/
2548 switch (sd->sensor) {
2549 case SEN_OV8610:
2550 /* For OV8610 qvga means qsvga */
2551 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
2552 break;
2553 case SEN_OV7610:
2554 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2555 break;
2556 case SEN_OV7620:
b282d873 2557 case SEN_OV76BE:
6a7eba24
JFM		 2558 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2559 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2560 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
2561 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
2562 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
b282d873 2563 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
6a7eba24
JFM		 2564 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
2565 break;
6a7eba24 2566 case SEN_OV7640:
6a7eba24
JFM		 2567 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2568 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2569/* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
2570/* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
2571/* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
2572/* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
2573/* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
2574 break;
2575 case SEN_OV7670:
2576 /* set COM7_FMT_VGA or COM7_FMT_QVGA
2577 * do we need to set anything else?
2578 * HSTART etc are set in set_ov_sensor_window itself */
2579 i2c_w_mask(sd, OV7670_REG_COM7,
2580 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
2581 OV7670_COM7_FMT_MASK);
2582 break;
2583 case SEN_OV6620:
6a7eba24 2584 case SEN_OV6630:
7d971373 2585 case SEN_OV66308AF:
6a7eba24
JFM		 2586 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2587 break;
2588 default:
2589 return -EINVAL;
2590 }
2591
2592 /******** Palette-specific regs ********/
6a7eba24 2593
594f5b8b
JFM		 2594 /* The OV518 needs special treatment. Although both the OV518
2595 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
2596 * bus is actually used. The UV bus is tied to ground.
2597 * Therefore, the OV6630 needs to be in 8-bit multiplexed
2598 * output mode */
6a7eba24 2599
594f5b8b 2600 /* OV7640 is 8-bit only */
6a7eba24 2601
7d971373
HG		 2602 if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV66308AF &&
2603 sd->sensor != SEN_OV7640)
594f5b8b 2604 i2c_w_mask(sd, 0x13, 0x00, 0x20);
6a7eba24
JFM		 2605
2606 /******** Clock programming ********/
ae49c404 2607 i2c_w(sd, 0x11, sd->clockdiv);
6a7eba24
JFM		 2608
2609 /******** Special Features ********/
2610/* no evidence this is possible with OV7670, either */
2611 /* Test Pattern */
2612 if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
2613 i2c_w_mask(sd, 0x12, 0x00, 0x02);
2614
2615 /* Enable auto white balance */
2616 if (sd->sensor == SEN_OV7670)
2617 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
2618 OV7670_COM8_AWB);
2619 else
2620 i2c_w_mask(sd, 0x12, 0x04, 0x04);
2621
2622 /* This will go away as soon as ov51x_mode_init_sensor_regs() */
2623 /* is fully tested. */
2624 /* 7620/6620/6630? don't have register 0x35, so play it safe */
2625 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
594f5b8b 2626 if (!qvga)
6a7eba24
JFM		 2627 i2c_w(sd, 0x35, 0x9e);
2628 else
2629 i2c_w(sd, 0x35, 0x1e);
2630 }
2631 return 0;
2632}
2633
594f5b8b 2634static void sethvflip(struct sd *sd)
0cd6759d 2635{
594f5b8b
JFM		 2636 if (sd->sensor != SEN_OV7670)
2637 return;
0cd6759d
JFM		 2638 if (sd->gspca_dev.streaming)
2639 ov51x_stop(sd);
2640 i2c_w_mask(sd, OV7670_REG_MVFP,
594f5b8b
JFM		 2641 OV7670_MVFP_MIRROR * sd->hflip
2642 | OV7670_MVFP_VFLIP * sd->vflip,
2643 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
0cd6759d
JFM		 2644 if (sd->gspca_dev.streaming)
2645 ov51x_restart(sd);
2646}
2647
594f5b8b 2648static int set_ov_sensor_window(struct sd *sd)
6a7eba24 2649{
594f5b8b 2650 struct gspca_dev *gspca_dev;
124cc9c0 2651 int qvga, crop;
6a7eba24
JFM		 2652 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
2653 int ret, hstart, hstop, vstop, vstart;
2654 __u8 v;
2655
594f5b8b 2656 gspca_dev = &sd->gspca_dev;
124cc9c0
HG		 2657 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
2658 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
594f5b8b 2659
6a7eba24
JFM		 2660 /* The different sensor ICs handle setting up of window differently.
2661 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
2662 switch (sd->sensor) {
2663 case SEN_OV8610:
2664 hwsbase = 0x1e;
2665 hwebase = 0x1e;
2666 vwsbase = 0x02;
2667 vwebase = 0x02;
2668 break;
2669 case SEN_OV7610:
2670 case SEN_OV76BE:
2671 hwsbase = 0x38;
2672 hwebase = 0x3a;
2673 vwsbase = vwebase = 0x05;
2674 break;
2675 case SEN_OV6620:
2676 case SEN_OV6630:
7d971373 2677 case SEN_OV66308AF:
6a7eba24
JFM		 2678 hwsbase = 0x38;
2679 hwebase = 0x3a;
2680 vwsbase = 0x05;
2681 vwebase = 0x06;
7d971373 2682 if (sd->sensor == SEN_OV66308AF && qvga)
49809d6a 2683 /* HDG: this fixes U and V getting swapped */
7d971373 2684 hwsbase++;
124cc9c0
HG		 2685 if (crop) {
2686 hwsbase += 8;
2687 hwebase += 8;
2688 vwsbase += 11;
2689 vwebase += 11;
2690 }
6a7eba24
JFM		 2691 break;
2692 case SEN_OV7620:
2693 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
2694 hwebase = 0x2f;
2695 vwsbase = vwebase = 0x05;
2696 break;
2697 case SEN_OV7640:
2698 hwsbase = 0x1a;
2699 hwebase = 0x1a;
2700 vwsbase = vwebase = 0x03;
2701 break;
2702 case SEN_OV7670:
2703 /*handling of OV7670 hardware sensor start and stop values
2704 * is very odd, compared to the other OV sensors */
2705 vwsbase = vwebase = hwebase = hwsbase = 0x00;
2706 break;
2707 default:
2708 return -EINVAL;
2709 }
2710
2711 switch (sd->sensor) {
2712 case SEN_OV6620:
2713 case SEN_OV6630:
7d971373 2714 case SEN_OV66308AF:
594f5b8b 2715 if (qvga) { /* QCIF */
6a7eba24
JFM		 2716 hwscale = 0;
2717 vwscale = 0;
2718 } else { /* CIF */
2719 hwscale = 1;
2720 vwscale = 1; /* The datasheet says 0;
2721 * it's wrong */
2722 }
2723 break;
2724 case SEN_OV8610:
594f5b8b 2725 if (qvga) { /* QSVGA */
6a7eba24
JFM		 2726 hwscale = 1;
2727 vwscale = 1;
2728 } else { /* SVGA */
2729 hwscale = 2;
2730 vwscale = 2;
2731 }
2732 break;
2733 default: /* SEN_OV7xx0 */
594f5b8b 2734 if (qvga) { /* QVGA */
6a7eba24
JFM		 2735 hwscale = 1;
2736 vwscale = 0;
2737 } else { /* VGA */
2738 hwscale = 2;
2739 vwscale = 1;
2740 }
2741 }
2742
594f5b8b 2743 ret = mode_init_ov_sensor_regs(sd);
6a7eba24
JFM		 2744 if (ret < 0)
2745 return ret;
2746
2747 if (sd->sensor == SEN_OV8610) {
2748 i2c_w_mask(sd, 0x2d, 0x05, 0x40);
2749 /* old 0x95, new 0x05 from windrv 090403 */
2750 /* bits 5-7: reserved */
2751 i2c_w_mask(sd, 0x28, 0x20, 0x20);
2752 /* bit 5: progressive mode on */
2753 }
2754
2755 /* The below is wrong for OV7670s because their window registers
2756 * only store the high bits in 0x17 to 0x1a */
2757
2758 /* SRH Use sd->max values instead of requested win values */
2759 /* SCS Since we're sticking with only the max hardware widths
2760 * for a given mode */
2761 /* I can hard code this for OV7670s */
2762 /* Yes, these numbers do look odd, but they're tested and work! */
2763 if (sd->sensor == SEN_OV7670) {
594f5b8b 2764 if (qvga) { /* QVGA from ov7670.c by
6a7eba24
JFM		 2765 * Jonathan Corbet */
2766 hstart = 164;
80142efa 2767 hstop = 28;
6a7eba24
JFM		 2768 vstart = 14;
2769 vstop = 494;
2770 } else { /* VGA */
2771 hstart = 158;
2772 hstop = 14;
2773 vstart = 10;
2774 vstop = 490;
2775 }
2776 /* OV7670 hardware window registers are split across
2777 * multiple locations */
594f5b8b
JFM		 2778 i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
2779 i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
6a7eba24
JFM		 2780 v = i2c_r(sd, OV7670_REG_HREF);
2781 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
2782 msleep(10); /* need to sleep between read and write to
2783 * same reg! */
2784 i2c_w(sd, OV7670_REG_HREF, v);
2785
594f5b8b
JFM		 2786 i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
2787 i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
6a7eba24
JFM		 2788 v = i2c_r(sd, OV7670_REG_VREF);
2789 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
2790 msleep(10); /* need to sleep between read and write to
2791 * same reg! */
2792 i2c_w(sd, OV7670_REG_VREF, v);
6a7eba24 2793 } else {
594f5b8b
JFM		 2794 i2c_w(sd, 0x17, hwsbase);
2795 i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
2796 i2c_w(sd, 0x19, vwsbase);
2797 i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
6a7eba24
JFM		 2798 }
2799 return 0;
2800}
2801
6a7eba24 2802/* -- start the camera -- */
72ab97ce 2803static int sd_start(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 2804{
2805 struct sd *sd = (struct sd *) gspca_dev;
49809d6a 2806 int ret = 0;
6a7eba24 2807
49809d6a 2808 switch (sd->bridge) {
1876bb92
HG		 2809 case BRIDGE_OV511:
2810 case BRIDGE_OV511PLUS:
2811 ret = ov511_mode_init_regs(sd);
2812 break;
49809d6a
HG		 2813 case BRIDGE_OV518:
2814 case BRIDGE_OV518PLUS:
2815 ret = ov518_mode_init_regs(sd);
2816 break;
2817 case BRIDGE_OV519:
2818 ret = ov519_mode_init_regs(sd);
2819 break;
2820 }
6a7eba24
JFM		 2821 if (ret < 0)
2822 goto out;
49809d6a 2823
594f5b8b 2824 ret = set_ov_sensor_window(sd);
6a7eba24
JFM		 2825 if (ret < 0)
2826 goto out;
2827
49809d6a
HG		 2828 setcontrast(gspca_dev);
2829 setbrightness(gspca_dev);
2830 setcolors(gspca_dev);
02ab18b0
HG		 2831 sethvflip(sd);
2832 setautobrightness(sd);
2833 setfreq(sd);
49809d6a 2834
594f5b8b 2835 ret = ov51x_restart(sd);
6a7eba24
JFM		 2836 if (ret < 0)
2837 goto out;
6a7eba24 2838 ov51x_led_control(sd, 1);
72ab97ce 2839 return 0;
6a7eba24
JFM		 2840out:
2841 PDEBUG(D_ERR, "camera start error:%d", ret);
72ab97ce 2842 return ret;
6a7eba24
JFM		 2843}
2844
2845static void sd_stopN(struct gspca_dev *gspca_dev)
2846{
ac40b1fa
JFM		 2847 struct sd *sd = (struct sd *) gspca_dev;
2848
2849 ov51x_stop(sd);
2850 ov51x_led_control(sd, 0);
6a7eba24
JFM		 2851}
2852
1876bb92
HG		 2853static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
2854 struct gspca_frame *frame, /* target */
2855 __u8 *in, /* isoc packet */
2856 int len) /* iso packet length */
2857{
2858 struct sd *sd = (struct sd *) gspca_dev;
2859
2860 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
2861 * byte non-zero. The EOF packet has image width/height in the
2862 * 10th and 11th bytes. The 9th byte is given as follows:
2863 *
2864 * bit 7: EOF
2865 * 6: compression enabled
2866 * 5: 422/420/400 modes
2867 * 4: 422/420/400 modes
2868 * 3: 1
2869 * 2: snapshot button on
2870 * 1: snapshot frame
2871 * 0: even/odd field
2872 */
2873 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
2874 (in[8] & 0x08)) {
2875 if (in[8] & 0x80) {
2876 /* Frame end */
2877 if ((in[9] + 1) * 8 != gspca_dev->width ||
2878 (in[10] + 1) * 8 != gspca_dev->height) {
2879 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
2880 " requested: %dx%d\n",
2881 (in[9] + 1) * 8, (in[10] + 1) * 8,
2882 gspca_dev->width, gspca_dev->height);
2883 gspca_dev->last_packet_type = DISCARD_PACKET;
2884 return;
2885 }
2886 /* Add 11 byte footer to frame, might be usefull */
2887 gspca_frame_add(gspca_dev, LAST_PACKET, frame, in, 11);
2888 return;
2889 } else {
2890 /* Frame start */
2891 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, in, 0);
2892 sd->packet_nr = 0;
2893 }
2894 }
2895
2896 /* Ignore the packet number */
2897 len--;
2898
2899 /* intermediate packet */
2900 gspca_frame_add(gspca_dev, INTER_PACKET, frame, in, len);
2901}
2902
49809d6a
HG		 2903static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
2904 struct gspca_frame *frame, /* target */
2905 __u8 *data, /* isoc packet */
2906 int len) /* iso packet length */
2907{
92918a53 2908 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 2909
2910 /* A false positive here is likely, until OVT gives me
2911 * the definitive SOF/EOF format */
2912 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
1381dfd5 2913 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
49809d6a 2914 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
92918a53
HG		 2915 sd->packet_nr = 0;
2916 }
2917
2918 if (gspca_dev->last_packet_type == DISCARD_PACKET)
2919 return;
2920
2921 /* Does this device use packet numbers ? */
2922 if (len & 7) {
2923 len--;
2924 if (sd->packet_nr == data[len])
2925 sd->packet_nr++;
2926 /* The last few packets of the frame (which are all 0's
2927 except that they may contain part of the footer), are
2928 numbered 0 */
2929 else if (sd->packet_nr == 0 || data[len]) {
2930 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
2931 (int)data[len], (int)sd->packet_nr);
2932 gspca_dev->last_packet_type = DISCARD_PACKET;
2933 return;
2934 }
49809d6a
HG		 2935 }
2936
2937 /* intermediate packet */
2938 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
2939}
2940
2941static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
6a7eba24 2942 struct gspca_frame *frame, /* target */
a5ae2062 2943 __u8 *data, /* isoc packet */
6a7eba24
JFM		 2944 int len) /* iso packet length */
2945{
2946 /* Header of ov519 is 16 bytes:
2947 * Byte Value Description
2948 * 0 0xff magic
2949 * 1 0xff magic
2950 * 2 0xff magic
2951 * 3 0xXX 0x50 = SOF, 0x51 = EOF
2952 * 9 0xXX 0x01 initial frame without data,
2953 * 0x00 standard frame with image
2954 * 14 Lo in EOF: length of image data / 8
2955 * 15 Hi
2956 */
2957
2958 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
2959 switch (data[3]) {
2960 case 0x50: /* start of frame */
2961#define HDRSZ 16
2962 data += HDRSZ;
2963 len -= HDRSZ;
2964#undef HDRSZ
2965 if (data[0] == 0xff || data[1] == 0xd8)
2966 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
2967 data, len);
2968 else
2969 gspca_dev->last_packet_type = DISCARD_PACKET;
2970 return;
2971 case 0x51: /* end of frame */
2972 if (data[9] != 0)
2973 gspca_dev->last_packet_type = DISCARD_PACKET;
2974 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
2975 data, 0);
2976 return;
2977 }
2978 }
2979
2980 /* intermediate packet */
2981 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
2982 data, len);
2983}
2984
49809d6a
HG		 2985static void sd_pkt_scan(struct gspca_dev *gspca_dev,
2986 struct gspca_frame *frame, /* target */
2987 __u8 *data, /* isoc packet */
2988 int len) /* iso packet length */
2989{
2990 struct sd *sd = (struct sd *) gspca_dev;
2991
2992 switch (sd->bridge) {
2993 case BRIDGE_OV511:
2994 case BRIDGE_OV511PLUS:
1876bb92 2995 ov511_pkt_scan(gspca_dev, frame, data, len);
49809d6a
HG		 2996 break;
2997 case BRIDGE_OV518:
2998 case BRIDGE_OV518PLUS:
2999 ov518_pkt_scan(gspca_dev, frame, data, len);
3000 break;
3001 case BRIDGE_OV519:
3002 ov519_pkt_scan(gspca_dev, frame, data, len);
3003 break;
3004 }
3005}
3006
6a7eba24
JFM		 3007/* -- management routines -- */
3008
3009static void setbrightness(struct gspca_dev *gspca_dev)
3010{
3011 struct sd *sd = (struct sd *) gspca_dev;
3012 int val;
6a7eba24
JFM		 3013
3014 val = sd->brightness;
6a7eba24
JFM		 3015 switch (sd->sensor) {
3016 case SEN_OV8610:
3017 case SEN_OV7610:
3018 case SEN_OV76BE:
3019 case SEN_OV6620:
3020 case SEN_OV6630:
7d971373 3021 case SEN_OV66308AF:
6a7eba24
JFM		 3022 case SEN_OV7640:
3023 i2c_w(sd, OV7610_REG_BRT, val);
3024 break;
3025 case SEN_OV7620:
3026 /* 7620 doesn't like manual changes when in auto mode */
02ab18b0 3027 if (!sd->autobrightness)
6a7eba24
JFM		 3028 i2c_w(sd, OV7610_REG_BRT, val);
3029 break;
3030 case SEN_OV7670:
594f5b8b 3031/*win trace
6a7eba24
JFM		 3032 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
3033 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
3034 break;
3035 }
6a7eba24
JFM		 3036}
3037
3038static void setcontrast(struct gspca_dev *gspca_dev)
3039{
3040 struct sd *sd = (struct sd *) gspca_dev;
3041 int val;
6a7eba24
JFM		 3042
3043 val = sd->contrast;
6a7eba24
JFM		 3044 switch (sd->sensor) {
3045 case SEN_OV7610:
3046 case SEN_OV6620:
3047 i2c_w(sd, OV7610_REG_CNT, val);
3048 break;
3049 case SEN_OV6630:
7d971373 3050 case SEN_OV66308AF:
6a7eba24 3051 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
49809d6a 3052 break;
6a7eba24 3053 case SEN_OV8610: {
a5ae2062 3054 static const __u8 ctab[] = {
6a7eba24
JFM		 3055 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
3056 };
3057
3058 /* Use Y gamma control instead. Bit 0 enables it. */
3059 i2c_w(sd, 0x64, ctab[val >> 5]);
3060 break;
3061 }
3062 case SEN_OV7620: {
a5ae2062 3063 static const __u8 ctab[] = {
6a7eba24
JFM		 3064 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
3065 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
3066 };
3067
3068 /* Use Y gamma control instead. Bit 0 enables it. */
3069 i2c_w(sd, 0x64, ctab[val >> 4]);
3070 break;
3071 }
3072 case SEN_OV7640:
3073 /* Use gain control instead. */
3074 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
3075 break;
3076 case SEN_OV7670:
3077 /* check that this isn't just the same as ov7610 */
3078 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
3079 break;
3080 }
6a7eba24
JFM		 3081}
3082
3083static void setcolors(struct gspca_dev *gspca_dev)
3084{
3085 struct sd *sd = (struct sd *) gspca_dev;
3086 int val;
6a7eba24
JFM		 3087
3088 val = sd->colors;
6a7eba24
JFM		 3089 switch (sd->sensor) {
3090 case SEN_OV8610:
3091 case SEN_OV7610:
3092 case SEN_OV76BE:
3093 case SEN_OV6620:
3094 case SEN_OV6630:
7d971373 3095 case SEN_OV66308AF:
6a7eba24
JFM		 3096 i2c_w(sd, OV7610_REG_SAT, val);
3097 break;
3098 case SEN_OV7620:
3099 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
3100/* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
3101 if (rc < 0)
3102 goto out; */
3103 i2c_w(sd, OV7610_REG_SAT, val);
3104 break;
3105 case SEN_OV7640:
3106 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
3107 break;
3108 case SEN_OV7670:
3109 /* supported later once I work out how to do it
3110 * transparently fail now! */
3111 /* set REG_COM13 values for UV sat auto mode */
3112 break;
3113 }
6a7eba24
JFM		 3114}
3115
02ab18b0
HG		 3116static void setautobrightness(struct sd *sd)
3117{
3118 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
3119 return;
3120
3121 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
3122}
3123
3124static void setfreq(struct sd *sd)
3125{
3126 if (sd->sensor == SEN_OV7670) {
3127 switch (sd->freq) {
3128 case 0: /* Banding filter disabled */
3129 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
3130 break;
3131 case 1: /* 50 hz */
3132 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
3133 OV7670_COM8_BFILT);
3134 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
3135 break;
3136 case 2: /* 60 hz */
3137 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
3138 OV7670_COM8_BFILT);
3139 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
3140 break;
3141 case 3: /* Auto hz */
3142 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
3143 OV7670_COM8_BFILT);
3144 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
3145 0x18);
3146 break;
3147 }
3148 } else {
3149 switch (sd->freq) {
3150 case 0: /* Banding filter disabled */
3151 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
3152 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
3153 break;
3154 case 1: /* 50 hz (filter on and framerate adj) */
3155 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
3156 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
3157 /* 20 fps -> 16.667 fps */
3158 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 3159 sd->sensor == SEN_OV6630 ||
3160 sd->sensor == SEN_OV66308AF)
02ab18b0
HG		 3161 i2c_w(sd, 0x2b, 0x5e);
3162 else
3163 i2c_w(sd, 0x2b, 0xac);
3164 break;
3165 case 2: /* 60 hz (filter on, ...) */
3166 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
3167 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 3168 sd->sensor == SEN_OV6630 ||
3169 sd->sensor == SEN_OV66308AF) {
02ab18b0
HG		 3170 /* 20 fps -> 15 fps */
3171 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
3172 i2c_w(sd, 0x2b, 0xa8);
3173 } else {
3174 /* no framerate adj. */
3175 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
3176 }
3177 break;
3178 }
3179 }
3180}
3181
6a7eba24
JFM		 3182static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
3183{
3184 struct sd *sd = (struct sd *) gspca_dev;
3185
3186 sd->brightness = val;
ac40b1fa
JFM		 3187 if (gspca_dev->streaming)
3188 setbrightness(gspca_dev);
6a7eba24
JFM		 3189 return 0;
3190}
3191
3192static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
3193{
3194 struct sd *sd = (struct sd *) gspca_dev;
3195
3196 *val = sd->brightness;
3197 return 0;
3198}
3199
3200static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
3201{
3202 struct sd *sd = (struct sd *) gspca_dev;
3203
3204 sd->contrast = val;
ac40b1fa
JFM		 3205 if (gspca_dev->streaming)
3206 setcontrast(gspca_dev);
6a7eba24
JFM		 3207 return 0;
3208}
3209
3210static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
3211{
3212 struct sd *sd = (struct sd *) gspca_dev;
3213
3214 *val = sd->contrast;
3215 return 0;
3216}
3217
3218static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
3219{
3220 struct sd *sd = (struct sd *) gspca_dev;
3221
3222 sd->colors = val;
ac40b1fa
JFM		 3223 if (gspca_dev->streaming)
3224 setcolors(gspca_dev);
6a7eba24
JFM		 3225 return 0;
3226}
3227
3228static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
3229{
3230 struct sd *sd = (struct sd *) gspca_dev;
3231
3232 *val = sd->colors;
3233 return 0;
3234}
3235
0cd6759d
JFM		 3236static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
3237{
3238 struct sd *sd = (struct sd *) gspca_dev;
3239
3240 sd->hflip = val;
ac40b1fa
JFM		 3241 if (gspca_dev->streaming)
3242 sethvflip(sd);
0cd6759d
JFM		 3243 return 0;
3244}
3245
3246static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
3247{
3248 struct sd *sd = (struct sd *) gspca_dev;
3249
3250 *val = sd->hflip;
3251 return 0;
3252}
3253
3254static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
3255{
3256 struct sd *sd = (struct sd *) gspca_dev;
3257
3258 sd->vflip = val;
ac40b1fa
JFM		 3259 if (gspca_dev->streaming)
3260 sethvflip(sd);
0cd6759d
JFM		 3261 return 0;
3262}
3263
3264static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
3265{
3266 struct sd *sd = (struct sd *) gspca_dev;
3267
3268 *val = sd->vflip;
3269 return 0;
3270}
3271
02ab18b0
HG		 3272static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
3273{
3274 struct sd *sd = (struct sd *) gspca_dev;
3275
3276 sd->autobrightness = val;
3277 if (gspca_dev->streaming)
3278 setautobrightness(sd);
3279 return 0;
3280}
3281
3282static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
3283{
3284 struct sd *sd = (struct sd *) gspca_dev;
3285
3286 *val = sd->autobrightness;
3287 return 0;
3288}
3289
3290static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
3291{
3292 struct sd *sd = (struct sd *) gspca_dev;
3293
3294 sd->freq = val;
3295 if (gspca_dev->streaming)
3296 setfreq(sd);
3297 return 0;
3298}
3299
3300static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
3301{
3302 struct sd *sd = (struct sd *) gspca_dev;
3303
3304 *val = sd->freq;
3305 return 0;
3306}
3307
3308static int sd_querymenu(struct gspca_dev *gspca_dev,
3309 struct v4l2_querymenu *menu)
3310{
3311 struct sd *sd = (struct sd *) gspca_dev;
3312
3313 switch (menu->id) {
3314 case V4L2_CID_POWER_LINE_FREQUENCY:
3315 switch (menu->index) {
3316 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
3317 strcpy((char *) menu->name, "NoFliker");
3318 return 0;
3319 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
3320 strcpy((char *) menu->name, "50 Hz");
3321 return 0;
3322 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
3323 strcpy((char *) menu->name, "60 Hz");
3324 return 0;
3325 case 3:
3326 if (sd->sensor != SEN_OV7670)
3327 return -EINVAL;
3328
3329 strcpy((char *) menu->name, "Automatic");
3330 return 0;
3331 }
3332 break;
3333 }
3334 return -EINVAL;
3335}
3336
6a7eba24 3337/* sub-driver description */
a5ae2062 3338static const struct sd_desc sd_desc = {
6a7eba24
JFM		 3339 .name = MODULE_NAME,
3340 .ctrls = sd_ctrls,
3341 .nctrls = ARRAY_SIZE(sd_ctrls),
3342 .config = sd_config,
012d6b02 3343 .init = sd_init,
6a7eba24
JFM		 3344 .start = sd_start,
3345 .stopN = sd_stopN,
6a7eba24 3346 .pkt_scan = sd_pkt_scan,
02ab18b0 3347 .querymenu = sd_querymenu,
6a7eba24
JFM		 3348};
3349
3350/* -- module initialisation -- */
a5ae2062 3351static const __devinitdata struct usb_device_id device_table[] = {
49809d6a
HG		 3352 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
3353 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
3354 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
3355 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
9e4d8258
HG		 3356 {USB_DEVICE(0x041e, 0x4064),
3357 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
518c8df7 3358 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
9e4d8258
HG		 3359 {USB_DEVICE(0x041e, 0x4068),
3360 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
49809d6a
HG		 3361 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
3362 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
3363 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
1876bb92 3364 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
49809d6a
HG		 3365 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
3366 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
3367 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
3368 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
3369 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
1876bb92 3370 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
49809d6a 3371 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
1876bb92 3372 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
6a7eba24
JFM		 3373 {}
3374};
ac40b1fa 3375
6a7eba24
JFM		 3376MODULE_DEVICE_TABLE(usb, device_table);
3377
3378/* -- device connect -- */
3379static int sd_probe(struct usb_interface *intf,
3380 const struct usb_device_id *id)
3381{
3382 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
3383 THIS_MODULE);
3384}
3385
3386static struct usb_driver sd_driver = {
3387 .name = MODULE_NAME,
3388 .id_table = device_table,
3389 .probe = sd_probe,
3390 .disconnect = gspca_disconnect,
6a709749
JFM		 3391#ifdef CONFIG_PM
3392 .suspend = gspca_suspend,
3393 .resume = gspca_resume,
3394#endif
6a7eba24
JFM		 3395};
3396
3397/* -- module insert / remove -- */
3398static int __init sd_mod_init(void)
3399{
f69e9529
AK		 3400 int ret;
3401 ret = usb_register(&sd_driver);
3402 if (ret < 0)
e6b14849 3403 return ret;
10b0e96e 3404 PDEBUG(D_PROBE, "registered");
6a7eba24
JFM		 3405 return 0;
3406}
3407static void __exit sd_mod_exit(void)
3408{
3409 usb_deregister(&sd_driver);
3410 PDEBUG(D_PROBE, "deregistered");
3411}
3412
3413module_init(sd_mod_init);
3414module_exit(sd_mod_exit);
3415
3416module_param(frame_rate, int, 0644);
3417MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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