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6a7eba24 JFM |
1 | /** |
2 | * OV519 driver | |
3 | * | |
4 | * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr) | |
b46aaa02 | 5 | * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com> |
6a7eba24 | 6 | * |
2961e875 RB |
7 | * This module is adapted from the ov51x-jpeg package, which itself |
8 | * was adapted from the ov511 driver. | |
9 | * | |
10 | * Original copyright for the ov511 driver is: | |
11 | * | |
b46aaa02 | 12 | * Copyright (c) 1999-2006 Mark W. McClelland |
2961e875 | 13 | * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach |
b46aaa02 HG |
14 | * Many improvements by Bret Wallach <bwallac1@san.rr.com> |
15 | * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000) | |
16 | * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org> | |
17 | * Changes by Claudio Matsuoka <claudio@conectiva.com> | |
2961e875 RB |
18 | * |
19 | * ov51x-jpeg original copyright is: | |
20 | * | |
21 | * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org> | |
22 | * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com> | |
6a7eba24 JFM |
23 | * |
24 | * This program is free software; you can redistribute it and/or modify | |
25 | * it under the terms of the GNU General Public License as published by | |
26 | * the Free Software Foundation; either version 2 of the License, or | |
27 | * any later version. | |
28 | * | |
29 | * This program is distributed in the hope that it will be useful, | |
30 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
31 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
32 | * GNU General Public License for more details. | |
33 | * | |
34 | * You should have received a copy of the GNU General Public License | |
35 | * along with this program; if not, write to the Free Software | |
36 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
37 | * | |
38 | */ | |
39 | #define MODULE_NAME "ov519" | |
40 | ||
41 | #include "gspca.h" | |
42 | ||
6a7eba24 JFM |
43 | MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>"); |
44 | MODULE_DESCRIPTION("OV519 USB Camera Driver"); | |
45 | MODULE_LICENSE("GPL"); | |
46 | ||
47 | /* global parameters */ | |
48 | static int frame_rate; | |
49 | ||
50 | /* Number of times to retry a failed I2C transaction. Increase this if you | |
51 | * are getting "Failed to read sensor ID..." */ | |
52 | static int i2c_detect_tries = 10; | |
53 | ||
54 | /* ov519 device descriptor */ | |
55 | struct sd { | |
56 | struct gspca_dev gspca_dev; /* !! must be the first item */ | |
57 | ||
92918a53 HG |
58 | __u8 packet_nr; |
59 | ||
49809d6a HG |
60 | char bridge; |
61 | #define BRIDGE_OV511 0 | |
62 | #define BRIDGE_OV511PLUS 1 | |
63 | #define BRIDGE_OV518 2 | |
64 | #define BRIDGE_OV518PLUS 3 | |
65 | #define BRIDGE_OV519 4 | |
635118d5 | 66 | #define BRIDGE_OVFX2 5 |
a511ba94 | 67 | #define BRIDGE_W9968CF 6 |
9e4d8258 HG |
68 | #define BRIDGE_MASK 7 |
69 | ||
70 | char invert_led; | |
71 | #define BRIDGE_INVERT_LED 8 | |
49809d6a | 72 | |
6a7eba24 | 73 | /* Determined by sensor type */ |
ac40b1fa | 74 | __u8 sif; |
6a7eba24 | 75 | |
ac40b1fa JFM |
76 | __u8 brightness; |
77 | __u8 contrast; | |
78 | __u8 colors; | |
0cd6759d JFM |
79 | __u8 hflip; |
80 | __u8 vflip; | |
02ab18b0 HG |
81 | __u8 autobrightness; |
82 | __u8 freq; | |
79b35902 HG |
83 | __u8 quality; |
84 | #define QUALITY_MIN 50 | |
85 | #define QUALITY_MAX 70 | |
86 | #define QUALITY_DEF 50 | |
6a7eba24 | 87 | |
ac40b1fa | 88 | __u8 stopped; /* Streaming is temporarily paused */ |
6a7eba24 | 89 | |
1876bb92 HG |
90 | __u8 frame_rate; /* current Framerate */ |
91 | __u8 clockdiv; /* clockdiv override */ | |
6a7eba24 JFM |
92 | |
93 | char sensor; /* Type of image sensor chip (SEN_*) */ | |
94 | #define SEN_UNKNOWN 0 | |
635118d5 HG |
95 | #define SEN_OV2610 1 |
96 | #define SEN_OV3610 2 | |
97 | #define SEN_OV6620 3 | |
98 | #define SEN_OV6630 4 | |
99 | #define SEN_OV66308AF 5 | |
100 | #define SEN_OV7610 6 | |
101 | #define SEN_OV7620 7 | |
102 | #define SEN_OV7640 8 | |
103 | #define SEN_OV7670 9 | |
104 | #define SEN_OV76BE 10 | |
105 | #define SEN_OV8610 11 | |
a511ba94 HG |
106 | |
107 | u8 sensor_addr; | |
108 | int sensor_width; | |
109 | int sensor_height; | |
fb1f9020 | 110 | int sensor_reg_cache[256]; |
79b35902 HG |
111 | |
112 | u8 *jpeg_hdr; | |
6a7eba24 JFM |
113 | }; |
114 | ||
a511ba94 HG |
115 | /* Note this is a bit of a hack, but the w9968cf driver needs the code for all |
116 | the ov sensors which is already present here. When we have the time we | |
117 | really should move the sensor drivers to v4l2 sub drivers. */ | |
118 | #include "w996Xcf.c" | |
119 | ||
6a7eba24 JFM |
120 | /* V4L2 controls supported by the driver */ |
121 | static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val); | |
122 | static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); | |
123 | static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val); | |
124 | static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val); | |
125 | static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val); | |
126 | static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val); | |
0cd6759d JFM |
127 | static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val); |
128 | static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val); | |
129 | static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val); | |
130 | static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val); | |
02ab18b0 HG |
131 | static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val); |
132 | static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val); | |
133 | static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val); | |
134 | static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val); | |
49809d6a HG |
135 | static void setbrightness(struct gspca_dev *gspca_dev); |
136 | static void setcontrast(struct gspca_dev *gspca_dev); | |
137 | static void setcolors(struct gspca_dev *gspca_dev); | |
02ab18b0 HG |
138 | static void setautobrightness(struct sd *sd); |
139 | static void setfreq(struct sd *sd); | |
6a7eba24 | 140 | |
02ab18b0 | 141 | static const struct ctrl sd_ctrls[] = { |
6a7eba24 JFM |
142 | { |
143 | { | |
144 | .id = V4L2_CID_BRIGHTNESS, | |
145 | .type = V4L2_CTRL_TYPE_INTEGER, | |
146 | .name = "Brightness", | |
147 | .minimum = 0, | |
148 | .maximum = 255, | |
149 | .step = 1, | |
594f5b8b JFM |
150 | #define BRIGHTNESS_DEF 127 |
151 | .default_value = BRIGHTNESS_DEF, | |
6a7eba24 JFM |
152 | }, |
153 | .set = sd_setbrightness, | |
154 | .get = sd_getbrightness, | |
155 | }, | |
6a7eba24 JFM |
156 | { |
157 | { | |
158 | .id = V4L2_CID_CONTRAST, | |
159 | .type = V4L2_CTRL_TYPE_INTEGER, | |
160 | .name = "Contrast", | |
161 | .minimum = 0, | |
162 | .maximum = 255, | |
163 | .step = 1, | |
594f5b8b JFM |
164 | #define CONTRAST_DEF 127 |
165 | .default_value = CONTRAST_DEF, | |
6a7eba24 JFM |
166 | }, |
167 | .set = sd_setcontrast, | |
168 | .get = sd_getcontrast, | |
169 | }, | |
6a7eba24 JFM |
170 | { |
171 | { | |
172 | .id = V4L2_CID_SATURATION, | |
173 | .type = V4L2_CTRL_TYPE_INTEGER, | |
594f5b8b | 174 | .name = "Color", |
6a7eba24 JFM |
175 | .minimum = 0, |
176 | .maximum = 255, | |
177 | .step = 1, | |
594f5b8b JFM |
178 | #define COLOR_DEF 127 |
179 | .default_value = COLOR_DEF, | |
6a7eba24 JFM |
180 | }, |
181 | .set = sd_setcolors, | |
182 | .get = sd_getcolors, | |
183 | }, | |
02ab18b0 | 184 | /* The flip controls work with ov7670 only */ |
de00448f | 185 | #define HFLIP_IDX 3 |
0cd6759d JFM |
186 | { |
187 | { | |
188 | .id = V4L2_CID_HFLIP, | |
189 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
190 | .name = "Mirror", | |
191 | .minimum = 0, | |
192 | .maximum = 1, | |
193 | .step = 1, | |
194 | #define HFLIP_DEF 0 | |
195 | .default_value = HFLIP_DEF, | |
196 | }, | |
197 | .set = sd_sethflip, | |
198 | .get = sd_gethflip, | |
199 | }, | |
de00448f | 200 | #define VFLIP_IDX 4 |
0cd6759d JFM |
201 | { |
202 | { | |
203 | .id = V4L2_CID_VFLIP, | |
204 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
205 | .name = "Vflip", | |
206 | .minimum = 0, | |
207 | .maximum = 1, | |
208 | .step = 1, | |
209 | #define VFLIP_DEF 0 | |
210 | .default_value = VFLIP_DEF, | |
211 | }, | |
212 | .set = sd_setvflip, | |
213 | .get = sd_getvflip, | |
214 | }, | |
02ab18b0 HG |
215 | #define AUTOBRIGHT_IDX 5 |
216 | { | |
217 | { | |
218 | .id = V4L2_CID_AUTOBRIGHTNESS, | |
219 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
220 | .name = "Auto Brightness", | |
221 | .minimum = 0, | |
222 | .maximum = 1, | |
223 | .step = 1, | |
224 | #define AUTOBRIGHT_DEF 1 | |
225 | .default_value = AUTOBRIGHT_DEF, | |
226 | }, | |
227 | .set = sd_setautobrightness, | |
228 | .get = sd_getautobrightness, | |
229 | }, | |
230 | #define FREQ_IDX 6 | |
231 | { | |
232 | { | |
233 | .id = V4L2_CID_POWER_LINE_FREQUENCY, | |
234 | .type = V4L2_CTRL_TYPE_MENU, | |
235 | .name = "Light frequency filter", | |
236 | .minimum = 0, | |
237 | .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */ | |
238 | .step = 1, | |
239 | #define FREQ_DEF 0 | |
240 | .default_value = FREQ_DEF, | |
241 | }, | |
242 | .set = sd_setfreq, | |
243 | .get = sd_getfreq, | |
244 | }, | |
245 | #define OV7670_FREQ_IDX 7 | |
246 | { | |
247 | { | |
248 | .id = V4L2_CID_POWER_LINE_FREQUENCY, | |
249 | .type = V4L2_CTRL_TYPE_MENU, | |
250 | .name = "Light frequency filter", | |
251 | .minimum = 0, | |
252 | .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */ | |
253 | .step = 1, | |
254 | #define OV7670_FREQ_DEF 3 | |
255 | .default_value = OV7670_FREQ_DEF, | |
256 | }, | |
257 | .set = sd_setfreq, | |
258 | .get = sd_getfreq, | |
259 | }, | |
6a7eba24 JFM |
260 | }; |
261 | ||
49809d6a | 262 | static const struct v4l2_pix_format ov519_vga_mode[] = { |
c2446b3e JFM |
263 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
264 | .bytesperline = 320, | |
594f5b8b | 265 | .sizeimage = 320 * 240 * 3 / 8 + 590, |
c2446b3e JFM |
266 | .colorspace = V4L2_COLORSPACE_JPEG, |
267 | .priv = 1}, | |
268 | {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
269 | .bytesperline = 640, | |
270 | .sizeimage = 640 * 480 * 3 / 8 + 590, | |
271 | .colorspace = V4L2_COLORSPACE_JPEG, | |
272 | .priv = 0}, | |
6a7eba24 | 273 | }; |
49809d6a | 274 | static const struct v4l2_pix_format ov519_sif_mode[] = { |
124cc9c0 HG |
275 | {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
276 | .bytesperline = 160, | |
277 | .sizeimage = 160 * 120 * 3 / 8 + 590, | |
278 | .colorspace = V4L2_COLORSPACE_JPEG, | |
279 | .priv = 3}, | |
c2446b3e JFM |
280 | {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
281 | .bytesperline = 176, | |
594f5b8b | 282 | .sizeimage = 176 * 144 * 3 / 8 + 590, |
c2446b3e JFM |
283 | .colorspace = V4L2_COLORSPACE_JPEG, |
284 | .priv = 1}, | |
124cc9c0 HG |
285 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
286 | .bytesperline = 320, | |
287 | .sizeimage = 320 * 240 * 3 / 8 + 590, | |
288 | .colorspace = V4L2_COLORSPACE_JPEG, | |
289 | .priv = 2}, | |
c2446b3e JFM |
290 | {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
291 | .bytesperline = 352, | |
594f5b8b | 292 | .sizeimage = 352 * 288 * 3 / 8 + 590, |
c2446b3e JFM |
293 | .colorspace = V4L2_COLORSPACE_JPEG, |
294 | .priv = 0}, | |
6a7eba24 JFM |
295 | }; |
296 | ||
b282d873 HG |
297 | /* Note some of the sizeimage values for the ov511 / ov518 may seem |
298 | larger then necessary, however they need to be this big as the ov511 / | |
299 | ov518 always fills the entire isoc frame, using 0 padding bytes when | |
300 | it doesn't have any data. So with low framerates the amount of data | |
301 | transfered can become quite large (libv4l will remove all the 0 padding | |
302 | in userspace). */ | |
49809d6a HG |
303 | static const struct v4l2_pix_format ov518_vga_mode[] = { |
304 | {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
305 | .bytesperline = 320, | |
b282d873 | 306 | .sizeimage = 320 * 240 * 3, |
49809d6a HG |
307 | .colorspace = V4L2_COLORSPACE_JPEG, |
308 | .priv = 1}, | |
309 | {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
310 | .bytesperline = 640, | |
b282d873 | 311 | .sizeimage = 640 * 480 * 2, |
49809d6a HG |
312 | .colorspace = V4L2_COLORSPACE_JPEG, |
313 | .priv = 0}, | |
314 | }; | |
315 | static const struct v4l2_pix_format ov518_sif_mode[] = { | |
124cc9c0 HG |
316 | {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
317 | .bytesperline = 160, | |
b282d873 | 318 | .sizeimage = 70000, |
124cc9c0 HG |
319 | .colorspace = V4L2_COLORSPACE_JPEG, |
320 | .priv = 3}, | |
49809d6a HG |
321 | {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
322 | .bytesperline = 176, | |
b282d873 | 323 | .sizeimage = 70000, |
49809d6a HG |
324 | .colorspace = V4L2_COLORSPACE_JPEG, |
325 | .priv = 1}, | |
124cc9c0 HG |
326 | {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
327 | .bytesperline = 320, | |
b282d873 | 328 | .sizeimage = 320 * 240 * 3, |
124cc9c0 HG |
329 | .colorspace = V4L2_COLORSPACE_JPEG, |
330 | .priv = 2}, | |
49809d6a HG |
331 | {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
332 | .bytesperline = 352, | |
b282d873 | 333 | .sizeimage = 352 * 288 * 3, |
49809d6a HG |
334 | .colorspace = V4L2_COLORSPACE_JPEG, |
335 | .priv = 0}, | |
336 | }; | |
337 | ||
1876bb92 HG |
338 | static const struct v4l2_pix_format ov511_vga_mode[] = { |
339 | {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
340 | .bytesperline = 320, | |
341 | .sizeimage = 320 * 240 * 3, | |
342 | .colorspace = V4L2_COLORSPACE_JPEG, | |
343 | .priv = 1}, | |
344 | {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
345 | .bytesperline = 640, | |
346 | .sizeimage = 640 * 480 * 2, | |
347 | .colorspace = V4L2_COLORSPACE_JPEG, | |
348 | .priv = 0}, | |
349 | }; | |
350 | static const struct v4l2_pix_format ov511_sif_mode[] = { | |
351 | {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
352 | .bytesperline = 160, | |
b282d873 | 353 | .sizeimage = 70000, |
1876bb92 HG |
354 | .colorspace = V4L2_COLORSPACE_JPEG, |
355 | .priv = 3}, | |
356 | {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
357 | .bytesperline = 176, | |
b282d873 | 358 | .sizeimage = 70000, |
1876bb92 HG |
359 | .colorspace = V4L2_COLORSPACE_JPEG, |
360 | .priv = 1}, | |
361 | {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
362 | .bytesperline = 320, | |
363 | .sizeimage = 320 * 240 * 3, | |
364 | .colorspace = V4L2_COLORSPACE_JPEG, | |
365 | .priv = 2}, | |
366 | {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
367 | .bytesperline = 352, | |
368 | .sizeimage = 352 * 288 * 3, | |
369 | .colorspace = V4L2_COLORSPACE_JPEG, | |
370 | .priv = 0}, | |
371 | }; | |
49809d6a | 372 | |
635118d5 HG |
373 | static const struct v4l2_pix_format ovfx2_vga_mode[] = { |
374 | {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
375 | .bytesperline = 320, | |
376 | .sizeimage = 320 * 240, | |
377 | .colorspace = V4L2_COLORSPACE_SRGB, | |
378 | .priv = 1}, | |
379 | {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
380 | .bytesperline = 640, | |
381 | .sizeimage = 640 * 480, | |
382 | .colorspace = V4L2_COLORSPACE_SRGB, | |
383 | .priv = 0}, | |
384 | }; | |
385 | static const struct v4l2_pix_format ovfx2_cif_mode[] = { | |
386 | {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
387 | .bytesperline = 160, | |
388 | .sizeimage = 160 * 120, | |
389 | .colorspace = V4L2_COLORSPACE_SRGB, | |
390 | .priv = 3}, | |
391 | {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
392 | .bytesperline = 176, | |
393 | .sizeimage = 176 * 144, | |
394 | .colorspace = V4L2_COLORSPACE_SRGB, | |
395 | .priv = 1}, | |
396 | {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
397 | .bytesperline = 320, | |
398 | .sizeimage = 320 * 240, | |
399 | .colorspace = V4L2_COLORSPACE_SRGB, | |
400 | .priv = 2}, | |
401 | {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
402 | .bytesperline = 352, | |
403 | .sizeimage = 352 * 288, | |
404 | .colorspace = V4L2_COLORSPACE_SRGB, | |
405 | .priv = 0}, | |
406 | }; | |
407 | static const struct v4l2_pix_format ovfx2_ov2610_mode[] = { | |
408 | {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
409 | .bytesperline = 1600, | |
410 | .sizeimage = 1600 * 1200, | |
411 | .colorspace = V4L2_COLORSPACE_SRGB}, | |
412 | }; | |
413 | static const struct v4l2_pix_format ovfx2_ov3610_mode[] = { | |
635118d5 HG |
414 | {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, |
415 | .bytesperline = 640, | |
416 | .sizeimage = 640 * 480, | |
b46aaa02 HG |
417 | .colorspace = V4L2_COLORSPACE_SRGB, |
418 | .priv = 1}, | |
419 | {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
420 | .bytesperline = 800, | |
421 | .sizeimage = 800 * 600, | |
422 | .colorspace = V4L2_COLORSPACE_SRGB, | |
423 | .priv = 1}, | |
424 | {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
425 | .bytesperline = 1024, | |
426 | .sizeimage = 1024 * 768, | |
427 | .colorspace = V4L2_COLORSPACE_SRGB, | |
428 | .priv = 1}, | |
429 | {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
430 | .bytesperline = 1600, | |
431 | .sizeimage = 1600 * 1200, | |
432 | .colorspace = V4L2_COLORSPACE_SRGB, | |
433 | .priv = 0}, | |
434 | {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
435 | .bytesperline = 2048, | |
436 | .sizeimage = 2048 * 1536, | |
437 | .colorspace = V4L2_COLORSPACE_SRGB, | |
438 | .priv = 0}, | |
635118d5 HG |
439 | }; |
440 | ||
441 | ||
49809d6a | 442 | /* Registers common to OV511 / OV518 */ |
1876bb92 | 443 | #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */ |
49809d6a | 444 | #define R51x_SYS_RESET 0x50 |
1876bb92 HG |
445 | /* Reset type flags */ |
446 | #define OV511_RESET_OMNICE 0x08 | |
49809d6a HG |
447 | #define R51x_SYS_INIT 0x53 |
448 | #define R51x_SYS_SNAP 0x52 | |
449 | #define R51x_SYS_CUST_ID 0x5F | |
450 | #define R51x_COMP_LUT_BEGIN 0x80 | |
451 | ||
452 | /* OV511 Camera interface register numbers */ | |
1876bb92 HG |
453 | #define R511_CAM_DELAY 0x10 |
454 | #define R511_CAM_EDGE 0x11 | |
455 | #define R511_CAM_PXCNT 0x12 | |
456 | #define R511_CAM_LNCNT 0x13 | |
457 | #define R511_CAM_PXDIV 0x14 | |
458 | #define R511_CAM_LNDIV 0x15 | |
459 | #define R511_CAM_UV_EN 0x16 | |
460 | #define R511_CAM_LINE_MODE 0x17 | |
461 | #define R511_CAM_OPTS 0x18 | |
462 | ||
463 | #define R511_SNAP_FRAME 0x19 | |
464 | #define R511_SNAP_PXCNT 0x1A | |
465 | #define R511_SNAP_LNCNT 0x1B | |
466 | #define R511_SNAP_PXDIV 0x1C | |
467 | #define R511_SNAP_LNDIV 0x1D | |
468 | #define R511_SNAP_UV_EN 0x1E | |
469 | #define R511_SNAP_UV_EN 0x1E | |
470 | #define R511_SNAP_OPTS 0x1F | |
471 | ||
472 | #define R511_DRAM_FLOW_CTL 0x20 | |
473 | #define R511_FIFO_OPTS 0x31 | |
474 | #define R511_I2C_CTL 0x40 | |
49809d6a | 475 | #define R511_SYS_LED_CTL 0x55 /* OV511+ only */ |
1876bb92 HG |
476 | #define R511_COMP_EN 0x78 |
477 | #define R511_COMP_LUT_EN 0x79 | |
49809d6a HG |
478 | |
479 | /* OV518 Camera interface register numbers */ | |
480 | #define R518_GPIO_OUT 0x56 /* OV518(+) only */ | |
481 | #define R518_GPIO_CTL 0x57 /* OV518(+) only */ | |
482 | ||
6a7eba24 | 483 | /* OV519 Camera interface register numbers */ |
ac40b1fa JFM |
484 | #define OV519_R10_H_SIZE 0x10 |
485 | #define OV519_R11_V_SIZE 0x11 | |
486 | #define OV519_R12_X_OFFSETL 0x12 | |
487 | #define OV519_R13_X_OFFSETH 0x13 | |
488 | #define OV519_R14_Y_OFFSETL 0x14 | |
489 | #define OV519_R15_Y_OFFSETH 0x15 | |
490 | #define OV519_R16_DIVIDER 0x16 | |
491 | #define OV519_R20_DFR 0x20 | |
492 | #define OV519_R25_FORMAT 0x25 | |
6a7eba24 JFM |
493 | |
494 | /* OV519 System Controller register numbers */ | |
495 | #define OV519_SYS_RESET1 0x51 | |
496 | #define OV519_SYS_EN_CLK1 0x54 | |
497 | ||
498 | #define OV519_GPIO_DATA_OUT0 0x71 | |
499 | #define OV519_GPIO_IO_CTRL0 0x72 | |
500 | ||
501 | #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */ | |
502 | ||
b46aaa02 HG |
503 | /* |
504 | * The FX2 chip does not give us a zero length read at end of frame. | |
505 | * It does, however, give a short read at the end of a frame, if | |
506 | * neccessary, rather than run two frames together. | |
507 | * | |
508 | * By choosing the right bulk transfer size, we are guaranteed to always | |
509 | * get a short read for the last read of each frame. Frame sizes are | |
510 | * always a composite number (width * height, or a multiple) so if we | |
511 | * choose a prime number, we are guaranteed that the last read of a | |
512 | * frame will be short. | |
513 | * | |
514 | * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB, | |
515 | * otherwise EOVERFLOW "babbling" errors occur. I have not been able | |
516 | * to figure out why. [PMiller] | |
517 | * | |
518 | * The constant (13 * 4096) is the largest "prime enough" number less than 64KB. | |
519 | * | |
520 | * It isn't enough to know the number of bytes per frame, in case we | |
521 | * have data dropouts or buffer overruns (even though the FX2 double | |
522 | * buffers, there are some pretty strict real time constraints for | |
523 | * isochronous transfer for larger frame sizes). | |
524 | */ | |
525 | #define OVFX2_BULK_SIZE (13 * 4096) | |
526 | ||
6a7eba24 JFM |
527 | /* I2C registers */ |
528 | #define R51x_I2C_W_SID 0x41 | |
529 | #define R51x_I2C_SADDR_3 0x42 | |
530 | #define R51x_I2C_SADDR_2 0x43 | |
531 | #define R51x_I2C_R_SID 0x44 | |
532 | #define R51x_I2C_DATA 0x45 | |
533 | #define R518_I2C_CTL 0x47 /* OV518(+) only */ | |
b46aaa02 | 534 | #define OVFX2_I2C_ADDR 0x00 |
6a7eba24 JFM |
535 | |
536 | /* I2C ADDRESSES */ | |
537 | #define OV7xx0_SID 0x42 | |
229bb7dc | 538 | #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */ |
6a7eba24 JFM |
539 | #define OV8xx0_SID 0xa0 |
540 | #define OV6xx0_SID 0xc0 | |
541 | ||
542 | /* OV7610 registers */ | |
543 | #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */ | |
49809d6a HG |
544 | #define OV7610_REG_BLUE 0x01 /* blue channel balance */ |
545 | #define OV7610_REG_RED 0x02 /* red channel balance */ | |
6a7eba24 JFM |
546 | #define OV7610_REG_SAT 0x03 /* saturation */ |
547 | #define OV8610_REG_HUE 0x04 /* 04 reserved */ | |
548 | #define OV7610_REG_CNT 0x05 /* Y contrast */ | |
549 | #define OV7610_REG_BRT 0x06 /* Y brightness */ | |
550 | #define OV7610_REG_COM_C 0x14 /* misc common regs */ | |
551 | #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */ | |
552 | #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */ | |
553 | #define OV7610_REG_COM_I 0x29 /* misc settings */ | |
554 | ||
555 | /* OV7670 registers */ | |
556 | #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */ | |
557 | #define OV7670_REG_BLUE 0x01 /* blue gain */ | |
558 | #define OV7670_REG_RED 0x02 /* red gain */ | |
559 | #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */ | |
560 | #define OV7670_REG_COM1 0x04 /* Control 1 */ | |
561 | #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */ | |
562 | #define OV7670_REG_COM3 0x0c /* Control 3 */ | |
563 | #define OV7670_REG_COM4 0x0d /* Control 4 */ | |
564 | #define OV7670_REG_COM5 0x0e /* All "reserved" */ | |
565 | #define OV7670_REG_COM6 0x0f /* Control 6 */ | |
566 | #define OV7670_REG_AECH 0x10 /* More bits of AEC value */ | |
567 | #define OV7670_REG_CLKRC 0x11 /* Clock control */ | |
568 | #define OV7670_REG_COM7 0x12 /* Control 7 */ | |
569 | #define OV7670_COM7_FMT_VGA 0x00 | |
570 | #define OV7670_COM7_YUV 0x00 /* YUV */ | |
571 | #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */ | |
572 | #define OV7670_COM7_FMT_MASK 0x38 | |
573 | #define OV7670_COM7_RESET 0x80 /* Register reset */ | |
574 | #define OV7670_REG_COM8 0x13 /* Control 8 */ | |
575 | #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */ | |
576 | #define OV7670_COM8_AWB 0x02 /* White balance enable */ | |
577 | #define OV7670_COM8_AGC 0x04 /* Auto gain enable */ | |
578 | #define OV7670_COM8_BFILT 0x20 /* Band filter enable */ | |
579 | #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */ | |
580 | #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */ | |
581 | #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */ | |
582 | #define OV7670_REG_COM10 0x15 /* Control 10 */ | |
583 | #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */ | |
584 | #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */ | |
585 | #define OV7670_REG_VSTART 0x19 /* Vert start high bits */ | |
586 | #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */ | |
587 | #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */ | |
0cd6759d | 588 | #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */ |
6a7eba24 JFM |
589 | #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */ |
590 | #define OV7670_REG_AEW 0x24 /* AGC upper limit */ | |
591 | #define OV7670_REG_AEB 0x25 /* AGC lower limit */ | |
592 | #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */ | |
593 | #define OV7670_REG_HREF 0x32 /* HREF pieces */ | |
594 | #define OV7670_REG_TSLB 0x3a /* lots of stuff */ | |
595 | #define OV7670_REG_COM11 0x3b /* Control 11 */ | |
596 | #define OV7670_COM11_EXP 0x02 | |
597 | #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */ | |
598 | #define OV7670_REG_COM12 0x3c /* Control 12 */ | |
599 | #define OV7670_REG_COM13 0x3d /* Control 13 */ | |
600 | #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */ | |
601 | #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */ | |
602 | #define OV7670_REG_COM14 0x3e /* Control 14 */ | |
603 | #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */ | |
604 | #define OV7670_REG_COM15 0x40 /* Control 15 */ | |
605 | #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */ | |
606 | #define OV7670_REG_COM16 0x41 /* Control 16 */ | |
607 | #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */ | |
608 | #define OV7670_REG_BRIGHT 0x55 /* Brightness */ | |
609 | #define OV7670_REG_CONTRAS 0x56 /* Contrast control */ | |
610 | #define OV7670_REG_GFIX 0x69 /* Fix gain control */ | |
611 | #define OV7670_REG_RGB444 0x8c /* RGB 444 control */ | |
612 | #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */ | |
613 | #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */ | |
614 | #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */ | |
615 | #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */ | |
616 | #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */ | |
617 | #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */ | |
618 | #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */ | |
619 | #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */ | |
620 | #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */ | |
621 | ||
4202f71c JFM |
622 | struct ov_regvals { |
623 | __u8 reg; | |
624 | __u8 val; | |
625 | }; | |
626 | struct ov_i2c_regvals { | |
627 | __u8 reg; | |
628 | __u8 val; | |
629 | }; | |
630 | ||
635118d5 HG |
631 | /* Settings for OV2610 camera chip */ |
632 | static const struct ov_i2c_regvals norm_2610[] = | |
633 | { | |
b46aaa02 | 634 | { 0x12, 0x80 }, /* reset */ |
635118d5 HG |
635 | }; |
636 | ||
637 | static const struct ov_i2c_regvals norm_3620b[] = | |
638 | { | |
639 | /* | |
640 | * From the datasheet: "Note that after writing to register COMH | |
641 | * (0x12) to change the sensor mode, registers related to the | |
642 | * sensor’s cropping window will be reset back to their default | |
643 | * values." | |
644 | * | |
645 | * "wait 4096 external clock ... to make sure the sensor is | |
646 | * stable and ready to access registers" i.e. 160us at 24MHz | |
647 | */ | |
648 | ||
649 | { 0x12, 0x80 }, /* COMH reset */ | |
650 | { 0x12, 0x00 }, /* QXGA, master */ | |
651 | ||
652 | /* | |
653 | * 11 CLKRC "Clock Rate Control" | |
654 | * [7] internal frequency doublers: on | |
655 | * [6] video port mode: master | |
656 | * [5:0] clock divider: 1 | |
657 | */ | |
658 | { 0x11, 0x80 }, | |
659 | ||
660 | /* | |
661 | * 13 COMI "Common Control I" | |
662 | * = 192 (0xC0) 11000000 | |
663 | * COMI[7] "AEC speed selection" | |
664 | * = 1 (0x01) 1....... "Faster AEC correction" | |
665 | * COMI[6] "AEC speed step selection" | |
666 | * = 1 (0x01) .1...... "Big steps, fast" | |
667 | * COMI[5] "Banding filter on off" | |
668 | * = 0 (0x00) ..0..... "Off" | |
669 | * COMI[4] "Banding filter option" | |
670 | * = 0 (0x00) ...0.... "Main clock is 48 MHz and | |
671 | * the PLL is ON" | |
672 | * COMI[3] "Reserved" | |
673 | * = 0 (0x00) ....0... | |
674 | * COMI[2] "AGC auto manual control selection" | |
675 | * = 0 (0x00) .....0.. "Manual" | |
676 | * COMI[1] "AWB auto manual control selection" | |
677 | * = 0 (0x00) ......0. "Manual" | |
678 | * COMI[0] "Exposure control" | |
679 | * = 0 (0x00) .......0 "Manual" | |
680 | */ | |
681 | { 0x13, 0xC0 }, | |
682 | ||
683 | /* | |
684 | * 09 COMC "Common Control C" | |
685 | * = 8 (0x08) 00001000 | |
686 | * COMC[7:5] "Reserved" | |
687 | * = 0 (0x00) 000..... | |
688 | * COMC[4] "Sleep Mode Enable" | |
689 | * = 0 (0x00) ...0.... "Normal mode" | |
690 | * COMC[3:2] "Sensor sampling reset timing selection" | |
691 | * = 2 (0x02) ....10.. "Longer reset time" | |
692 | * COMC[1:0] "Output drive current select" | |
693 | * = 0 (0x00) ......00 "Weakest" | |
694 | */ | |
695 | { 0x09, 0x08 }, | |
696 | ||
697 | /* | |
698 | * 0C COMD "Common Control D" | |
699 | * = 8 (0x08) 00001000 | |
700 | * COMD[7] "Reserved" | |
701 | * = 0 (0x00) 0....... | |
702 | * COMD[6] "Swap MSB and LSB at the output port" | |
703 | * = 0 (0x00) .0...... "False" | |
704 | * COMD[5:3] "Reserved" | |
705 | * = 1 (0x01) ..001... | |
706 | * COMD[2] "Output Average On Off" | |
707 | * = 0 (0x00) .....0.. "Output Normal" | |
708 | * COMD[1] "Sensor precharge voltage selection" | |
709 | * = 0 (0x00) ......0. "Selects internal | |
710 | * reference precharge | |
711 | * voltage" | |
712 | * COMD[0] "Snapshot option" | |
713 | * = 0 (0x00) .......0 "Enable live video output | |
714 | * after snapshot sequence" | |
715 | */ | |
716 | { 0x0c, 0x08 }, | |
717 | ||
718 | /* | |
719 | * 0D COME "Common Control E" | |
720 | * = 161 (0xA1) 10100001 | |
721 | * COME[7] "Output average option" | |
722 | * = 1 (0x01) 1....... "Output average of 4 pixels" | |
723 | * COME[6] "Anti-blooming control" | |
724 | * = 0 (0x00) .0...... "Off" | |
725 | * COME[5:3] "Reserved" | |
726 | * = 4 (0x04) ..100... | |
727 | * COME[2] "Clock output power down pin status" | |
728 | * = 0 (0x00) .....0.. "Tri-state data output pin | |
729 | * on power down" | |
730 | * COME[1] "Data output pin status selection at power down" | |
731 | * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK, | |
732 | * HREF, and CHSYNC pins on | |
733 | * power down" | |
734 | * COME[0] "Auto zero circuit select" | |
735 | * = 1 (0x01) .......1 "On" | |
736 | */ | |
737 | { 0x0d, 0xA1 }, | |
738 | ||
739 | /* | |
740 | * 0E COMF "Common Control F" | |
741 | * = 112 (0x70) 01110000 | |
742 | * COMF[7] "System clock selection" | |
743 | * = 0 (0x00) 0....... "Use 24 MHz system clock" | |
744 | * COMF[6:4] "Reserved" | |
745 | * = 7 (0x07) .111.... | |
746 | * COMF[3] "Manual auto negative offset canceling selection" | |
747 | * = 0 (0x00) ....0... "Auto detect negative | |
748 | * offset and cancel it" | |
749 | * COMF[2:0] "Reserved" | |
750 | * = 0 (0x00) .....000 | |
751 | */ | |
752 | { 0x0e, 0x70 }, | |
753 | ||
754 | /* | |
755 | * 0F COMG "Common Control G" | |
756 | * = 66 (0x42) 01000010 | |
757 | * COMG[7] "Optical black output selection" | |
758 | * = 0 (0x00) 0....... "Disable" | |
759 | * COMG[6] "Black level calibrate selection" | |
760 | * = 1 (0x01) .1...... "Use optical black pixels | |
761 | * to calibrate" | |
762 | * COMG[5:4] "Reserved" | |
763 | * = 0 (0x00) ..00.... | |
764 | * COMG[3] "Channel offset adjustment" | |
765 | * = 0 (0x00) ....0... "Disable offset adjustment" | |
766 | * COMG[2] "ADC black level calibration option" | |
767 | * = 0 (0x00) .....0.. "Use B/G line and G/R | |
768 | * line to calibrate each | |
769 | * channel's black level" | |
770 | * COMG[1] "Reserved" | |
771 | * = 1 (0x01) ......1. | |
772 | * COMG[0] "ADC black level calibration enable" | |
773 | * = 0 (0x00) .......0 "Disable" | |
774 | */ | |
775 | { 0x0f, 0x42 }, | |
776 | ||
777 | /* | |
778 | * 14 COMJ "Common Control J" | |
779 | * = 198 (0xC6) 11000110 | |
780 | * COMJ[7:6] "AGC gain ceiling" | |
781 | * = 3 (0x03) 11...... "8x" | |
782 | * COMJ[5:4] "Reserved" | |
783 | * = 0 (0x00) ..00.... | |
784 | * COMJ[3] "Auto banding filter" | |
785 | * = 0 (0x00) ....0... "Banding filter is always | |
786 | * on off depending on | |
787 | * COMI[5] setting" | |
788 | * COMJ[2] "VSYNC drop option" | |
789 | * = 1 (0x01) .....1.. "SYNC is dropped if frame | |
790 | * data is dropped" | |
791 | * COMJ[1] "Frame data drop" | |
792 | * = 1 (0x01) ......1. "Drop frame data if | |
793 | * exposure is not within | |
794 | * tolerance. In AEC mode, | |
795 | * data is normally dropped | |
796 | * when data is out of | |
797 | * range." | |
798 | * COMJ[0] "Reserved" | |
799 | * = 0 (0x00) .......0 | |
800 | */ | |
801 | { 0x14, 0xC6 }, | |
802 | ||
803 | /* | |
804 | * 15 COMK "Common Control K" | |
805 | * = 2 (0x02) 00000010 | |
806 | * COMK[7] "CHSYNC pin output swap" | |
807 | * = 0 (0x00) 0....... "CHSYNC" | |
808 | * COMK[6] "HREF pin output swap" | |
809 | * = 0 (0x00) .0...... "HREF" | |
810 | * COMK[5] "PCLK output selection" | |
811 | * = 0 (0x00) ..0..... "PCLK always output" | |
812 | * COMK[4] "PCLK edge selection" | |
813 | * = 0 (0x00) ...0.... "Data valid on falling edge" | |
814 | * COMK[3] "HREF output polarity" | |
815 | * = 0 (0x00) ....0... "positive" | |
816 | * COMK[2] "Reserved" | |
817 | * = 0 (0x00) .....0.. | |
818 | * COMK[1] "VSYNC polarity" | |
819 | * = 1 (0x01) ......1. "negative" | |
820 | * COMK[0] "HSYNC polarity" | |
821 | * = 0 (0x00) .......0 "positive" | |
822 | */ | |
823 | { 0x15, 0x02 }, | |
824 | ||
825 | /* | |
826 | * 33 CHLF "Current Control" | |
827 | * = 9 (0x09) 00001001 | |
828 | * CHLF[7:6] "Sensor current control" | |
829 | * = 0 (0x00) 00...... | |
830 | * CHLF[5] "Sensor current range control" | |
831 | * = 0 (0x00) ..0..... "normal range" | |
832 | * CHLF[4] "Sensor current" | |
833 | * = 0 (0x00) ...0.... "normal current" | |
834 | * CHLF[3] "Sensor buffer current control" | |
835 | * = 1 (0x01) ....1... "half current" | |
836 | * CHLF[2] "Column buffer current control" | |
837 | * = 0 (0x00) .....0.. "normal current" | |
838 | * CHLF[1] "Analog DSP current control" | |
839 | * = 0 (0x00) ......0. "normal current" | |
840 | * CHLF[1] "ADC current control" | |
841 | * = 0 (0x00) ......0. "normal current" | |
842 | */ | |
843 | { 0x33, 0x09 }, | |
844 | ||
845 | /* | |
846 | * 34 VBLM "Blooming Control" | |
847 | * = 80 (0x50) 01010000 | |
848 | * VBLM[7] "Hard soft reset switch" | |
849 | * = 0 (0x00) 0....... "Hard reset" | |
850 | * VBLM[6:4] "Blooming voltage selection" | |
851 | * = 5 (0x05) .101.... | |
852 | * VBLM[3:0] "Sensor current control" | |
853 | * = 0 (0x00) ....0000 | |
854 | */ | |
855 | { 0x34, 0x50 }, | |
856 | ||
857 | /* | |
858 | * 36 VCHG "Sensor Precharge Voltage Control" | |
859 | * = 0 (0x00) 00000000 | |
860 | * VCHG[7] "Reserved" | |
861 | * = 0 (0x00) 0....... | |
862 | * VCHG[6:4] "Sensor precharge voltage control" | |
863 | * = 0 (0x00) .000.... | |
864 | * VCHG[3:0] "Sensor array common reference" | |
865 | * = 0 (0x00) ....0000 | |
866 | */ | |
867 | { 0x36, 0x00 }, | |
868 | ||
869 | /* | |
870 | * 37 ADC "ADC Reference Control" | |
871 | * = 4 (0x04) 00000100 | |
872 | * ADC[7:4] "Reserved" | |
873 | * = 0 (0x00) 0000.... | |
874 | * ADC[3] "ADC input signal range" | |
875 | * = 0 (0x00) ....0... "Input signal 1.0x" | |
876 | * ADC[2:0] "ADC range control" | |
877 | * = 4 (0x04) .....100 | |
878 | */ | |
879 | { 0x37, 0x04 }, | |
880 | ||
881 | /* | |
882 | * 38 ACOM "Analog Common Ground" | |
883 | * = 82 (0x52) 01010010 | |
884 | * ACOM[7] "Analog gain control" | |
885 | * = 0 (0x00) 0....... "Gain 1x" | |
886 | * ACOM[6] "Analog black level calibration" | |
887 | * = 1 (0x01) .1...... "On" | |
888 | * ACOM[5:0] "Reserved" | |
889 | * = 18 (0x12) ..010010 | |
890 | */ | |
891 | { 0x38, 0x52 }, | |
892 | ||
893 | /* | |
894 | * 3A FREFA "Internal Reference Adjustment" | |
895 | * = 0 (0x00) 00000000 | |
896 | * FREFA[7:0] "Range" | |
897 | * = 0 (0x00) 00000000 | |
898 | */ | |
899 | { 0x3a, 0x00 }, | |
900 | ||
901 | /* | |
902 | * 3C FVOPT "Internal Reference Adjustment" | |
903 | * = 31 (0x1F) 00011111 | |
904 | * FVOPT[7:0] "Range" | |
905 | * = 31 (0x1F) 00011111 | |
906 | */ | |
907 | { 0x3c, 0x1F }, | |
908 | ||
909 | /* | |
910 | * 44 Undocumented = 0 (0x00) 00000000 | |
911 | * 44[7:0] "It's a secret" | |
912 | * = 0 (0x00) 00000000 | |
913 | */ | |
914 | { 0x44, 0x00 }, | |
915 | ||
916 | /* | |
917 | * 40 Undocumented = 0 (0x00) 00000000 | |
918 | * 40[7:0] "It's a secret" | |
919 | * = 0 (0x00) 00000000 | |
920 | */ | |
921 | { 0x40, 0x00 }, | |
922 | ||
923 | /* | |
924 | * 41 Undocumented = 0 (0x00) 00000000 | |
925 | * 41[7:0] "It's a secret" | |
926 | * = 0 (0x00) 00000000 | |
927 | */ | |
928 | { 0x41, 0x00 }, | |
929 | ||
930 | /* | |
931 | * 42 Undocumented = 0 (0x00) 00000000 | |
932 | * 42[7:0] "It's a secret" | |
933 | * = 0 (0x00) 00000000 | |
934 | */ | |
935 | { 0x42, 0x00 }, | |
936 | ||
937 | /* | |
938 | * 43 Undocumented = 0 (0x00) 00000000 | |
939 | * 43[7:0] "It's a secret" | |
940 | * = 0 (0x00) 00000000 | |
941 | */ | |
942 | { 0x43, 0x00 }, | |
943 | ||
944 | /* | |
945 | * 45 Undocumented = 128 (0x80) 10000000 | |
946 | * 45[7:0] "It's a secret" | |
947 | * = 128 (0x80) 10000000 | |
948 | */ | |
949 | { 0x45, 0x80 }, | |
950 | ||
951 | /* | |
952 | * 48 Undocumented = 192 (0xC0) 11000000 | |
953 | * 48[7:0] "It's a secret" | |
954 | * = 192 (0xC0) 11000000 | |
955 | */ | |
956 | { 0x48, 0xC0 }, | |
957 | ||
958 | /* | |
959 | * 49 Undocumented = 25 (0x19) 00011001 | |
960 | * 49[7:0] "It's a secret" | |
961 | * = 25 (0x19) 00011001 | |
962 | */ | |
963 | { 0x49, 0x19 }, | |
964 | ||
965 | /* | |
966 | * 4B Undocumented = 128 (0x80) 10000000 | |
967 | * 4B[7:0] "It's a secret" | |
968 | * = 128 (0x80) 10000000 | |
969 | */ | |
970 | { 0x4B, 0x80 }, | |
971 | ||
972 | /* | |
973 | * 4D Undocumented = 196 (0xC4) 11000100 | |
974 | * 4D[7:0] "It's a secret" | |
975 | * = 196 (0xC4) 11000100 | |
976 | */ | |
977 | { 0x4D, 0xC4 }, | |
978 | ||
979 | /* | |
980 | * 35 VREF "Reference Voltage Control" | |
981 | * = 76 (0x4C) 01001100 | |
982 | * VREF[7:5] "Column high reference control" | |
983 | * = 2 (0x02) 010..... "higher voltage" | |
984 | * VREF[4:2] "Column low reference control" | |
985 | * = 3 (0x03) ...011.. "Highest voltage" | |
986 | * VREF[1:0] "Reserved" | |
987 | * = 0 (0x00) ......00 | |
988 | */ | |
989 | { 0x35, 0x4C }, | |
990 | ||
991 | /* | |
992 | * 3D Undocumented = 0 (0x00) 00000000 | |
993 | * 3D[7:0] "It's a secret" | |
994 | * = 0 (0x00) 00000000 | |
995 | */ | |
996 | { 0x3D, 0x00 }, | |
997 | ||
998 | /* | |
999 | * 3E Undocumented = 0 (0x00) 00000000 | |
1000 | * 3E[7:0] "It's a secret" | |
1001 | * = 0 (0x00) 00000000 | |
1002 | */ | |
1003 | { 0x3E, 0x00 }, | |
1004 | ||
1005 | /* | |
1006 | * 3B FREFB "Internal Reference Adjustment" | |
1007 | * = 24 (0x18) 00011000 | |
1008 | * FREFB[7:0] "Range" | |
1009 | * = 24 (0x18) 00011000 | |
1010 | */ | |
1011 | { 0x3b, 0x18 }, | |
1012 | ||
1013 | /* | |
1014 | * 33 CHLF "Current Control" | |
1015 | * = 25 (0x19) 00011001 | |
1016 | * CHLF[7:6] "Sensor current control" | |
1017 | * = 0 (0x00) 00...... | |
1018 | * CHLF[5] "Sensor current range control" | |
1019 | * = 0 (0x00) ..0..... "normal range" | |
1020 | * CHLF[4] "Sensor current" | |
1021 | * = 1 (0x01) ...1.... "double current" | |
1022 | * CHLF[3] "Sensor buffer current control" | |
1023 | * = 1 (0x01) ....1... "half current" | |
1024 | * CHLF[2] "Column buffer current control" | |
1025 | * = 0 (0x00) .....0.. "normal current" | |
1026 | * CHLF[1] "Analog DSP current control" | |
1027 | * = 0 (0x00) ......0. "normal current" | |
1028 | * CHLF[1] "ADC current control" | |
1029 | * = 0 (0x00) ......0. "normal current" | |
1030 | */ | |
1031 | { 0x33, 0x19 }, | |
1032 | ||
1033 | /* | |
1034 | * 34 VBLM "Blooming Control" | |
1035 | * = 90 (0x5A) 01011010 | |
1036 | * VBLM[7] "Hard soft reset switch" | |
1037 | * = 0 (0x00) 0....... "Hard reset" | |
1038 | * VBLM[6:4] "Blooming voltage selection" | |
1039 | * = 5 (0x05) .101.... | |
1040 | * VBLM[3:0] "Sensor current control" | |
1041 | * = 10 (0x0A) ....1010 | |
1042 | */ | |
1043 | { 0x34, 0x5A }, | |
1044 | ||
1045 | /* | |
1046 | * 3B FREFB "Internal Reference Adjustment" | |
1047 | * = 0 (0x00) 00000000 | |
1048 | * FREFB[7:0] "Range" | |
1049 | * = 0 (0x00) 00000000 | |
1050 | */ | |
1051 | { 0x3b, 0x00 }, | |
1052 | ||
1053 | /* | |
1054 | * 33 CHLF "Current Control" | |
1055 | * = 9 (0x09) 00001001 | |
1056 | * CHLF[7:6] "Sensor current control" | |
1057 | * = 0 (0x00) 00...... | |
1058 | * CHLF[5] "Sensor current range control" | |
1059 | * = 0 (0x00) ..0..... "normal range" | |
1060 | * CHLF[4] "Sensor current" | |
1061 | * = 0 (0x00) ...0.... "normal current" | |
1062 | * CHLF[3] "Sensor buffer current control" | |
1063 | * = 1 (0x01) ....1... "half current" | |
1064 | * CHLF[2] "Column buffer current control" | |
1065 | * = 0 (0x00) .....0.. "normal current" | |
1066 | * CHLF[1] "Analog DSP current control" | |
1067 | * = 0 (0x00) ......0. "normal current" | |
1068 | * CHLF[1] "ADC current control" | |
1069 | * = 0 (0x00) ......0. "normal current" | |
1070 | */ | |
1071 | { 0x33, 0x09 }, | |
1072 | ||
1073 | /* | |
1074 | * 34 VBLM "Blooming Control" | |
1075 | * = 80 (0x50) 01010000 | |
1076 | * VBLM[7] "Hard soft reset switch" | |
1077 | * = 0 (0x00) 0....... "Hard reset" | |
1078 | * VBLM[6:4] "Blooming voltage selection" | |
1079 | * = 5 (0x05) .101.... | |
1080 | * VBLM[3:0] "Sensor current control" | |
1081 | * = 0 (0x00) ....0000 | |
1082 | */ | |
1083 | { 0x34, 0x50 }, | |
1084 | ||
1085 | /* | |
1086 | * 12 COMH "Common Control H" | |
1087 | * = 64 (0x40) 01000000 | |
1088 | * COMH[7] "SRST" | |
1089 | * = 0 (0x00) 0....... "No-op" | |
1090 | * COMH[6:4] "Resolution selection" | |
1091 | * = 4 (0x04) .100.... "XGA" | |
1092 | * COMH[3] "Master slave selection" | |
1093 | * = 0 (0x00) ....0... "Master mode" | |
1094 | * COMH[2] "Internal B/R channel option" | |
1095 | * = 0 (0x00) .....0.. "B/R use same channel" | |
1096 | * COMH[1] "Color bar test pattern" | |
1097 | * = 0 (0x00) ......0. "Off" | |
1098 | * COMH[0] "Reserved" | |
1099 | * = 0 (0x00) .......0 | |
1100 | */ | |
1101 | { 0x12, 0x40 }, | |
1102 | ||
1103 | /* | |
1104 | * 17 HREFST "Horizontal window start" | |
1105 | * = 31 (0x1F) 00011111 | |
1106 | * HREFST[7:0] "Horizontal window start, 8 MSBs" | |
1107 | * = 31 (0x1F) 00011111 | |
1108 | */ | |
1109 | { 0x17, 0x1F }, | |
1110 | ||
1111 | /* | |
1112 | * 18 HREFEND "Horizontal window end" | |
1113 | * = 95 (0x5F) 01011111 | |
1114 | * HREFEND[7:0] "Horizontal Window End, 8 MSBs" | |
1115 | * = 95 (0x5F) 01011111 | |
1116 | */ | |
1117 | { 0x18, 0x5F }, | |
1118 | ||
1119 | /* | |
1120 | * 19 VSTRT "Vertical window start" | |
1121 | * = 0 (0x00) 00000000 | |
1122 | * VSTRT[7:0] "Vertical Window Start, 8 MSBs" | |
1123 | * = 0 (0x00) 00000000 | |
1124 | */ | |
1125 | { 0x19, 0x00 }, | |
1126 | ||
1127 | /* | |
1128 | * 1A VEND "Vertical window end" | |
1129 | * = 96 (0x60) 01100000 | |
1130 | * VEND[7:0] "Vertical Window End, 8 MSBs" | |
1131 | * = 96 (0x60) 01100000 | |
1132 | */ | |
1133 | { 0x1a, 0x60 }, | |
1134 | ||
1135 | /* | |
1136 | * 32 COMM "Common Control M" | |
1137 | * = 18 (0x12) 00010010 | |
1138 | * COMM[7:6] "Pixel clock divide option" | |
1139 | * = 0 (0x00) 00...... "/1" | |
1140 | * COMM[5:3] "Horizontal window end position, 3 LSBs" | |
1141 | * = 2 (0x02) ..010... | |
1142 | * COMM[2:0] "Horizontal window start position, 3 LSBs" | |
1143 | * = 2 (0x02) .....010 | |
1144 | */ | |
1145 | { 0x32, 0x12 }, | |
1146 | ||
1147 | /* | |
1148 | * 03 COMA "Common Control A" | |
1149 | * = 74 (0x4A) 01001010 | |
1150 | * COMA[7:4] "AWB Update Threshold" | |
1151 | * = 4 (0x04) 0100.... | |
1152 | * COMA[3:2] "Vertical window end line control 2 LSBs" | |
1153 | * = 2 (0x02) ....10.. | |
1154 | * COMA[1:0] "Vertical window start line control 2 LSBs" | |
1155 | * = 2 (0x02) ......10 | |
1156 | */ | |
1157 | { 0x03, 0x4A }, | |
1158 | ||
1159 | /* | |
1160 | * 11 CLKRC "Clock Rate Control" | |
1161 | * = 128 (0x80) 10000000 | |
1162 | * CLKRC[7] "Internal frequency doublers on off seclection" | |
1163 | * = 1 (0x01) 1....... "On" | |
1164 | * CLKRC[6] "Digital video master slave selection" | |
1165 | * = 0 (0x00) .0...... "Master mode, sensor | |
1166 | * provides PCLK" | |
1167 | * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }" | |
1168 | * = 0 (0x00) ..000000 | |
1169 | */ | |
1170 | { 0x11, 0x80 }, | |
1171 | ||
1172 | /* | |
1173 | * 12 COMH "Common Control H" | |
1174 | * = 0 (0x00) 00000000 | |
1175 | * COMH[7] "SRST" | |
1176 | * = 0 (0x00) 0....... "No-op" | |
1177 | * COMH[6:4] "Resolution selection" | |
1178 | * = 0 (0x00) .000.... "QXGA" | |
1179 | * COMH[3] "Master slave selection" | |
1180 | * = 0 (0x00) ....0... "Master mode" | |
1181 | * COMH[2] "Internal B/R channel option" | |
1182 | * = 0 (0x00) .....0.. "B/R use same channel" | |
1183 | * COMH[1] "Color bar test pattern" | |
1184 | * = 0 (0x00) ......0. "Off" | |
1185 | * COMH[0] "Reserved" | |
1186 | * = 0 (0x00) .......0 | |
1187 | */ | |
1188 | { 0x12, 0x00 }, | |
1189 | ||
1190 | /* | |
1191 | * 12 COMH "Common Control H" | |
1192 | * = 64 (0x40) 01000000 | |
1193 | * COMH[7] "SRST" | |
1194 | * = 0 (0x00) 0....... "No-op" | |
1195 | * COMH[6:4] "Resolution selection" | |
1196 | * = 4 (0x04) .100.... "XGA" | |
1197 | * COMH[3] "Master slave selection" | |
1198 | * = 0 (0x00) ....0... "Master mode" | |
1199 | * COMH[2] "Internal B/R channel option" | |
1200 | * = 0 (0x00) .....0.. "B/R use same channel" | |
1201 | * COMH[1] "Color bar test pattern" | |
1202 | * = 0 (0x00) ......0. "Off" | |
1203 | * COMH[0] "Reserved" | |
1204 | * = 0 (0x00) .......0 | |
1205 | */ | |
1206 | { 0x12, 0x40 }, | |
1207 | ||
1208 | /* | |
1209 | * 17 HREFST "Horizontal window start" | |
1210 | * = 31 (0x1F) 00011111 | |
1211 | * HREFST[7:0] "Horizontal window start, 8 MSBs" | |
1212 | * = 31 (0x1F) 00011111 | |
1213 | */ | |
1214 | { 0x17, 0x1F }, | |
1215 | ||
1216 | /* | |
1217 | * 18 HREFEND "Horizontal window end" | |
1218 | * = 95 (0x5F) 01011111 | |
1219 | * HREFEND[7:0] "Horizontal Window End, 8 MSBs" | |
1220 | * = 95 (0x5F) 01011111 | |
1221 | */ | |
1222 | { 0x18, 0x5F }, | |
1223 | ||
1224 | /* | |
1225 | * 19 VSTRT "Vertical window start" | |
1226 | * = 0 (0x00) 00000000 | |
1227 | * VSTRT[7:0] "Vertical Window Start, 8 MSBs" | |
1228 | * = 0 (0x00) 00000000 | |
1229 | */ | |
1230 | { 0x19, 0x00 }, | |
1231 | ||
1232 | /* | |
1233 | * 1A VEND "Vertical window end" | |
1234 | * = 96 (0x60) 01100000 | |
1235 | * VEND[7:0] "Vertical Window End, 8 MSBs" | |
1236 | * = 96 (0x60) 01100000 | |
1237 | */ | |
1238 | { 0x1a, 0x60 }, | |
1239 | ||
1240 | /* | |
1241 | * 32 COMM "Common Control M" | |
1242 | * = 18 (0x12) 00010010 | |
1243 | * COMM[7:6] "Pixel clock divide option" | |
1244 | * = 0 (0x00) 00...... "/1" | |
1245 | * COMM[5:3] "Horizontal window end position, 3 LSBs" | |
1246 | * = 2 (0x02) ..010... | |
1247 | * COMM[2:0] "Horizontal window start position, 3 LSBs" | |
1248 | * = 2 (0x02) .....010 | |
1249 | */ | |
1250 | { 0x32, 0x12 }, | |
1251 | ||
1252 | /* | |
1253 | * 03 COMA "Common Control A" | |
1254 | * = 74 (0x4A) 01001010 | |
1255 | * COMA[7:4] "AWB Update Threshold" | |
1256 | * = 4 (0x04) 0100.... | |
1257 | * COMA[3:2] "Vertical window end line control 2 LSBs" | |
1258 | * = 2 (0x02) ....10.. | |
1259 | * COMA[1:0] "Vertical window start line control 2 LSBs" | |
1260 | * = 2 (0x02) ......10 | |
1261 | */ | |
1262 | { 0x03, 0x4A }, | |
1263 | ||
1264 | /* | |
1265 | * 02 RED "Red Gain Control" | |
1266 | * = 175 (0xAF) 10101111 | |
1267 | * RED[7] "Action" | |
1268 | * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))" | |
1269 | * RED[6:0] "Value" | |
1270 | * = 47 (0x2F) .0101111 | |
1271 | */ | |
1272 | { 0x02, 0xAF }, | |
1273 | ||
1274 | /* | |
1275 | * 2D ADDVSL "VSYNC Pulse Width" | |
1276 | * = 210 (0xD2) 11010010 | |
1277 | * ADDVSL[7:0] "VSYNC pulse width, LSB" | |
1278 | * = 210 (0xD2) 11010010 | |
1279 | */ | |
1280 | { 0x2d, 0xD2 }, | |
1281 | ||
1282 | /* | |
1283 | * 00 GAIN = 24 (0x18) 00011000 | |
1284 | * GAIN[7:6] "Reserved" | |
1285 | * = 0 (0x00) 00...... | |
1286 | * GAIN[5] "Double" | |
1287 | * = 0 (0x00) ..0..... "False" | |
1288 | * GAIN[4] "Double" | |
1289 | * = 1 (0x01) ...1.... "True" | |
1290 | * GAIN[3:0] "Range" | |
1291 | * = 8 (0x08) ....1000 | |
1292 | */ | |
1293 | { 0x00, 0x18 }, | |
1294 | ||
1295 | /* | |
1296 | * 01 BLUE "Blue Gain Control" | |
1297 | * = 240 (0xF0) 11110000 | |
1298 | * BLUE[7] "Action" | |
1299 | * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))" | |
1300 | * BLUE[6:0] "Value" | |
1301 | * = 112 (0x70) .1110000 | |
1302 | */ | |
1303 | { 0x01, 0xF0 }, | |
1304 | ||
1305 | /* | |
1306 | * 10 AEC "Automatic Exposure Control" | |
1307 | * = 10 (0x0A) 00001010 | |
1308 | * AEC[7:0] "Automatic Exposure Control, 8 MSBs" | |
1309 | * = 10 (0x0A) 00001010 | |
1310 | */ | |
1311 | { 0x10, 0x0A }, | |
1312 | ||
1313 | { 0xE1, 0x67 }, | |
1314 | { 0xE3, 0x03 }, | |
1315 | { 0xE4, 0x26 }, | |
1316 | { 0xE5, 0x3E }, | |
1317 | { 0xF8, 0x01 }, | |
1318 | { 0xFF, 0x01 }, | |
1319 | }; | |
1320 | ||
4202f71c JFM |
1321 | static const struct ov_i2c_regvals norm_6x20[] = { |
1322 | { 0x12, 0x80 }, /* reset */ | |
1323 | { 0x11, 0x01 }, | |
1324 | { 0x03, 0x60 }, | |
1325 | { 0x05, 0x7f }, /* For when autoadjust is off */ | |
1326 | { 0x07, 0xa8 }, | |
1327 | /* The ratio of 0x0c and 0x0d controls the white point */ | |
1328 | { 0x0c, 0x24 }, | |
1329 | { 0x0d, 0x24 }, | |
1330 | { 0x0f, 0x15 }, /* COMS */ | |
1331 | { 0x10, 0x75 }, /* AEC Exposure time */ | |
1332 | { 0x12, 0x24 }, /* Enable AGC */ | |
1333 | { 0x14, 0x04 }, | |
1334 | /* 0x16: 0x06 helps frame stability with moving objects */ | |
1335 | { 0x16, 0x06 }, | |
1336 | /* { 0x20, 0x30 }, * Aperture correction enable */ | |
1337 | { 0x26, 0xb2 }, /* BLC enable */ | |
1338 | /* 0x28: 0x05 Selects RGB format if RGB on */ | |
1339 | { 0x28, 0x05 }, | |
1340 | { 0x2a, 0x04 }, /* Disable framerate adjust */ | |
1341 | /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */ | |
ae49c404 | 1342 | { 0x2d, 0x85 }, |
4202f71c JFM |
1343 | { 0x33, 0xa0 }, /* Color Processing Parameter */ |
1344 | { 0x34, 0xd2 }, /* Max A/D range */ | |
1345 | { 0x38, 0x8b }, | |
1346 | { 0x39, 0x40 }, | |
1347 | ||
1348 | { 0x3c, 0x39 }, /* Enable AEC mode changing */ | |
1349 | { 0x3c, 0x3c }, /* Change AEC mode */ | |
1350 | { 0x3c, 0x24 }, /* Disable AEC mode changing */ | |
1351 | ||
1352 | { 0x3d, 0x80 }, | |
1353 | /* These next two registers (0x4a, 0x4b) are undocumented. | |
1354 | * They control the color balance */ | |
1355 | { 0x4a, 0x80 }, | |
1356 | { 0x4b, 0x80 }, | |
1357 | { 0x4d, 0xd2 }, /* This reduces noise a bit */ | |
1358 | { 0x4e, 0xc1 }, | |
1359 | { 0x4f, 0x04 }, | |
1360 | /* Do 50-53 have any effect? */ | |
1361 | /* Toggle 0x12[2] off and on here? */ | |
1362 | }; | |
1363 | ||
1364 | static const struct ov_i2c_regvals norm_6x30[] = { | |
1365 | { 0x12, 0x80 }, /* Reset */ | |
1366 | { 0x00, 0x1f }, /* Gain */ | |
1367 | { 0x01, 0x99 }, /* Blue gain */ | |
1368 | { 0x02, 0x7c }, /* Red gain */ | |
1369 | { 0x03, 0xc0 }, /* Saturation */ | |
1370 | { 0x05, 0x0a }, /* Contrast */ | |
1371 | { 0x06, 0x95 }, /* Brightness */ | |
1372 | { 0x07, 0x2d }, /* Sharpness */ | |
1373 | { 0x0c, 0x20 }, | |
1374 | { 0x0d, 0x20 }, | |
02ab18b0 | 1375 | { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */ |
4202f71c JFM |
1376 | { 0x0f, 0x05 }, |
1377 | { 0x10, 0x9a }, | |
1378 | { 0x11, 0x00 }, /* Pixel clock = fastest */ | |
1379 | { 0x12, 0x24 }, /* Enable AGC and AWB */ | |
1380 | { 0x13, 0x21 }, | |
1381 | { 0x14, 0x80 }, | |
1382 | { 0x15, 0x01 }, | |
1383 | { 0x16, 0x03 }, | |
1384 | { 0x17, 0x38 }, | |
1385 | { 0x18, 0xea }, | |
1386 | { 0x19, 0x04 }, | |
1387 | { 0x1a, 0x93 }, | |
1388 | { 0x1b, 0x00 }, | |
1389 | { 0x1e, 0xc4 }, | |
1390 | { 0x1f, 0x04 }, | |
1391 | { 0x20, 0x20 }, | |
1392 | { 0x21, 0x10 }, | |
1393 | { 0x22, 0x88 }, | |
1394 | { 0x23, 0xc0 }, /* Crystal circuit power level */ | |
1395 | { 0x25, 0x9a }, /* Increase AEC black ratio */ | |
1396 | { 0x26, 0xb2 }, /* BLC enable */ | |
1397 | { 0x27, 0xa2 }, | |
1398 | { 0x28, 0x00 }, | |
1399 | { 0x29, 0x00 }, | |
1400 | { 0x2a, 0x84 }, /* 60 Hz power */ | |
1401 | { 0x2b, 0xa8 }, /* 60 Hz power */ | |
1402 | { 0x2c, 0xa0 }, | |
1403 | { 0x2d, 0x95 }, /* Enable auto-brightness */ | |
1404 | { 0x2e, 0x88 }, | |
1405 | { 0x33, 0x26 }, | |
1406 | { 0x34, 0x03 }, | |
1407 | { 0x36, 0x8f }, | |
1408 | { 0x37, 0x80 }, | |
1409 | { 0x38, 0x83 }, | |
1410 | { 0x39, 0x80 }, | |
1411 | { 0x3a, 0x0f }, | |
1412 | { 0x3b, 0x3c }, | |
1413 | { 0x3c, 0x1a }, | |
1414 | { 0x3d, 0x80 }, | |
1415 | { 0x3e, 0x80 }, | |
1416 | { 0x3f, 0x0e }, | |
1417 | { 0x40, 0x00 }, /* White bal */ | |
1418 | { 0x41, 0x00 }, /* White bal */ | |
1419 | { 0x42, 0x80 }, | |
1420 | { 0x43, 0x3f }, /* White bal */ | |
1421 | { 0x44, 0x80 }, | |
1422 | { 0x45, 0x20 }, | |
1423 | { 0x46, 0x20 }, | |
1424 | { 0x47, 0x80 }, | |
1425 | { 0x48, 0x7f }, | |
1426 | { 0x49, 0x00 }, | |
1427 | { 0x4a, 0x00 }, | |
1428 | { 0x4b, 0x80 }, | |
1429 | { 0x4c, 0xd0 }, | |
1430 | { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */ | |
1431 | { 0x4e, 0x40 }, | |
1432 | { 0x4f, 0x07 }, /* UV avg., col. killer: max */ | |
1433 | { 0x50, 0xff }, | |
1434 | { 0x54, 0x23 }, /* Max AGC gain: 18dB */ | |
1435 | { 0x55, 0xff }, | |
1436 | { 0x56, 0x12 }, | |
1437 | { 0x57, 0x81 }, | |
1438 | { 0x58, 0x75 }, | |
1439 | { 0x59, 0x01 }, /* AGC dark current comp.: +1 */ | |
1440 | { 0x5a, 0x2c }, | |
1441 | { 0x5b, 0x0f }, /* AWB chrominance levels */ | |
1442 | { 0x5c, 0x10 }, | |
1443 | { 0x3d, 0x80 }, | |
1444 | { 0x27, 0xa6 }, | |
1445 | { 0x12, 0x20 }, /* Toggle AWB */ | |
1446 | { 0x12, 0x24 }, | |
1447 | }; | |
1448 | ||
1449 | /* Lawrence Glaister <lg@jfm.bc.ca> reports: | |
1450 | * | |
1451 | * Register 0x0f in the 7610 has the following effects: | |
1452 | * | |
1453 | * 0x85 (AEC method 1): Best overall, good contrast range | |
1454 | * 0x45 (AEC method 2): Very overexposed | |
1455 | * 0xa5 (spec sheet default): Ok, but the black level is | |
1456 | * shifted resulting in loss of contrast | |
1457 | * 0x05 (old driver setting): very overexposed, too much | |
1458 | * contrast | |
1459 | */ | |
1460 | static const struct ov_i2c_regvals norm_7610[] = { | |
1461 | { 0x10, 0xff }, | |
1462 | { 0x16, 0x06 }, | |
1463 | { 0x28, 0x24 }, | |
1464 | { 0x2b, 0xac }, | |
1465 | { 0x12, 0x00 }, | |
1466 | { 0x38, 0x81 }, | |
1467 | { 0x28, 0x24 }, /* 0c */ | |
1468 | { 0x0f, 0x85 }, /* lg's setting */ | |
1469 | { 0x15, 0x01 }, | |
1470 | { 0x20, 0x1c }, | |
1471 | { 0x23, 0x2a }, | |
1472 | { 0x24, 0x10 }, | |
1473 | { 0x25, 0x8a }, | |
1474 | { 0x26, 0xa2 }, | |
1475 | { 0x27, 0xc2 }, | |
1476 | { 0x2a, 0x04 }, | |
1477 | { 0x2c, 0xfe }, | |
1478 | { 0x2d, 0x93 }, | |
1479 | { 0x30, 0x71 }, | |
1480 | { 0x31, 0x60 }, | |
1481 | { 0x32, 0x26 }, | |
1482 | { 0x33, 0x20 }, | |
1483 | { 0x34, 0x48 }, | |
1484 | { 0x12, 0x24 }, | |
1485 | { 0x11, 0x01 }, | |
1486 | { 0x0c, 0x24 }, | |
1487 | { 0x0d, 0x24 }, | |
1488 | }; | |
1489 | ||
1490 | static const struct ov_i2c_regvals norm_7620[] = { | |
a511ba94 | 1491 | { 0x12, 0x80 }, /* reset */ |
4202f71c JFM |
1492 | { 0x00, 0x00 }, /* gain */ |
1493 | { 0x01, 0x80 }, /* blue gain */ | |
1494 | { 0x02, 0x80 }, /* red gain */ | |
1495 | { 0x03, 0xc0 }, /* OV7670_REG_VREF */ | |
1496 | { 0x06, 0x60 }, | |
1497 | { 0x07, 0x00 }, | |
1498 | { 0x0c, 0x24 }, | |
1499 | { 0x0c, 0x24 }, | |
1500 | { 0x0d, 0x24 }, | |
1501 | { 0x11, 0x01 }, | |
1502 | { 0x12, 0x24 }, | |
1503 | { 0x13, 0x01 }, | |
1504 | { 0x14, 0x84 }, | |
1505 | { 0x15, 0x01 }, | |
1506 | { 0x16, 0x03 }, | |
1507 | { 0x17, 0x2f }, | |
1508 | { 0x18, 0xcf }, | |
1509 | { 0x19, 0x06 }, | |
1510 | { 0x1a, 0xf5 }, | |
1511 | { 0x1b, 0x00 }, | |
1512 | { 0x20, 0x18 }, | |
1513 | { 0x21, 0x80 }, | |
1514 | { 0x22, 0x80 }, | |
1515 | { 0x23, 0x00 }, | |
1516 | { 0x26, 0xa2 }, | |
1517 | { 0x27, 0xea }, | |
b282d873 | 1518 | { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */ |
4202f71c JFM |
1519 | { 0x29, 0x00 }, |
1520 | { 0x2a, 0x10 }, | |
1521 | { 0x2b, 0x00 }, | |
1522 | { 0x2c, 0x88 }, | |
1523 | { 0x2d, 0x91 }, | |
1524 | { 0x2e, 0x80 }, | |
1525 | { 0x2f, 0x44 }, | |
1526 | { 0x60, 0x27 }, | |
1527 | { 0x61, 0x02 }, | |
1528 | { 0x62, 0x5f }, | |
1529 | { 0x63, 0xd5 }, | |
1530 | { 0x64, 0x57 }, | |
1531 | { 0x65, 0x83 }, | |
1532 | { 0x66, 0x55 }, | |
1533 | { 0x67, 0x92 }, | |
1534 | { 0x68, 0xcf }, | |
1535 | { 0x69, 0x76 }, | |
1536 | { 0x6a, 0x22 }, | |
1537 | { 0x6b, 0x00 }, | |
1538 | { 0x6c, 0x02 }, | |
1539 | { 0x6d, 0x44 }, | |
1540 | { 0x6e, 0x80 }, | |
1541 | { 0x6f, 0x1d }, | |
1542 | { 0x70, 0x8b }, | |
1543 | { 0x71, 0x00 }, | |
1544 | { 0x72, 0x14 }, | |
1545 | { 0x73, 0x54 }, | |
1546 | { 0x74, 0x00 }, | |
1547 | { 0x75, 0x8e }, | |
1548 | { 0x76, 0x00 }, | |
1549 | { 0x77, 0xff }, | |
1550 | { 0x78, 0x80 }, | |
1551 | { 0x79, 0x80 }, | |
1552 | { 0x7a, 0x80 }, | |
1553 | { 0x7b, 0xe2 }, | |
1554 | { 0x7c, 0x00 }, | |
1555 | }; | |
1556 | ||
1557 | /* 7640 and 7648. The defaults should be OK for most registers. */ | |
1558 | static const struct ov_i2c_regvals norm_7640[] = { | |
1559 | { 0x12, 0x80 }, | |
1560 | { 0x12, 0x14 }, | |
1561 | }; | |
1562 | ||
1563 | /* 7670. Defaults taken from OmniVision provided data, | |
1564 | * as provided by Jonathan Corbet of OLPC */ | |
1565 | static const struct ov_i2c_regvals norm_7670[] = { | |
1566 | { OV7670_REG_COM7, OV7670_COM7_RESET }, | |
1567 | { OV7670_REG_TSLB, 0x04 }, /* OV */ | |
1568 | { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */ | |
1569 | { OV7670_REG_CLKRC, 0x01 }, | |
1570 | /* | |
1571 | * Set the hardware window. These values from OV don't entirely | |
1572 | * make sense - hstop is less than hstart. But they work... | |
1573 | */ | |
1574 | { OV7670_REG_HSTART, 0x13 }, | |
1575 | { OV7670_REG_HSTOP, 0x01 }, | |
1576 | { OV7670_REG_HREF, 0xb6 }, | |
1577 | { OV7670_REG_VSTART, 0x02 }, | |
1578 | { OV7670_REG_VSTOP, 0x7a }, | |
1579 | { OV7670_REG_VREF, 0x0a }, | |
1580 | ||
ac40b1fa JFM |
1581 | { OV7670_REG_COM3, 0x00 }, |
1582 | { OV7670_REG_COM14, 0x00 }, | |
4202f71c JFM |
1583 | /* Mystery scaling numbers */ |
1584 | { 0x70, 0x3a }, | |
1585 | { 0x71, 0x35 }, | |
1586 | { 0x72, 0x11 }, | |
1587 | { 0x73, 0xf0 }, | |
1588 | { 0xa2, 0x02 }, | |
1589 | /* { OV7670_REG_COM10, 0x0 }, */ | |
1590 | ||
1591 | /* Gamma curve values */ | |
1592 | { 0x7a, 0x20 }, | |
1593 | { 0x7b, 0x10 }, | |
1594 | { 0x7c, 0x1e }, | |
1595 | { 0x7d, 0x35 }, | |
1596 | { 0x7e, 0x5a }, | |
1597 | { 0x7f, 0x69 }, | |
1598 | { 0x80, 0x76 }, | |
1599 | { 0x81, 0x80 }, | |
1600 | { 0x82, 0x88 }, | |
1601 | { 0x83, 0x8f }, | |
1602 | { 0x84, 0x96 }, | |
1603 | { 0x85, 0xa3 }, | |
1604 | { 0x86, 0xaf }, | |
1605 | { 0x87, 0xc4 }, | |
1606 | { 0x88, 0xd7 }, | |
1607 | { 0x89, 0xe8 }, | |
1608 | ||
1609 | /* AGC and AEC parameters. Note we start by disabling those features, | |
1610 | then turn them only after tweaking the values. */ | |
1611 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
1612 | | OV7670_COM8_AECSTEP | |
1613 | | OV7670_COM8_BFILT }, | |
ac40b1fa JFM |
1614 | { OV7670_REG_GAIN, 0x00 }, |
1615 | { OV7670_REG_AECH, 0x00 }, | |
4202f71c JFM |
1616 | { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */ |
1617 | { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */ | |
1618 | { OV7670_REG_BD50MAX, 0x05 }, | |
1619 | { OV7670_REG_BD60MAX, 0x07 }, | |
1620 | { OV7670_REG_AEW, 0x95 }, | |
1621 | { OV7670_REG_AEB, 0x33 }, | |
1622 | { OV7670_REG_VPT, 0xe3 }, | |
1623 | { OV7670_REG_HAECC1, 0x78 }, | |
1624 | { OV7670_REG_HAECC2, 0x68 }, | |
1625 | { 0xa1, 0x03 }, /* magic */ | |
1626 | { OV7670_REG_HAECC3, 0xd8 }, | |
1627 | { OV7670_REG_HAECC4, 0xd8 }, | |
1628 | { OV7670_REG_HAECC5, 0xf0 }, | |
1629 | { OV7670_REG_HAECC6, 0x90 }, | |
1630 | { OV7670_REG_HAECC7, 0x94 }, | |
1631 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
1632 | | OV7670_COM8_AECSTEP | |
1633 | | OV7670_COM8_BFILT | |
1634 | | OV7670_COM8_AGC | |
1635 | | OV7670_COM8_AEC }, | |
1636 | ||
1637 | /* Almost all of these are magic "reserved" values. */ | |
1638 | { OV7670_REG_COM5, 0x61 }, | |
1639 | { OV7670_REG_COM6, 0x4b }, | |
1640 | { 0x16, 0x02 }, | |
1641 | { OV7670_REG_MVFP, 0x07 }, | |
1642 | { 0x21, 0x02 }, | |
1643 | { 0x22, 0x91 }, | |
1644 | { 0x29, 0x07 }, | |
1645 | { 0x33, 0x0b }, | |
1646 | { 0x35, 0x0b }, | |
1647 | { 0x37, 0x1d }, | |
1648 | { 0x38, 0x71 }, | |
1649 | { 0x39, 0x2a }, | |
1650 | { OV7670_REG_COM12, 0x78 }, | |
1651 | { 0x4d, 0x40 }, | |
1652 | { 0x4e, 0x20 }, | |
ac40b1fa | 1653 | { OV7670_REG_GFIX, 0x00 }, |
4202f71c JFM |
1654 | { 0x6b, 0x4a }, |
1655 | { 0x74, 0x10 }, | |
1656 | { 0x8d, 0x4f }, | |
ac40b1fa JFM |
1657 | { 0x8e, 0x00 }, |
1658 | { 0x8f, 0x00 }, | |
1659 | { 0x90, 0x00 }, | |
1660 | { 0x91, 0x00 }, | |
1661 | { 0x96, 0x00 }, | |
1662 | { 0x9a, 0x00 }, | |
4202f71c JFM |
1663 | { 0xb0, 0x84 }, |
1664 | { 0xb1, 0x0c }, | |
1665 | { 0xb2, 0x0e }, | |
1666 | { 0xb3, 0x82 }, | |
1667 | { 0xb8, 0x0a }, | |
1668 | ||
1669 | /* More reserved magic, some of which tweaks white balance */ | |
1670 | { 0x43, 0x0a }, | |
1671 | { 0x44, 0xf0 }, | |
1672 | { 0x45, 0x34 }, | |
1673 | { 0x46, 0x58 }, | |
1674 | { 0x47, 0x28 }, | |
1675 | { 0x48, 0x3a }, | |
1676 | { 0x59, 0x88 }, | |
1677 | { 0x5a, 0x88 }, | |
1678 | { 0x5b, 0x44 }, | |
1679 | { 0x5c, 0x67 }, | |
1680 | { 0x5d, 0x49 }, | |
1681 | { 0x5e, 0x0e }, | |
1682 | { 0x6c, 0x0a }, | |
1683 | { 0x6d, 0x55 }, | |
1684 | { 0x6e, 0x11 }, | |
1685 | { 0x6f, 0x9f }, | |
1686 | /* "9e for advance AWB" */ | |
1687 | { 0x6a, 0x40 }, | |
1688 | { OV7670_REG_BLUE, 0x40 }, | |
1689 | { OV7670_REG_RED, 0x60 }, | |
1690 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
1691 | | OV7670_COM8_AECSTEP | |
1692 | | OV7670_COM8_BFILT | |
1693 | | OV7670_COM8_AGC | |
1694 | | OV7670_COM8_AEC | |
1695 | | OV7670_COM8_AWB }, | |
1696 | ||
1697 | /* Matrix coefficients */ | |
1698 | { 0x4f, 0x80 }, | |
1699 | { 0x50, 0x80 }, | |
ac40b1fa | 1700 | { 0x51, 0x00 }, |
4202f71c JFM |
1701 | { 0x52, 0x22 }, |
1702 | { 0x53, 0x5e }, | |
1703 | { 0x54, 0x80 }, | |
1704 | { 0x58, 0x9e }, | |
1705 | ||
1706 | { OV7670_REG_COM16, OV7670_COM16_AWBGAIN }, | |
ac40b1fa | 1707 | { OV7670_REG_EDGE, 0x00 }, |
4202f71c JFM |
1708 | { 0x75, 0x05 }, |
1709 | { 0x76, 0xe1 }, | |
ac40b1fa | 1710 | { 0x4c, 0x00 }, |
4202f71c JFM |
1711 | { 0x77, 0x01 }, |
1712 | { OV7670_REG_COM13, OV7670_COM13_GAMMA | |
1713 | | OV7670_COM13_UVSAT | |
1714 | | 2}, /* was 3 */ | |
1715 | { 0x4b, 0x09 }, | |
1716 | { 0xc9, 0x60 }, | |
1717 | { OV7670_REG_COM16, 0x38 }, | |
1718 | { 0x56, 0x40 }, | |
1719 | ||
1720 | { 0x34, 0x11 }, | |
1721 | { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO }, | |
1722 | { 0xa4, 0x88 }, | |
ac40b1fa | 1723 | { 0x96, 0x00 }, |
4202f71c JFM |
1724 | { 0x97, 0x30 }, |
1725 | { 0x98, 0x20 }, | |
1726 | { 0x99, 0x30 }, | |
1727 | { 0x9a, 0x84 }, | |
1728 | { 0x9b, 0x29 }, | |
1729 | { 0x9c, 0x03 }, | |
1730 | { 0x9d, 0x4c }, | |
1731 | { 0x9e, 0x3f }, | |
1732 | { 0x78, 0x04 }, | |
1733 | ||
1734 | /* Extra-weird stuff. Some sort of multiplexor register */ | |
1735 | { 0x79, 0x01 }, | |
1736 | { 0xc8, 0xf0 }, | |
1737 | { 0x79, 0x0f }, | |
1738 | { 0xc8, 0x00 }, | |
1739 | { 0x79, 0x10 }, | |
1740 | { 0xc8, 0x7e }, | |
1741 | { 0x79, 0x0a }, | |
1742 | { 0xc8, 0x80 }, | |
1743 | { 0x79, 0x0b }, | |
1744 | { 0xc8, 0x01 }, | |
1745 | { 0x79, 0x0c }, | |
1746 | { 0xc8, 0x0f }, | |
1747 | { 0x79, 0x0d }, | |
1748 | { 0xc8, 0x20 }, | |
1749 | { 0x79, 0x09 }, | |
1750 | { 0xc8, 0x80 }, | |
1751 | { 0x79, 0x02 }, | |
1752 | { 0xc8, 0xc0 }, | |
1753 | { 0x79, 0x03 }, | |
1754 | { 0xc8, 0x40 }, | |
1755 | { 0x79, 0x05 }, | |
1756 | { 0xc8, 0x30 }, | |
1757 | { 0x79, 0x26 }, | |
1758 | }; | |
1759 | ||
1760 | static const struct ov_i2c_regvals norm_8610[] = { | |
1761 | { 0x12, 0x80 }, | |
1762 | { 0x00, 0x00 }, | |
1763 | { 0x01, 0x80 }, | |
1764 | { 0x02, 0x80 }, | |
1765 | { 0x03, 0xc0 }, | |
1766 | { 0x04, 0x30 }, | |
1767 | { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
1768 | { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */ | |
1769 | { 0x0a, 0x86 }, | |
1770 | { 0x0b, 0xb0 }, | |
1771 | { 0x0c, 0x20 }, | |
1772 | { 0x0d, 0x20 }, | |
1773 | { 0x11, 0x01 }, | |
1774 | { 0x12, 0x25 }, | |
1775 | { 0x13, 0x01 }, | |
1776 | { 0x14, 0x04 }, | |
1777 | { 0x15, 0x01 }, /* Lin and Win think different about UV order */ | |
1778 | { 0x16, 0x03 }, | |
1779 | { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */ | |
1780 | { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */ | |
1781 | { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */ | |
1782 | { 0x1a, 0xf5 }, | |
1783 | { 0x1b, 0x00 }, | |
1784 | { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */ | |
1785 | { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */ | |
1786 | { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */ | |
1787 | { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */ | |
1788 | { 0x26, 0xa2 }, | |
1789 | { 0x27, 0xea }, | |
1790 | { 0x28, 0x00 }, | |
1791 | { 0x29, 0x00 }, | |
1792 | { 0x2a, 0x80 }, | |
1793 | { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */ | |
1794 | { 0x2c, 0xac }, | |
1795 | { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */ | |
1796 | { 0x2e, 0x80 }, | |
1797 | { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */ | |
1798 | { 0x4c, 0x00 }, | |
1799 | { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
1800 | { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */ | |
1801 | { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */ | |
1802 | { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */ | |
1803 | { 0x63, 0xff }, | |
1804 | { 0x64, 0x53 }, /* new windrv 090403 says 0x57, | |
1805 | * maybe thats wrong */ | |
1806 | { 0x65, 0x00 }, | |
1807 | { 0x66, 0x55 }, | |
1808 | { 0x67, 0xb0 }, | |
1809 | { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */ | |
1810 | { 0x69, 0x02 }, | |
1811 | { 0x6a, 0x22 }, | |
1812 | { 0x6b, 0x00 }, | |
1813 | { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but | |
1814 | * deleting bit7 colors the first images red */ | |
1815 | { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
1816 | { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
1817 | { 0x6f, 0x01 }, | |
1818 | { 0x70, 0x8b }, | |
1819 | { 0x71, 0x00 }, | |
1820 | { 0x72, 0x14 }, | |
1821 | { 0x73, 0x54 }, | |
1822 | { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */ | |
1823 | { 0x75, 0x0e }, | |
1824 | { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */ | |
1825 | { 0x77, 0xff }, | |
1826 | { 0x78, 0x80 }, | |
1827 | { 0x79, 0x80 }, | |
1828 | { 0x7a, 0x80 }, | |
1829 | { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */ | |
1830 | { 0x7c, 0x00 }, | |
1831 | { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */ | |
1832 | { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */ | |
1833 | { 0x7f, 0xfb }, | |
1834 | { 0x80, 0x28 }, | |
1835 | { 0x81, 0x00 }, | |
1836 | { 0x82, 0x23 }, | |
1837 | { 0x83, 0x0b }, | |
1838 | { 0x84, 0x00 }, | |
1839 | { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */ | |
1840 | { 0x86, 0xc9 }, | |
1841 | { 0x87, 0x00 }, | |
1842 | { 0x88, 0x00 }, | |
1843 | { 0x89, 0x01 }, | |
1844 | { 0x12, 0x20 }, | |
1845 | { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */ | |
1846 | }; | |
1847 | ||
6a7eba24 JFM |
1848 | static unsigned char ov7670_abs_to_sm(unsigned char v) |
1849 | { | |
1850 | if (v > 127) | |
1851 | return v & 0x7f; | |
1852 | return (128 - v) | 0x80; | |
1853 | } | |
1854 | ||
1855 | /* Write a OV519 register */ | |
a511ba94 | 1856 | static int reg_w(struct sd *sd, __u16 index, __u16 value) |
6a7eba24 | 1857 | { |
a511ba94 | 1858 | int ret, req = 0; |
b46aaa02 HG |
1859 | |
1860 | switch (sd->bridge) { | |
1861 | case BRIDGE_OV511: | |
1862 | case BRIDGE_OV511PLUS: | |
1863 | req = 2; | |
1864 | break; | |
1865 | case BRIDGE_OVFX2: | |
a511ba94 HG |
1866 | req = 0x0a; |
1867 | /* fall through */ | |
1868 | case BRIDGE_W9968CF: | |
b46aaa02 HG |
1869 | ret = usb_control_msg(sd->gspca_dev.dev, |
1870 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
a511ba94 | 1871 | req, |
b46aaa02 | 1872 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
a511ba94 | 1873 | value, index, NULL, 0, 500); |
b46aaa02 HG |
1874 | goto leave; |
1875 | default: | |
1876 | req = 1; | |
1877 | } | |
6a7eba24 | 1878 | |
739570bb | 1879 | sd->gspca_dev.usb_buf[0] = value; |
6a7eba24 JFM |
1880 | ret = usb_control_msg(sd->gspca_dev.dev, |
1881 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
49809d6a | 1882 | req, |
6a7eba24 JFM |
1883 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
1884 | 0, index, | |
739570bb | 1885 | sd->gspca_dev.usb_buf, 1, 500); |
b46aaa02 | 1886 | leave: |
a511ba94 HG |
1887 | if (ret < 0) { |
1888 | PDEBUG(D_ERR, "Write reg 0x%04x -> [0x%02x] failed", | |
1889 | value, index); | |
1890 | return ret; | |
1891 | } | |
1892 | ||
1893 | PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index); | |
1894 | return 0; | |
6a7eba24 JFM |
1895 | } |
1896 | ||
a511ba94 | 1897 | /* Read from a OV519 register, note not valid for the w9968cf!! */ |
6a7eba24 JFM |
1898 | /* returns: negative is error, pos or zero is data */ |
1899 | static int reg_r(struct sd *sd, __u16 index) | |
1900 | { | |
1901 | int ret; | |
b46aaa02 HG |
1902 | int req; |
1903 | ||
1904 | switch (sd->bridge) { | |
1905 | case BRIDGE_OV511: | |
1906 | case BRIDGE_OV511PLUS: | |
1907 | req = 3; | |
1908 | break; | |
1909 | case BRIDGE_OVFX2: | |
1910 | req = 0x0b; | |
1911 | break; | |
1912 | default: | |
1913 | req = 1; | |
1914 | } | |
6a7eba24 JFM |
1915 | |
1916 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1917 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
49809d6a | 1918 | req, |
6a7eba24 | 1919 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
739570bb | 1920 | 0, index, sd->gspca_dev.usb_buf, 1, 500); |
6a7eba24 | 1921 | |
a511ba94 | 1922 | if (ret >= 0) { |
739570bb | 1923 | ret = sd->gspca_dev.usb_buf[0]; |
a511ba94 HG |
1924 | PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret); |
1925 | } else | |
6a7eba24 | 1926 | PDEBUG(D_ERR, "Read reg [0x%02x] failed", index); |
a511ba94 | 1927 | |
6a7eba24 JFM |
1928 | return ret; |
1929 | } | |
1930 | ||
1931 | /* Read 8 values from a OV519 register */ | |
1932 | static int reg_r8(struct sd *sd, | |
a5ae2062 | 1933 | __u16 index) |
6a7eba24 JFM |
1934 | { |
1935 | int ret; | |
6a7eba24 JFM |
1936 | |
1937 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1938 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
1939 | 1, /* REQ_IO */ | |
1940 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
739570bb | 1941 | 0, index, sd->gspca_dev.usb_buf, 8, 500); |
6a7eba24 JFM |
1942 | |
1943 | if (ret >= 0) | |
739570bb | 1944 | ret = sd->gspca_dev.usb_buf[0]; |
6a7eba24 JFM |
1945 | else |
1946 | PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index); | |
a511ba94 | 1947 | |
6a7eba24 JFM |
1948 | return ret; |
1949 | } | |
1950 | ||
1951 | /* | |
1952 | * Writes bits at positions specified by mask to an OV51x reg. Bits that are in | |
1953 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
1954 | * that are in the same position as 0's in "mask" are preserved, regardless | |
1955 | * of their respective state in "value". | |
1956 | */ | |
1957 | static int reg_w_mask(struct sd *sd, | |
1958 | __u16 index, | |
1959 | __u8 value, | |
1960 | __u8 mask) | |
1961 | { | |
1962 | int ret; | |
1963 | __u8 oldval; | |
1964 | ||
1965 | if (mask != 0xff) { | |
1966 | value &= mask; /* Enforce mask on value */ | |
1967 | ret = reg_r(sd, index); | |
1968 | if (ret < 0) | |
1969 | return ret; | |
1970 | ||
1971 | oldval = ret & ~mask; /* Clear the masked bits */ | |
1972 | value |= oldval; /* Set the desired bits */ | |
1973 | } | |
1974 | return reg_w(sd, index, value); | |
1975 | } | |
1976 | ||
49809d6a HG |
1977 | /* |
1978 | * Writes multiple (n) byte value to a single register. Only valid with certain | |
1979 | * registers (0x30 and 0xc4 - 0xce). | |
1980 | */ | |
1981 | static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n) | |
1982 | { | |
1983 | int ret; | |
1984 | ||
83955556 | 1985 | *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value); |
49809d6a HG |
1986 | |
1987 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1988 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
1989 | 1 /* REG_IO */, | |
1990 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
1991 | 0, index, | |
1992 | sd->gspca_dev.usb_buf, n, 500); | |
a511ba94 | 1993 | if (ret < 0) { |
49809d6a | 1994 | PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value); |
a511ba94 HG |
1995 | return ret; |
1996 | } | |
1997 | ||
1998 | return 0; | |
49809d6a HG |
1999 | } |
2000 | ||
1876bb92 HG |
2001 | static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value) |
2002 | { | |
2003 | int rc, retries; | |
2004 | ||
2005 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); | |
2006 | ||
2007 | /* Three byte write cycle */ | |
2008 | for (retries = 6; ; ) { | |
2009 | /* Select camera register */ | |
2010 | rc = reg_w(sd, R51x_I2C_SADDR_3, reg); | |
2011 | if (rc < 0) | |
2012 | return rc; | |
2013 | ||
2014 | /* Write "value" to I2C data port of OV511 */ | |
2015 | rc = reg_w(sd, R51x_I2C_DATA, value); | |
2016 | if (rc < 0) | |
2017 | return rc; | |
2018 | ||
2019 | /* Initiate 3-byte write cycle */ | |
2020 | rc = reg_w(sd, R511_I2C_CTL, 0x01); | |
2021 | if (rc < 0) | |
2022 | return rc; | |
2023 | ||
83955556 | 2024 | do { |
1876bb92 | 2025 | rc = reg_r(sd, R511_I2C_CTL); |
83955556 | 2026 | } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ |
1876bb92 HG |
2027 | |
2028 | if (rc < 0) | |
2029 | return rc; | |
2030 | ||
2031 | if ((rc & 2) == 0) /* Ack? */ | |
2032 | break; | |
2033 | if (--retries < 0) { | |
2034 | PDEBUG(D_USBO, "i2c write retries exhausted"); | |
2035 | return -1; | |
2036 | } | |
2037 | } | |
2038 | ||
2039 | return 0; | |
2040 | } | |
2041 | ||
2042 | static int ov511_i2c_r(struct sd *sd, __u8 reg) | |
2043 | { | |
2044 | int rc, value, retries; | |
2045 | ||
2046 | /* Two byte write cycle */ | |
2047 | for (retries = 6; ; ) { | |
2048 | /* Select camera register */ | |
2049 | rc = reg_w(sd, R51x_I2C_SADDR_2, reg); | |
2050 | if (rc < 0) | |
2051 | return rc; | |
2052 | ||
2053 | /* Initiate 2-byte write cycle */ | |
2054 | rc = reg_w(sd, R511_I2C_CTL, 0x03); | |
2055 | if (rc < 0) | |
2056 | return rc; | |
2057 | ||
83955556 | 2058 | do { |
1876bb92 | 2059 | rc = reg_r(sd, R511_I2C_CTL); |
83955556 | 2060 | } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ |
1876bb92 HG |
2061 | |
2062 | if (rc < 0) | |
2063 | return rc; | |
2064 | ||
2065 | if ((rc & 2) == 0) /* Ack? */ | |
2066 | break; | |
2067 | ||
2068 | /* I2C abort */ | |
2069 | reg_w(sd, R511_I2C_CTL, 0x10); | |
2070 | ||
2071 | if (--retries < 0) { | |
2072 | PDEBUG(D_USBI, "i2c write retries exhausted"); | |
2073 | return -1; | |
2074 | } | |
2075 | } | |
2076 | ||
2077 | /* Two byte read cycle */ | |
2078 | for (retries = 6; ; ) { | |
2079 | /* Initiate 2-byte read cycle */ | |
2080 | rc = reg_w(sd, R511_I2C_CTL, 0x05); | |
2081 | if (rc < 0) | |
2082 | return rc; | |
2083 | ||
83955556 | 2084 | do { |
1876bb92 | 2085 | rc = reg_r(sd, R511_I2C_CTL); |
83955556 | 2086 | } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ |
1876bb92 HG |
2087 | |
2088 | if (rc < 0) | |
2089 | return rc; | |
2090 | ||
2091 | if ((rc & 2) == 0) /* Ack? */ | |
2092 | break; | |
2093 | ||
2094 | /* I2C abort */ | |
2095 | rc = reg_w(sd, R511_I2C_CTL, 0x10); | |
2096 | if (rc < 0) | |
2097 | return rc; | |
2098 | ||
2099 | if (--retries < 0) { | |
2100 | PDEBUG(D_USBI, "i2c read retries exhausted"); | |
2101 | return -1; | |
2102 | } | |
2103 | } | |
2104 | ||
2105 | value = reg_r(sd, R51x_I2C_DATA); | |
2106 | ||
2107 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value); | |
2108 | ||
2109 | /* This is needed to make i2c_w() work */ | |
2110 | rc = reg_w(sd, R511_I2C_CTL, 0x05); | |
2111 | if (rc < 0) | |
2112 | return rc; | |
2113 | ||
2114 | return value; | |
2115 | } | |
49809d6a | 2116 | |
6a7eba24 JFM |
2117 | /* |
2118 | * The OV518 I2C I/O procedure is different, hence, this function. | |
2119 | * This is normally only called from i2c_w(). Note that this function | |
2120 | * always succeeds regardless of whether the sensor is present and working. | |
2121 | */ | |
1876bb92 | 2122 | static int ov518_i2c_w(struct sd *sd, |
6a7eba24 JFM |
2123 | __u8 reg, |
2124 | __u8 value) | |
2125 | { | |
2126 | int rc; | |
2127 | ||
2128 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); | |
2129 | ||
2130 | /* Select camera register */ | |
2131 | rc = reg_w(sd, R51x_I2C_SADDR_3, reg); | |
2132 | if (rc < 0) | |
2133 | return rc; | |
2134 | ||
2135 | /* Write "value" to I2C data port of OV511 */ | |
2136 | rc = reg_w(sd, R51x_I2C_DATA, value); | |
2137 | if (rc < 0) | |
2138 | return rc; | |
2139 | ||
2140 | /* Initiate 3-byte write cycle */ | |
2141 | rc = reg_w(sd, R518_I2C_CTL, 0x01); | |
ac40b1fa JFM |
2142 | if (rc < 0) |
2143 | return rc; | |
6a7eba24 JFM |
2144 | |
2145 | /* wait for write complete */ | |
2146 | msleep(4); | |
6a7eba24 JFM |
2147 | return reg_r8(sd, R518_I2C_CTL); |
2148 | } | |
2149 | ||
2150 | /* | |
2151 | * returns: negative is error, pos or zero is data | |
2152 | * | |
2153 | * The OV518 I2C I/O procedure is different, hence, this function. | |
2154 | * This is normally only called from i2c_r(). Note that this function | |
2155 | * always succeeds regardless of whether the sensor is present and working. | |
2156 | */ | |
1876bb92 | 2157 | static int ov518_i2c_r(struct sd *sd, __u8 reg) |
6a7eba24 JFM |
2158 | { |
2159 | int rc, value; | |
2160 | ||
2161 | /* Select camera register */ | |
2162 | rc = reg_w(sd, R51x_I2C_SADDR_2, reg); | |
2163 | if (rc < 0) | |
2164 | return rc; | |
2165 | ||
2166 | /* Initiate 2-byte write cycle */ | |
2167 | rc = reg_w(sd, R518_I2C_CTL, 0x03); | |
2168 | if (rc < 0) | |
2169 | return rc; | |
2170 | ||
2171 | /* Initiate 2-byte read cycle */ | |
2172 | rc = reg_w(sd, R518_I2C_CTL, 0x05); | |
2173 | if (rc < 0) | |
2174 | return rc; | |
2175 | value = reg_r(sd, R51x_I2C_DATA); | |
2176 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value); | |
2177 | return value; | |
2178 | } | |
2179 | ||
b46aaa02 HG |
2180 | static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value) |
2181 | { | |
2182 | int ret; | |
2183 | ||
2184 | ret = usb_control_msg(sd->gspca_dev.dev, | |
2185 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
2186 | 0x02, | |
2187 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
2188 | (__u16)value, (__u16)reg, NULL, 0, 500); | |
2189 | ||
a511ba94 | 2190 | if (ret < 0) { |
b46aaa02 | 2191 | PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg); |
a511ba94 HG |
2192 | return ret; |
2193 | } | |
b46aaa02 | 2194 | |
a511ba94 HG |
2195 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); |
2196 | return 0; | |
b46aaa02 HG |
2197 | } |
2198 | ||
2199 | static int ovfx2_i2c_r(struct sd *sd, __u8 reg) | |
2200 | { | |
2201 | int ret; | |
2202 | ||
2203 | ret = usb_control_msg(sd->gspca_dev.dev, | |
2204 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
2205 | 0x03, | |
2206 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
2207 | 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500); | |
2208 | ||
2209 | if (ret >= 0) { | |
2210 | ret = sd->gspca_dev.usb_buf[0]; | |
2211 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret); | |
2212 | } else | |
2213 | PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg); | |
2214 | ||
2215 | return ret; | |
2216 | } | |
2217 | ||
1876bb92 HG |
2218 | static int i2c_w(struct sd *sd, __u8 reg, __u8 value) |
2219 | { | |
fb1f9020 HG |
2220 | int ret = -1; |
2221 | ||
2222 | if (sd->sensor_reg_cache[reg] == value) | |
2223 | return 0; | |
2224 | ||
1876bb92 HG |
2225 | switch (sd->bridge) { |
2226 | case BRIDGE_OV511: | |
2227 | case BRIDGE_OV511PLUS: | |
fb1f9020 HG |
2228 | ret = ov511_i2c_w(sd, reg, value); |
2229 | break; | |
1876bb92 HG |
2230 | case BRIDGE_OV518: |
2231 | case BRIDGE_OV518PLUS: | |
2232 | case BRIDGE_OV519: | |
fb1f9020 HG |
2233 | ret = ov518_i2c_w(sd, reg, value); |
2234 | break; | |
b46aaa02 | 2235 | case BRIDGE_OVFX2: |
fb1f9020 HG |
2236 | ret = ovfx2_i2c_w(sd, reg, value); |
2237 | break; | |
a511ba94 | 2238 | case BRIDGE_W9968CF: |
fb1f9020 HG |
2239 | ret = w9968cf_i2c_w(sd, reg, value); |
2240 | break; | |
1876bb92 | 2241 | } |
fb1f9020 HG |
2242 | |
2243 | if (ret >= 0) { | |
2244 | /* Up on sensor reset empty the register cache */ | |
2245 | if (reg == 0x12 && (value & 0x80)) | |
2246 | memset(sd->sensor_reg_cache, -1, | |
2247 | sizeof(sd->sensor_reg_cache)); | |
2248 | else | |
2249 | sd->sensor_reg_cache[reg] = value; | |
2250 | } | |
2251 | ||
2252 | return ret; | |
1876bb92 HG |
2253 | } |
2254 | ||
2255 | static int i2c_r(struct sd *sd, __u8 reg) | |
2256 | { | |
8394bcf3 | 2257 | int ret = -1; |
fb1f9020 HG |
2258 | |
2259 | if (sd->sensor_reg_cache[reg] != -1) | |
2260 | return sd->sensor_reg_cache[reg]; | |
2261 | ||
1876bb92 HG |
2262 | switch (sd->bridge) { |
2263 | case BRIDGE_OV511: | |
2264 | case BRIDGE_OV511PLUS: | |
fb1f9020 HG |
2265 | ret = ov511_i2c_r(sd, reg); |
2266 | break; | |
1876bb92 HG |
2267 | case BRIDGE_OV518: |
2268 | case BRIDGE_OV518PLUS: | |
2269 | case BRIDGE_OV519: | |
fb1f9020 HG |
2270 | ret = ov518_i2c_r(sd, reg); |
2271 | break; | |
b46aaa02 | 2272 | case BRIDGE_OVFX2: |
fb1f9020 HG |
2273 | ret = ovfx2_i2c_r(sd, reg); |
2274 | break; | |
a511ba94 | 2275 | case BRIDGE_W9968CF: |
fb1f9020 HG |
2276 | ret = w9968cf_i2c_r(sd, reg); |
2277 | break; | |
1876bb92 | 2278 | } |
fb1f9020 HG |
2279 | |
2280 | if (ret >= 0) | |
2281 | sd->sensor_reg_cache[reg] = ret; | |
2282 | ||
2283 | return ret; | |
1876bb92 HG |
2284 | } |
2285 | ||
6a7eba24 JFM |
2286 | /* Writes bits at positions specified by mask to an I2C reg. Bits that are in |
2287 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
2288 | * that are in the same position as 0's in "mask" are preserved, regardless | |
2289 | * of their respective state in "value". | |
2290 | */ | |
2291 | static int i2c_w_mask(struct sd *sd, | |
2292 | __u8 reg, | |
2293 | __u8 value, | |
2294 | __u8 mask) | |
2295 | { | |
2296 | int rc; | |
2297 | __u8 oldval; | |
2298 | ||
2299 | value &= mask; /* Enforce mask on value */ | |
2300 | rc = i2c_r(sd, reg); | |
2301 | if (rc < 0) | |
2302 | return rc; | |
2303 | oldval = rc & ~mask; /* Clear the masked bits */ | |
2304 | value |= oldval; /* Set the desired bits */ | |
2305 | return i2c_w(sd, reg, value); | |
2306 | } | |
2307 | ||
2308 | /* Temporarily stops OV511 from functioning. Must do this before changing | |
2309 | * registers while the camera is streaming */ | |
2310 | static inline int ov51x_stop(struct sd *sd) | |
2311 | { | |
2312 | PDEBUG(D_STREAM, "stopping"); | |
2313 | sd->stopped = 1; | |
49809d6a HG |
2314 | switch (sd->bridge) { |
2315 | case BRIDGE_OV511: | |
2316 | case BRIDGE_OV511PLUS: | |
2317 | return reg_w(sd, R51x_SYS_RESET, 0x3d); | |
2318 | case BRIDGE_OV518: | |
2319 | case BRIDGE_OV518PLUS: | |
2320 | return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a); | |
2321 | case BRIDGE_OV519: | |
2322 | return reg_w(sd, OV519_SYS_RESET1, 0x0f); | |
b46aaa02 HG |
2323 | case BRIDGE_OVFX2: |
2324 | return reg_w_mask(sd, 0x0f, 0x00, 0x02); | |
a511ba94 | 2325 | case BRIDGE_W9968CF: |
79b35902 | 2326 | return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */ |
49809d6a HG |
2327 | } |
2328 | ||
2329 | return 0; | |
6a7eba24 JFM |
2330 | } |
2331 | ||
2332 | /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not | |
2333 | * actually stopped (for performance). */ | |
2334 | static inline int ov51x_restart(struct sd *sd) | |
2335 | { | |
49809d6a HG |
2336 | int rc; |
2337 | ||
6a7eba24 JFM |
2338 | PDEBUG(D_STREAM, "restarting"); |
2339 | if (!sd->stopped) | |
2340 | return 0; | |
2341 | sd->stopped = 0; | |
2342 | ||
2343 | /* Reinitialize the stream */ | |
49809d6a HG |
2344 | switch (sd->bridge) { |
2345 | case BRIDGE_OV511: | |
2346 | case BRIDGE_OV511PLUS: | |
2347 | return reg_w(sd, R51x_SYS_RESET, 0x00); | |
2348 | case BRIDGE_OV518: | |
2349 | case BRIDGE_OV518PLUS: | |
2350 | rc = reg_w(sd, 0x2f, 0x80); | |
2351 | if (rc < 0) | |
2352 | return rc; | |
2353 | return reg_w(sd, R51x_SYS_RESET, 0x00); | |
2354 | case BRIDGE_OV519: | |
2355 | return reg_w(sd, OV519_SYS_RESET1, 0x00); | |
b46aaa02 HG |
2356 | case BRIDGE_OVFX2: |
2357 | return reg_w_mask(sd, 0x0f, 0x02, 0x02); | |
a511ba94 HG |
2358 | case BRIDGE_W9968CF: |
2359 | return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */ | |
49809d6a HG |
2360 | } |
2361 | ||
2362 | return 0; | |
6a7eba24 JFM |
2363 | } |
2364 | ||
229bb7dc HG |
2365 | static int ov51x_set_slave_ids(struct sd *sd, __u8 slave); |
2366 | ||
6a7eba24 JFM |
2367 | /* This does an initial reset of an OmniVision sensor and ensures that I2C |
2368 | * is synchronized. Returns <0 on failure. | |
2369 | */ | |
229bb7dc | 2370 | static int init_ov_sensor(struct sd *sd, __u8 slave) |
6a7eba24 | 2371 | { |
ac40b1fa | 2372 | int i; |
6a7eba24 | 2373 | |
229bb7dc HG |
2374 | if (ov51x_set_slave_ids(sd, slave) < 0) |
2375 | return -EIO; | |
2376 | ||
6a7eba24 JFM |
2377 | /* Reset the sensor */ |
2378 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
2379 | return -EIO; | |
2380 | ||
2381 | /* Wait for it to initialize */ | |
2382 | msleep(150); | |
2383 | ||
ac40b1fa | 2384 | for (i = 0; i < i2c_detect_tries; i++) { |
6a7eba24 JFM |
2385 | if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f && |
2386 | i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) { | |
ac40b1fa JFM |
2387 | PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i); |
2388 | return 0; | |
6a7eba24 JFM |
2389 | } |
2390 | ||
2391 | /* Reset the sensor */ | |
2392 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
2393 | return -EIO; | |
2394 | /* Wait for it to initialize */ | |
2395 | msleep(150); | |
2396 | /* Dummy read to sync I2C */ | |
2397 | if (i2c_r(sd, 0x00) < 0) | |
2398 | return -EIO; | |
2399 | } | |
ac40b1fa | 2400 | return -EIO; |
6a7eba24 JFM |
2401 | } |
2402 | ||
6a7eba24 JFM |
2403 | /* Set the read and write slave IDs. The "slave" argument is the write slave, |
2404 | * and the read slave will be set to (slave + 1). | |
2405 | * This should not be called from outside the i2c I/O functions. | |
2406 | * Sets I2C read and write slave IDs. Returns <0 for error | |
2407 | */ | |
2408 | static int ov51x_set_slave_ids(struct sd *sd, | |
2409 | __u8 slave) | |
2410 | { | |
2411 | int rc; | |
2412 | ||
a511ba94 HG |
2413 | switch (sd->bridge) { |
2414 | case BRIDGE_OVFX2: | |
b46aaa02 | 2415 | return reg_w(sd, OVFX2_I2C_ADDR, slave); |
a511ba94 HG |
2416 | case BRIDGE_W9968CF: |
2417 | sd->sensor_addr = slave; | |
2418 | return 0; | |
2419 | } | |
b46aaa02 | 2420 | |
6a7eba24 JFM |
2421 | rc = reg_w(sd, R51x_I2C_W_SID, slave); |
2422 | if (rc < 0) | |
2423 | return rc; | |
2424 | return reg_w(sd, R51x_I2C_R_SID, slave + 1); | |
2425 | } | |
2426 | ||
6a7eba24 | 2427 | static int write_regvals(struct sd *sd, |
a5ae2062 | 2428 | const struct ov_regvals *regvals, |
6a7eba24 JFM |
2429 | int n) |
2430 | { | |
2431 | int rc; | |
2432 | ||
2433 | while (--n >= 0) { | |
2434 | rc = reg_w(sd, regvals->reg, regvals->val); | |
2435 | if (rc < 0) | |
2436 | return rc; | |
2437 | regvals++; | |
2438 | } | |
2439 | return 0; | |
2440 | } | |
2441 | ||
2442 | static int write_i2c_regvals(struct sd *sd, | |
a5ae2062 | 2443 | const struct ov_i2c_regvals *regvals, |
6a7eba24 JFM |
2444 | int n) |
2445 | { | |
2446 | int rc; | |
2447 | ||
2448 | while (--n >= 0) { | |
2449 | rc = i2c_w(sd, regvals->reg, regvals->val); | |
2450 | if (rc < 0) | |
2451 | return rc; | |
2452 | regvals++; | |
2453 | } | |
2454 | return 0; | |
2455 | } | |
2456 | ||
2457 | /**************************************************************************** | |
2458 | * | |
2459 | * OV511 and sensor configuration | |
2460 | * | |
2461 | ***************************************************************************/ | |
2462 | ||
635118d5 HG |
2463 | /* This initializes the OV2x10 / OV3610 / OV3620 */ |
2464 | static int ov_hires_configure(struct sd *sd) | |
2465 | { | |
2466 | int high, low; | |
2467 | ||
2468 | if (sd->bridge != BRIDGE_OVFX2) { | |
2469 | PDEBUG(D_ERR, "error hires sensors only supported with ovfx2"); | |
2470 | return -1; | |
2471 | } | |
2472 | ||
2473 | PDEBUG(D_PROBE, "starting ov hires configuration"); | |
2474 | ||
2475 | /* Detect sensor (sub)type */ | |
2476 | high = i2c_r(sd, 0x0a); | |
2477 | low = i2c_r(sd, 0x0b); | |
2478 | /* info("%x, %x", high, low); */ | |
2479 | if (high == 0x96 && low == 0x40) { | |
2480 | PDEBUG(D_PROBE, "Sensor is an OV2610"); | |
2481 | sd->sensor = SEN_OV2610; | |
2482 | } else if (high == 0x36 && (low & 0x0f) == 0x00) { | |
2483 | PDEBUG(D_PROBE, "Sensor is an OV3610"); | |
2484 | sd->sensor = SEN_OV3610; | |
2485 | } else { | |
2486 | PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x", | |
2487 | high, low); | |
2488 | return -1; | |
2489 | } | |
2490 | ||
2491 | /* Set sensor-specific vars */ | |
2492 | return 0; | |
2493 | } | |
2494 | ||
2495 | ||
6a7eba24 JFM |
2496 | /* This initializes the OV8110, OV8610 sensor. The OV8110 uses |
2497 | * the same register settings as the OV8610, since they are very similar. | |
2498 | */ | |
2499 | static int ov8xx0_configure(struct sd *sd) | |
2500 | { | |
2501 | int rc; | |
6a7eba24 JFM |
2502 | |
2503 | PDEBUG(D_PROBE, "starting ov8xx0 configuration"); | |
2504 | ||
6a7eba24 JFM |
2505 | /* Detect sensor (sub)type */ |
2506 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
2507 | if (rc < 0) { | |
2508 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
2509 | return -1; | |
2510 | } | |
2511 | if ((rc & 3) == 1) { | |
6a7eba24 JFM |
2512 | sd->sensor = SEN_OV8610; |
2513 | } else { | |
2514 | PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3); | |
2515 | return -1; | |
2516 | } | |
6a7eba24 JFM |
2517 | |
2518 | /* Set sensor-specific vars */ | |
6a7eba24 JFM |
2519 | return 0; |
2520 | } | |
2521 | ||
2522 | /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses | |
2523 | * the same register settings as the OV7610, since they are very similar. | |
2524 | */ | |
2525 | static int ov7xx0_configure(struct sd *sd) | |
2526 | { | |
2527 | int rc, high, low; | |
2528 | ||
6a7eba24 JFM |
2529 | |
2530 | PDEBUG(D_PROBE, "starting OV7xx0 configuration"); | |
2531 | ||
6a7eba24 JFM |
2532 | /* Detect sensor (sub)type */ |
2533 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
2534 | ||
2535 | /* add OV7670 here | |
2536 | * it appears to be wrongly detected as a 7610 by default */ | |
2537 | if (rc < 0) { | |
2538 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
2539 | return -1; | |
2540 | } | |
2541 | if ((rc & 3) == 3) { | |
2542 | /* quick hack to make OV7670s work */ | |
2543 | high = i2c_r(sd, 0x0a); | |
2544 | low = i2c_r(sd, 0x0b); | |
2545 | /* info("%x, %x", high, low); */ | |
2546 | if (high == 0x76 && low == 0x73) { | |
2547 | PDEBUG(D_PROBE, "Sensor is an OV7670"); | |
2548 | sd->sensor = SEN_OV7670; | |
2549 | } else { | |
2550 | PDEBUG(D_PROBE, "Sensor is an OV7610"); | |
2551 | sd->sensor = SEN_OV7610; | |
2552 | } | |
2553 | } else if ((rc & 3) == 1) { | |
2554 | /* I don't know what's different about the 76BE yet. */ | |
b282d873 | 2555 | if (i2c_r(sd, 0x15) & 1) { |
6a7eba24 | 2556 | PDEBUG(D_PROBE, "Sensor is an OV7620AE"); |
b282d873 HG |
2557 | sd->sensor = SEN_OV7620; |
2558 | } else { | |
6a7eba24 | 2559 | PDEBUG(D_PROBE, "Sensor is an OV76BE"); |
b282d873 HG |
2560 | sd->sensor = SEN_OV76BE; |
2561 | } | |
6a7eba24 JFM |
2562 | } else if ((rc & 3) == 0) { |
2563 | /* try to read product id registers */ | |
2564 | high = i2c_r(sd, 0x0a); | |
2565 | if (high < 0) { | |
2566 | PDEBUG(D_ERR, "Error detecting camera chip PID"); | |
2567 | return high; | |
2568 | } | |
2569 | low = i2c_r(sd, 0x0b); | |
2570 | if (low < 0) { | |
2571 | PDEBUG(D_ERR, "Error detecting camera chip VER"); | |
2572 | return low; | |
2573 | } | |
2574 | if (high == 0x76) { | |
594f5b8b JFM |
2575 | switch (low) { |
2576 | case 0x30: | |
6a7eba24 | 2577 | PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635"); |
4202f71c JFM |
2578 | PDEBUG(D_ERR, |
2579 | "7630 is not supported by this driver"); | |
2580 | return -1; | |
594f5b8b | 2581 | case 0x40: |
6a7eba24 JFM |
2582 | PDEBUG(D_PROBE, "Sensor is an OV7645"); |
2583 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
2584 | break; |
2585 | case 0x45: | |
6a7eba24 JFM |
2586 | PDEBUG(D_PROBE, "Sensor is an OV7645B"); |
2587 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
2588 | break; |
2589 | case 0x48: | |
6a7eba24 JFM |
2590 | PDEBUG(D_PROBE, "Sensor is an OV7648"); |
2591 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
2592 | break; |
2593 | default: | |
2594 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); | |
6a7eba24 JFM |
2595 | return -1; |
2596 | } | |
2597 | } else { | |
2598 | PDEBUG(D_PROBE, "Sensor is an OV7620"); | |
2599 | sd->sensor = SEN_OV7620; | |
2600 | } | |
2601 | } else { | |
2602 | PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3); | |
2603 | return -1; | |
2604 | } | |
2605 | ||
6a7eba24 | 2606 | /* Set sensor-specific vars */ |
6a7eba24 JFM |
2607 | return 0; |
2608 | } | |
2609 | ||
2610 | /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */ | |
2611 | static int ov6xx0_configure(struct sd *sd) | |
2612 | { | |
2613 | int rc; | |
4202f71c | 2614 | PDEBUG(D_PROBE, "starting OV6xx0 configuration"); |
6a7eba24 JFM |
2615 | |
2616 | /* Detect sensor (sub)type */ | |
2617 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
2618 | if (rc < 0) { | |
2619 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
2620 | return -1; | |
2621 | } | |
2622 | ||
2623 | /* Ugh. The first two bits are the version bits, but | |
2624 | * the entire register value must be used. I guess OVT | |
2625 | * underestimated how many variants they would make. */ | |
594f5b8b JFM |
2626 | switch (rc) { |
2627 | case 0x00: | |
6a7eba24 JFM |
2628 | sd->sensor = SEN_OV6630; |
2629 | PDEBUG(D_ERR, | |
2630 | "WARNING: Sensor is an OV66308. Your camera may have"); | |
2631 | PDEBUG(D_ERR, "been misdetected in previous driver versions."); | |
594f5b8b JFM |
2632 | break; |
2633 | case 0x01: | |
6a7eba24 | 2634 | sd->sensor = SEN_OV6620; |
7d971373 | 2635 | PDEBUG(D_PROBE, "Sensor is an OV6620"); |
594f5b8b JFM |
2636 | break; |
2637 | case 0x02: | |
6a7eba24 JFM |
2638 | sd->sensor = SEN_OV6630; |
2639 | PDEBUG(D_PROBE, "Sensor is an OV66308AE"); | |
594f5b8b JFM |
2640 | break; |
2641 | case 0x03: | |
7d971373 | 2642 | sd->sensor = SEN_OV66308AF; |
6a7eba24 | 2643 | PDEBUG(D_PROBE, "Sensor is an OV66308AF"); |
594f5b8b JFM |
2644 | break; |
2645 | case 0x90: | |
6a7eba24 JFM |
2646 | sd->sensor = SEN_OV6630; |
2647 | PDEBUG(D_ERR, | |
2648 | "WARNING: Sensor is an OV66307. Your camera may have"); | |
2649 | PDEBUG(D_ERR, "been misdetected in previous driver versions."); | |
594f5b8b JFM |
2650 | break; |
2651 | default: | |
6a7eba24 JFM |
2652 | PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc); |
2653 | return -1; | |
2654 | } | |
2655 | ||
2656 | /* Set sensor-specific vars */ | |
594f5b8b | 2657 | sd->sif = 1; |
6a7eba24 | 2658 | |
6a7eba24 JFM |
2659 | return 0; |
2660 | } | |
2661 | ||
2662 | /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */ | |
2663 | static void ov51x_led_control(struct sd *sd, int on) | |
2664 | { | |
9e4d8258 HG |
2665 | if (sd->invert_led) |
2666 | on = !on; | |
2667 | ||
49809d6a HG |
2668 | switch (sd->bridge) { |
2669 | /* OV511 has no LED control */ | |
2670 | case BRIDGE_OV511PLUS: | |
2671 | reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0); | |
2672 | break; | |
2673 | case BRIDGE_OV518: | |
2674 | case BRIDGE_OV518PLUS: | |
2675 | reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02); | |
2676 | break; | |
2677 | case BRIDGE_OV519: | |
2678 | reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */ | |
2679 | break; | |
2680 | } | |
6a7eba24 JFM |
2681 | } |
2682 | ||
1876bb92 | 2683 | static int ov51x_upload_quan_tables(struct sd *sd) |
49809d6a | 2684 | { |
1876bb92 HG |
2685 | const unsigned char yQuanTable511[] = { |
2686 | 0, 1, 1, 2, 2, 3, 3, 4, | |
2687 | 1, 1, 1, 2, 2, 3, 4, 4, | |
2688 | 1, 1, 2, 2, 3, 4, 4, 4, | |
2689 | 2, 2, 2, 3, 4, 4, 4, 4, | |
2690 | 2, 2, 3, 4, 4, 5, 5, 5, | |
2691 | 3, 3, 4, 4, 5, 5, 5, 5, | |
2692 | 3, 4, 4, 4, 5, 5, 5, 5, | |
2693 | 4, 4, 4, 4, 5, 5, 5, 5 | |
2694 | }; | |
2695 | ||
2696 | const unsigned char uvQuanTable511[] = { | |
2697 | 0, 2, 2, 3, 4, 4, 4, 4, | |
2698 | 2, 2, 2, 4, 4, 4, 4, 4, | |
2699 | 2, 2, 3, 4, 4, 4, 4, 4, | |
2700 | 3, 4, 4, 4, 4, 4, 4, 4, | |
2701 | 4, 4, 4, 4, 4, 4, 4, 4, | |
2702 | 4, 4, 4, 4, 4, 4, 4, 4, | |
2703 | 4, 4, 4, 4, 4, 4, 4, 4, | |
2704 | 4, 4, 4, 4, 4, 4, 4, 4 | |
2705 | }; | |
2706 | ||
2707 | /* OV518 quantization tables are 8x4 (instead of 8x8) */ | |
49809d6a HG |
2708 | const unsigned char yQuanTable518[] = { |
2709 | 5, 4, 5, 6, 6, 7, 7, 7, | |
2710 | 5, 5, 5, 5, 6, 7, 7, 7, | |
2711 | 6, 6, 6, 6, 7, 7, 7, 8, | |
2712 | 7, 7, 6, 7, 7, 7, 8, 8 | |
2713 | }; | |
2714 | ||
2715 | const unsigned char uvQuanTable518[] = { | |
2716 | 6, 6, 6, 7, 7, 7, 7, 7, | |
2717 | 6, 6, 6, 7, 7, 7, 7, 7, | |
2718 | 6, 6, 6, 7, 7, 7, 7, 8, | |
2719 | 7, 7, 7, 7, 7, 7, 8, 8 | |
2720 | }; | |
2721 | ||
1876bb92 | 2722 | const unsigned char *pYTable, *pUVTable; |
49809d6a | 2723 | unsigned char val0, val1; |
1876bb92 | 2724 | int i, size, rc, reg = R51x_COMP_LUT_BEGIN; |
49809d6a HG |
2725 | |
2726 | PDEBUG(D_PROBE, "Uploading quantization tables"); | |
2727 | ||
1876bb92 HG |
2728 | if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) { |
2729 | pYTable = yQuanTable511; | |
2730 | pUVTable = uvQuanTable511; | |
2731 | size = 32; | |
2732 | } else { | |
2733 | pYTable = yQuanTable518; | |
2734 | pUVTable = uvQuanTable518; | |
2735 | size = 16; | |
2736 | } | |
2737 | ||
2738 | for (i = 0; i < size; i++) { | |
49809d6a HG |
2739 | val0 = *pYTable++; |
2740 | val1 = *pYTable++; | |
2741 | val0 &= 0x0f; | |
2742 | val1 &= 0x0f; | |
2743 | val0 |= val1 << 4; | |
2744 | rc = reg_w(sd, reg, val0); | |
2745 | if (rc < 0) | |
2746 | return rc; | |
2747 | ||
2748 | val0 = *pUVTable++; | |
2749 | val1 = *pUVTable++; | |
2750 | val0 &= 0x0f; | |
2751 | val1 &= 0x0f; | |
2752 | val0 |= val1 << 4; | |
1876bb92 | 2753 | rc = reg_w(sd, reg + size, val0); |
49809d6a HG |
2754 | if (rc < 0) |
2755 | return rc; | |
2756 | ||
2757 | reg++; | |
2758 | } | |
2759 | ||
2760 | return 0; | |
2761 | } | |
2762 | ||
1876bb92 HG |
2763 | /* This initializes the OV511/OV511+ and the sensor */ |
2764 | static int ov511_configure(struct gspca_dev *gspca_dev) | |
2765 | { | |
2766 | struct sd *sd = (struct sd *) gspca_dev; | |
2767 | int rc; | |
2768 | ||
2769 | /* For 511 and 511+ */ | |
2770 | const struct ov_regvals init_511[] = { | |
2771 | { R51x_SYS_RESET, 0x7f }, | |
2772 | { R51x_SYS_INIT, 0x01 }, | |
2773 | { R51x_SYS_RESET, 0x7f }, | |
2774 | { R51x_SYS_INIT, 0x01 }, | |
2775 | { R51x_SYS_RESET, 0x3f }, | |
2776 | { R51x_SYS_INIT, 0x01 }, | |
2777 | { R51x_SYS_RESET, 0x3d }, | |
2778 | }; | |
2779 | ||
2780 | const struct ov_regvals norm_511[] = { | |
2781 | { R511_DRAM_FLOW_CTL, 0x01 }, | |
2782 | { R51x_SYS_SNAP, 0x00 }, | |
2783 | { R51x_SYS_SNAP, 0x02 }, | |
2784 | { R51x_SYS_SNAP, 0x00 }, | |
2785 | { R511_FIFO_OPTS, 0x1f }, | |
2786 | { R511_COMP_EN, 0x00 }, | |
2787 | { R511_COMP_LUT_EN, 0x03 }, | |
2788 | }; | |
2789 | ||
2790 | const struct ov_regvals norm_511_p[] = { | |
2791 | { R511_DRAM_FLOW_CTL, 0xff }, | |
2792 | { R51x_SYS_SNAP, 0x00 }, | |
2793 | { R51x_SYS_SNAP, 0x02 }, | |
2794 | { R51x_SYS_SNAP, 0x00 }, | |
2795 | { R511_FIFO_OPTS, 0xff }, | |
2796 | { R511_COMP_EN, 0x00 }, | |
2797 | { R511_COMP_LUT_EN, 0x03 }, | |
2798 | }; | |
2799 | ||
2800 | const struct ov_regvals compress_511[] = { | |
2801 | { 0x70, 0x1f }, | |
2802 | { 0x71, 0x05 }, | |
2803 | { 0x72, 0x06 }, | |
2804 | { 0x73, 0x06 }, | |
2805 | { 0x74, 0x14 }, | |
2806 | { 0x75, 0x03 }, | |
2807 | { 0x76, 0x04 }, | |
2808 | { 0x77, 0x04 }, | |
2809 | }; | |
2810 | ||
2811 | PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID)); | |
2812 | ||
2813 | rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511)); | |
2814 | if (rc < 0) | |
2815 | return rc; | |
2816 | ||
2817 | switch (sd->bridge) { | |
2818 | case BRIDGE_OV511: | |
2819 | rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511)); | |
2820 | if (rc < 0) | |
2821 | return rc; | |
2822 | break; | |
2823 | case BRIDGE_OV511PLUS: | |
2824 | rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p)); | |
2825 | if (rc < 0) | |
2826 | return rc; | |
2827 | break; | |
2828 | } | |
2829 | ||
2830 | /* Init compression */ | |
2831 | rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511)); | |
2832 | if (rc < 0) | |
2833 | return rc; | |
2834 | ||
2835 | rc = ov51x_upload_quan_tables(sd); | |
2836 | if (rc < 0) { | |
2837 | PDEBUG(D_ERR, "Error uploading quantization tables"); | |
2838 | return rc; | |
2839 | } | |
2840 | ||
2841 | return 0; | |
2842 | } | |
2843 | ||
49809d6a HG |
2844 | /* This initializes the OV518/OV518+ and the sensor */ |
2845 | static int ov518_configure(struct gspca_dev *gspca_dev) | |
6a7eba24 JFM |
2846 | { |
2847 | struct sd *sd = (struct sd *) gspca_dev; | |
49809d6a HG |
2848 | int rc; |
2849 | ||
2850 | /* For 518 and 518+ */ | |
e080fcd9 | 2851 | const struct ov_regvals init_518[] = { |
49809d6a HG |
2852 | { R51x_SYS_RESET, 0x40 }, |
2853 | { R51x_SYS_INIT, 0xe1 }, | |
2854 | { R51x_SYS_RESET, 0x3e }, | |
2855 | { R51x_SYS_INIT, 0xe1 }, | |
2856 | { R51x_SYS_RESET, 0x00 }, | |
2857 | { R51x_SYS_INIT, 0xe1 }, | |
2858 | { 0x46, 0x00 }, | |
2859 | { 0x5d, 0x03 }, | |
2860 | }; | |
2861 | ||
e080fcd9 | 2862 | const struct ov_regvals norm_518[] = { |
49809d6a HG |
2863 | { R51x_SYS_SNAP, 0x02 }, /* Reset */ |
2864 | { R51x_SYS_SNAP, 0x01 }, /* Enable */ | |
2865 | { 0x31, 0x0f }, | |
2866 | { 0x5d, 0x03 }, | |
2867 | { 0x24, 0x9f }, | |
2868 | { 0x25, 0x90 }, | |
2869 | { 0x20, 0x00 }, | |
2870 | { 0x51, 0x04 }, | |
2871 | { 0x71, 0x19 }, | |
2872 | { 0x2f, 0x80 }, | |
2873 | }; | |
2874 | ||
e080fcd9 | 2875 | const struct ov_regvals norm_518_p[] = { |
49809d6a HG |
2876 | { R51x_SYS_SNAP, 0x02 }, /* Reset */ |
2877 | { R51x_SYS_SNAP, 0x01 }, /* Enable */ | |
2878 | { 0x31, 0x0f }, | |
2879 | { 0x5d, 0x03 }, | |
2880 | { 0x24, 0x9f }, | |
2881 | { 0x25, 0x90 }, | |
2882 | { 0x20, 0x60 }, | |
2883 | { 0x51, 0x02 }, | |
2884 | { 0x71, 0x19 }, | |
2885 | { 0x40, 0xff }, | |
2886 | { 0x41, 0x42 }, | |
2887 | { 0x46, 0x00 }, | |
2888 | { 0x33, 0x04 }, | |
2889 | { 0x21, 0x19 }, | |
2890 | { 0x3f, 0x10 }, | |
2891 | { 0x2f, 0x80 }, | |
2892 | }; | |
2893 | ||
2894 | /* First 5 bits of custom ID reg are a revision ID on OV518 */ | |
2895 | PDEBUG(D_PROBE, "Device revision %d", | |
2896 | 0x1F & reg_r(sd, R51x_SYS_CUST_ID)); | |
2897 | ||
2898 | rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518)); | |
2899 | if (rc < 0) | |
2900 | return rc; | |
2901 | ||
2902 | /* Set LED GPIO pin to output mode */ | |
2903 | rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02); | |
2904 | if (rc < 0) | |
2905 | return rc; | |
6a7eba24 | 2906 | |
49809d6a HG |
2907 | switch (sd->bridge) { |
2908 | case BRIDGE_OV518: | |
2909 | rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518)); | |
2910 | if (rc < 0) | |
2911 | return rc; | |
2912 | break; | |
2913 | case BRIDGE_OV518PLUS: | |
2914 | rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p)); | |
2915 | if (rc < 0) | |
2916 | return rc; | |
2917 | break; | |
2918 | } | |
2919 | ||
1876bb92 | 2920 | rc = ov51x_upload_quan_tables(sd); |
49809d6a HG |
2921 | if (rc < 0) { |
2922 | PDEBUG(D_ERR, "Error uploading quantization tables"); | |
2923 | return rc; | |
2924 | } | |
2925 | ||
2926 | rc = reg_w(sd, 0x2f, 0x80); | |
2927 | if (rc < 0) | |
2928 | return rc; | |
2929 | ||
2930 | return 0; | |
2931 | } | |
2932 | ||
2933 | static int ov519_configure(struct sd *sd) | |
2934 | { | |
a5ae2062 | 2935 | static const struct ov_regvals init_519[] = { |
6a7eba24 | 2936 | { 0x5a, 0x6d }, /* EnableSystem */ |
6a7eba24 JFM |
2937 | { 0x53, 0x9b }, |
2938 | { 0x54, 0xff }, /* set bit2 to enable jpeg */ | |
2939 | { 0x5d, 0x03 }, | |
2940 | { 0x49, 0x01 }, | |
2941 | { 0x48, 0x00 }, | |
2942 | /* Set LED pin to output mode. Bit 4 must be cleared or sensor | |
2943 | * detection will fail. This deserves further investigation. */ | |
2944 | { OV519_GPIO_IO_CTRL0, 0xee }, | |
2945 | { 0x51, 0x0f }, /* SetUsbInit */ | |
2946 | { 0x51, 0x00 }, | |
2947 | { 0x22, 0x00 }, | |
2948 | /* windows reads 0x55 at this point*/ | |
2949 | }; | |
2950 | ||
49809d6a HG |
2951 | return write_regvals(sd, init_519, ARRAY_SIZE(init_519)); |
2952 | } | |
2953 | ||
b46aaa02 HG |
2954 | static int ovfx2_configure(struct sd *sd) |
2955 | { | |
2956 | static const struct ov_regvals init_fx2[] = { | |
2957 | { 0x00, 0x60 }, | |
2958 | { 0x02, 0x01 }, | |
2959 | { 0x0f, 0x1d }, | |
2960 | { 0xe9, 0x82 }, | |
2961 | { 0xea, 0xc7 }, | |
2962 | { 0xeb, 0x10 }, | |
2963 | { 0xec, 0xf6 }, | |
2964 | }; | |
2965 | ||
2966 | sd->stopped = 1; | |
2967 | ||
2968 | return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2)); | |
2969 | } | |
2970 | ||
49809d6a HG |
2971 | /* this function is called at probe time */ |
2972 | static int sd_config(struct gspca_dev *gspca_dev, | |
2973 | const struct usb_device_id *id) | |
2974 | { | |
2975 | struct sd *sd = (struct sd *) gspca_dev; | |
b46aaa02 | 2976 | struct cam *cam = &gspca_dev->cam; |
49809d6a HG |
2977 | int ret = 0; |
2978 | ||
9e4d8258 HG |
2979 | sd->bridge = id->driver_info & BRIDGE_MASK; |
2980 | sd->invert_led = id->driver_info & BRIDGE_INVERT_LED; | |
49809d6a HG |
2981 | |
2982 | switch (sd->bridge) { | |
1876bb92 HG |
2983 | case BRIDGE_OV511: |
2984 | case BRIDGE_OV511PLUS: | |
2985 | ret = ov511_configure(gspca_dev); | |
2986 | break; | |
49809d6a HG |
2987 | case BRIDGE_OV518: |
2988 | case BRIDGE_OV518PLUS: | |
2989 | ret = ov518_configure(gspca_dev); | |
2990 | break; | |
2991 | case BRIDGE_OV519: | |
2992 | ret = ov519_configure(sd); | |
2993 | break; | |
b46aaa02 HG |
2994 | case BRIDGE_OVFX2: |
2995 | ret = ovfx2_configure(sd); | |
2996 | cam->bulk_size = OVFX2_BULK_SIZE; | |
2997 | cam->bulk_nurbs = MAX_NURBS; | |
2998 | cam->bulk = 1; | |
2999 | break; | |
a511ba94 HG |
3000 | case BRIDGE_W9968CF: |
3001 | ret = w9968cf_configure(sd); | |
3002 | cam->reverse_alts = 1; | |
3003 | break; | |
49809d6a HG |
3004 | } |
3005 | ||
3006 | if (ret) | |
6a7eba24 | 3007 | goto error; |
49809d6a | 3008 | |
6a7eba24 JFM |
3009 | ov51x_led_control(sd, 0); /* turn LED off */ |
3010 | ||
6a7eba24 JFM |
3011 | /* The OV519 must be more aggressive about sensor detection since |
3012 | * I2C write will never fail if the sensor is not present. We have | |
3013 | * to try to initialize the sensor to detect its presence */ | |
229bb7dc HG |
3014 | |
3015 | /* Test for 76xx */ | |
3016 | if (init_ov_sensor(sd, OV7xx0_SID) >= 0) { | |
4202f71c JFM |
3017 | if (ov7xx0_configure(sd) < 0) { |
3018 | PDEBUG(D_ERR, "Failed to configure OV7xx0"); | |
3019 | goto error; | |
3020 | } | |
229bb7dc HG |
3021 | /* Test for 6xx0 */ |
3022 | } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) { | |
3023 | if (ov6xx0_configure(sd) < 0) { | |
3024 | PDEBUG(D_ERR, "Failed to configure OV6xx0"); | |
3025 | goto error; | |
3026 | } | |
3027 | /* Test for 8xx0 */ | |
3028 | } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) { | |
3029 | if (ov8xx0_configure(sd) < 0) { | |
3030 | PDEBUG(D_ERR, "Failed to configure OV8xx0"); | |
6a7eba24 | 3031 | goto error; |
6a7eba24 | 3032 | } |
635118d5 HG |
3033 | /* Test for 3xxx / 2xxx */ |
3034 | } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) { | |
3035 | if (ov_hires_configure(sd) < 0) { | |
3036 | PDEBUG(D_ERR, "Failed to configure high res OV"); | |
3037 | goto error; | |
3038 | } | |
229bb7dc HG |
3039 | } else { |
3040 | PDEBUG(D_ERR, "Can't determine sensor slave IDs"); | |
3041 | goto error; | |
6a7eba24 JFM |
3042 | } |
3043 | ||
49809d6a | 3044 | switch (sd->bridge) { |
1876bb92 HG |
3045 | case BRIDGE_OV511: |
3046 | case BRIDGE_OV511PLUS: | |
3047 | if (!sd->sif) { | |
3048 | cam->cam_mode = ov511_vga_mode; | |
3049 | cam->nmodes = ARRAY_SIZE(ov511_vga_mode); | |
3050 | } else { | |
3051 | cam->cam_mode = ov511_sif_mode; | |
3052 | cam->nmodes = ARRAY_SIZE(ov511_sif_mode); | |
3053 | } | |
3054 | break; | |
49809d6a HG |
3055 | case BRIDGE_OV518: |
3056 | case BRIDGE_OV518PLUS: | |
3057 | if (!sd->sif) { | |
3058 | cam->cam_mode = ov518_vga_mode; | |
3059 | cam->nmodes = ARRAY_SIZE(ov518_vga_mode); | |
3060 | } else { | |
3061 | cam->cam_mode = ov518_sif_mode; | |
3062 | cam->nmodes = ARRAY_SIZE(ov518_sif_mode); | |
3063 | } | |
3064 | break; | |
3065 | case BRIDGE_OV519: | |
3066 | if (!sd->sif) { | |
3067 | cam->cam_mode = ov519_vga_mode; | |
3068 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); | |
3069 | } else { | |
3070 | cam->cam_mode = ov519_sif_mode; | |
3071 | cam->nmodes = ARRAY_SIZE(ov519_sif_mode); | |
3072 | } | |
3073 | break; | |
635118d5 HG |
3074 | case BRIDGE_OVFX2: |
3075 | if (sd->sensor == SEN_OV2610) { | |
3076 | cam->cam_mode = ovfx2_ov2610_mode; | |
3077 | cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode); | |
3078 | } else if (sd->sensor == SEN_OV3610) { | |
3079 | cam->cam_mode = ovfx2_ov3610_mode; | |
3080 | cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode); | |
3081 | } else if (!sd->sif) { | |
3082 | cam->cam_mode = ov519_vga_mode; | |
3083 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); | |
3084 | } else { | |
3085 | cam->cam_mode = ov519_sif_mode; | |
3086 | cam->nmodes = ARRAY_SIZE(ov519_sif_mode); | |
3087 | } | |
3088 | break; | |
a511ba94 HG |
3089 | case BRIDGE_W9968CF: |
3090 | cam->cam_mode = w9968cf_vga_mode; | |
3091 | cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode); | |
79b35902 HG |
3092 | if (sd->sif) |
3093 | cam->nmodes--; | |
a511ba94 HG |
3094 | |
3095 | /* w9968cf needs initialisation once the sensor is known */ | |
3096 | if (w9968cf_init(sd) < 0) | |
3097 | goto error; | |
3098 | break; | |
6a7eba24 | 3099 | } |
594f5b8b | 3100 | sd->brightness = BRIGHTNESS_DEF; |
f5cee95c HG |
3101 | if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF) |
3102 | sd->contrast = 200; /* The default is too low for the ov6630 */ | |
3103 | else | |
3104 | sd->contrast = CONTRAST_DEF; | |
594f5b8b | 3105 | sd->colors = COLOR_DEF; |
0cd6759d JFM |
3106 | sd->hflip = HFLIP_DEF; |
3107 | sd->vflip = VFLIP_DEF; | |
02ab18b0 HG |
3108 | sd->autobrightness = AUTOBRIGHT_DEF; |
3109 | if (sd->sensor == SEN_OV7670) { | |
3110 | sd->freq = OV7670_FREQ_DEF; | |
3111 | gspca_dev->ctrl_dis = 1 << FREQ_IDX; | |
3112 | } else { | |
3113 | sd->freq = FREQ_DEF; | |
3114 | gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) | | |
3115 | (1 << OV7670_FREQ_IDX); | |
3116 | } | |
79b35902 | 3117 | sd->quality = QUALITY_DEF; |
02ab18b0 HG |
3118 | if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670) |
3119 | gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX; | |
3120 | /* OV8610 Frequency filter control should work but needs testing */ | |
3121 | if (sd->sensor == SEN_OV8610) | |
3122 | gspca_dev->ctrl_dis |= 1 << FREQ_IDX; | |
635118d5 HG |
3123 | /* No controls for the OV2610/OV3610 */ |
3124 | if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610) | |
3125 | gspca_dev->ctrl_dis |= 0xFF; | |
02ab18b0 | 3126 | |
6a7eba24 JFM |
3127 | return 0; |
3128 | error: | |
3129 | PDEBUG(D_ERR, "OV519 Config failed"); | |
3130 | return -EBUSY; | |
3131 | } | |
3132 | ||
012d6b02 JFM |
3133 | /* this function is called at probe and resume time */ |
3134 | static int sd_init(struct gspca_dev *gspca_dev) | |
6a7eba24 | 3135 | { |
4202f71c JFM |
3136 | struct sd *sd = (struct sd *) gspca_dev; |
3137 | ||
3138 | /* initialize the sensor */ | |
3139 | switch (sd->sensor) { | |
635118d5 HG |
3140 | case SEN_OV2610: |
3141 | if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610))) | |
3142 | return -EIO; | |
3143 | /* Enable autogain, autoexpo, awb, bandfilter */ | |
3144 | if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0) | |
3145 | return -EIO; | |
3146 | break; | |
3147 | case SEN_OV3610: | |
3148 | if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b))) | |
3149 | return -EIO; | |
3150 | /* Enable autogain, autoexpo, awb, bandfilter */ | |
3151 | if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0) | |
3152 | return -EIO; | |
3153 | break; | |
4202f71c JFM |
3154 | case SEN_OV6620: |
3155 | if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20))) | |
3156 | return -EIO; | |
3157 | break; | |
3158 | case SEN_OV6630: | |
7d971373 | 3159 | case SEN_OV66308AF: |
4202f71c JFM |
3160 | if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30))) |
3161 | return -EIO; | |
3162 | break; | |
3163 | default: | |
3164 | /* case SEN_OV7610: */ | |
3165 | /* case SEN_OV76BE: */ | |
3166 | if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610))) | |
3167 | return -EIO; | |
ae49c404 HG |
3168 | if (i2c_w_mask(sd, 0x0e, 0x00, 0x40)) |
3169 | return -EIO; | |
4202f71c JFM |
3170 | break; |
3171 | case SEN_OV7620: | |
3172 | if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620))) | |
3173 | return -EIO; | |
3174 | break; | |
3175 | case SEN_OV7640: | |
3176 | if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640))) | |
3177 | return -EIO; | |
3178 | break; | |
3179 | case SEN_OV7670: | |
3180 | if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670))) | |
3181 | return -EIO; | |
3182 | break; | |
3183 | case SEN_OV8610: | |
3184 | if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610))) | |
3185 | return -EIO; | |
3186 | break; | |
3187 | } | |
6a7eba24 JFM |
3188 | return 0; |
3189 | } | |
3190 | ||
1876bb92 HG |
3191 | /* Set up the OV511/OV511+ with the given image parameters. |
3192 | * | |
3193 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
3194 | */ | |
3195 | static int ov511_mode_init_regs(struct sd *sd) | |
3196 | { | |
3197 | int hsegs, vsegs, packet_size, fps, needed; | |
3198 | int interlaced = 0; | |
3199 | struct usb_host_interface *alt; | |
3200 | struct usb_interface *intf; | |
3201 | ||
3202 | intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); | |
3203 | alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); | |
3204 | if (!alt) { | |
3205 | PDEBUG(D_ERR, "Couldn't get altsetting"); | |
3206 | return -EIO; | |
3207 | } | |
3208 | ||
3209 | packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); | |
3210 | reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5); | |
3211 | ||
3212 | reg_w(sd, R511_CAM_UV_EN, 0x01); | |
3213 | reg_w(sd, R511_SNAP_UV_EN, 0x01); | |
3214 | reg_w(sd, R511_SNAP_OPTS, 0x03); | |
3215 | ||
3216 | /* Here I'm assuming that snapshot size == image size. | |
3217 | * I hope that's always true. --claudio | |
3218 | */ | |
3219 | hsegs = (sd->gspca_dev.width >> 3) - 1; | |
3220 | vsegs = (sd->gspca_dev.height >> 3) - 1; | |
3221 | ||
3222 | reg_w(sd, R511_CAM_PXCNT, hsegs); | |
3223 | reg_w(sd, R511_CAM_LNCNT, vsegs); | |
3224 | reg_w(sd, R511_CAM_PXDIV, 0x00); | |
3225 | reg_w(sd, R511_CAM_LNDIV, 0x00); | |
3226 | ||
3227 | /* YUV420, low pass filter on */ | |
3228 | reg_w(sd, R511_CAM_OPTS, 0x03); | |
3229 | ||
3230 | /* Snapshot additions */ | |
3231 | reg_w(sd, R511_SNAP_PXCNT, hsegs); | |
3232 | reg_w(sd, R511_SNAP_LNCNT, vsegs); | |
3233 | reg_w(sd, R511_SNAP_PXDIV, 0x00); | |
3234 | reg_w(sd, R511_SNAP_LNDIV, 0x00); | |
3235 | ||
3236 | /******** Set the framerate ********/ | |
3237 | if (frame_rate > 0) | |
3238 | sd->frame_rate = frame_rate; | |
3239 | ||
3240 | switch (sd->sensor) { | |
3241 | case SEN_OV6620: | |
3242 | /* No framerate control, doesn't like higher rates yet */ | |
3243 | sd->clockdiv = 3; | |
3244 | break; | |
3245 | ||
3246 | /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed | |
3247 | for more sensors we need to do this for them too */ | |
3248 | case SEN_OV7620: | |
3249 | case SEN_OV7640: | |
b282d873 | 3250 | case SEN_OV76BE: |
1876bb92 HG |
3251 | if (sd->gspca_dev.width == 320) |
3252 | interlaced = 1; | |
3253 | /* Fall through */ | |
3254 | case SEN_OV6630: | |
1876bb92 HG |
3255 | case SEN_OV7610: |
3256 | case SEN_OV7670: | |
3257 | switch (sd->frame_rate) { | |
3258 | case 30: | |
3259 | case 25: | |
3260 | /* Not enough bandwidth to do 640x480 @ 30 fps */ | |
3261 | if (sd->gspca_dev.width != 640) { | |
3262 | sd->clockdiv = 0; | |
3263 | break; | |
3264 | } | |
3265 | /* Fall through for 640x480 case */ | |
3266 | default: | |
3267 | /* case 20: */ | |
3268 | /* case 15: */ | |
3269 | sd->clockdiv = 1; | |
3270 | break; | |
3271 | case 10: | |
3272 | sd->clockdiv = 2; | |
3273 | break; | |
3274 | case 5: | |
3275 | sd->clockdiv = 5; | |
3276 | break; | |
3277 | } | |
3278 | if (interlaced) { | |
3279 | sd->clockdiv = (sd->clockdiv + 1) * 2 - 1; | |
3280 | /* Higher then 10 does not work */ | |
3281 | if (sd->clockdiv > 10) | |
3282 | sd->clockdiv = 10; | |
3283 | } | |
3284 | break; | |
3285 | ||
3286 | case SEN_OV8610: | |
3287 | /* No framerate control ?? */ | |
3288 | sd->clockdiv = 0; | |
3289 | break; | |
3290 | } | |
3291 | ||
3292 | /* Check if we have enough bandwidth to disable compression */ | |
3293 | fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1; | |
3294 | needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2; | |
3295 | /* 1400 is a conservative estimate of the max nr of isoc packets/sec */ | |
3296 | if (needed > 1400 * packet_size) { | |
3297 | /* Enable Y and UV quantization and compression */ | |
3298 | reg_w(sd, R511_COMP_EN, 0x07); | |
3299 | reg_w(sd, R511_COMP_LUT_EN, 0x03); | |
3300 | } else { | |
3301 | reg_w(sd, R511_COMP_EN, 0x06); | |
3302 | reg_w(sd, R511_COMP_LUT_EN, 0x00); | |
3303 | } | |
3304 | ||
3305 | reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE); | |
3306 | reg_w(sd, R51x_SYS_RESET, 0); | |
3307 | ||
3308 | return 0; | |
3309 | } | |
3310 | ||
49809d6a HG |
3311 | /* Sets up the OV518/OV518+ with the given image parameters |
3312 | * | |
3313 | * OV518 needs a completely different approach, until we can figure out what | |
3314 | * the individual registers do. Also, only 15 FPS is supported now. | |
3315 | * | |
3316 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
3317 | */ | |
3318 | static int ov518_mode_init_regs(struct sd *sd) | |
3319 | { | |
b282d873 HG |
3320 | int hsegs, vsegs, packet_size; |
3321 | struct usb_host_interface *alt; | |
3322 | struct usb_interface *intf; | |
3323 | ||
3324 | intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); | |
3325 | alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); | |
3326 | if (!alt) { | |
3327 | PDEBUG(D_ERR, "Couldn't get altsetting"); | |
3328 | return -EIO; | |
3329 | } | |
3330 | ||
3331 | packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); | |
3332 | ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2); | |
49809d6a HG |
3333 | |
3334 | /******** Set the mode ********/ | |
3335 | ||
3336 | reg_w(sd, 0x2b, 0); | |
3337 | reg_w(sd, 0x2c, 0); | |
3338 | reg_w(sd, 0x2d, 0); | |
3339 | reg_w(sd, 0x2e, 0); | |
3340 | reg_w(sd, 0x3b, 0); | |
3341 | reg_w(sd, 0x3c, 0); | |
3342 | reg_w(sd, 0x3d, 0); | |
3343 | reg_w(sd, 0x3e, 0); | |
3344 | ||
3345 | if (sd->bridge == BRIDGE_OV518) { | |
3346 | /* Set 8-bit (YVYU) input format */ | |
3347 | reg_w_mask(sd, 0x20, 0x08, 0x08); | |
3348 | ||
3349 | /* Set 12-bit (4:2:0) output format */ | |
3350 | reg_w_mask(sd, 0x28, 0x80, 0xf0); | |
3351 | reg_w_mask(sd, 0x38, 0x80, 0xf0); | |
3352 | } else { | |
3353 | reg_w(sd, 0x28, 0x80); | |
3354 | reg_w(sd, 0x38, 0x80); | |
3355 | } | |
3356 | ||
3357 | hsegs = sd->gspca_dev.width / 16; | |
3358 | vsegs = sd->gspca_dev.height / 4; | |
3359 | ||
3360 | reg_w(sd, 0x29, hsegs); | |
3361 | reg_w(sd, 0x2a, vsegs); | |
3362 | ||
3363 | reg_w(sd, 0x39, hsegs); | |
3364 | reg_w(sd, 0x3a, vsegs); | |
3365 | ||
3366 | /* Windows driver does this here; who knows why */ | |
3367 | reg_w(sd, 0x2f, 0x80); | |
3368 | ||
b282d873 HG |
3369 | /******** Set the framerate ********/ |
3370 | sd->clockdiv = 1; | |
49809d6a HG |
3371 | |
3372 | /* Mode independent, but framerate dependent, regs */ | |
b282d873 HG |
3373 | /* 0x51: Clock divider; Only works on some cams which use 2 crystals */ |
3374 | reg_w(sd, 0x51, 0x04); | |
49809d6a HG |
3375 | reg_w(sd, 0x22, 0x18); |
3376 | reg_w(sd, 0x23, 0xff); | |
3377 | ||
b282d873 HG |
3378 | if (sd->bridge == BRIDGE_OV518PLUS) { |
3379 | switch (sd->sensor) { | |
3380 | case SEN_OV7620: | |
3381 | if (sd->gspca_dev.width == 320) { | |
3382 | reg_w(sd, 0x20, 0x00); | |
3383 | reg_w(sd, 0x21, 0x19); | |
3384 | } else { | |
3385 | reg_w(sd, 0x20, 0x60); | |
3386 | reg_w(sd, 0x21, 0x1f); | |
3387 | } | |
3388 | break; | |
3389 | default: | |
3390 | reg_w(sd, 0x21, 0x19); | |
3391 | } | |
3392 | } else | |
49809d6a HG |
3393 | reg_w(sd, 0x71, 0x17); /* Compression-related? */ |
3394 | ||
3395 | /* FIXME: Sensor-specific */ | |
3396 | /* Bit 5 is what matters here. Of course, it is "reserved" */ | |
3397 | i2c_w(sd, 0x54, 0x23); | |
3398 | ||
3399 | reg_w(sd, 0x2f, 0x80); | |
3400 | ||
3401 | if (sd->bridge == BRIDGE_OV518PLUS) { | |
3402 | reg_w(sd, 0x24, 0x94); | |
3403 | reg_w(sd, 0x25, 0x90); | |
3404 | ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ | |
3405 | ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */ | |
3406 | ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */ | |
3407 | ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */ | |
3408 | ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */ | |
3409 | ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */ | |
3410 | ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */ | |
3411 | ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */ | |
3412 | ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */ | |
3413 | } else { | |
3414 | reg_w(sd, 0x24, 0x9f); | |
3415 | reg_w(sd, 0x25, 0x90); | |
3416 | ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ | |
3417 | ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */ | |
3418 | ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */ | |
3419 | ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */ | |
3420 | ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */ | |
3421 | ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */ | |
3422 | ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */ | |
3423 | ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */ | |
3424 | ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */ | |
3425 | } | |
3426 | ||
3427 | reg_w(sd, 0x2f, 0x80); | |
3428 | ||
3429 | return 0; | |
3430 | } | |
3431 | ||
3432 | ||
6a7eba24 JFM |
3433 | /* Sets up the OV519 with the given image parameters |
3434 | * | |
3435 | * OV519 needs a completely different approach, until we can figure out what | |
3436 | * the individual registers do. | |
3437 | * | |
3438 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
3439 | */ | |
594f5b8b | 3440 | static int ov519_mode_init_regs(struct sd *sd) |
6a7eba24 | 3441 | { |
a5ae2062 | 3442 | static const struct ov_regvals mode_init_519_ov7670[] = { |
6a7eba24 JFM |
3443 | { 0x5d, 0x03 }, /* Turn off suspend mode */ |
3444 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
3445 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
3446 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
3447 | { 0xa3, 0x18 }, | |
3448 | { 0xa4, 0x04 }, | |
3449 | { 0xa5, 0x28 }, | |
3450 | { 0x37, 0x00 }, /* SetUsbInit */ | |
3451 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
3452 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
3453 | { 0x20, 0x0c }, | |
3454 | { 0x21, 0x38 }, | |
3455 | { 0x22, 0x1d }, | |
3456 | { 0x17, 0x50 }, /* undocumented */ | |
3457 | { 0x37, 0x00 }, /* undocumented */ | |
3458 | { 0x40, 0xff }, /* I2C timeout counter */ | |
3459 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
3460 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
3461 | { 0xff, 0x00 }, /* undocumented */ | |
3462 | /* windows reads 0x55 at this point, why? */ | |
3463 | }; | |
3464 | ||
a5ae2062 | 3465 | static const struct ov_regvals mode_init_519[] = { |
6a7eba24 JFM |
3466 | { 0x5d, 0x03 }, /* Turn off suspend mode */ |
3467 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
3468 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
3469 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
3470 | { 0xa3, 0x18 }, | |
3471 | { 0xa4, 0x04 }, | |
3472 | { 0xa5, 0x28 }, | |
3473 | { 0x37, 0x00 }, /* SetUsbInit */ | |
3474 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
3475 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
3476 | { 0x22, 0x1d }, | |
3477 | { 0x17, 0x50 }, /* undocumented */ | |
3478 | { 0x37, 0x00 }, /* undocumented */ | |
3479 | { 0x40, 0xff }, /* I2C timeout counter */ | |
3480 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
3481 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
3482 | { 0xff, 0x00 }, /* undocumented */ | |
3483 | /* windows reads 0x55 at this point, why? */ | |
3484 | }; | |
3485 | ||
6a7eba24 JFM |
3486 | /******** Set the mode ********/ |
3487 | if (sd->sensor != SEN_OV7670) { | |
3488 | if (write_regvals(sd, mode_init_519, | |
a5ae2062 | 3489 | ARRAY_SIZE(mode_init_519))) |
6a7eba24 | 3490 | return -EIO; |
594f5b8b JFM |
3491 | if (sd->sensor == SEN_OV7640) { |
3492 | /* Select 8-bit input mode */ | |
ac40b1fa | 3493 | reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10); |
594f5b8b | 3494 | } |
6a7eba24 JFM |
3495 | } else { |
3496 | if (write_regvals(sd, mode_init_519_ov7670, | |
a5ae2062 | 3497 | ARRAY_SIZE(mode_init_519_ov7670))) |
6a7eba24 JFM |
3498 | return -EIO; |
3499 | } | |
3500 | ||
ac40b1fa JFM |
3501 | reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4); |
3502 | reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3); | |
80142efa HG |
3503 | if (sd->sensor == SEN_OV7670 && |
3504 | sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv) | |
3505 | reg_w(sd, OV519_R12_X_OFFSETL, 0x04); | |
3506 | else | |
3507 | reg_w(sd, OV519_R12_X_OFFSETL, 0x00); | |
ac40b1fa JFM |
3508 | reg_w(sd, OV519_R13_X_OFFSETH, 0x00); |
3509 | reg_w(sd, OV519_R14_Y_OFFSETL, 0x00); | |
3510 | reg_w(sd, OV519_R15_Y_OFFSETH, 0x00); | |
3511 | reg_w(sd, OV519_R16_DIVIDER, 0x00); | |
3512 | reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */ | |
6a7eba24 JFM |
3513 | reg_w(sd, 0x26, 0x00); /* Undocumented */ |
3514 | ||
3515 | /******** Set the framerate ********/ | |
3516 | if (frame_rate > 0) | |
3517 | sd->frame_rate = frame_rate; | |
3518 | ||
3519 | /* FIXME: These are only valid at the max resolution. */ | |
3520 | sd->clockdiv = 0; | |
594f5b8b JFM |
3521 | switch (sd->sensor) { |
3522 | case SEN_OV7640: | |
6a7eba24 | 3523 | switch (sd->frame_rate) { |
53e74515 JFM |
3524 | default: |
3525 | /* case 30: */ | |
6a7eba24 JFM |
3526 | reg_w(sd, 0xa4, 0x0c); |
3527 | reg_w(sd, 0x23, 0xff); | |
3528 | break; | |
3529 | case 25: | |
3530 | reg_w(sd, 0xa4, 0x0c); | |
3531 | reg_w(sd, 0x23, 0x1f); | |
3532 | break; | |
3533 | case 20: | |
3534 | reg_w(sd, 0xa4, 0x0c); | |
3535 | reg_w(sd, 0x23, 0x1b); | |
3536 | break; | |
53e74515 | 3537 | case 15: |
6a7eba24 JFM |
3538 | reg_w(sd, 0xa4, 0x04); |
3539 | reg_w(sd, 0x23, 0xff); | |
3540 | sd->clockdiv = 1; | |
3541 | break; | |
3542 | case 10: | |
3543 | reg_w(sd, 0xa4, 0x04); | |
3544 | reg_w(sd, 0x23, 0x1f); | |
3545 | sd->clockdiv = 1; | |
3546 | break; | |
3547 | case 5: | |
3548 | reg_w(sd, 0xa4, 0x04); | |
3549 | reg_w(sd, 0x23, 0x1b); | |
3550 | sd->clockdiv = 1; | |
3551 | break; | |
3552 | } | |
594f5b8b JFM |
3553 | break; |
3554 | case SEN_OV8610: | |
6a7eba24 JFM |
3555 | switch (sd->frame_rate) { |
3556 | default: /* 15 fps */ | |
3557 | /* case 15: */ | |
3558 | reg_w(sd, 0xa4, 0x06); | |
3559 | reg_w(sd, 0x23, 0xff); | |
3560 | break; | |
3561 | case 10: | |
3562 | reg_w(sd, 0xa4, 0x06); | |
3563 | reg_w(sd, 0x23, 0x1f); | |
3564 | break; | |
3565 | case 5: | |
3566 | reg_w(sd, 0xa4, 0x06); | |
3567 | reg_w(sd, 0x23, 0x1b); | |
3568 | break; | |
3569 | } | |
594f5b8b JFM |
3570 | break; |
3571 | case SEN_OV7670: /* guesses, based on 7640 */ | |
6a7eba24 JFM |
3572 | PDEBUG(D_STREAM, "Setting framerate to %d fps", |
3573 | (sd->frame_rate == 0) ? 15 : sd->frame_rate); | |
594f5b8b | 3574 | reg_w(sd, 0xa4, 0x10); |
6a7eba24 JFM |
3575 | switch (sd->frame_rate) { |
3576 | case 30: | |
6a7eba24 JFM |
3577 | reg_w(sd, 0x23, 0xff); |
3578 | break; | |
3579 | case 20: | |
6a7eba24 JFM |
3580 | reg_w(sd, 0x23, 0x1b); |
3581 | break; | |
594f5b8b JFM |
3582 | default: |
3583 | /* case 15: */ | |
6a7eba24 JFM |
3584 | reg_w(sd, 0x23, 0xff); |
3585 | sd->clockdiv = 1; | |
3586 | break; | |
3587 | } | |
594f5b8b | 3588 | break; |
6a7eba24 | 3589 | } |
6a7eba24 JFM |
3590 | return 0; |
3591 | } | |
3592 | ||
594f5b8b | 3593 | static int mode_init_ov_sensor_regs(struct sd *sd) |
6a7eba24 | 3594 | { |
594f5b8b | 3595 | struct gspca_dev *gspca_dev; |
ebbb5c3e HG |
3596 | int qvga, xstart, xend, ystart, yend; |
3597 | __u8 v; | |
594f5b8b JFM |
3598 | |
3599 | gspca_dev = &sd->gspca_dev; | |
124cc9c0 | 3600 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1; |
6a7eba24 JFM |
3601 | |
3602 | /******** Mode (VGA/QVGA) and sensor specific regs ********/ | |
3603 | switch (sd->sensor) { | |
635118d5 HG |
3604 | case SEN_OV2610: |
3605 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
3606 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
3607 | i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); | |
3608 | i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); | |
3609 | i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); | |
3610 | i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); | |
3611 | i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); | |
3612 | return 0; | |
ebbb5c3e | 3613 | case SEN_OV3610: |
635118d5 HG |
3614 | if (qvga) { |
3615 | xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4); | |
b46aaa02 | 3616 | ystart = (776 - gspca_dev->height) / 2; |
635118d5 | 3617 | } else { |
b46aaa02 | 3618 | xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4); |
635118d5 HG |
3619 | ystart = (1544 - gspca_dev->height) / 2; |
3620 | } | |
3621 | xend = xstart + gspca_dev->width; | |
3622 | yend = ystart + gspca_dev->height; | |
3623 | /* Writing to the COMH register resets the other windowing regs | |
3624 | to their default values, so we must do this first. */ | |
3625 | i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0); | |
3626 | i2c_w_mask(sd, 0x32, | |
3627 | (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7), | |
3628 | 0x3f); | |
3629 | i2c_w_mask(sd, 0x03, | |
3630 | (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3), | |
3631 | 0x0f); | |
3632 | i2c_w(sd, 0x17, xstart >> 4); | |
3633 | i2c_w(sd, 0x18, xend >> 4); | |
3634 | i2c_w(sd, 0x19, ystart >> 3); | |
3635 | i2c_w(sd, 0x1a, yend >> 3); | |
3636 | return 0; | |
6a7eba24 JFM |
3637 | case SEN_OV8610: |
3638 | /* For OV8610 qvga means qsvga */ | |
3639 | i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5); | |
ebbb5c3e HG |
3640 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ |
3641 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
3642 | i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */ | |
3643 | i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */ | |
6a7eba24 JFM |
3644 | break; |
3645 | case SEN_OV7610: | |
3646 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
ebbb5c3e HG |
3647 | i2c_w(sd, 0x35, qvga?0x1e:0x9e); |
3648 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ | |
3649 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
6a7eba24 JFM |
3650 | break; |
3651 | case SEN_OV7620: | |
b282d873 | 3652 | case SEN_OV76BE: |
6a7eba24 JFM |
3653 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
3654 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
3655 | i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); | |
3656 | i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); | |
3657 | i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); | |
b282d873 | 3658 | i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0); |
6a7eba24 | 3659 | i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); |
ebbb5c3e HG |
3660 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ |
3661 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
3662 | if (sd->sensor == SEN_OV76BE) | |
3663 | i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e); | |
6a7eba24 | 3664 | break; |
6a7eba24 | 3665 | case SEN_OV7640: |
6a7eba24 JFM |
3666 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
3667 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
3668 | /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */ | |
3669 | /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */ | |
3670 | /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */ | |
3671 | /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */ | |
3672 | /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */ | |
ebbb5c3e | 3673 | i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */ |
6a7eba24 JFM |
3674 | break; |
3675 | case SEN_OV7670: | |
3676 | /* set COM7_FMT_VGA or COM7_FMT_QVGA | |
3677 | * do we need to set anything else? | |
3678 | * HSTART etc are set in set_ov_sensor_window itself */ | |
3679 | i2c_w_mask(sd, OV7670_REG_COM7, | |
3680 | qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA, | |
3681 | OV7670_COM7_FMT_MASK); | |
ebbb5c3e HG |
3682 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ |
3683 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB, | |
3684 | OV7670_COM8_AWB); | |
3685 | if (qvga) { /* QVGA from ov7670.c by | |
3686 | * Jonathan Corbet */ | |
3687 | xstart = 164; | |
3688 | xend = 28; | |
3689 | ystart = 14; | |
3690 | yend = 494; | |
3691 | } else { /* VGA */ | |
3692 | xstart = 158; | |
3693 | xend = 14; | |
3694 | ystart = 10; | |
3695 | yend = 490; | |
3696 | } | |
3697 | /* OV7670 hardware window registers are split across | |
3698 | * multiple locations */ | |
3699 | i2c_w(sd, OV7670_REG_HSTART, xstart >> 3); | |
3700 | i2c_w(sd, OV7670_REG_HSTOP, xend >> 3); | |
3701 | v = i2c_r(sd, OV7670_REG_HREF); | |
3702 | v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07); | |
3703 | msleep(10); /* need to sleep between read and write to | |
3704 | * same reg! */ | |
3705 | i2c_w(sd, OV7670_REG_HREF, v); | |
3706 | ||
3707 | i2c_w(sd, OV7670_REG_VSTART, ystart >> 2); | |
3708 | i2c_w(sd, OV7670_REG_VSTOP, yend >> 2); | |
3709 | v = i2c_r(sd, OV7670_REG_VREF); | |
3710 | v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03); | |
3711 | msleep(10); /* need to sleep between read and write to | |
3712 | * same reg! */ | |
3713 | i2c_w(sd, OV7670_REG_VREF, v); | |
6a7eba24 JFM |
3714 | break; |
3715 | case SEN_OV6620: | |
ebbb5c3e HG |
3716 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
3717 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ | |
3718 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
3719 | break; | |
6a7eba24 | 3720 | case SEN_OV6630: |
7d971373 | 3721 | case SEN_OV66308AF: |
6a7eba24 | 3722 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
ebbb5c3e | 3723 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ |
6a7eba24 JFM |
3724 | break; |
3725 | default: | |
3726 | return -EINVAL; | |
3727 | } | |
3728 | ||
6a7eba24 | 3729 | /******** Clock programming ********/ |
ae49c404 | 3730 | i2c_w(sd, 0x11, sd->clockdiv); |
6a7eba24 | 3731 | |
6a7eba24 JFM |
3732 | return 0; |
3733 | } | |
3734 | ||
594f5b8b | 3735 | static void sethvflip(struct sd *sd) |
0cd6759d | 3736 | { |
594f5b8b JFM |
3737 | if (sd->sensor != SEN_OV7670) |
3738 | return; | |
0cd6759d JFM |
3739 | if (sd->gspca_dev.streaming) |
3740 | ov51x_stop(sd); | |
3741 | i2c_w_mask(sd, OV7670_REG_MVFP, | |
594f5b8b JFM |
3742 | OV7670_MVFP_MIRROR * sd->hflip |
3743 | | OV7670_MVFP_VFLIP * sd->vflip, | |
3744 | OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP); | |
0cd6759d JFM |
3745 | if (sd->gspca_dev.streaming) |
3746 | ov51x_restart(sd); | |
3747 | } | |
3748 | ||
594f5b8b | 3749 | static int set_ov_sensor_window(struct sd *sd) |
6a7eba24 | 3750 | { |
594f5b8b | 3751 | struct gspca_dev *gspca_dev; |
124cc9c0 | 3752 | int qvga, crop; |
6a7eba24 | 3753 | int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale; |
ebbb5c3e | 3754 | int ret; |
6a7eba24 | 3755 | |
635118d5 | 3756 | /* mode setup is fully handled in mode_init_ov_sensor_regs for these */ |
ebbb5c3e HG |
3757 | if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 || |
3758 | sd->sensor == SEN_OV7670) | |
635118d5 HG |
3759 | return mode_init_ov_sensor_regs(sd); |
3760 | ||
594f5b8b | 3761 | gspca_dev = &sd->gspca_dev; |
124cc9c0 HG |
3762 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1; |
3763 | crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2; | |
594f5b8b | 3764 | |
6a7eba24 JFM |
3765 | /* The different sensor ICs handle setting up of window differently. |
3766 | * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */ | |
3767 | switch (sd->sensor) { | |
3768 | case SEN_OV8610: | |
3769 | hwsbase = 0x1e; | |
3770 | hwebase = 0x1e; | |
3771 | vwsbase = 0x02; | |
3772 | vwebase = 0x02; | |
3773 | break; | |
3774 | case SEN_OV7610: | |
3775 | case SEN_OV76BE: | |
3776 | hwsbase = 0x38; | |
3777 | hwebase = 0x3a; | |
3778 | vwsbase = vwebase = 0x05; | |
3779 | break; | |
3780 | case SEN_OV6620: | |
3781 | case SEN_OV6630: | |
7d971373 | 3782 | case SEN_OV66308AF: |
6a7eba24 JFM |
3783 | hwsbase = 0x38; |
3784 | hwebase = 0x3a; | |
3785 | vwsbase = 0x05; | |
3786 | vwebase = 0x06; | |
7d971373 | 3787 | if (sd->sensor == SEN_OV66308AF && qvga) |
49809d6a | 3788 | /* HDG: this fixes U and V getting swapped */ |
7d971373 | 3789 | hwsbase++; |
124cc9c0 HG |
3790 | if (crop) { |
3791 | hwsbase += 8; | |
3792 | hwebase += 8; | |
3793 | vwsbase += 11; | |
3794 | vwebase += 11; | |
3795 | } | |
6a7eba24 JFM |
3796 | break; |
3797 | case SEN_OV7620: | |
3798 | hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */ | |
3799 | hwebase = 0x2f; | |
3800 | vwsbase = vwebase = 0x05; | |
3801 | break; | |
3802 | case SEN_OV7640: | |
3803 | hwsbase = 0x1a; | |
3804 | hwebase = 0x1a; | |
3805 | vwsbase = vwebase = 0x03; | |
3806 | break; | |
6a7eba24 JFM |
3807 | default: |
3808 | return -EINVAL; | |
3809 | } | |
3810 | ||
3811 | switch (sd->sensor) { | |
3812 | case SEN_OV6620: | |
3813 | case SEN_OV6630: | |
7d971373 | 3814 | case SEN_OV66308AF: |
594f5b8b | 3815 | if (qvga) { /* QCIF */ |
6a7eba24 JFM |
3816 | hwscale = 0; |
3817 | vwscale = 0; | |
3818 | } else { /* CIF */ | |
3819 | hwscale = 1; | |
3820 | vwscale = 1; /* The datasheet says 0; | |
3821 | * it's wrong */ | |
3822 | } | |
3823 | break; | |
3824 | case SEN_OV8610: | |
594f5b8b | 3825 | if (qvga) { /* QSVGA */ |
6a7eba24 JFM |
3826 | hwscale = 1; |
3827 | vwscale = 1; | |
3828 | } else { /* SVGA */ | |
3829 | hwscale = 2; | |
3830 | vwscale = 2; | |
3831 | } | |
3832 | break; | |
3833 | default: /* SEN_OV7xx0 */ | |
594f5b8b | 3834 | if (qvga) { /* QVGA */ |
6a7eba24 JFM |
3835 | hwscale = 1; |
3836 | vwscale = 0; | |
3837 | } else { /* VGA */ | |
3838 | hwscale = 2; | |
3839 | vwscale = 1; | |
3840 | } | |
3841 | } | |
3842 | ||
594f5b8b | 3843 | ret = mode_init_ov_sensor_regs(sd); |
6a7eba24 JFM |
3844 | if (ret < 0) |
3845 | return ret; | |
3846 | ||
ebbb5c3e | 3847 | i2c_w(sd, 0x17, hwsbase); |
a511ba94 | 3848 | i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale)); |
ebbb5c3e | 3849 | i2c_w(sd, 0x19, vwsbase); |
a511ba94 | 3850 | i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale)); |
6a7eba24 | 3851 | |
6a7eba24 JFM |
3852 | return 0; |
3853 | } | |
3854 | ||
6a7eba24 | 3855 | /* -- start the camera -- */ |
72ab97ce | 3856 | static int sd_start(struct gspca_dev *gspca_dev) |
6a7eba24 JFM |
3857 | { |
3858 | struct sd *sd = (struct sd *) gspca_dev; | |
49809d6a | 3859 | int ret = 0; |
6a7eba24 | 3860 | |
a511ba94 HG |
3861 | /* Default for most bridges, allow bridge_mode_init_regs to override */ |
3862 | sd->sensor_width = sd->gspca_dev.width; | |
3863 | sd->sensor_height = sd->gspca_dev.height; | |
3864 | ||
49809d6a | 3865 | switch (sd->bridge) { |
1876bb92 HG |
3866 | case BRIDGE_OV511: |
3867 | case BRIDGE_OV511PLUS: | |
3868 | ret = ov511_mode_init_regs(sd); | |
3869 | break; | |
49809d6a HG |
3870 | case BRIDGE_OV518: |
3871 | case BRIDGE_OV518PLUS: | |
3872 | ret = ov518_mode_init_regs(sd); | |
3873 | break; | |
3874 | case BRIDGE_OV519: | |
3875 | ret = ov519_mode_init_regs(sd); | |
3876 | break; | |
b46aaa02 | 3877 | /* case BRIDGE_OVFX2: nothing to do */ |
a511ba94 HG |
3878 | case BRIDGE_W9968CF: |
3879 | ret = w9968cf_mode_init_regs(sd); | |
3880 | break; | |
49809d6a | 3881 | } |
6a7eba24 JFM |
3882 | if (ret < 0) |
3883 | goto out; | |
49809d6a | 3884 | |
594f5b8b | 3885 | ret = set_ov_sensor_window(sd); |
6a7eba24 JFM |
3886 | if (ret < 0) |
3887 | goto out; | |
3888 | ||
49809d6a HG |
3889 | setcontrast(gspca_dev); |
3890 | setbrightness(gspca_dev); | |
3891 | setcolors(gspca_dev); | |
02ab18b0 HG |
3892 | sethvflip(sd); |
3893 | setautobrightness(sd); | |
3894 | setfreq(sd); | |
49809d6a | 3895 | |
594f5b8b | 3896 | ret = ov51x_restart(sd); |
6a7eba24 JFM |
3897 | if (ret < 0) |
3898 | goto out; | |
6a7eba24 | 3899 | ov51x_led_control(sd, 1); |
72ab97ce | 3900 | return 0; |
6a7eba24 JFM |
3901 | out: |
3902 | PDEBUG(D_ERR, "camera start error:%d", ret); | |
72ab97ce | 3903 | return ret; |
6a7eba24 JFM |
3904 | } |
3905 | ||
3906 | static void sd_stopN(struct gspca_dev *gspca_dev) | |
3907 | { | |
ac40b1fa JFM |
3908 | struct sd *sd = (struct sd *) gspca_dev; |
3909 | ||
3910 | ov51x_stop(sd); | |
3911 | ov51x_led_control(sd, 0); | |
6a7eba24 JFM |
3912 | } |
3913 | ||
79b35902 HG |
3914 | static void sd_stop0(struct gspca_dev *gspca_dev) |
3915 | { | |
3916 | struct sd *sd = (struct sd *) gspca_dev; | |
3917 | ||
3918 | if (sd->bridge == BRIDGE_W9968CF) | |
3919 | w9968cf_stop0(sd); | |
3920 | } | |
3921 | ||
1876bb92 | 3922 | static void ov511_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b JFM |
3923 | u8 *in, /* isoc packet */ |
3924 | int len) /* iso packet length */ | |
1876bb92 HG |
3925 | { |
3926 | struct sd *sd = (struct sd *) gspca_dev; | |
3927 | ||
3928 | /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th | |
3929 | * byte non-zero. The EOF packet has image width/height in the | |
3930 | * 10th and 11th bytes. The 9th byte is given as follows: | |
3931 | * | |
3932 | * bit 7: EOF | |
3933 | * 6: compression enabled | |
3934 | * 5: 422/420/400 modes | |
3935 | * 4: 422/420/400 modes | |
3936 | * 3: 1 | |
3937 | * 2: snapshot button on | |
3938 | * 1: snapshot frame | |
3939 | * 0: even/odd field | |
3940 | */ | |
3941 | if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) && | |
3942 | (in[8] & 0x08)) { | |
3943 | if (in[8] & 0x80) { | |
3944 | /* Frame end */ | |
3945 | if ((in[9] + 1) * 8 != gspca_dev->width || | |
3946 | (in[10] + 1) * 8 != gspca_dev->height) { | |
3947 | PDEBUG(D_ERR, "Invalid frame size, got: %dx%d," | |
3948 | " requested: %dx%d\n", | |
3949 | (in[9] + 1) * 8, (in[10] + 1) * 8, | |
3950 | gspca_dev->width, gspca_dev->height); | |
3951 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
3952 | return; | |
3953 | } | |
3954 | /* Add 11 byte footer to frame, might be usefull */ | |
76dd272b | 3955 | gspca_frame_add(gspca_dev, LAST_PACKET, in, 11); |
1876bb92 HG |
3956 | return; |
3957 | } else { | |
3958 | /* Frame start */ | |
76dd272b | 3959 | gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0); |
1876bb92 HG |
3960 | sd->packet_nr = 0; |
3961 | } | |
3962 | } | |
3963 | ||
3964 | /* Ignore the packet number */ | |
3965 | len--; | |
3966 | ||
3967 | /* intermediate packet */ | |
76dd272b | 3968 | gspca_frame_add(gspca_dev, INTER_PACKET, in, len); |
1876bb92 HG |
3969 | } |
3970 | ||
49809d6a | 3971 | static void ov518_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b | 3972 | u8 *data, /* isoc packet */ |
49809d6a HG |
3973 | int len) /* iso packet length */ |
3974 | { | |
92918a53 | 3975 | struct sd *sd = (struct sd *) gspca_dev; |
49809d6a HG |
3976 | |
3977 | /* A false positive here is likely, until OVT gives me | |
3978 | * the definitive SOF/EOF format */ | |
3979 | if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { | |
76dd272b JFM |
3980 | gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); |
3981 | gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); | |
92918a53 HG |
3982 | sd->packet_nr = 0; |
3983 | } | |
3984 | ||
3985 | if (gspca_dev->last_packet_type == DISCARD_PACKET) | |
3986 | return; | |
3987 | ||
3988 | /* Does this device use packet numbers ? */ | |
3989 | if (len & 7) { | |
3990 | len--; | |
3991 | if (sd->packet_nr == data[len]) | |
3992 | sd->packet_nr++; | |
3993 | /* The last few packets of the frame (which are all 0's | |
3994 | except that they may contain part of the footer), are | |
3995 | numbered 0 */ | |
3996 | else if (sd->packet_nr == 0 || data[len]) { | |
3997 | PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)", | |
3998 | (int)data[len], (int)sd->packet_nr); | |
3999 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
4000 | return; | |
4001 | } | |
49809d6a HG |
4002 | } |
4003 | ||
4004 | /* intermediate packet */ | |
76dd272b | 4005 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); |
49809d6a HG |
4006 | } |
4007 | ||
4008 | static void ov519_pkt_scan(struct gspca_dev *gspca_dev, | |
76dd272b | 4009 | u8 *data, /* isoc packet */ |
6a7eba24 JFM |
4010 | int len) /* iso packet length */ |
4011 | { | |
4012 | /* Header of ov519 is 16 bytes: | |
4013 | * Byte Value Description | |
4014 | * 0 0xff magic | |
4015 | * 1 0xff magic | |
4016 | * 2 0xff magic | |
4017 | * 3 0xXX 0x50 = SOF, 0x51 = EOF | |
4018 | * 9 0xXX 0x01 initial frame without data, | |
4019 | * 0x00 standard frame with image | |
4020 | * 14 Lo in EOF: length of image data / 8 | |
4021 | * 15 Hi | |
4022 | */ | |
4023 | ||
4024 | if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) { | |
4025 | switch (data[3]) { | |
4026 | case 0x50: /* start of frame */ | |
4027 | #define HDRSZ 16 | |
4028 | data += HDRSZ; | |
4029 | len -= HDRSZ; | |
4030 | #undef HDRSZ | |
4031 | if (data[0] == 0xff || data[1] == 0xd8) | |
76dd272b | 4032 | gspca_frame_add(gspca_dev, FIRST_PACKET, |
6a7eba24 JFM |
4033 | data, len); |
4034 | else | |
4035 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
4036 | return; | |
4037 | case 0x51: /* end of frame */ | |
4038 | if (data[9] != 0) | |
4039 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
76dd272b JFM |
4040 | gspca_frame_add(gspca_dev, LAST_PACKET, |
4041 | NULL, 0); | |
6a7eba24 JFM |
4042 | return; |
4043 | } | |
4044 | } | |
4045 | ||
4046 | /* intermediate packet */ | |
76dd272b | 4047 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); |
6a7eba24 JFM |
4048 | } |
4049 | ||
b46aaa02 | 4050 | static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b | 4051 | u8 *data, /* isoc packet */ |
b46aaa02 HG |
4052 | int len) /* iso packet length */ |
4053 | { | |
4054 | /* A short read signals EOF */ | |
4055 | if (len < OVFX2_BULK_SIZE) { | |
76dd272b JFM |
4056 | gspca_frame_add(gspca_dev, LAST_PACKET, data, len); |
4057 | gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); | |
b46aaa02 HG |
4058 | return; |
4059 | } | |
76dd272b | 4060 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); |
b46aaa02 HG |
4061 | } |
4062 | ||
49809d6a | 4063 | static void sd_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b | 4064 | u8 *data, /* isoc packet */ |
49809d6a HG |
4065 | int len) /* iso packet length */ |
4066 | { | |
4067 | struct sd *sd = (struct sd *) gspca_dev; | |
4068 | ||
4069 | switch (sd->bridge) { | |
4070 | case BRIDGE_OV511: | |
4071 | case BRIDGE_OV511PLUS: | |
76dd272b | 4072 | ov511_pkt_scan(gspca_dev, data, len); |
49809d6a HG |
4073 | break; |
4074 | case BRIDGE_OV518: | |
4075 | case BRIDGE_OV518PLUS: | |
76dd272b | 4076 | ov518_pkt_scan(gspca_dev, data, len); |
49809d6a HG |
4077 | break; |
4078 | case BRIDGE_OV519: | |
76dd272b | 4079 | ov519_pkt_scan(gspca_dev, data, len); |
49809d6a | 4080 | break; |
b46aaa02 | 4081 | case BRIDGE_OVFX2: |
76dd272b | 4082 | ovfx2_pkt_scan(gspca_dev, data, len); |
b46aaa02 | 4083 | break; |
a511ba94 | 4084 | case BRIDGE_W9968CF: |
76dd272b | 4085 | w9968cf_pkt_scan(gspca_dev, data, len); |
a511ba94 | 4086 | break; |
49809d6a HG |
4087 | } |
4088 | } | |
4089 | ||
6a7eba24 JFM |
4090 | /* -- management routines -- */ |
4091 | ||
4092 | static void setbrightness(struct gspca_dev *gspca_dev) | |
4093 | { | |
4094 | struct sd *sd = (struct sd *) gspca_dev; | |
4095 | int val; | |
6a7eba24 JFM |
4096 | |
4097 | val = sd->brightness; | |
6a7eba24 JFM |
4098 | switch (sd->sensor) { |
4099 | case SEN_OV8610: | |
4100 | case SEN_OV7610: | |
4101 | case SEN_OV76BE: | |
4102 | case SEN_OV6620: | |
4103 | case SEN_OV6630: | |
7d971373 | 4104 | case SEN_OV66308AF: |
6a7eba24 JFM |
4105 | case SEN_OV7640: |
4106 | i2c_w(sd, OV7610_REG_BRT, val); | |
4107 | break; | |
4108 | case SEN_OV7620: | |
4109 | /* 7620 doesn't like manual changes when in auto mode */ | |
02ab18b0 | 4110 | if (!sd->autobrightness) |
6a7eba24 JFM |
4111 | i2c_w(sd, OV7610_REG_BRT, val); |
4112 | break; | |
4113 | case SEN_OV7670: | |
594f5b8b | 4114 | /*win trace |
6a7eba24 JFM |
4115 | * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */ |
4116 | i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val)); | |
4117 | break; | |
4118 | } | |
6a7eba24 JFM |
4119 | } |
4120 | ||
4121 | static void setcontrast(struct gspca_dev *gspca_dev) | |
4122 | { | |
4123 | struct sd *sd = (struct sd *) gspca_dev; | |
4124 | int val; | |
6a7eba24 JFM |
4125 | |
4126 | val = sd->contrast; | |
6a7eba24 JFM |
4127 | switch (sd->sensor) { |
4128 | case SEN_OV7610: | |
4129 | case SEN_OV6620: | |
4130 | i2c_w(sd, OV7610_REG_CNT, val); | |
4131 | break; | |
4132 | case SEN_OV6630: | |
7d971373 | 4133 | case SEN_OV66308AF: |
6a7eba24 | 4134 | i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f); |
49809d6a | 4135 | break; |
6a7eba24 | 4136 | case SEN_OV8610: { |
a5ae2062 | 4137 | static const __u8 ctab[] = { |
6a7eba24 JFM |
4138 | 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f |
4139 | }; | |
4140 | ||
4141 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
4142 | i2c_w(sd, 0x64, ctab[val >> 5]); | |
4143 | break; | |
4144 | } | |
4145 | case SEN_OV7620: { | |
a5ae2062 | 4146 | static const __u8 ctab[] = { |
6a7eba24 JFM |
4147 | 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57, |
4148 | 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff | |
4149 | }; | |
4150 | ||
4151 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
4152 | i2c_w(sd, 0x64, ctab[val >> 4]); | |
4153 | break; | |
4154 | } | |
4155 | case SEN_OV7640: | |
4156 | /* Use gain control instead. */ | |
4157 | i2c_w(sd, OV7610_REG_GAIN, val >> 2); | |
4158 | break; | |
4159 | case SEN_OV7670: | |
4160 | /* check that this isn't just the same as ov7610 */ | |
4161 | i2c_w(sd, OV7670_REG_CONTRAS, val >> 1); | |
4162 | break; | |
4163 | } | |
6a7eba24 JFM |
4164 | } |
4165 | ||
4166 | static void setcolors(struct gspca_dev *gspca_dev) | |
4167 | { | |
4168 | struct sd *sd = (struct sd *) gspca_dev; | |
4169 | int val; | |
6a7eba24 JFM |
4170 | |
4171 | val = sd->colors; | |
6a7eba24 JFM |
4172 | switch (sd->sensor) { |
4173 | case SEN_OV8610: | |
4174 | case SEN_OV7610: | |
4175 | case SEN_OV76BE: | |
4176 | case SEN_OV6620: | |
4177 | case SEN_OV6630: | |
7d971373 | 4178 | case SEN_OV66308AF: |
6a7eba24 JFM |
4179 | i2c_w(sd, OV7610_REG_SAT, val); |
4180 | break; | |
4181 | case SEN_OV7620: | |
4182 | /* Use UV gamma control instead. Bits 0 & 7 are reserved. */ | |
4183 | /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e); | |
4184 | if (rc < 0) | |
4185 | goto out; */ | |
4186 | i2c_w(sd, OV7610_REG_SAT, val); | |
4187 | break; | |
4188 | case SEN_OV7640: | |
4189 | i2c_w(sd, OV7610_REG_SAT, val & 0xf0); | |
4190 | break; | |
4191 | case SEN_OV7670: | |
4192 | /* supported later once I work out how to do it | |
4193 | * transparently fail now! */ | |
4194 | /* set REG_COM13 values for UV sat auto mode */ | |
4195 | break; | |
4196 | } | |
6a7eba24 JFM |
4197 | } |
4198 | ||
02ab18b0 HG |
4199 | static void setautobrightness(struct sd *sd) |
4200 | { | |
635118d5 HG |
4201 | if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670 || |
4202 | sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610) | |
02ab18b0 HG |
4203 | return; |
4204 | ||
4205 | i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10); | |
4206 | } | |
4207 | ||
4208 | static void setfreq(struct sd *sd) | |
4209 | { | |
635118d5 HG |
4210 | if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610) |
4211 | return; | |
4212 | ||
02ab18b0 HG |
4213 | if (sd->sensor == SEN_OV7670) { |
4214 | switch (sd->freq) { | |
4215 | case 0: /* Banding filter disabled */ | |
4216 | i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT); | |
4217 | break; | |
4218 | case 1: /* 50 hz */ | |
4219 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
4220 | OV7670_COM8_BFILT); | |
4221 | i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18); | |
4222 | break; | |
4223 | case 2: /* 60 hz */ | |
4224 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
4225 | OV7670_COM8_BFILT); | |
4226 | i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18); | |
4227 | break; | |
4228 | case 3: /* Auto hz */ | |
4229 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
4230 | OV7670_COM8_BFILT); | |
4231 | i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO, | |
4232 | 0x18); | |
4233 | break; | |
4234 | } | |
4235 | } else { | |
4236 | switch (sd->freq) { | |
4237 | case 0: /* Banding filter disabled */ | |
4238 | i2c_w_mask(sd, 0x2d, 0x00, 0x04); | |
4239 | i2c_w_mask(sd, 0x2a, 0x00, 0x80); | |
4240 | break; | |
4241 | case 1: /* 50 hz (filter on and framerate adj) */ | |
4242 | i2c_w_mask(sd, 0x2d, 0x04, 0x04); | |
4243 | i2c_w_mask(sd, 0x2a, 0x80, 0x80); | |
4244 | /* 20 fps -> 16.667 fps */ | |
4245 | if (sd->sensor == SEN_OV6620 || | |
7d971373 HG |
4246 | sd->sensor == SEN_OV6630 || |
4247 | sd->sensor == SEN_OV66308AF) | |
02ab18b0 HG |
4248 | i2c_w(sd, 0x2b, 0x5e); |
4249 | else | |
4250 | i2c_w(sd, 0x2b, 0xac); | |
4251 | break; | |
4252 | case 2: /* 60 hz (filter on, ...) */ | |
4253 | i2c_w_mask(sd, 0x2d, 0x04, 0x04); | |
4254 | if (sd->sensor == SEN_OV6620 || | |
7d971373 HG |
4255 | sd->sensor == SEN_OV6630 || |
4256 | sd->sensor == SEN_OV66308AF) { | |
02ab18b0 HG |
4257 | /* 20 fps -> 15 fps */ |
4258 | i2c_w_mask(sd, 0x2a, 0x80, 0x80); | |
4259 | i2c_w(sd, 0x2b, 0xa8); | |
4260 | } else { | |
4261 | /* no framerate adj. */ | |
4262 | i2c_w_mask(sd, 0x2a, 0x00, 0x80); | |
4263 | } | |
4264 | break; | |
4265 | } | |
4266 | } | |
4267 | } | |
4268 | ||
6a7eba24 JFM |
4269 | static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val) |
4270 | { | |
4271 | struct sd *sd = (struct sd *) gspca_dev; | |
4272 | ||
4273 | sd->brightness = val; | |
ac40b1fa JFM |
4274 | if (gspca_dev->streaming) |
4275 | setbrightness(gspca_dev); | |
6a7eba24 JFM |
4276 | return 0; |
4277 | } | |
4278 | ||
4279 | static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val) | |
4280 | { | |
4281 | struct sd *sd = (struct sd *) gspca_dev; | |
4282 | ||
4283 | *val = sd->brightness; | |
4284 | return 0; | |
4285 | } | |
4286 | ||
4287 | static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val) | |
4288 | { | |
4289 | struct sd *sd = (struct sd *) gspca_dev; | |
4290 | ||
4291 | sd->contrast = val; | |
ac40b1fa JFM |
4292 | if (gspca_dev->streaming) |
4293 | setcontrast(gspca_dev); | |
6a7eba24 JFM |
4294 | return 0; |
4295 | } | |
4296 | ||
4297 | static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val) | |
4298 | { | |
4299 | struct sd *sd = (struct sd *) gspca_dev; | |
4300 | ||
4301 | *val = sd->contrast; | |
4302 | return 0; | |
4303 | } | |
4304 | ||
4305 | static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val) | |
4306 | { | |
4307 | struct sd *sd = (struct sd *) gspca_dev; | |
4308 | ||
4309 | sd->colors = val; | |
ac40b1fa JFM |
4310 | if (gspca_dev->streaming) |
4311 | setcolors(gspca_dev); | |
6a7eba24 JFM |
4312 | return 0; |
4313 | } | |
4314 | ||
4315 | static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val) | |
4316 | { | |
4317 | struct sd *sd = (struct sd *) gspca_dev; | |
4318 | ||
4319 | *val = sd->colors; | |
4320 | return 0; | |
4321 | } | |
4322 | ||
0cd6759d JFM |
4323 | static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val) |
4324 | { | |
4325 | struct sd *sd = (struct sd *) gspca_dev; | |
4326 | ||
4327 | sd->hflip = val; | |
ac40b1fa JFM |
4328 | if (gspca_dev->streaming) |
4329 | sethvflip(sd); | |
0cd6759d JFM |
4330 | return 0; |
4331 | } | |
4332 | ||
4333 | static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val) | |
4334 | { | |
4335 | struct sd *sd = (struct sd *) gspca_dev; | |
4336 | ||
4337 | *val = sd->hflip; | |
4338 | return 0; | |
4339 | } | |
4340 | ||
4341 | static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val) | |
4342 | { | |
4343 | struct sd *sd = (struct sd *) gspca_dev; | |
4344 | ||
4345 | sd->vflip = val; | |
ac40b1fa JFM |
4346 | if (gspca_dev->streaming) |
4347 | sethvflip(sd); | |
0cd6759d JFM |
4348 | return 0; |
4349 | } | |
4350 | ||
4351 | static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val) | |
4352 | { | |
4353 | struct sd *sd = (struct sd *) gspca_dev; | |
4354 | ||
4355 | *val = sd->vflip; | |
4356 | return 0; | |
4357 | } | |
4358 | ||
02ab18b0 HG |
4359 | static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val) |
4360 | { | |
4361 | struct sd *sd = (struct sd *) gspca_dev; | |
4362 | ||
4363 | sd->autobrightness = val; | |
4364 | if (gspca_dev->streaming) | |
4365 | setautobrightness(sd); | |
4366 | return 0; | |
4367 | } | |
4368 | ||
4369 | static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val) | |
4370 | { | |
4371 | struct sd *sd = (struct sd *) gspca_dev; | |
4372 | ||
4373 | *val = sd->autobrightness; | |
4374 | return 0; | |
4375 | } | |
4376 | ||
4377 | static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val) | |
4378 | { | |
4379 | struct sd *sd = (struct sd *) gspca_dev; | |
4380 | ||
4381 | sd->freq = val; | |
a511ba94 | 4382 | if (gspca_dev->streaming) { |
02ab18b0 | 4383 | setfreq(sd); |
a511ba94 HG |
4384 | /* Ugly but necessary */ |
4385 | if (sd->bridge == BRIDGE_W9968CF) | |
4386 | w9968cf_set_crop_window(sd); | |
4387 | } | |
02ab18b0 HG |
4388 | return 0; |
4389 | } | |
4390 | ||
4391 | static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val) | |
4392 | { | |
4393 | struct sd *sd = (struct sd *) gspca_dev; | |
4394 | ||
4395 | *val = sd->freq; | |
4396 | return 0; | |
4397 | } | |
4398 | ||
4399 | static int sd_querymenu(struct gspca_dev *gspca_dev, | |
4400 | struct v4l2_querymenu *menu) | |
4401 | { | |
4402 | struct sd *sd = (struct sd *) gspca_dev; | |
4403 | ||
4404 | switch (menu->id) { | |
4405 | case V4L2_CID_POWER_LINE_FREQUENCY: | |
4406 | switch (menu->index) { | |
4407 | case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */ | |
4408 | strcpy((char *) menu->name, "NoFliker"); | |
4409 | return 0; | |
4410 | case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */ | |
4411 | strcpy((char *) menu->name, "50 Hz"); | |
4412 | return 0; | |
4413 | case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */ | |
4414 | strcpy((char *) menu->name, "60 Hz"); | |
4415 | return 0; | |
4416 | case 3: | |
4417 | if (sd->sensor != SEN_OV7670) | |
4418 | return -EINVAL; | |
4419 | ||
4420 | strcpy((char *) menu->name, "Automatic"); | |
4421 | return 0; | |
4422 | } | |
4423 | break; | |
4424 | } | |
4425 | return -EINVAL; | |
4426 | } | |
4427 | ||
79b35902 HG |
4428 | static int sd_get_jcomp(struct gspca_dev *gspca_dev, |
4429 | struct v4l2_jpegcompression *jcomp) | |
4430 | { | |
4431 | struct sd *sd = (struct sd *) gspca_dev; | |
4432 | ||
4433 | if (sd->bridge != BRIDGE_W9968CF) | |
4434 | return -EINVAL; | |
4435 | ||
4436 | memset(jcomp, 0, sizeof *jcomp); | |
4437 | jcomp->quality = sd->quality; | |
4438 | jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT | | |
4439 | V4L2_JPEG_MARKER_DRI; | |
4440 | return 0; | |
4441 | } | |
4442 | ||
4443 | static int sd_set_jcomp(struct gspca_dev *gspca_dev, | |
4444 | struct v4l2_jpegcompression *jcomp) | |
4445 | { | |
4446 | struct sd *sd = (struct sd *) gspca_dev; | |
4447 | ||
4448 | if (sd->bridge != BRIDGE_W9968CF) | |
4449 | return -EINVAL; | |
4450 | ||
4451 | if (gspca_dev->streaming) | |
4452 | return -EBUSY; | |
4453 | ||
4454 | if (jcomp->quality < QUALITY_MIN) | |
4455 | sd->quality = QUALITY_MIN; | |
4456 | else if (jcomp->quality > QUALITY_MAX) | |
4457 | sd->quality = QUALITY_MAX; | |
4458 | else | |
4459 | sd->quality = jcomp->quality; | |
4460 | ||
4461 | /* Return resulting jcomp params to app */ | |
4462 | sd_get_jcomp(gspca_dev, jcomp); | |
4463 | ||
4464 | return 0; | |
4465 | } | |
4466 | ||
6a7eba24 | 4467 | /* sub-driver description */ |
a5ae2062 | 4468 | static const struct sd_desc sd_desc = { |
6a7eba24 JFM |
4469 | .name = MODULE_NAME, |
4470 | .ctrls = sd_ctrls, | |
4471 | .nctrls = ARRAY_SIZE(sd_ctrls), | |
4472 | .config = sd_config, | |
012d6b02 | 4473 | .init = sd_init, |
6a7eba24 JFM |
4474 | .start = sd_start, |
4475 | .stopN = sd_stopN, | |
79b35902 | 4476 | .stop0 = sd_stop0, |
6a7eba24 | 4477 | .pkt_scan = sd_pkt_scan, |
02ab18b0 | 4478 | .querymenu = sd_querymenu, |
79b35902 HG |
4479 | .get_jcomp = sd_get_jcomp, |
4480 | .set_jcomp = sd_set_jcomp, | |
6a7eba24 JFM |
4481 | }; |
4482 | ||
4483 | /* -- module initialisation -- */ | |
a5ae2062 | 4484 | static const __devinitdata struct usb_device_id device_table[] = { |
a511ba94 | 4485 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, |
49809d6a HG |
4486 | {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, |
4487 | {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, | |
4488 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, | |
4489 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, | |
9e4d8258 HG |
4490 | {USB_DEVICE(0x041e, 0x4064), |
4491 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
518c8df7 | 4492 | {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, |
9e4d8258 HG |
4493 | {USB_DEVICE(0x041e, 0x4068), |
4494 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
49809d6a HG |
4495 | {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 }, |
4496 | {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, | |
98184f78 HG |
4497 | {USB_DEVICE(0x054c, 0x0155), |
4498 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
1876bb92 | 4499 | {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, |
49809d6a HG |
4500 | {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, |
4501 | {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 }, | |
4502 | {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 }, | |
b46aaa02 | 4503 | {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 }, |
49809d6a HG |
4504 | {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, |
4505 | {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, | |
1876bb92 | 4506 | {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS }, |
49809d6a | 4507 | {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS }, |
1876bb92 | 4508 | {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS }, |
b46aaa02 HG |
4509 | {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 }, |
4510 | {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 }, | |
a511ba94 | 4511 | {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF }, |
b46aaa02 | 4512 | {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 }, |
6a7eba24 JFM |
4513 | {} |
4514 | }; | |
ac40b1fa | 4515 | |
6a7eba24 JFM |
4516 | MODULE_DEVICE_TABLE(usb, device_table); |
4517 | ||
4518 | /* -- device connect -- */ | |
4519 | static int sd_probe(struct usb_interface *intf, | |
4520 | const struct usb_device_id *id) | |
4521 | { | |
4522 | return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), | |
4523 | THIS_MODULE); | |
4524 | } | |
4525 | ||
4526 | static struct usb_driver sd_driver = { | |
4527 | .name = MODULE_NAME, | |
4528 | .id_table = device_table, | |
4529 | .probe = sd_probe, | |
4530 | .disconnect = gspca_disconnect, | |
6a709749 JFM |
4531 | #ifdef CONFIG_PM |
4532 | .suspend = gspca_suspend, | |
4533 | .resume = gspca_resume, | |
4534 | #endif | |
6a7eba24 JFM |
4535 | }; |
4536 | ||
4537 | /* -- module insert / remove -- */ | |
4538 | static int __init sd_mod_init(void) | |
4539 | { | |
f69e9529 AK |
4540 | int ret; |
4541 | ret = usb_register(&sd_driver); | |
4542 | if (ret < 0) | |
e6b14849 | 4543 | return ret; |
10b0e96e | 4544 | PDEBUG(D_PROBE, "registered"); |
6a7eba24 JFM |
4545 | return 0; |
4546 | } | |
4547 | static void __exit sd_mod_exit(void) | |
4548 | { | |
4549 | usb_deregister(&sd_driver); | |
4550 | PDEBUG(D_PROBE, "deregistered"); | |
4551 | } | |
4552 | ||
4553 | module_init(sd_mod_init); | |
4554 | module_exit(sd_mod_exit); | |
4555 | ||
4556 | module_param(frame_rate, int, 0644); | |
4557 | MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)"); |