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6a7eba24 JFM |
1 | /** |
2 | * OV519 driver | |
3 | * | |
4 | * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr) | |
b46aaa02 | 5 | * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com> |
6a7eba24 | 6 | * |
2961e875 RB |
7 | * This module is adapted from the ov51x-jpeg package, which itself |
8 | * was adapted from the ov511 driver. | |
9 | * | |
10 | * Original copyright for the ov511 driver is: | |
11 | * | |
b46aaa02 | 12 | * Copyright (c) 1999-2006 Mark W. McClelland |
2961e875 | 13 | * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach |
b46aaa02 HG |
14 | * Many improvements by Bret Wallach <bwallac1@san.rr.com> |
15 | * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000) | |
16 | * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org> | |
17 | * Changes by Claudio Matsuoka <claudio@conectiva.com> | |
2961e875 RB |
18 | * |
19 | * ov51x-jpeg original copyright is: | |
20 | * | |
21 | * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org> | |
22 | * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com> | |
6a7eba24 JFM |
23 | * |
24 | * This program is free software; you can redistribute it and/or modify | |
25 | * it under the terms of the GNU General Public License as published by | |
26 | * the Free Software Foundation; either version 2 of the License, or | |
27 | * any later version. | |
28 | * | |
29 | * This program is distributed in the hope that it will be useful, | |
30 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
31 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
32 | * GNU General Public License for more details. | |
33 | * | |
34 | * You should have received a copy of the GNU General Public License | |
35 | * along with this program; if not, write to the Free Software | |
36 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
37 | * | |
38 | */ | |
39 | #define MODULE_NAME "ov519" | |
40 | ||
417a4d26 | 41 | #include <linux/input.h> |
6a7eba24 JFM |
42 | #include "gspca.h" |
43 | ||
9a731a32 JFM |
44 | /* The jpeg_hdr is used by w996Xcf only */ |
45 | /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */ | |
46 | #define CONEX_CAM | |
47 | #include "jpeg.h" | |
48 | ||
6a7eba24 JFM |
49 | MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>"); |
50 | MODULE_DESCRIPTION("OV519 USB Camera Driver"); | |
51 | MODULE_LICENSE("GPL"); | |
52 | ||
53 | /* global parameters */ | |
54 | static int frame_rate; | |
55 | ||
56 | /* Number of times to retry a failed I2C transaction. Increase this if you | |
57 | * are getting "Failed to read sensor ID..." */ | |
58 | static int i2c_detect_tries = 10; | |
59 | ||
62833acd JFM |
60 | /* controls */ |
61 | enum e_ctrl { | |
62 | BRIGHTNESS, | |
63 | CONTRAST, | |
64 | COLORS, | |
65 | HFLIP, | |
66 | VFLIP, | |
67 | AUTOBRIGHT, | |
68 | FREQ, | |
69 | NCTRL /* number of controls */ | |
70 | }; | |
71 | ||
6a7eba24 JFM |
72 | /* ov519 device descriptor */ |
73 | struct sd { | |
74 | struct gspca_dev gspca_dev; /* !! must be the first item */ | |
75 | ||
62833acd JFM |
76 | struct gspca_ctrl ctrls[NCTRL]; |
77 | ||
92918a53 HG |
78 | __u8 packet_nr; |
79 | ||
49809d6a HG |
80 | char bridge; |
81 | #define BRIDGE_OV511 0 | |
82 | #define BRIDGE_OV511PLUS 1 | |
83 | #define BRIDGE_OV518 2 | |
84 | #define BRIDGE_OV518PLUS 3 | |
85 | #define BRIDGE_OV519 4 | |
635118d5 | 86 | #define BRIDGE_OVFX2 5 |
a511ba94 | 87 | #define BRIDGE_W9968CF 6 |
9e4d8258 HG |
88 | #define BRIDGE_MASK 7 |
89 | ||
90 | char invert_led; | |
91 | #define BRIDGE_INVERT_LED 8 | |
49809d6a | 92 | |
417a4d26 HG |
93 | char snapshot_pressed; |
94 | char snapshot_needs_reset; | |
95 | ||
6a7eba24 | 96 | /* Determined by sensor type */ |
ac40b1fa | 97 | __u8 sif; |
6a7eba24 | 98 | |
79b35902 HG |
99 | __u8 quality; |
100 | #define QUALITY_MIN 50 | |
101 | #define QUALITY_MAX 70 | |
102 | #define QUALITY_DEF 50 | |
6a7eba24 | 103 | |
ac40b1fa | 104 | __u8 stopped; /* Streaming is temporarily paused */ |
d6b6d7ae | 105 | __u8 first_frame; |
6a7eba24 | 106 | |
1876bb92 HG |
107 | __u8 frame_rate; /* current Framerate */ |
108 | __u8 clockdiv; /* clockdiv override */ | |
6a7eba24 JFM |
109 | |
110 | char sensor; /* Type of image sensor chip (SEN_*) */ | |
111 | #define SEN_UNKNOWN 0 | |
635118d5 HG |
112 | #define SEN_OV2610 1 |
113 | #define SEN_OV3610 2 | |
114 | #define SEN_OV6620 3 | |
115 | #define SEN_OV6630 4 | |
116 | #define SEN_OV66308AF 5 | |
117 | #define SEN_OV7610 6 | |
118 | #define SEN_OV7620 7 | |
859cc470 HG |
119 | #define SEN_OV7620AE 8 |
120 | #define SEN_OV7640 9 | |
035d3a3d HG |
121 | #define SEN_OV7648 10 |
122 | #define SEN_OV7670 11 | |
123 | #define SEN_OV76BE 12 | |
124 | #define SEN_OV8610 13 | |
a511ba94 HG |
125 | |
126 | u8 sensor_addr; | |
127 | int sensor_width; | |
128 | int sensor_height; | |
fb1f9020 | 129 | int sensor_reg_cache[256]; |
79b35902 | 130 | |
9a731a32 | 131 | u8 jpeg_hdr[JPEG_HDR_SZ]; |
6a7eba24 JFM |
132 | }; |
133 | ||
a511ba94 HG |
134 | /* Note this is a bit of a hack, but the w9968cf driver needs the code for all |
135 | the ov sensors which is already present here. When we have the time we | |
136 | really should move the sensor drivers to v4l2 sub drivers. */ | |
137 | #include "w996Xcf.c" | |
138 | ||
6a7eba24 | 139 | /* V4L2 controls supported by the driver */ |
49809d6a HG |
140 | static void setbrightness(struct gspca_dev *gspca_dev); |
141 | static void setcontrast(struct gspca_dev *gspca_dev); | |
142 | static void setcolors(struct gspca_dev *gspca_dev); | |
62833acd JFM |
143 | static void sethvflip(struct gspca_dev *gspca_dev); |
144 | static void setautobright(struct gspca_dev *gspca_dev); | |
145 | static void setfreq(struct gspca_dev *gspca_dev); | |
146 | static void setfreq_i(struct sd *sd); | |
6a7eba24 | 147 | |
02ab18b0 | 148 | static const struct ctrl sd_ctrls[] = { |
62833acd | 149 | [BRIGHTNESS] = { |
6a7eba24 JFM |
150 | { |
151 | .id = V4L2_CID_BRIGHTNESS, | |
152 | .type = V4L2_CTRL_TYPE_INTEGER, | |
153 | .name = "Brightness", | |
154 | .minimum = 0, | |
155 | .maximum = 255, | |
156 | .step = 1, | |
62833acd | 157 | .default_value = 127, |
6a7eba24 | 158 | }, |
62833acd | 159 | .set_control = setbrightness, |
6a7eba24 | 160 | }, |
62833acd | 161 | [CONTRAST] = { |
6a7eba24 JFM |
162 | { |
163 | .id = V4L2_CID_CONTRAST, | |
164 | .type = V4L2_CTRL_TYPE_INTEGER, | |
165 | .name = "Contrast", | |
166 | .minimum = 0, | |
167 | .maximum = 255, | |
168 | .step = 1, | |
62833acd | 169 | .default_value = 127, |
6a7eba24 | 170 | }, |
62833acd | 171 | .set_control = setcontrast, |
6a7eba24 | 172 | }, |
62833acd | 173 | [COLORS] = { |
6a7eba24 JFM |
174 | { |
175 | .id = V4L2_CID_SATURATION, | |
176 | .type = V4L2_CTRL_TYPE_INTEGER, | |
594f5b8b | 177 | .name = "Color", |
6a7eba24 JFM |
178 | .minimum = 0, |
179 | .maximum = 255, | |
180 | .step = 1, | |
62833acd | 181 | .default_value = 127, |
6a7eba24 | 182 | }, |
62833acd | 183 | .set_control = setcolors, |
6a7eba24 | 184 | }, |
02ab18b0 | 185 | /* The flip controls work with ov7670 only */ |
62833acd | 186 | [HFLIP] = { |
0cd6759d JFM |
187 | { |
188 | .id = V4L2_CID_HFLIP, | |
189 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
190 | .name = "Mirror", | |
191 | .minimum = 0, | |
192 | .maximum = 1, | |
193 | .step = 1, | |
62833acd | 194 | .default_value = 0, |
0cd6759d | 195 | }, |
62833acd | 196 | .set_control = sethvflip, |
0cd6759d | 197 | }, |
62833acd | 198 | [VFLIP] = { |
0cd6759d JFM |
199 | { |
200 | .id = V4L2_CID_VFLIP, | |
201 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
202 | .name = "Vflip", | |
203 | .minimum = 0, | |
204 | .maximum = 1, | |
205 | .step = 1, | |
62833acd | 206 | .default_value = 0, |
0cd6759d | 207 | }, |
62833acd | 208 | .set_control = sethvflip, |
0cd6759d | 209 | }, |
62833acd | 210 | [AUTOBRIGHT] = { |
02ab18b0 HG |
211 | { |
212 | .id = V4L2_CID_AUTOBRIGHTNESS, | |
213 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
214 | .name = "Auto Brightness", | |
215 | .minimum = 0, | |
216 | .maximum = 1, | |
217 | .step = 1, | |
62833acd | 218 | .default_value = 1, |
02ab18b0 | 219 | }, |
62833acd | 220 | .set_control = setautobright, |
02ab18b0 | 221 | }, |
62833acd | 222 | [FREQ] = { |
02ab18b0 HG |
223 | { |
224 | .id = V4L2_CID_POWER_LINE_FREQUENCY, | |
225 | .type = V4L2_CTRL_TYPE_MENU, | |
226 | .name = "Light frequency filter", | |
227 | .minimum = 0, | |
228 | .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */ | |
229 | .step = 1, | |
62833acd | 230 | .default_value = 0, |
02ab18b0 | 231 | }, |
62833acd | 232 | .set_control = setfreq, |
02ab18b0 | 233 | }, |
6a7eba24 JFM |
234 | }; |
235 | ||
49809d6a | 236 | static const struct v4l2_pix_format ov519_vga_mode[] = { |
c2446b3e JFM |
237 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
238 | .bytesperline = 320, | |
594f5b8b | 239 | .sizeimage = 320 * 240 * 3 / 8 + 590, |
c2446b3e JFM |
240 | .colorspace = V4L2_COLORSPACE_JPEG, |
241 | .priv = 1}, | |
242 | {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
243 | .bytesperline = 640, | |
244 | .sizeimage = 640 * 480 * 3 / 8 + 590, | |
245 | .colorspace = V4L2_COLORSPACE_JPEG, | |
246 | .priv = 0}, | |
6a7eba24 | 247 | }; |
49809d6a | 248 | static const struct v4l2_pix_format ov519_sif_mode[] = { |
124cc9c0 HG |
249 | {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
250 | .bytesperline = 160, | |
251 | .sizeimage = 160 * 120 * 3 / 8 + 590, | |
252 | .colorspace = V4L2_COLORSPACE_JPEG, | |
253 | .priv = 3}, | |
c2446b3e JFM |
254 | {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
255 | .bytesperline = 176, | |
594f5b8b | 256 | .sizeimage = 176 * 144 * 3 / 8 + 590, |
c2446b3e JFM |
257 | .colorspace = V4L2_COLORSPACE_JPEG, |
258 | .priv = 1}, | |
124cc9c0 HG |
259 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
260 | .bytesperline = 320, | |
261 | .sizeimage = 320 * 240 * 3 / 8 + 590, | |
262 | .colorspace = V4L2_COLORSPACE_JPEG, | |
263 | .priv = 2}, | |
c2446b3e JFM |
264 | {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, |
265 | .bytesperline = 352, | |
594f5b8b | 266 | .sizeimage = 352 * 288 * 3 / 8 + 590, |
c2446b3e JFM |
267 | .colorspace = V4L2_COLORSPACE_JPEG, |
268 | .priv = 0}, | |
6a7eba24 JFM |
269 | }; |
270 | ||
b282d873 HG |
271 | /* Note some of the sizeimage values for the ov511 / ov518 may seem |
272 | larger then necessary, however they need to be this big as the ov511 / | |
273 | ov518 always fills the entire isoc frame, using 0 padding bytes when | |
274 | it doesn't have any data. So with low framerates the amount of data | |
275 | transfered can become quite large (libv4l will remove all the 0 padding | |
276 | in userspace). */ | |
49809d6a HG |
277 | static const struct v4l2_pix_format ov518_vga_mode[] = { |
278 | {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
279 | .bytesperline = 320, | |
b282d873 | 280 | .sizeimage = 320 * 240 * 3, |
49809d6a HG |
281 | .colorspace = V4L2_COLORSPACE_JPEG, |
282 | .priv = 1}, | |
283 | {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, | |
284 | .bytesperline = 640, | |
b282d873 | 285 | .sizeimage = 640 * 480 * 2, |
49809d6a HG |
286 | .colorspace = V4L2_COLORSPACE_JPEG, |
287 | .priv = 0}, | |
288 | }; | |
289 | static const struct v4l2_pix_format ov518_sif_mode[] = { | |
124cc9c0 HG |
290 | {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
291 | .bytesperline = 160, | |
b282d873 | 292 | .sizeimage = 70000, |
124cc9c0 HG |
293 | .colorspace = V4L2_COLORSPACE_JPEG, |
294 | .priv = 3}, | |
49809d6a HG |
295 | {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
296 | .bytesperline = 176, | |
b282d873 | 297 | .sizeimage = 70000, |
49809d6a HG |
298 | .colorspace = V4L2_COLORSPACE_JPEG, |
299 | .priv = 1}, | |
124cc9c0 HG |
300 | {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
301 | .bytesperline = 320, | |
b282d873 | 302 | .sizeimage = 320 * 240 * 3, |
124cc9c0 HG |
303 | .colorspace = V4L2_COLORSPACE_JPEG, |
304 | .priv = 2}, | |
49809d6a HG |
305 | {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE, |
306 | .bytesperline = 352, | |
b282d873 | 307 | .sizeimage = 352 * 288 * 3, |
49809d6a HG |
308 | .colorspace = V4L2_COLORSPACE_JPEG, |
309 | .priv = 0}, | |
310 | }; | |
311 | ||
1876bb92 HG |
312 | static const struct v4l2_pix_format ov511_vga_mode[] = { |
313 | {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
314 | .bytesperline = 320, | |
315 | .sizeimage = 320 * 240 * 3, | |
316 | .colorspace = V4L2_COLORSPACE_JPEG, | |
317 | .priv = 1}, | |
318 | {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
319 | .bytesperline = 640, | |
320 | .sizeimage = 640 * 480 * 2, | |
321 | .colorspace = V4L2_COLORSPACE_JPEG, | |
322 | .priv = 0}, | |
323 | }; | |
324 | static const struct v4l2_pix_format ov511_sif_mode[] = { | |
325 | {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
326 | .bytesperline = 160, | |
b282d873 | 327 | .sizeimage = 70000, |
1876bb92 HG |
328 | .colorspace = V4L2_COLORSPACE_JPEG, |
329 | .priv = 3}, | |
330 | {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
331 | .bytesperline = 176, | |
b282d873 | 332 | .sizeimage = 70000, |
1876bb92 HG |
333 | .colorspace = V4L2_COLORSPACE_JPEG, |
334 | .priv = 1}, | |
335 | {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
336 | .bytesperline = 320, | |
337 | .sizeimage = 320 * 240 * 3, | |
338 | .colorspace = V4L2_COLORSPACE_JPEG, | |
339 | .priv = 2}, | |
340 | {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE, | |
341 | .bytesperline = 352, | |
342 | .sizeimage = 352 * 288 * 3, | |
343 | .colorspace = V4L2_COLORSPACE_JPEG, | |
344 | .priv = 0}, | |
345 | }; | |
49809d6a | 346 | |
635118d5 HG |
347 | static const struct v4l2_pix_format ovfx2_vga_mode[] = { |
348 | {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
349 | .bytesperline = 320, | |
350 | .sizeimage = 320 * 240, | |
351 | .colorspace = V4L2_COLORSPACE_SRGB, | |
352 | .priv = 1}, | |
353 | {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
354 | .bytesperline = 640, | |
355 | .sizeimage = 640 * 480, | |
356 | .colorspace = V4L2_COLORSPACE_SRGB, | |
357 | .priv = 0}, | |
358 | }; | |
359 | static const struct v4l2_pix_format ovfx2_cif_mode[] = { | |
360 | {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
361 | .bytesperline = 160, | |
362 | .sizeimage = 160 * 120, | |
363 | .colorspace = V4L2_COLORSPACE_SRGB, | |
364 | .priv = 3}, | |
365 | {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
366 | .bytesperline = 176, | |
367 | .sizeimage = 176 * 144, | |
368 | .colorspace = V4L2_COLORSPACE_SRGB, | |
369 | .priv = 1}, | |
370 | {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
371 | .bytesperline = 320, | |
372 | .sizeimage = 320 * 240, | |
373 | .colorspace = V4L2_COLORSPACE_SRGB, | |
374 | .priv = 2}, | |
375 | {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
376 | .bytesperline = 352, | |
377 | .sizeimage = 352 * 288, | |
378 | .colorspace = V4L2_COLORSPACE_SRGB, | |
379 | .priv = 0}, | |
380 | }; | |
381 | static const struct v4l2_pix_format ovfx2_ov2610_mode[] = { | |
382 | {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
383 | .bytesperline = 1600, | |
384 | .sizeimage = 1600 * 1200, | |
385 | .colorspace = V4L2_COLORSPACE_SRGB}, | |
386 | }; | |
387 | static const struct v4l2_pix_format ovfx2_ov3610_mode[] = { | |
635118d5 HG |
388 | {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, |
389 | .bytesperline = 640, | |
390 | .sizeimage = 640 * 480, | |
b46aaa02 HG |
391 | .colorspace = V4L2_COLORSPACE_SRGB, |
392 | .priv = 1}, | |
393 | {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
394 | .bytesperline = 800, | |
395 | .sizeimage = 800 * 600, | |
396 | .colorspace = V4L2_COLORSPACE_SRGB, | |
397 | .priv = 1}, | |
398 | {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
399 | .bytesperline = 1024, | |
400 | .sizeimage = 1024 * 768, | |
401 | .colorspace = V4L2_COLORSPACE_SRGB, | |
402 | .priv = 1}, | |
403 | {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
404 | .bytesperline = 1600, | |
405 | .sizeimage = 1600 * 1200, | |
406 | .colorspace = V4L2_COLORSPACE_SRGB, | |
407 | .priv = 0}, | |
408 | {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | |
409 | .bytesperline = 2048, | |
410 | .sizeimage = 2048 * 1536, | |
411 | .colorspace = V4L2_COLORSPACE_SRGB, | |
412 | .priv = 0}, | |
635118d5 HG |
413 | }; |
414 | ||
415 | ||
49809d6a | 416 | /* Registers common to OV511 / OV518 */ |
1876bb92 | 417 | #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */ |
49809d6a | 418 | #define R51x_SYS_RESET 0x50 |
1876bb92 HG |
419 | /* Reset type flags */ |
420 | #define OV511_RESET_OMNICE 0x08 | |
49809d6a HG |
421 | #define R51x_SYS_INIT 0x53 |
422 | #define R51x_SYS_SNAP 0x52 | |
423 | #define R51x_SYS_CUST_ID 0x5F | |
424 | #define R51x_COMP_LUT_BEGIN 0x80 | |
425 | ||
426 | /* OV511 Camera interface register numbers */ | |
1876bb92 HG |
427 | #define R511_CAM_DELAY 0x10 |
428 | #define R511_CAM_EDGE 0x11 | |
429 | #define R511_CAM_PXCNT 0x12 | |
430 | #define R511_CAM_LNCNT 0x13 | |
431 | #define R511_CAM_PXDIV 0x14 | |
432 | #define R511_CAM_LNDIV 0x15 | |
433 | #define R511_CAM_UV_EN 0x16 | |
434 | #define R511_CAM_LINE_MODE 0x17 | |
435 | #define R511_CAM_OPTS 0x18 | |
436 | ||
437 | #define R511_SNAP_FRAME 0x19 | |
438 | #define R511_SNAP_PXCNT 0x1A | |
439 | #define R511_SNAP_LNCNT 0x1B | |
440 | #define R511_SNAP_PXDIV 0x1C | |
441 | #define R511_SNAP_LNDIV 0x1D | |
442 | #define R511_SNAP_UV_EN 0x1E | |
443 | #define R511_SNAP_UV_EN 0x1E | |
444 | #define R511_SNAP_OPTS 0x1F | |
445 | ||
446 | #define R511_DRAM_FLOW_CTL 0x20 | |
447 | #define R511_FIFO_OPTS 0x31 | |
448 | #define R511_I2C_CTL 0x40 | |
49809d6a | 449 | #define R511_SYS_LED_CTL 0x55 /* OV511+ only */ |
1876bb92 HG |
450 | #define R511_COMP_EN 0x78 |
451 | #define R511_COMP_LUT_EN 0x79 | |
49809d6a HG |
452 | |
453 | /* OV518 Camera interface register numbers */ | |
454 | #define R518_GPIO_OUT 0x56 /* OV518(+) only */ | |
455 | #define R518_GPIO_CTL 0x57 /* OV518(+) only */ | |
456 | ||
6a7eba24 | 457 | /* OV519 Camera interface register numbers */ |
ac40b1fa JFM |
458 | #define OV519_R10_H_SIZE 0x10 |
459 | #define OV519_R11_V_SIZE 0x11 | |
460 | #define OV519_R12_X_OFFSETL 0x12 | |
461 | #define OV519_R13_X_OFFSETH 0x13 | |
462 | #define OV519_R14_Y_OFFSETL 0x14 | |
463 | #define OV519_R15_Y_OFFSETH 0x15 | |
464 | #define OV519_R16_DIVIDER 0x16 | |
465 | #define OV519_R20_DFR 0x20 | |
466 | #define OV519_R25_FORMAT 0x25 | |
6a7eba24 JFM |
467 | |
468 | /* OV519 System Controller register numbers */ | |
469 | #define OV519_SYS_RESET1 0x51 | |
470 | #define OV519_SYS_EN_CLK1 0x54 | |
471 | ||
472 | #define OV519_GPIO_DATA_OUT0 0x71 | |
473 | #define OV519_GPIO_IO_CTRL0 0x72 | |
474 | ||
475 | #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */ | |
476 | ||
b46aaa02 HG |
477 | /* |
478 | * The FX2 chip does not give us a zero length read at end of frame. | |
479 | * It does, however, give a short read at the end of a frame, if | |
3ad2f3fb | 480 | * necessary, rather than run two frames together. |
b46aaa02 HG |
481 | * |
482 | * By choosing the right bulk transfer size, we are guaranteed to always | |
483 | * get a short read for the last read of each frame. Frame sizes are | |
484 | * always a composite number (width * height, or a multiple) so if we | |
485 | * choose a prime number, we are guaranteed that the last read of a | |
486 | * frame will be short. | |
487 | * | |
488 | * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB, | |
489 | * otherwise EOVERFLOW "babbling" errors occur. I have not been able | |
490 | * to figure out why. [PMiller] | |
491 | * | |
492 | * The constant (13 * 4096) is the largest "prime enough" number less than 64KB. | |
493 | * | |
494 | * It isn't enough to know the number of bytes per frame, in case we | |
495 | * have data dropouts or buffer overruns (even though the FX2 double | |
496 | * buffers, there are some pretty strict real time constraints for | |
497 | * isochronous transfer for larger frame sizes). | |
498 | */ | |
499 | #define OVFX2_BULK_SIZE (13 * 4096) | |
500 | ||
6a7eba24 JFM |
501 | /* I2C registers */ |
502 | #define R51x_I2C_W_SID 0x41 | |
503 | #define R51x_I2C_SADDR_3 0x42 | |
504 | #define R51x_I2C_SADDR_2 0x43 | |
505 | #define R51x_I2C_R_SID 0x44 | |
506 | #define R51x_I2C_DATA 0x45 | |
507 | #define R518_I2C_CTL 0x47 /* OV518(+) only */ | |
b46aaa02 | 508 | #define OVFX2_I2C_ADDR 0x00 |
6a7eba24 JFM |
509 | |
510 | /* I2C ADDRESSES */ | |
511 | #define OV7xx0_SID 0x42 | |
229bb7dc | 512 | #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */ |
6a7eba24 JFM |
513 | #define OV8xx0_SID 0xa0 |
514 | #define OV6xx0_SID 0xc0 | |
515 | ||
516 | /* OV7610 registers */ | |
517 | #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */ | |
49809d6a HG |
518 | #define OV7610_REG_BLUE 0x01 /* blue channel balance */ |
519 | #define OV7610_REG_RED 0x02 /* red channel balance */ | |
6a7eba24 JFM |
520 | #define OV7610_REG_SAT 0x03 /* saturation */ |
521 | #define OV8610_REG_HUE 0x04 /* 04 reserved */ | |
522 | #define OV7610_REG_CNT 0x05 /* Y contrast */ | |
523 | #define OV7610_REG_BRT 0x06 /* Y brightness */ | |
524 | #define OV7610_REG_COM_C 0x14 /* misc common regs */ | |
525 | #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */ | |
526 | #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */ | |
527 | #define OV7610_REG_COM_I 0x29 /* misc settings */ | |
528 | ||
529 | /* OV7670 registers */ | |
530 | #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */ | |
531 | #define OV7670_REG_BLUE 0x01 /* blue gain */ | |
532 | #define OV7670_REG_RED 0x02 /* red gain */ | |
533 | #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */ | |
534 | #define OV7670_REG_COM1 0x04 /* Control 1 */ | |
535 | #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */ | |
536 | #define OV7670_REG_COM3 0x0c /* Control 3 */ | |
537 | #define OV7670_REG_COM4 0x0d /* Control 4 */ | |
538 | #define OV7670_REG_COM5 0x0e /* All "reserved" */ | |
539 | #define OV7670_REG_COM6 0x0f /* Control 6 */ | |
540 | #define OV7670_REG_AECH 0x10 /* More bits of AEC value */ | |
541 | #define OV7670_REG_CLKRC 0x11 /* Clock control */ | |
542 | #define OV7670_REG_COM7 0x12 /* Control 7 */ | |
543 | #define OV7670_COM7_FMT_VGA 0x00 | |
544 | #define OV7670_COM7_YUV 0x00 /* YUV */ | |
545 | #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */ | |
546 | #define OV7670_COM7_FMT_MASK 0x38 | |
547 | #define OV7670_COM7_RESET 0x80 /* Register reset */ | |
548 | #define OV7670_REG_COM8 0x13 /* Control 8 */ | |
549 | #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */ | |
550 | #define OV7670_COM8_AWB 0x02 /* White balance enable */ | |
551 | #define OV7670_COM8_AGC 0x04 /* Auto gain enable */ | |
552 | #define OV7670_COM8_BFILT 0x20 /* Band filter enable */ | |
553 | #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */ | |
554 | #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */ | |
555 | #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */ | |
556 | #define OV7670_REG_COM10 0x15 /* Control 10 */ | |
557 | #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */ | |
558 | #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */ | |
559 | #define OV7670_REG_VSTART 0x19 /* Vert start high bits */ | |
560 | #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */ | |
561 | #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */ | |
0cd6759d | 562 | #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */ |
6a7eba24 JFM |
563 | #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */ |
564 | #define OV7670_REG_AEW 0x24 /* AGC upper limit */ | |
565 | #define OV7670_REG_AEB 0x25 /* AGC lower limit */ | |
566 | #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */ | |
567 | #define OV7670_REG_HREF 0x32 /* HREF pieces */ | |
568 | #define OV7670_REG_TSLB 0x3a /* lots of stuff */ | |
569 | #define OV7670_REG_COM11 0x3b /* Control 11 */ | |
570 | #define OV7670_COM11_EXP 0x02 | |
571 | #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */ | |
572 | #define OV7670_REG_COM12 0x3c /* Control 12 */ | |
573 | #define OV7670_REG_COM13 0x3d /* Control 13 */ | |
574 | #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */ | |
575 | #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */ | |
576 | #define OV7670_REG_COM14 0x3e /* Control 14 */ | |
577 | #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */ | |
578 | #define OV7670_REG_COM15 0x40 /* Control 15 */ | |
579 | #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */ | |
580 | #define OV7670_REG_COM16 0x41 /* Control 16 */ | |
581 | #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */ | |
582 | #define OV7670_REG_BRIGHT 0x55 /* Brightness */ | |
583 | #define OV7670_REG_CONTRAS 0x56 /* Contrast control */ | |
584 | #define OV7670_REG_GFIX 0x69 /* Fix gain control */ | |
585 | #define OV7670_REG_RGB444 0x8c /* RGB 444 control */ | |
586 | #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */ | |
587 | #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */ | |
588 | #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */ | |
589 | #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */ | |
590 | #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */ | |
591 | #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */ | |
592 | #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */ | |
593 | #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */ | |
594 | #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */ | |
595 | ||
4202f71c JFM |
596 | struct ov_regvals { |
597 | __u8 reg; | |
598 | __u8 val; | |
599 | }; | |
600 | struct ov_i2c_regvals { | |
601 | __u8 reg; | |
602 | __u8 val; | |
603 | }; | |
604 | ||
635118d5 HG |
605 | /* Settings for OV2610 camera chip */ |
606 | static const struct ov_i2c_regvals norm_2610[] = | |
607 | { | |
b46aaa02 | 608 | { 0x12, 0x80 }, /* reset */ |
635118d5 HG |
609 | }; |
610 | ||
611 | static const struct ov_i2c_regvals norm_3620b[] = | |
612 | { | |
613 | /* | |
614 | * From the datasheet: "Note that after writing to register COMH | |
615 | * (0x12) to change the sensor mode, registers related to the | |
616 | * sensor’s cropping window will be reset back to their default | |
617 | * values." | |
618 | * | |
619 | * "wait 4096 external clock ... to make sure the sensor is | |
620 | * stable and ready to access registers" i.e. 160us at 24MHz | |
621 | */ | |
622 | ||
623 | { 0x12, 0x80 }, /* COMH reset */ | |
624 | { 0x12, 0x00 }, /* QXGA, master */ | |
625 | ||
626 | /* | |
627 | * 11 CLKRC "Clock Rate Control" | |
628 | * [7] internal frequency doublers: on | |
629 | * [6] video port mode: master | |
630 | * [5:0] clock divider: 1 | |
631 | */ | |
632 | { 0x11, 0x80 }, | |
633 | ||
634 | /* | |
635 | * 13 COMI "Common Control I" | |
636 | * = 192 (0xC0) 11000000 | |
637 | * COMI[7] "AEC speed selection" | |
638 | * = 1 (0x01) 1....... "Faster AEC correction" | |
639 | * COMI[6] "AEC speed step selection" | |
640 | * = 1 (0x01) .1...... "Big steps, fast" | |
641 | * COMI[5] "Banding filter on off" | |
642 | * = 0 (0x00) ..0..... "Off" | |
643 | * COMI[4] "Banding filter option" | |
644 | * = 0 (0x00) ...0.... "Main clock is 48 MHz and | |
645 | * the PLL is ON" | |
646 | * COMI[3] "Reserved" | |
647 | * = 0 (0x00) ....0... | |
648 | * COMI[2] "AGC auto manual control selection" | |
649 | * = 0 (0x00) .....0.. "Manual" | |
650 | * COMI[1] "AWB auto manual control selection" | |
651 | * = 0 (0x00) ......0. "Manual" | |
652 | * COMI[0] "Exposure control" | |
653 | * = 0 (0x00) .......0 "Manual" | |
654 | */ | |
655 | { 0x13, 0xC0 }, | |
656 | ||
657 | /* | |
658 | * 09 COMC "Common Control C" | |
659 | * = 8 (0x08) 00001000 | |
660 | * COMC[7:5] "Reserved" | |
661 | * = 0 (0x00) 000..... | |
662 | * COMC[4] "Sleep Mode Enable" | |
663 | * = 0 (0x00) ...0.... "Normal mode" | |
664 | * COMC[3:2] "Sensor sampling reset timing selection" | |
665 | * = 2 (0x02) ....10.. "Longer reset time" | |
666 | * COMC[1:0] "Output drive current select" | |
667 | * = 0 (0x00) ......00 "Weakest" | |
668 | */ | |
669 | { 0x09, 0x08 }, | |
670 | ||
671 | /* | |
672 | * 0C COMD "Common Control D" | |
673 | * = 8 (0x08) 00001000 | |
674 | * COMD[7] "Reserved" | |
675 | * = 0 (0x00) 0....... | |
676 | * COMD[6] "Swap MSB and LSB at the output port" | |
677 | * = 0 (0x00) .0...... "False" | |
678 | * COMD[5:3] "Reserved" | |
679 | * = 1 (0x01) ..001... | |
680 | * COMD[2] "Output Average On Off" | |
681 | * = 0 (0x00) .....0.. "Output Normal" | |
682 | * COMD[1] "Sensor precharge voltage selection" | |
683 | * = 0 (0x00) ......0. "Selects internal | |
684 | * reference precharge | |
685 | * voltage" | |
686 | * COMD[0] "Snapshot option" | |
687 | * = 0 (0x00) .......0 "Enable live video output | |
688 | * after snapshot sequence" | |
689 | */ | |
690 | { 0x0c, 0x08 }, | |
691 | ||
692 | /* | |
693 | * 0D COME "Common Control E" | |
694 | * = 161 (0xA1) 10100001 | |
695 | * COME[7] "Output average option" | |
696 | * = 1 (0x01) 1....... "Output average of 4 pixels" | |
697 | * COME[6] "Anti-blooming control" | |
698 | * = 0 (0x00) .0...... "Off" | |
699 | * COME[5:3] "Reserved" | |
700 | * = 4 (0x04) ..100... | |
701 | * COME[2] "Clock output power down pin status" | |
702 | * = 0 (0x00) .....0.. "Tri-state data output pin | |
703 | * on power down" | |
704 | * COME[1] "Data output pin status selection at power down" | |
705 | * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK, | |
706 | * HREF, and CHSYNC pins on | |
707 | * power down" | |
708 | * COME[0] "Auto zero circuit select" | |
709 | * = 1 (0x01) .......1 "On" | |
710 | */ | |
711 | { 0x0d, 0xA1 }, | |
712 | ||
713 | /* | |
714 | * 0E COMF "Common Control F" | |
715 | * = 112 (0x70) 01110000 | |
716 | * COMF[7] "System clock selection" | |
717 | * = 0 (0x00) 0....... "Use 24 MHz system clock" | |
718 | * COMF[6:4] "Reserved" | |
719 | * = 7 (0x07) .111.... | |
720 | * COMF[3] "Manual auto negative offset canceling selection" | |
721 | * = 0 (0x00) ....0... "Auto detect negative | |
722 | * offset and cancel it" | |
723 | * COMF[2:0] "Reserved" | |
724 | * = 0 (0x00) .....000 | |
725 | */ | |
726 | { 0x0e, 0x70 }, | |
727 | ||
728 | /* | |
729 | * 0F COMG "Common Control G" | |
730 | * = 66 (0x42) 01000010 | |
731 | * COMG[7] "Optical black output selection" | |
732 | * = 0 (0x00) 0....... "Disable" | |
733 | * COMG[6] "Black level calibrate selection" | |
734 | * = 1 (0x01) .1...... "Use optical black pixels | |
735 | * to calibrate" | |
736 | * COMG[5:4] "Reserved" | |
737 | * = 0 (0x00) ..00.... | |
738 | * COMG[3] "Channel offset adjustment" | |
739 | * = 0 (0x00) ....0... "Disable offset adjustment" | |
740 | * COMG[2] "ADC black level calibration option" | |
741 | * = 0 (0x00) .....0.. "Use B/G line and G/R | |
742 | * line to calibrate each | |
743 | * channel's black level" | |
744 | * COMG[1] "Reserved" | |
745 | * = 1 (0x01) ......1. | |
746 | * COMG[0] "ADC black level calibration enable" | |
747 | * = 0 (0x00) .......0 "Disable" | |
748 | */ | |
749 | { 0x0f, 0x42 }, | |
750 | ||
751 | /* | |
752 | * 14 COMJ "Common Control J" | |
753 | * = 198 (0xC6) 11000110 | |
754 | * COMJ[7:6] "AGC gain ceiling" | |
755 | * = 3 (0x03) 11...... "8x" | |
756 | * COMJ[5:4] "Reserved" | |
757 | * = 0 (0x00) ..00.... | |
758 | * COMJ[3] "Auto banding filter" | |
759 | * = 0 (0x00) ....0... "Banding filter is always | |
760 | * on off depending on | |
761 | * COMI[5] setting" | |
762 | * COMJ[2] "VSYNC drop option" | |
763 | * = 1 (0x01) .....1.. "SYNC is dropped if frame | |
764 | * data is dropped" | |
765 | * COMJ[1] "Frame data drop" | |
766 | * = 1 (0x01) ......1. "Drop frame data if | |
767 | * exposure is not within | |
768 | * tolerance. In AEC mode, | |
769 | * data is normally dropped | |
770 | * when data is out of | |
771 | * range." | |
772 | * COMJ[0] "Reserved" | |
773 | * = 0 (0x00) .......0 | |
774 | */ | |
775 | { 0x14, 0xC6 }, | |
776 | ||
777 | /* | |
778 | * 15 COMK "Common Control K" | |
779 | * = 2 (0x02) 00000010 | |
780 | * COMK[7] "CHSYNC pin output swap" | |
781 | * = 0 (0x00) 0....... "CHSYNC" | |
782 | * COMK[6] "HREF pin output swap" | |
783 | * = 0 (0x00) .0...... "HREF" | |
784 | * COMK[5] "PCLK output selection" | |
785 | * = 0 (0x00) ..0..... "PCLK always output" | |
786 | * COMK[4] "PCLK edge selection" | |
787 | * = 0 (0x00) ...0.... "Data valid on falling edge" | |
788 | * COMK[3] "HREF output polarity" | |
789 | * = 0 (0x00) ....0... "positive" | |
790 | * COMK[2] "Reserved" | |
791 | * = 0 (0x00) .....0.. | |
792 | * COMK[1] "VSYNC polarity" | |
793 | * = 1 (0x01) ......1. "negative" | |
794 | * COMK[0] "HSYNC polarity" | |
795 | * = 0 (0x00) .......0 "positive" | |
796 | */ | |
797 | { 0x15, 0x02 }, | |
798 | ||
799 | /* | |
800 | * 33 CHLF "Current Control" | |
801 | * = 9 (0x09) 00001001 | |
802 | * CHLF[7:6] "Sensor current control" | |
803 | * = 0 (0x00) 00...... | |
804 | * CHLF[5] "Sensor current range control" | |
805 | * = 0 (0x00) ..0..... "normal range" | |
806 | * CHLF[4] "Sensor current" | |
807 | * = 0 (0x00) ...0.... "normal current" | |
808 | * CHLF[3] "Sensor buffer current control" | |
809 | * = 1 (0x01) ....1... "half current" | |
810 | * CHLF[2] "Column buffer current control" | |
811 | * = 0 (0x00) .....0.. "normal current" | |
812 | * CHLF[1] "Analog DSP current control" | |
813 | * = 0 (0x00) ......0. "normal current" | |
814 | * CHLF[1] "ADC current control" | |
815 | * = 0 (0x00) ......0. "normal current" | |
816 | */ | |
817 | { 0x33, 0x09 }, | |
818 | ||
819 | /* | |
820 | * 34 VBLM "Blooming Control" | |
821 | * = 80 (0x50) 01010000 | |
822 | * VBLM[7] "Hard soft reset switch" | |
823 | * = 0 (0x00) 0....... "Hard reset" | |
824 | * VBLM[6:4] "Blooming voltage selection" | |
825 | * = 5 (0x05) .101.... | |
826 | * VBLM[3:0] "Sensor current control" | |
827 | * = 0 (0x00) ....0000 | |
828 | */ | |
829 | { 0x34, 0x50 }, | |
830 | ||
831 | /* | |
832 | * 36 VCHG "Sensor Precharge Voltage Control" | |
833 | * = 0 (0x00) 00000000 | |
834 | * VCHG[7] "Reserved" | |
835 | * = 0 (0x00) 0....... | |
836 | * VCHG[6:4] "Sensor precharge voltage control" | |
837 | * = 0 (0x00) .000.... | |
838 | * VCHG[3:0] "Sensor array common reference" | |
839 | * = 0 (0x00) ....0000 | |
840 | */ | |
841 | { 0x36, 0x00 }, | |
842 | ||
843 | /* | |
844 | * 37 ADC "ADC Reference Control" | |
845 | * = 4 (0x04) 00000100 | |
846 | * ADC[7:4] "Reserved" | |
847 | * = 0 (0x00) 0000.... | |
848 | * ADC[3] "ADC input signal range" | |
849 | * = 0 (0x00) ....0... "Input signal 1.0x" | |
850 | * ADC[2:0] "ADC range control" | |
851 | * = 4 (0x04) .....100 | |
852 | */ | |
853 | { 0x37, 0x04 }, | |
854 | ||
855 | /* | |
856 | * 38 ACOM "Analog Common Ground" | |
857 | * = 82 (0x52) 01010010 | |
858 | * ACOM[7] "Analog gain control" | |
859 | * = 0 (0x00) 0....... "Gain 1x" | |
860 | * ACOM[6] "Analog black level calibration" | |
861 | * = 1 (0x01) .1...... "On" | |
862 | * ACOM[5:0] "Reserved" | |
863 | * = 18 (0x12) ..010010 | |
864 | */ | |
865 | { 0x38, 0x52 }, | |
866 | ||
867 | /* | |
868 | * 3A FREFA "Internal Reference Adjustment" | |
869 | * = 0 (0x00) 00000000 | |
870 | * FREFA[7:0] "Range" | |
871 | * = 0 (0x00) 00000000 | |
872 | */ | |
873 | { 0x3a, 0x00 }, | |
874 | ||
875 | /* | |
876 | * 3C FVOPT "Internal Reference Adjustment" | |
877 | * = 31 (0x1F) 00011111 | |
878 | * FVOPT[7:0] "Range" | |
879 | * = 31 (0x1F) 00011111 | |
880 | */ | |
881 | { 0x3c, 0x1F }, | |
882 | ||
883 | /* | |
884 | * 44 Undocumented = 0 (0x00) 00000000 | |
885 | * 44[7:0] "It's a secret" | |
886 | * = 0 (0x00) 00000000 | |
887 | */ | |
888 | { 0x44, 0x00 }, | |
889 | ||
890 | /* | |
891 | * 40 Undocumented = 0 (0x00) 00000000 | |
892 | * 40[7:0] "It's a secret" | |
893 | * = 0 (0x00) 00000000 | |
894 | */ | |
895 | { 0x40, 0x00 }, | |
896 | ||
897 | /* | |
898 | * 41 Undocumented = 0 (0x00) 00000000 | |
899 | * 41[7:0] "It's a secret" | |
900 | * = 0 (0x00) 00000000 | |
901 | */ | |
902 | { 0x41, 0x00 }, | |
903 | ||
904 | /* | |
905 | * 42 Undocumented = 0 (0x00) 00000000 | |
906 | * 42[7:0] "It's a secret" | |
907 | * = 0 (0x00) 00000000 | |
908 | */ | |
909 | { 0x42, 0x00 }, | |
910 | ||
911 | /* | |
912 | * 43 Undocumented = 0 (0x00) 00000000 | |
913 | * 43[7:0] "It's a secret" | |
914 | * = 0 (0x00) 00000000 | |
915 | */ | |
916 | { 0x43, 0x00 }, | |
917 | ||
918 | /* | |
919 | * 45 Undocumented = 128 (0x80) 10000000 | |
920 | * 45[7:0] "It's a secret" | |
921 | * = 128 (0x80) 10000000 | |
922 | */ | |
923 | { 0x45, 0x80 }, | |
924 | ||
925 | /* | |
926 | * 48 Undocumented = 192 (0xC0) 11000000 | |
927 | * 48[7:0] "It's a secret" | |
928 | * = 192 (0xC0) 11000000 | |
929 | */ | |
930 | { 0x48, 0xC0 }, | |
931 | ||
932 | /* | |
933 | * 49 Undocumented = 25 (0x19) 00011001 | |
934 | * 49[7:0] "It's a secret" | |
935 | * = 25 (0x19) 00011001 | |
936 | */ | |
937 | { 0x49, 0x19 }, | |
938 | ||
939 | /* | |
940 | * 4B Undocumented = 128 (0x80) 10000000 | |
941 | * 4B[7:0] "It's a secret" | |
942 | * = 128 (0x80) 10000000 | |
943 | */ | |
944 | { 0x4B, 0x80 }, | |
945 | ||
946 | /* | |
947 | * 4D Undocumented = 196 (0xC4) 11000100 | |
948 | * 4D[7:0] "It's a secret" | |
949 | * = 196 (0xC4) 11000100 | |
950 | */ | |
951 | { 0x4D, 0xC4 }, | |
952 | ||
953 | /* | |
954 | * 35 VREF "Reference Voltage Control" | |
955 | * = 76 (0x4C) 01001100 | |
956 | * VREF[7:5] "Column high reference control" | |
957 | * = 2 (0x02) 010..... "higher voltage" | |
958 | * VREF[4:2] "Column low reference control" | |
959 | * = 3 (0x03) ...011.. "Highest voltage" | |
960 | * VREF[1:0] "Reserved" | |
961 | * = 0 (0x00) ......00 | |
962 | */ | |
963 | { 0x35, 0x4C }, | |
964 | ||
965 | /* | |
966 | * 3D Undocumented = 0 (0x00) 00000000 | |
967 | * 3D[7:0] "It's a secret" | |
968 | * = 0 (0x00) 00000000 | |
969 | */ | |
970 | { 0x3D, 0x00 }, | |
971 | ||
972 | /* | |
973 | * 3E Undocumented = 0 (0x00) 00000000 | |
974 | * 3E[7:0] "It's a secret" | |
975 | * = 0 (0x00) 00000000 | |
976 | */ | |
977 | { 0x3E, 0x00 }, | |
978 | ||
979 | /* | |
980 | * 3B FREFB "Internal Reference Adjustment" | |
981 | * = 24 (0x18) 00011000 | |
982 | * FREFB[7:0] "Range" | |
983 | * = 24 (0x18) 00011000 | |
984 | */ | |
985 | { 0x3b, 0x18 }, | |
986 | ||
987 | /* | |
988 | * 33 CHLF "Current Control" | |
989 | * = 25 (0x19) 00011001 | |
990 | * CHLF[7:6] "Sensor current control" | |
991 | * = 0 (0x00) 00...... | |
992 | * CHLF[5] "Sensor current range control" | |
993 | * = 0 (0x00) ..0..... "normal range" | |
994 | * CHLF[4] "Sensor current" | |
995 | * = 1 (0x01) ...1.... "double current" | |
996 | * CHLF[3] "Sensor buffer current control" | |
997 | * = 1 (0x01) ....1... "half current" | |
998 | * CHLF[2] "Column buffer current control" | |
999 | * = 0 (0x00) .....0.. "normal current" | |
1000 | * CHLF[1] "Analog DSP current control" | |
1001 | * = 0 (0x00) ......0. "normal current" | |
1002 | * CHLF[1] "ADC current control" | |
1003 | * = 0 (0x00) ......0. "normal current" | |
1004 | */ | |
1005 | { 0x33, 0x19 }, | |
1006 | ||
1007 | /* | |
1008 | * 34 VBLM "Blooming Control" | |
1009 | * = 90 (0x5A) 01011010 | |
1010 | * VBLM[7] "Hard soft reset switch" | |
1011 | * = 0 (0x00) 0....... "Hard reset" | |
1012 | * VBLM[6:4] "Blooming voltage selection" | |
1013 | * = 5 (0x05) .101.... | |
1014 | * VBLM[3:0] "Sensor current control" | |
1015 | * = 10 (0x0A) ....1010 | |
1016 | */ | |
1017 | { 0x34, 0x5A }, | |
1018 | ||
1019 | /* | |
1020 | * 3B FREFB "Internal Reference Adjustment" | |
1021 | * = 0 (0x00) 00000000 | |
1022 | * FREFB[7:0] "Range" | |
1023 | * = 0 (0x00) 00000000 | |
1024 | */ | |
1025 | { 0x3b, 0x00 }, | |
1026 | ||
1027 | /* | |
1028 | * 33 CHLF "Current Control" | |
1029 | * = 9 (0x09) 00001001 | |
1030 | * CHLF[7:6] "Sensor current control" | |
1031 | * = 0 (0x00) 00...... | |
1032 | * CHLF[5] "Sensor current range control" | |
1033 | * = 0 (0x00) ..0..... "normal range" | |
1034 | * CHLF[4] "Sensor current" | |
1035 | * = 0 (0x00) ...0.... "normal current" | |
1036 | * CHLF[3] "Sensor buffer current control" | |
1037 | * = 1 (0x01) ....1... "half current" | |
1038 | * CHLF[2] "Column buffer current control" | |
1039 | * = 0 (0x00) .....0.. "normal current" | |
1040 | * CHLF[1] "Analog DSP current control" | |
1041 | * = 0 (0x00) ......0. "normal current" | |
1042 | * CHLF[1] "ADC current control" | |
1043 | * = 0 (0x00) ......0. "normal current" | |
1044 | */ | |
1045 | { 0x33, 0x09 }, | |
1046 | ||
1047 | /* | |
1048 | * 34 VBLM "Blooming Control" | |
1049 | * = 80 (0x50) 01010000 | |
1050 | * VBLM[7] "Hard soft reset switch" | |
1051 | * = 0 (0x00) 0....... "Hard reset" | |
1052 | * VBLM[6:4] "Blooming voltage selection" | |
1053 | * = 5 (0x05) .101.... | |
1054 | * VBLM[3:0] "Sensor current control" | |
1055 | * = 0 (0x00) ....0000 | |
1056 | */ | |
1057 | { 0x34, 0x50 }, | |
1058 | ||
1059 | /* | |
1060 | * 12 COMH "Common Control H" | |
1061 | * = 64 (0x40) 01000000 | |
1062 | * COMH[7] "SRST" | |
1063 | * = 0 (0x00) 0....... "No-op" | |
1064 | * COMH[6:4] "Resolution selection" | |
1065 | * = 4 (0x04) .100.... "XGA" | |
1066 | * COMH[3] "Master slave selection" | |
1067 | * = 0 (0x00) ....0... "Master mode" | |
1068 | * COMH[2] "Internal B/R channel option" | |
1069 | * = 0 (0x00) .....0.. "B/R use same channel" | |
1070 | * COMH[1] "Color bar test pattern" | |
1071 | * = 0 (0x00) ......0. "Off" | |
1072 | * COMH[0] "Reserved" | |
1073 | * = 0 (0x00) .......0 | |
1074 | */ | |
1075 | { 0x12, 0x40 }, | |
1076 | ||
1077 | /* | |
1078 | * 17 HREFST "Horizontal window start" | |
1079 | * = 31 (0x1F) 00011111 | |
1080 | * HREFST[7:0] "Horizontal window start, 8 MSBs" | |
1081 | * = 31 (0x1F) 00011111 | |
1082 | */ | |
1083 | { 0x17, 0x1F }, | |
1084 | ||
1085 | /* | |
1086 | * 18 HREFEND "Horizontal window end" | |
1087 | * = 95 (0x5F) 01011111 | |
1088 | * HREFEND[7:0] "Horizontal Window End, 8 MSBs" | |
1089 | * = 95 (0x5F) 01011111 | |
1090 | */ | |
1091 | { 0x18, 0x5F }, | |
1092 | ||
1093 | /* | |
1094 | * 19 VSTRT "Vertical window start" | |
1095 | * = 0 (0x00) 00000000 | |
1096 | * VSTRT[7:0] "Vertical Window Start, 8 MSBs" | |
1097 | * = 0 (0x00) 00000000 | |
1098 | */ | |
1099 | { 0x19, 0x00 }, | |
1100 | ||
1101 | /* | |
1102 | * 1A VEND "Vertical window end" | |
1103 | * = 96 (0x60) 01100000 | |
1104 | * VEND[7:0] "Vertical Window End, 8 MSBs" | |
1105 | * = 96 (0x60) 01100000 | |
1106 | */ | |
1107 | { 0x1a, 0x60 }, | |
1108 | ||
1109 | /* | |
1110 | * 32 COMM "Common Control M" | |
1111 | * = 18 (0x12) 00010010 | |
1112 | * COMM[7:6] "Pixel clock divide option" | |
1113 | * = 0 (0x00) 00...... "/1" | |
1114 | * COMM[5:3] "Horizontal window end position, 3 LSBs" | |
1115 | * = 2 (0x02) ..010... | |
1116 | * COMM[2:0] "Horizontal window start position, 3 LSBs" | |
1117 | * = 2 (0x02) .....010 | |
1118 | */ | |
1119 | { 0x32, 0x12 }, | |
1120 | ||
1121 | /* | |
1122 | * 03 COMA "Common Control A" | |
1123 | * = 74 (0x4A) 01001010 | |
1124 | * COMA[7:4] "AWB Update Threshold" | |
1125 | * = 4 (0x04) 0100.... | |
1126 | * COMA[3:2] "Vertical window end line control 2 LSBs" | |
1127 | * = 2 (0x02) ....10.. | |
1128 | * COMA[1:0] "Vertical window start line control 2 LSBs" | |
1129 | * = 2 (0x02) ......10 | |
1130 | */ | |
1131 | { 0x03, 0x4A }, | |
1132 | ||
1133 | /* | |
1134 | * 11 CLKRC "Clock Rate Control" | |
1135 | * = 128 (0x80) 10000000 | |
1136 | * CLKRC[7] "Internal frequency doublers on off seclection" | |
1137 | * = 1 (0x01) 1....... "On" | |
1138 | * CLKRC[6] "Digital video master slave selection" | |
1139 | * = 0 (0x00) .0...... "Master mode, sensor | |
1140 | * provides PCLK" | |
1141 | * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }" | |
1142 | * = 0 (0x00) ..000000 | |
1143 | */ | |
1144 | { 0x11, 0x80 }, | |
1145 | ||
1146 | /* | |
1147 | * 12 COMH "Common Control H" | |
1148 | * = 0 (0x00) 00000000 | |
1149 | * COMH[7] "SRST" | |
1150 | * = 0 (0x00) 0....... "No-op" | |
1151 | * COMH[6:4] "Resolution selection" | |
1152 | * = 0 (0x00) .000.... "QXGA" | |
1153 | * COMH[3] "Master slave selection" | |
1154 | * = 0 (0x00) ....0... "Master mode" | |
1155 | * COMH[2] "Internal B/R channel option" | |
1156 | * = 0 (0x00) .....0.. "B/R use same channel" | |
1157 | * COMH[1] "Color bar test pattern" | |
1158 | * = 0 (0x00) ......0. "Off" | |
1159 | * COMH[0] "Reserved" | |
1160 | * = 0 (0x00) .......0 | |
1161 | */ | |
1162 | { 0x12, 0x00 }, | |
1163 | ||
1164 | /* | |
1165 | * 12 COMH "Common Control H" | |
1166 | * = 64 (0x40) 01000000 | |
1167 | * COMH[7] "SRST" | |
1168 | * = 0 (0x00) 0....... "No-op" | |
1169 | * COMH[6:4] "Resolution selection" | |
1170 | * = 4 (0x04) .100.... "XGA" | |
1171 | * COMH[3] "Master slave selection" | |
1172 | * = 0 (0x00) ....0... "Master mode" | |
1173 | * COMH[2] "Internal B/R channel option" | |
1174 | * = 0 (0x00) .....0.. "B/R use same channel" | |
1175 | * COMH[1] "Color bar test pattern" | |
1176 | * = 0 (0x00) ......0. "Off" | |
1177 | * COMH[0] "Reserved" | |
1178 | * = 0 (0x00) .......0 | |
1179 | */ | |
1180 | { 0x12, 0x40 }, | |
1181 | ||
1182 | /* | |
1183 | * 17 HREFST "Horizontal window start" | |
1184 | * = 31 (0x1F) 00011111 | |
1185 | * HREFST[7:0] "Horizontal window start, 8 MSBs" | |
1186 | * = 31 (0x1F) 00011111 | |
1187 | */ | |
1188 | { 0x17, 0x1F }, | |
1189 | ||
1190 | /* | |
1191 | * 18 HREFEND "Horizontal window end" | |
1192 | * = 95 (0x5F) 01011111 | |
1193 | * HREFEND[7:0] "Horizontal Window End, 8 MSBs" | |
1194 | * = 95 (0x5F) 01011111 | |
1195 | */ | |
1196 | { 0x18, 0x5F }, | |
1197 | ||
1198 | /* | |
1199 | * 19 VSTRT "Vertical window start" | |
1200 | * = 0 (0x00) 00000000 | |
1201 | * VSTRT[7:0] "Vertical Window Start, 8 MSBs" | |
1202 | * = 0 (0x00) 00000000 | |
1203 | */ | |
1204 | { 0x19, 0x00 }, | |
1205 | ||
1206 | /* | |
1207 | * 1A VEND "Vertical window end" | |
1208 | * = 96 (0x60) 01100000 | |
1209 | * VEND[7:0] "Vertical Window End, 8 MSBs" | |
1210 | * = 96 (0x60) 01100000 | |
1211 | */ | |
1212 | { 0x1a, 0x60 }, | |
1213 | ||
1214 | /* | |
1215 | * 32 COMM "Common Control M" | |
1216 | * = 18 (0x12) 00010010 | |
1217 | * COMM[7:6] "Pixel clock divide option" | |
1218 | * = 0 (0x00) 00...... "/1" | |
1219 | * COMM[5:3] "Horizontal window end position, 3 LSBs" | |
1220 | * = 2 (0x02) ..010... | |
1221 | * COMM[2:0] "Horizontal window start position, 3 LSBs" | |
1222 | * = 2 (0x02) .....010 | |
1223 | */ | |
1224 | { 0x32, 0x12 }, | |
1225 | ||
1226 | /* | |
1227 | * 03 COMA "Common Control A" | |
1228 | * = 74 (0x4A) 01001010 | |
1229 | * COMA[7:4] "AWB Update Threshold" | |
1230 | * = 4 (0x04) 0100.... | |
1231 | * COMA[3:2] "Vertical window end line control 2 LSBs" | |
1232 | * = 2 (0x02) ....10.. | |
1233 | * COMA[1:0] "Vertical window start line control 2 LSBs" | |
1234 | * = 2 (0x02) ......10 | |
1235 | */ | |
1236 | { 0x03, 0x4A }, | |
1237 | ||
1238 | /* | |
1239 | * 02 RED "Red Gain Control" | |
1240 | * = 175 (0xAF) 10101111 | |
1241 | * RED[7] "Action" | |
1242 | * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))" | |
1243 | * RED[6:0] "Value" | |
1244 | * = 47 (0x2F) .0101111 | |
1245 | */ | |
1246 | { 0x02, 0xAF }, | |
1247 | ||
1248 | /* | |
1249 | * 2D ADDVSL "VSYNC Pulse Width" | |
1250 | * = 210 (0xD2) 11010010 | |
1251 | * ADDVSL[7:0] "VSYNC pulse width, LSB" | |
1252 | * = 210 (0xD2) 11010010 | |
1253 | */ | |
1254 | { 0x2d, 0xD2 }, | |
1255 | ||
1256 | /* | |
1257 | * 00 GAIN = 24 (0x18) 00011000 | |
1258 | * GAIN[7:6] "Reserved" | |
1259 | * = 0 (0x00) 00...... | |
1260 | * GAIN[5] "Double" | |
1261 | * = 0 (0x00) ..0..... "False" | |
1262 | * GAIN[4] "Double" | |
1263 | * = 1 (0x01) ...1.... "True" | |
1264 | * GAIN[3:0] "Range" | |
1265 | * = 8 (0x08) ....1000 | |
1266 | */ | |
1267 | { 0x00, 0x18 }, | |
1268 | ||
1269 | /* | |
1270 | * 01 BLUE "Blue Gain Control" | |
1271 | * = 240 (0xF0) 11110000 | |
1272 | * BLUE[7] "Action" | |
1273 | * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))" | |
1274 | * BLUE[6:0] "Value" | |
1275 | * = 112 (0x70) .1110000 | |
1276 | */ | |
1277 | { 0x01, 0xF0 }, | |
1278 | ||
1279 | /* | |
1280 | * 10 AEC "Automatic Exposure Control" | |
1281 | * = 10 (0x0A) 00001010 | |
1282 | * AEC[7:0] "Automatic Exposure Control, 8 MSBs" | |
1283 | * = 10 (0x0A) 00001010 | |
1284 | */ | |
1285 | { 0x10, 0x0A }, | |
1286 | ||
1287 | { 0xE1, 0x67 }, | |
1288 | { 0xE3, 0x03 }, | |
1289 | { 0xE4, 0x26 }, | |
1290 | { 0xE5, 0x3E }, | |
1291 | { 0xF8, 0x01 }, | |
1292 | { 0xFF, 0x01 }, | |
1293 | }; | |
1294 | ||
4202f71c JFM |
1295 | static const struct ov_i2c_regvals norm_6x20[] = { |
1296 | { 0x12, 0x80 }, /* reset */ | |
1297 | { 0x11, 0x01 }, | |
1298 | { 0x03, 0x60 }, | |
1299 | { 0x05, 0x7f }, /* For when autoadjust is off */ | |
1300 | { 0x07, 0xa8 }, | |
1301 | /* The ratio of 0x0c and 0x0d controls the white point */ | |
1302 | { 0x0c, 0x24 }, | |
1303 | { 0x0d, 0x24 }, | |
1304 | { 0x0f, 0x15 }, /* COMS */ | |
1305 | { 0x10, 0x75 }, /* AEC Exposure time */ | |
1306 | { 0x12, 0x24 }, /* Enable AGC */ | |
1307 | { 0x14, 0x04 }, | |
1308 | /* 0x16: 0x06 helps frame stability with moving objects */ | |
1309 | { 0x16, 0x06 }, | |
1310 | /* { 0x20, 0x30 }, * Aperture correction enable */ | |
1311 | { 0x26, 0xb2 }, /* BLC enable */ | |
1312 | /* 0x28: 0x05 Selects RGB format if RGB on */ | |
1313 | { 0x28, 0x05 }, | |
1314 | { 0x2a, 0x04 }, /* Disable framerate adjust */ | |
1315 | /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */ | |
ae49c404 | 1316 | { 0x2d, 0x85 }, |
4202f71c JFM |
1317 | { 0x33, 0xa0 }, /* Color Processing Parameter */ |
1318 | { 0x34, 0xd2 }, /* Max A/D range */ | |
1319 | { 0x38, 0x8b }, | |
1320 | { 0x39, 0x40 }, | |
1321 | ||
1322 | { 0x3c, 0x39 }, /* Enable AEC mode changing */ | |
1323 | { 0x3c, 0x3c }, /* Change AEC mode */ | |
1324 | { 0x3c, 0x24 }, /* Disable AEC mode changing */ | |
1325 | ||
1326 | { 0x3d, 0x80 }, | |
1327 | /* These next two registers (0x4a, 0x4b) are undocumented. | |
1328 | * They control the color balance */ | |
1329 | { 0x4a, 0x80 }, | |
1330 | { 0x4b, 0x80 }, | |
1331 | { 0x4d, 0xd2 }, /* This reduces noise a bit */ | |
1332 | { 0x4e, 0xc1 }, | |
1333 | { 0x4f, 0x04 }, | |
1334 | /* Do 50-53 have any effect? */ | |
1335 | /* Toggle 0x12[2] off and on here? */ | |
1336 | }; | |
1337 | ||
1338 | static const struct ov_i2c_regvals norm_6x30[] = { | |
1339 | { 0x12, 0x80 }, /* Reset */ | |
1340 | { 0x00, 0x1f }, /* Gain */ | |
1341 | { 0x01, 0x99 }, /* Blue gain */ | |
1342 | { 0x02, 0x7c }, /* Red gain */ | |
1343 | { 0x03, 0xc0 }, /* Saturation */ | |
1344 | { 0x05, 0x0a }, /* Contrast */ | |
1345 | { 0x06, 0x95 }, /* Brightness */ | |
1346 | { 0x07, 0x2d }, /* Sharpness */ | |
1347 | { 0x0c, 0x20 }, | |
1348 | { 0x0d, 0x20 }, | |
02ab18b0 | 1349 | { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */ |
4202f71c JFM |
1350 | { 0x0f, 0x05 }, |
1351 | { 0x10, 0x9a }, | |
1352 | { 0x11, 0x00 }, /* Pixel clock = fastest */ | |
1353 | { 0x12, 0x24 }, /* Enable AGC and AWB */ | |
1354 | { 0x13, 0x21 }, | |
1355 | { 0x14, 0x80 }, | |
1356 | { 0x15, 0x01 }, | |
1357 | { 0x16, 0x03 }, | |
1358 | { 0x17, 0x38 }, | |
1359 | { 0x18, 0xea }, | |
1360 | { 0x19, 0x04 }, | |
1361 | { 0x1a, 0x93 }, | |
1362 | { 0x1b, 0x00 }, | |
1363 | { 0x1e, 0xc4 }, | |
1364 | { 0x1f, 0x04 }, | |
1365 | { 0x20, 0x20 }, | |
1366 | { 0x21, 0x10 }, | |
1367 | { 0x22, 0x88 }, | |
1368 | { 0x23, 0xc0 }, /* Crystal circuit power level */ | |
1369 | { 0x25, 0x9a }, /* Increase AEC black ratio */ | |
1370 | { 0x26, 0xb2 }, /* BLC enable */ | |
1371 | { 0x27, 0xa2 }, | |
1372 | { 0x28, 0x00 }, | |
1373 | { 0x29, 0x00 }, | |
1374 | { 0x2a, 0x84 }, /* 60 Hz power */ | |
1375 | { 0x2b, 0xa8 }, /* 60 Hz power */ | |
1376 | { 0x2c, 0xa0 }, | |
1377 | { 0x2d, 0x95 }, /* Enable auto-brightness */ | |
1378 | { 0x2e, 0x88 }, | |
1379 | { 0x33, 0x26 }, | |
1380 | { 0x34, 0x03 }, | |
1381 | { 0x36, 0x8f }, | |
1382 | { 0x37, 0x80 }, | |
1383 | { 0x38, 0x83 }, | |
1384 | { 0x39, 0x80 }, | |
1385 | { 0x3a, 0x0f }, | |
1386 | { 0x3b, 0x3c }, | |
1387 | { 0x3c, 0x1a }, | |
1388 | { 0x3d, 0x80 }, | |
1389 | { 0x3e, 0x80 }, | |
1390 | { 0x3f, 0x0e }, | |
1391 | { 0x40, 0x00 }, /* White bal */ | |
1392 | { 0x41, 0x00 }, /* White bal */ | |
1393 | { 0x42, 0x80 }, | |
1394 | { 0x43, 0x3f }, /* White bal */ | |
1395 | { 0x44, 0x80 }, | |
1396 | { 0x45, 0x20 }, | |
1397 | { 0x46, 0x20 }, | |
1398 | { 0x47, 0x80 }, | |
1399 | { 0x48, 0x7f }, | |
1400 | { 0x49, 0x00 }, | |
1401 | { 0x4a, 0x00 }, | |
1402 | { 0x4b, 0x80 }, | |
1403 | { 0x4c, 0xd0 }, | |
1404 | { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */ | |
1405 | { 0x4e, 0x40 }, | |
1406 | { 0x4f, 0x07 }, /* UV avg., col. killer: max */ | |
1407 | { 0x50, 0xff }, | |
1408 | { 0x54, 0x23 }, /* Max AGC gain: 18dB */ | |
1409 | { 0x55, 0xff }, | |
1410 | { 0x56, 0x12 }, | |
1411 | { 0x57, 0x81 }, | |
1412 | { 0x58, 0x75 }, | |
1413 | { 0x59, 0x01 }, /* AGC dark current comp.: +1 */ | |
1414 | { 0x5a, 0x2c }, | |
1415 | { 0x5b, 0x0f }, /* AWB chrominance levels */ | |
1416 | { 0x5c, 0x10 }, | |
1417 | { 0x3d, 0x80 }, | |
1418 | { 0x27, 0xa6 }, | |
1419 | { 0x12, 0x20 }, /* Toggle AWB */ | |
1420 | { 0x12, 0x24 }, | |
1421 | }; | |
1422 | ||
1423 | /* Lawrence Glaister <lg@jfm.bc.ca> reports: | |
1424 | * | |
1425 | * Register 0x0f in the 7610 has the following effects: | |
1426 | * | |
1427 | * 0x85 (AEC method 1): Best overall, good contrast range | |
1428 | * 0x45 (AEC method 2): Very overexposed | |
1429 | * 0xa5 (spec sheet default): Ok, but the black level is | |
1430 | * shifted resulting in loss of contrast | |
1431 | * 0x05 (old driver setting): very overexposed, too much | |
1432 | * contrast | |
1433 | */ | |
1434 | static const struct ov_i2c_regvals norm_7610[] = { | |
1435 | { 0x10, 0xff }, | |
1436 | { 0x16, 0x06 }, | |
1437 | { 0x28, 0x24 }, | |
1438 | { 0x2b, 0xac }, | |
1439 | { 0x12, 0x00 }, | |
1440 | { 0x38, 0x81 }, | |
1441 | { 0x28, 0x24 }, /* 0c */ | |
1442 | { 0x0f, 0x85 }, /* lg's setting */ | |
1443 | { 0x15, 0x01 }, | |
1444 | { 0x20, 0x1c }, | |
1445 | { 0x23, 0x2a }, | |
1446 | { 0x24, 0x10 }, | |
1447 | { 0x25, 0x8a }, | |
1448 | { 0x26, 0xa2 }, | |
1449 | { 0x27, 0xc2 }, | |
1450 | { 0x2a, 0x04 }, | |
1451 | { 0x2c, 0xfe }, | |
1452 | { 0x2d, 0x93 }, | |
1453 | { 0x30, 0x71 }, | |
1454 | { 0x31, 0x60 }, | |
1455 | { 0x32, 0x26 }, | |
1456 | { 0x33, 0x20 }, | |
1457 | { 0x34, 0x48 }, | |
1458 | { 0x12, 0x24 }, | |
1459 | { 0x11, 0x01 }, | |
1460 | { 0x0c, 0x24 }, | |
1461 | { 0x0d, 0x24 }, | |
1462 | }; | |
1463 | ||
1464 | static const struct ov_i2c_regvals norm_7620[] = { | |
a511ba94 | 1465 | { 0x12, 0x80 }, /* reset */ |
4202f71c JFM |
1466 | { 0x00, 0x00 }, /* gain */ |
1467 | { 0x01, 0x80 }, /* blue gain */ | |
1468 | { 0x02, 0x80 }, /* red gain */ | |
1469 | { 0x03, 0xc0 }, /* OV7670_REG_VREF */ | |
1470 | { 0x06, 0x60 }, | |
1471 | { 0x07, 0x00 }, | |
1472 | { 0x0c, 0x24 }, | |
1473 | { 0x0c, 0x24 }, | |
1474 | { 0x0d, 0x24 }, | |
1475 | { 0x11, 0x01 }, | |
1476 | { 0x12, 0x24 }, | |
1477 | { 0x13, 0x01 }, | |
1478 | { 0x14, 0x84 }, | |
1479 | { 0x15, 0x01 }, | |
1480 | { 0x16, 0x03 }, | |
1481 | { 0x17, 0x2f }, | |
1482 | { 0x18, 0xcf }, | |
1483 | { 0x19, 0x06 }, | |
1484 | { 0x1a, 0xf5 }, | |
1485 | { 0x1b, 0x00 }, | |
1486 | { 0x20, 0x18 }, | |
1487 | { 0x21, 0x80 }, | |
1488 | { 0x22, 0x80 }, | |
1489 | { 0x23, 0x00 }, | |
1490 | { 0x26, 0xa2 }, | |
1491 | { 0x27, 0xea }, | |
b282d873 | 1492 | { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */ |
4202f71c JFM |
1493 | { 0x29, 0x00 }, |
1494 | { 0x2a, 0x10 }, | |
1495 | { 0x2b, 0x00 }, | |
1496 | { 0x2c, 0x88 }, | |
1497 | { 0x2d, 0x91 }, | |
1498 | { 0x2e, 0x80 }, | |
1499 | { 0x2f, 0x44 }, | |
1500 | { 0x60, 0x27 }, | |
1501 | { 0x61, 0x02 }, | |
1502 | { 0x62, 0x5f }, | |
1503 | { 0x63, 0xd5 }, | |
1504 | { 0x64, 0x57 }, | |
1505 | { 0x65, 0x83 }, | |
1506 | { 0x66, 0x55 }, | |
1507 | { 0x67, 0x92 }, | |
1508 | { 0x68, 0xcf }, | |
1509 | { 0x69, 0x76 }, | |
1510 | { 0x6a, 0x22 }, | |
1511 | { 0x6b, 0x00 }, | |
1512 | { 0x6c, 0x02 }, | |
1513 | { 0x6d, 0x44 }, | |
1514 | { 0x6e, 0x80 }, | |
1515 | { 0x6f, 0x1d }, | |
1516 | { 0x70, 0x8b }, | |
1517 | { 0x71, 0x00 }, | |
1518 | { 0x72, 0x14 }, | |
1519 | { 0x73, 0x54 }, | |
1520 | { 0x74, 0x00 }, | |
1521 | { 0x75, 0x8e }, | |
1522 | { 0x76, 0x00 }, | |
1523 | { 0x77, 0xff }, | |
1524 | { 0x78, 0x80 }, | |
1525 | { 0x79, 0x80 }, | |
1526 | { 0x7a, 0x80 }, | |
1527 | { 0x7b, 0xe2 }, | |
1528 | { 0x7c, 0x00 }, | |
1529 | }; | |
1530 | ||
1531 | /* 7640 and 7648. The defaults should be OK for most registers. */ | |
1532 | static const struct ov_i2c_regvals norm_7640[] = { | |
1533 | { 0x12, 0x80 }, | |
1534 | { 0x12, 0x14 }, | |
1535 | }; | |
1536 | ||
1537 | /* 7670. Defaults taken from OmniVision provided data, | |
1538 | * as provided by Jonathan Corbet of OLPC */ | |
1539 | static const struct ov_i2c_regvals norm_7670[] = { | |
1540 | { OV7670_REG_COM7, OV7670_COM7_RESET }, | |
1541 | { OV7670_REG_TSLB, 0x04 }, /* OV */ | |
1542 | { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */ | |
1543 | { OV7670_REG_CLKRC, 0x01 }, | |
1544 | /* | |
1545 | * Set the hardware window. These values from OV don't entirely | |
1546 | * make sense - hstop is less than hstart. But they work... | |
1547 | */ | |
1548 | { OV7670_REG_HSTART, 0x13 }, | |
1549 | { OV7670_REG_HSTOP, 0x01 }, | |
1550 | { OV7670_REG_HREF, 0xb6 }, | |
1551 | { OV7670_REG_VSTART, 0x02 }, | |
1552 | { OV7670_REG_VSTOP, 0x7a }, | |
1553 | { OV7670_REG_VREF, 0x0a }, | |
1554 | ||
ac40b1fa JFM |
1555 | { OV7670_REG_COM3, 0x00 }, |
1556 | { OV7670_REG_COM14, 0x00 }, | |
4202f71c JFM |
1557 | /* Mystery scaling numbers */ |
1558 | { 0x70, 0x3a }, | |
1559 | { 0x71, 0x35 }, | |
1560 | { 0x72, 0x11 }, | |
1561 | { 0x73, 0xf0 }, | |
1562 | { 0xa2, 0x02 }, | |
1563 | /* { OV7670_REG_COM10, 0x0 }, */ | |
1564 | ||
1565 | /* Gamma curve values */ | |
1566 | { 0x7a, 0x20 }, | |
1567 | { 0x7b, 0x10 }, | |
1568 | { 0x7c, 0x1e }, | |
1569 | { 0x7d, 0x35 }, | |
1570 | { 0x7e, 0x5a }, | |
1571 | { 0x7f, 0x69 }, | |
1572 | { 0x80, 0x76 }, | |
1573 | { 0x81, 0x80 }, | |
1574 | { 0x82, 0x88 }, | |
1575 | { 0x83, 0x8f }, | |
1576 | { 0x84, 0x96 }, | |
1577 | { 0x85, 0xa3 }, | |
1578 | { 0x86, 0xaf }, | |
1579 | { 0x87, 0xc4 }, | |
1580 | { 0x88, 0xd7 }, | |
1581 | { 0x89, 0xe8 }, | |
1582 | ||
1583 | /* AGC and AEC parameters. Note we start by disabling those features, | |
1584 | then turn them only after tweaking the values. */ | |
1585 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
1586 | | OV7670_COM8_AECSTEP | |
1587 | | OV7670_COM8_BFILT }, | |
ac40b1fa JFM |
1588 | { OV7670_REG_GAIN, 0x00 }, |
1589 | { OV7670_REG_AECH, 0x00 }, | |
4202f71c JFM |
1590 | { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */ |
1591 | { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */ | |
1592 | { OV7670_REG_BD50MAX, 0x05 }, | |
1593 | { OV7670_REG_BD60MAX, 0x07 }, | |
1594 | { OV7670_REG_AEW, 0x95 }, | |
1595 | { OV7670_REG_AEB, 0x33 }, | |
1596 | { OV7670_REG_VPT, 0xe3 }, | |
1597 | { OV7670_REG_HAECC1, 0x78 }, | |
1598 | { OV7670_REG_HAECC2, 0x68 }, | |
1599 | { 0xa1, 0x03 }, /* magic */ | |
1600 | { OV7670_REG_HAECC3, 0xd8 }, | |
1601 | { OV7670_REG_HAECC4, 0xd8 }, | |
1602 | { OV7670_REG_HAECC5, 0xf0 }, | |
1603 | { OV7670_REG_HAECC6, 0x90 }, | |
1604 | { OV7670_REG_HAECC7, 0x94 }, | |
1605 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
1606 | | OV7670_COM8_AECSTEP | |
1607 | | OV7670_COM8_BFILT | |
1608 | | OV7670_COM8_AGC | |
1609 | | OV7670_COM8_AEC }, | |
1610 | ||
1611 | /* Almost all of these are magic "reserved" values. */ | |
1612 | { OV7670_REG_COM5, 0x61 }, | |
1613 | { OV7670_REG_COM6, 0x4b }, | |
1614 | { 0x16, 0x02 }, | |
1615 | { OV7670_REG_MVFP, 0x07 }, | |
1616 | { 0x21, 0x02 }, | |
1617 | { 0x22, 0x91 }, | |
1618 | { 0x29, 0x07 }, | |
1619 | { 0x33, 0x0b }, | |
1620 | { 0x35, 0x0b }, | |
1621 | { 0x37, 0x1d }, | |
1622 | { 0x38, 0x71 }, | |
1623 | { 0x39, 0x2a }, | |
1624 | { OV7670_REG_COM12, 0x78 }, | |
1625 | { 0x4d, 0x40 }, | |
1626 | { 0x4e, 0x20 }, | |
ac40b1fa | 1627 | { OV7670_REG_GFIX, 0x00 }, |
4202f71c JFM |
1628 | { 0x6b, 0x4a }, |
1629 | { 0x74, 0x10 }, | |
1630 | { 0x8d, 0x4f }, | |
ac40b1fa JFM |
1631 | { 0x8e, 0x00 }, |
1632 | { 0x8f, 0x00 }, | |
1633 | { 0x90, 0x00 }, | |
1634 | { 0x91, 0x00 }, | |
1635 | { 0x96, 0x00 }, | |
1636 | { 0x9a, 0x00 }, | |
4202f71c JFM |
1637 | { 0xb0, 0x84 }, |
1638 | { 0xb1, 0x0c }, | |
1639 | { 0xb2, 0x0e }, | |
1640 | { 0xb3, 0x82 }, | |
1641 | { 0xb8, 0x0a }, | |
1642 | ||
1643 | /* More reserved magic, some of which tweaks white balance */ | |
1644 | { 0x43, 0x0a }, | |
1645 | { 0x44, 0xf0 }, | |
1646 | { 0x45, 0x34 }, | |
1647 | { 0x46, 0x58 }, | |
1648 | { 0x47, 0x28 }, | |
1649 | { 0x48, 0x3a }, | |
1650 | { 0x59, 0x88 }, | |
1651 | { 0x5a, 0x88 }, | |
1652 | { 0x5b, 0x44 }, | |
1653 | { 0x5c, 0x67 }, | |
1654 | { 0x5d, 0x49 }, | |
1655 | { 0x5e, 0x0e }, | |
1656 | { 0x6c, 0x0a }, | |
1657 | { 0x6d, 0x55 }, | |
1658 | { 0x6e, 0x11 }, | |
1659 | { 0x6f, 0x9f }, | |
1660 | /* "9e for advance AWB" */ | |
1661 | { 0x6a, 0x40 }, | |
1662 | { OV7670_REG_BLUE, 0x40 }, | |
1663 | { OV7670_REG_RED, 0x60 }, | |
1664 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
1665 | | OV7670_COM8_AECSTEP | |
1666 | | OV7670_COM8_BFILT | |
1667 | | OV7670_COM8_AGC | |
1668 | | OV7670_COM8_AEC | |
1669 | | OV7670_COM8_AWB }, | |
1670 | ||
1671 | /* Matrix coefficients */ | |
1672 | { 0x4f, 0x80 }, | |
1673 | { 0x50, 0x80 }, | |
ac40b1fa | 1674 | { 0x51, 0x00 }, |
4202f71c JFM |
1675 | { 0x52, 0x22 }, |
1676 | { 0x53, 0x5e }, | |
1677 | { 0x54, 0x80 }, | |
1678 | { 0x58, 0x9e }, | |
1679 | ||
1680 | { OV7670_REG_COM16, OV7670_COM16_AWBGAIN }, | |
ac40b1fa | 1681 | { OV7670_REG_EDGE, 0x00 }, |
4202f71c JFM |
1682 | { 0x75, 0x05 }, |
1683 | { 0x76, 0xe1 }, | |
ac40b1fa | 1684 | { 0x4c, 0x00 }, |
4202f71c JFM |
1685 | { 0x77, 0x01 }, |
1686 | { OV7670_REG_COM13, OV7670_COM13_GAMMA | |
1687 | | OV7670_COM13_UVSAT | |
1688 | | 2}, /* was 3 */ | |
1689 | { 0x4b, 0x09 }, | |
1690 | { 0xc9, 0x60 }, | |
1691 | { OV7670_REG_COM16, 0x38 }, | |
1692 | { 0x56, 0x40 }, | |
1693 | ||
1694 | { 0x34, 0x11 }, | |
1695 | { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO }, | |
1696 | { 0xa4, 0x88 }, | |
ac40b1fa | 1697 | { 0x96, 0x00 }, |
4202f71c JFM |
1698 | { 0x97, 0x30 }, |
1699 | { 0x98, 0x20 }, | |
1700 | { 0x99, 0x30 }, | |
1701 | { 0x9a, 0x84 }, | |
1702 | { 0x9b, 0x29 }, | |
1703 | { 0x9c, 0x03 }, | |
1704 | { 0x9d, 0x4c }, | |
1705 | { 0x9e, 0x3f }, | |
1706 | { 0x78, 0x04 }, | |
1707 | ||
1708 | /* Extra-weird stuff. Some sort of multiplexor register */ | |
1709 | { 0x79, 0x01 }, | |
1710 | { 0xc8, 0xf0 }, | |
1711 | { 0x79, 0x0f }, | |
1712 | { 0xc8, 0x00 }, | |
1713 | { 0x79, 0x10 }, | |
1714 | { 0xc8, 0x7e }, | |
1715 | { 0x79, 0x0a }, | |
1716 | { 0xc8, 0x80 }, | |
1717 | { 0x79, 0x0b }, | |
1718 | { 0xc8, 0x01 }, | |
1719 | { 0x79, 0x0c }, | |
1720 | { 0xc8, 0x0f }, | |
1721 | { 0x79, 0x0d }, | |
1722 | { 0xc8, 0x20 }, | |
1723 | { 0x79, 0x09 }, | |
1724 | { 0xc8, 0x80 }, | |
1725 | { 0x79, 0x02 }, | |
1726 | { 0xc8, 0xc0 }, | |
1727 | { 0x79, 0x03 }, | |
1728 | { 0xc8, 0x40 }, | |
1729 | { 0x79, 0x05 }, | |
1730 | { 0xc8, 0x30 }, | |
1731 | { 0x79, 0x26 }, | |
1732 | }; | |
1733 | ||
1734 | static const struct ov_i2c_regvals norm_8610[] = { | |
1735 | { 0x12, 0x80 }, | |
1736 | { 0x00, 0x00 }, | |
1737 | { 0x01, 0x80 }, | |
1738 | { 0x02, 0x80 }, | |
1739 | { 0x03, 0xc0 }, | |
1740 | { 0x04, 0x30 }, | |
1741 | { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
1742 | { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */ | |
1743 | { 0x0a, 0x86 }, | |
1744 | { 0x0b, 0xb0 }, | |
1745 | { 0x0c, 0x20 }, | |
1746 | { 0x0d, 0x20 }, | |
1747 | { 0x11, 0x01 }, | |
1748 | { 0x12, 0x25 }, | |
1749 | { 0x13, 0x01 }, | |
1750 | { 0x14, 0x04 }, | |
1751 | { 0x15, 0x01 }, /* Lin and Win think different about UV order */ | |
1752 | { 0x16, 0x03 }, | |
1753 | { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */ | |
1754 | { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */ | |
1755 | { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */ | |
1756 | { 0x1a, 0xf5 }, | |
1757 | { 0x1b, 0x00 }, | |
1758 | { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */ | |
1759 | { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */ | |
1760 | { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */ | |
1761 | { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */ | |
1762 | { 0x26, 0xa2 }, | |
1763 | { 0x27, 0xea }, | |
1764 | { 0x28, 0x00 }, | |
1765 | { 0x29, 0x00 }, | |
1766 | { 0x2a, 0x80 }, | |
1767 | { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */ | |
1768 | { 0x2c, 0xac }, | |
1769 | { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */ | |
1770 | { 0x2e, 0x80 }, | |
1771 | { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */ | |
1772 | { 0x4c, 0x00 }, | |
1773 | { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
1774 | { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */ | |
1775 | { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */ | |
1776 | { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */ | |
1777 | { 0x63, 0xff }, | |
1778 | { 0x64, 0x53 }, /* new windrv 090403 says 0x57, | |
1779 | * maybe thats wrong */ | |
1780 | { 0x65, 0x00 }, | |
1781 | { 0x66, 0x55 }, | |
1782 | { 0x67, 0xb0 }, | |
1783 | { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */ | |
1784 | { 0x69, 0x02 }, | |
1785 | { 0x6a, 0x22 }, | |
1786 | { 0x6b, 0x00 }, | |
1787 | { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but | |
1788 | * deleting bit7 colors the first images red */ | |
1789 | { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
1790 | { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
1791 | { 0x6f, 0x01 }, | |
1792 | { 0x70, 0x8b }, | |
1793 | { 0x71, 0x00 }, | |
1794 | { 0x72, 0x14 }, | |
1795 | { 0x73, 0x54 }, | |
1796 | { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */ | |
1797 | { 0x75, 0x0e }, | |
1798 | { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */ | |
1799 | { 0x77, 0xff }, | |
1800 | { 0x78, 0x80 }, | |
1801 | { 0x79, 0x80 }, | |
1802 | { 0x7a, 0x80 }, | |
1803 | { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */ | |
1804 | { 0x7c, 0x00 }, | |
1805 | { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */ | |
1806 | { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */ | |
1807 | { 0x7f, 0xfb }, | |
1808 | { 0x80, 0x28 }, | |
1809 | { 0x81, 0x00 }, | |
1810 | { 0x82, 0x23 }, | |
1811 | { 0x83, 0x0b }, | |
1812 | { 0x84, 0x00 }, | |
1813 | { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */ | |
1814 | { 0x86, 0xc9 }, | |
1815 | { 0x87, 0x00 }, | |
1816 | { 0x88, 0x00 }, | |
1817 | { 0x89, 0x01 }, | |
1818 | { 0x12, 0x20 }, | |
1819 | { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */ | |
1820 | }; | |
1821 | ||
6a7eba24 JFM |
1822 | static unsigned char ov7670_abs_to_sm(unsigned char v) |
1823 | { | |
1824 | if (v > 127) | |
1825 | return v & 0x7f; | |
1826 | return (128 - v) | 0x80; | |
1827 | } | |
1828 | ||
1829 | /* Write a OV519 register */ | |
a511ba94 | 1830 | static int reg_w(struct sd *sd, __u16 index, __u16 value) |
6a7eba24 | 1831 | { |
a511ba94 | 1832 | int ret, req = 0; |
b46aaa02 HG |
1833 | |
1834 | switch (sd->bridge) { | |
1835 | case BRIDGE_OV511: | |
1836 | case BRIDGE_OV511PLUS: | |
1837 | req = 2; | |
1838 | break; | |
1839 | case BRIDGE_OVFX2: | |
a511ba94 HG |
1840 | req = 0x0a; |
1841 | /* fall through */ | |
1842 | case BRIDGE_W9968CF: | |
b46aaa02 HG |
1843 | ret = usb_control_msg(sd->gspca_dev.dev, |
1844 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
a511ba94 | 1845 | req, |
b46aaa02 | 1846 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
a511ba94 | 1847 | value, index, NULL, 0, 500); |
b46aaa02 HG |
1848 | goto leave; |
1849 | default: | |
1850 | req = 1; | |
1851 | } | |
6a7eba24 | 1852 | |
739570bb | 1853 | sd->gspca_dev.usb_buf[0] = value; |
6a7eba24 JFM |
1854 | ret = usb_control_msg(sd->gspca_dev.dev, |
1855 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
49809d6a | 1856 | req, |
6a7eba24 JFM |
1857 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
1858 | 0, index, | |
739570bb | 1859 | sd->gspca_dev.usb_buf, 1, 500); |
b46aaa02 | 1860 | leave: |
a511ba94 | 1861 | if (ret < 0) { |
0b656321 | 1862 | err("Write reg 0x%04x -> [0x%02x] failed", |
a511ba94 HG |
1863 | value, index); |
1864 | return ret; | |
1865 | } | |
1866 | ||
1867 | PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index); | |
1868 | return 0; | |
6a7eba24 JFM |
1869 | } |
1870 | ||
a511ba94 | 1871 | /* Read from a OV519 register, note not valid for the w9968cf!! */ |
6a7eba24 JFM |
1872 | /* returns: negative is error, pos or zero is data */ |
1873 | static int reg_r(struct sd *sd, __u16 index) | |
1874 | { | |
1875 | int ret; | |
b46aaa02 HG |
1876 | int req; |
1877 | ||
1878 | switch (sd->bridge) { | |
1879 | case BRIDGE_OV511: | |
1880 | case BRIDGE_OV511PLUS: | |
1881 | req = 3; | |
1882 | break; | |
1883 | case BRIDGE_OVFX2: | |
1884 | req = 0x0b; | |
1885 | break; | |
1886 | default: | |
1887 | req = 1; | |
1888 | } | |
6a7eba24 JFM |
1889 | |
1890 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1891 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
49809d6a | 1892 | req, |
6a7eba24 | 1893 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
739570bb | 1894 | 0, index, sd->gspca_dev.usb_buf, 1, 500); |
6a7eba24 | 1895 | |
a511ba94 | 1896 | if (ret >= 0) { |
739570bb | 1897 | ret = sd->gspca_dev.usb_buf[0]; |
a511ba94 HG |
1898 | PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret); |
1899 | } else | |
0b656321 | 1900 | err("Read reg [0x%02x] failed", index); |
a511ba94 | 1901 | |
6a7eba24 JFM |
1902 | return ret; |
1903 | } | |
1904 | ||
1905 | /* Read 8 values from a OV519 register */ | |
1906 | static int reg_r8(struct sd *sd, | |
a5ae2062 | 1907 | __u16 index) |
6a7eba24 JFM |
1908 | { |
1909 | int ret; | |
6a7eba24 JFM |
1910 | |
1911 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1912 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
1913 | 1, /* REQ_IO */ | |
1914 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
739570bb | 1915 | 0, index, sd->gspca_dev.usb_buf, 8, 500); |
6a7eba24 JFM |
1916 | |
1917 | if (ret >= 0) | |
739570bb | 1918 | ret = sd->gspca_dev.usb_buf[0]; |
6a7eba24 | 1919 | else |
0b656321 | 1920 | err("Read reg 8 [0x%02x] failed", index); |
a511ba94 | 1921 | |
6a7eba24 JFM |
1922 | return ret; |
1923 | } | |
1924 | ||
1925 | /* | |
1926 | * Writes bits at positions specified by mask to an OV51x reg. Bits that are in | |
1927 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
1928 | * that are in the same position as 0's in "mask" are preserved, regardless | |
1929 | * of their respective state in "value". | |
1930 | */ | |
1931 | static int reg_w_mask(struct sd *sd, | |
1932 | __u16 index, | |
1933 | __u8 value, | |
1934 | __u8 mask) | |
1935 | { | |
1936 | int ret; | |
1937 | __u8 oldval; | |
1938 | ||
1939 | if (mask != 0xff) { | |
1940 | value &= mask; /* Enforce mask on value */ | |
1941 | ret = reg_r(sd, index); | |
1942 | if (ret < 0) | |
1943 | return ret; | |
1944 | ||
1945 | oldval = ret & ~mask; /* Clear the masked bits */ | |
1946 | value |= oldval; /* Set the desired bits */ | |
1947 | } | |
1948 | return reg_w(sd, index, value); | |
1949 | } | |
1950 | ||
49809d6a HG |
1951 | /* |
1952 | * Writes multiple (n) byte value to a single register. Only valid with certain | |
1953 | * registers (0x30 and 0xc4 - 0xce). | |
1954 | */ | |
1955 | static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n) | |
1956 | { | |
1957 | int ret; | |
1958 | ||
83955556 | 1959 | *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value); |
49809d6a HG |
1960 | |
1961 | ret = usb_control_msg(sd->gspca_dev.dev, | |
1962 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
1963 | 1 /* REG_IO */, | |
1964 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
1965 | 0, index, | |
1966 | sd->gspca_dev.usb_buf, n, 500); | |
a511ba94 | 1967 | if (ret < 0) { |
0b656321 | 1968 | err("Write reg32 [%02x] %08x failed", index, value); |
a511ba94 HG |
1969 | return ret; |
1970 | } | |
1971 | ||
1972 | return 0; | |
49809d6a HG |
1973 | } |
1974 | ||
1876bb92 HG |
1975 | static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value) |
1976 | { | |
1977 | int rc, retries; | |
1978 | ||
1979 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); | |
1980 | ||
1981 | /* Three byte write cycle */ | |
1982 | for (retries = 6; ; ) { | |
1983 | /* Select camera register */ | |
1984 | rc = reg_w(sd, R51x_I2C_SADDR_3, reg); | |
1985 | if (rc < 0) | |
1986 | return rc; | |
1987 | ||
1988 | /* Write "value" to I2C data port of OV511 */ | |
1989 | rc = reg_w(sd, R51x_I2C_DATA, value); | |
1990 | if (rc < 0) | |
1991 | return rc; | |
1992 | ||
1993 | /* Initiate 3-byte write cycle */ | |
1994 | rc = reg_w(sd, R511_I2C_CTL, 0x01); | |
1995 | if (rc < 0) | |
1996 | return rc; | |
1997 | ||
83955556 | 1998 | do { |
1876bb92 | 1999 | rc = reg_r(sd, R511_I2C_CTL); |
83955556 | 2000 | } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ |
1876bb92 HG |
2001 | |
2002 | if (rc < 0) | |
2003 | return rc; | |
2004 | ||
2005 | if ((rc & 2) == 0) /* Ack? */ | |
2006 | break; | |
2007 | if (--retries < 0) { | |
2008 | PDEBUG(D_USBO, "i2c write retries exhausted"); | |
2009 | return -1; | |
2010 | } | |
2011 | } | |
2012 | ||
2013 | return 0; | |
2014 | } | |
2015 | ||
2016 | static int ov511_i2c_r(struct sd *sd, __u8 reg) | |
2017 | { | |
2018 | int rc, value, retries; | |
2019 | ||
2020 | /* Two byte write cycle */ | |
2021 | for (retries = 6; ; ) { | |
2022 | /* Select camera register */ | |
2023 | rc = reg_w(sd, R51x_I2C_SADDR_2, reg); | |
2024 | if (rc < 0) | |
2025 | return rc; | |
2026 | ||
2027 | /* Initiate 2-byte write cycle */ | |
2028 | rc = reg_w(sd, R511_I2C_CTL, 0x03); | |
2029 | if (rc < 0) | |
2030 | return rc; | |
2031 | ||
83955556 | 2032 | do { |
1876bb92 | 2033 | rc = reg_r(sd, R511_I2C_CTL); |
83955556 | 2034 | } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ |
1876bb92 HG |
2035 | |
2036 | if (rc < 0) | |
2037 | return rc; | |
2038 | ||
2039 | if ((rc & 2) == 0) /* Ack? */ | |
2040 | break; | |
2041 | ||
2042 | /* I2C abort */ | |
2043 | reg_w(sd, R511_I2C_CTL, 0x10); | |
2044 | ||
2045 | if (--retries < 0) { | |
2046 | PDEBUG(D_USBI, "i2c write retries exhausted"); | |
2047 | return -1; | |
2048 | } | |
2049 | } | |
2050 | ||
2051 | /* Two byte read cycle */ | |
2052 | for (retries = 6; ; ) { | |
2053 | /* Initiate 2-byte read cycle */ | |
2054 | rc = reg_w(sd, R511_I2C_CTL, 0x05); | |
2055 | if (rc < 0) | |
2056 | return rc; | |
2057 | ||
83955556 | 2058 | do { |
1876bb92 | 2059 | rc = reg_r(sd, R511_I2C_CTL); |
83955556 | 2060 | } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */ |
1876bb92 HG |
2061 | |
2062 | if (rc < 0) | |
2063 | return rc; | |
2064 | ||
2065 | if ((rc & 2) == 0) /* Ack? */ | |
2066 | break; | |
2067 | ||
2068 | /* I2C abort */ | |
2069 | rc = reg_w(sd, R511_I2C_CTL, 0x10); | |
2070 | if (rc < 0) | |
2071 | return rc; | |
2072 | ||
2073 | if (--retries < 0) { | |
2074 | PDEBUG(D_USBI, "i2c read retries exhausted"); | |
2075 | return -1; | |
2076 | } | |
2077 | } | |
2078 | ||
2079 | value = reg_r(sd, R51x_I2C_DATA); | |
2080 | ||
2081 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value); | |
2082 | ||
2083 | /* This is needed to make i2c_w() work */ | |
2084 | rc = reg_w(sd, R511_I2C_CTL, 0x05); | |
2085 | if (rc < 0) | |
2086 | return rc; | |
2087 | ||
2088 | return value; | |
2089 | } | |
49809d6a | 2090 | |
6a7eba24 JFM |
2091 | /* |
2092 | * The OV518 I2C I/O procedure is different, hence, this function. | |
2093 | * This is normally only called from i2c_w(). Note that this function | |
2094 | * always succeeds regardless of whether the sensor is present and working. | |
2095 | */ | |
1876bb92 | 2096 | static int ov518_i2c_w(struct sd *sd, |
6a7eba24 JFM |
2097 | __u8 reg, |
2098 | __u8 value) | |
2099 | { | |
2100 | int rc; | |
2101 | ||
2102 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); | |
2103 | ||
2104 | /* Select camera register */ | |
2105 | rc = reg_w(sd, R51x_I2C_SADDR_3, reg); | |
2106 | if (rc < 0) | |
2107 | return rc; | |
2108 | ||
2109 | /* Write "value" to I2C data port of OV511 */ | |
2110 | rc = reg_w(sd, R51x_I2C_DATA, value); | |
2111 | if (rc < 0) | |
2112 | return rc; | |
2113 | ||
2114 | /* Initiate 3-byte write cycle */ | |
2115 | rc = reg_w(sd, R518_I2C_CTL, 0x01); | |
ac40b1fa JFM |
2116 | if (rc < 0) |
2117 | return rc; | |
6a7eba24 JFM |
2118 | |
2119 | /* wait for write complete */ | |
2120 | msleep(4); | |
6a7eba24 JFM |
2121 | return reg_r8(sd, R518_I2C_CTL); |
2122 | } | |
2123 | ||
2124 | /* | |
2125 | * returns: negative is error, pos or zero is data | |
2126 | * | |
2127 | * The OV518 I2C I/O procedure is different, hence, this function. | |
2128 | * This is normally only called from i2c_r(). Note that this function | |
2129 | * always succeeds regardless of whether the sensor is present and working. | |
2130 | */ | |
1876bb92 | 2131 | static int ov518_i2c_r(struct sd *sd, __u8 reg) |
6a7eba24 JFM |
2132 | { |
2133 | int rc, value; | |
2134 | ||
2135 | /* Select camera register */ | |
2136 | rc = reg_w(sd, R51x_I2C_SADDR_2, reg); | |
2137 | if (rc < 0) | |
2138 | return rc; | |
2139 | ||
2140 | /* Initiate 2-byte write cycle */ | |
2141 | rc = reg_w(sd, R518_I2C_CTL, 0x03); | |
2142 | if (rc < 0) | |
2143 | return rc; | |
2144 | ||
2145 | /* Initiate 2-byte read cycle */ | |
2146 | rc = reg_w(sd, R518_I2C_CTL, 0x05); | |
2147 | if (rc < 0) | |
2148 | return rc; | |
2149 | value = reg_r(sd, R51x_I2C_DATA); | |
2150 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value); | |
2151 | return value; | |
2152 | } | |
2153 | ||
b46aaa02 HG |
2154 | static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value) |
2155 | { | |
2156 | int ret; | |
2157 | ||
2158 | ret = usb_control_msg(sd->gspca_dev.dev, | |
2159 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
2160 | 0x02, | |
2161 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
2162 | (__u16)value, (__u16)reg, NULL, 0, 500); | |
2163 | ||
a511ba94 | 2164 | if (ret < 0) { |
0b656321 | 2165 | err("i2c 0x%02x -> [0x%02x] failed", value, reg); |
a511ba94 HG |
2166 | return ret; |
2167 | } | |
b46aaa02 | 2168 | |
a511ba94 HG |
2169 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); |
2170 | return 0; | |
b46aaa02 HG |
2171 | } |
2172 | ||
2173 | static int ovfx2_i2c_r(struct sd *sd, __u8 reg) | |
2174 | { | |
2175 | int ret; | |
2176 | ||
2177 | ret = usb_control_msg(sd->gspca_dev.dev, | |
2178 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
2179 | 0x03, | |
2180 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
2181 | 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500); | |
2182 | ||
2183 | if (ret >= 0) { | |
2184 | ret = sd->gspca_dev.usb_buf[0]; | |
2185 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret); | |
2186 | } else | |
0b656321 | 2187 | err("i2c read [0x%02x] failed", reg); |
b46aaa02 HG |
2188 | |
2189 | return ret; | |
2190 | } | |
2191 | ||
1876bb92 HG |
2192 | static int i2c_w(struct sd *sd, __u8 reg, __u8 value) |
2193 | { | |
fb1f9020 HG |
2194 | int ret = -1; |
2195 | ||
2196 | if (sd->sensor_reg_cache[reg] == value) | |
2197 | return 0; | |
2198 | ||
1876bb92 HG |
2199 | switch (sd->bridge) { |
2200 | case BRIDGE_OV511: | |
2201 | case BRIDGE_OV511PLUS: | |
fb1f9020 HG |
2202 | ret = ov511_i2c_w(sd, reg, value); |
2203 | break; | |
1876bb92 HG |
2204 | case BRIDGE_OV518: |
2205 | case BRIDGE_OV518PLUS: | |
2206 | case BRIDGE_OV519: | |
fb1f9020 HG |
2207 | ret = ov518_i2c_w(sd, reg, value); |
2208 | break; | |
b46aaa02 | 2209 | case BRIDGE_OVFX2: |
fb1f9020 HG |
2210 | ret = ovfx2_i2c_w(sd, reg, value); |
2211 | break; | |
a511ba94 | 2212 | case BRIDGE_W9968CF: |
fb1f9020 HG |
2213 | ret = w9968cf_i2c_w(sd, reg, value); |
2214 | break; | |
1876bb92 | 2215 | } |
fb1f9020 HG |
2216 | |
2217 | if (ret >= 0) { | |
2218 | /* Up on sensor reset empty the register cache */ | |
2219 | if (reg == 0x12 && (value & 0x80)) | |
2220 | memset(sd->sensor_reg_cache, -1, | |
2221 | sizeof(sd->sensor_reg_cache)); | |
2222 | else | |
2223 | sd->sensor_reg_cache[reg] = value; | |
2224 | } | |
2225 | ||
2226 | return ret; | |
1876bb92 HG |
2227 | } |
2228 | ||
2229 | static int i2c_r(struct sd *sd, __u8 reg) | |
2230 | { | |
8394bcf3 | 2231 | int ret = -1; |
fb1f9020 HG |
2232 | |
2233 | if (sd->sensor_reg_cache[reg] != -1) | |
2234 | return sd->sensor_reg_cache[reg]; | |
2235 | ||
1876bb92 HG |
2236 | switch (sd->bridge) { |
2237 | case BRIDGE_OV511: | |
2238 | case BRIDGE_OV511PLUS: | |
fb1f9020 HG |
2239 | ret = ov511_i2c_r(sd, reg); |
2240 | break; | |
1876bb92 HG |
2241 | case BRIDGE_OV518: |
2242 | case BRIDGE_OV518PLUS: | |
2243 | case BRIDGE_OV519: | |
fb1f9020 HG |
2244 | ret = ov518_i2c_r(sd, reg); |
2245 | break; | |
b46aaa02 | 2246 | case BRIDGE_OVFX2: |
fb1f9020 HG |
2247 | ret = ovfx2_i2c_r(sd, reg); |
2248 | break; | |
a511ba94 | 2249 | case BRIDGE_W9968CF: |
fb1f9020 HG |
2250 | ret = w9968cf_i2c_r(sd, reg); |
2251 | break; | |
1876bb92 | 2252 | } |
fb1f9020 HG |
2253 | |
2254 | if (ret >= 0) | |
2255 | sd->sensor_reg_cache[reg] = ret; | |
2256 | ||
2257 | return ret; | |
1876bb92 HG |
2258 | } |
2259 | ||
6a7eba24 JFM |
2260 | /* Writes bits at positions specified by mask to an I2C reg. Bits that are in |
2261 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
2262 | * that are in the same position as 0's in "mask" are preserved, regardless | |
2263 | * of their respective state in "value". | |
2264 | */ | |
2265 | static int i2c_w_mask(struct sd *sd, | |
2266 | __u8 reg, | |
2267 | __u8 value, | |
2268 | __u8 mask) | |
2269 | { | |
2270 | int rc; | |
2271 | __u8 oldval; | |
2272 | ||
2273 | value &= mask; /* Enforce mask on value */ | |
2274 | rc = i2c_r(sd, reg); | |
2275 | if (rc < 0) | |
2276 | return rc; | |
2277 | oldval = rc & ~mask; /* Clear the masked bits */ | |
2278 | value |= oldval; /* Set the desired bits */ | |
2279 | return i2c_w(sd, reg, value); | |
2280 | } | |
2281 | ||
2282 | /* Temporarily stops OV511 from functioning. Must do this before changing | |
2283 | * registers while the camera is streaming */ | |
2284 | static inline int ov51x_stop(struct sd *sd) | |
2285 | { | |
2286 | PDEBUG(D_STREAM, "stopping"); | |
2287 | sd->stopped = 1; | |
49809d6a HG |
2288 | switch (sd->bridge) { |
2289 | case BRIDGE_OV511: | |
2290 | case BRIDGE_OV511PLUS: | |
2291 | return reg_w(sd, R51x_SYS_RESET, 0x3d); | |
2292 | case BRIDGE_OV518: | |
2293 | case BRIDGE_OV518PLUS: | |
2294 | return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a); | |
2295 | case BRIDGE_OV519: | |
2296 | return reg_w(sd, OV519_SYS_RESET1, 0x0f); | |
b46aaa02 HG |
2297 | case BRIDGE_OVFX2: |
2298 | return reg_w_mask(sd, 0x0f, 0x00, 0x02); | |
a511ba94 | 2299 | case BRIDGE_W9968CF: |
79b35902 | 2300 | return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */ |
49809d6a HG |
2301 | } |
2302 | ||
2303 | return 0; | |
6a7eba24 JFM |
2304 | } |
2305 | ||
2306 | /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not | |
2307 | * actually stopped (for performance). */ | |
2308 | static inline int ov51x_restart(struct sd *sd) | |
2309 | { | |
49809d6a HG |
2310 | int rc; |
2311 | ||
6a7eba24 JFM |
2312 | PDEBUG(D_STREAM, "restarting"); |
2313 | if (!sd->stopped) | |
2314 | return 0; | |
2315 | sd->stopped = 0; | |
2316 | ||
2317 | /* Reinitialize the stream */ | |
49809d6a HG |
2318 | switch (sd->bridge) { |
2319 | case BRIDGE_OV511: | |
2320 | case BRIDGE_OV511PLUS: | |
2321 | return reg_w(sd, R51x_SYS_RESET, 0x00); | |
2322 | case BRIDGE_OV518: | |
2323 | case BRIDGE_OV518PLUS: | |
2324 | rc = reg_w(sd, 0x2f, 0x80); | |
2325 | if (rc < 0) | |
2326 | return rc; | |
2327 | return reg_w(sd, R51x_SYS_RESET, 0x00); | |
2328 | case BRIDGE_OV519: | |
2329 | return reg_w(sd, OV519_SYS_RESET1, 0x00); | |
b46aaa02 HG |
2330 | case BRIDGE_OVFX2: |
2331 | return reg_w_mask(sd, 0x0f, 0x02, 0x02); | |
a511ba94 HG |
2332 | case BRIDGE_W9968CF: |
2333 | return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */ | |
49809d6a HG |
2334 | } |
2335 | ||
2336 | return 0; | |
6a7eba24 JFM |
2337 | } |
2338 | ||
229bb7dc HG |
2339 | static int ov51x_set_slave_ids(struct sd *sd, __u8 slave); |
2340 | ||
6a7eba24 JFM |
2341 | /* This does an initial reset of an OmniVision sensor and ensures that I2C |
2342 | * is synchronized. Returns <0 on failure. | |
2343 | */ | |
229bb7dc | 2344 | static int init_ov_sensor(struct sd *sd, __u8 slave) |
6a7eba24 | 2345 | { |
ac40b1fa | 2346 | int i; |
6a7eba24 | 2347 | |
229bb7dc HG |
2348 | if (ov51x_set_slave_ids(sd, slave) < 0) |
2349 | return -EIO; | |
2350 | ||
6a7eba24 JFM |
2351 | /* Reset the sensor */ |
2352 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
2353 | return -EIO; | |
2354 | ||
2355 | /* Wait for it to initialize */ | |
2356 | msleep(150); | |
2357 | ||
ac40b1fa | 2358 | for (i = 0; i < i2c_detect_tries; i++) { |
6a7eba24 JFM |
2359 | if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f && |
2360 | i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) { | |
ac40b1fa JFM |
2361 | PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i); |
2362 | return 0; | |
6a7eba24 JFM |
2363 | } |
2364 | ||
2365 | /* Reset the sensor */ | |
2366 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
2367 | return -EIO; | |
2368 | /* Wait for it to initialize */ | |
2369 | msleep(150); | |
2370 | /* Dummy read to sync I2C */ | |
2371 | if (i2c_r(sd, 0x00) < 0) | |
2372 | return -EIO; | |
2373 | } | |
ac40b1fa | 2374 | return -EIO; |
6a7eba24 JFM |
2375 | } |
2376 | ||
6a7eba24 JFM |
2377 | /* Set the read and write slave IDs. The "slave" argument is the write slave, |
2378 | * and the read slave will be set to (slave + 1). | |
2379 | * This should not be called from outside the i2c I/O functions. | |
2380 | * Sets I2C read and write slave IDs. Returns <0 for error | |
2381 | */ | |
2382 | static int ov51x_set_slave_ids(struct sd *sd, | |
2383 | __u8 slave) | |
2384 | { | |
2385 | int rc; | |
2386 | ||
a511ba94 HG |
2387 | switch (sd->bridge) { |
2388 | case BRIDGE_OVFX2: | |
b46aaa02 | 2389 | return reg_w(sd, OVFX2_I2C_ADDR, slave); |
a511ba94 HG |
2390 | case BRIDGE_W9968CF: |
2391 | sd->sensor_addr = slave; | |
2392 | return 0; | |
2393 | } | |
b46aaa02 | 2394 | |
6a7eba24 JFM |
2395 | rc = reg_w(sd, R51x_I2C_W_SID, slave); |
2396 | if (rc < 0) | |
2397 | return rc; | |
2398 | return reg_w(sd, R51x_I2C_R_SID, slave + 1); | |
2399 | } | |
2400 | ||
6a7eba24 | 2401 | static int write_regvals(struct sd *sd, |
a5ae2062 | 2402 | const struct ov_regvals *regvals, |
6a7eba24 JFM |
2403 | int n) |
2404 | { | |
2405 | int rc; | |
2406 | ||
2407 | while (--n >= 0) { | |
2408 | rc = reg_w(sd, regvals->reg, regvals->val); | |
2409 | if (rc < 0) | |
2410 | return rc; | |
2411 | regvals++; | |
2412 | } | |
2413 | return 0; | |
2414 | } | |
2415 | ||
2416 | static int write_i2c_regvals(struct sd *sd, | |
a5ae2062 | 2417 | const struct ov_i2c_regvals *regvals, |
6a7eba24 JFM |
2418 | int n) |
2419 | { | |
2420 | int rc; | |
2421 | ||
2422 | while (--n >= 0) { | |
2423 | rc = i2c_w(sd, regvals->reg, regvals->val); | |
2424 | if (rc < 0) | |
2425 | return rc; | |
2426 | regvals++; | |
2427 | } | |
2428 | return 0; | |
2429 | } | |
2430 | ||
2431 | /**************************************************************************** | |
2432 | * | |
2433 | * OV511 and sensor configuration | |
2434 | * | |
2435 | ***************************************************************************/ | |
2436 | ||
635118d5 HG |
2437 | /* This initializes the OV2x10 / OV3610 / OV3620 */ |
2438 | static int ov_hires_configure(struct sd *sd) | |
2439 | { | |
2440 | int high, low; | |
2441 | ||
2442 | if (sd->bridge != BRIDGE_OVFX2) { | |
0b656321 | 2443 | err("error hires sensors only supported with ovfx2"); |
635118d5 HG |
2444 | return -1; |
2445 | } | |
2446 | ||
2447 | PDEBUG(D_PROBE, "starting ov hires configuration"); | |
2448 | ||
2449 | /* Detect sensor (sub)type */ | |
2450 | high = i2c_r(sd, 0x0a); | |
2451 | low = i2c_r(sd, 0x0b); | |
2452 | /* info("%x, %x", high, low); */ | |
2453 | if (high == 0x96 && low == 0x40) { | |
2454 | PDEBUG(D_PROBE, "Sensor is an OV2610"); | |
2455 | sd->sensor = SEN_OV2610; | |
2456 | } else if (high == 0x36 && (low & 0x0f) == 0x00) { | |
2457 | PDEBUG(D_PROBE, "Sensor is an OV3610"); | |
2458 | sd->sensor = SEN_OV3610; | |
2459 | } else { | |
0b656321 | 2460 | err("Error unknown sensor type: 0x%02x%02x", |
635118d5 HG |
2461 | high, low); |
2462 | return -1; | |
2463 | } | |
2464 | ||
2465 | /* Set sensor-specific vars */ | |
2466 | return 0; | |
2467 | } | |
2468 | ||
2469 | ||
6a7eba24 JFM |
2470 | /* This initializes the OV8110, OV8610 sensor. The OV8110 uses |
2471 | * the same register settings as the OV8610, since they are very similar. | |
2472 | */ | |
2473 | static int ov8xx0_configure(struct sd *sd) | |
2474 | { | |
2475 | int rc; | |
6a7eba24 JFM |
2476 | |
2477 | PDEBUG(D_PROBE, "starting ov8xx0 configuration"); | |
2478 | ||
6a7eba24 JFM |
2479 | /* Detect sensor (sub)type */ |
2480 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
2481 | if (rc < 0) { | |
2482 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
2483 | return -1; | |
2484 | } | |
2485 | if ((rc & 3) == 1) { | |
6a7eba24 JFM |
2486 | sd->sensor = SEN_OV8610; |
2487 | } else { | |
0b656321 | 2488 | err("Unknown image sensor version: %d", rc & 3); |
6a7eba24 JFM |
2489 | return -1; |
2490 | } | |
6a7eba24 JFM |
2491 | |
2492 | /* Set sensor-specific vars */ | |
6a7eba24 JFM |
2493 | return 0; |
2494 | } | |
2495 | ||
2496 | /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses | |
2497 | * the same register settings as the OV7610, since they are very similar. | |
2498 | */ | |
2499 | static int ov7xx0_configure(struct sd *sd) | |
2500 | { | |
2501 | int rc, high, low; | |
2502 | ||
6a7eba24 JFM |
2503 | |
2504 | PDEBUG(D_PROBE, "starting OV7xx0 configuration"); | |
2505 | ||
6a7eba24 JFM |
2506 | /* Detect sensor (sub)type */ |
2507 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
2508 | ||
2509 | /* add OV7670 here | |
2510 | * it appears to be wrongly detected as a 7610 by default */ | |
2511 | if (rc < 0) { | |
2512 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
2513 | return -1; | |
2514 | } | |
2515 | if ((rc & 3) == 3) { | |
2516 | /* quick hack to make OV7670s work */ | |
2517 | high = i2c_r(sd, 0x0a); | |
2518 | low = i2c_r(sd, 0x0b); | |
2519 | /* info("%x, %x", high, low); */ | |
2520 | if (high == 0x76 && low == 0x73) { | |
2521 | PDEBUG(D_PROBE, "Sensor is an OV7670"); | |
2522 | sd->sensor = SEN_OV7670; | |
2523 | } else { | |
2524 | PDEBUG(D_PROBE, "Sensor is an OV7610"); | |
2525 | sd->sensor = SEN_OV7610; | |
2526 | } | |
2527 | } else if ((rc & 3) == 1) { | |
2528 | /* I don't know what's different about the 76BE yet. */ | |
b282d873 | 2529 | if (i2c_r(sd, 0x15) & 1) { |
6a7eba24 | 2530 | PDEBUG(D_PROBE, "Sensor is an OV7620AE"); |
859cc470 | 2531 | sd->sensor = SEN_OV7620AE; |
b282d873 | 2532 | } else { |
6a7eba24 | 2533 | PDEBUG(D_PROBE, "Sensor is an OV76BE"); |
b282d873 HG |
2534 | sd->sensor = SEN_OV76BE; |
2535 | } | |
6a7eba24 JFM |
2536 | } else if ((rc & 3) == 0) { |
2537 | /* try to read product id registers */ | |
2538 | high = i2c_r(sd, 0x0a); | |
2539 | if (high < 0) { | |
2540 | PDEBUG(D_ERR, "Error detecting camera chip PID"); | |
2541 | return high; | |
2542 | } | |
2543 | low = i2c_r(sd, 0x0b); | |
2544 | if (low < 0) { | |
2545 | PDEBUG(D_ERR, "Error detecting camera chip VER"); | |
2546 | return low; | |
2547 | } | |
2548 | if (high == 0x76) { | |
594f5b8b JFM |
2549 | switch (low) { |
2550 | case 0x30: | |
0b656321 JFM |
2551 | err("Sensor is an OV7630/OV7635"); |
2552 | err("7630 is not supported by this driver"); | |
4202f71c | 2553 | return -1; |
594f5b8b | 2554 | case 0x40: |
6a7eba24 JFM |
2555 | PDEBUG(D_PROBE, "Sensor is an OV7645"); |
2556 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
2557 | break; |
2558 | case 0x45: | |
6a7eba24 JFM |
2559 | PDEBUG(D_PROBE, "Sensor is an OV7645B"); |
2560 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
2561 | break; |
2562 | case 0x48: | |
6a7eba24 | 2563 | PDEBUG(D_PROBE, "Sensor is an OV7648"); |
035d3a3d | 2564 | sd->sensor = SEN_OV7648; |
594f5b8b JFM |
2565 | break; |
2566 | default: | |
2567 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); | |
6a7eba24 JFM |
2568 | return -1; |
2569 | } | |
2570 | } else { | |
2571 | PDEBUG(D_PROBE, "Sensor is an OV7620"); | |
2572 | sd->sensor = SEN_OV7620; | |
2573 | } | |
2574 | } else { | |
0b656321 | 2575 | err("Unknown image sensor version: %d", rc & 3); |
6a7eba24 JFM |
2576 | return -1; |
2577 | } | |
2578 | ||
6a7eba24 | 2579 | /* Set sensor-specific vars */ |
6a7eba24 JFM |
2580 | return 0; |
2581 | } | |
2582 | ||
2583 | /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */ | |
2584 | static int ov6xx0_configure(struct sd *sd) | |
2585 | { | |
2586 | int rc; | |
4202f71c | 2587 | PDEBUG(D_PROBE, "starting OV6xx0 configuration"); |
6a7eba24 JFM |
2588 | |
2589 | /* Detect sensor (sub)type */ | |
2590 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
2591 | if (rc < 0) { | |
2592 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
2593 | return -1; | |
2594 | } | |
2595 | ||
2596 | /* Ugh. The first two bits are the version bits, but | |
2597 | * the entire register value must be used. I guess OVT | |
2598 | * underestimated how many variants they would make. */ | |
594f5b8b JFM |
2599 | switch (rc) { |
2600 | case 0x00: | |
6a7eba24 | 2601 | sd->sensor = SEN_OV6630; |
0b656321 JFM |
2602 | warn("WARNING: Sensor is an OV66308. Your camera may have"); |
2603 | warn("been misdetected in previous driver versions."); | |
594f5b8b JFM |
2604 | break; |
2605 | case 0x01: | |
6a7eba24 | 2606 | sd->sensor = SEN_OV6620; |
7d971373 | 2607 | PDEBUG(D_PROBE, "Sensor is an OV6620"); |
594f5b8b JFM |
2608 | break; |
2609 | case 0x02: | |
6a7eba24 JFM |
2610 | sd->sensor = SEN_OV6630; |
2611 | PDEBUG(D_PROBE, "Sensor is an OV66308AE"); | |
594f5b8b JFM |
2612 | break; |
2613 | case 0x03: | |
7d971373 | 2614 | sd->sensor = SEN_OV66308AF; |
6a7eba24 | 2615 | PDEBUG(D_PROBE, "Sensor is an OV66308AF"); |
594f5b8b JFM |
2616 | break; |
2617 | case 0x90: | |
6a7eba24 | 2618 | sd->sensor = SEN_OV6630; |
0b656321 JFM |
2619 | warn("WARNING: Sensor is an OV66307. Your camera may have"); |
2620 | warn("been misdetected in previous driver versions."); | |
594f5b8b JFM |
2621 | break; |
2622 | default: | |
0b656321 | 2623 | err("FATAL: Unknown sensor version: 0x%02x", rc); |
6a7eba24 JFM |
2624 | return -1; |
2625 | } | |
2626 | ||
2627 | /* Set sensor-specific vars */ | |
594f5b8b | 2628 | sd->sif = 1; |
6a7eba24 | 2629 | |
6a7eba24 JFM |
2630 | return 0; |
2631 | } | |
2632 | ||
2633 | /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */ | |
2634 | static void ov51x_led_control(struct sd *sd, int on) | |
2635 | { | |
9e4d8258 HG |
2636 | if (sd->invert_led) |
2637 | on = !on; | |
2638 | ||
49809d6a HG |
2639 | switch (sd->bridge) { |
2640 | /* OV511 has no LED control */ | |
2641 | case BRIDGE_OV511PLUS: | |
2642 | reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0); | |
2643 | break; | |
2644 | case BRIDGE_OV518: | |
2645 | case BRIDGE_OV518PLUS: | |
2646 | reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02); | |
2647 | break; | |
2648 | case BRIDGE_OV519: | |
2649 | reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */ | |
2650 | break; | |
2651 | } | |
6a7eba24 JFM |
2652 | } |
2653 | ||
417a4d26 HG |
2654 | static void sd_reset_snapshot(struct gspca_dev *gspca_dev) |
2655 | { | |
2656 | struct sd *sd = (struct sd *) gspca_dev; | |
2657 | ||
2658 | if (!sd->snapshot_needs_reset) | |
2659 | return; | |
2660 | ||
2661 | /* Note it is important that we clear sd->snapshot_needs_reset, | |
2662 | before actually clearing the snapshot state in the bridge | |
2663 | otherwise we might race with the pkt_scan interrupt handler */ | |
2664 | sd->snapshot_needs_reset = 0; | |
2665 | ||
2666 | switch (sd->bridge) { | |
88e8d20a HG |
2667 | case BRIDGE_OV511: |
2668 | case BRIDGE_OV511PLUS: | |
2669 | reg_w(sd, R51x_SYS_SNAP, 0x02); | |
2670 | reg_w(sd, R51x_SYS_SNAP, 0x00); | |
2671 | break; | |
92e232ac HG |
2672 | case BRIDGE_OV518: |
2673 | case BRIDGE_OV518PLUS: | |
2674 | reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */ | |
2675 | reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */ | |
2676 | break; | |
417a4d26 HG |
2677 | case BRIDGE_OV519: |
2678 | reg_w(sd, R51x_SYS_RESET, 0x40); | |
2679 | reg_w(sd, R51x_SYS_RESET, 0x00); | |
2680 | break; | |
2681 | } | |
2682 | } | |
2683 | ||
1876bb92 | 2684 | static int ov51x_upload_quan_tables(struct sd *sd) |
49809d6a | 2685 | { |
1876bb92 HG |
2686 | const unsigned char yQuanTable511[] = { |
2687 | 0, 1, 1, 2, 2, 3, 3, 4, | |
2688 | 1, 1, 1, 2, 2, 3, 4, 4, | |
2689 | 1, 1, 2, 2, 3, 4, 4, 4, | |
2690 | 2, 2, 2, 3, 4, 4, 4, 4, | |
2691 | 2, 2, 3, 4, 4, 5, 5, 5, | |
2692 | 3, 3, 4, 4, 5, 5, 5, 5, | |
2693 | 3, 4, 4, 4, 5, 5, 5, 5, | |
2694 | 4, 4, 4, 4, 5, 5, 5, 5 | |
2695 | }; | |
2696 | ||
2697 | const unsigned char uvQuanTable511[] = { | |
2698 | 0, 2, 2, 3, 4, 4, 4, 4, | |
2699 | 2, 2, 2, 4, 4, 4, 4, 4, | |
2700 | 2, 2, 3, 4, 4, 4, 4, 4, | |
2701 | 3, 4, 4, 4, 4, 4, 4, 4, | |
2702 | 4, 4, 4, 4, 4, 4, 4, 4, | |
2703 | 4, 4, 4, 4, 4, 4, 4, 4, | |
2704 | 4, 4, 4, 4, 4, 4, 4, 4, | |
2705 | 4, 4, 4, 4, 4, 4, 4, 4 | |
2706 | }; | |
2707 | ||
2708 | /* OV518 quantization tables are 8x4 (instead of 8x8) */ | |
49809d6a HG |
2709 | const unsigned char yQuanTable518[] = { |
2710 | 5, 4, 5, 6, 6, 7, 7, 7, | |
2711 | 5, 5, 5, 5, 6, 7, 7, 7, | |
2712 | 6, 6, 6, 6, 7, 7, 7, 8, | |
2713 | 7, 7, 6, 7, 7, 7, 8, 8 | |
2714 | }; | |
2715 | ||
2716 | const unsigned char uvQuanTable518[] = { | |
2717 | 6, 6, 6, 7, 7, 7, 7, 7, | |
2718 | 6, 6, 6, 7, 7, 7, 7, 7, | |
2719 | 6, 6, 6, 7, 7, 7, 7, 8, | |
2720 | 7, 7, 7, 7, 7, 7, 8, 8 | |
2721 | }; | |
2722 | ||
1876bb92 | 2723 | const unsigned char *pYTable, *pUVTable; |
49809d6a | 2724 | unsigned char val0, val1; |
1876bb92 | 2725 | int i, size, rc, reg = R51x_COMP_LUT_BEGIN; |
49809d6a HG |
2726 | |
2727 | PDEBUG(D_PROBE, "Uploading quantization tables"); | |
2728 | ||
1876bb92 HG |
2729 | if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) { |
2730 | pYTable = yQuanTable511; | |
2731 | pUVTable = uvQuanTable511; | |
2732 | size = 32; | |
2733 | } else { | |
2734 | pYTable = yQuanTable518; | |
2735 | pUVTable = uvQuanTable518; | |
2736 | size = 16; | |
2737 | } | |
2738 | ||
2739 | for (i = 0; i < size; i++) { | |
49809d6a HG |
2740 | val0 = *pYTable++; |
2741 | val1 = *pYTable++; | |
2742 | val0 &= 0x0f; | |
2743 | val1 &= 0x0f; | |
2744 | val0 |= val1 << 4; | |
2745 | rc = reg_w(sd, reg, val0); | |
2746 | if (rc < 0) | |
2747 | return rc; | |
2748 | ||
2749 | val0 = *pUVTable++; | |
2750 | val1 = *pUVTable++; | |
2751 | val0 &= 0x0f; | |
2752 | val1 &= 0x0f; | |
2753 | val0 |= val1 << 4; | |
1876bb92 | 2754 | rc = reg_w(sd, reg + size, val0); |
49809d6a HG |
2755 | if (rc < 0) |
2756 | return rc; | |
2757 | ||
2758 | reg++; | |
2759 | } | |
2760 | ||
2761 | return 0; | |
2762 | } | |
2763 | ||
1876bb92 HG |
2764 | /* This initializes the OV511/OV511+ and the sensor */ |
2765 | static int ov511_configure(struct gspca_dev *gspca_dev) | |
2766 | { | |
2767 | struct sd *sd = (struct sd *) gspca_dev; | |
2768 | int rc; | |
2769 | ||
2770 | /* For 511 and 511+ */ | |
2771 | const struct ov_regvals init_511[] = { | |
2772 | { R51x_SYS_RESET, 0x7f }, | |
2773 | { R51x_SYS_INIT, 0x01 }, | |
2774 | { R51x_SYS_RESET, 0x7f }, | |
2775 | { R51x_SYS_INIT, 0x01 }, | |
2776 | { R51x_SYS_RESET, 0x3f }, | |
2777 | { R51x_SYS_INIT, 0x01 }, | |
2778 | { R51x_SYS_RESET, 0x3d }, | |
2779 | }; | |
2780 | ||
2781 | const struct ov_regvals norm_511[] = { | |
2782 | { R511_DRAM_FLOW_CTL, 0x01 }, | |
2783 | { R51x_SYS_SNAP, 0x00 }, | |
2784 | { R51x_SYS_SNAP, 0x02 }, | |
2785 | { R51x_SYS_SNAP, 0x00 }, | |
2786 | { R511_FIFO_OPTS, 0x1f }, | |
2787 | { R511_COMP_EN, 0x00 }, | |
2788 | { R511_COMP_LUT_EN, 0x03 }, | |
2789 | }; | |
2790 | ||
2791 | const struct ov_regvals norm_511_p[] = { | |
2792 | { R511_DRAM_FLOW_CTL, 0xff }, | |
2793 | { R51x_SYS_SNAP, 0x00 }, | |
2794 | { R51x_SYS_SNAP, 0x02 }, | |
2795 | { R51x_SYS_SNAP, 0x00 }, | |
2796 | { R511_FIFO_OPTS, 0xff }, | |
2797 | { R511_COMP_EN, 0x00 }, | |
2798 | { R511_COMP_LUT_EN, 0x03 }, | |
2799 | }; | |
2800 | ||
2801 | const struct ov_regvals compress_511[] = { | |
2802 | { 0x70, 0x1f }, | |
2803 | { 0x71, 0x05 }, | |
2804 | { 0x72, 0x06 }, | |
2805 | { 0x73, 0x06 }, | |
2806 | { 0x74, 0x14 }, | |
2807 | { 0x75, 0x03 }, | |
2808 | { 0x76, 0x04 }, | |
2809 | { 0x77, 0x04 }, | |
2810 | }; | |
2811 | ||
2812 | PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID)); | |
2813 | ||
2814 | rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511)); | |
2815 | if (rc < 0) | |
2816 | return rc; | |
2817 | ||
2818 | switch (sd->bridge) { | |
2819 | case BRIDGE_OV511: | |
2820 | rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511)); | |
2821 | if (rc < 0) | |
2822 | return rc; | |
2823 | break; | |
2824 | case BRIDGE_OV511PLUS: | |
2825 | rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p)); | |
2826 | if (rc < 0) | |
2827 | return rc; | |
2828 | break; | |
2829 | } | |
2830 | ||
2831 | /* Init compression */ | |
2832 | rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511)); | |
2833 | if (rc < 0) | |
2834 | return rc; | |
2835 | ||
2836 | rc = ov51x_upload_quan_tables(sd); | |
2837 | if (rc < 0) { | |
2838 | PDEBUG(D_ERR, "Error uploading quantization tables"); | |
2839 | return rc; | |
2840 | } | |
2841 | ||
2842 | return 0; | |
2843 | } | |
2844 | ||
49809d6a HG |
2845 | /* This initializes the OV518/OV518+ and the sensor */ |
2846 | static int ov518_configure(struct gspca_dev *gspca_dev) | |
6a7eba24 JFM |
2847 | { |
2848 | struct sd *sd = (struct sd *) gspca_dev; | |
49809d6a HG |
2849 | int rc; |
2850 | ||
2851 | /* For 518 and 518+ */ | |
e080fcd9 | 2852 | const struct ov_regvals init_518[] = { |
49809d6a HG |
2853 | { R51x_SYS_RESET, 0x40 }, |
2854 | { R51x_SYS_INIT, 0xe1 }, | |
2855 | { R51x_SYS_RESET, 0x3e }, | |
2856 | { R51x_SYS_INIT, 0xe1 }, | |
2857 | { R51x_SYS_RESET, 0x00 }, | |
2858 | { R51x_SYS_INIT, 0xe1 }, | |
2859 | { 0x46, 0x00 }, | |
2860 | { 0x5d, 0x03 }, | |
2861 | }; | |
2862 | ||
e080fcd9 | 2863 | const struct ov_regvals norm_518[] = { |
49809d6a HG |
2864 | { R51x_SYS_SNAP, 0x02 }, /* Reset */ |
2865 | { R51x_SYS_SNAP, 0x01 }, /* Enable */ | |
2866 | { 0x31, 0x0f }, | |
2867 | { 0x5d, 0x03 }, | |
2868 | { 0x24, 0x9f }, | |
2869 | { 0x25, 0x90 }, | |
2870 | { 0x20, 0x00 }, | |
2871 | { 0x51, 0x04 }, | |
2872 | { 0x71, 0x19 }, | |
2873 | { 0x2f, 0x80 }, | |
2874 | }; | |
2875 | ||
e080fcd9 | 2876 | const struct ov_regvals norm_518_p[] = { |
49809d6a HG |
2877 | { R51x_SYS_SNAP, 0x02 }, /* Reset */ |
2878 | { R51x_SYS_SNAP, 0x01 }, /* Enable */ | |
2879 | { 0x31, 0x0f }, | |
2880 | { 0x5d, 0x03 }, | |
2881 | { 0x24, 0x9f }, | |
2882 | { 0x25, 0x90 }, | |
2883 | { 0x20, 0x60 }, | |
2884 | { 0x51, 0x02 }, | |
2885 | { 0x71, 0x19 }, | |
2886 | { 0x40, 0xff }, | |
2887 | { 0x41, 0x42 }, | |
2888 | { 0x46, 0x00 }, | |
2889 | { 0x33, 0x04 }, | |
2890 | { 0x21, 0x19 }, | |
2891 | { 0x3f, 0x10 }, | |
2892 | { 0x2f, 0x80 }, | |
2893 | }; | |
2894 | ||
2895 | /* First 5 bits of custom ID reg are a revision ID on OV518 */ | |
2896 | PDEBUG(D_PROBE, "Device revision %d", | |
2897 | 0x1F & reg_r(sd, R51x_SYS_CUST_ID)); | |
2898 | ||
2899 | rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518)); | |
2900 | if (rc < 0) | |
2901 | return rc; | |
2902 | ||
2903 | /* Set LED GPIO pin to output mode */ | |
2904 | rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02); | |
2905 | if (rc < 0) | |
2906 | return rc; | |
6a7eba24 | 2907 | |
49809d6a HG |
2908 | switch (sd->bridge) { |
2909 | case BRIDGE_OV518: | |
2910 | rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518)); | |
2911 | if (rc < 0) | |
2912 | return rc; | |
2913 | break; | |
2914 | case BRIDGE_OV518PLUS: | |
2915 | rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p)); | |
2916 | if (rc < 0) | |
2917 | return rc; | |
2918 | break; | |
2919 | } | |
2920 | ||
1876bb92 | 2921 | rc = ov51x_upload_quan_tables(sd); |
49809d6a HG |
2922 | if (rc < 0) { |
2923 | PDEBUG(D_ERR, "Error uploading quantization tables"); | |
2924 | return rc; | |
2925 | } | |
2926 | ||
2927 | rc = reg_w(sd, 0x2f, 0x80); | |
2928 | if (rc < 0) | |
2929 | return rc; | |
2930 | ||
2931 | return 0; | |
2932 | } | |
2933 | ||
2934 | static int ov519_configure(struct sd *sd) | |
2935 | { | |
a5ae2062 | 2936 | static const struct ov_regvals init_519[] = { |
6a7eba24 | 2937 | { 0x5a, 0x6d }, /* EnableSystem */ |
6a7eba24 JFM |
2938 | { 0x53, 0x9b }, |
2939 | { 0x54, 0xff }, /* set bit2 to enable jpeg */ | |
2940 | { 0x5d, 0x03 }, | |
2941 | { 0x49, 0x01 }, | |
2942 | { 0x48, 0x00 }, | |
2943 | /* Set LED pin to output mode. Bit 4 must be cleared or sensor | |
2944 | * detection will fail. This deserves further investigation. */ | |
2945 | { OV519_GPIO_IO_CTRL0, 0xee }, | |
2946 | { 0x51, 0x0f }, /* SetUsbInit */ | |
2947 | { 0x51, 0x00 }, | |
2948 | { 0x22, 0x00 }, | |
2949 | /* windows reads 0x55 at this point*/ | |
2950 | }; | |
2951 | ||
49809d6a HG |
2952 | return write_regvals(sd, init_519, ARRAY_SIZE(init_519)); |
2953 | } | |
2954 | ||
b46aaa02 HG |
2955 | static int ovfx2_configure(struct sd *sd) |
2956 | { | |
2957 | static const struct ov_regvals init_fx2[] = { | |
2958 | { 0x00, 0x60 }, | |
2959 | { 0x02, 0x01 }, | |
2960 | { 0x0f, 0x1d }, | |
2961 | { 0xe9, 0x82 }, | |
2962 | { 0xea, 0xc7 }, | |
2963 | { 0xeb, 0x10 }, | |
2964 | { 0xec, 0xf6 }, | |
2965 | }; | |
2966 | ||
2967 | sd->stopped = 1; | |
2968 | ||
2969 | return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2)); | |
2970 | } | |
2971 | ||
49809d6a HG |
2972 | /* this function is called at probe time */ |
2973 | static int sd_config(struct gspca_dev *gspca_dev, | |
2974 | const struct usb_device_id *id) | |
2975 | { | |
2976 | struct sd *sd = (struct sd *) gspca_dev; | |
b46aaa02 | 2977 | struct cam *cam = &gspca_dev->cam; |
49809d6a HG |
2978 | int ret = 0; |
2979 | ||
9e4d8258 HG |
2980 | sd->bridge = id->driver_info & BRIDGE_MASK; |
2981 | sd->invert_led = id->driver_info & BRIDGE_INVERT_LED; | |
49809d6a HG |
2982 | |
2983 | switch (sd->bridge) { | |
1876bb92 HG |
2984 | case BRIDGE_OV511: |
2985 | case BRIDGE_OV511PLUS: | |
2986 | ret = ov511_configure(gspca_dev); | |
2987 | break; | |
49809d6a HG |
2988 | case BRIDGE_OV518: |
2989 | case BRIDGE_OV518PLUS: | |
2990 | ret = ov518_configure(gspca_dev); | |
2991 | break; | |
2992 | case BRIDGE_OV519: | |
2993 | ret = ov519_configure(sd); | |
2994 | break; | |
b46aaa02 HG |
2995 | case BRIDGE_OVFX2: |
2996 | ret = ovfx2_configure(sd); | |
2997 | cam->bulk_size = OVFX2_BULK_SIZE; | |
2998 | cam->bulk_nurbs = MAX_NURBS; | |
2999 | cam->bulk = 1; | |
3000 | break; | |
a511ba94 HG |
3001 | case BRIDGE_W9968CF: |
3002 | ret = w9968cf_configure(sd); | |
3003 | cam->reverse_alts = 1; | |
3004 | break; | |
49809d6a HG |
3005 | } |
3006 | ||
3007 | if (ret) | |
6a7eba24 | 3008 | goto error; |
49809d6a | 3009 | |
6a7eba24 JFM |
3010 | ov51x_led_control(sd, 0); /* turn LED off */ |
3011 | ||
6a7eba24 JFM |
3012 | /* The OV519 must be more aggressive about sensor detection since |
3013 | * I2C write will never fail if the sensor is not present. We have | |
3014 | * to try to initialize the sensor to detect its presence */ | |
229bb7dc HG |
3015 | |
3016 | /* Test for 76xx */ | |
3017 | if (init_ov_sensor(sd, OV7xx0_SID) >= 0) { | |
4202f71c JFM |
3018 | if (ov7xx0_configure(sd) < 0) { |
3019 | PDEBUG(D_ERR, "Failed to configure OV7xx0"); | |
3020 | goto error; | |
3021 | } | |
229bb7dc HG |
3022 | /* Test for 6xx0 */ |
3023 | } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) { | |
3024 | if (ov6xx0_configure(sd) < 0) { | |
3025 | PDEBUG(D_ERR, "Failed to configure OV6xx0"); | |
3026 | goto error; | |
3027 | } | |
3028 | /* Test for 8xx0 */ | |
3029 | } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) { | |
3030 | if (ov8xx0_configure(sd) < 0) { | |
3031 | PDEBUG(D_ERR, "Failed to configure OV8xx0"); | |
6a7eba24 | 3032 | goto error; |
6a7eba24 | 3033 | } |
635118d5 HG |
3034 | /* Test for 3xxx / 2xxx */ |
3035 | } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) { | |
3036 | if (ov_hires_configure(sd) < 0) { | |
3037 | PDEBUG(D_ERR, "Failed to configure high res OV"); | |
3038 | goto error; | |
3039 | } | |
229bb7dc | 3040 | } else { |
0b656321 | 3041 | err("Can't determine sensor slave IDs"); |
229bb7dc | 3042 | goto error; |
6a7eba24 JFM |
3043 | } |
3044 | ||
49809d6a | 3045 | switch (sd->bridge) { |
1876bb92 HG |
3046 | case BRIDGE_OV511: |
3047 | case BRIDGE_OV511PLUS: | |
3048 | if (!sd->sif) { | |
3049 | cam->cam_mode = ov511_vga_mode; | |
3050 | cam->nmodes = ARRAY_SIZE(ov511_vga_mode); | |
3051 | } else { | |
3052 | cam->cam_mode = ov511_sif_mode; | |
3053 | cam->nmodes = ARRAY_SIZE(ov511_sif_mode); | |
3054 | } | |
3055 | break; | |
49809d6a HG |
3056 | case BRIDGE_OV518: |
3057 | case BRIDGE_OV518PLUS: | |
3058 | if (!sd->sif) { | |
3059 | cam->cam_mode = ov518_vga_mode; | |
3060 | cam->nmodes = ARRAY_SIZE(ov518_vga_mode); | |
3061 | } else { | |
3062 | cam->cam_mode = ov518_sif_mode; | |
3063 | cam->nmodes = ARRAY_SIZE(ov518_sif_mode); | |
3064 | } | |
3065 | break; | |
3066 | case BRIDGE_OV519: | |
3067 | if (!sd->sif) { | |
3068 | cam->cam_mode = ov519_vga_mode; | |
3069 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); | |
3070 | } else { | |
3071 | cam->cam_mode = ov519_sif_mode; | |
3072 | cam->nmodes = ARRAY_SIZE(ov519_sif_mode); | |
3073 | } | |
3074 | break; | |
635118d5 HG |
3075 | case BRIDGE_OVFX2: |
3076 | if (sd->sensor == SEN_OV2610) { | |
3077 | cam->cam_mode = ovfx2_ov2610_mode; | |
3078 | cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode); | |
3079 | } else if (sd->sensor == SEN_OV3610) { | |
3080 | cam->cam_mode = ovfx2_ov3610_mode; | |
3081 | cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode); | |
3082 | } else if (!sd->sif) { | |
3083 | cam->cam_mode = ov519_vga_mode; | |
3084 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); | |
3085 | } else { | |
3086 | cam->cam_mode = ov519_sif_mode; | |
3087 | cam->nmodes = ARRAY_SIZE(ov519_sif_mode); | |
3088 | } | |
3089 | break; | |
a511ba94 HG |
3090 | case BRIDGE_W9968CF: |
3091 | cam->cam_mode = w9968cf_vga_mode; | |
3092 | cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode); | |
79b35902 HG |
3093 | if (sd->sif) |
3094 | cam->nmodes--; | |
a511ba94 HG |
3095 | |
3096 | /* w9968cf needs initialisation once the sensor is known */ | |
3097 | if (w9968cf_init(sd) < 0) | |
3098 | goto error; | |
3099 | break; | |
6a7eba24 | 3100 | } |
62833acd JFM |
3101 | gspca_dev->cam.ctrls = sd->ctrls; |
3102 | if (sd->sensor == SEN_OV7670) | |
3103 | gspca_dev->ctrl_dis = 1 << COLORS; | |
f5cee95c | 3104 | else |
62833acd | 3105 | gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP); |
79b35902 | 3106 | sd->quality = QUALITY_DEF; |
035d3a3d | 3107 | if (sd->sensor == SEN_OV7640 || |
d02134dd | 3108 | sd->sensor == SEN_OV7648) |
62833acd | 3109 | gspca_dev->ctrl_dis |= (1 << AUTOBRIGHT) | (1 << CONTRAST); |
d02134dd | 3110 | if (sd->sensor == SEN_OV7670) |
62833acd | 3111 | gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT; |
02ab18b0 HG |
3112 | /* OV8610 Frequency filter control should work but needs testing */ |
3113 | if (sd->sensor == SEN_OV8610) | |
62833acd | 3114 | gspca_dev->ctrl_dis |= 1 << FREQ; |
635118d5 HG |
3115 | /* No controls for the OV2610/OV3610 */ |
3116 | if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610) | |
62833acd | 3117 | gspca_dev->ctrl_dis |= (1 << NCTRL) - 1; |
02ab18b0 | 3118 | |
6a7eba24 JFM |
3119 | return 0; |
3120 | error: | |
3121 | PDEBUG(D_ERR, "OV519 Config failed"); | |
3122 | return -EBUSY; | |
3123 | } | |
3124 | ||
012d6b02 JFM |
3125 | /* this function is called at probe and resume time */ |
3126 | static int sd_init(struct gspca_dev *gspca_dev) | |
6a7eba24 | 3127 | { |
4202f71c JFM |
3128 | struct sd *sd = (struct sd *) gspca_dev; |
3129 | ||
3130 | /* initialize the sensor */ | |
3131 | switch (sd->sensor) { | |
635118d5 HG |
3132 | case SEN_OV2610: |
3133 | if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610))) | |
3134 | return -EIO; | |
3135 | /* Enable autogain, autoexpo, awb, bandfilter */ | |
3136 | if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0) | |
3137 | return -EIO; | |
3138 | break; | |
3139 | case SEN_OV3610: | |
3140 | if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b))) | |
3141 | return -EIO; | |
3142 | /* Enable autogain, autoexpo, awb, bandfilter */ | |
3143 | if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0) | |
3144 | return -EIO; | |
3145 | break; | |
4202f71c JFM |
3146 | case SEN_OV6620: |
3147 | if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20))) | |
3148 | return -EIO; | |
3149 | break; | |
3150 | case SEN_OV6630: | |
7d971373 | 3151 | case SEN_OV66308AF: |
62833acd JFM |
3152 | sd->ctrls[CONTRAST].def = 200; |
3153 | /* The default is too low for the ov6630 */ | |
4202f71c JFM |
3154 | if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30))) |
3155 | return -EIO; | |
3156 | break; | |
3157 | default: | |
3158 | /* case SEN_OV7610: */ | |
3159 | /* case SEN_OV76BE: */ | |
3160 | if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610))) | |
3161 | return -EIO; | |
ae49c404 HG |
3162 | if (i2c_w_mask(sd, 0x0e, 0x00, 0x40)) |
3163 | return -EIO; | |
4202f71c JFM |
3164 | break; |
3165 | case SEN_OV7620: | |
859cc470 | 3166 | case SEN_OV7620AE: |
4202f71c JFM |
3167 | if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620))) |
3168 | return -EIO; | |
3169 | break; | |
3170 | case SEN_OV7640: | |
035d3a3d | 3171 | case SEN_OV7648: |
4202f71c JFM |
3172 | if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640))) |
3173 | return -EIO; | |
3174 | break; | |
3175 | case SEN_OV7670: | |
62833acd JFM |
3176 | sd->ctrls[FREQ].max = 3; /* auto */ |
3177 | sd->ctrls[FREQ].def = 3; | |
4202f71c JFM |
3178 | if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670))) |
3179 | return -EIO; | |
3180 | break; | |
3181 | case SEN_OV8610: | |
3182 | if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610))) | |
3183 | return -EIO; | |
3184 | break; | |
3185 | } | |
6a7eba24 JFM |
3186 | return 0; |
3187 | } | |
3188 | ||
1876bb92 HG |
3189 | /* Set up the OV511/OV511+ with the given image parameters. |
3190 | * | |
3191 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
3192 | */ | |
3193 | static int ov511_mode_init_regs(struct sd *sd) | |
3194 | { | |
3195 | int hsegs, vsegs, packet_size, fps, needed; | |
3196 | int interlaced = 0; | |
3197 | struct usb_host_interface *alt; | |
3198 | struct usb_interface *intf; | |
3199 | ||
3200 | intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); | |
3201 | alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); | |
3202 | if (!alt) { | |
0b656321 | 3203 | err("Couldn't get altsetting"); |
1876bb92 HG |
3204 | return -EIO; |
3205 | } | |
3206 | ||
3207 | packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); | |
3208 | reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5); | |
3209 | ||
3210 | reg_w(sd, R511_CAM_UV_EN, 0x01); | |
3211 | reg_w(sd, R511_SNAP_UV_EN, 0x01); | |
3212 | reg_w(sd, R511_SNAP_OPTS, 0x03); | |
3213 | ||
3214 | /* Here I'm assuming that snapshot size == image size. | |
3215 | * I hope that's always true. --claudio | |
3216 | */ | |
3217 | hsegs = (sd->gspca_dev.width >> 3) - 1; | |
3218 | vsegs = (sd->gspca_dev.height >> 3) - 1; | |
3219 | ||
3220 | reg_w(sd, R511_CAM_PXCNT, hsegs); | |
3221 | reg_w(sd, R511_CAM_LNCNT, vsegs); | |
3222 | reg_w(sd, R511_CAM_PXDIV, 0x00); | |
3223 | reg_w(sd, R511_CAM_LNDIV, 0x00); | |
3224 | ||
3225 | /* YUV420, low pass filter on */ | |
3226 | reg_w(sd, R511_CAM_OPTS, 0x03); | |
3227 | ||
3228 | /* Snapshot additions */ | |
3229 | reg_w(sd, R511_SNAP_PXCNT, hsegs); | |
3230 | reg_w(sd, R511_SNAP_LNCNT, vsegs); | |
3231 | reg_w(sd, R511_SNAP_PXDIV, 0x00); | |
3232 | reg_w(sd, R511_SNAP_LNDIV, 0x00); | |
3233 | ||
3234 | /******** Set the framerate ********/ | |
3235 | if (frame_rate > 0) | |
3236 | sd->frame_rate = frame_rate; | |
3237 | ||
3238 | switch (sd->sensor) { | |
3239 | case SEN_OV6620: | |
3240 | /* No framerate control, doesn't like higher rates yet */ | |
3241 | sd->clockdiv = 3; | |
3242 | break; | |
3243 | ||
3244 | /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed | |
3245 | for more sensors we need to do this for them too */ | |
3246 | case SEN_OV7620: | |
859cc470 | 3247 | case SEN_OV7620AE: |
1876bb92 | 3248 | case SEN_OV7640: |
035d3a3d | 3249 | case SEN_OV7648: |
b282d873 | 3250 | case SEN_OV76BE: |
1876bb92 HG |
3251 | if (sd->gspca_dev.width == 320) |
3252 | interlaced = 1; | |
3253 | /* Fall through */ | |
3254 | case SEN_OV6630: | |
1876bb92 HG |
3255 | case SEN_OV7610: |
3256 | case SEN_OV7670: | |
3257 | switch (sd->frame_rate) { | |
3258 | case 30: | |
3259 | case 25: | |
3260 | /* Not enough bandwidth to do 640x480 @ 30 fps */ | |
3261 | if (sd->gspca_dev.width != 640) { | |
3262 | sd->clockdiv = 0; | |
3263 | break; | |
3264 | } | |
3265 | /* Fall through for 640x480 case */ | |
3266 | default: | |
3267 | /* case 20: */ | |
3268 | /* case 15: */ | |
3269 | sd->clockdiv = 1; | |
3270 | break; | |
3271 | case 10: | |
3272 | sd->clockdiv = 2; | |
3273 | break; | |
3274 | case 5: | |
3275 | sd->clockdiv = 5; | |
3276 | break; | |
3277 | } | |
3278 | if (interlaced) { | |
3279 | sd->clockdiv = (sd->clockdiv + 1) * 2 - 1; | |
3280 | /* Higher then 10 does not work */ | |
3281 | if (sd->clockdiv > 10) | |
3282 | sd->clockdiv = 10; | |
3283 | } | |
3284 | break; | |
3285 | ||
3286 | case SEN_OV8610: | |
3287 | /* No framerate control ?? */ | |
3288 | sd->clockdiv = 0; | |
3289 | break; | |
3290 | } | |
3291 | ||
3292 | /* Check if we have enough bandwidth to disable compression */ | |
3293 | fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1; | |
3294 | needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2; | |
3295 | /* 1400 is a conservative estimate of the max nr of isoc packets/sec */ | |
3296 | if (needed > 1400 * packet_size) { | |
3297 | /* Enable Y and UV quantization and compression */ | |
3298 | reg_w(sd, R511_COMP_EN, 0x07); | |
3299 | reg_w(sd, R511_COMP_LUT_EN, 0x03); | |
3300 | } else { | |
3301 | reg_w(sd, R511_COMP_EN, 0x06); | |
3302 | reg_w(sd, R511_COMP_LUT_EN, 0x00); | |
3303 | } | |
3304 | ||
3305 | reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE); | |
3306 | reg_w(sd, R51x_SYS_RESET, 0); | |
3307 | ||
3308 | return 0; | |
3309 | } | |
3310 | ||
49809d6a HG |
3311 | /* Sets up the OV518/OV518+ with the given image parameters |
3312 | * | |
3313 | * OV518 needs a completely different approach, until we can figure out what | |
3314 | * the individual registers do. Also, only 15 FPS is supported now. | |
3315 | * | |
3316 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
3317 | */ | |
3318 | static int ov518_mode_init_regs(struct sd *sd) | |
3319 | { | |
b282d873 HG |
3320 | int hsegs, vsegs, packet_size; |
3321 | struct usb_host_interface *alt; | |
3322 | struct usb_interface *intf; | |
3323 | ||
3324 | intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface); | |
3325 | alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt); | |
3326 | if (!alt) { | |
0b656321 | 3327 | err("Couldn't get altsetting"); |
b282d873 HG |
3328 | return -EIO; |
3329 | } | |
3330 | ||
3331 | packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize); | |
3332 | ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2); | |
49809d6a HG |
3333 | |
3334 | /******** Set the mode ********/ | |
3335 | ||
3336 | reg_w(sd, 0x2b, 0); | |
3337 | reg_w(sd, 0x2c, 0); | |
3338 | reg_w(sd, 0x2d, 0); | |
3339 | reg_w(sd, 0x2e, 0); | |
3340 | reg_w(sd, 0x3b, 0); | |
3341 | reg_w(sd, 0x3c, 0); | |
3342 | reg_w(sd, 0x3d, 0); | |
3343 | reg_w(sd, 0x3e, 0); | |
3344 | ||
3345 | if (sd->bridge == BRIDGE_OV518) { | |
3346 | /* Set 8-bit (YVYU) input format */ | |
3347 | reg_w_mask(sd, 0x20, 0x08, 0x08); | |
3348 | ||
3349 | /* Set 12-bit (4:2:0) output format */ | |
3350 | reg_w_mask(sd, 0x28, 0x80, 0xf0); | |
3351 | reg_w_mask(sd, 0x38, 0x80, 0xf0); | |
3352 | } else { | |
3353 | reg_w(sd, 0x28, 0x80); | |
3354 | reg_w(sd, 0x38, 0x80); | |
3355 | } | |
3356 | ||
3357 | hsegs = sd->gspca_dev.width / 16; | |
3358 | vsegs = sd->gspca_dev.height / 4; | |
3359 | ||
3360 | reg_w(sd, 0x29, hsegs); | |
3361 | reg_w(sd, 0x2a, vsegs); | |
3362 | ||
3363 | reg_w(sd, 0x39, hsegs); | |
3364 | reg_w(sd, 0x3a, vsegs); | |
3365 | ||
3366 | /* Windows driver does this here; who knows why */ | |
3367 | reg_w(sd, 0x2f, 0x80); | |
3368 | ||
b282d873 HG |
3369 | /******** Set the framerate ********/ |
3370 | sd->clockdiv = 1; | |
49809d6a HG |
3371 | |
3372 | /* Mode independent, but framerate dependent, regs */ | |
b282d873 HG |
3373 | /* 0x51: Clock divider; Only works on some cams which use 2 crystals */ |
3374 | reg_w(sd, 0x51, 0x04); | |
49809d6a HG |
3375 | reg_w(sd, 0x22, 0x18); |
3376 | reg_w(sd, 0x23, 0xff); | |
3377 | ||
b282d873 HG |
3378 | if (sd->bridge == BRIDGE_OV518PLUS) { |
3379 | switch (sd->sensor) { | |
859cc470 | 3380 | case SEN_OV7620AE: |
b282d873 HG |
3381 | if (sd->gspca_dev.width == 320) { |
3382 | reg_w(sd, 0x20, 0x00); | |
3383 | reg_w(sd, 0x21, 0x19); | |
3384 | } else { | |
3385 | reg_w(sd, 0x20, 0x60); | |
3386 | reg_w(sd, 0x21, 0x1f); | |
3387 | } | |
3388 | break; | |
859cc470 HG |
3389 | case SEN_OV7620: |
3390 | reg_w(sd, 0x20, 0x00); | |
3391 | reg_w(sd, 0x21, 0x19); | |
3392 | break; | |
b282d873 HG |
3393 | default: |
3394 | reg_w(sd, 0x21, 0x19); | |
3395 | } | |
3396 | } else | |
49809d6a HG |
3397 | reg_w(sd, 0x71, 0x17); /* Compression-related? */ |
3398 | ||
3399 | /* FIXME: Sensor-specific */ | |
3400 | /* Bit 5 is what matters here. Of course, it is "reserved" */ | |
3401 | i2c_w(sd, 0x54, 0x23); | |
3402 | ||
3403 | reg_w(sd, 0x2f, 0x80); | |
3404 | ||
3405 | if (sd->bridge == BRIDGE_OV518PLUS) { | |
3406 | reg_w(sd, 0x24, 0x94); | |
3407 | reg_w(sd, 0x25, 0x90); | |
3408 | ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ | |
3409 | ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */ | |
3410 | ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */ | |
3411 | ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */ | |
3412 | ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */ | |
3413 | ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */ | |
3414 | ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */ | |
3415 | ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */ | |
3416 | ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */ | |
3417 | } else { | |
3418 | reg_w(sd, 0x24, 0x9f); | |
3419 | reg_w(sd, 0x25, 0x90); | |
3420 | ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */ | |
3421 | ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */ | |
3422 | ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */ | |
3423 | ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */ | |
3424 | ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */ | |
3425 | ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */ | |
3426 | ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */ | |
3427 | ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */ | |
3428 | ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */ | |
3429 | } | |
3430 | ||
3431 | reg_w(sd, 0x2f, 0x80); | |
3432 | ||
3433 | return 0; | |
3434 | } | |
3435 | ||
3436 | ||
6a7eba24 JFM |
3437 | /* Sets up the OV519 with the given image parameters |
3438 | * | |
3439 | * OV519 needs a completely different approach, until we can figure out what | |
3440 | * the individual registers do. | |
3441 | * | |
3442 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
3443 | */ | |
594f5b8b | 3444 | static int ov519_mode_init_regs(struct sd *sd) |
6a7eba24 | 3445 | { |
a5ae2062 | 3446 | static const struct ov_regvals mode_init_519_ov7670[] = { |
6a7eba24 JFM |
3447 | { 0x5d, 0x03 }, /* Turn off suspend mode */ |
3448 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
3449 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
3450 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
3451 | { 0xa3, 0x18 }, | |
3452 | { 0xa4, 0x04 }, | |
3453 | { 0xa5, 0x28 }, | |
3454 | { 0x37, 0x00 }, /* SetUsbInit */ | |
3455 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
3456 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
3457 | { 0x20, 0x0c }, | |
3458 | { 0x21, 0x38 }, | |
3459 | { 0x22, 0x1d }, | |
3460 | { 0x17, 0x50 }, /* undocumented */ | |
3461 | { 0x37, 0x00 }, /* undocumented */ | |
3462 | { 0x40, 0xff }, /* I2C timeout counter */ | |
3463 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
3464 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
3465 | { 0xff, 0x00 }, /* undocumented */ | |
3466 | /* windows reads 0x55 at this point, why? */ | |
3467 | }; | |
3468 | ||
a5ae2062 | 3469 | static const struct ov_regvals mode_init_519[] = { |
6a7eba24 JFM |
3470 | { 0x5d, 0x03 }, /* Turn off suspend mode */ |
3471 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
3472 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
3473 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
3474 | { 0xa3, 0x18 }, | |
3475 | { 0xa4, 0x04 }, | |
3476 | { 0xa5, 0x28 }, | |
3477 | { 0x37, 0x00 }, /* SetUsbInit */ | |
3478 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
3479 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
3480 | { 0x22, 0x1d }, | |
3481 | { 0x17, 0x50 }, /* undocumented */ | |
3482 | { 0x37, 0x00 }, /* undocumented */ | |
3483 | { 0x40, 0xff }, /* I2C timeout counter */ | |
3484 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
3485 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
3486 | { 0xff, 0x00 }, /* undocumented */ | |
3487 | /* windows reads 0x55 at this point, why? */ | |
3488 | }; | |
3489 | ||
6a7eba24 JFM |
3490 | /******** Set the mode ********/ |
3491 | if (sd->sensor != SEN_OV7670) { | |
3492 | if (write_regvals(sd, mode_init_519, | |
a5ae2062 | 3493 | ARRAY_SIZE(mode_init_519))) |
6a7eba24 | 3494 | return -EIO; |
035d3a3d HG |
3495 | if (sd->sensor == SEN_OV7640 || |
3496 | sd->sensor == SEN_OV7648) { | |
594f5b8b | 3497 | /* Select 8-bit input mode */ |
ac40b1fa | 3498 | reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10); |
594f5b8b | 3499 | } |
6a7eba24 JFM |
3500 | } else { |
3501 | if (write_regvals(sd, mode_init_519_ov7670, | |
a5ae2062 | 3502 | ARRAY_SIZE(mode_init_519_ov7670))) |
6a7eba24 JFM |
3503 | return -EIO; |
3504 | } | |
3505 | ||
ac40b1fa JFM |
3506 | reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4); |
3507 | reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3); | |
80142efa HG |
3508 | if (sd->sensor == SEN_OV7670 && |
3509 | sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv) | |
3510 | reg_w(sd, OV519_R12_X_OFFSETL, 0x04); | |
035d3a3d HG |
3511 | else if (sd->sensor == SEN_OV7648 && |
3512 | sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv) | |
3513 | reg_w(sd, OV519_R12_X_OFFSETL, 0x01); | |
80142efa HG |
3514 | else |
3515 | reg_w(sd, OV519_R12_X_OFFSETL, 0x00); | |
ac40b1fa JFM |
3516 | reg_w(sd, OV519_R13_X_OFFSETH, 0x00); |
3517 | reg_w(sd, OV519_R14_Y_OFFSETL, 0x00); | |
3518 | reg_w(sd, OV519_R15_Y_OFFSETH, 0x00); | |
3519 | reg_w(sd, OV519_R16_DIVIDER, 0x00); | |
3520 | reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */ | |
6a7eba24 JFM |
3521 | reg_w(sd, 0x26, 0x00); /* Undocumented */ |
3522 | ||
3523 | /******** Set the framerate ********/ | |
3524 | if (frame_rate > 0) | |
3525 | sd->frame_rate = frame_rate; | |
3526 | ||
3527 | /* FIXME: These are only valid at the max resolution. */ | |
3528 | sd->clockdiv = 0; | |
594f5b8b JFM |
3529 | switch (sd->sensor) { |
3530 | case SEN_OV7640: | |
035d3a3d | 3531 | case SEN_OV7648: |
6a7eba24 | 3532 | switch (sd->frame_rate) { |
53e74515 JFM |
3533 | default: |
3534 | /* case 30: */ | |
6a7eba24 JFM |
3535 | reg_w(sd, 0xa4, 0x0c); |
3536 | reg_w(sd, 0x23, 0xff); | |
3537 | break; | |
3538 | case 25: | |
3539 | reg_w(sd, 0xa4, 0x0c); | |
3540 | reg_w(sd, 0x23, 0x1f); | |
3541 | break; | |
3542 | case 20: | |
3543 | reg_w(sd, 0xa4, 0x0c); | |
3544 | reg_w(sd, 0x23, 0x1b); | |
3545 | break; | |
53e74515 | 3546 | case 15: |
6a7eba24 JFM |
3547 | reg_w(sd, 0xa4, 0x04); |
3548 | reg_w(sd, 0x23, 0xff); | |
3549 | sd->clockdiv = 1; | |
3550 | break; | |
3551 | case 10: | |
3552 | reg_w(sd, 0xa4, 0x04); | |
3553 | reg_w(sd, 0x23, 0x1f); | |
3554 | sd->clockdiv = 1; | |
3555 | break; | |
3556 | case 5: | |
3557 | reg_w(sd, 0xa4, 0x04); | |
3558 | reg_w(sd, 0x23, 0x1b); | |
3559 | sd->clockdiv = 1; | |
3560 | break; | |
3561 | } | |
594f5b8b JFM |
3562 | break; |
3563 | case SEN_OV8610: | |
6a7eba24 JFM |
3564 | switch (sd->frame_rate) { |
3565 | default: /* 15 fps */ | |
3566 | /* case 15: */ | |
3567 | reg_w(sd, 0xa4, 0x06); | |
3568 | reg_w(sd, 0x23, 0xff); | |
3569 | break; | |
3570 | case 10: | |
3571 | reg_w(sd, 0xa4, 0x06); | |
3572 | reg_w(sd, 0x23, 0x1f); | |
3573 | break; | |
3574 | case 5: | |
3575 | reg_w(sd, 0xa4, 0x06); | |
3576 | reg_w(sd, 0x23, 0x1b); | |
3577 | break; | |
3578 | } | |
594f5b8b JFM |
3579 | break; |
3580 | case SEN_OV7670: /* guesses, based on 7640 */ | |
6a7eba24 JFM |
3581 | PDEBUG(D_STREAM, "Setting framerate to %d fps", |
3582 | (sd->frame_rate == 0) ? 15 : sd->frame_rate); | |
594f5b8b | 3583 | reg_w(sd, 0xa4, 0x10); |
6a7eba24 JFM |
3584 | switch (sd->frame_rate) { |
3585 | case 30: | |
6a7eba24 JFM |
3586 | reg_w(sd, 0x23, 0xff); |
3587 | break; | |
3588 | case 20: | |
6a7eba24 JFM |
3589 | reg_w(sd, 0x23, 0x1b); |
3590 | break; | |
594f5b8b JFM |
3591 | default: |
3592 | /* case 15: */ | |
6a7eba24 JFM |
3593 | reg_w(sd, 0x23, 0xff); |
3594 | sd->clockdiv = 1; | |
3595 | break; | |
3596 | } | |
594f5b8b | 3597 | break; |
6a7eba24 | 3598 | } |
6a7eba24 JFM |
3599 | return 0; |
3600 | } | |
3601 | ||
594f5b8b | 3602 | static int mode_init_ov_sensor_regs(struct sd *sd) |
6a7eba24 | 3603 | { |
594f5b8b | 3604 | struct gspca_dev *gspca_dev; |
ebbb5c3e HG |
3605 | int qvga, xstart, xend, ystart, yend; |
3606 | __u8 v; | |
594f5b8b JFM |
3607 | |
3608 | gspca_dev = &sd->gspca_dev; | |
124cc9c0 | 3609 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1; |
6a7eba24 JFM |
3610 | |
3611 | /******** Mode (VGA/QVGA) and sensor specific regs ********/ | |
3612 | switch (sd->sensor) { | |
635118d5 HG |
3613 | case SEN_OV2610: |
3614 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
3615 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
3616 | i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); | |
3617 | i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); | |
3618 | i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); | |
3619 | i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); | |
3620 | i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); | |
3621 | return 0; | |
ebbb5c3e | 3622 | case SEN_OV3610: |
635118d5 HG |
3623 | if (qvga) { |
3624 | xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4); | |
b46aaa02 | 3625 | ystart = (776 - gspca_dev->height) / 2; |
635118d5 | 3626 | } else { |
b46aaa02 | 3627 | xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4); |
635118d5 HG |
3628 | ystart = (1544 - gspca_dev->height) / 2; |
3629 | } | |
3630 | xend = xstart + gspca_dev->width; | |
3631 | yend = ystart + gspca_dev->height; | |
3632 | /* Writing to the COMH register resets the other windowing regs | |
3633 | to their default values, so we must do this first. */ | |
3634 | i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0); | |
3635 | i2c_w_mask(sd, 0x32, | |
3636 | (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7), | |
3637 | 0x3f); | |
3638 | i2c_w_mask(sd, 0x03, | |
3639 | (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3), | |
3640 | 0x0f); | |
3641 | i2c_w(sd, 0x17, xstart >> 4); | |
3642 | i2c_w(sd, 0x18, xend >> 4); | |
3643 | i2c_w(sd, 0x19, ystart >> 3); | |
3644 | i2c_w(sd, 0x1a, yend >> 3); | |
3645 | return 0; | |
6a7eba24 JFM |
3646 | case SEN_OV8610: |
3647 | /* For OV8610 qvga means qsvga */ | |
3648 | i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5); | |
ebbb5c3e HG |
3649 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ |
3650 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
3651 | i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */ | |
3652 | i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */ | |
6a7eba24 JFM |
3653 | break; |
3654 | case SEN_OV7610: | |
3655 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
ebbb5c3e HG |
3656 | i2c_w(sd, 0x35, qvga?0x1e:0x9e); |
3657 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ | |
3658 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
6a7eba24 JFM |
3659 | break; |
3660 | case SEN_OV7620: | |
859cc470 | 3661 | case SEN_OV7620AE: |
b282d873 | 3662 | case SEN_OV76BE: |
6a7eba24 JFM |
3663 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
3664 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
3665 | i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); | |
3666 | i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); | |
3667 | i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); | |
b282d873 | 3668 | i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0); |
6a7eba24 | 3669 | i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); |
ebbb5c3e HG |
3670 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ |
3671 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
3672 | if (sd->sensor == SEN_OV76BE) | |
3673 | i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e); | |
6a7eba24 | 3674 | break; |
6a7eba24 | 3675 | case SEN_OV7640: |
035d3a3d | 3676 | case SEN_OV7648: |
6a7eba24 JFM |
3677 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
3678 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
8d0082fa HG |
3679 | /* Setting this undocumented bit in qvga mode removes a very |
3680 | annoying vertical shaking of the image */ | |
035d3a3d | 3681 | i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); |
8d0082fa | 3682 | /* Unknown */ |
035d3a3d | 3683 | i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); |
8d0082fa | 3684 | /* Allow higher automatic gain (to allow higher framerates) */ |
035d3a3d | 3685 | i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); |
ebbb5c3e | 3686 | i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */ |
6a7eba24 JFM |
3687 | break; |
3688 | case SEN_OV7670: | |
3689 | /* set COM7_FMT_VGA or COM7_FMT_QVGA | |
3690 | * do we need to set anything else? | |
3691 | * HSTART etc are set in set_ov_sensor_window itself */ | |
3692 | i2c_w_mask(sd, OV7670_REG_COM7, | |
3693 | qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA, | |
3694 | OV7670_COM7_FMT_MASK); | |
ebbb5c3e HG |
3695 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ |
3696 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB, | |
3697 | OV7670_COM8_AWB); | |
3698 | if (qvga) { /* QVGA from ov7670.c by | |
3699 | * Jonathan Corbet */ | |
3700 | xstart = 164; | |
3701 | xend = 28; | |
3702 | ystart = 14; | |
3703 | yend = 494; | |
3704 | } else { /* VGA */ | |
3705 | xstart = 158; | |
3706 | xend = 14; | |
3707 | ystart = 10; | |
3708 | yend = 490; | |
3709 | } | |
3710 | /* OV7670 hardware window registers are split across | |
3711 | * multiple locations */ | |
3712 | i2c_w(sd, OV7670_REG_HSTART, xstart >> 3); | |
3713 | i2c_w(sd, OV7670_REG_HSTOP, xend >> 3); | |
3714 | v = i2c_r(sd, OV7670_REG_HREF); | |
3715 | v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07); | |
3716 | msleep(10); /* need to sleep between read and write to | |
3717 | * same reg! */ | |
3718 | i2c_w(sd, OV7670_REG_HREF, v); | |
3719 | ||
3720 | i2c_w(sd, OV7670_REG_VSTART, ystart >> 2); | |
3721 | i2c_w(sd, OV7670_REG_VSTOP, yend >> 2); | |
3722 | v = i2c_r(sd, OV7670_REG_VREF); | |
3723 | v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03); | |
3724 | msleep(10); /* need to sleep between read and write to | |
3725 | * same reg! */ | |
3726 | i2c_w(sd, OV7670_REG_VREF, v); | |
6a7eba24 JFM |
3727 | break; |
3728 | case SEN_OV6620: | |
ebbb5c3e HG |
3729 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
3730 | i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */ | |
3731 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | |
3732 | break; | |
6a7eba24 | 3733 | case SEN_OV6630: |
7d971373 | 3734 | case SEN_OV66308AF: |
6a7eba24 | 3735 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
ebbb5c3e | 3736 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ |
6a7eba24 JFM |
3737 | break; |
3738 | default: | |
3739 | return -EINVAL; | |
3740 | } | |
3741 | ||
6a7eba24 | 3742 | /******** Clock programming ********/ |
ae49c404 | 3743 | i2c_w(sd, 0x11, sd->clockdiv); |
6a7eba24 | 3744 | |
6a7eba24 JFM |
3745 | return 0; |
3746 | } | |
3747 | ||
62833acd | 3748 | static void sethvflip(struct gspca_dev *gspca_dev) |
0cd6759d | 3749 | { |
62833acd JFM |
3750 | struct sd *sd = (struct sd *) gspca_dev; |
3751 | ||
594f5b8b JFM |
3752 | if (sd->sensor != SEN_OV7670) |
3753 | return; | |
0cd6759d JFM |
3754 | if (sd->gspca_dev.streaming) |
3755 | ov51x_stop(sd); | |
3756 | i2c_w_mask(sd, OV7670_REG_MVFP, | |
62833acd JFM |
3757 | OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val |
3758 | | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val, | |
594f5b8b | 3759 | OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP); |
0cd6759d JFM |
3760 | if (sd->gspca_dev.streaming) |
3761 | ov51x_restart(sd); | |
3762 | } | |
3763 | ||
594f5b8b | 3764 | static int set_ov_sensor_window(struct sd *sd) |
6a7eba24 | 3765 | { |
594f5b8b | 3766 | struct gspca_dev *gspca_dev; |
124cc9c0 | 3767 | int qvga, crop; |
6a7eba24 | 3768 | int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale; |
ebbb5c3e | 3769 | int ret; |
6a7eba24 | 3770 | |
635118d5 | 3771 | /* mode setup is fully handled in mode_init_ov_sensor_regs for these */ |
ebbb5c3e HG |
3772 | if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 || |
3773 | sd->sensor == SEN_OV7670) | |
635118d5 HG |
3774 | return mode_init_ov_sensor_regs(sd); |
3775 | ||
594f5b8b | 3776 | gspca_dev = &sd->gspca_dev; |
124cc9c0 HG |
3777 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1; |
3778 | crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2; | |
594f5b8b | 3779 | |
6a7eba24 JFM |
3780 | /* The different sensor ICs handle setting up of window differently. |
3781 | * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */ | |
3782 | switch (sd->sensor) { | |
3783 | case SEN_OV8610: | |
3784 | hwsbase = 0x1e; | |
3785 | hwebase = 0x1e; | |
3786 | vwsbase = 0x02; | |
3787 | vwebase = 0x02; | |
3788 | break; | |
3789 | case SEN_OV7610: | |
3790 | case SEN_OV76BE: | |
3791 | hwsbase = 0x38; | |
3792 | hwebase = 0x3a; | |
3793 | vwsbase = vwebase = 0x05; | |
3794 | break; | |
3795 | case SEN_OV6620: | |
3796 | case SEN_OV6630: | |
7d971373 | 3797 | case SEN_OV66308AF: |
6a7eba24 JFM |
3798 | hwsbase = 0x38; |
3799 | hwebase = 0x3a; | |
3800 | vwsbase = 0x05; | |
3801 | vwebase = 0x06; | |
7d971373 | 3802 | if (sd->sensor == SEN_OV66308AF && qvga) |
49809d6a | 3803 | /* HDG: this fixes U and V getting swapped */ |
7d971373 | 3804 | hwsbase++; |
124cc9c0 HG |
3805 | if (crop) { |
3806 | hwsbase += 8; | |
3807 | hwebase += 8; | |
3808 | vwsbase += 11; | |
3809 | vwebase += 11; | |
3810 | } | |
6a7eba24 JFM |
3811 | break; |
3812 | case SEN_OV7620: | |
859cc470 | 3813 | case SEN_OV7620AE: |
6a7eba24 JFM |
3814 | hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */ |
3815 | hwebase = 0x2f; | |
3816 | vwsbase = vwebase = 0x05; | |
3817 | break; | |
3818 | case SEN_OV7640: | |
035d3a3d | 3819 | case SEN_OV7648: |
6a7eba24 JFM |
3820 | hwsbase = 0x1a; |
3821 | hwebase = 0x1a; | |
3822 | vwsbase = vwebase = 0x03; | |
3823 | break; | |
6a7eba24 JFM |
3824 | default: |
3825 | return -EINVAL; | |
3826 | } | |
3827 | ||
3828 | switch (sd->sensor) { | |
3829 | case SEN_OV6620: | |
3830 | case SEN_OV6630: | |
7d971373 | 3831 | case SEN_OV66308AF: |
594f5b8b | 3832 | if (qvga) { /* QCIF */ |
6a7eba24 JFM |
3833 | hwscale = 0; |
3834 | vwscale = 0; | |
3835 | } else { /* CIF */ | |
3836 | hwscale = 1; | |
3837 | vwscale = 1; /* The datasheet says 0; | |
3838 | * it's wrong */ | |
3839 | } | |
3840 | break; | |
3841 | case SEN_OV8610: | |
594f5b8b | 3842 | if (qvga) { /* QSVGA */ |
6a7eba24 JFM |
3843 | hwscale = 1; |
3844 | vwscale = 1; | |
3845 | } else { /* SVGA */ | |
3846 | hwscale = 2; | |
3847 | vwscale = 2; | |
3848 | } | |
3849 | break; | |
3850 | default: /* SEN_OV7xx0 */ | |
594f5b8b | 3851 | if (qvga) { /* QVGA */ |
6a7eba24 JFM |
3852 | hwscale = 1; |
3853 | vwscale = 0; | |
3854 | } else { /* VGA */ | |
3855 | hwscale = 2; | |
3856 | vwscale = 1; | |
3857 | } | |
3858 | } | |
3859 | ||
594f5b8b | 3860 | ret = mode_init_ov_sensor_regs(sd); |
6a7eba24 JFM |
3861 | if (ret < 0) |
3862 | return ret; | |
3863 | ||
ebbb5c3e | 3864 | i2c_w(sd, 0x17, hwsbase); |
a511ba94 | 3865 | i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale)); |
ebbb5c3e | 3866 | i2c_w(sd, 0x19, vwsbase); |
a511ba94 | 3867 | i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale)); |
6a7eba24 | 3868 | |
6a7eba24 JFM |
3869 | return 0; |
3870 | } | |
3871 | ||
6a7eba24 | 3872 | /* -- start the camera -- */ |
72ab97ce | 3873 | static int sd_start(struct gspca_dev *gspca_dev) |
6a7eba24 JFM |
3874 | { |
3875 | struct sd *sd = (struct sd *) gspca_dev; | |
49809d6a | 3876 | int ret = 0; |
6a7eba24 | 3877 | |
a511ba94 HG |
3878 | /* Default for most bridges, allow bridge_mode_init_regs to override */ |
3879 | sd->sensor_width = sd->gspca_dev.width; | |
3880 | sd->sensor_height = sd->gspca_dev.height; | |
3881 | ||
49809d6a | 3882 | switch (sd->bridge) { |
1876bb92 HG |
3883 | case BRIDGE_OV511: |
3884 | case BRIDGE_OV511PLUS: | |
3885 | ret = ov511_mode_init_regs(sd); | |
3886 | break; | |
49809d6a HG |
3887 | case BRIDGE_OV518: |
3888 | case BRIDGE_OV518PLUS: | |
3889 | ret = ov518_mode_init_regs(sd); | |
3890 | break; | |
3891 | case BRIDGE_OV519: | |
3892 | ret = ov519_mode_init_regs(sd); | |
3893 | break; | |
b46aaa02 | 3894 | /* case BRIDGE_OVFX2: nothing to do */ |
a511ba94 HG |
3895 | case BRIDGE_W9968CF: |
3896 | ret = w9968cf_mode_init_regs(sd); | |
3897 | break; | |
49809d6a | 3898 | } |
6a7eba24 JFM |
3899 | if (ret < 0) |
3900 | goto out; | |
49809d6a | 3901 | |
594f5b8b | 3902 | ret = set_ov_sensor_window(sd); |
6a7eba24 JFM |
3903 | if (ret < 0) |
3904 | goto out; | |
3905 | ||
49809d6a HG |
3906 | setcontrast(gspca_dev); |
3907 | setbrightness(gspca_dev); | |
3908 | setcolors(gspca_dev); | |
62833acd JFM |
3909 | sethvflip(gspca_dev); |
3910 | setautobright(gspca_dev); | |
3911 | setfreq_i(sd); | |
49809d6a | 3912 | |
417a4d26 HG |
3913 | /* Force clear snapshot state in case the snapshot button was |
3914 | pressed while we weren't streaming */ | |
3915 | sd->snapshot_needs_reset = 1; | |
3916 | sd_reset_snapshot(gspca_dev); | |
3917 | sd->snapshot_pressed = 0; | |
3918 | ||
d6b6d7ae HG |
3919 | sd->first_frame = 3; |
3920 | ||
594f5b8b | 3921 | ret = ov51x_restart(sd); |
6a7eba24 JFM |
3922 | if (ret < 0) |
3923 | goto out; | |
6a7eba24 | 3924 | ov51x_led_control(sd, 1); |
72ab97ce | 3925 | return 0; |
6a7eba24 JFM |
3926 | out: |
3927 | PDEBUG(D_ERR, "camera start error:%d", ret); | |
72ab97ce | 3928 | return ret; |
6a7eba24 JFM |
3929 | } |
3930 | ||
3931 | static void sd_stopN(struct gspca_dev *gspca_dev) | |
3932 | { | |
ac40b1fa JFM |
3933 | struct sd *sd = (struct sd *) gspca_dev; |
3934 | ||
3935 | ov51x_stop(sd); | |
3936 | ov51x_led_control(sd, 0); | |
6a7eba24 JFM |
3937 | } |
3938 | ||
79b35902 HG |
3939 | static void sd_stop0(struct gspca_dev *gspca_dev) |
3940 | { | |
3941 | struct sd *sd = (struct sd *) gspca_dev; | |
3942 | ||
3943 | if (sd->bridge == BRIDGE_W9968CF) | |
3944 | w9968cf_stop0(sd); | |
3945 | } | |
3946 | ||
92e232ac HG |
3947 | static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state) |
3948 | { | |
3949 | struct sd *sd = (struct sd *) gspca_dev; | |
3950 | ||
3951 | if (sd->snapshot_pressed != state) { | |
2856643e | 3952 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) |
92e232ac HG |
3953 | input_report_key(gspca_dev->input_dev, KEY_CAMERA, state); |
3954 | input_sync(gspca_dev->input_dev); | |
3955 | #endif | |
3956 | if (state) | |
3957 | sd->snapshot_needs_reset = 1; | |
3958 | ||
3959 | sd->snapshot_pressed = state; | |
3960 | } else { | |
88e8d20a HG |
3961 | /* On the ov511 / ov519 we need to reset the button state |
3962 | multiple times, as resetting does not work as long as the | |
3963 | button stays pressed */ | |
3964 | switch (sd->bridge) { | |
3965 | case BRIDGE_OV511: | |
3966 | case BRIDGE_OV511PLUS: | |
3967 | case BRIDGE_OV519: | |
3968 | if (state) | |
3969 | sd->snapshot_needs_reset = 1; | |
3970 | break; | |
3971 | } | |
92e232ac HG |
3972 | } |
3973 | } | |
3974 | ||
1876bb92 | 3975 | static void ov511_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b JFM |
3976 | u8 *in, /* isoc packet */ |
3977 | int len) /* iso packet length */ | |
1876bb92 HG |
3978 | { |
3979 | struct sd *sd = (struct sd *) gspca_dev; | |
3980 | ||
3981 | /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th | |
3982 | * byte non-zero. The EOF packet has image width/height in the | |
3983 | * 10th and 11th bytes. The 9th byte is given as follows: | |
3984 | * | |
3985 | * bit 7: EOF | |
3986 | * 6: compression enabled | |
3987 | * 5: 422/420/400 modes | |
3988 | * 4: 422/420/400 modes | |
3989 | * 3: 1 | |
3990 | * 2: snapshot button on | |
3991 | * 1: snapshot frame | |
3992 | * 0: even/odd field | |
3993 | */ | |
3994 | if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) && | |
3995 | (in[8] & 0x08)) { | |
88e8d20a | 3996 | ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1); |
1876bb92 HG |
3997 | if (in[8] & 0x80) { |
3998 | /* Frame end */ | |
3999 | if ((in[9] + 1) * 8 != gspca_dev->width || | |
4000 | (in[10] + 1) * 8 != gspca_dev->height) { | |
4001 | PDEBUG(D_ERR, "Invalid frame size, got: %dx%d," | |
4002 | " requested: %dx%d\n", | |
4003 | (in[9] + 1) * 8, (in[10] + 1) * 8, | |
4004 | gspca_dev->width, gspca_dev->height); | |
4005 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
4006 | return; | |
4007 | } | |
4008 | /* Add 11 byte footer to frame, might be usefull */ | |
76dd272b | 4009 | gspca_frame_add(gspca_dev, LAST_PACKET, in, 11); |
1876bb92 HG |
4010 | return; |
4011 | } else { | |
4012 | /* Frame start */ | |
76dd272b | 4013 | gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0); |
1876bb92 HG |
4014 | sd->packet_nr = 0; |
4015 | } | |
4016 | } | |
4017 | ||
4018 | /* Ignore the packet number */ | |
4019 | len--; | |
4020 | ||
4021 | /* intermediate packet */ | |
76dd272b | 4022 | gspca_frame_add(gspca_dev, INTER_PACKET, in, len); |
1876bb92 HG |
4023 | } |
4024 | ||
49809d6a | 4025 | static void ov518_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b | 4026 | u8 *data, /* isoc packet */ |
49809d6a HG |
4027 | int len) /* iso packet length */ |
4028 | { | |
92918a53 | 4029 | struct sd *sd = (struct sd *) gspca_dev; |
49809d6a HG |
4030 | |
4031 | /* A false positive here is likely, until OVT gives me | |
4032 | * the definitive SOF/EOF format */ | |
4033 | if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { | |
92e232ac | 4034 | ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1); |
76dd272b JFM |
4035 | gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); |
4036 | gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); | |
92918a53 HG |
4037 | sd->packet_nr = 0; |
4038 | } | |
4039 | ||
4040 | if (gspca_dev->last_packet_type == DISCARD_PACKET) | |
4041 | return; | |
4042 | ||
4043 | /* Does this device use packet numbers ? */ | |
4044 | if (len & 7) { | |
4045 | len--; | |
4046 | if (sd->packet_nr == data[len]) | |
4047 | sd->packet_nr++; | |
4048 | /* The last few packets of the frame (which are all 0's | |
4049 | except that they may contain part of the footer), are | |
4050 | numbered 0 */ | |
4051 | else if (sd->packet_nr == 0 || data[len]) { | |
4052 | PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)", | |
4053 | (int)data[len], (int)sd->packet_nr); | |
4054 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
4055 | return; | |
4056 | } | |
49809d6a HG |
4057 | } |
4058 | ||
4059 | /* intermediate packet */ | |
76dd272b | 4060 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); |
49809d6a HG |
4061 | } |
4062 | ||
4063 | static void ov519_pkt_scan(struct gspca_dev *gspca_dev, | |
76dd272b | 4064 | u8 *data, /* isoc packet */ |
6a7eba24 JFM |
4065 | int len) /* iso packet length */ |
4066 | { | |
4067 | /* Header of ov519 is 16 bytes: | |
4068 | * Byte Value Description | |
4069 | * 0 0xff magic | |
4070 | * 1 0xff magic | |
4071 | * 2 0xff magic | |
4072 | * 3 0xXX 0x50 = SOF, 0x51 = EOF | |
4073 | * 9 0xXX 0x01 initial frame without data, | |
4074 | * 0x00 standard frame with image | |
4075 | * 14 Lo in EOF: length of image data / 8 | |
4076 | * 15 Hi | |
4077 | */ | |
4078 | ||
4079 | if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) { | |
4080 | switch (data[3]) { | |
4081 | case 0x50: /* start of frame */ | |
417a4d26 HG |
4082 | /* Don't check the button state here, as the state |
4083 | usually (always ?) changes at EOF and checking it | |
4084 | here leads to unnecessary snapshot state resets. */ | |
6a7eba24 JFM |
4085 | #define HDRSZ 16 |
4086 | data += HDRSZ; | |
4087 | len -= HDRSZ; | |
4088 | #undef HDRSZ | |
4089 | if (data[0] == 0xff || data[1] == 0xd8) | |
76dd272b | 4090 | gspca_frame_add(gspca_dev, FIRST_PACKET, |
6a7eba24 JFM |
4091 | data, len); |
4092 | else | |
4093 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
4094 | return; | |
4095 | case 0x51: /* end of frame */ | |
92e232ac | 4096 | ov51x_handle_button(gspca_dev, data[11] & 1); |
6a7eba24 JFM |
4097 | if (data[9] != 0) |
4098 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
76dd272b JFM |
4099 | gspca_frame_add(gspca_dev, LAST_PACKET, |
4100 | NULL, 0); | |
6a7eba24 JFM |
4101 | return; |
4102 | } | |
4103 | } | |
4104 | ||
4105 | /* intermediate packet */ | |
76dd272b | 4106 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); |
6a7eba24 JFM |
4107 | } |
4108 | ||
b46aaa02 | 4109 | static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b | 4110 | u8 *data, /* isoc packet */ |
b46aaa02 HG |
4111 | int len) /* iso packet length */ |
4112 | { | |
d6b6d7ae | 4113 | struct sd *sd = (struct sd *) gspca_dev; |
d6b6d7ae HG |
4114 | |
4115 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); | |
4116 | ||
b46aaa02 HG |
4117 | /* A short read signals EOF */ |
4118 | if (len < OVFX2_BULK_SIZE) { | |
d6b6d7ae HG |
4119 | /* If the frame is short, and it is one of the first ones |
4120 | the sensor and bridge are still syncing, so drop it. */ | |
4121 | if (sd->first_frame) { | |
4122 | sd->first_frame--; | |
b192ca98 JFM |
4123 | if (gspca_dev->image_len < |
4124 | sd->gspca_dev.width * sd->gspca_dev.height) | |
d6b6d7ae HG |
4125 | gspca_dev->last_packet_type = DISCARD_PACKET; |
4126 | } | |
4127 | gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); | |
76dd272b | 4128 | gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); |
b46aaa02 | 4129 | } |
b46aaa02 HG |
4130 | } |
4131 | ||
49809d6a | 4132 | static void sd_pkt_scan(struct gspca_dev *gspca_dev, |
76dd272b | 4133 | u8 *data, /* isoc packet */ |
49809d6a HG |
4134 | int len) /* iso packet length */ |
4135 | { | |
4136 | struct sd *sd = (struct sd *) gspca_dev; | |
4137 | ||
4138 | switch (sd->bridge) { | |
4139 | case BRIDGE_OV511: | |
4140 | case BRIDGE_OV511PLUS: | |
76dd272b | 4141 | ov511_pkt_scan(gspca_dev, data, len); |
49809d6a HG |
4142 | break; |
4143 | case BRIDGE_OV518: | |
4144 | case BRIDGE_OV518PLUS: | |
76dd272b | 4145 | ov518_pkt_scan(gspca_dev, data, len); |
49809d6a HG |
4146 | break; |
4147 | case BRIDGE_OV519: | |
76dd272b | 4148 | ov519_pkt_scan(gspca_dev, data, len); |
49809d6a | 4149 | break; |
b46aaa02 | 4150 | case BRIDGE_OVFX2: |
76dd272b | 4151 | ovfx2_pkt_scan(gspca_dev, data, len); |
b46aaa02 | 4152 | break; |
a511ba94 | 4153 | case BRIDGE_W9968CF: |
76dd272b | 4154 | w9968cf_pkt_scan(gspca_dev, data, len); |
a511ba94 | 4155 | break; |
49809d6a HG |
4156 | } |
4157 | } | |
4158 | ||
6a7eba24 JFM |
4159 | /* -- management routines -- */ |
4160 | ||
4161 | static void setbrightness(struct gspca_dev *gspca_dev) | |
4162 | { | |
4163 | struct sd *sd = (struct sd *) gspca_dev; | |
4164 | int val; | |
6a7eba24 | 4165 | |
62833acd | 4166 | val = sd->ctrls[BRIGHTNESS].val; |
6a7eba24 JFM |
4167 | switch (sd->sensor) { |
4168 | case SEN_OV8610: | |
4169 | case SEN_OV7610: | |
4170 | case SEN_OV76BE: | |
4171 | case SEN_OV6620: | |
4172 | case SEN_OV6630: | |
7d971373 | 4173 | case SEN_OV66308AF: |
6a7eba24 | 4174 | case SEN_OV7640: |
035d3a3d | 4175 | case SEN_OV7648: |
6a7eba24 JFM |
4176 | i2c_w(sd, OV7610_REG_BRT, val); |
4177 | break; | |
4178 | case SEN_OV7620: | |
859cc470 | 4179 | case SEN_OV7620AE: |
6a7eba24 | 4180 | /* 7620 doesn't like manual changes when in auto mode */ |
62833acd | 4181 | if (!sd->ctrls[AUTOBRIGHT].val) |
6a7eba24 JFM |
4182 | i2c_w(sd, OV7610_REG_BRT, val); |
4183 | break; | |
4184 | case SEN_OV7670: | |
594f5b8b | 4185 | /*win trace |
6a7eba24 JFM |
4186 | * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */ |
4187 | i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val)); | |
4188 | break; | |
4189 | } | |
6a7eba24 JFM |
4190 | } |
4191 | ||
4192 | static void setcontrast(struct gspca_dev *gspca_dev) | |
4193 | { | |
4194 | struct sd *sd = (struct sd *) gspca_dev; | |
4195 | int val; | |
6a7eba24 | 4196 | |
62833acd | 4197 | val = sd->ctrls[CONTRAST].val; |
6a7eba24 JFM |
4198 | switch (sd->sensor) { |
4199 | case SEN_OV7610: | |
4200 | case SEN_OV6620: | |
4201 | i2c_w(sd, OV7610_REG_CNT, val); | |
4202 | break; | |
4203 | case SEN_OV6630: | |
7d971373 | 4204 | case SEN_OV66308AF: |
6a7eba24 | 4205 | i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f); |
49809d6a | 4206 | break; |
6a7eba24 | 4207 | case SEN_OV8610: { |
a5ae2062 | 4208 | static const __u8 ctab[] = { |
6a7eba24 JFM |
4209 | 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f |
4210 | }; | |
4211 | ||
4212 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
4213 | i2c_w(sd, 0x64, ctab[val >> 5]); | |
4214 | break; | |
4215 | } | |
859cc470 HG |
4216 | case SEN_OV7620: |
4217 | case SEN_OV7620AE: { | |
a5ae2062 | 4218 | static const __u8 ctab[] = { |
6a7eba24 JFM |
4219 | 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57, |
4220 | 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff | |
4221 | }; | |
4222 | ||
4223 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
4224 | i2c_w(sd, 0x64, ctab[val >> 4]); | |
4225 | break; | |
4226 | } | |
6a7eba24 JFM |
4227 | case SEN_OV7670: |
4228 | /* check that this isn't just the same as ov7610 */ | |
4229 | i2c_w(sd, OV7670_REG_CONTRAS, val >> 1); | |
4230 | break; | |
4231 | } | |
6a7eba24 JFM |
4232 | } |
4233 | ||
4234 | static void setcolors(struct gspca_dev *gspca_dev) | |
4235 | { | |
4236 | struct sd *sd = (struct sd *) gspca_dev; | |
4237 | int val; | |
6a7eba24 | 4238 | |
62833acd | 4239 | val = sd->ctrls[COLORS].val; |
6a7eba24 JFM |
4240 | switch (sd->sensor) { |
4241 | case SEN_OV8610: | |
4242 | case SEN_OV7610: | |
4243 | case SEN_OV76BE: | |
4244 | case SEN_OV6620: | |
4245 | case SEN_OV6630: | |
7d971373 | 4246 | case SEN_OV66308AF: |
6a7eba24 JFM |
4247 | i2c_w(sd, OV7610_REG_SAT, val); |
4248 | break; | |
4249 | case SEN_OV7620: | |
859cc470 | 4250 | case SEN_OV7620AE: |
6a7eba24 JFM |
4251 | /* Use UV gamma control instead. Bits 0 & 7 are reserved. */ |
4252 | /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e); | |
4253 | if (rc < 0) | |
4254 | goto out; */ | |
4255 | i2c_w(sd, OV7610_REG_SAT, val); | |
4256 | break; | |
4257 | case SEN_OV7640: | |
035d3a3d | 4258 | case SEN_OV7648: |
6a7eba24 JFM |
4259 | i2c_w(sd, OV7610_REG_SAT, val & 0xf0); |
4260 | break; | |
4261 | case SEN_OV7670: | |
4262 | /* supported later once I work out how to do it | |
4263 | * transparently fail now! */ | |
4264 | /* set REG_COM13 values for UV sat auto mode */ | |
4265 | break; | |
4266 | } | |
6a7eba24 JFM |
4267 | } |
4268 | ||
62833acd | 4269 | static void setautobright(struct gspca_dev *gspca_dev) |
02ab18b0 | 4270 | { |
62833acd JFM |
4271 | struct sd *sd = (struct sd *) gspca_dev; |
4272 | ||
035d3a3d HG |
4273 | if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 || |
4274 | sd->sensor == SEN_OV7670 || | |
635118d5 | 4275 | sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610) |
02ab18b0 HG |
4276 | return; |
4277 | ||
62833acd | 4278 | i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10); |
02ab18b0 HG |
4279 | } |
4280 | ||
62833acd | 4281 | static void setfreq_i(struct sd *sd) |
02ab18b0 | 4282 | { |
635118d5 HG |
4283 | if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610) |
4284 | return; | |
4285 | ||
02ab18b0 | 4286 | if (sd->sensor == SEN_OV7670) { |
62833acd | 4287 | switch (sd->ctrls[FREQ].val) { |
02ab18b0 HG |
4288 | case 0: /* Banding filter disabled */ |
4289 | i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT); | |
4290 | break; | |
4291 | case 1: /* 50 hz */ | |
4292 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
4293 | OV7670_COM8_BFILT); | |
4294 | i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18); | |
4295 | break; | |
4296 | case 2: /* 60 hz */ | |
4297 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
4298 | OV7670_COM8_BFILT); | |
4299 | i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18); | |
4300 | break; | |
4301 | case 3: /* Auto hz */ | |
4302 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT, | |
4303 | OV7670_COM8_BFILT); | |
4304 | i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO, | |
4305 | 0x18); | |
4306 | break; | |
4307 | } | |
4308 | } else { | |
62833acd | 4309 | switch (sd->ctrls[FREQ].val) { |
02ab18b0 HG |
4310 | case 0: /* Banding filter disabled */ |
4311 | i2c_w_mask(sd, 0x2d, 0x00, 0x04); | |
4312 | i2c_w_mask(sd, 0x2a, 0x00, 0x80); | |
4313 | break; | |
4314 | case 1: /* 50 hz (filter on and framerate adj) */ | |
4315 | i2c_w_mask(sd, 0x2d, 0x04, 0x04); | |
4316 | i2c_w_mask(sd, 0x2a, 0x80, 0x80); | |
4317 | /* 20 fps -> 16.667 fps */ | |
4318 | if (sd->sensor == SEN_OV6620 || | |
7d971373 HG |
4319 | sd->sensor == SEN_OV6630 || |
4320 | sd->sensor == SEN_OV66308AF) | |
02ab18b0 HG |
4321 | i2c_w(sd, 0x2b, 0x5e); |
4322 | else | |
4323 | i2c_w(sd, 0x2b, 0xac); | |
4324 | break; | |
4325 | case 2: /* 60 hz (filter on, ...) */ | |
4326 | i2c_w_mask(sd, 0x2d, 0x04, 0x04); | |
4327 | if (sd->sensor == SEN_OV6620 || | |
7d971373 HG |
4328 | sd->sensor == SEN_OV6630 || |
4329 | sd->sensor == SEN_OV66308AF) { | |
02ab18b0 HG |
4330 | /* 20 fps -> 15 fps */ |
4331 | i2c_w_mask(sd, 0x2a, 0x80, 0x80); | |
4332 | i2c_w(sd, 0x2b, 0xa8); | |
4333 | } else { | |
4334 | /* no framerate adj. */ | |
4335 | i2c_w_mask(sd, 0x2a, 0x00, 0x80); | |
4336 | } | |
4337 | break; | |
4338 | } | |
4339 | } | |
4340 | } | |
62833acd | 4341 | static void setfreq(struct gspca_dev *gspca_dev) |
02ab18b0 HG |
4342 | { |
4343 | struct sd *sd = (struct sd *) gspca_dev; | |
4344 | ||
62833acd | 4345 | setfreq_i(sd); |
02ab18b0 | 4346 | |
62833acd JFM |
4347 | /* Ugly but necessary */ |
4348 | if (sd->bridge == BRIDGE_W9968CF) | |
4349 | w9968cf_set_crop_window(sd); | |
02ab18b0 HG |
4350 | } |
4351 | ||
4352 | static int sd_querymenu(struct gspca_dev *gspca_dev, | |
4353 | struct v4l2_querymenu *menu) | |
4354 | { | |
4355 | struct sd *sd = (struct sd *) gspca_dev; | |
4356 | ||
4357 | switch (menu->id) { | |
4358 | case V4L2_CID_POWER_LINE_FREQUENCY: | |
4359 | switch (menu->index) { | |
4360 | case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */ | |
4361 | strcpy((char *) menu->name, "NoFliker"); | |
4362 | return 0; | |
4363 | case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */ | |
4364 | strcpy((char *) menu->name, "50 Hz"); | |
4365 | return 0; | |
4366 | case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */ | |
4367 | strcpy((char *) menu->name, "60 Hz"); | |
4368 | return 0; | |
4369 | case 3: | |
4370 | if (sd->sensor != SEN_OV7670) | |
4371 | return -EINVAL; | |
4372 | ||
4373 | strcpy((char *) menu->name, "Automatic"); | |
4374 | return 0; | |
4375 | } | |
4376 | break; | |
4377 | } | |
4378 | return -EINVAL; | |
4379 | } | |
4380 | ||
79b35902 HG |
4381 | static int sd_get_jcomp(struct gspca_dev *gspca_dev, |
4382 | struct v4l2_jpegcompression *jcomp) | |
4383 | { | |
4384 | struct sd *sd = (struct sd *) gspca_dev; | |
4385 | ||
4386 | if (sd->bridge != BRIDGE_W9968CF) | |
4387 | return -EINVAL; | |
4388 | ||
4389 | memset(jcomp, 0, sizeof *jcomp); | |
4390 | jcomp->quality = sd->quality; | |
4391 | jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT | | |
4392 | V4L2_JPEG_MARKER_DRI; | |
4393 | return 0; | |
4394 | } | |
4395 | ||
4396 | static int sd_set_jcomp(struct gspca_dev *gspca_dev, | |
4397 | struct v4l2_jpegcompression *jcomp) | |
4398 | { | |
4399 | struct sd *sd = (struct sd *) gspca_dev; | |
4400 | ||
4401 | if (sd->bridge != BRIDGE_W9968CF) | |
4402 | return -EINVAL; | |
4403 | ||
4404 | if (gspca_dev->streaming) | |
4405 | return -EBUSY; | |
4406 | ||
4407 | if (jcomp->quality < QUALITY_MIN) | |
4408 | sd->quality = QUALITY_MIN; | |
4409 | else if (jcomp->quality > QUALITY_MAX) | |
4410 | sd->quality = QUALITY_MAX; | |
4411 | else | |
4412 | sd->quality = jcomp->quality; | |
4413 | ||
4414 | /* Return resulting jcomp params to app */ | |
4415 | sd_get_jcomp(gspca_dev, jcomp); | |
4416 | ||
4417 | return 0; | |
4418 | } | |
4419 | ||
6a7eba24 | 4420 | /* sub-driver description */ |
a5ae2062 | 4421 | static const struct sd_desc sd_desc = { |
6a7eba24 JFM |
4422 | .name = MODULE_NAME, |
4423 | .ctrls = sd_ctrls, | |
4424 | .nctrls = ARRAY_SIZE(sd_ctrls), | |
4425 | .config = sd_config, | |
012d6b02 | 4426 | .init = sd_init, |
6a7eba24 JFM |
4427 | .start = sd_start, |
4428 | .stopN = sd_stopN, | |
79b35902 | 4429 | .stop0 = sd_stop0, |
6a7eba24 | 4430 | .pkt_scan = sd_pkt_scan, |
417a4d26 | 4431 | .dq_callback = sd_reset_snapshot, |
02ab18b0 | 4432 | .querymenu = sd_querymenu, |
79b35902 HG |
4433 | .get_jcomp = sd_get_jcomp, |
4434 | .set_jcomp = sd_set_jcomp, | |
2856643e | 4435 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) |
417a4d26 HG |
4436 | .other_input = 1, |
4437 | #endif | |
6a7eba24 JFM |
4438 | }; |
4439 | ||
4440 | /* -- module initialisation -- */ | |
a5ae2062 | 4441 | static const __devinitdata struct usb_device_id device_table[] = { |
a511ba94 | 4442 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, |
49809d6a HG |
4443 | {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, |
4444 | {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, | |
4445 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, | |
4446 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, | |
9e4d8258 HG |
4447 | {USB_DEVICE(0x041e, 0x4064), |
4448 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
518c8df7 | 4449 | {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, |
9e4d8258 HG |
4450 | {USB_DEVICE(0x041e, 0x4068), |
4451 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
49809d6a HG |
4452 | {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 }, |
4453 | {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, | |
98184f78 HG |
4454 | {USB_DEVICE(0x054c, 0x0155), |
4455 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | |
1876bb92 | 4456 | {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, |
49809d6a HG |
4457 | {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, |
4458 | {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 }, | |
4459 | {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 }, | |
b46aaa02 | 4460 | {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 }, |
49809d6a HG |
4461 | {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, |
4462 | {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, | |
1876bb92 | 4463 | {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS }, |
49809d6a | 4464 | {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS }, |
1876bb92 | 4465 | {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS }, |
b46aaa02 HG |
4466 | {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 }, |
4467 | {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 }, | |
a511ba94 | 4468 | {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF }, |
b46aaa02 | 4469 | {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 }, |
6a7eba24 JFM |
4470 | {} |
4471 | }; | |
ac40b1fa | 4472 | |
6a7eba24 JFM |
4473 | MODULE_DEVICE_TABLE(usb, device_table); |
4474 | ||
4475 | /* -- device connect -- */ | |
4476 | static int sd_probe(struct usb_interface *intf, | |
4477 | const struct usb_device_id *id) | |
4478 | { | |
4479 | return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), | |
4480 | THIS_MODULE); | |
4481 | } | |
4482 | ||
4483 | static struct usb_driver sd_driver = { | |
4484 | .name = MODULE_NAME, | |
4485 | .id_table = device_table, | |
4486 | .probe = sd_probe, | |
4487 | .disconnect = gspca_disconnect, | |
6a709749 JFM |
4488 | #ifdef CONFIG_PM |
4489 | .suspend = gspca_suspend, | |
4490 | .resume = gspca_resume, | |
4491 | #endif | |
6a7eba24 JFM |
4492 | }; |
4493 | ||
4494 | /* -- module insert / remove -- */ | |
4495 | static int __init sd_mod_init(void) | |
4496 | { | |
54826437 | 4497 | return usb_register(&sd_driver); |
6a7eba24 JFM |
4498 | } |
4499 | static void __exit sd_mod_exit(void) | |
4500 | { | |
4501 | usb_deregister(&sd_driver); | |
6a7eba24 JFM |
4502 | } |
4503 | ||
4504 | module_init(sd_mod_init); | |
4505 | module_exit(sd_mod_exit); | |
4506 | ||
4507 | module_param(frame_rate, int, 0644); | |
4508 | MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)"); |