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V4L/DVB (13180): gspca-w9968cf: Don't add an extra packet to the buffer after the EOF
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / gspca / ov519.c
CommitLineData
6a7eba24
JFM		 1/**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
b46aaa02 5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6a7eba24 6 *
2961e875
RB		 7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
b46aaa02 12 * Copyright (c) 1999-2006 Mark W. McClelland
2961e875 13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
b46aaa02
HG		 14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
2961e875
RB		 18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
6a7eba24
JFM		 23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39#define MODULE_NAME "ov519"
40
41#include "gspca.h"
42
6a7eba24
JFM		 43MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
44MODULE_DESCRIPTION("OV519 USB Camera Driver");
45MODULE_LICENSE("GPL");
46
47/* global parameters */
48static int frame_rate;
49
50/* Number of times to retry a failed I2C transaction. Increase this if you
51 * are getting "Failed to read sensor ID..." */
52static int i2c_detect_tries = 10;
53
54/* ov519 device descriptor */
55struct sd {
56 struct gspca_dev gspca_dev; /* !! must be the first item */
57
92918a53
HG		 58 __u8 packet_nr;
59
49809d6a
HG		 60 char bridge;
61#define BRIDGE_OV511 0
62#define BRIDGE_OV511PLUS 1
63#define BRIDGE_OV518 2
64#define BRIDGE_OV518PLUS 3
65#define BRIDGE_OV519 4
635118d5 66#define BRIDGE_OVFX2 5
a511ba94 67#define BRIDGE_W9968CF 6
9e4d8258
HG		 68#define BRIDGE_MASK 7
69
70 char invert_led;
71#define BRIDGE_INVERT_LED 8
49809d6a 72
6a7eba24 73 /* Determined by sensor type */
ac40b1fa 74 __u8 sif;
6a7eba24 75
ac40b1fa
JFM		 76 __u8 brightness;
77 __u8 contrast;
78 __u8 colors;
0cd6759d
JFM		 79 __u8 hflip;
80 __u8 vflip;
02ab18b0
HG		 81 __u8 autobrightness;
82 __u8 freq;
6a7eba24 83
ac40b1fa 84 __u8 stopped; /* Streaming is temporarily paused */
6a7eba24 85
1876bb92
HG		 86 __u8 frame_rate; /* current Framerate */
87 __u8 clockdiv; /* clockdiv override */
6a7eba24
JFM		 88
89 char sensor; /* Type of image sensor chip (SEN_*) */
90#define SEN_UNKNOWN 0
635118d5
HG		 91#define SEN_OV2610 1
92#define SEN_OV3610 2
93#define SEN_OV6620 3
94#define SEN_OV6630 4
95#define SEN_OV66308AF 5
96#define SEN_OV7610 6
97#define SEN_OV7620 7
98#define SEN_OV7640 8
99#define SEN_OV7670 9
100#define SEN_OV76BE 10
101#define SEN_OV8610 11
a511ba94
HG		 102
103 u8 sensor_addr;
104 int sensor_width;
105 int sensor_height;
fb1f9020 106 int sensor_reg_cache[256];
6a7eba24
JFM		 107};
108
a511ba94
HG		 109/* Note this is a bit of a hack, but the w9968cf driver needs the code for all
110 the ov sensors which is already present here. When we have the time we
111 really should move the sensor drivers to v4l2 sub drivers. */
112#include "w996Xcf.c"
113
6a7eba24
JFM		 114/* V4L2 controls supported by the driver */
115static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
116static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
117static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
118static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
119static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
120static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
0cd6759d
JFM		 121static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
122static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
123static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
124static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
02ab18b0
HG		 125static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
126static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
127static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
128static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
49809d6a
HG		 129static void setbrightness(struct gspca_dev *gspca_dev);
130static void setcontrast(struct gspca_dev *gspca_dev);
131static void setcolors(struct gspca_dev *gspca_dev);
02ab18b0
HG		 132static void setautobrightness(struct sd *sd);
133static void setfreq(struct sd *sd);
6a7eba24 134
02ab18b0 135static const struct ctrl sd_ctrls[] = {
6a7eba24
JFM		 136 {
137 {
138 .id = V4L2_CID_BRIGHTNESS,
139 .type = V4L2_CTRL_TYPE_INTEGER,
140 .name = "Brightness",
141 .minimum = 0,
142 .maximum = 255,
143 .step = 1,
594f5b8b
JFM		 144#define BRIGHTNESS_DEF 127
145 .default_value = BRIGHTNESS_DEF,
6a7eba24
JFM		 146 },
147 .set = sd_setbrightness,
148 .get = sd_getbrightness,
149 },
6a7eba24
JFM		 150 {
151 {
152 .id = V4L2_CID_CONTRAST,
153 .type = V4L2_CTRL_TYPE_INTEGER,
154 .name = "Contrast",
155 .minimum = 0,
156 .maximum = 255,
157 .step = 1,
594f5b8b
JFM		 158#define CONTRAST_DEF 127
159 .default_value = CONTRAST_DEF,
6a7eba24
JFM		 160 },
161 .set = sd_setcontrast,
162 .get = sd_getcontrast,
163 },
6a7eba24
JFM		 164 {
165 {
166 .id = V4L2_CID_SATURATION,
167 .type = V4L2_CTRL_TYPE_INTEGER,
594f5b8b 168 .name = "Color",
6a7eba24
JFM		 169 .minimum = 0,
170 .maximum = 255,
171 .step = 1,
594f5b8b
JFM		 172#define COLOR_DEF 127
173 .default_value = COLOR_DEF,
6a7eba24
JFM		 174 },
175 .set = sd_setcolors,
176 .get = sd_getcolors,
177 },
02ab18b0 178/* The flip controls work with ov7670 only */
de00448f 179#define HFLIP_IDX 3
0cd6759d
JFM		 180 {
181 {
182 .id = V4L2_CID_HFLIP,
183 .type = V4L2_CTRL_TYPE_BOOLEAN,
184 .name = "Mirror",
185 .minimum = 0,
186 .maximum = 1,
187 .step = 1,
188#define HFLIP_DEF 0
189 .default_value = HFLIP_DEF,
190 },
191 .set = sd_sethflip,
192 .get = sd_gethflip,
193 },
de00448f 194#define VFLIP_IDX 4
0cd6759d
JFM		 195 {
196 {
197 .id = V4L2_CID_VFLIP,
198 .type = V4L2_CTRL_TYPE_BOOLEAN,
199 .name = "Vflip",
200 .minimum = 0,
201 .maximum = 1,
202 .step = 1,
203#define VFLIP_DEF 0
204 .default_value = VFLIP_DEF,
205 },
206 .set = sd_setvflip,
207 .get = sd_getvflip,
208 },
02ab18b0
HG		 209#define AUTOBRIGHT_IDX 5
210 {
211 {
212 .id = V4L2_CID_AUTOBRIGHTNESS,
213 .type = V4L2_CTRL_TYPE_BOOLEAN,
214 .name = "Auto Brightness",
215 .minimum = 0,
216 .maximum = 1,
217 .step = 1,
218#define AUTOBRIGHT_DEF 1
219 .default_value = AUTOBRIGHT_DEF,
220 },
221 .set = sd_setautobrightness,
222 .get = sd_getautobrightness,
223 },
224#define FREQ_IDX 6
225 {
226 {
227 .id = V4L2_CID_POWER_LINE_FREQUENCY,
228 .type = V4L2_CTRL_TYPE_MENU,
229 .name = "Light frequency filter",
230 .minimum = 0,
231 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
232 .step = 1,
233#define FREQ_DEF 0
234 .default_value = FREQ_DEF,
235 },
236 .set = sd_setfreq,
237 .get = sd_getfreq,
238 },
239#define OV7670_FREQ_IDX 7
240 {
241 {
242 .id = V4L2_CID_POWER_LINE_FREQUENCY,
243 .type = V4L2_CTRL_TYPE_MENU,
244 .name = "Light frequency filter",
245 .minimum = 0,
246 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
247 .step = 1,
248#define OV7670_FREQ_DEF 3
249 .default_value = OV7670_FREQ_DEF,
250 },
251 .set = sd_setfreq,
252 .get = sd_getfreq,
253 },
6a7eba24
JFM		 254};
255
49809d6a 256static const struct v4l2_pix_format ov519_vga_mode[] = {
c2446b3e
JFM		 257 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
258 .bytesperline = 320,
594f5b8b 259 .sizeimage = 320 * 240 * 3 / 8 + 590,
c2446b3e
JFM		 260 .colorspace = V4L2_COLORSPACE_JPEG,
261 .priv = 1},
262 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
263 .bytesperline = 640,
264 .sizeimage = 640 * 480 * 3 / 8 + 590,
265 .colorspace = V4L2_COLORSPACE_JPEG,
266 .priv = 0},
6a7eba24 267};
49809d6a 268static const struct v4l2_pix_format ov519_sif_mode[] = {
124cc9c0
HG		 269 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
270 .bytesperline = 160,
271 .sizeimage = 160 * 120 * 3 / 8 + 590,
272 .colorspace = V4L2_COLORSPACE_JPEG,
273 .priv = 3},
c2446b3e
JFM		 274 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
275 .bytesperline = 176,
594f5b8b 276 .sizeimage = 176 * 144 * 3 / 8 + 590,
c2446b3e
JFM		 277 .colorspace = V4L2_COLORSPACE_JPEG,
278 .priv = 1},
124cc9c0
HG		 279 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
280 .bytesperline = 320,
281 .sizeimage = 320 * 240 * 3 / 8 + 590,
282 .colorspace = V4L2_COLORSPACE_JPEG,
283 .priv = 2},
c2446b3e
JFM		 284 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
285 .bytesperline = 352,
594f5b8b 286 .sizeimage = 352 * 288 * 3 / 8 + 590,
c2446b3e
JFM		 287 .colorspace = V4L2_COLORSPACE_JPEG,
288 .priv = 0},
6a7eba24
JFM		 289};
290
b282d873
HG		 291/* Note some of the sizeimage values for the ov511 / ov518 may seem
292 larger then necessary, however they need to be this big as the ov511 /
293 ov518 always fills the entire isoc frame, using 0 padding bytes when
294 it doesn't have any data. So with low framerates the amount of data
295 transfered can become quite large (libv4l will remove all the 0 padding
296 in userspace). */
49809d6a
HG		 297static const struct v4l2_pix_format ov518_vga_mode[] = {
298 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
299 .bytesperline = 320,
b282d873 300 .sizeimage = 320 * 240 * 3,
49809d6a
HG		 301 .colorspace = V4L2_COLORSPACE_JPEG,
302 .priv = 1},
303 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
304 .bytesperline = 640,
b282d873 305 .sizeimage = 640 * 480 * 2,
49809d6a
HG		 306 .colorspace = V4L2_COLORSPACE_JPEG,
307 .priv = 0},
308};
309static const struct v4l2_pix_format ov518_sif_mode[] = {
124cc9c0
HG		 310 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
311 .bytesperline = 160,
b282d873 312 .sizeimage = 70000,
124cc9c0
HG		 313 .colorspace = V4L2_COLORSPACE_JPEG,
314 .priv = 3},
49809d6a
HG		 315 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
316 .bytesperline = 176,
b282d873 317 .sizeimage = 70000,
49809d6a
HG		 318 .colorspace = V4L2_COLORSPACE_JPEG,
319 .priv = 1},
124cc9c0
HG		 320 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
321 .bytesperline = 320,
b282d873 322 .sizeimage = 320 * 240 * 3,
124cc9c0
HG		 323 .colorspace = V4L2_COLORSPACE_JPEG,
324 .priv = 2},
49809d6a
HG		 325 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
326 .bytesperline = 352,
b282d873 327 .sizeimage = 352 * 288 * 3,
49809d6a
HG		 328 .colorspace = V4L2_COLORSPACE_JPEG,
329 .priv = 0},
330};
331
1876bb92
HG		 332static const struct v4l2_pix_format ov511_vga_mode[] = {
333 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
334 .bytesperline = 320,
335 .sizeimage = 320 * 240 * 3,
336 .colorspace = V4L2_COLORSPACE_JPEG,
337 .priv = 1},
338 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
339 .bytesperline = 640,
340 .sizeimage = 640 * 480 * 2,
341 .colorspace = V4L2_COLORSPACE_JPEG,
342 .priv = 0},
343};
344static const struct v4l2_pix_format ov511_sif_mode[] = {
345 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
346 .bytesperline = 160,
b282d873 347 .sizeimage = 70000,
1876bb92
HG		 348 .colorspace = V4L2_COLORSPACE_JPEG,
349 .priv = 3},
350 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
351 .bytesperline = 176,
b282d873 352 .sizeimage = 70000,
1876bb92
HG		 353 .colorspace = V4L2_COLORSPACE_JPEG,
354 .priv = 1},
355 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
356 .bytesperline = 320,
357 .sizeimage = 320 * 240 * 3,
358 .colorspace = V4L2_COLORSPACE_JPEG,
359 .priv = 2},
360 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
361 .bytesperline = 352,
362 .sizeimage = 352 * 288 * 3,
363 .colorspace = V4L2_COLORSPACE_JPEG,
364 .priv = 0},
365};
49809d6a 366
635118d5
HG		 367static const struct v4l2_pix_format ovfx2_vga_mode[] = {
368 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
369 .bytesperline = 320,
370 .sizeimage = 320 * 240,
371 .colorspace = V4L2_COLORSPACE_SRGB,
372 .priv = 1},
373 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
374 .bytesperline = 640,
375 .sizeimage = 640 * 480,
376 .colorspace = V4L2_COLORSPACE_SRGB,
377 .priv = 0},
378};
379static const struct v4l2_pix_format ovfx2_cif_mode[] = {
380 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
381 .bytesperline = 160,
382 .sizeimage = 160 * 120,
383 .colorspace = V4L2_COLORSPACE_SRGB,
384 .priv = 3},
385 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
386 .bytesperline = 176,
387 .sizeimage = 176 * 144,
388 .colorspace = V4L2_COLORSPACE_SRGB,
389 .priv = 1},
390 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
391 .bytesperline = 320,
392 .sizeimage = 320 * 240,
393 .colorspace = V4L2_COLORSPACE_SRGB,
394 .priv = 2},
395 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
396 .bytesperline = 352,
397 .sizeimage = 352 * 288,
398 .colorspace = V4L2_COLORSPACE_SRGB,
399 .priv = 0},
400};
401static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
402 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
403 .bytesperline = 1600,
404 .sizeimage = 1600 * 1200,
405 .colorspace = V4L2_COLORSPACE_SRGB},
406};
407static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
635118d5
HG		 408 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
409 .bytesperline = 640,
410 .sizeimage = 640 * 480,
b46aaa02
HG		 411 .colorspace = V4L2_COLORSPACE_SRGB,
412 .priv = 1},
413 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
414 .bytesperline = 800,
415 .sizeimage = 800 * 600,
416 .colorspace = V4L2_COLORSPACE_SRGB,
417 .priv = 1},
418 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
419 .bytesperline = 1024,
420 .sizeimage = 1024 * 768,
421 .colorspace = V4L2_COLORSPACE_SRGB,
422 .priv = 1},
423 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
424 .bytesperline = 1600,
425 .sizeimage = 1600 * 1200,
426 .colorspace = V4L2_COLORSPACE_SRGB,
427 .priv = 0},
428 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
429 .bytesperline = 2048,
430 .sizeimage = 2048 * 1536,
431 .colorspace = V4L2_COLORSPACE_SRGB,
432 .priv = 0},
635118d5
HG		 433};
434
435
49809d6a 436/* Registers common to OV511 / OV518 */
1876bb92 437#define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
49809d6a 438#define R51x_SYS_RESET 0x50
1876bb92
HG		 439 /* Reset type flags */
440 #define OV511_RESET_OMNICE 0x08
49809d6a
HG		 441#define R51x_SYS_INIT 0x53
442#define R51x_SYS_SNAP 0x52
443#define R51x_SYS_CUST_ID 0x5F
444#define R51x_COMP_LUT_BEGIN 0x80
445
446/* OV511 Camera interface register numbers */
1876bb92
HG		 447#define R511_CAM_DELAY 0x10
448#define R511_CAM_EDGE 0x11
449#define R511_CAM_PXCNT 0x12
450#define R511_CAM_LNCNT 0x13
451#define R511_CAM_PXDIV 0x14
452#define R511_CAM_LNDIV 0x15
453#define R511_CAM_UV_EN 0x16
454#define R511_CAM_LINE_MODE 0x17
455#define R511_CAM_OPTS 0x18
456
457#define R511_SNAP_FRAME 0x19
458#define R511_SNAP_PXCNT 0x1A
459#define R511_SNAP_LNCNT 0x1B
460#define R511_SNAP_PXDIV 0x1C
461#define R511_SNAP_LNDIV 0x1D
462#define R511_SNAP_UV_EN 0x1E
463#define R511_SNAP_UV_EN 0x1E
464#define R511_SNAP_OPTS 0x1F
465
466#define R511_DRAM_FLOW_CTL 0x20
467#define R511_FIFO_OPTS 0x31
468#define R511_I2C_CTL 0x40
49809d6a 469#define R511_SYS_LED_CTL 0x55 /* OV511+ only */
1876bb92
HG		 470#define R511_COMP_EN 0x78
471#define R511_COMP_LUT_EN 0x79
49809d6a
HG		 472
473/* OV518 Camera interface register numbers */
474#define R518_GPIO_OUT 0x56 /* OV518(+) only */
475#define R518_GPIO_CTL 0x57 /* OV518(+) only */
476
6a7eba24 477/* OV519 Camera interface register numbers */
ac40b1fa
JFM		 478#define OV519_R10_H_SIZE 0x10
479#define OV519_R11_V_SIZE 0x11
480#define OV519_R12_X_OFFSETL 0x12
481#define OV519_R13_X_OFFSETH 0x13
482#define OV519_R14_Y_OFFSETL 0x14
483#define OV519_R15_Y_OFFSETH 0x15
484#define OV519_R16_DIVIDER 0x16
485#define OV519_R20_DFR 0x20
486#define OV519_R25_FORMAT 0x25
6a7eba24
JFM		 487
488/* OV519 System Controller register numbers */
489#define OV519_SYS_RESET1 0x51
490#define OV519_SYS_EN_CLK1 0x54
491
492#define OV519_GPIO_DATA_OUT0 0x71
493#define OV519_GPIO_IO_CTRL0 0x72
494
495#define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
496
b46aaa02
HG		 497/*
498 * The FX2 chip does not give us a zero length read at end of frame.
499 * It does, however, give a short read at the end of a frame, if
500 * neccessary, rather than run two frames together.
501 *
502 * By choosing the right bulk transfer size, we are guaranteed to always
503 * get a short read for the last read of each frame. Frame sizes are
504 * always a composite number (width * height, or a multiple) so if we
505 * choose a prime number, we are guaranteed that the last read of a
506 * frame will be short.
507 *
508 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
509 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
510 * to figure out why. [PMiller]
511 *
512 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
513 *
514 * It isn't enough to know the number of bytes per frame, in case we
515 * have data dropouts or buffer overruns (even though the FX2 double
516 * buffers, there are some pretty strict real time constraints for
517 * isochronous transfer for larger frame sizes).
518 */
519#define OVFX2_BULK_SIZE (13 * 4096)
520
6a7eba24
JFM		 521/* I2C registers */
522#define R51x_I2C_W_SID 0x41
523#define R51x_I2C_SADDR_3 0x42
524#define R51x_I2C_SADDR_2 0x43
525#define R51x_I2C_R_SID 0x44
526#define R51x_I2C_DATA 0x45
527#define R518_I2C_CTL 0x47 /* OV518(+) only */
b46aaa02 528#define OVFX2_I2C_ADDR 0x00
6a7eba24
JFM		 529
530/* I2C ADDRESSES */
531#define OV7xx0_SID 0x42
229bb7dc 532#define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
6a7eba24
JFM		 533#define OV8xx0_SID 0xa0
534#define OV6xx0_SID 0xc0
535
536/* OV7610 registers */
537#define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
49809d6a
HG		 538#define OV7610_REG_BLUE 0x01 /* blue channel balance */
539#define OV7610_REG_RED 0x02 /* red channel balance */
6a7eba24
JFM		 540#define OV7610_REG_SAT 0x03 /* saturation */
541#define OV8610_REG_HUE 0x04 /* 04 reserved */
542#define OV7610_REG_CNT 0x05 /* Y contrast */
543#define OV7610_REG_BRT 0x06 /* Y brightness */
544#define OV7610_REG_COM_C 0x14 /* misc common regs */
545#define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
546#define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
547#define OV7610_REG_COM_I 0x29 /* misc settings */
548
549/* OV7670 registers */
550#define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
551#define OV7670_REG_BLUE 0x01 /* blue gain */
552#define OV7670_REG_RED 0x02 /* red gain */
553#define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
554#define OV7670_REG_COM1 0x04 /* Control 1 */
555#define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
556#define OV7670_REG_COM3 0x0c /* Control 3 */
557#define OV7670_REG_COM4 0x0d /* Control 4 */
558#define OV7670_REG_COM5 0x0e /* All "reserved" */
559#define OV7670_REG_COM6 0x0f /* Control 6 */
560#define OV7670_REG_AECH 0x10 /* More bits of AEC value */
561#define OV7670_REG_CLKRC 0x11 /* Clock control */
562#define OV7670_REG_COM7 0x12 /* Control 7 */
563#define OV7670_COM7_FMT_VGA 0x00
564#define OV7670_COM7_YUV 0x00 /* YUV */
565#define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
566#define OV7670_COM7_FMT_MASK 0x38
567#define OV7670_COM7_RESET 0x80 /* Register reset */
568#define OV7670_REG_COM8 0x13 /* Control 8 */
569#define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
570#define OV7670_COM8_AWB 0x02 /* White balance enable */
571#define OV7670_COM8_AGC 0x04 /* Auto gain enable */
572#define OV7670_COM8_BFILT 0x20 /* Band filter enable */
573#define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
574#define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
575#define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
576#define OV7670_REG_COM10 0x15 /* Control 10 */
577#define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
578#define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
579#define OV7670_REG_VSTART 0x19 /* Vert start high bits */
580#define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
581#define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
0cd6759d 582#define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
6a7eba24
JFM		 583#define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
584#define OV7670_REG_AEW 0x24 /* AGC upper limit */
585#define OV7670_REG_AEB 0x25 /* AGC lower limit */
586#define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
587#define OV7670_REG_HREF 0x32 /* HREF pieces */
588#define OV7670_REG_TSLB 0x3a /* lots of stuff */
589#define OV7670_REG_COM11 0x3b /* Control 11 */
590#define OV7670_COM11_EXP 0x02
591#define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
592#define OV7670_REG_COM12 0x3c /* Control 12 */
593#define OV7670_REG_COM13 0x3d /* Control 13 */
594#define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
595#define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
596#define OV7670_REG_COM14 0x3e /* Control 14 */
597#define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
598#define OV7670_REG_COM15 0x40 /* Control 15 */
599#define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
600#define OV7670_REG_COM16 0x41 /* Control 16 */
601#define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
602#define OV7670_REG_BRIGHT 0x55 /* Brightness */
603#define OV7670_REG_CONTRAS 0x56 /* Contrast control */
604#define OV7670_REG_GFIX 0x69 /* Fix gain control */
605#define OV7670_REG_RGB444 0x8c /* RGB 444 control */
606#define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
607#define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
608#define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
609#define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
610#define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
611#define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
612#define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
613#define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
614#define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
615
4202f71c
JFM		 616struct ov_regvals {
617 __u8 reg;
618 __u8 val;
619};
620struct ov_i2c_regvals {
621 __u8 reg;
622 __u8 val;
623};
624
635118d5
HG		 625/* Settings for OV2610 camera chip */
626static const struct ov_i2c_regvals norm_2610[] =
627{
b46aaa02 628 { 0x12, 0x80 }, /* reset */
635118d5
HG		 629};
630
631static const struct ov_i2c_regvals norm_3620b[] =
632{
633 /*
634 * From the datasheet: "Note that after writing to register COMH
635 * (0x12) to change the sensor mode, registers related to the
636 * sensor’s cropping window will be reset back to their default
637 * values."
638 *
639 * "wait 4096 external clock ... to make sure the sensor is
640 * stable and ready to access registers" i.e. 160us at 24MHz
641 */
642
643 { 0x12, 0x80 }, /* COMH reset */
644 { 0x12, 0x00 }, /* QXGA, master */
645
646 /*
647 * 11 CLKRC "Clock Rate Control"
648 * [7] internal frequency doublers: on
649 * [6] video port mode: master
650 * [5:0] clock divider: 1
651 */
652 { 0x11, 0x80 },
653
654 /*
655 * 13 COMI "Common Control I"
656 * = 192 (0xC0) 11000000
657 * COMI[7] "AEC speed selection"
658 * = 1 (0x01) 1....... "Faster AEC correction"
659 * COMI[6] "AEC speed step selection"
660 * = 1 (0x01) .1...... "Big steps, fast"
661 * COMI[5] "Banding filter on off"
662 * = 0 (0x00) ..0..... "Off"
663 * COMI[4] "Banding filter option"
664 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
665 * the PLL is ON"
666 * COMI[3] "Reserved"
667 * = 0 (0x00) ....0...
668 * COMI[2] "AGC auto manual control selection"
669 * = 0 (0x00) .....0.. "Manual"
670 * COMI[1] "AWB auto manual control selection"
671 * = 0 (0x00) ......0. "Manual"
672 * COMI[0] "Exposure control"
673 * = 0 (0x00) .......0 "Manual"
674 */
675 { 0x13, 0xC0 },
676
677 /*
678 * 09 COMC "Common Control C"
679 * = 8 (0x08) 00001000
680 * COMC[7:5] "Reserved"
681 * = 0 (0x00) 000.....
682 * COMC[4] "Sleep Mode Enable"
683 * = 0 (0x00) ...0.... "Normal mode"
684 * COMC[3:2] "Sensor sampling reset timing selection"
685 * = 2 (0x02) ....10.. "Longer reset time"
686 * COMC[1:0] "Output drive current select"
687 * = 0 (0x00) ......00 "Weakest"
688 */
689 { 0x09, 0x08 },
690
691 /*
692 * 0C COMD "Common Control D"
693 * = 8 (0x08) 00001000
694 * COMD[7] "Reserved"
695 * = 0 (0x00) 0.......
696 * COMD[6] "Swap MSB and LSB at the output port"
697 * = 0 (0x00) .0...... "False"
698 * COMD[5:3] "Reserved"
699 * = 1 (0x01) ..001...
700 * COMD[2] "Output Average On Off"
701 * = 0 (0x00) .....0.. "Output Normal"
702 * COMD[1] "Sensor precharge voltage selection"
703 * = 0 (0x00) ......0. "Selects internal
704 * reference precharge
705 * voltage"
706 * COMD[0] "Snapshot option"
707 * = 0 (0x00) .......0 "Enable live video output
708 * after snapshot sequence"
709 */
710 { 0x0c, 0x08 },
711
712 /*
713 * 0D COME "Common Control E"
714 * = 161 (0xA1) 10100001
715 * COME[7] "Output average option"
716 * = 1 (0x01) 1....... "Output average of 4 pixels"
717 * COME[6] "Anti-blooming control"
718 * = 0 (0x00) .0...... "Off"
719 * COME[5:3] "Reserved"
720 * = 4 (0x04) ..100...
721 * COME[2] "Clock output power down pin status"
722 * = 0 (0x00) .....0.. "Tri-state data output pin
723 * on power down"
724 * COME[1] "Data output pin status selection at power down"
725 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
726 * HREF, and CHSYNC pins on
727 * power down"
728 * COME[0] "Auto zero circuit select"
729 * = 1 (0x01) .......1 "On"
730 */
731 { 0x0d, 0xA1 },
732
733 /*
734 * 0E COMF "Common Control F"
735 * = 112 (0x70) 01110000
736 * COMF[7] "System clock selection"
737 * = 0 (0x00) 0....... "Use 24 MHz system clock"
738 * COMF[6:4] "Reserved"
739 * = 7 (0x07) .111....
740 * COMF[3] "Manual auto negative offset canceling selection"
741 * = 0 (0x00) ....0... "Auto detect negative
742 * offset and cancel it"
743 * COMF[2:0] "Reserved"
744 * = 0 (0x00) .....000
745 */
746 { 0x0e, 0x70 },
747
748 /*
749 * 0F COMG "Common Control G"
750 * = 66 (0x42) 01000010
751 * COMG[7] "Optical black output selection"
752 * = 0 (0x00) 0....... "Disable"
753 * COMG[6] "Black level calibrate selection"
754 * = 1 (0x01) .1...... "Use optical black pixels
755 * to calibrate"
756 * COMG[5:4] "Reserved"
757 * = 0 (0x00) ..00....
758 * COMG[3] "Channel offset adjustment"
759 * = 0 (0x00) ....0... "Disable offset adjustment"
760 * COMG[2] "ADC black level calibration option"
761 * = 0 (0x00) .....0.. "Use B/G line and G/R
762 * line to calibrate each
763 * channel's black level"
764 * COMG[1] "Reserved"
765 * = 1 (0x01) ......1.
766 * COMG[0] "ADC black level calibration enable"
767 * = 0 (0x00) .......0 "Disable"
768 */
769 { 0x0f, 0x42 },
770
771 /*
772 * 14 COMJ "Common Control J"
773 * = 198 (0xC6) 11000110
774 * COMJ[7:6] "AGC gain ceiling"
775 * = 3 (0x03) 11...... "8x"
776 * COMJ[5:4] "Reserved"
777 * = 0 (0x00) ..00....
778 * COMJ[3] "Auto banding filter"
779 * = 0 (0x00) ....0... "Banding filter is always
780 * on off depending on
781 * COMI[5] setting"
782 * COMJ[2] "VSYNC drop option"
783 * = 1 (0x01) .....1.. "SYNC is dropped if frame
784 * data is dropped"
785 * COMJ[1] "Frame data drop"
786 * = 1 (0x01) ......1. "Drop frame data if
787 * exposure is not within
788 * tolerance. In AEC mode,
789 * data is normally dropped
790 * when data is out of
791 * range."
792 * COMJ[0] "Reserved"
793 * = 0 (0x00) .......0
794 */
795 { 0x14, 0xC6 },
796
797 /*
798 * 15 COMK "Common Control K"
799 * = 2 (0x02) 00000010
800 * COMK[7] "CHSYNC pin output swap"
801 * = 0 (0x00) 0....... "CHSYNC"
802 * COMK[6] "HREF pin output swap"
803 * = 0 (0x00) .0...... "HREF"
804 * COMK[5] "PCLK output selection"
805 * = 0 (0x00) ..0..... "PCLK always output"
806 * COMK[4] "PCLK edge selection"
807 * = 0 (0x00) ...0.... "Data valid on falling edge"
808 * COMK[3] "HREF output polarity"
809 * = 0 (0x00) ....0... "positive"
810 * COMK[2] "Reserved"
811 * = 0 (0x00) .....0..
812 * COMK[1] "VSYNC polarity"
813 * = 1 (0x01) ......1. "negative"
814 * COMK[0] "HSYNC polarity"
815 * = 0 (0x00) .......0 "positive"
816 */
817 { 0x15, 0x02 },
818
819 /*
820 * 33 CHLF "Current Control"
821 * = 9 (0x09) 00001001
822 * CHLF[7:6] "Sensor current control"
823 * = 0 (0x00) 00......
824 * CHLF[5] "Sensor current range control"
825 * = 0 (0x00) ..0..... "normal range"
826 * CHLF[4] "Sensor current"
827 * = 0 (0x00) ...0.... "normal current"
828 * CHLF[3] "Sensor buffer current control"
829 * = 1 (0x01) ....1... "half current"
830 * CHLF[2] "Column buffer current control"
831 * = 0 (0x00) .....0.. "normal current"
832 * CHLF[1] "Analog DSP current control"
833 * = 0 (0x00) ......0. "normal current"
834 * CHLF[1] "ADC current control"
835 * = 0 (0x00) ......0. "normal current"
836 */
837 { 0x33, 0x09 },
838
839 /*
840 * 34 VBLM "Blooming Control"
841 * = 80 (0x50) 01010000
842 * VBLM[7] "Hard soft reset switch"
843 * = 0 (0x00) 0....... "Hard reset"
844 * VBLM[6:4] "Blooming voltage selection"
845 * = 5 (0x05) .101....
846 * VBLM[3:0] "Sensor current control"
847 * = 0 (0x00) ....0000
848 */
849 { 0x34, 0x50 },
850
851 /*
852 * 36 VCHG "Sensor Precharge Voltage Control"
853 * = 0 (0x00) 00000000
854 * VCHG[7] "Reserved"
855 * = 0 (0x00) 0.......
856 * VCHG[6:4] "Sensor precharge voltage control"
857 * = 0 (0x00) .000....
858 * VCHG[3:0] "Sensor array common reference"
859 * = 0 (0x00) ....0000
860 */
861 { 0x36, 0x00 },
862
863 /*
864 * 37 ADC "ADC Reference Control"
865 * = 4 (0x04) 00000100
866 * ADC[7:4] "Reserved"
867 * = 0 (0x00) 0000....
868 * ADC[3] "ADC input signal range"
869 * = 0 (0x00) ....0... "Input signal 1.0x"
870 * ADC[2:0] "ADC range control"
871 * = 4 (0x04) .....100
872 */
873 { 0x37, 0x04 },
874
875 /*
876 * 38 ACOM "Analog Common Ground"
877 * = 82 (0x52) 01010010
878 * ACOM[7] "Analog gain control"
879 * = 0 (0x00) 0....... "Gain 1x"
880 * ACOM[6] "Analog black level calibration"
881 * = 1 (0x01) .1...... "On"
882 * ACOM[5:0] "Reserved"
883 * = 18 (0x12) ..010010
884 */
885 { 0x38, 0x52 },
886
887 /*
888 * 3A FREFA "Internal Reference Adjustment"
889 * = 0 (0x00) 00000000
890 * FREFA[7:0] "Range"
891 * = 0 (0x00) 00000000
892 */
893 { 0x3a, 0x00 },
894
895 /*
896 * 3C FVOPT "Internal Reference Adjustment"
897 * = 31 (0x1F) 00011111
898 * FVOPT[7:0] "Range"
899 * = 31 (0x1F) 00011111
900 */
901 { 0x3c, 0x1F },
902
903 /*
904 * 44 Undocumented = 0 (0x00) 00000000
905 * 44[7:0] "It's a secret"
906 * = 0 (0x00) 00000000
907 */
908 { 0x44, 0x00 },
909
910 /*
911 * 40 Undocumented = 0 (0x00) 00000000
912 * 40[7:0] "It's a secret"
913 * = 0 (0x00) 00000000
914 */
915 { 0x40, 0x00 },
916
917 /*
918 * 41 Undocumented = 0 (0x00) 00000000
919 * 41[7:0] "It's a secret"
920 * = 0 (0x00) 00000000
921 */
922 { 0x41, 0x00 },
923
924 /*
925 * 42 Undocumented = 0 (0x00) 00000000
926 * 42[7:0] "It's a secret"
927 * = 0 (0x00) 00000000
928 */
929 { 0x42, 0x00 },
930
931 /*
932 * 43 Undocumented = 0 (0x00) 00000000
933 * 43[7:0] "It's a secret"
934 * = 0 (0x00) 00000000
935 */
936 { 0x43, 0x00 },
937
938 /*
939 * 45 Undocumented = 128 (0x80) 10000000
940 * 45[7:0] "It's a secret"
941 * = 128 (0x80) 10000000
942 */
943 { 0x45, 0x80 },
944
945 /*
946 * 48 Undocumented = 192 (0xC0) 11000000
947 * 48[7:0] "It's a secret"
948 * = 192 (0xC0) 11000000
949 */
950 { 0x48, 0xC0 },
951
952 /*
953 * 49 Undocumented = 25 (0x19) 00011001
954 * 49[7:0] "It's a secret"
955 * = 25 (0x19) 00011001
956 */
957 { 0x49, 0x19 },
958
959 /*
960 * 4B Undocumented = 128 (0x80) 10000000
961 * 4B[7:0] "It's a secret"
962 * = 128 (0x80) 10000000
963 */
964 { 0x4B, 0x80 },
965
966 /*
967 * 4D Undocumented = 196 (0xC4) 11000100
968 * 4D[7:0] "It's a secret"
969 * = 196 (0xC4) 11000100
970 */
971 { 0x4D, 0xC4 },
972
973 /*
974 * 35 VREF "Reference Voltage Control"
975 * = 76 (0x4C) 01001100
976 * VREF[7:5] "Column high reference control"
977 * = 2 (0x02) 010..... "higher voltage"
978 * VREF[4:2] "Column low reference control"
979 * = 3 (0x03) ...011.. "Highest voltage"
980 * VREF[1:0] "Reserved"
981 * = 0 (0x00) ......00
982 */
983 { 0x35, 0x4C },
984
985 /*
986 * 3D Undocumented = 0 (0x00) 00000000
987 * 3D[7:0] "It's a secret"
988 * = 0 (0x00) 00000000
989 */
990 { 0x3D, 0x00 },
991
992 /*
993 * 3E Undocumented = 0 (0x00) 00000000
994 * 3E[7:0] "It's a secret"
995 * = 0 (0x00) 00000000
996 */
997 { 0x3E, 0x00 },
998
999 /*
1000 * 3B FREFB "Internal Reference Adjustment"
1001 * = 24 (0x18) 00011000
1002 * FREFB[7:0] "Range"
1003 * = 24 (0x18) 00011000
1004 */
1005 { 0x3b, 0x18 },
1006
1007 /*
1008 * 33 CHLF "Current Control"
1009 * = 25 (0x19) 00011001
1010 * CHLF[7:6] "Sensor current control"
1011 * = 0 (0x00) 00......
1012 * CHLF[5] "Sensor current range control"
1013 * = 0 (0x00) ..0..... "normal range"
1014 * CHLF[4] "Sensor current"
1015 * = 1 (0x01) ...1.... "double current"
1016 * CHLF[3] "Sensor buffer current control"
1017 * = 1 (0x01) ....1... "half current"
1018 * CHLF[2] "Column buffer current control"
1019 * = 0 (0x00) .....0.. "normal current"
1020 * CHLF[1] "Analog DSP current control"
1021 * = 0 (0x00) ......0. "normal current"
1022 * CHLF[1] "ADC current control"
1023 * = 0 (0x00) ......0. "normal current"
1024 */
1025 { 0x33, 0x19 },
1026
1027 /*
1028 * 34 VBLM "Blooming Control"
1029 * = 90 (0x5A) 01011010
1030 * VBLM[7] "Hard soft reset switch"
1031 * = 0 (0x00) 0....... "Hard reset"
1032 * VBLM[6:4] "Blooming voltage selection"
1033 * = 5 (0x05) .101....
1034 * VBLM[3:0] "Sensor current control"
1035 * = 10 (0x0A) ....1010
1036 */
1037 { 0x34, 0x5A },
1038
1039 /*
1040 * 3B FREFB "Internal Reference Adjustment"
1041 * = 0 (0x00) 00000000
1042 * FREFB[7:0] "Range"
1043 * = 0 (0x00) 00000000
1044 */
1045 { 0x3b, 0x00 },
1046
1047 /*
1048 * 33 CHLF "Current Control"
1049 * = 9 (0x09) 00001001
1050 * CHLF[7:6] "Sensor current control"
1051 * = 0 (0x00) 00......
1052 * CHLF[5] "Sensor current range control"
1053 * = 0 (0x00) ..0..... "normal range"
1054 * CHLF[4] "Sensor current"
1055 * = 0 (0x00) ...0.... "normal current"
1056 * CHLF[3] "Sensor buffer current control"
1057 * = 1 (0x01) ....1... "half current"
1058 * CHLF[2] "Column buffer current control"
1059 * = 0 (0x00) .....0.. "normal current"
1060 * CHLF[1] "Analog DSP current control"
1061 * = 0 (0x00) ......0. "normal current"
1062 * CHLF[1] "ADC current control"
1063 * = 0 (0x00) ......0. "normal current"
1064 */
1065 { 0x33, 0x09 },
1066
1067 /*
1068 * 34 VBLM "Blooming Control"
1069 * = 80 (0x50) 01010000
1070 * VBLM[7] "Hard soft reset switch"
1071 * = 0 (0x00) 0....... "Hard reset"
1072 * VBLM[6:4] "Blooming voltage selection"
1073 * = 5 (0x05) .101....
1074 * VBLM[3:0] "Sensor current control"
1075 * = 0 (0x00) ....0000
1076 */
1077 { 0x34, 0x50 },
1078
1079 /*
1080 * 12 COMH "Common Control H"
1081 * = 64 (0x40) 01000000
1082 * COMH[7] "SRST"
1083 * = 0 (0x00) 0....... "No-op"
1084 * COMH[6:4] "Resolution selection"
1085 * = 4 (0x04) .100.... "XGA"
1086 * COMH[3] "Master slave selection"
1087 * = 0 (0x00) ....0... "Master mode"
1088 * COMH[2] "Internal B/R channel option"
1089 * = 0 (0x00) .....0.. "B/R use same channel"
1090 * COMH[1] "Color bar test pattern"
1091 * = 0 (0x00) ......0. "Off"
1092 * COMH[0] "Reserved"
1093 * = 0 (0x00) .......0
1094 */
1095 { 0x12, 0x40 },
1096
1097 /*
1098 * 17 HREFST "Horizontal window start"
1099 * = 31 (0x1F) 00011111
1100 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1101 * = 31 (0x1F) 00011111
1102 */
1103 { 0x17, 0x1F },
1104
1105 /*
1106 * 18 HREFEND "Horizontal window end"
1107 * = 95 (0x5F) 01011111
1108 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1109 * = 95 (0x5F) 01011111
1110 */
1111 { 0x18, 0x5F },
1112
1113 /*
1114 * 19 VSTRT "Vertical window start"
1115 * = 0 (0x00) 00000000
1116 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1117 * = 0 (0x00) 00000000
1118 */
1119 { 0x19, 0x00 },
1120
1121 /*
1122 * 1A VEND "Vertical window end"
1123 * = 96 (0x60) 01100000
1124 * VEND[7:0] "Vertical Window End, 8 MSBs"
1125 * = 96 (0x60) 01100000
1126 */
1127 { 0x1a, 0x60 },
1128
1129 /*
1130 * 32 COMM "Common Control M"
1131 * = 18 (0x12) 00010010
1132 * COMM[7:6] "Pixel clock divide option"
1133 * = 0 (0x00) 00...... "/1"
1134 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1135 * = 2 (0x02) ..010...
1136 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1137 * = 2 (0x02) .....010
1138 */
1139 { 0x32, 0x12 },
1140
1141 /*
1142 * 03 COMA "Common Control A"
1143 * = 74 (0x4A) 01001010
1144 * COMA[7:4] "AWB Update Threshold"
1145 * = 4 (0x04) 0100....
1146 * COMA[3:2] "Vertical window end line control 2 LSBs"
1147 * = 2 (0x02) ....10..
1148 * COMA[1:0] "Vertical window start line control 2 LSBs"
1149 * = 2 (0x02) ......10
1150 */
1151 { 0x03, 0x4A },
1152
1153 /*
1154 * 11 CLKRC "Clock Rate Control"
1155 * = 128 (0x80) 10000000
1156 * CLKRC[7] "Internal frequency doublers on off seclection"
1157 * = 1 (0x01) 1....... "On"
1158 * CLKRC[6] "Digital video master slave selection"
1159 * = 0 (0x00) .0...... "Master mode, sensor
1160 * provides PCLK"
1161 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1162 * = 0 (0x00) ..000000
1163 */
1164 { 0x11, 0x80 },
1165
1166 /*
1167 * 12 COMH "Common Control H"
1168 * = 0 (0x00) 00000000
1169 * COMH[7] "SRST"
1170 * = 0 (0x00) 0....... "No-op"
1171 * COMH[6:4] "Resolution selection"
1172 * = 0 (0x00) .000.... "QXGA"
1173 * COMH[3] "Master slave selection"
1174 * = 0 (0x00) ....0... "Master mode"
1175 * COMH[2] "Internal B/R channel option"
1176 * = 0 (0x00) .....0.. "B/R use same channel"
1177 * COMH[1] "Color bar test pattern"
1178 * = 0 (0x00) ......0. "Off"
1179 * COMH[0] "Reserved"
1180 * = 0 (0x00) .......0
1181 */
1182 { 0x12, 0x00 },
1183
1184 /*
1185 * 12 COMH "Common Control H"
1186 * = 64 (0x40) 01000000
1187 * COMH[7] "SRST"
1188 * = 0 (0x00) 0....... "No-op"
1189 * COMH[6:4] "Resolution selection"
1190 * = 4 (0x04) .100.... "XGA"
1191 * COMH[3] "Master slave selection"
1192 * = 0 (0x00) ....0... "Master mode"
1193 * COMH[2] "Internal B/R channel option"
1194 * = 0 (0x00) .....0.. "B/R use same channel"
1195 * COMH[1] "Color bar test pattern"
1196 * = 0 (0x00) ......0. "Off"
1197 * COMH[0] "Reserved"
1198 * = 0 (0x00) .......0
1199 */
1200 { 0x12, 0x40 },
1201
1202 /*
1203 * 17 HREFST "Horizontal window start"
1204 * = 31 (0x1F) 00011111
1205 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1206 * = 31 (0x1F) 00011111
1207 */
1208 { 0x17, 0x1F },
1209
1210 /*
1211 * 18 HREFEND "Horizontal window end"
1212 * = 95 (0x5F) 01011111
1213 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1214 * = 95 (0x5F) 01011111
1215 */
1216 { 0x18, 0x5F },
1217
1218 /*
1219 * 19 VSTRT "Vertical window start"
1220 * = 0 (0x00) 00000000
1221 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1222 * = 0 (0x00) 00000000
1223 */
1224 { 0x19, 0x00 },
1225
1226 /*
1227 * 1A VEND "Vertical window end"
1228 * = 96 (0x60) 01100000
1229 * VEND[7:0] "Vertical Window End, 8 MSBs"
1230 * = 96 (0x60) 01100000
1231 */
1232 { 0x1a, 0x60 },
1233
1234 /*
1235 * 32 COMM "Common Control M"
1236 * = 18 (0x12) 00010010
1237 * COMM[7:6] "Pixel clock divide option"
1238 * = 0 (0x00) 00...... "/1"
1239 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1240 * = 2 (0x02) ..010...
1241 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1242 * = 2 (0x02) .....010
1243 */
1244 { 0x32, 0x12 },
1245
1246 /*
1247 * 03 COMA "Common Control A"
1248 * = 74 (0x4A) 01001010
1249 * COMA[7:4] "AWB Update Threshold"
1250 * = 4 (0x04) 0100....
1251 * COMA[3:2] "Vertical window end line control 2 LSBs"
1252 * = 2 (0x02) ....10..
1253 * COMA[1:0] "Vertical window start line control 2 LSBs"
1254 * = 2 (0x02) ......10
1255 */
1256 { 0x03, 0x4A },
1257
1258 /*
1259 * 02 RED "Red Gain Control"
1260 * = 175 (0xAF) 10101111
1261 * RED[7] "Action"
1262 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1263 * RED[6:0] "Value"
1264 * = 47 (0x2F) .0101111
1265 */
1266 { 0x02, 0xAF },
1267
1268 /*
1269 * 2D ADDVSL "VSYNC Pulse Width"
1270 * = 210 (0xD2) 11010010
1271 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1272 * = 210 (0xD2) 11010010
1273 */
1274 { 0x2d, 0xD2 },
1275
1276 /*
1277 * 00 GAIN = 24 (0x18) 00011000
1278 * GAIN[7:6] "Reserved"
1279 * = 0 (0x00) 00......
1280 * GAIN[5] "Double"
1281 * = 0 (0x00) ..0..... "False"
1282 * GAIN[4] "Double"
1283 * = 1 (0x01) ...1.... "True"
1284 * GAIN[3:0] "Range"
1285 * = 8 (0x08) ....1000
1286 */
1287 { 0x00, 0x18 },
1288
1289 /*
1290 * 01 BLUE "Blue Gain Control"
1291 * = 240 (0xF0) 11110000
1292 * BLUE[7] "Action"
1293 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1294 * BLUE[6:0] "Value"
1295 * = 112 (0x70) .1110000
1296 */
1297 { 0x01, 0xF0 },
1298
1299 /*
1300 * 10 AEC "Automatic Exposure Control"
1301 * = 10 (0x0A) 00001010
1302 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1303 * = 10 (0x0A) 00001010
1304 */
1305 { 0x10, 0x0A },
1306
1307 { 0xE1, 0x67 },
1308 { 0xE3, 0x03 },
1309 { 0xE4, 0x26 },
1310 { 0xE5, 0x3E },
1311 { 0xF8, 0x01 },
1312 { 0xFF, 0x01 },
1313};
1314
4202f71c
JFM		 1315static const struct ov_i2c_regvals norm_6x20[] = {
1316 { 0x12, 0x80 }, /* reset */
1317 { 0x11, 0x01 },
1318 { 0x03, 0x60 },
1319 { 0x05, 0x7f }, /* For when autoadjust is off */
1320 { 0x07, 0xa8 },
1321 /* The ratio of 0x0c and 0x0d controls the white point */
1322 { 0x0c, 0x24 },
1323 { 0x0d, 0x24 },
1324 { 0x0f, 0x15 }, /* COMS */
1325 { 0x10, 0x75 }, /* AEC Exposure time */
1326 { 0x12, 0x24 }, /* Enable AGC */
1327 { 0x14, 0x04 },
1328 /* 0x16: 0x06 helps frame stability with moving objects */
1329 { 0x16, 0x06 },
1330/* { 0x20, 0x30 }, * Aperture correction enable */
1331 { 0x26, 0xb2 }, /* BLC enable */
1332 /* 0x28: 0x05 Selects RGB format if RGB on */
1333 { 0x28, 0x05 },
1334 { 0x2a, 0x04 }, /* Disable framerate adjust */
1335/* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
ae49c404 1336 { 0x2d, 0x85 },
4202f71c
JFM		 1337 { 0x33, 0xa0 }, /* Color Processing Parameter */
1338 { 0x34, 0xd2 }, /* Max A/D range */
1339 { 0x38, 0x8b },
1340 { 0x39, 0x40 },
1341
1342 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1343 { 0x3c, 0x3c }, /* Change AEC mode */
1344 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1345
1346 { 0x3d, 0x80 },
1347 /* These next two registers (0x4a, 0x4b) are undocumented.
1348 * They control the color balance */
1349 { 0x4a, 0x80 },
1350 { 0x4b, 0x80 },
1351 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1352 { 0x4e, 0xc1 },
1353 { 0x4f, 0x04 },
1354/* Do 50-53 have any effect? */
1355/* Toggle 0x12[2] off and on here? */
1356};
1357
1358static const struct ov_i2c_regvals norm_6x30[] = {
1359 { 0x12, 0x80 }, /* Reset */
1360 { 0x00, 0x1f }, /* Gain */
1361 { 0x01, 0x99 }, /* Blue gain */
1362 { 0x02, 0x7c }, /* Red gain */
1363 { 0x03, 0xc0 }, /* Saturation */
1364 { 0x05, 0x0a }, /* Contrast */
1365 { 0x06, 0x95 }, /* Brightness */
1366 { 0x07, 0x2d }, /* Sharpness */
1367 { 0x0c, 0x20 },
1368 { 0x0d, 0x20 },
02ab18b0 1369 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
4202f71c
JFM		 1370 { 0x0f, 0x05 },
1371 { 0x10, 0x9a },
1372 { 0x11, 0x00 }, /* Pixel clock = fastest */
1373 { 0x12, 0x24 }, /* Enable AGC and AWB */
1374 { 0x13, 0x21 },
1375 { 0x14, 0x80 },
1376 { 0x15, 0x01 },
1377 { 0x16, 0x03 },
1378 { 0x17, 0x38 },
1379 { 0x18, 0xea },
1380 { 0x19, 0x04 },
1381 { 0x1a, 0x93 },
1382 { 0x1b, 0x00 },
1383 { 0x1e, 0xc4 },
1384 { 0x1f, 0x04 },
1385 { 0x20, 0x20 },
1386 { 0x21, 0x10 },
1387 { 0x22, 0x88 },
1388 { 0x23, 0xc0 }, /* Crystal circuit power level */
1389 { 0x25, 0x9a }, /* Increase AEC black ratio */
1390 { 0x26, 0xb2 }, /* BLC enable */
1391 { 0x27, 0xa2 },
1392 { 0x28, 0x00 },
1393 { 0x29, 0x00 },
1394 { 0x2a, 0x84 }, /* 60 Hz power */
1395 { 0x2b, 0xa8 }, /* 60 Hz power */
1396 { 0x2c, 0xa0 },
1397 { 0x2d, 0x95 }, /* Enable auto-brightness */
1398 { 0x2e, 0x88 },
1399 { 0x33, 0x26 },
1400 { 0x34, 0x03 },
1401 { 0x36, 0x8f },
1402 { 0x37, 0x80 },
1403 { 0x38, 0x83 },
1404 { 0x39, 0x80 },
1405 { 0x3a, 0x0f },
1406 { 0x3b, 0x3c },
1407 { 0x3c, 0x1a },
1408 { 0x3d, 0x80 },
1409 { 0x3e, 0x80 },
1410 { 0x3f, 0x0e },
1411 { 0x40, 0x00 }, /* White bal */
1412 { 0x41, 0x00 }, /* White bal */
1413 { 0x42, 0x80 },
1414 { 0x43, 0x3f }, /* White bal */
1415 { 0x44, 0x80 },
1416 { 0x45, 0x20 },
1417 { 0x46, 0x20 },
1418 { 0x47, 0x80 },
1419 { 0x48, 0x7f },
1420 { 0x49, 0x00 },
1421 { 0x4a, 0x00 },
1422 { 0x4b, 0x80 },
1423 { 0x4c, 0xd0 },
1424 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1425 { 0x4e, 0x40 },
1426 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1427 { 0x50, 0xff },
1428 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1429 { 0x55, 0xff },
1430 { 0x56, 0x12 },
1431 { 0x57, 0x81 },
1432 { 0x58, 0x75 },
1433 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1434 { 0x5a, 0x2c },
1435 { 0x5b, 0x0f }, /* AWB chrominance levels */
1436 { 0x5c, 0x10 },
1437 { 0x3d, 0x80 },
1438 { 0x27, 0xa6 },
1439 { 0x12, 0x20 }, /* Toggle AWB */
1440 { 0x12, 0x24 },
1441};
1442
1443/* Lawrence Glaister <lg@jfm.bc.ca> reports:
1444 *
1445 * Register 0x0f in the 7610 has the following effects:
1446 *
1447 * 0x85 (AEC method 1): Best overall, good contrast range
1448 * 0x45 (AEC method 2): Very overexposed
1449 * 0xa5 (spec sheet default): Ok, but the black level is
1450 * shifted resulting in loss of contrast
1451 * 0x05 (old driver setting): very overexposed, too much
1452 * contrast
1453 */
1454static const struct ov_i2c_regvals norm_7610[] = {
1455 { 0x10, 0xff },
1456 { 0x16, 0x06 },
1457 { 0x28, 0x24 },
1458 { 0x2b, 0xac },
1459 { 0x12, 0x00 },
1460 { 0x38, 0x81 },
1461 { 0x28, 0x24 }, /* 0c */
1462 { 0x0f, 0x85 }, /* lg's setting */
1463 { 0x15, 0x01 },
1464 { 0x20, 0x1c },
1465 { 0x23, 0x2a },
1466 { 0x24, 0x10 },
1467 { 0x25, 0x8a },
1468 { 0x26, 0xa2 },
1469 { 0x27, 0xc2 },
1470 { 0x2a, 0x04 },
1471 { 0x2c, 0xfe },
1472 { 0x2d, 0x93 },
1473 { 0x30, 0x71 },
1474 { 0x31, 0x60 },
1475 { 0x32, 0x26 },
1476 { 0x33, 0x20 },
1477 { 0x34, 0x48 },
1478 { 0x12, 0x24 },
1479 { 0x11, 0x01 },
1480 { 0x0c, 0x24 },
1481 { 0x0d, 0x24 },
1482};
1483
1484static const struct ov_i2c_regvals norm_7620[] = {
a511ba94 1485 { 0x12, 0x80 }, /* reset */
4202f71c
JFM		 1486 { 0x00, 0x00 }, /* gain */
1487 { 0x01, 0x80 }, /* blue gain */
1488 { 0x02, 0x80 }, /* red gain */
1489 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1490 { 0x06, 0x60 },
1491 { 0x07, 0x00 },
1492 { 0x0c, 0x24 },
1493 { 0x0c, 0x24 },
1494 { 0x0d, 0x24 },
1495 { 0x11, 0x01 },
1496 { 0x12, 0x24 },
1497 { 0x13, 0x01 },
1498 { 0x14, 0x84 },
1499 { 0x15, 0x01 },
1500 { 0x16, 0x03 },
1501 { 0x17, 0x2f },
1502 { 0x18, 0xcf },
1503 { 0x19, 0x06 },
1504 { 0x1a, 0xf5 },
1505 { 0x1b, 0x00 },
1506 { 0x20, 0x18 },
1507 { 0x21, 0x80 },
1508 { 0x22, 0x80 },
1509 { 0x23, 0x00 },
1510 { 0x26, 0xa2 },
1511 { 0x27, 0xea },
b282d873 1512 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
4202f71c
JFM		 1513 { 0x29, 0x00 },
1514 { 0x2a, 0x10 },
1515 { 0x2b, 0x00 },
1516 { 0x2c, 0x88 },
1517 { 0x2d, 0x91 },
1518 { 0x2e, 0x80 },
1519 { 0x2f, 0x44 },
1520 { 0x60, 0x27 },
1521 { 0x61, 0x02 },
1522 { 0x62, 0x5f },
1523 { 0x63, 0xd5 },
1524 { 0x64, 0x57 },
1525 { 0x65, 0x83 },
1526 { 0x66, 0x55 },
1527 { 0x67, 0x92 },
1528 { 0x68, 0xcf },
1529 { 0x69, 0x76 },
1530 { 0x6a, 0x22 },
1531 { 0x6b, 0x00 },
1532 { 0x6c, 0x02 },
1533 { 0x6d, 0x44 },
1534 { 0x6e, 0x80 },
1535 { 0x6f, 0x1d },
1536 { 0x70, 0x8b },
1537 { 0x71, 0x00 },
1538 { 0x72, 0x14 },
1539 { 0x73, 0x54 },
1540 { 0x74, 0x00 },
1541 { 0x75, 0x8e },
1542 { 0x76, 0x00 },
1543 { 0x77, 0xff },
1544 { 0x78, 0x80 },
1545 { 0x79, 0x80 },
1546 { 0x7a, 0x80 },
1547 { 0x7b, 0xe2 },
1548 { 0x7c, 0x00 },
1549};
1550
1551/* 7640 and 7648. The defaults should be OK for most registers. */
1552static const struct ov_i2c_regvals norm_7640[] = {
1553 { 0x12, 0x80 },
1554 { 0x12, 0x14 },
1555};
1556
1557/* 7670. Defaults taken from OmniVision provided data,
1558* as provided by Jonathan Corbet of OLPC */
1559static const struct ov_i2c_regvals norm_7670[] = {
1560 { OV7670_REG_COM7, OV7670_COM7_RESET },
1561 { OV7670_REG_TSLB, 0x04 }, /* OV */
1562 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1563 { OV7670_REG_CLKRC, 0x01 },
1564/*
1565 * Set the hardware window. These values from OV don't entirely
1566 * make sense - hstop is less than hstart. But they work...
1567 */
1568 { OV7670_REG_HSTART, 0x13 },
1569 { OV7670_REG_HSTOP, 0x01 },
1570 { OV7670_REG_HREF, 0xb6 },
1571 { OV7670_REG_VSTART, 0x02 },
1572 { OV7670_REG_VSTOP, 0x7a },
1573 { OV7670_REG_VREF, 0x0a },
1574
ac40b1fa
JFM		 1575 { OV7670_REG_COM3, 0x00 },
1576 { OV7670_REG_COM14, 0x00 },
4202f71c
JFM		 1577/* Mystery scaling numbers */
1578 { 0x70, 0x3a },
1579 { 0x71, 0x35 },
1580 { 0x72, 0x11 },
1581 { 0x73, 0xf0 },
1582 { 0xa2, 0x02 },
1583/* { OV7670_REG_COM10, 0x0 }, */
1584
1585/* Gamma curve values */
1586 { 0x7a, 0x20 },
1587 { 0x7b, 0x10 },
1588 { 0x7c, 0x1e },
1589 { 0x7d, 0x35 },
1590 { 0x7e, 0x5a },
1591 { 0x7f, 0x69 },
1592 { 0x80, 0x76 },
1593 { 0x81, 0x80 },
1594 { 0x82, 0x88 },
1595 { 0x83, 0x8f },
1596 { 0x84, 0x96 },
1597 { 0x85, 0xa3 },
1598 { 0x86, 0xaf },
1599 { 0x87, 0xc4 },
1600 { 0x88, 0xd7 },
1601 { 0x89, 0xe8 },
1602
1603/* AGC and AEC parameters. Note we start by disabling those features,
1604 then turn them only after tweaking the values. */
1605 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1606 | OV7670_COM8_AECSTEP
1607 | OV7670_COM8_BFILT },
ac40b1fa
JFM		 1608 { OV7670_REG_GAIN, 0x00 },
1609 { OV7670_REG_AECH, 0x00 },
4202f71c
JFM		 1610 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1611 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1612 { OV7670_REG_BD50MAX, 0x05 },
1613 { OV7670_REG_BD60MAX, 0x07 },
1614 { OV7670_REG_AEW, 0x95 },
1615 { OV7670_REG_AEB, 0x33 },
1616 { OV7670_REG_VPT, 0xe3 },
1617 { OV7670_REG_HAECC1, 0x78 },
1618 { OV7670_REG_HAECC2, 0x68 },
1619 { 0xa1, 0x03 }, /* magic */
1620 { OV7670_REG_HAECC3, 0xd8 },
1621 { OV7670_REG_HAECC4, 0xd8 },
1622 { OV7670_REG_HAECC5, 0xf0 },
1623 { OV7670_REG_HAECC6, 0x90 },
1624 { OV7670_REG_HAECC7, 0x94 },
1625 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1626 | OV7670_COM8_AECSTEP
1627 | OV7670_COM8_BFILT
1628 | OV7670_COM8_AGC
1629 | OV7670_COM8_AEC },
1630
1631/* Almost all of these are magic "reserved" values. */
1632 { OV7670_REG_COM5, 0x61 },
1633 { OV7670_REG_COM6, 0x4b },
1634 { 0x16, 0x02 },
1635 { OV7670_REG_MVFP, 0x07 },
1636 { 0x21, 0x02 },
1637 { 0x22, 0x91 },
1638 { 0x29, 0x07 },
1639 { 0x33, 0x0b },
1640 { 0x35, 0x0b },
1641 { 0x37, 0x1d },
1642 { 0x38, 0x71 },
1643 { 0x39, 0x2a },
1644 { OV7670_REG_COM12, 0x78 },
1645 { 0x4d, 0x40 },
1646 { 0x4e, 0x20 },
ac40b1fa 1647 { OV7670_REG_GFIX, 0x00 },
4202f71c
JFM		 1648 { 0x6b, 0x4a },
1649 { 0x74, 0x10 },
1650 { 0x8d, 0x4f },
ac40b1fa
JFM		 1651 { 0x8e, 0x00 },
1652 { 0x8f, 0x00 },
1653 { 0x90, 0x00 },
1654 { 0x91, 0x00 },
1655 { 0x96, 0x00 },
1656 { 0x9a, 0x00 },
4202f71c
JFM		 1657 { 0xb0, 0x84 },
1658 { 0xb1, 0x0c },
1659 { 0xb2, 0x0e },
1660 { 0xb3, 0x82 },
1661 { 0xb8, 0x0a },
1662
1663/* More reserved magic, some of which tweaks white balance */
1664 { 0x43, 0x0a },
1665 { 0x44, 0xf0 },
1666 { 0x45, 0x34 },
1667 { 0x46, 0x58 },
1668 { 0x47, 0x28 },
1669 { 0x48, 0x3a },
1670 { 0x59, 0x88 },
1671 { 0x5a, 0x88 },
1672 { 0x5b, 0x44 },
1673 { 0x5c, 0x67 },
1674 { 0x5d, 0x49 },
1675 { 0x5e, 0x0e },
1676 { 0x6c, 0x0a },
1677 { 0x6d, 0x55 },
1678 { 0x6e, 0x11 },
1679 { 0x6f, 0x9f },
1680 /* "9e for advance AWB" */
1681 { 0x6a, 0x40 },
1682 { OV7670_REG_BLUE, 0x40 },
1683 { OV7670_REG_RED, 0x60 },
1684 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1685 | OV7670_COM8_AECSTEP
1686 | OV7670_COM8_BFILT
1687 | OV7670_COM8_AGC
1688 | OV7670_COM8_AEC
1689 | OV7670_COM8_AWB },
1690
1691/* Matrix coefficients */
1692 { 0x4f, 0x80 },
1693 { 0x50, 0x80 },
ac40b1fa 1694 { 0x51, 0x00 },
4202f71c
JFM		 1695 { 0x52, 0x22 },
1696 { 0x53, 0x5e },
1697 { 0x54, 0x80 },
1698 { 0x58, 0x9e },
1699
1700 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
ac40b1fa 1701 { OV7670_REG_EDGE, 0x00 },
4202f71c
JFM		 1702 { 0x75, 0x05 },
1703 { 0x76, 0xe1 },
ac40b1fa 1704 { 0x4c, 0x00 },
4202f71c
JFM		 1705 { 0x77, 0x01 },
1706 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1707 | OV7670_COM13_UVSAT
1708 | 2}, /* was 3 */
1709 { 0x4b, 0x09 },
1710 { 0xc9, 0x60 },
1711 { OV7670_REG_COM16, 0x38 },
1712 { 0x56, 0x40 },
1713
1714 { 0x34, 0x11 },
1715 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1716 { 0xa4, 0x88 },
ac40b1fa 1717 { 0x96, 0x00 },
4202f71c
JFM		 1718 { 0x97, 0x30 },
1719 { 0x98, 0x20 },
1720 { 0x99, 0x30 },
1721 { 0x9a, 0x84 },
1722 { 0x9b, 0x29 },
1723 { 0x9c, 0x03 },
1724 { 0x9d, 0x4c },
1725 { 0x9e, 0x3f },
1726 { 0x78, 0x04 },
1727
1728/* Extra-weird stuff. Some sort of multiplexor register */
1729 { 0x79, 0x01 },
1730 { 0xc8, 0xf0 },
1731 { 0x79, 0x0f },
1732 { 0xc8, 0x00 },
1733 { 0x79, 0x10 },
1734 { 0xc8, 0x7e },
1735 { 0x79, 0x0a },
1736 { 0xc8, 0x80 },
1737 { 0x79, 0x0b },
1738 { 0xc8, 0x01 },
1739 { 0x79, 0x0c },
1740 { 0xc8, 0x0f },
1741 { 0x79, 0x0d },
1742 { 0xc8, 0x20 },
1743 { 0x79, 0x09 },
1744 { 0xc8, 0x80 },
1745 { 0x79, 0x02 },
1746 { 0xc8, 0xc0 },
1747 { 0x79, 0x03 },
1748 { 0xc8, 0x40 },
1749 { 0x79, 0x05 },
1750 { 0xc8, 0x30 },
1751 { 0x79, 0x26 },
1752};
1753
1754static const struct ov_i2c_regvals norm_8610[] = {
1755 { 0x12, 0x80 },
1756 { 0x00, 0x00 },
1757 { 0x01, 0x80 },
1758 { 0x02, 0x80 },
1759 { 0x03, 0xc0 },
1760 { 0x04, 0x30 },
1761 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1762 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1763 { 0x0a, 0x86 },
1764 { 0x0b, 0xb0 },
1765 { 0x0c, 0x20 },
1766 { 0x0d, 0x20 },
1767 { 0x11, 0x01 },
1768 { 0x12, 0x25 },
1769 { 0x13, 0x01 },
1770 { 0x14, 0x04 },
1771 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1772 { 0x16, 0x03 },
1773 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1774 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1775 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1776 { 0x1a, 0xf5 },
1777 { 0x1b, 0x00 },
1778 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1779 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1780 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1781 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1782 { 0x26, 0xa2 },
1783 { 0x27, 0xea },
1784 { 0x28, 0x00 },
1785 { 0x29, 0x00 },
1786 { 0x2a, 0x80 },
1787 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1788 { 0x2c, 0xac },
1789 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1790 { 0x2e, 0x80 },
1791 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1792 { 0x4c, 0x00 },
1793 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1794 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1795 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1796 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1797 { 0x63, 0xff },
1798 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1799 * maybe thats wrong */
1800 { 0x65, 0x00 },
1801 { 0x66, 0x55 },
1802 { 0x67, 0xb0 },
1803 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1804 { 0x69, 0x02 },
1805 { 0x6a, 0x22 },
1806 { 0x6b, 0x00 },
1807 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1808 * deleting bit7 colors the first images red */
1809 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1810 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1811 { 0x6f, 0x01 },
1812 { 0x70, 0x8b },
1813 { 0x71, 0x00 },
1814 { 0x72, 0x14 },
1815 { 0x73, 0x54 },
1816 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1817 { 0x75, 0x0e },
1818 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1819 { 0x77, 0xff },
1820 { 0x78, 0x80 },
1821 { 0x79, 0x80 },
1822 { 0x7a, 0x80 },
1823 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1824 { 0x7c, 0x00 },
1825 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1826 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1827 { 0x7f, 0xfb },
1828 { 0x80, 0x28 },
1829 { 0x81, 0x00 },
1830 { 0x82, 0x23 },
1831 { 0x83, 0x0b },
1832 { 0x84, 0x00 },
1833 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1834 { 0x86, 0xc9 },
1835 { 0x87, 0x00 },
1836 { 0x88, 0x00 },
1837 { 0x89, 0x01 },
1838 { 0x12, 0x20 },
1839 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1840};
1841
6a7eba24
JFM		 1842static unsigned char ov7670_abs_to_sm(unsigned char v)
1843{
1844 if (v > 127)
1845 return v & 0x7f;
1846 return (128 - v) | 0x80;
1847}
1848
1849/* Write a OV519 register */
a511ba94 1850static int reg_w(struct sd *sd, __u16 index, __u16 value)
6a7eba24 1851{
a511ba94 1852 int ret, req = 0;
b46aaa02
HG		 1853
1854 switch (sd->bridge) {
1855 case BRIDGE_OV511:
1856 case BRIDGE_OV511PLUS:
1857 req = 2;
1858 break;
1859 case BRIDGE_OVFX2:
a511ba94
HG		 1860 req = 0x0a;
1861 /* fall through */
1862 case BRIDGE_W9968CF:
b46aaa02
HG		 1863 ret = usb_control_msg(sd->gspca_dev.dev,
1864 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
a511ba94 1865 req,
b46aaa02 1866 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
a511ba94 1867 value, index, NULL, 0, 500);
b46aaa02
HG		 1868 goto leave;
1869 default:
1870 req = 1;
1871 }
6a7eba24 1872
739570bb 1873 sd->gspca_dev.usb_buf[0] = value;
6a7eba24
JFM		 1874 ret = usb_control_msg(sd->gspca_dev.dev,
1875 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 1876 req,
6a7eba24
JFM		 1877 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1878 0, index,
739570bb 1879 sd->gspca_dev.usb_buf, 1, 500);
b46aaa02 1880leave:
a511ba94
HG		 1881 if (ret < 0) {
1882 PDEBUG(D_ERR, "Write reg 0x%04x -> [0x%02x] failed",
1883 value, index);
1884 return ret;
1885 }
1886
1887 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1888 return 0;
6a7eba24
JFM		 1889}
1890
a511ba94 1891/* Read from a OV519 register, note not valid for the w9968cf!! */
6a7eba24
JFM		 1892/* returns: negative is error, pos or zero is data */
1893static int reg_r(struct sd *sd, __u16 index)
1894{
1895 int ret;
b46aaa02
HG		 1896 int req;
1897
1898 switch (sd->bridge) {
1899 case BRIDGE_OV511:
1900 case BRIDGE_OV511PLUS:
1901 req = 3;
1902 break;
1903 case BRIDGE_OVFX2:
1904 req = 0x0b;
1905 break;
1906 default:
1907 req = 1;
1908 }
6a7eba24
JFM		 1909
1910 ret = usb_control_msg(sd->gspca_dev.dev,
1911 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 1912 req,
6a7eba24 1913 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 1914 0, index, sd->gspca_dev.usb_buf, 1, 500);
6a7eba24 1915
a511ba94 1916 if (ret >= 0) {
739570bb 1917 ret = sd->gspca_dev.usb_buf[0];
a511ba94
HG		 1918 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1919 } else
6a7eba24 1920 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
a511ba94 1921
6a7eba24
JFM		 1922 return ret;
1923}
1924
1925/* Read 8 values from a OV519 register */
1926static int reg_r8(struct sd *sd,
a5ae2062 1927 __u16 index)
6a7eba24
JFM		 1928{
1929 int ret;
6a7eba24
JFM		 1930
1931 ret = usb_control_msg(sd->gspca_dev.dev,
1932 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1933 1, /* REQ_IO */
1934 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 1935 0, index, sd->gspca_dev.usb_buf, 8, 500);
6a7eba24
JFM		 1936
1937 if (ret >= 0)
739570bb 1938 ret = sd->gspca_dev.usb_buf[0];
6a7eba24
JFM		 1939 else
1940 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
a511ba94 1941
6a7eba24
JFM		 1942 return ret;
1943}
1944
1945/*
1946 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1947 * the same position as 1's in "mask" are cleared and set to "value". Bits
1948 * that are in the same position as 0's in "mask" are preserved, regardless
1949 * of their respective state in "value".
1950 */
1951static int reg_w_mask(struct sd *sd,
1952 __u16 index,
1953 __u8 value,
1954 __u8 mask)
1955{
1956 int ret;
1957 __u8 oldval;
1958
1959 if (mask != 0xff) {
1960 value &= mask; /* Enforce mask on value */
1961 ret = reg_r(sd, index);
1962 if (ret < 0)
1963 return ret;
1964
1965 oldval = ret & ~mask; /* Clear the masked bits */
1966 value |= oldval; /* Set the desired bits */
1967 }
1968 return reg_w(sd, index, value);
1969}
1970
49809d6a
HG		 1971/*
1972 * Writes multiple (n) byte value to a single register. Only valid with certain
1973 * registers (0x30 and 0xc4 - 0xce).
1974 */
1975static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1976{
1977 int ret;
1978
1979 *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1980
1981 ret = usb_control_msg(sd->gspca_dev.dev,
1982 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1983 1 /* REG_IO */,
1984 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1985 0, index,
1986 sd->gspca_dev.usb_buf, n, 500);
a511ba94 1987 if (ret < 0) {
49809d6a 1988 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
a511ba94
HG		 1989 return ret;
1990 }
1991
1992 return 0;
49809d6a
HG		 1993}
1994
1876bb92
HG		 1995static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
1996{
1997 int rc, retries;
1998
1999 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2000
2001 /* Three byte write cycle */
2002 for (retries = 6; ; ) {
2003 /* Select camera register */
2004 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2005 if (rc < 0)
2006 return rc;
2007
2008 /* Write "value" to I2C data port of OV511 */
2009 rc = reg_w(sd, R51x_I2C_DATA, value);
2010 if (rc < 0)
2011 return rc;
2012
2013 /* Initiate 3-byte write cycle */
2014 rc = reg_w(sd, R511_I2C_CTL, 0x01);
2015 if (rc < 0)
2016 return rc;
2017
2018 do
2019 rc = reg_r(sd, R511_I2C_CTL);
2020 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2021
2022 if (rc < 0)
2023 return rc;
2024
2025 if ((rc & 2) == 0) /* Ack? */
2026 break;
2027 if (--retries < 0) {
2028 PDEBUG(D_USBO, "i2c write retries exhausted");
2029 return -1;
2030 }
2031 }
2032
2033 return 0;
2034}
2035
2036static int ov511_i2c_r(struct sd *sd, __u8 reg)
2037{
2038 int rc, value, retries;
2039
2040 /* Two byte write cycle */
2041 for (retries = 6; ; ) {
2042 /* Select camera register */
2043 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2044 if (rc < 0)
2045 return rc;
2046
2047 /* Initiate 2-byte write cycle */
2048 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2049 if (rc < 0)
2050 return rc;
2051
2052 do
2053 rc = reg_r(sd, R511_I2C_CTL);
2054 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2055
2056 if (rc < 0)
2057 return rc;
2058
2059 if ((rc & 2) == 0) /* Ack? */
2060 break;
2061
2062 /* I2C abort */
2063 reg_w(sd, R511_I2C_CTL, 0x10);
2064
2065 if (--retries < 0) {
2066 PDEBUG(D_USBI, "i2c write retries exhausted");
2067 return -1;
2068 }
2069 }
2070
2071 /* Two byte read cycle */
2072 for (retries = 6; ; ) {
2073 /* Initiate 2-byte read cycle */
2074 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2075 if (rc < 0)
2076 return rc;
2077
2078 do
2079 rc = reg_r(sd, R511_I2C_CTL);
2080 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2081
2082 if (rc < 0)
2083 return rc;
2084
2085 if ((rc & 2) == 0) /* Ack? */
2086 break;
2087
2088 /* I2C abort */
2089 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2090 if (rc < 0)
2091 return rc;
2092
2093 if (--retries < 0) {
2094 PDEBUG(D_USBI, "i2c read retries exhausted");
2095 return -1;
2096 }
2097 }
2098
2099 value = reg_r(sd, R51x_I2C_DATA);
2100
2101 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2102
2103 /* This is needed to make i2c_w() work */
2104 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2105 if (rc < 0)
2106 return rc;
2107
2108 return value;
2109}
49809d6a 2110
6a7eba24
JFM		 2111/*
2112 * The OV518 I2C I/O procedure is different, hence, this function.
2113 * This is normally only called from i2c_w(). Note that this function
2114 * always succeeds regardless of whether the sensor is present and working.
2115 */
1876bb92 2116static int ov518_i2c_w(struct sd *sd,
6a7eba24
JFM		 2117 __u8 reg,
2118 __u8 value)
2119{
2120 int rc;
2121
2122 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2123
2124 /* Select camera register */
2125 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2126 if (rc < 0)
2127 return rc;
2128
2129 /* Write "value" to I2C data port of OV511 */
2130 rc = reg_w(sd, R51x_I2C_DATA, value);
2131 if (rc < 0)
2132 return rc;
2133
2134 /* Initiate 3-byte write cycle */
2135 rc = reg_w(sd, R518_I2C_CTL, 0x01);
ac40b1fa
JFM		 2136 if (rc < 0)
2137 return rc;
6a7eba24
JFM		 2138
2139 /* wait for write complete */
2140 msleep(4);
6a7eba24
JFM		 2141 return reg_r8(sd, R518_I2C_CTL);
2142}
2143
2144/*
2145 * returns: negative is error, pos or zero is data
2146 *
2147 * The OV518 I2C I/O procedure is different, hence, this function.
2148 * This is normally only called from i2c_r(). Note that this function
2149 * always succeeds regardless of whether the sensor is present and working.
2150 */
1876bb92 2151static int ov518_i2c_r(struct sd *sd, __u8 reg)
6a7eba24
JFM		 2152{
2153 int rc, value;
2154
2155 /* Select camera register */
2156 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2157 if (rc < 0)
2158 return rc;
2159
2160 /* Initiate 2-byte write cycle */
2161 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2162 if (rc < 0)
2163 return rc;
2164
2165 /* Initiate 2-byte read cycle */
2166 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2167 if (rc < 0)
2168 return rc;
2169 value = reg_r(sd, R51x_I2C_DATA);
2170 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2171 return value;
2172}
2173
b46aaa02
HG		 2174static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2175{
2176 int ret;
2177
2178 ret = usb_control_msg(sd->gspca_dev.dev,
2179 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2180 0x02,
2181 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2182 (__u16)value, (__u16)reg, NULL, 0, 500);
2183
a511ba94 2184 if (ret < 0) {
b46aaa02 2185 PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
a511ba94
HG		 2186 return ret;
2187 }
b46aaa02 2188
a511ba94
HG		 2189 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2190 return 0;
b46aaa02
HG		 2191}
2192
2193static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
2194{
2195 int ret;
2196
2197 ret = usb_control_msg(sd->gspca_dev.dev,
2198 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2199 0x03,
2200 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2201 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
2202
2203 if (ret >= 0) {
2204 ret = sd->gspca_dev.usb_buf[0];
2205 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2206 } else
2207 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
2208
2209 return ret;
2210}
2211
1876bb92
HG		 2212static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2213{
fb1f9020
HG		 2214 int ret = -1;
2215
2216 if (sd->sensor_reg_cache[reg] == value)
2217 return 0;
2218
1876bb92
HG		 2219 switch (sd->bridge) {
2220 case BRIDGE_OV511:
2221 case BRIDGE_OV511PLUS:
fb1f9020
HG		 2222 ret = ov511_i2c_w(sd, reg, value);
2223 break;
1876bb92
HG		 2224 case BRIDGE_OV518:
2225 case BRIDGE_OV518PLUS:
2226 case BRIDGE_OV519:
fb1f9020
HG		 2227 ret = ov518_i2c_w(sd, reg, value);
2228 break;
b46aaa02 2229 case BRIDGE_OVFX2:
fb1f9020
HG		 2230 ret = ovfx2_i2c_w(sd, reg, value);
2231 break;
a511ba94 2232 case BRIDGE_W9968CF:
fb1f9020
HG		 2233 ret = w9968cf_i2c_w(sd, reg, value);
2234 break;
1876bb92 2235 }
fb1f9020
HG		 2236
2237 if (ret >= 0) {
2238 /* Up on sensor reset empty the register cache */
2239 if (reg == 0x12 && (value & 0x80))
2240 memset(sd->sensor_reg_cache, -1,
2241 sizeof(sd->sensor_reg_cache));
2242 else
2243 sd->sensor_reg_cache[reg] = value;
2244 }
2245
2246 return ret;
1876bb92
HG		 2247}
2248
2249static int i2c_r(struct sd *sd, __u8 reg)
2250{
8394bcf3 2251 int ret = -1;
fb1f9020
HG		 2252
2253 if (sd->sensor_reg_cache[reg] != -1)
2254 return sd->sensor_reg_cache[reg];
2255
1876bb92
HG		 2256 switch (sd->bridge) {
2257 case BRIDGE_OV511:
2258 case BRIDGE_OV511PLUS:
fb1f9020
HG		 2259 ret = ov511_i2c_r(sd, reg);
2260 break;
1876bb92
HG		 2261 case BRIDGE_OV518:
2262 case BRIDGE_OV518PLUS:
2263 case BRIDGE_OV519:
fb1f9020
HG		 2264 ret = ov518_i2c_r(sd, reg);
2265 break;
b46aaa02 2266 case BRIDGE_OVFX2:
fb1f9020
HG		 2267 ret = ovfx2_i2c_r(sd, reg);
2268 break;
a511ba94 2269 case BRIDGE_W9968CF:
fb1f9020
HG		 2270 ret = w9968cf_i2c_r(sd, reg);
2271 break;
1876bb92 2272 }
fb1f9020
HG		 2273
2274 if (ret >= 0)
2275 sd->sensor_reg_cache[reg] = ret;
2276
2277 return ret;
1876bb92
HG		 2278}
2279
6a7eba24
JFM		 2280/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2281 * the same position as 1's in "mask" are cleared and set to "value". Bits
2282 * that are in the same position as 0's in "mask" are preserved, regardless
2283 * of their respective state in "value".
2284 */
2285static int i2c_w_mask(struct sd *sd,
2286 __u8 reg,
2287 __u8 value,
2288 __u8 mask)
2289{
2290 int rc;
2291 __u8 oldval;
2292
2293 value &= mask; /* Enforce mask on value */
2294 rc = i2c_r(sd, reg);
2295 if (rc < 0)
2296 return rc;
2297 oldval = rc & ~mask; /* Clear the masked bits */
2298 value |= oldval; /* Set the desired bits */
2299 return i2c_w(sd, reg, value);
2300}
2301
2302/* Temporarily stops OV511 from functioning. Must do this before changing
2303 * registers while the camera is streaming */
2304static inline int ov51x_stop(struct sd *sd)
2305{
a511ba94
HG		 2306 int ret;
2307
6a7eba24
JFM		 2308 PDEBUG(D_STREAM, "stopping");
2309 sd->stopped = 1;
49809d6a
HG		 2310 switch (sd->bridge) {
2311 case BRIDGE_OV511:
2312 case BRIDGE_OV511PLUS:
2313 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2314 case BRIDGE_OV518:
2315 case BRIDGE_OV518PLUS:
2316 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2317 case BRIDGE_OV519:
2318 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
b46aaa02
HG		 2319 case BRIDGE_OVFX2:
2320 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
a511ba94
HG		 2321 case BRIDGE_W9968CF:
2322 ret = reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2323 ret += reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
2324 ret += reg_w(sd, 0x16, 0x0000); /* stop video capture */
2325 return ret;
49809d6a
HG		 2326 }
2327
2328 return 0;
6a7eba24
JFM		 2329}
2330
2331/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2332 * actually stopped (for performance). */
2333static inline int ov51x_restart(struct sd *sd)
2334{
49809d6a
HG		 2335 int rc;
2336
6a7eba24
JFM		 2337 PDEBUG(D_STREAM, "restarting");
2338 if (!sd->stopped)
2339 return 0;
2340 sd->stopped = 0;
2341
2342 /* Reinitialize the stream */
49809d6a
HG		 2343 switch (sd->bridge) {
2344 case BRIDGE_OV511:
2345 case BRIDGE_OV511PLUS:
2346 return reg_w(sd, R51x_SYS_RESET, 0x00);
2347 case BRIDGE_OV518:
2348 case BRIDGE_OV518PLUS:
2349 rc = reg_w(sd, 0x2f, 0x80);
2350 if (rc < 0)
2351 return rc;
2352 return reg_w(sd, R51x_SYS_RESET, 0x00);
2353 case BRIDGE_OV519:
2354 return reg_w(sd, OV519_SYS_RESET1, 0x00);
b46aaa02
HG		 2355 case BRIDGE_OVFX2:
2356 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
a511ba94
HG		 2357 case BRIDGE_W9968CF:
2358 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
49809d6a
HG		 2359 }
2360
2361 return 0;
6a7eba24
JFM		 2362}
2363
229bb7dc
HG		 2364static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2365
6a7eba24
JFM		 2366/* This does an initial reset of an OmniVision sensor and ensures that I2C
2367 * is synchronized. Returns <0 on failure.
2368 */
229bb7dc 2369static int init_ov_sensor(struct sd *sd, __u8 slave)
6a7eba24 2370{
ac40b1fa 2371 int i;
6a7eba24 2372
229bb7dc
HG		 2373 if (ov51x_set_slave_ids(sd, slave) < 0)
2374 return -EIO;
2375
6a7eba24
JFM		 2376 /* Reset the sensor */
2377 if (i2c_w(sd, 0x12, 0x80) < 0)
2378 return -EIO;
2379
2380 /* Wait for it to initialize */
2381 msleep(150);
2382
ac40b1fa 2383 for (i = 0; i < i2c_detect_tries; i++) {
6a7eba24
JFM		 2384 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2385 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
ac40b1fa
JFM		 2386 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2387 return 0;
6a7eba24
JFM		 2388 }
2389
2390 /* Reset the sensor */
2391 if (i2c_w(sd, 0x12, 0x80) < 0)
2392 return -EIO;
2393 /* Wait for it to initialize */
2394 msleep(150);
2395 /* Dummy read to sync I2C */
2396 if (i2c_r(sd, 0x00) < 0)
2397 return -EIO;
2398 }
ac40b1fa 2399 return -EIO;
6a7eba24
JFM		 2400}
2401
6a7eba24
JFM		 2402/* Set the read and write slave IDs. The "slave" argument is the write slave,
2403 * and the read slave will be set to (slave + 1).
2404 * This should not be called from outside the i2c I/O functions.
2405 * Sets I2C read and write slave IDs. Returns <0 for error
2406 */
2407static int ov51x_set_slave_ids(struct sd *sd,
2408 __u8 slave)
2409{
2410 int rc;
2411
a511ba94
HG		 2412 switch (sd->bridge) {
2413 case BRIDGE_OVFX2:
b46aaa02 2414 return reg_w(sd, OVFX2_I2C_ADDR, slave);
a511ba94
HG		 2415 case BRIDGE_W9968CF:
2416 sd->sensor_addr = slave;
2417 return 0;
2418 }
b46aaa02 2419
6a7eba24
JFM		 2420 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2421 if (rc < 0)
2422 return rc;
2423 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2424}
2425
6a7eba24 2426static int write_regvals(struct sd *sd,
a5ae2062 2427 const struct ov_regvals *regvals,
6a7eba24
JFM		 2428 int n)
2429{
2430 int rc;
2431
2432 while (--n >= 0) {
2433 rc = reg_w(sd, regvals->reg, regvals->val);
2434 if (rc < 0)
2435 return rc;
2436 regvals++;
2437 }
2438 return 0;
2439}
2440
2441static int write_i2c_regvals(struct sd *sd,
a5ae2062 2442 const struct ov_i2c_regvals *regvals,
6a7eba24
JFM		 2443 int n)
2444{
2445 int rc;
2446
2447 while (--n >= 0) {
2448 rc = i2c_w(sd, regvals->reg, regvals->val);
2449 if (rc < 0)
2450 return rc;
2451 regvals++;
2452 }
2453 return 0;
2454}
2455
2456/****************************************************************************
2457 *
2458 * OV511 and sensor configuration
2459 *
2460 ***************************************************************************/
2461
635118d5
HG		 2462/* This initializes the OV2x10 / OV3610 / OV3620 */
2463static int ov_hires_configure(struct sd *sd)
2464{
2465 int high, low;
2466
2467 if (sd->bridge != BRIDGE_OVFX2) {
2468 PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
2469 return -1;
2470 }
2471
2472 PDEBUG(D_PROBE, "starting ov hires configuration");
2473
2474 /* Detect sensor (sub)type */
2475 high = i2c_r(sd, 0x0a);
2476 low = i2c_r(sd, 0x0b);
2477 /* info("%x, %x", high, low); */
2478 if (high == 0x96 && low == 0x40) {
2479 PDEBUG(D_PROBE, "Sensor is an OV2610");
2480 sd->sensor = SEN_OV2610;
2481 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2482 PDEBUG(D_PROBE, "Sensor is an OV3610");
2483 sd->sensor = SEN_OV3610;
2484 } else {
2485 PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
2486 high, low);
2487 return -1;
2488 }
2489
2490 /* Set sensor-specific vars */
2491 return 0;
2492}
2493
2494
6a7eba24
JFM		 2495/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2496 * the same register settings as the OV8610, since they are very similar.
2497 */
2498static int ov8xx0_configure(struct sd *sd)
2499{
2500 int rc;
6a7eba24
JFM		 2501
2502 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2503
6a7eba24
JFM		 2504 /* Detect sensor (sub)type */
2505 rc = i2c_r(sd, OV7610_REG_COM_I);
2506 if (rc < 0) {
2507 PDEBUG(D_ERR, "Error detecting sensor type");
2508 return -1;
2509 }
2510 if ((rc & 3) == 1) {
6a7eba24
JFM		 2511 sd->sensor = SEN_OV8610;
2512 } else {
2513 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2514 return -1;
2515 }
6a7eba24
JFM		 2516
2517 /* Set sensor-specific vars */
6a7eba24
JFM		 2518 return 0;
2519}
2520
2521/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2522 * the same register settings as the OV7610, since they are very similar.
2523 */
2524static int ov7xx0_configure(struct sd *sd)
2525{
2526 int rc, high, low;
2527
6a7eba24
JFM		 2528
2529 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2530
6a7eba24
JFM		 2531 /* Detect sensor (sub)type */
2532 rc = i2c_r(sd, OV7610_REG_COM_I);
2533
2534 /* add OV7670 here
2535 * it appears to be wrongly detected as a 7610 by default */
2536 if (rc < 0) {
2537 PDEBUG(D_ERR, "Error detecting sensor type");
2538 return -1;
2539 }
2540 if ((rc & 3) == 3) {
2541 /* quick hack to make OV7670s work */
2542 high = i2c_r(sd, 0x0a);
2543 low = i2c_r(sd, 0x0b);
2544 /* info("%x, %x", high, low); */
2545 if (high == 0x76 && low == 0x73) {
2546 PDEBUG(D_PROBE, "Sensor is an OV7670");
2547 sd->sensor = SEN_OV7670;
2548 } else {
2549 PDEBUG(D_PROBE, "Sensor is an OV7610");
2550 sd->sensor = SEN_OV7610;
2551 }
2552 } else if ((rc & 3) == 1) {
2553 /* I don't know what's different about the 76BE yet. */
b282d873 2554 if (i2c_r(sd, 0x15) & 1) {
6a7eba24 2555 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
b282d873
HG		 2556 sd->sensor = SEN_OV7620;
2557 } else {
6a7eba24 2558 PDEBUG(D_PROBE, "Sensor is an OV76BE");
b282d873
HG		 2559 sd->sensor = SEN_OV76BE;
2560 }
6a7eba24
JFM		 2561 } else if ((rc & 3) == 0) {
2562 /* try to read product id registers */
2563 high = i2c_r(sd, 0x0a);
2564 if (high < 0) {
2565 PDEBUG(D_ERR, "Error detecting camera chip PID");
2566 return high;
2567 }
2568 low = i2c_r(sd, 0x0b);
2569 if (low < 0) {
2570 PDEBUG(D_ERR, "Error detecting camera chip VER");
2571 return low;
2572 }
2573 if (high == 0x76) {
594f5b8b
JFM		 2574 switch (low) {
2575 case 0x30:
6a7eba24 2576 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
4202f71c
JFM		 2577 PDEBUG(D_ERR,
2578 "7630 is not supported by this driver");
2579 return -1;
594f5b8b 2580 case 0x40:
6a7eba24
JFM		 2581 PDEBUG(D_PROBE, "Sensor is an OV7645");
2582 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2583 break;
2584 case 0x45:
6a7eba24
JFM		 2585 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2586 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2587 break;
2588 case 0x48:
6a7eba24
JFM		 2589 PDEBUG(D_PROBE, "Sensor is an OV7648");
2590 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2591 break;
2592 default:
2593 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
6a7eba24
JFM		 2594 return -1;
2595 }
2596 } else {
2597 PDEBUG(D_PROBE, "Sensor is an OV7620");
2598 sd->sensor = SEN_OV7620;
2599 }
2600 } else {
2601 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2602 return -1;
2603 }
2604
6a7eba24 2605 /* Set sensor-specific vars */
6a7eba24
JFM		 2606 return 0;
2607}
2608
2609/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2610static int ov6xx0_configure(struct sd *sd)
2611{
2612 int rc;
4202f71c 2613 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
6a7eba24
JFM		 2614
2615 /* Detect sensor (sub)type */
2616 rc = i2c_r(sd, OV7610_REG_COM_I);
2617 if (rc < 0) {
2618 PDEBUG(D_ERR, "Error detecting sensor type");
2619 return -1;
2620 }
2621
2622 /* Ugh. The first two bits are the version bits, but
2623 * the entire register value must be used. I guess OVT
2624 * underestimated how many variants they would make. */
594f5b8b
JFM		 2625 switch (rc) {
2626 case 0x00:
6a7eba24
JFM		 2627 sd->sensor = SEN_OV6630;
2628 PDEBUG(D_ERR,
2629 "WARNING: Sensor is an OV66308. Your camera may have");
2630 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 2631 break;
2632 case 0x01:
6a7eba24 2633 sd->sensor = SEN_OV6620;
7d971373 2634 PDEBUG(D_PROBE, "Sensor is an OV6620");
594f5b8b
JFM		 2635 break;
2636 case 0x02:
6a7eba24
JFM		 2637 sd->sensor = SEN_OV6630;
2638 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
594f5b8b
JFM		 2639 break;
2640 case 0x03:
7d971373 2641 sd->sensor = SEN_OV66308AF;
6a7eba24 2642 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
594f5b8b
JFM		 2643 break;
2644 case 0x90:
6a7eba24
JFM		 2645 sd->sensor = SEN_OV6630;
2646 PDEBUG(D_ERR,
2647 "WARNING: Sensor is an OV66307. Your camera may have");
2648 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
594f5b8b
JFM		 2649 break;
2650 default:
6a7eba24
JFM		 2651 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
2652 return -1;
2653 }
2654
2655 /* Set sensor-specific vars */
594f5b8b 2656 sd->sif = 1;
6a7eba24 2657
6a7eba24
JFM		 2658 return 0;
2659}
2660
2661/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2662static void ov51x_led_control(struct sd *sd, int on)
2663{
9e4d8258
HG		 2664 if (sd->invert_led)
2665 on = !on;
2666
49809d6a
HG		 2667 switch (sd->bridge) {
2668 /* OV511 has no LED control */
2669 case BRIDGE_OV511PLUS:
2670 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2671 break;
2672 case BRIDGE_OV518:
2673 case BRIDGE_OV518PLUS:
2674 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2675 break;
2676 case BRIDGE_OV519:
2677 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2678 break;
2679 }
6a7eba24
JFM		 2680}
2681
1876bb92 2682static int ov51x_upload_quan_tables(struct sd *sd)
49809d6a 2683{
1876bb92
HG		 2684 const unsigned char yQuanTable511[] = {
2685 0, 1, 1, 2, 2, 3, 3, 4,
2686 1, 1, 1, 2, 2, 3, 4, 4,
2687 1, 1, 2, 2, 3, 4, 4, 4,
2688 2, 2, 2, 3, 4, 4, 4, 4,
2689 2, 2, 3, 4, 4, 5, 5, 5,
2690 3, 3, 4, 4, 5, 5, 5, 5,
2691 3, 4, 4, 4, 5, 5, 5, 5,
2692 4, 4, 4, 4, 5, 5, 5, 5
2693 };
2694
2695 const unsigned char uvQuanTable511[] = {
2696 0, 2, 2, 3, 4, 4, 4, 4,
2697 2, 2, 2, 4, 4, 4, 4, 4,
2698 2, 2, 3, 4, 4, 4, 4, 4,
2699 3, 4, 4, 4, 4, 4, 4, 4,
2700 4, 4, 4, 4, 4, 4, 4, 4,
2701 4, 4, 4, 4, 4, 4, 4, 4,
2702 4, 4, 4, 4, 4, 4, 4, 4,
2703 4, 4, 4, 4, 4, 4, 4, 4
2704 };
2705
2706 /* OV518 quantization tables are 8x4 (instead of 8x8) */
49809d6a
HG		 2707 const unsigned char yQuanTable518[] = {
2708 5, 4, 5, 6, 6, 7, 7, 7,
2709 5, 5, 5, 5, 6, 7, 7, 7,
2710 6, 6, 6, 6, 7, 7, 7, 8,
2711 7, 7, 6, 7, 7, 7, 8, 8
2712 };
2713
2714 const unsigned char uvQuanTable518[] = {
2715 6, 6, 6, 7, 7, 7, 7, 7,
2716 6, 6, 6, 7, 7, 7, 7, 7,
2717 6, 6, 6, 7, 7, 7, 7, 8,
2718 7, 7, 7, 7, 7, 7, 8, 8
2719 };
2720
1876bb92 2721 const unsigned char *pYTable, *pUVTable;
49809d6a 2722 unsigned char val0, val1;
1876bb92 2723 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
49809d6a
HG		 2724
2725 PDEBUG(D_PROBE, "Uploading quantization tables");
2726
1876bb92
HG		 2727 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2728 pYTable = yQuanTable511;
2729 pUVTable = uvQuanTable511;
2730 size = 32;
2731 } else {
2732 pYTable = yQuanTable518;
2733 pUVTable = uvQuanTable518;
2734 size = 16;
2735 }
2736
2737 for (i = 0; i < size; i++) {
49809d6a
HG		 2738 val0 = *pYTable++;
2739 val1 = *pYTable++;
2740 val0 &= 0x0f;
2741 val1 &= 0x0f;
2742 val0 |= val1 << 4;
2743 rc = reg_w(sd, reg, val0);
2744 if (rc < 0)
2745 return rc;
2746
2747 val0 = *pUVTable++;
2748 val1 = *pUVTable++;
2749 val0 &= 0x0f;
2750 val1 &= 0x0f;
2751 val0 |= val1 << 4;
1876bb92 2752 rc = reg_w(sd, reg + size, val0);
49809d6a
HG		 2753 if (rc < 0)
2754 return rc;
2755
2756 reg++;
2757 }
2758
2759 return 0;
2760}
2761
1876bb92
HG		 2762/* This initializes the OV511/OV511+ and the sensor */
2763static int ov511_configure(struct gspca_dev *gspca_dev)
2764{
2765 struct sd *sd = (struct sd *) gspca_dev;
2766 int rc;
2767
2768 /* For 511 and 511+ */
2769 const struct ov_regvals init_511[] = {
2770 { R51x_SYS_RESET, 0x7f },
2771 { R51x_SYS_INIT, 0x01 },
2772 { R51x_SYS_RESET, 0x7f },
2773 { R51x_SYS_INIT, 0x01 },
2774 { R51x_SYS_RESET, 0x3f },
2775 { R51x_SYS_INIT, 0x01 },
2776 { R51x_SYS_RESET, 0x3d },
2777 };
2778
2779 const struct ov_regvals norm_511[] = {
2780 { R511_DRAM_FLOW_CTL, 0x01 },
2781 { R51x_SYS_SNAP, 0x00 },
2782 { R51x_SYS_SNAP, 0x02 },
2783 { R51x_SYS_SNAP, 0x00 },
2784 { R511_FIFO_OPTS, 0x1f },
2785 { R511_COMP_EN, 0x00 },
2786 { R511_COMP_LUT_EN, 0x03 },
2787 };
2788
2789 const struct ov_regvals norm_511_p[] = {
2790 { R511_DRAM_FLOW_CTL, 0xff },
2791 { R51x_SYS_SNAP, 0x00 },
2792 { R51x_SYS_SNAP, 0x02 },
2793 { R51x_SYS_SNAP, 0x00 },
2794 { R511_FIFO_OPTS, 0xff },
2795 { R511_COMP_EN, 0x00 },
2796 { R511_COMP_LUT_EN, 0x03 },
2797 };
2798
2799 const struct ov_regvals compress_511[] = {
2800 { 0x70, 0x1f },
2801 { 0x71, 0x05 },
2802 { 0x72, 0x06 },
2803 { 0x73, 0x06 },
2804 { 0x74, 0x14 },
2805 { 0x75, 0x03 },
2806 { 0x76, 0x04 },
2807 { 0x77, 0x04 },
2808 };
2809
2810 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2811
2812 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2813 if (rc < 0)
2814 return rc;
2815
2816 switch (sd->bridge) {
2817 case BRIDGE_OV511:
2818 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2819 if (rc < 0)
2820 return rc;
2821 break;
2822 case BRIDGE_OV511PLUS:
2823 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2824 if (rc < 0)
2825 return rc;
2826 break;
2827 }
2828
2829 /* Init compression */
2830 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2831 if (rc < 0)
2832 return rc;
2833
2834 rc = ov51x_upload_quan_tables(sd);
2835 if (rc < 0) {
2836 PDEBUG(D_ERR, "Error uploading quantization tables");
2837 return rc;
2838 }
2839
2840 return 0;
2841}
2842
49809d6a
HG		 2843/* This initializes the OV518/OV518+ and the sensor */
2844static int ov518_configure(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 2845{
2846 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 2847 int rc;
2848
2849 /* For 518 and 518+ */
e080fcd9 2850 const struct ov_regvals init_518[] = {
49809d6a
HG		 2851 { R51x_SYS_RESET, 0x40 },
2852 { R51x_SYS_INIT, 0xe1 },
2853 { R51x_SYS_RESET, 0x3e },
2854 { R51x_SYS_INIT, 0xe1 },
2855 { R51x_SYS_RESET, 0x00 },
2856 { R51x_SYS_INIT, 0xe1 },
2857 { 0x46, 0x00 },
2858 { 0x5d, 0x03 },
2859 };
2860
e080fcd9 2861 const struct ov_regvals norm_518[] = {
49809d6a
HG		 2862 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2863 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2864 { 0x31, 0x0f },
2865 { 0x5d, 0x03 },
2866 { 0x24, 0x9f },
2867 { 0x25, 0x90 },
2868 { 0x20, 0x00 },
2869 { 0x51, 0x04 },
2870 { 0x71, 0x19 },
2871 { 0x2f, 0x80 },
2872 };
2873
e080fcd9 2874 const struct ov_regvals norm_518_p[] = {
49809d6a
HG		 2875 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2876 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2877 { 0x31, 0x0f },
2878 { 0x5d, 0x03 },
2879 { 0x24, 0x9f },
2880 { 0x25, 0x90 },
2881 { 0x20, 0x60 },
2882 { 0x51, 0x02 },
2883 { 0x71, 0x19 },
2884 { 0x40, 0xff },
2885 { 0x41, 0x42 },
2886 { 0x46, 0x00 },
2887 { 0x33, 0x04 },
2888 { 0x21, 0x19 },
2889 { 0x3f, 0x10 },
2890 { 0x2f, 0x80 },
2891 };
2892
2893 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2894 PDEBUG(D_PROBE, "Device revision %d",
2895 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2896
2897 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2898 if (rc < 0)
2899 return rc;
2900
2901 /* Set LED GPIO pin to output mode */
2902 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2903 if (rc < 0)
2904 return rc;
6a7eba24 2905
49809d6a
HG		 2906 switch (sd->bridge) {
2907 case BRIDGE_OV518:
2908 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2909 if (rc < 0)
2910 return rc;
2911 break;
2912 case BRIDGE_OV518PLUS:
2913 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2914 if (rc < 0)
2915 return rc;
2916 break;
2917 }
2918
1876bb92 2919 rc = ov51x_upload_quan_tables(sd);
49809d6a
HG		 2920 if (rc < 0) {
2921 PDEBUG(D_ERR, "Error uploading quantization tables");
2922 return rc;
2923 }
2924
2925 rc = reg_w(sd, 0x2f, 0x80);
2926 if (rc < 0)
2927 return rc;
2928
2929 return 0;
2930}
2931
2932static int ov519_configure(struct sd *sd)
2933{
a5ae2062 2934 static const struct ov_regvals init_519[] = {
6a7eba24 2935 { 0x5a, 0x6d }, /* EnableSystem */
6a7eba24
JFM		 2936 { 0x53, 0x9b },
2937 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2938 { 0x5d, 0x03 },
2939 { 0x49, 0x01 },
2940 { 0x48, 0x00 },
2941 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2942 * detection will fail. This deserves further investigation. */
2943 { OV519_GPIO_IO_CTRL0, 0xee },
2944 { 0x51, 0x0f }, /* SetUsbInit */
2945 { 0x51, 0x00 },
2946 { 0x22, 0x00 },
2947 /* windows reads 0x55 at this point*/
2948 };
2949
49809d6a
HG		 2950 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2951}
2952
b46aaa02
HG		 2953static int ovfx2_configure(struct sd *sd)
2954{
2955 static const struct ov_regvals init_fx2[] = {
2956 { 0x00, 0x60 },
2957 { 0x02, 0x01 },
2958 { 0x0f, 0x1d },
2959 { 0xe9, 0x82 },
2960 { 0xea, 0xc7 },
2961 { 0xeb, 0x10 },
2962 { 0xec, 0xf6 },
2963 };
2964
2965 sd->stopped = 1;
2966
2967 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
2968}
2969
49809d6a
HG		 2970/* this function is called at probe time */
2971static int sd_config(struct gspca_dev *gspca_dev,
2972 const struct usb_device_id *id)
2973{
2974 struct sd *sd = (struct sd *) gspca_dev;
b46aaa02 2975 struct cam *cam = &gspca_dev->cam;
49809d6a
HG		 2976 int ret = 0;
2977
9e4d8258
HG		 2978 sd->bridge = id->driver_info & BRIDGE_MASK;
2979 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
49809d6a
HG		 2980
2981 switch (sd->bridge) {
1876bb92
HG		 2982 case BRIDGE_OV511:
2983 case BRIDGE_OV511PLUS:
2984 ret = ov511_configure(gspca_dev);
2985 break;
49809d6a
HG		 2986 case BRIDGE_OV518:
2987 case BRIDGE_OV518PLUS:
2988 ret = ov518_configure(gspca_dev);
2989 break;
2990 case BRIDGE_OV519:
2991 ret = ov519_configure(sd);
2992 break;
b46aaa02
HG		 2993 case BRIDGE_OVFX2:
2994 ret = ovfx2_configure(sd);
2995 cam->bulk_size = OVFX2_BULK_SIZE;
2996 cam->bulk_nurbs = MAX_NURBS;
2997 cam->bulk = 1;
2998 break;
a511ba94
HG		 2999 case BRIDGE_W9968CF:
3000 ret = w9968cf_configure(sd);
3001 cam->reverse_alts = 1;
3002 break;
49809d6a
HG		 3003 }
3004
3005 if (ret)
6a7eba24 3006 goto error;
49809d6a 3007
6a7eba24
JFM		 3008 ov51x_led_control(sd, 0); /* turn LED off */
3009
6a7eba24
JFM		 3010 /* The OV519 must be more aggressive about sensor detection since
3011 * I2C write will never fail if the sensor is not present. We have
3012 * to try to initialize the sensor to detect its presence */
229bb7dc
HG		 3013
3014 /* Test for 76xx */
3015 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
4202f71c
JFM		 3016 if (ov7xx0_configure(sd) < 0) {
3017 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3018 goto error;
3019 }
229bb7dc
HG		 3020 /* Test for 6xx0 */
3021 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3022 if (ov6xx0_configure(sd) < 0) {
3023 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3024 goto error;
3025 }
3026 /* Test for 8xx0 */
3027 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3028 if (ov8xx0_configure(sd) < 0) {
3029 PDEBUG(D_ERR, "Failed to configure OV8xx0");
6a7eba24 3030 goto error;
6a7eba24 3031 }
635118d5
HG		 3032 /* Test for 3xxx / 2xxx */
3033 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3034 if (ov_hires_configure(sd) < 0) {
3035 PDEBUG(D_ERR, "Failed to configure high res OV");
3036 goto error;
3037 }
229bb7dc
HG		 3038 } else {
3039 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
3040 goto error;
6a7eba24
JFM		 3041 }
3042
49809d6a 3043 switch (sd->bridge) {
1876bb92
HG		 3044 case BRIDGE_OV511:
3045 case BRIDGE_OV511PLUS:
3046 if (!sd->sif) {
3047 cam->cam_mode = ov511_vga_mode;
3048 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3049 } else {
3050 cam->cam_mode = ov511_sif_mode;
3051 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3052 }
3053 break;
49809d6a
HG		 3054 case BRIDGE_OV518:
3055 case BRIDGE_OV518PLUS:
3056 if (!sd->sif) {
3057 cam->cam_mode = ov518_vga_mode;
3058 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3059 } else {
3060 cam->cam_mode = ov518_sif_mode;
3061 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3062 }
3063 break;
3064 case BRIDGE_OV519:
3065 if (!sd->sif) {
3066 cam->cam_mode = ov519_vga_mode;
3067 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3068 } else {
3069 cam->cam_mode = ov519_sif_mode;
3070 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3071 }
3072 break;
635118d5
HG		 3073 case BRIDGE_OVFX2:
3074 if (sd->sensor == SEN_OV2610) {
3075 cam->cam_mode = ovfx2_ov2610_mode;
3076 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3077 } else if (sd->sensor == SEN_OV3610) {
3078 cam->cam_mode = ovfx2_ov3610_mode;
3079 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3080 } else if (!sd->sif) {
3081 cam->cam_mode = ov519_vga_mode;
3082 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3083 } else {
3084 cam->cam_mode = ov519_sif_mode;
3085 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3086 }
3087 break;
a511ba94
HG		 3088 case BRIDGE_W9968CF:
3089 cam->cam_mode = w9968cf_vga_mode;
3090 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3091 /* if (sd->sif)
3092 cam->nmodes--; */
3093
3094 /* w9968cf needs initialisation once the sensor is known */
3095 if (w9968cf_init(sd) < 0)
3096 goto error;
3097 break;
6a7eba24 3098 }
594f5b8b 3099 sd->brightness = BRIGHTNESS_DEF;
f5cee95c
HG		 3100 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
3101 sd->contrast = 200; /* The default is too low for the ov6630 */
3102 else
3103 sd->contrast = CONTRAST_DEF;
594f5b8b 3104 sd->colors = COLOR_DEF;
0cd6759d
JFM		 3105 sd->hflip = HFLIP_DEF;
3106 sd->vflip = VFLIP_DEF;
02ab18b0
HG		 3107 sd->autobrightness = AUTOBRIGHT_DEF;
3108 if (sd->sensor == SEN_OV7670) {
3109 sd->freq = OV7670_FREQ_DEF;
3110 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
3111 } else {
3112 sd->freq = FREQ_DEF;
3113 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
3114 (1 << OV7670_FREQ_IDX);
3115 }
3116 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
3117 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
3118 /* OV8610 Frequency filter control should work but needs testing */
3119 if (sd->sensor == SEN_OV8610)
3120 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
635118d5
HG		 3121 /* No controls for the OV2610/OV3610 */
3122 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3123 gspca_dev->ctrl_dis |= 0xFF;
02ab18b0 3124
6a7eba24
JFM		 3125 return 0;
3126error:
3127 PDEBUG(D_ERR, "OV519 Config failed");
3128 return -EBUSY;
3129}
3130
012d6b02
JFM		 3131/* this function is called at probe and resume time */
3132static int sd_init(struct gspca_dev *gspca_dev)
6a7eba24 3133{
4202f71c
JFM		 3134 struct sd *sd = (struct sd *) gspca_dev;
3135
3136 /* initialize the sensor */
3137 switch (sd->sensor) {
635118d5
HG		 3138 case SEN_OV2610:
3139 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3140 return -EIO;
3141 /* Enable autogain, autoexpo, awb, bandfilter */
3142 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3143 return -EIO;
3144 break;
3145 case SEN_OV3610:
3146 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3147 return -EIO;
3148 /* Enable autogain, autoexpo, awb, bandfilter */
3149 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3150 return -EIO;
3151 break;
4202f71c
JFM		 3152 case SEN_OV6620:
3153 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3154 return -EIO;
3155 break;
3156 case SEN_OV6630:
7d971373 3157 case SEN_OV66308AF:
4202f71c
JFM		 3158 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3159 return -EIO;
3160 break;
3161 default:
3162/* case SEN_OV7610: */
3163/* case SEN_OV76BE: */
3164 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3165 return -EIO;
ae49c404
HG		 3166 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3167 return -EIO;
4202f71c
JFM		 3168 break;
3169 case SEN_OV7620:
3170 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3171 return -EIO;
3172 break;
3173 case SEN_OV7640:
3174 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3175 return -EIO;
3176 break;
3177 case SEN_OV7670:
3178 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3179 return -EIO;
3180 break;
3181 case SEN_OV8610:
3182 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3183 return -EIO;
3184 break;
3185 }
6a7eba24
JFM		 3186 return 0;
3187}
3188
1876bb92
HG		 3189/* Set up the OV511/OV511+ with the given image parameters.
3190 *
3191 * Do not put any sensor-specific code in here (including I2C I/O functions)
3192 */
3193static int ov511_mode_init_regs(struct sd *sd)
3194{
3195 int hsegs, vsegs, packet_size, fps, needed;
3196 int interlaced = 0;
3197 struct usb_host_interface *alt;
3198 struct usb_interface *intf;
3199
3200 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3201 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3202 if (!alt) {
3203 PDEBUG(D_ERR, "Couldn't get altsetting");
3204 return -EIO;
3205 }
3206
3207 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3208 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3209
3210 reg_w(sd, R511_CAM_UV_EN, 0x01);
3211 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3212 reg_w(sd, R511_SNAP_OPTS, 0x03);
3213
3214 /* Here I'm assuming that snapshot size == image size.
3215 * I hope that's always true. --claudio
3216 */
3217 hsegs = (sd->gspca_dev.width >> 3) - 1;
3218 vsegs = (sd->gspca_dev.height >> 3) - 1;
3219
3220 reg_w(sd, R511_CAM_PXCNT, hsegs);
3221 reg_w(sd, R511_CAM_LNCNT, vsegs);
3222 reg_w(sd, R511_CAM_PXDIV, 0x00);
3223 reg_w(sd, R511_CAM_LNDIV, 0x00);
3224
3225 /* YUV420, low pass filter on */
3226 reg_w(sd, R511_CAM_OPTS, 0x03);
3227
3228 /* Snapshot additions */
3229 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3230 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3231 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3232 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3233
3234 /******** Set the framerate ********/
3235 if (frame_rate > 0)
3236 sd->frame_rate = frame_rate;
3237
3238 switch (sd->sensor) {
3239 case SEN_OV6620:
3240 /* No framerate control, doesn't like higher rates yet */
3241 sd->clockdiv = 3;
3242 break;
3243
3244 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3245 for more sensors we need to do this for them too */
3246 case SEN_OV7620:
3247 case SEN_OV7640:
b282d873 3248 case SEN_OV76BE:
1876bb92
HG		 3249 if (sd->gspca_dev.width == 320)
3250 interlaced = 1;
3251 /* Fall through */
3252 case SEN_OV6630:
1876bb92
HG		 3253 case SEN_OV7610:
3254 case SEN_OV7670:
3255 switch (sd->frame_rate) {
3256 case 30:
3257 case 25:
3258 /* Not enough bandwidth to do 640x480 @ 30 fps */
3259 if (sd->gspca_dev.width != 640) {
3260 sd->clockdiv = 0;
3261 break;
3262 }
3263 /* Fall through for 640x480 case */
3264 default:
3265/* case 20: */
3266/* case 15: */
3267 sd->clockdiv = 1;
3268 break;
3269 case 10:
3270 sd->clockdiv = 2;
3271 break;
3272 case 5:
3273 sd->clockdiv = 5;
3274 break;
3275 }
3276 if (interlaced) {
3277 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3278 /* Higher then 10 does not work */
3279 if (sd->clockdiv > 10)
3280 sd->clockdiv = 10;
3281 }
3282 break;
3283
3284 case SEN_OV8610:
3285 /* No framerate control ?? */
3286 sd->clockdiv = 0;
3287 break;
3288 }
3289
3290 /* Check if we have enough bandwidth to disable compression */
3291 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3292 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3293 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3294 if (needed > 1400 * packet_size) {
3295 /* Enable Y and UV quantization and compression */
3296 reg_w(sd, R511_COMP_EN, 0x07);
3297 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3298 } else {
3299 reg_w(sd, R511_COMP_EN, 0x06);
3300 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3301 }
3302
3303 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3304 reg_w(sd, R51x_SYS_RESET, 0);
3305
3306 return 0;
3307}
3308
49809d6a
HG		 3309/* Sets up the OV518/OV518+ with the given image parameters
3310 *
3311 * OV518 needs a completely different approach, until we can figure out what
3312 * the individual registers do. Also, only 15 FPS is supported now.
3313 *
3314 * Do not put any sensor-specific code in here (including I2C I/O functions)
3315 */
3316static int ov518_mode_init_regs(struct sd *sd)
3317{
b282d873
HG		 3318 int hsegs, vsegs, packet_size;
3319 struct usb_host_interface *alt;
3320 struct usb_interface *intf;
3321
3322 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3323 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3324 if (!alt) {
3325 PDEBUG(D_ERR, "Couldn't get altsetting");
3326 return -EIO;
3327 }
3328
3329 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3330 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
49809d6a
HG		 3331
3332 /******** Set the mode ********/
3333
3334 reg_w(sd, 0x2b, 0);
3335 reg_w(sd, 0x2c, 0);
3336 reg_w(sd, 0x2d, 0);
3337 reg_w(sd, 0x2e, 0);
3338 reg_w(sd, 0x3b, 0);
3339 reg_w(sd, 0x3c, 0);
3340 reg_w(sd, 0x3d, 0);
3341 reg_w(sd, 0x3e, 0);
3342
3343 if (sd->bridge == BRIDGE_OV518) {
3344 /* Set 8-bit (YVYU) input format */
3345 reg_w_mask(sd, 0x20, 0x08, 0x08);
3346
3347 /* Set 12-bit (4:2:0) output format */
3348 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3349 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3350 } else {
3351 reg_w(sd, 0x28, 0x80);
3352 reg_w(sd, 0x38, 0x80);
3353 }
3354
3355 hsegs = sd->gspca_dev.width / 16;
3356 vsegs = sd->gspca_dev.height / 4;
3357
3358 reg_w(sd, 0x29, hsegs);
3359 reg_w(sd, 0x2a, vsegs);
3360
3361 reg_w(sd, 0x39, hsegs);
3362 reg_w(sd, 0x3a, vsegs);
3363
3364 /* Windows driver does this here; who knows why */
3365 reg_w(sd, 0x2f, 0x80);
3366
b282d873
HG		 3367 /******** Set the framerate ********/
3368 sd->clockdiv = 1;
49809d6a
HG		 3369
3370 /* Mode independent, but framerate dependent, regs */
b282d873
HG		 3371 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3372 reg_w(sd, 0x51, 0x04);
49809d6a
HG		 3373 reg_w(sd, 0x22, 0x18);
3374 reg_w(sd, 0x23, 0xff);
3375
b282d873
HG		 3376 if (sd->bridge == BRIDGE_OV518PLUS) {
3377 switch (sd->sensor) {
3378 case SEN_OV7620:
3379 if (sd->gspca_dev.width == 320) {
3380 reg_w(sd, 0x20, 0x00);
3381 reg_w(sd, 0x21, 0x19);
3382 } else {
3383 reg_w(sd, 0x20, 0x60);
3384 reg_w(sd, 0x21, 0x1f);
3385 }
3386 break;
3387 default:
3388 reg_w(sd, 0x21, 0x19);
3389 }
3390 } else
49809d6a
HG		 3391 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3392
3393 /* FIXME: Sensor-specific */
3394 /* Bit 5 is what matters here. Of course, it is "reserved" */
3395 i2c_w(sd, 0x54, 0x23);
3396
3397 reg_w(sd, 0x2f, 0x80);
3398
3399 if (sd->bridge == BRIDGE_OV518PLUS) {
3400 reg_w(sd, 0x24, 0x94);
3401 reg_w(sd, 0x25, 0x90);
3402 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3403 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3404 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3405 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3406 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3407 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3408 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3409 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3410 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3411 } else {
3412 reg_w(sd, 0x24, 0x9f);
3413 reg_w(sd, 0x25, 0x90);
3414 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3415 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3416 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3417 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3418 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3419 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3420 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3421 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3422 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3423 }
3424
3425 reg_w(sd, 0x2f, 0x80);
3426
3427 return 0;
3428}
3429
3430
6a7eba24
JFM		 3431/* Sets up the OV519 with the given image parameters
3432 *
3433 * OV519 needs a completely different approach, until we can figure out what
3434 * the individual registers do.
3435 *
3436 * Do not put any sensor-specific code in here (including I2C I/O functions)
3437 */
594f5b8b 3438static int ov519_mode_init_regs(struct sd *sd)
6a7eba24 3439{
a5ae2062 3440 static const struct ov_regvals mode_init_519_ov7670[] = {
6a7eba24
JFM		 3441 { 0x5d, 0x03 }, /* Turn off suspend mode */
3442 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3443 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3444 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3445 { 0xa3, 0x18 },
3446 { 0xa4, 0x04 },
3447 { 0xa5, 0x28 },
3448 { 0x37, 0x00 }, /* SetUsbInit */
3449 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3450 /* Enable both fields, YUV Input, disable defect comp (why?) */
3451 { 0x20, 0x0c },
3452 { 0x21, 0x38 },
3453 { 0x22, 0x1d },
3454 { 0x17, 0x50 }, /* undocumented */
3455 { 0x37, 0x00 }, /* undocumented */
3456 { 0x40, 0xff }, /* I2C timeout counter */
3457 { 0x46, 0x00 }, /* I2C clock prescaler */
3458 { 0x59, 0x04 }, /* new from windrv 090403 */
3459 { 0xff, 0x00 }, /* undocumented */
3460 /* windows reads 0x55 at this point, why? */
3461 };
3462
a5ae2062 3463 static const struct ov_regvals mode_init_519[] = {
6a7eba24
JFM		 3464 { 0x5d, 0x03 }, /* Turn off suspend mode */
3465 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3466 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3467 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3468 { 0xa3, 0x18 },
3469 { 0xa4, 0x04 },
3470 { 0xa5, 0x28 },
3471 { 0x37, 0x00 }, /* SetUsbInit */
3472 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3473 /* Enable both fields, YUV Input, disable defect comp (why?) */
3474 { 0x22, 0x1d },
3475 { 0x17, 0x50 }, /* undocumented */
3476 { 0x37, 0x00 }, /* undocumented */
3477 { 0x40, 0xff }, /* I2C timeout counter */
3478 { 0x46, 0x00 }, /* I2C clock prescaler */
3479 { 0x59, 0x04 }, /* new from windrv 090403 */
3480 { 0xff, 0x00 }, /* undocumented */
3481 /* windows reads 0x55 at this point, why? */
3482 };
3483
6a7eba24
JFM		 3484 /******** Set the mode ********/
3485 if (sd->sensor != SEN_OV7670) {
3486 if (write_regvals(sd, mode_init_519,
a5ae2062 3487 ARRAY_SIZE(mode_init_519)))
6a7eba24 3488 return -EIO;
594f5b8b
JFM		 3489 if (sd->sensor == SEN_OV7640) {
3490 /* Select 8-bit input mode */
ac40b1fa 3491 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
594f5b8b 3492 }
6a7eba24
JFM		 3493 } else {
3494 if (write_regvals(sd, mode_init_519_ov7670,
a5ae2062 3495 ARRAY_SIZE(mode_init_519_ov7670)))
6a7eba24
JFM		 3496 return -EIO;
3497 }
3498
ac40b1fa
JFM		 3499 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3500 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
80142efa
HG		 3501 if (sd->sensor == SEN_OV7670 &&
3502 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3503 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3504 else
3505 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
ac40b1fa
JFM		 3506 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3507 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3508 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3509 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3510 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
6a7eba24
JFM		 3511 reg_w(sd, 0x26, 0x00); /* Undocumented */
3512
3513 /******** Set the framerate ********/
3514 if (frame_rate > 0)
3515 sd->frame_rate = frame_rate;
3516
3517/* FIXME: These are only valid at the max resolution. */
3518 sd->clockdiv = 0;
594f5b8b
JFM		 3519 switch (sd->sensor) {
3520 case SEN_OV7640:
6a7eba24 3521 switch (sd->frame_rate) {
53e74515
JFM		 3522 default:
3523/* case 30: */
6a7eba24
JFM		 3524 reg_w(sd, 0xa4, 0x0c);
3525 reg_w(sd, 0x23, 0xff);
3526 break;
3527 case 25:
3528 reg_w(sd, 0xa4, 0x0c);
3529 reg_w(sd, 0x23, 0x1f);
3530 break;
3531 case 20:
3532 reg_w(sd, 0xa4, 0x0c);
3533 reg_w(sd, 0x23, 0x1b);
3534 break;
53e74515 3535 case 15:
6a7eba24
JFM		 3536 reg_w(sd, 0xa4, 0x04);
3537 reg_w(sd, 0x23, 0xff);
3538 sd->clockdiv = 1;
3539 break;
3540 case 10:
3541 reg_w(sd, 0xa4, 0x04);
3542 reg_w(sd, 0x23, 0x1f);
3543 sd->clockdiv = 1;
3544 break;
3545 case 5:
3546 reg_w(sd, 0xa4, 0x04);
3547 reg_w(sd, 0x23, 0x1b);
3548 sd->clockdiv = 1;
3549 break;
3550 }
594f5b8b
JFM		 3551 break;
3552 case SEN_OV8610:
6a7eba24
JFM		 3553 switch (sd->frame_rate) {
3554 default: /* 15 fps */
3555/* case 15: */
3556 reg_w(sd, 0xa4, 0x06);
3557 reg_w(sd, 0x23, 0xff);
3558 break;
3559 case 10:
3560 reg_w(sd, 0xa4, 0x06);
3561 reg_w(sd, 0x23, 0x1f);
3562 break;
3563 case 5:
3564 reg_w(sd, 0xa4, 0x06);
3565 reg_w(sd, 0x23, 0x1b);
3566 break;
3567 }
594f5b8b
JFM		 3568 break;
3569 case SEN_OV7670: /* guesses, based on 7640 */
6a7eba24
JFM		 3570 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3571 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
594f5b8b 3572 reg_w(sd, 0xa4, 0x10);
6a7eba24
JFM		 3573 switch (sd->frame_rate) {
3574 case 30:
6a7eba24
JFM		 3575 reg_w(sd, 0x23, 0xff);
3576 break;
3577 case 20:
6a7eba24
JFM		 3578 reg_w(sd, 0x23, 0x1b);
3579 break;
594f5b8b
JFM		 3580 default:
3581/* case 15: */
6a7eba24
JFM		 3582 reg_w(sd, 0x23, 0xff);
3583 sd->clockdiv = 1;
3584 break;
3585 }
594f5b8b 3586 break;
6a7eba24 3587 }
6a7eba24
JFM		 3588 return 0;
3589}
3590
594f5b8b 3591static int mode_init_ov_sensor_regs(struct sd *sd)
6a7eba24 3592{
594f5b8b 3593 struct gspca_dev *gspca_dev;
ebbb5c3e
HG		 3594 int qvga, xstart, xend, ystart, yend;
3595 __u8 v;
594f5b8b
JFM		 3596
3597 gspca_dev = &sd->gspca_dev;
124cc9c0 3598 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
6a7eba24
JFM		 3599
3600 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3601 switch (sd->sensor) {
635118d5
HG		 3602 case SEN_OV2610:
3603 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3604 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3605 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3606 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3607 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3608 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3609 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3610 return 0;
ebbb5c3e 3611 case SEN_OV3610:
635118d5
HG		 3612 if (qvga) {
3613 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
b46aaa02 3614 ystart = (776 - gspca_dev->height) / 2;
635118d5 3615 } else {
b46aaa02 3616 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
635118d5
HG		 3617 ystart = (1544 - gspca_dev->height) / 2;
3618 }
3619 xend = xstart + gspca_dev->width;
3620 yend = ystart + gspca_dev->height;
3621 /* Writing to the COMH register resets the other windowing regs
3622 to their default values, so we must do this first. */
3623 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3624 i2c_w_mask(sd, 0x32,
3625 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3626 0x3f);
3627 i2c_w_mask(sd, 0x03,
3628 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3629 0x0f);
3630 i2c_w(sd, 0x17, xstart >> 4);
3631 i2c_w(sd, 0x18, xend >> 4);
3632 i2c_w(sd, 0x19, ystart >> 3);
3633 i2c_w(sd, 0x1a, yend >> 3);
3634 return 0;
6a7eba24
JFM		 3635 case SEN_OV8610:
3636 /* For OV8610 qvga means qsvga */
3637 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
ebbb5c3e
HG		 3638 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3639 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3640 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3641 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
6a7eba24
JFM		 3642 break;
3643 case SEN_OV7610:
3644 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
ebbb5c3e
HG		 3645 i2c_w(sd, 0x35, qvga?0x1e:0x9e);
3646 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3647 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
6a7eba24
JFM		 3648 break;
3649 case SEN_OV7620:
b282d873 3650 case SEN_OV76BE:
6a7eba24
JFM		 3651 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3652 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3653 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3654 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3655 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
b282d873 3656 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
6a7eba24 3657 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
ebbb5c3e
HG		 3658 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3659 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3660 if (sd->sensor == SEN_OV76BE)
3661 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
6a7eba24 3662 break;
6a7eba24 3663 case SEN_OV7640:
6a7eba24
JFM		 3664 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3665 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3666/* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
3667/* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
3668/* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
3669/* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
3670/* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
ebbb5c3e 3671 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
6a7eba24
JFM		 3672 break;
3673 case SEN_OV7670:
3674 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3675 * do we need to set anything else?
3676 * HSTART etc are set in set_ov_sensor_window itself */
3677 i2c_w_mask(sd, OV7670_REG_COM7,
3678 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3679 OV7670_COM7_FMT_MASK);
ebbb5c3e
HG		 3680 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3681 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3682 OV7670_COM8_AWB);
3683 if (qvga) { /* QVGA from ov7670.c by
3684 * Jonathan Corbet */
3685 xstart = 164;
3686 xend = 28;
3687 ystart = 14;
3688 yend = 494;
3689 } else { /* VGA */
3690 xstart = 158;
3691 xend = 14;
3692 ystart = 10;
3693 yend = 490;
3694 }
3695 /* OV7670 hardware window registers are split across
3696 * multiple locations */
3697 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3698 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3699 v = i2c_r(sd, OV7670_REG_HREF);
3700 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3701 msleep(10); /* need to sleep between read and write to
3702 * same reg! */
3703 i2c_w(sd, OV7670_REG_HREF, v);
3704
3705 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3706 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3707 v = i2c_r(sd, OV7670_REG_VREF);
3708 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3709 msleep(10); /* need to sleep between read and write to
3710 * same reg! */
3711 i2c_w(sd, OV7670_REG_VREF, v);
6a7eba24
JFM		 3712 break;
3713 case SEN_OV6620:
ebbb5c3e
HG		 3714 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3715 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3716 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3717 break;
6a7eba24 3718 case SEN_OV6630:
7d971373 3719 case SEN_OV66308AF:
6a7eba24 3720 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
ebbb5c3e 3721 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
6a7eba24
JFM		 3722 break;
3723 default:
3724 return -EINVAL;
3725 }
3726
6a7eba24 3727 /******** Clock programming ********/
ae49c404 3728 i2c_w(sd, 0x11, sd->clockdiv);
6a7eba24 3729
6a7eba24
JFM		 3730 return 0;
3731}
3732
594f5b8b 3733static void sethvflip(struct sd *sd)
0cd6759d 3734{
594f5b8b
JFM		 3735 if (sd->sensor != SEN_OV7670)
3736 return;
0cd6759d
JFM		 3737 if (sd->gspca_dev.streaming)
3738 ov51x_stop(sd);
3739 i2c_w_mask(sd, OV7670_REG_MVFP,
594f5b8b
JFM		 3740 OV7670_MVFP_MIRROR * sd->hflip
3741 | OV7670_MVFP_VFLIP * sd->vflip,
3742 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
0cd6759d
JFM		 3743 if (sd->gspca_dev.streaming)
3744 ov51x_restart(sd);
3745}
3746
594f5b8b 3747static int set_ov_sensor_window(struct sd *sd)
6a7eba24 3748{
594f5b8b 3749 struct gspca_dev *gspca_dev;
124cc9c0 3750 int qvga, crop;
6a7eba24 3751 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
ebbb5c3e 3752 int ret;
6a7eba24 3753
635118d5 3754 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
ebbb5c3e
HG		 3755 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3756 sd->sensor == SEN_OV7670)
635118d5
HG		 3757 return mode_init_ov_sensor_regs(sd);
3758
594f5b8b 3759 gspca_dev = &sd->gspca_dev;
124cc9c0
HG		 3760 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3761 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
594f5b8b 3762
6a7eba24
JFM		 3763 /* The different sensor ICs handle setting up of window differently.
3764 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3765 switch (sd->sensor) {
3766 case SEN_OV8610:
3767 hwsbase = 0x1e;
3768 hwebase = 0x1e;
3769 vwsbase = 0x02;
3770 vwebase = 0x02;
3771 break;
3772 case SEN_OV7610:
3773 case SEN_OV76BE:
3774 hwsbase = 0x38;
3775 hwebase = 0x3a;
3776 vwsbase = vwebase = 0x05;
3777 break;
3778 case SEN_OV6620:
3779 case SEN_OV6630:
7d971373 3780 case SEN_OV66308AF:
6a7eba24
JFM		 3781 hwsbase = 0x38;
3782 hwebase = 0x3a;
3783 vwsbase = 0x05;
3784 vwebase = 0x06;
7d971373 3785 if (sd->sensor == SEN_OV66308AF && qvga)
49809d6a 3786 /* HDG: this fixes U and V getting swapped */
7d971373 3787 hwsbase++;
124cc9c0
HG		 3788 if (crop) {
3789 hwsbase += 8;
3790 hwebase += 8;
3791 vwsbase += 11;
3792 vwebase += 11;
3793 }
6a7eba24
JFM		 3794 break;
3795 case SEN_OV7620:
3796 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3797 hwebase = 0x2f;
3798 vwsbase = vwebase = 0x05;
3799 break;
3800 case SEN_OV7640:
3801 hwsbase = 0x1a;
3802 hwebase = 0x1a;
3803 vwsbase = vwebase = 0x03;
3804 break;
6a7eba24
JFM		 3805 default:
3806 return -EINVAL;
3807 }
3808
3809 switch (sd->sensor) {
3810 case SEN_OV6620:
3811 case SEN_OV6630:
7d971373 3812 case SEN_OV66308AF:
594f5b8b 3813 if (qvga) { /* QCIF */
6a7eba24
JFM		 3814 hwscale = 0;
3815 vwscale = 0;
3816 } else { /* CIF */
3817 hwscale = 1;
3818 vwscale = 1; /* The datasheet says 0;
3819 * it's wrong */
3820 }
3821 break;
3822 case SEN_OV8610:
594f5b8b 3823 if (qvga) { /* QSVGA */
6a7eba24
JFM		 3824 hwscale = 1;
3825 vwscale = 1;
3826 } else { /* SVGA */
3827 hwscale = 2;
3828 vwscale = 2;
3829 }
3830 break;
3831 default: /* SEN_OV7xx0 */
594f5b8b 3832 if (qvga) { /* QVGA */
6a7eba24
JFM		 3833 hwscale = 1;
3834 vwscale = 0;
3835 } else { /* VGA */
3836 hwscale = 2;
3837 vwscale = 1;
3838 }
3839 }
3840
594f5b8b 3841 ret = mode_init_ov_sensor_regs(sd);
6a7eba24
JFM		 3842 if (ret < 0)
3843 return ret;
3844
ebbb5c3e 3845 i2c_w(sd, 0x17, hwsbase);
a511ba94 3846 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
ebbb5c3e 3847 i2c_w(sd, 0x19, vwsbase);
a511ba94 3848 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
6a7eba24 3849
6a7eba24
JFM		 3850 return 0;
3851}
3852
6a7eba24 3853/* -- start the camera -- */
72ab97ce 3854static int sd_start(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 3855{
3856 struct sd *sd = (struct sd *) gspca_dev;
49809d6a 3857 int ret = 0;
6a7eba24 3858
a511ba94
HG		 3859 /* Default for most bridges, allow bridge_mode_init_regs to override */
3860 sd->sensor_width = sd->gspca_dev.width;
3861 sd->sensor_height = sd->gspca_dev.height;
3862
49809d6a 3863 switch (sd->bridge) {
1876bb92
HG		 3864 case BRIDGE_OV511:
3865 case BRIDGE_OV511PLUS:
3866 ret = ov511_mode_init_regs(sd);
3867 break;
49809d6a
HG		 3868 case BRIDGE_OV518:
3869 case BRIDGE_OV518PLUS:
3870 ret = ov518_mode_init_regs(sd);
3871 break;
3872 case BRIDGE_OV519:
3873 ret = ov519_mode_init_regs(sd);
3874 break;
b46aaa02 3875 /* case BRIDGE_OVFX2: nothing to do */
a511ba94
HG		 3876 case BRIDGE_W9968CF:
3877 ret = w9968cf_mode_init_regs(sd);
3878 break;
49809d6a 3879 }
6a7eba24
JFM		 3880 if (ret < 0)
3881 goto out;
49809d6a 3882
594f5b8b 3883 ret = set_ov_sensor_window(sd);
6a7eba24
JFM		 3884 if (ret < 0)
3885 goto out;
3886
49809d6a
HG		 3887 setcontrast(gspca_dev);
3888 setbrightness(gspca_dev);
3889 setcolors(gspca_dev);
02ab18b0
HG		 3890 sethvflip(sd);
3891 setautobrightness(sd);
3892 setfreq(sd);
49809d6a 3893
594f5b8b 3894 ret = ov51x_restart(sd);
6a7eba24
JFM		 3895 if (ret < 0)
3896 goto out;
6a7eba24 3897 ov51x_led_control(sd, 1);
72ab97ce 3898 return 0;
6a7eba24
JFM		 3899out:
3900 PDEBUG(D_ERR, "camera start error:%d", ret);
72ab97ce 3901 return ret;
6a7eba24
JFM		 3902}
3903
3904static void sd_stopN(struct gspca_dev *gspca_dev)
3905{
ac40b1fa
JFM		 3906 struct sd *sd = (struct sd *) gspca_dev;
3907
3908 ov51x_stop(sd);
3909 ov51x_led_control(sd, 0);
6a7eba24
JFM		 3910}
3911
1876bb92
HG		 3912static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3913 struct gspca_frame *frame, /* target */
3914 __u8 *in, /* isoc packet */
3915 int len) /* iso packet length */
3916{
3917 struct sd *sd = (struct sd *) gspca_dev;
3918
3919 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
3920 * byte non-zero. The EOF packet has image width/height in the
3921 * 10th and 11th bytes. The 9th byte is given as follows:
3922 *
3923 * bit 7: EOF
3924 * 6: compression enabled
3925 * 5: 422/420/400 modes
3926 * 4: 422/420/400 modes
3927 * 3: 1
3928 * 2: snapshot button on
3929 * 1: snapshot frame
3930 * 0: even/odd field
3931 */
3932 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
3933 (in[8] & 0x08)) {
3934 if (in[8] & 0x80) {
3935 /* Frame end */
3936 if ((in[9] + 1) * 8 != gspca_dev->width ||
3937 (in[10] + 1) * 8 != gspca_dev->height) {
3938 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
3939 " requested: %dx%d\n",
3940 (in[9] + 1) * 8, (in[10] + 1) * 8,
3941 gspca_dev->width, gspca_dev->height);
3942 gspca_dev->last_packet_type = DISCARD_PACKET;
3943 return;
3944 }
3945 /* Add 11 byte footer to frame, might be usefull */
3946 gspca_frame_add(gspca_dev, LAST_PACKET, frame, in, 11);
3947 return;
3948 } else {
3949 /* Frame start */
3950 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, in, 0);
3951 sd->packet_nr = 0;
3952 }
3953 }
3954
3955 /* Ignore the packet number */
3956 len--;
3957
3958 /* intermediate packet */
3959 gspca_frame_add(gspca_dev, INTER_PACKET, frame, in, len);
3960}
3961
49809d6a
HG		 3962static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
3963 struct gspca_frame *frame, /* target */
3964 __u8 *data, /* isoc packet */
3965 int len) /* iso packet length */
3966{
92918a53 3967 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 3968
3969 /* A false positive here is likely, until OVT gives me
3970 * the definitive SOF/EOF format */
3971 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
1381dfd5 3972 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
49809d6a 3973 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
92918a53
HG		 3974 sd->packet_nr = 0;
3975 }
3976
3977 if (gspca_dev->last_packet_type == DISCARD_PACKET)
3978 return;
3979
3980 /* Does this device use packet numbers ? */
3981 if (len & 7) {
3982 len--;
3983 if (sd->packet_nr == data[len])
3984 sd->packet_nr++;
3985 /* The last few packets of the frame (which are all 0's
3986 except that they may contain part of the footer), are
3987 numbered 0 */
3988 else if (sd->packet_nr == 0 || data[len]) {
3989 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
3990 (int)data[len], (int)sd->packet_nr);
3991 gspca_dev->last_packet_type = DISCARD_PACKET;
3992 return;
3993 }
49809d6a
HG		 3994 }
3995
3996 /* intermediate packet */
3997 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
3998}
3999
4000static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
6a7eba24 4001 struct gspca_frame *frame, /* target */
a5ae2062 4002 __u8 *data, /* isoc packet */
6a7eba24
JFM		 4003 int len) /* iso packet length */
4004{
4005 /* Header of ov519 is 16 bytes:
4006 * Byte Value Description
4007 * 0 0xff magic
4008 * 1 0xff magic
4009 * 2 0xff magic
4010 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4011 * 9 0xXX 0x01 initial frame without data,
4012 * 0x00 standard frame with image
4013 * 14 Lo in EOF: length of image data / 8
4014 * 15 Hi
4015 */
4016
4017 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4018 switch (data[3]) {
4019 case 0x50: /* start of frame */
4020#define HDRSZ 16
4021 data += HDRSZ;
4022 len -= HDRSZ;
4023#undef HDRSZ
4024 if (data[0] == 0xff || data[1] == 0xd8)
4025 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
4026 data, len);
4027 else
4028 gspca_dev->last_packet_type = DISCARD_PACKET;
4029 return;
4030 case 0x51: /* end of frame */
4031 if (data[9] != 0)
4032 gspca_dev->last_packet_type = DISCARD_PACKET;
4033 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
4034 data, 0);
4035 return;
4036 }
4037 }
4038
4039 /* intermediate packet */
4040 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
4041 data, len);
4042}
4043
b46aaa02
HG		 4044static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4045 struct gspca_frame *frame, /* target */
4046 __u8 *data, /* isoc packet */
4047 int len) /* iso packet length */
4048{
4049 /* A short read signals EOF */
4050 if (len < OVFX2_BULK_SIZE) {
4051 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, len);
4052 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, NULL, 0);
4053 return;
4054 }
4055 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
4056}
4057
49809d6a
HG		 4058static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4059 struct gspca_frame *frame, /* target */
4060 __u8 *data, /* isoc packet */
4061 int len) /* iso packet length */
4062{
4063 struct sd *sd = (struct sd *) gspca_dev;
4064
4065 switch (sd->bridge) {
4066 case BRIDGE_OV511:
4067 case BRIDGE_OV511PLUS:
1876bb92 4068 ov511_pkt_scan(gspca_dev, frame, data, len);
49809d6a
HG		 4069 break;
4070 case BRIDGE_OV518:
4071 case BRIDGE_OV518PLUS:
4072 ov518_pkt_scan(gspca_dev, frame, data, len);
4073 break;
4074 case BRIDGE_OV519:
4075 ov519_pkt_scan(gspca_dev, frame, data, len);
4076 break;
b46aaa02
HG		 4077 case BRIDGE_OVFX2:
4078 ovfx2_pkt_scan(gspca_dev, frame, data, len);
4079 break;
a511ba94
HG		 4080 case BRIDGE_W9968CF:
4081 w9968cf_pkt_scan(gspca_dev, frame, data, len);
4082 break;
49809d6a
HG		 4083 }
4084}
4085
6a7eba24
JFM		 4086/* -- management routines -- */
4087
4088static void setbrightness(struct gspca_dev *gspca_dev)
4089{
4090 struct sd *sd = (struct sd *) gspca_dev;
4091 int val;
6a7eba24
JFM		 4092
4093 val = sd->brightness;
6a7eba24
JFM		 4094 switch (sd->sensor) {
4095 case SEN_OV8610:
4096 case SEN_OV7610:
4097 case SEN_OV76BE:
4098 case SEN_OV6620:
4099 case SEN_OV6630:
7d971373 4100 case SEN_OV66308AF:
6a7eba24
JFM		 4101 case SEN_OV7640:
4102 i2c_w(sd, OV7610_REG_BRT, val);
4103 break;
4104 case SEN_OV7620:
4105 /* 7620 doesn't like manual changes when in auto mode */
02ab18b0 4106 if (!sd->autobrightness)
6a7eba24
JFM		 4107 i2c_w(sd, OV7610_REG_BRT, val);
4108 break;
4109 case SEN_OV7670:
594f5b8b 4110/*win trace
6a7eba24
JFM		 4111 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4112 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4113 break;
4114 }
6a7eba24
JFM		 4115}
4116
4117static void setcontrast(struct gspca_dev *gspca_dev)
4118{
4119 struct sd *sd = (struct sd *) gspca_dev;
4120 int val;
6a7eba24
JFM		 4121
4122 val = sd->contrast;
6a7eba24
JFM		 4123 switch (sd->sensor) {
4124 case SEN_OV7610:
4125 case SEN_OV6620:
4126 i2c_w(sd, OV7610_REG_CNT, val);
4127 break;
4128 case SEN_OV6630:
7d971373 4129 case SEN_OV66308AF:
6a7eba24 4130 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
49809d6a 4131 break;
6a7eba24 4132 case SEN_OV8610: {
a5ae2062 4133 static const __u8 ctab[] = {
6a7eba24
JFM		 4134 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4135 };
4136
4137 /* Use Y gamma control instead. Bit 0 enables it. */
4138 i2c_w(sd, 0x64, ctab[val >> 5]);
4139 break;
4140 }
4141 case SEN_OV7620: {
a5ae2062 4142 static const __u8 ctab[] = {
6a7eba24
JFM		 4143 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4144 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4145 };
4146
4147 /* Use Y gamma control instead. Bit 0 enables it. */
4148 i2c_w(sd, 0x64, ctab[val >> 4]);
4149 break;
4150 }
4151 case SEN_OV7640:
4152 /* Use gain control instead. */
4153 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
4154 break;
4155 case SEN_OV7670:
4156 /* check that this isn't just the same as ov7610 */
4157 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4158 break;
4159 }
6a7eba24
JFM		 4160}
4161
4162static void setcolors(struct gspca_dev *gspca_dev)
4163{
4164 struct sd *sd = (struct sd *) gspca_dev;
4165 int val;
6a7eba24
JFM		 4166
4167 val = sd->colors;
6a7eba24
JFM		 4168 switch (sd->sensor) {
4169 case SEN_OV8610:
4170 case SEN_OV7610:
4171 case SEN_OV76BE:
4172 case SEN_OV6620:
4173 case SEN_OV6630:
7d971373 4174 case SEN_OV66308AF:
6a7eba24
JFM		 4175 i2c_w(sd, OV7610_REG_SAT, val);
4176 break;
4177 case SEN_OV7620:
4178 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4179/* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4180 if (rc < 0)
4181 goto out; */
4182 i2c_w(sd, OV7610_REG_SAT, val);
4183 break;
4184 case SEN_OV7640:
4185 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4186 break;
4187 case SEN_OV7670:
4188 /* supported later once I work out how to do it
4189 * transparently fail now! */
4190 /* set REG_COM13 values for UV sat auto mode */
4191 break;
4192 }
6a7eba24
JFM		 4193}
4194
02ab18b0
HG		 4195static void setautobrightness(struct sd *sd)
4196{
635118d5
HG		 4197 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670 ||
4198 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
02ab18b0
HG		 4199 return;
4200
4201 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
4202}
4203
4204static void setfreq(struct sd *sd)
4205{
635118d5
HG		 4206 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4207 return;
4208
02ab18b0
HG		 4209 if (sd->sensor == SEN_OV7670) {
4210 switch (sd->freq) {
4211 case 0: /* Banding filter disabled */
4212 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4213 break;
4214 case 1: /* 50 hz */
4215 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4216 OV7670_COM8_BFILT);
4217 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4218 break;
4219 case 2: /* 60 hz */
4220 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4221 OV7670_COM8_BFILT);
4222 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4223 break;
4224 case 3: /* Auto hz */
4225 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4226 OV7670_COM8_BFILT);
4227 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4228 0x18);
4229 break;
4230 }
4231 } else {
4232 switch (sd->freq) {
4233 case 0: /* Banding filter disabled */
4234 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4235 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4236 break;
4237 case 1: /* 50 hz (filter on and framerate adj) */
4238 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4239 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4240 /* 20 fps -> 16.667 fps */
4241 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 4242 sd->sensor == SEN_OV6630 ||
4243 sd->sensor == SEN_OV66308AF)
02ab18b0
HG		 4244 i2c_w(sd, 0x2b, 0x5e);
4245 else
4246 i2c_w(sd, 0x2b, 0xac);
4247 break;
4248 case 2: /* 60 hz (filter on, ...) */
4249 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4250 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 4251 sd->sensor == SEN_OV6630 ||
4252 sd->sensor == SEN_OV66308AF) {
02ab18b0
HG		 4253 /* 20 fps -> 15 fps */
4254 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4255 i2c_w(sd, 0x2b, 0xa8);
4256 } else {
4257 /* no framerate adj. */
4258 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4259 }
4260 break;
4261 }
4262 }
4263}
4264
6a7eba24
JFM		 4265static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
4266{
4267 struct sd *sd = (struct sd *) gspca_dev;
4268
4269 sd->brightness = val;
ac40b1fa
JFM		 4270 if (gspca_dev->streaming)
4271 setbrightness(gspca_dev);
6a7eba24
JFM		 4272 return 0;
4273}
4274
4275static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
4276{
4277 struct sd *sd = (struct sd *) gspca_dev;
4278
4279 *val = sd->brightness;
4280 return 0;
4281}
4282
4283static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
4284{
4285 struct sd *sd = (struct sd *) gspca_dev;
4286
4287 sd->contrast = val;
ac40b1fa
JFM		 4288 if (gspca_dev->streaming)
4289 setcontrast(gspca_dev);
6a7eba24
JFM		 4290 return 0;
4291}
4292
4293static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
4294{
4295 struct sd *sd = (struct sd *) gspca_dev;
4296
4297 *val = sd->contrast;
4298 return 0;
4299}
4300
4301static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
4302{
4303 struct sd *sd = (struct sd *) gspca_dev;
4304
4305 sd->colors = val;
ac40b1fa
JFM		 4306 if (gspca_dev->streaming)
4307 setcolors(gspca_dev);
6a7eba24
JFM		 4308 return 0;
4309}
4310
4311static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
4312{
4313 struct sd *sd = (struct sd *) gspca_dev;
4314
4315 *val = sd->colors;
4316 return 0;
4317}
4318
0cd6759d
JFM		 4319static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
4320{
4321 struct sd *sd = (struct sd *) gspca_dev;
4322
4323 sd->hflip = val;
ac40b1fa
JFM		 4324 if (gspca_dev->streaming)
4325 sethvflip(sd);
0cd6759d
JFM		 4326 return 0;
4327}
4328
4329static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
4330{
4331 struct sd *sd = (struct sd *) gspca_dev;
4332
4333 *val = sd->hflip;
4334 return 0;
4335}
4336
4337static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
4338{
4339 struct sd *sd = (struct sd *) gspca_dev;
4340
4341 sd->vflip = val;
ac40b1fa
JFM		 4342 if (gspca_dev->streaming)
4343 sethvflip(sd);
0cd6759d
JFM		 4344 return 0;
4345}
4346
4347static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
4348{
4349 struct sd *sd = (struct sd *) gspca_dev;
4350
4351 *val = sd->vflip;
4352 return 0;
4353}
4354
02ab18b0
HG		 4355static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
4356{
4357 struct sd *sd = (struct sd *) gspca_dev;
4358
4359 sd->autobrightness = val;
4360 if (gspca_dev->streaming)
4361 setautobrightness(sd);
4362 return 0;
4363}
4364
4365static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
4366{
4367 struct sd *sd = (struct sd *) gspca_dev;
4368
4369 *val = sd->autobrightness;
4370 return 0;
4371}
4372
4373static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
4374{
4375 struct sd *sd = (struct sd *) gspca_dev;
4376
4377 sd->freq = val;
a511ba94 4378 if (gspca_dev->streaming) {
02ab18b0 4379 setfreq(sd);
a511ba94
HG		 4380 /* Ugly but necessary */
4381 if (sd->bridge == BRIDGE_W9968CF)
4382 w9968cf_set_crop_window(sd);
4383 }
02ab18b0
HG		 4384 return 0;
4385}
4386
4387static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
4388{
4389 struct sd *sd = (struct sd *) gspca_dev;
4390
4391 *val = sd->freq;
4392 return 0;
4393}
4394
4395static int sd_querymenu(struct gspca_dev *gspca_dev,
4396 struct v4l2_querymenu *menu)
4397{
4398 struct sd *sd = (struct sd *) gspca_dev;
4399
4400 switch (menu->id) {
4401 case V4L2_CID_POWER_LINE_FREQUENCY:
4402 switch (menu->index) {
4403 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4404 strcpy((char *) menu->name, "NoFliker");
4405 return 0;
4406 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4407 strcpy((char *) menu->name, "50 Hz");
4408 return 0;
4409 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4410 strcpy((char *) menu->name, "60 Hz");
4411 return 0;
4412 case 3:
4413 if (sd->sensor != SEN_OV7670)
4414 return -EINVAL;
4415
4416 strcpy((char *) menu->name, "Automatic");
4417 return 0;
4418 }
4419 break;
4420 }
4421 return -EINVAL;
4422}
4423
6a7eba24 4424/* sub-driver description */
a5ae2062 4425static const struct sd_desc sd_desc = {
6a7eba24
JFM		 4426 .name = MODULE_NAME,
4427 .ctrls = sd_ctrls,
4428 .nctrls = ARRAY_SIZE(sd_ctrls),
4429 .config = sd_config,
012d6b02 4430 .init = sd_init,
6a7eba24
JFM		 4431 .start = sd_start,
4432 .stopN = sd_stopN,
6a7eba24 4433 .pkt_scan = sd_pkt_scan,
02ab18b0 4434 .querymenu = sd_querymenu,
6a7eba24
JFM		 4435};
4436
4437/* -- module initialisation -- */
a5ae2062 4438static const __devinitdata struct usb_device_id device_table[] = {
a511ba94 4439 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
49809d6a
HG		 4440 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4441 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4442 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4443 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
9e4d8258
HG		 4444 {USB_DEVICE(0x041e, 0x4064),
4445 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
518c8df7 4446 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
9e4d8258
HG		 4447 {USB_DEVICE(0x041e, 0x4068),
4448 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
49809d6a
HG		 4449 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4450 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4451 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
1876bb92 4452 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
49809d6a
HG		 4453 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4454 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4455 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
b46aaa02 4456 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
49809d6a
HG		 4457 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4458 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
1876bb92 4459 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
49809d6a 4460 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
1876bb92 4461 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
b46aaa02
HG		 4462 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4463 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
a511ba94 4464 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
b46aaa02 4465 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
6a7eba24
JFM		 4466 {}
4467};
ac40b1fa 4468
6a7eba24
JFM		 4469MODULE_DEVICE_TABLE(usb, device_table);
4470
4471/* -- device connect -- */
4472static int sd_probe(struct usb_interface *intf,
4473 const struct usb_device_id *id)
4474{
4475 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4476 THIS_MODULE);
4477}
4478
4479static struct usb_driver sd_driver = {
4480 .name = MODULE_NAME,
4481 .id_table = device_table,
4482 .probe = sd_probe,
4483 .disconnect = gspca_disconnect,
6a709749
JFM		 4484#ifdef CONFIG_PM
4485 .suspend = gspca_suspend,
4486 .resume = gspca_resume,
4487#endif
6a7eba24
JFM		 4488};
4489
4490/* -- module insert / remove -- */
4491static int __init sd_mod_init(void)
4492{
f69e9529
AK		 4493 int ret;
4494 ret = usb_register(&sd_driver);
4495 if (ret < 0)
e6b14849 4496 return ret;
10b0e96e 4497 PDEBUG(D_PROBE, "registered");
6a7eba24
JFM		 4498 return 0;
4499}
4500static void __exit sd_mod_exit(void)
4501{
4502 usb_deregister(&sd_driver);
4503 PDEBUG(D_PROBE, "deregistered");
4504}
4505
4506module_init(sd_mod_init);
4507module_exit(sd_mod_exit);
4508
4509module_param(frame_rate, int, 0644);
4510MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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