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6a7eba24 JFM |
1 | /** |
2 | * OV519 driver | |
3 | * | |
4 | * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr) | |
5 | * | |
6 | * (This module is adapted from the ov51x-jpeg package) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | * | |
22 | */ | |
23 | #define MODULE_NAME "ov519" | |
24 | ||
25 | #include "gspca.h" | |
26 | ||
6a7eba24 JFM |
27 | MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>"); |
28 | MODULE_DESCRIPTION("OV519 USB Camera Driver"); | |
29 | MODULE_LICENSE("GPL"); | |
30 | ||
31 | /* global parameters */ | |
32 | static int frame_rate; | |
33 | ||
34 | /* Number of times to retry a failed I2C transaction. Increase this if you | |
35 | * are getting "Failed to read sensor ID..." */ | |
36 | static int i2c_detect_tries = 10; | |
37 | ||
38 | /* ov519 device descriptor */ | |
39 | struct sd { | |
40 | struct gspca_dev gspca_dev; /* !! must be the first item */ | |
41 | ||
42 | /* Determined by sensor type */ | |
ac40b1fa | 43 | __u8 sif; |
6a7eba24 | 44 | |
ac40b1fa JFM |
45 | __u8 brightness; |
46 | __u8 contrast; | |
47 | __u8 colors; | |
0cd6759d JFM |
48 | __u8 hflip; |
49 | __u8 vflip; | |
6a7eba24 | 50 | |
ac40b1fa | 51 | __u8 stopped; /* Streaming is temporarily paused */ |
6a7eba24 | 52 | |
ac40b1fa JFM |
53 | __u8 frame_rate; /* current Framerate (OV519 only) */ |
54 | __u8 clockdiv; /* clockdiv override for OV519 only */ | |
6a7eba24 JFM |
55 | |
56 | char sensor; /* Type of image sensor chip (SEN_*) */ | |
57 | #define SEN_UNKNOWN 0 | |
58 | #define SEN_OV6620 1 | |
59 | #define SEN_OV6630 2 | |
60 | #define SEN_OV7610 3 | |
61 | #define SEN_OV7620 4 | |
4202f71c JFM |
62 | #define SEN_OV7640 5 |
63 | #define SEN_OV7670 6 | |
64 | #define SEN_OV76BE 7 | |
65 | #define SEN_OV8610 8 | |
6a7eba24 JFM |
66 | }; |
67 | ||
68 | /* V4L2 controls supported by the driver */ | |
69 | static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val); | |
70 | static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val); | |
71 | static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val); | |
72 | static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val); | |
73 | static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val); | |
74 | static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val); | |
0cd6759d JFM |
75 | static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val); |
76 | static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val); | |
77 | static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val); | |
78 | static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val); | |
6a7eba24 JFM |
79 | |
80 | static struct ctrl sd_ctrls[] = { | |
6a7eba24 JFM |
81 | { |
82 | { | |
83 | .id = V4L2_CID_BRIGHTNESS, | |
84 | .type = V4L2_CTRL_TYPE_INTEGER, | |
85 | .name = "Brightness", | |
86 | .minimum = 0, | |
87 | .maximum = 255, | |
88 | .step = 1, | |
594f5b8b JFM |
89 | #define BRIGHTNESS_DEF 127 |
90 | .default_value = BRIGHTNESS_DEF, | |
6a7eba24 JFM |
91 | }, |
92 | .set = sd_setbrightness, | |
93 | .get = sd_getbrightness, | |
94 | }, | |
6a7eba24 JFM |
95 | { |
96 | { | |
97 | .id = V4L2_CID_CONTRAST, | |
98 | .type = V4L2_CTRL_TYPE_INTEGER, | |
99 | .name = "Contrast", | |
100 | .minimum = 0, | |
101 | .maximum = 255, | |
102 | .step = 1, | |
594f5b8b JFM |
103 | #define CONTRAST_DEF 127 |
104 | .default_value = CONTRAST_DEF, | |
6a7eba24 JFM |
105 | }, |
106 | .set = sd_setcontrast, | |
107 | .get = sd_getcontrast, | |
108 | }, | |
6a7eba24 JFM |
109 | { |
110 | { | |
111 | .id = V4L2_CID_SATURATION, | |
112 | .type = V4L2_CTRL_TYPE_INTEGER, | |
594f5b8b | 113 | .name = "Color", |
6a7eba24 JFM |
114 | .minimum = 0, |
115 | .maximum = 255, | |
116 | .step = 1, | |
594f5b8b JFM |
117 | #define COLOR_DEF 127 |
118 | .default_value = COLOR_DEF, | |
6a7eba24 JFM |
119 | }, |
120 | .set = sd_setcolors, | |
121 | .get = sd_getcolors, | |
122 | }, | |
0cd6759d | 123 | /* next controls work with ov7670 only */ |
de00448f | 124 | #define HFLIP_IDX 3 |
0cd6759d JFM |
125 | { |
126 | { | |
127 | .id = V4L2_CID_HFLIP, | |
128 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
129 | .name = "Mirror", | |
130 | .minimum = 0, | |
131 | .maximum = 1, | |
132 | .step = 1, | |
133 | #define HFLIP_DEF 0 | |
134 | .default_value = HFLIP_DEF, | |
135 | }, | |
136 | .set = sd_sethflip, | |
137 | .get = sd_gethflip, | |
138 | }, | |
de00448f | 139 | #define VFLIP_IDX 4 |
0cd6759d JFM |
140 | { |
141 | { | |
142 | .id = V4L2_CID_VFLIP, | |
143 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
144 | .name = "Vflip", | |
145 | .minimum = 0, | |
146 | .maximum = 1, | |
147 | .step = 1, | |
148 | #define VFLIP_DEF 0 | |
149 | .default_value = VFLIP_DEF, | |
150 | }, | |
151 | .set = sd_setvflip, | |
152 | .get = sd_getvflip, | |
153 | }, | |
6a7eba24 JFM |
154 | }; |
155 | ||
c2446b3e JFM |
156 | static struct v4l2_pix_format vga_mode[] = { |
157 | {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
158 | .bytesperline = 320, | |
594f5b8b | 159 | .sizeimage = 320 * 240 * 3 / 8 + 590, |
c2446b3e JFM |
160 | .colorspace = V4L2_COLORSPACE_JPEG, |
161 | .priv = 1}, | |
162 | {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
163 | .bytesperline = 640, | |
164 | .sizeimage = 640 * 480 * 3 / 8 + 590, | |
165 | .colorspace = V4L2_COLORSPACE_JPEG, | |
166 | .priv = 0}, | |
6a7eba24 | 167 | }; |
c2446b3e JFM |
168 | static struct v4l2_pix_format sif_mode[] = { |
169 | {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
170 | .bytesperline = 176, | |
594f5b8b | 171 | .sizeimage = 176 * 144 * 3 / 8 + 590, |
c2446b3e JFM |
172 | .colorspace = V4L2_COLORSPACE_JPEG, |
173 | .priv = 1}, | |
174 | {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, | |
175 | .bytesperline = 352, | |
594f5b8b | 176 | .sizeimage = 352 * 288 * 3 / 8 + 590, |
c2446b3e JFM |
177 | .colorspace = V4L2_COLORSPACE_JPEG, |
178 | .priv = 0}, | |
6a7eba24 JFM |
179 | }; |
180 | ||
181 | /* OV519 Camera interface register numbers */ | |
ac40b1fa JFM |
182 | #define OV519_R10_H_SIZE 0x10 |
183 | #define OV519_R11_V_SIZE 0x11 | |
184 | #define OV519_R12_X_OFFSETL 0x12 | |
185 | #define OV519_R13_X_OFFSETH 0x13 | |
186 | #define OV519_R14_Y_OFFSETL 0x14 | |
187 | #define OV519_R15_Y_OFFSETH 0x15 | |
188 | #define OV519_R16_DIVIDER 0x16 | |
189 | #define OV519_R20_DFR 0x20 | |
190 | #define OV519_R25_FORMAT 0x25 | |
6a7eba24 JFM |
191 | |
192 | /* OV519 System Controller register numbers */ | |
193 | #define OV519_SYS_RESET1 0x51 | |
194 | #define OV519_SYS_EN_CLK1 0x54 | |
195 | ||
196 | #define OV519_GPIO_DATA_OUT0 0x71 | |
197 | #define OV519_GPIO_IO_CTRL0 0x72 | |
198 | ||
199 | #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */ | |
200 | ||
201 | /* I2C registers */ | |
202 | #define R51x_I2C_W_SID 0x41 | |
203 | #define R51x_I2C_SADDR_3 0x42 | |
204 | #define R51x_I2C_SADDR_2 0x43 | |
205 | #define R51x_I2C_R_SID 0x44 | |
206 | #define R51x_I2C_DATA 0x45 | |
207 | #define R518_I2C_CTL 0x47 /* OV518(+) only */ | |
208 | ||
209 | /* I2C ADDRESSES */ | |
210 | #define OV7xx0_SID 0x42 | |
211 | #define OV8xx0_SID 0xa0 | |
212 | #define OV6xx0_SID 0xc0 | |
213 | ||
214 | /* OV7610 registers */ | |
215 | #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */ | |
216 | #define OV7610_REG_SAT 0x03 /* saturation */ | |
217 | #define OV8610_REG_HUE 0x04 /* 04 reserved */ | |
218 | #define OV7610_REG_CNT 0x05 /* Y contrast */ | |
219 | #define OV7610_REG_BRT 0x06 /* Y brightness */ | |
220 | #define OV7610_REG_COM_C 0x14 /* misc common regs */ | |
221 | #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */ | |
222 | #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */ | |
223 | #define OV7610_REG_COM_I 0x29 /* misc settings */ | |
224 | ||
225 | /* OV7670 registers */ | |
226 | #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */ | |
227 | #define OV7670_REG_BLUE 0x01 /* blue gain */ | |
228 | #define OV7670_REG_RED 0x02 /* red gain */ | |
229 | #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */ | |
230 | #define OV7670_REG_COM1 0x04 /* Control 1 */ | |
231 | #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */ | |
232 | #define OV7670_REG_COM3 0x0c /* Control 3 */ | |
233 | #define OV7670_REG_COM4 0x0d /* Control 4 */ | |
234 | #define OV7670_REG_COM5 0x0e /* All "reserved" */ | |
235 | #define OV7670_REG_COM6 0x0f /* Control 6 */ | |
236 | #define OV7670_REG_AECH 0x10 /* More bits of AEC value */ | |
237 | #define OV7670_REG_CLKRC 0x11 /* Clock control */ | |
238 | #define OV7670_REG_COM7 0x12 /* Control 7 */ | |
239 | #define OV7670_COM7_FMT_VGA 0x00 | |
240 | #define OV7670_COM7_YUV 0x00 /* YUV */ | |
241 | #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */ | |
242 | #define OV7670_COM7_FMT_MASK 0x38 | |
243 | #define OV7670_COM7_RESET 0x80 /* Register reset */ | |
244 | #define OV7670_REG_COM8 0x13 /* Control 8 */ | |
245 | #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */ | |
246 | #define OV7670_COM8_AWB 0x02 /* White balance enable */ | |
247 | #define OV7670_COM8_AGC 0x04 /* Auto gain enable */ | |
248 | #define OV7670_COM8_BFILT 0x20 /* Band filter enable */ | |
249 | #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */ | |
250 | #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */ | |
251 | #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */ | |
252 | #define OV7670_REG_COM10 0x15 /* Control 10 */ | |
253 | #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */ | |
254 | #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */ | |
255 | #define OV7670_REG_VSTART 0x19 /* Vert start high bits */ | |
256 | #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */ | |
257 | #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */ | |
0cd6759d | 258 | #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */ |
6a7eba24 JFM |
259 | #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */ |
260 | #define OV7670_REG_AEW 0x24 /* AGC upper limit */ | |
261 | #define OV7670_REG_AEB 0x25 /* AGC lower limit */ | |
262 | #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */ | |
263 | #define OV7670_REG_HREF 0x32 /* HREF pieces */ | |
264 | #define OV7670_REG_TSLB 0x3a /* lots of stuff */ | |
265 | #define OV7670_REG_COM11 0x3b /* Control 11 */ | |
266 | #define OV7670_COM11_EXP 0x02 | |
267 | #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */ | |
268 | #define OV7670_REG_COM12 0x3c /* Control 12 */ | |
269 | #define OV7670_REG_COM13 0x3d /* Control 13 */ | |
270 | #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */ | |
271 | #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */ | |
272 | #define OV7670_REG_COM14 0x3e /* Control 14 */ | |
273 | #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */ | |
274 | #define OV7670_REG_COM15 0x40 /* Control 15 */ | |
275 | #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */ | |
276 | #define OV7670_REG_COM16 0x41 /* Control 16 */ | |
277 | #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */ | |
278 | #define OV7670_REG_BRIGHT 0x55 /* Brightness */ | |
279 | #define OV7670_REG_CONTRAS 0x56 /* Contrast control */ | |
280 | #define OV7670_REG_GFIX 0x69 /* Fix gain control */ | |
281 | #define OV7670_REG_RGB444 0x8c /* RGB 444 control */ | |
282 | #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */ | |
283 | #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */ | |
284 | #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */ | |
285 | #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */ | |
286 | #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */ | |
287 | #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */ | |
288 | #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */ | |
289 | #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */ | |
290 | #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */ | |
291 | ||
4202f71c JFM |
292 | struct ov_regvals { |
293 | __u8 reg; | |
294 | __u8 val; | |
295 | }; | |
296 | struct ov_i2c_regvals { | |
297 | __u8 reg; | |
298 | __u8 val; | |
299 | }; | |
300 | ||
301 | static const struct ov_i2c_regvals norm_6x20[] = { | |
302 | { 0x12, 0x80 }, /* reset */ | |
303 | { 0x11, 0x01 }, | |
304 | { 0x03, 0x60 }, | |
305 | { 0x05, 0x7f }, /* For when autoadjust is off */ | |
306 | { 0x07, 0xa8 }, | |
307 | /* The ratio of 0x0c and 0x0d controls the white point */ | |
308 | { 0x0c, 0x24 }, | |
309 | { 0x0d, 0x24 }, | |
310 | { 0x0f, 0x15 }, /* COMS */ | |
311 | { 0x10, 0x75 }, /* AEC Exposure time */ | |
312 | { 0x12, 0x24 }, /* Enable AGC */ | |
313 | { 0x14, 0x04 }, | |
314 | /* 0x16: 0x06 helps frame stability with moving objects */ | |
315 | { 0x16, 0x06 }, | |
316 | /* { 0x20, 0x30 }, * Aperture correction enable */ | |
317 | { 0x26, 0xb2 }, /* BLC enable */ | |
318 | /* 0x28: 0x05 Selects RGB format if RGB on */ | |
319 | { 0x28, 0x05 }, | |
320 | { 0x2a, 0x04 }, /* Disable framerate adjust */ | |
321 | /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */ | |
322 | { 0x2d, 0x99 }, | |
323 | { 0x33, 0xa0 }, /* Color Processing Parameter */ | |
324 | { 0x34, 0xd2 }, /* Max A/D range */ | |
325 | { 0x38, 0x8b }, | |
326 | { 0x39, 0x40 }, | |
327 | ||
328 | { 0x3c, 0x39 }, /* Enable AEC mode changing */ | |
329 | { 0x3c, 0x3c }, /* Change AEC mode */ | |
330 | { 0x3c, 0x24 }, /* Disable AEC mode changing */ | |
331 | ||
332 | { 0x3d, 0x80 }, | |
333 | /* These next two registers (0x4a, 0x4b) are undocumented. | |
334 | * They control the color balance */ | |
335 | { 0x4a, 0x80 }, | |
336 | { 0x4b, 0x80 }, | |
337 | { 0x4d, 0xd2 }, /* This reduces noise a bit */ | |
338 | { 0x4e, 0xc1 }, | |
339 | { 0x4f, 0x04 }, | |
340 | /* Do 50-53 have any effect? */ | |
341 | /* Toggle 0x12[2] off and on here? */ | |
342 | }; | |
343 | ||
344 | static const struct ov_i2c_regvals norm_6x30[] = { | |
345 | { 0x12, 0x80 }, /* Reset */ | |
346 | { 0x00, 0x1f }, /* Gain */ | |
347 | { 0x01, 0x99 }, /* Blue gain */ | |
348 | { 0x02, 0x7c }, /* Red gain */ | |
349 | { 0x03, 0xc0 }, /* Saturation */ | |
350 | { 0x05, 0x0a }, /* Contrast */ | |
351 | { 0x06, 0x95 }, /* Brightness */ | |
352 | { 0x07, 0x2d }, /* Sharpness */ | |
353 | { 0x0c, 0x20 }, | |
354 | { 0x0d, 0x20 }, | |
355 | { 0x0e, 0x20 }, | |
356 | { 0x0f, 0x05 }, | |
357 | { 0x10, 0x9a }, | |
358 | { 0x11, 0x00 }, /* Pixel clock = fastest */ | |
359 | { 0x12, 0x24 }, /* Enable AGC and AWB */ | |
360 | { 0x13, 0x21 }, | |
361 | { 0x14, 0x80 }, | |
362 | { 0x15, 0x01 }, | |
363 | { 0x16, 0x03 }, | |
364 | { 0x17, 0x38 }, | |
365 | { 0x18, 0xea }, | |
366 | { 0x19, 0x04 }, | |
367 | { 0x1a, 0x93 }, | |
368 | { 0x1b, 0x00 }, | |
369 | { 0x1e, 0xc4 }, | |
370 | { 0x1f, 0x04 }, | |
371 | { 0x20, 0x20 }, | |
372 | { 0x21, 0x10 }, | |
373 | { 0x22, 0x88 }, | |
374 | { 0x23, 0xc0 }, /* Crystal circuit power level */ | |
375 | { 0x25, 0x9a }, /* Increase AEC black ratio */ | |
376 | { 0x26, 0xb2 }, /* BLC enable */ | |
377 | { 0x27, 0xa2 }, | |
378 | { 0x28, 0x00 }, | |
379 | { 0x29, 0x00 }, | |
380 | { 0x2a, 0x84 }, /* 60 Hz power */ | |
381 | { 0x2b, 0xa8 }, /* 60 Hz power */ | |
382 | { 0x2c, 0xa0 }, | |
383 | { 0x2d, 0x95 }, /* Enable auto-brightness */ | |
384 | { 0x2e, 0x88 }, | |
385 | { 0x33, 0x26 }, | |
386 | { 0x34, 0x03 }, | |
387 | { 0x36, 0x8f }, | |
388 | { 0x37, 0x80 }, | |
389 | { 0x38, 0x83 }, | |
390 | { 0x39, 0x80 }, | |
391 | { 0x3a, 0x0f }, | |
392 | { 0x3b, 0x3c }, | |
393 | { 0x3c, 0x1a }, | |
394 | { 0x3d, 0x80 }, | |
395 | { 0x3e, 0x80 }, | |
396 | { 0x3f, 0x0e }, | |
397 | { 0x40, 0x00 }, /* White bal */ | |
398 | { 0x41, 0x00 }, /* White bal */ | |
399 | { 0x42, 0x80 }, | |
400 | { 0x43, 0x3f }, /* White bal */ | |
401 | { 0x44, 0x80 }, | |
402 | { 0x45, 0x20 }, | |
403 | { 0x46, 0x20 }, | |
404 | { 0x47, 0x80 }, | |
405 | { 0x48, 0x7f }, | |
406 | { 0x49, 0x00 }, | |
407 | { 0x4a, 0x00 }, | |
408 | { 0x4b, 0x80 }, | |
409 | { 0x4c, 0xd0 }, | |
410 | { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */ | |
411 | { 0x4e, 0x40 }, | |
412 | { 0x4f, 0x07 }, /* UV avg., col. killer: max */ | |
413 | { 0x50, 0xff }, | |
414 | { 0x54, 0x23 }, /* Max AGC gain: 18dB */ | |
415 | { 0x55, 0xff }, | |
416 | { 0x56, 0x12 }, | |
417 | { 0x57, 0x81 }, | |
418 | { 0x58, 0x75 }, | |
419 | { 0x59, 0x01 }, /* AGC dark current comp.: +1 */ | |
420 | { 0x5a, 0x2c }, | |
421 | { 0x5b, 0x0f }, /* AWB chrominance levels */ | |
422 | { 0x5c, 0x10 }, | |
423 | { 0x3d, 0x80 }, | |
424 | { 0x27, 0xa6 }, | |
425 | { 0x12, 0x20 }, /* Toggle AWB */ | |
426 | { 0x12, 0x24 }, | |
427 | }; | |
428 | ||
429 | /* Lawrence Glaister <lg@jfm.bc.ca> reports: | |
430 | * | |
431 | * Register 0x0f in the 7610 has the following effects: | |
432 | * | |
433 | * 0x85 (AEC method 1): Best overall, good contrast range | |
434 | * 0x45 (AEC method 2): Very overexposed | |
435 | * 0xa5 (spec sheet default): Ok, but the black level is | |
436 | * shifted resulting in loss of contrast | |
437 | * 0x05 (old driver setting): very overexposed, too much | |
438 | * contrast | |
439 | */ | |
440 | static const struct ov_i2c_regvals norm_7610[] = { | |
441 | { 0x10, 0xff }, | |
442 | { 0x16, 0x06 }, | |
443 | { 0x28, 0x24 }, | |
444 | { 0x2b, 0xac }, | |
445 | { 0x12, 0x00 }, | |
446 | { 0x38, 0x81 }, | |
447 | { 0x28, 0x24 }, /* 0c */ | |
448 | { 0x0f, 0x85 }, /* lg's setting */ | |
449 | { 0x15, 0x01 }, | |
450 | { 0x20, 0x1c }, | |
451 | { 0x23, 0x2a }, | |
452 | { 0x24, 0x10 }, | |
453 | { 0x25, 0x8a }, | |
454 | { 0x26, 0xa2 }, | |
455 | { 0x27, 0xc2 }, | |
456 | { 0x2a, 0x04 }, | |
457 | { 0x2c, 0xfe }, | |
458 | { 0x2d, 0x93 }, | |
459 | { 0x30, 0x71 }, | |
460 | { 0x31, 0x60 }, | |
461 | { 0x32, 0x26 }, | |
462 | { 0x33, 0x20 }, | |
463 | { 0x34, 0x48 }, | |
464 | { 0x12, 0x24 }, | |
465 | { 0x11, 0x01 }, | |
466 | { 0x0c, 0x24 }, | |
467 | { 0x0d, 0x24 }, | |
468 | }; | |
469 | ||
470 | static const struct ov_i2c_regvals norm_7620[] = { | |
471 | { 0x00, 0x00 }, /* gain */ | |
472 | { 0x01, 0x80 }, /* blue gain */ | |
473 | { 0x02, 0x80 }, /* red gain */ | |
474 | { 0x03, 0xc0 }, /* OV7670_REG_VREF */ | |
475 | { 0x06, 0x60 }, | |
476 | { 0x07, 0x00 }, | |
477 | { 0x0c, 0x24 }, | |
478 | { 0x0c, 0x24 }, | |
479 | { 0x0d, 0x24 }, | |
480 | { 0x11, 0x01 }, | |
481 | { 0x12, 0x24 }, | |
482 | { 0x13, 0x01 }, | |
483 | { 0x14, 0x84 }, | |
484 | { 0x15, 0x01 }, | |
485 | { 0x16, 0x03 }, | |
486 | { 0x17, 0x2f }, | |
487 | { 0x18, 0xcf }, | |
488 | { 0x19, 0x06 }, | |
489 | { 0x1a, 0xf5 }, | |
490 | { 0x1b, 0x00 }, | |
491 | { 0x20, 0x18 }, | |
492 | { 0x21, 0x80 }, | |
493 | { 0x22, 0x80 }, | |
494 | { 0x23, 0x00 }, | |
495 | { 0x26, 0xa2 }, | |
496 | { 0x27, 0xea }, | |
497 | { 0x28, 0x20 }, | |
498 | { 0x29, 0x00 }, | |
499 | { 0x2a, 0x10 }, | |
500 | { 0x2b, 0x00 }, | |
501 | { 0x2c, 0x88 }, | |
502 | { 0x2d, 0x91 }, | |
503 | { 0x2e, 0x80 }, | |
504 | { 0x2f, 0x44 }, | |
505 | { 0x60, 0x27 }, | |
506 | { 0x61, 0x02 }, | |
507 | { 0x62, 0x5f }, | |
508 | { 0x63, 0xd5 }, | |
509 | { 0x64, 0x57 }, | |
510 | { 0x65, 0x83 }, | |
511 | { 0x66, 0x55 }, | |
512 | { 0x67, 0x92 }, | |
513 | { 0x68, 0xcf }, | |
514 | { 0x69, 0x76 }, | |
515 | { 0x6a, 0x22 }, | |
516 | { 0x6b, 0x00 }, | |
517 | { 0x6c, 0x02 }, | |
518 | { 0x6d, 0x44 }, | |
519 | { 0x6e, 0x80 }, | |
520 | { 0x6f, 0x1d }, | |
521 | { 0x70, 0x8b }, | |
522 | { 0x71, 0x00 }, | |
523 | { 0x72, 0x14 }, | |
524 | { 0x73, 0x54 }, | |
525 | { 0x74, 0x00 }, | |
526 | { 0x75, 0x8e }, | |
527 | { 0x76, 0x00 }, | |
528 | { 0x77, 0xff }, | |
529 | { 0x78, 0x80 }, | |
530 | { 0x79, 0x80 }, | |
531 | { 0x7a, 0x80 }, | |
532 | { 0x7b, 0xe2 }, | |
533 | { 0x7c, 0x00 }, | |
534 | }; | |
535 | ||
536 | /* 7640 and 7648. The defaults should be OK for most registers. */ | |
537 | static const struct ov_i2c_regvals norm_7640[] = { | |
538 | { 0x12, 0x80 }, | |
539 | { 0x12, 0x14 }, | |
540 | }; | |
541 | ||
542 | /* 7670. Defaults taken from OmniVision provided data, | |
543 | * as provided by Jonathan Corbet of OLPC */ | |
544 | static const struct ov_i2c_regvals norm_7670[] = { | |
545 | { OV7670_REG_COM7, OV7670_COM7_RESET }, | |
546 | { OV7670_REG_TSLB, 0x04 }, /* OV */ | |
547 | { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */ | |
548 | { OV7670_REG_CLKRC, 0x01 }, | |
549 | /* | |
550 | * Set the hardware window. These values from OV don't entirely | |
551 | * make sense - hstop is less than hstart. But they work... | |
552 | */ | |
553 | { OV7670_REG_HSTART, 0x13 }, | |
554 | { OV7670_REG_HSTOP, 0x01 }, | |
555 | { OV7670_REG_HREF, 0xb6 }, | |
556 | { OV7670_REG_VSTART, 0x02 }, | |
557 | { OV7670_REG_VSTOP, 0x7a }, | |
558 | { OV7670_REG_VREF, 0x0a }, | |
559 | ||
ac40b1fa JFM |
560 | { OV7670_REG_COM3, 0x00 }, |
561 | { OV7670_REG_COM14, 0x00 }, | |
4202f71c JFM |
562 | /* Mystery scaling numbers */ |
563 | { 0x70, 0x3a }, | |
564 | { 0x71, 0x35 }, | |
565 | { 0x72, 0x11 }, | |
566 | { 0x73, 0xf0 }, | |
567 | { 0xa2, 0x02 }, | |
568 | /* { OV7670_REG_COM10, 0x0 }, */ | |
569 | ||
570 | /* Gamma curve values */ | |
571 | { 0x7a, 0x20 }, | |
572 | { 0x7b, 0x10 }, | |
573 | { 0x7c, 0x1e }, | |
574 | { 0x7d, 0x35 }, | |
575 | { 0x7e, 0x5a }, | |
576 | { 0x7f, 0x69 }, | |
577 | { 0x80, 0x76 }, | |
578 | { 0x81, 0x80 }, | |
579 | { 0x82, 0x88 }, | |
580 | { 0x83, 0x8f }, | |
581 | { 0x84, 0x96 }, | |
582 | { 0x85, 0xa3 }, | |
583 | { 0x86, 0xaf }, | |
584 | { 0x87, 0xc4 }, | |
585 | { 0x88, 0xd7 }, | |
586 | { 0x89, 0xe8 }, | |
587 | ||
588 | /* AGC and AEC parameters. Note we start by disabling those features, | |
589 | then turn them only after tweaking the values. */ | |
590 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
591 | | OV7670_COM8_AECSTEP | |
592 | | OV7670_COM8_BFILT }, | |
ac40b1fa JFM |
593 | { OV7670_REG_GAIN, 0x00 }, |
594 | { OV7670_REG_AECH, 0x00 }, | |
4202f71c JFM |
595 | { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */ |
596 | { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */ | |
597 | { OV7670_REG_BD50MAX, 0x05 }, | |
598 | { OV7670_REG_BD60MAX, 0x07 }, | |
599 | { OV7670_REG_AEW, 0x95 }, | |
600 | { OV7670_REG_AEB, 0x33 }, | |
601 | { OV7670_REG_VPT, 0xe3 }, | |
602 | { OV7670_REG_HAECC1, 0x78 }, | |
603 | { OV7670_REG_HAECC2, 0x68 }, | |
604 | { 0xa1, 0x03 }, /* magic */ | |
605 | { OV7670_REG_HAECC3, 0xd8 }, | |
606 | { OV7670_REG_HAECC4, 0xd8 }, | |
607 | { OV7670_REG_HAECC5, 0xf0 }, | |
608 | { OV7670_REG_HAECC6, 0x90 }, | |
609 | { OV7670_REG_HAECC7, 0x94 }, | |
610 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
611 | | OV7670_COM8_AECSTEP | |
612 | | OV7670_COM8_BFILT | |
613 | | OV7670_COM8_AGC | |
614 | | OV7670_COM8_AEC }, | |
615 | ||
616 | /* Almost all of these are magic "reserved" values. */ | |
617 | { OV7670_REG_COM5, 0x61 }, | |
618 | { OV7670_REG_COM6, 0x4b }, | |
619 | { 0x16, 0x02 }, | |
620 | { OV7670_REG_MVFP, 0x07 }, | |
621 | { 0x21, 0x02 }, | |
622 | { 0x22, 0x91 }, | |
623 | { 0x29, 0x07 }, | |
624 | { 0x33, 0x0b }, | |
625 | { 0x35, 0x0b }, | |
626 | { 0x37, 0x1d }, | |
627 | { 0x38, 0x71 }, | |
628 | { 0x39, 0x2a }, | |
629 | { OV7670_REG_COM12, 0x78 }, | |
630 | { 0x4d, 0x40 }, | |
631 | { 0x4e, 0x20 }, | |
ac40b1fa | 632 | { OV7670_REG_GFIX, 0x00 }, |
4202f71c JFM |
633 | { 0x6b, 0x4a }, |
634 | { 0x74, 0x10 }, | |
635 | { 0x8d, 0x4f }, | |
ac40b1fa JFM |
636 | { 0x8e, 0x00 }, |
637 | { 0x8f, 0x00 }, | |
638 | { 0x90, 0x00 }, | |
639 | { 0x91, 0x00 }, | |
640 | { 0x96, 0x00 }, | |
641 | { 0x9a, 0x00 }, | |
4202f71c JFM |
642 | { 0xb0, 0x84 }, |
643 | { 0xb1, 0x0c }, | |
644 | { 0xb2, 0x0e }, | |
645 | { 0xb3, 0x82 }, | |
646 | { 0xb8, 0x0a }, | |
647 | ||
648 | /* More reserved magic, some of which tweaks white balance */ | |
649 | { 0x43, 0x0a }, | |
650 | { 0x44, 0xf0 }, | |
651 | { 0x45, 0x34 }, | |
652 | { 0x46, 0x58 }, | |
653 | { 0x47, 0x28 }, | |
654 | { 0x48, 0x3a }, | |
655 | { 0x59, 0x88 }, | |
656 | { 0x5a, 0x88 }, | |
657 | { 0x5b, 0x44 }, | |
658 | { 0x5c, 0x67 }, | |
659 | { 0x5d, 0x49 }, | |
660 | { 0x5e, 0x0e }, | |
661 | { 0x6c, 0x0a }, | |
662 | { 0x6d, 0x55 }, | |
663 | { 0x6e, 0x11 }, | |
664 | { 0x6f, 0x9f }, | |
665 | /* "9e for advance AWB" */ | |
666 | { 0x6a, 0x40 }, | |
667 | { OV7670_REG_BLUE, 0x40 }, | |
668 | { OV7670_REG_RED, 0x60 }, | |
669 | { OV7670_REG_COM8, OV7670_COM8_FASTAEC | |
670 | | OV7670_COM8_AECSTEP | |
671 | | OV7670_COM8_BFILT | |
672 | | OV7670_COM8_AGC | |
673 | | OV7670_COM8_AEC | |
674 | | OV7670_COM8_AWB }, | |
675 | ||
676 | /* Matrix coefficients */ | |
677 | { 0x4f, 0x80 }, | |
678 | { 0x50, 0x80 }, | |
ac40b1fa | 679 | { 0x51, 0x00 }, |
4202f71c JFM |
680 | { 0x52, 0x22 }, |
681 | { 0x53, 0x5e }, | |
682 | { 0x54, 0x80 }, | |
683 | { 0x58, 0x9e }, | |
684 | ||
685 | { OV7670_REG_COM16, OV7670_COM16_AWBGAIN }, | |
ac40b1fa | 686 | { OV7670_REG_EDGE, 0x00 }, |
4202f71c JFM |
687 | { 0x75, 0x05 }, |
688 | { 0x76, 0xe1 }, | |
ac40b1fa | 689 | { 0x4c, 0x00 }, |
4202f71c JFM |
690 | { 0x77, 0x01 }, |
691 | { OV7670_REG_COM13, OV7670_COM13_GAMMA | |
692 | | OV7670_COM13_UVSAT | |
693 | | 2}, /* was 3 */ | |
694 | { 0x4b, 0x09 }, | |
695 | { 0xc9, 0x60 }, | |
696 | { OV7670_REG_COM16, 0x38 }, | |
697 | { 0x56, 0x40 }, | |
698 | ||
699 | { 0x34, 0x11 }, | |
700 | { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO }, | |
701 | { 0xa4, 0x88 }, | |
ac40b1fa | 702 | { 0x96, 0x00 }, |
4202f71c JFM |
703 | { 0x97, 0x30 }, |
704 | { 0x98, 0x20 }, | |
705 | { 0x99, 0x30 }, | |
706 | { 0x9a, 0x84 }, | |
707 | { 0x9b, 0x29 }, | |
708 | { 0x9c, 0x03 }, | |
709 | { 0x9d, 0x4c }, | |
710 | { 0x9e, 0x3f }, | |
711 | { 0x78, 0x04 }, | |
712 | ||
713 | /* Extra-weird stuff. Some sort of multiplexor register */ | |
714 | { 0x79, 0x01 }, | |
715 | { 0xc8, 0xf0 }, | |
716 | { 0x79, 0x0f }, | |
717 | { 0xc8, 0x00 }, | |
718 | { 0x79, 0x10 }, | |
719 | { 0xc8, 0x7e }, | |
720 | { 0x79, 0x0a }, | |
721 | { 0xc8, 0x80 }, | |
722 | { 0x79, 0x0b }, | |
723 | { 0xc8, 0x01 }, | |
724 | { 0x79, 0x0c }, | |
725 | { 0xc8, 0x0f }, | |
726 | { 0x79, 0x0d }, | |
727 | { 0xc8, 0x20 }, | |
728 | { 0x79, 0x09 }, | |
729 | { 0xc8, 0x80 }, | |
730 | { 0x79, 0x02 }, | |
731 | { 0xc8, 0xc0 }, | |
732 | { 0x79, 0x03 }, | |
733 | { 0xc8, 0x40 }, | |
734 | { 0x79, 0x05 }, | |
735 | { 0xc8, 0x30 }, | |
736 | { 0x79, 0x26 }, | |
737 | }; | |
738 | ||
739 | static const struct ov_i2c_regvals norm_8610[] = { | |
740 | { 0x12, 0x80 }, | |
741 | { 0x00, 0x00 }, | |
742 | { 0x01, 0x80 }, | |
743 | { 0x02, 0x80 }, | |
744 | { 0x03, 0xc0 }, | |
745 | { 0x04, 0x30 }, | |
746 | { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
747 | { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */ | |
748 | { 0x0a, 0x86 }, | |
749 | { 0x0b, 0xb0 }, | |
750 | { 0x0c, 0x20 }, | |
751 | { 0x0d, 0x20 }, | |
752 | { 0x11, 0x01 }, | |
753 | { 0x12, 0x25 }, | |
754 | { 0x13, 0x01 }, | |
755 | { 0x14, 0x04 }, | |
756 | { 0x15, 0x01 }, /* Lin and Win think different about UV order */ | |
757 | { 0x16, 0x03 }, | |
758 | { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */ | |
759 | { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */ | |
760 | { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */ | |
761 | { 0x1a, 0xf5 }, | |
762 | { 0x1b, 0x00 }, | |
763 | { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */ | |
764 | { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */ | |
765 | { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */ | |
766 | { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */ | |
767 | { 0x26, 0xa2 }, | |
768 | { 0x27, 0xea }, | |
769 | { 0x28, 0x00 }, | |
770 | { 0x29, 0x00 }, | |
771 | { 0x2a, 0x80 }, | |
772 | { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */ | |
773 | { 0x2c, 0xac }, | |
774 | { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */ | |
775 | { 0x2e, 0x80 }, | |
776 | { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */ | |
777 | { 0x4c, 0x00 }, | |
778 | { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */ | |
779 | { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */ | |
780 | { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */ | |
781 | { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */ | |
782 | { 0x63, 0xff }, | |
783 | { 0x64, 0x53 }, /* new windrv 090403 says 0x57, | |
784 | * maybe thats wrong */ | |
785 | { 0x65, 0x00 }, | |
786 | { 0x66, 0x55 }, | |
787 | { 0x67, 0xb0 }, | |
788 | { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */ | |
789 | { 0x69, 0x02 }, | |
790 | { 0x6a, 0x22 }, | |
791 | { 0x6b, 0x00 }, | |
792 | { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but | |
793 | * deleting bit7 colors the first images red */ | |
794 | { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
795 | { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */ | |
796 | { 0x6f, 0x01 }, | |
797 | { 0x70, 0x8b }, | |
798 | { 0x71, 0x00 }, | |
799 | { 0x72, 0x14 }, | |
800 | { 0x73, 0x54 }, | |
801 | { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */ | |
802 | { 0x75, 0x0e }, | |
803 | { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */ | |
804 | { 0x77, 0xff }, | |
805 | { 0x78, 0x80 }, | |
806 | { 0x79, 0x80 }, | |
807 | { 0x7a, 0x80 }, | |
808 | { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */ | |
809 | { 0x7c, 0x00 }, | |
810 | { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */ | |
811 | { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */ | |
812 | { 0x7f, 0xfb }, | |
813 | { 0x80, 0x28 }, | |
814 | { 0x81, 0x00 }, | |
815 | { 0x82, 0x23 }, | |
816 | { 0x83, 0x0b }, | |
817 | { 0x84, 0x00 }, | |
818 | { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */ | |
819 | { 0x86, 0xc9 }, | |
820 | { 0x87, 0x00 }, | |
821 | { 0x88, 0x00 }, | |
822 | { 0x89, 0x01 }, | |
823 | { 0x12, 0x20 }, | |
824 | { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */ | |
825 | }; | |
826 | ||
6a7eba24 JFM |
827 | static unsigned char ov7670_abs_to_sm(unsigned char v) |
828 | { | |
829 | if (v > 127) | |
830 | return v & 0x7f; | |
831 | return (128 - v) | 0x80; | |
832 | } | |
833 | ||
834 | /* Write a OV519 register */ | |
835 | static int reg_w(struct sd *sd, __u16 index, __u8 value) | |
836 | { | |
837 | int ret; | |
6a7eba24 | 838 | |
739570bb | 839 | sd->gspca_dev.usb_buf[0] = value; |
6a7eba24 JFM |
840 | ret = usb_control_msg(sd->gspca_dev.dev, |
841 | usb_sndctrlpipe(sd->gspca_dev.dev, 0), | |
842 | 1, /* REQ_IO (ov518/519) */ | |
843 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
844 | 0, index, | |
739570bb | 845 | sd->gspca_dev.usb_buf, 1, 500); |
6a7eba24 JFM |
846 | if (ret < 0) |
847 | PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value); | |
848 | return ret; | |
849 | } | |
850 | ||
851 | /* Read from a OV519 register */ | |
852 | /* returns: negative is error, pos or zero is data */ | |
853 | static int reg_r(struct sd *sd, __u16 index) | |
854 | { | |
855 | int ret; | |
6a7eba24 JFM |
856 | |
857 | ret = usb_control_msg(sd->gspca_dev.dev, | |
858 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
859 | 1, /* REQ_IO */ | |
860 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
739570bb | 861 | 0, index, sd->gspca_dev.usb_buf, 1, 500); |
6a7eba24 JFM |
862 | |
863 | if (ret >= 0) | |
739570bb | 864 | ret = sd->gspca_dev.usb_buf[0]; |
6a7eba24 JFM |
865 | else |
866 | PDEBUG(D_ERR, "Read reg [0x%02x] failed", index); | |
867 | return ret; | |
868 | } | |
869 | ||
870 | /* Read 8 values from a OV519 register */ | |
871 | static int reg_r8(struct sd *sd, | |
a5ae2062 | 872 | __u16 index) |
6a7eba24 JFM |
873 | { |
874 | int ret; | |
6a7eba24 JFM |
875 | |
876 | ret = usb_control_msg(sd->gspca_dev.dev, | |
877 | usb_rcvctrlpipe(sd->gspca_dev.dev, 0), | |
878 | 1, /* REQ_IO */ | |
879 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
739570bb | 880 | 0, index, sd->gspca_dev.usb_buf, 8, 500); |
6a7eba24 JFM |
881 | |
882 | if (ret >= 0) | |
739570bb | 883 | ret = sd->gspca_dev.usb_buf[0]; |
6a7eba24 JFM |
884 | else |
885 | PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index); | |
886 | return ret; | |
887 | } | |
888 | ||
889 | /* | |
890 | * Writes bits at positions specified by mask to an OV51x reg. Bits that are in | |
891 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
892 | * that are in the same position as 0's in "mask" are preserved, regardless | |
893 | * of their respective state in "value". | |
894 | */ | |
895 | static int reg_w_mask(struct sd *sd, | |
896 | __u16 index, | |
897 | __u8 value, | |
898 | __u8 mask) | |
899 | { | |
900 | int ret; | |
901 | __u8 oldval; | |
902 | ||
903 | if (mask != 0xff) { | |
904 | value &= mask; /* Enforce mask on value */ | |
905 | ret = reg_r(sd, index); | |
906 | if (ret < 0) | |
907 | return ret; | |
908 | ||
909 | oldval = ret & ~mask; /* Clear the masked bits */ | |
910 | value |= oldval; /* Set the desired bits */ | |
911 | } | |
912 | return reg_w(sd, index, value); | |
913 | } | |
914 | ||
915 | /* | |
916 | * The OV518 I2C I/O procedure is different, hence, this function. | |
917 | * This is normally only called from i2c_w(). Note that this function | |
918 | * always succeeds regardless of whether the sensor is present and working. | |
919 | */ | |
920 | static int i2c_w(struct sd *sd, | |
921 | __u8 reg, | |
922 | __u8 value) | |
923 | { | |
924 | int rc; | |
925 | ||
926 | PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg); | |
927 | ||
928 | /* Select camera register */ | |
929 | rc = reg_w(sd, R51x_I2C_SADDR_3, reg); | |
930 | if (rc < 0) | |
931 | return rc; | |
932 | ||
933 | /* Write "value" to I2C data port of OV511 */ | |
934 | rc = reg_w(sd, R51x_I2C_DATA, value); | |
935 | if (rc < 0) | |
936 | return rc; | |
937 | ||
938 | /* Initiate 3-byte write cycle */ | |
939 | rc = reg_w(sd, R518_I2C_CTL, 0x01); | |
ac40b1fa JFM |
940 | if (rc < 0) |
941 | return rc; | |
6a7eba24 JFM |
942 | |
943 | /* wait for write complete */ | |
944 | msleep(4); | |
6a7eba24 JFM |
945 | return reg_r8(sd, R518_I2C_CTL); |
946 | } | |
947 | ||
948 | /* | |
949 | * returns: negative is error, pos or zero is data | |
950 | * | |
951 | * The OV518 I2C I/O procedure is different, hence, this function. | |
952 | * This is normally only called from i2c_r(). Note that this function | |
953 | * always succeeds regardless of whether the sensor is present and working. | |
954 | */ | |
955 | static int i2c_r(struct sd *sd, __u8 reg) | |
956 | { | |
957 | int rc, value; | |
958 | ||
959 | /* Select camera register */ | |
960 | rc = reg_w(sd, R51x_I2C_SADDR_2, reg); | |
961 | if (rc < 0) | |
962 | return rc; | |
963 | ||
964 | /* Initiate 2-byte write cycle */ | |
965 | rc = reg_w(sd, R518_I2C_CTL, 0x03); | |
966 | if (rc < 0) | |
967 | return rc; | |
968 | ||
969 | /* Initiate 2-byte read cycle */ | |
970 | rc = reg_w(sd, R518_I2C_CTL, 0x05); | |
971 | if (rc < 0) | |
972 | return rc; | |
973 | value = reg_r(sd, R51x_I2C_DATA); | |
974 | PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value); | |
975 | return value; | |
976 | } | |
977 | ||
978 | /* Writes bits at positions specified by mask to an I2C reg. Bits that are in | |
979 | * the same position as 1's in "mask" are cleared and set to "value". Bits | |
980 | * that are in the same position as 0's in "mask" are preserved, regardless | |
981 | * of their respective state in "value". | |
982 | */ | |
983 | static int i2c_w_mask(struct sd *sd, | |
984 | __u8 reg, | |
985 | __u8 value, | |
986 | __u8 mask) | |
987 | { | |
988 | int rc; | |
989 | __u8 oldval; | |
990 | ||
991 | value &= mask; /* Enforce mask on value */ | |
992 | rc = i2c_r(sd, reg); | |
993 | if (rc < 0) | |
994 | return rc; | |
995 | oldval = rc & ~mask; /* Clear the masked bits */ | |
996 | value |= oldval; /* Set the desired bits */ | |
997 | return i2c_w(sd, reg, value); | |
998 | } | |
999 | ||
1000 | /* Temporarily stops OV511 from functioning. Must do this before changing | |
1001 | * registers while the camera is streaming */ | |
1002 | static inline int ov51x_stop(struct sd *sd) | |
1003 | { | |
1004 | PDEBUG(D_STREAM, "stopping"); | |
1005 | sd->stopped = 1; | |
1006 | return reg_w(sd, OV519_SYS_RESET1, 0x0f); | |
1007 | } | |
1008 | ||
1009 | /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not | |
1010 | * actually stopped (for performance). */ | |
1011 | static inline int ov51x_restart(struct sd *sd) | |
1012 | { | |
1013 | PDEBUG(D_STREAM, "restarting"); | |
1014 | if (!sd->stopped) | |
1015 | return 0; | |
1016 | sd->stopped = 0; | |
1017 | ||
1018 | /* Reinitialize the stream */ | |
1019 | return reg_w(sd, OV519_SYS_RESET1, 0x00); | |
1020 | } | |
1021 | ||
1022 | /* This does an initial reset of an OmniVision sensor and ensures that I2C | |
1023 | * is synchronized. Returns <0 on failure. | |
1024 | */ | |
1025 | static int init_ov_sensor(struct sd *sd) | |
1026 | { | |
ac40b1fa | 1027 | int i; |
6a7eba24 JFM |
1028 | |
1029 | /* Reset the sensor */ | |
1030 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
1031 | return -EIO; | |
1032 | ||
1033 | /* Wait for it to initialize */ | |
1034 | msleep(150); | |
1035 | ||
ac40b1fa | 1036 | for (i = 0; i < i2c_detect_tries; i++) { |
6a7eba24 JFM |
1037 | if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f && |
1038 | i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) { | |
ac40b1fa JFM |
1039 | PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i); |
1040 | return 0; | |
6a7eba24 JFM |
1041 | } |
1042 | ||
1043 | /* Reset the sensor */ | |
1044 | if (i2c_w(sd, 0x12, 0x80) < 0) | |
1045 | return -EIO; | |
1046 | /* Wait for it to initialize */ | |
1047 | msleep(150); | |
1048 | /* Dummy read to sync I2C */ | |
1049 | if (i2c_r(sd, 0x00) < 0) | |
1050 | return -EIO; | |
1051 | } | |
ac40b1fa | 1052 | return -EIO; |
6a7eba24 JFM |
1053 | } |
1054 | ||
6a7eba24 JFM |
1055 | /* Set the read and write slave IDs. The "slave" argument is the write slave, |
1056 | * and the read slave will be set to (slave + 1). | |
1057 | * This should not be called from outside the i2c I/O functions. | |
1058 | * Sets I2C read and write slave IDs. Returns <0 for error | |
1059 | */ | |
1060 | static int ov51x_set_slave_ids(struct sd *sd, | |
1061 | __u8 slave) | |
1062 | { | |
1063 | int rc; | |
1064 | ||
1065 | rc = reg_w(sd, R51x_I2C_W_SID, slave); | |
1066 | if (rc < 0) | |
1067 | return rc; | |
1068 | return reg_w(sd, R51x_I2C_R_SID, slave + 1); | |
1069 | } | |
1070 | ||
6a7eba24 | 1071 | static int write_regvals(struct sd *sd, |
a5ae2062 | 1072 | const struct ov_regvals *regvals, |
6a7eba24 JFM |
1073 | int n) |
1074 | { | |
1075 | int rc; | |
1076 | ||
1077 | while (--n >= 0) { | |
1078 | rc = reg_w(sd, regvals->reg, regvals->val); | |
1079 | if (rc < 0) | |
1080 | return rc; | |
1081 | regvals++; | |
1082 | } | |
1083 | return 0; | |
1084 | } | |
1085 | ||
1086 | static int write_i2c_regvals(struct sd *sd, | |
a5ae2062 | 1087 | const struct ov_i2c_regvals *regvals, |
6a7eba24 JFM |
1088 | int n) |
1089 | { | |
1090 | int rc; | |
1091 | ||
1092 | while (--n >= 0) { | |
1093 | rc = i2c_w(sd, regvals->reg, regvals->val); | |
1094 | if (rc < 0) | |
1095 | return rc; | |
1096 | regvals++; | |
1097 | } | |
1098 | return 0; | |
1099 | } | |
1100 | ||
1101 | /**************************************************************************** | |
1102 | * | |
1103 | * OV511 and sensor configuration | |
1104 | * | |
1105 | ***************************************************************************/ | |
1106 | ||
1107 | /* This initializes the OV8110, OV8610 sensor. The OV8110 uses | |
1108 | * the same register settings as the OV8610, since they are very similar. | |
1109 | */ | |
1110 | static int ov8xx0_configure(struct sd *sd) | |
1111 | { | |
1112 | int rc; | |
6a7eba24 JFM |
1113 | |
1114 | PDEBUG(D_PROBE, "starting ov8xx0 configuration"); | |
1115 | ||
6a7eba24 JFM |
1116 | /* Detect sensor (sub)type */ |
1117 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
1118 | if (rc < 0) { | |
1119 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
1120 | return -1; | |
1121 | } | |
1122 | if ((rc & 3) == 1) { | |
6a7eba24 JFM |
1123 | sd->sensor = SEN_OV8610; |
1124 | } else { | |
1125 | PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3); | |
1126 | return -1; | |
1127 | } | |
6a7eba24 JFM |
1128 | |
1129 | /* Set sensor-specific vars */ | |
594f5b8b | 1130 | /* sd->sif = 0; already done */ |
6a7eba24 JFM |
1131 | return 0; |
1132 | } | |
1133 | ||
1134 | /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses | |
1135 | * the same register settings as the OV7610, since they are very similar. | |
1136 | */ | |
1137 | static int ov7xx0_configure(struct sd *sd) | |
1138 | { | |
1139 | int rc, high, low; | |
1140 | ||
6a7eba24 JFM |
1141 | |
1142 | PDEBUG(D_PROBE, "starting OV7xx0 configuration"); | |
1143 | ||
6a7eba24 JFM |
1144 | /* Detect sensor (sub)type */ |
1145 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
1146 | ||
1147 | /* add OV7670 here | |
1148 | * it appears to be wrongly detected as a 7610 by default */ | |
1149 | if (rc < 0) { | |
1150 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
1151 | return -1; | |
1152 | } | |
1153 | if ((rc & 3) == 3) { | |
1154 | /* quick hack to make OV7670s work */ | |
1155 | high = i2c_r(sd, 0x0a); | |
1156 | low = i2c_r(sd, 0x0b); | |
1157 | /* info("%x, %x", high, low); */ | |
1158 | if (high == 0x76 && low == 0x73) { | |
1159 | PDEBUG(D_PROBE, "Sensor is an OV7670"); | |
1160 | sd->sensor = SEN_OV7670; | |
1161 | } else { | |
1162 | PDEBUG(D_PROBE, "Sensor is an OV7610"); | |
1163 | sd->sensor = SEN_OV7610; | |
1164 | } | |
1165 | } else if ((rc & 3) == 1) { | |
1166 | /* I don't know what's different about the 76BE yet. */ | |
1167 | if (i2c_r(sd, 0x15) & 1) | |
1168 | PDEBUG(D_PROBE, "Sensor is an OV7620AE"); | |
1169 | else | |
1170 | PDEBUG(D_PROBE, "Sensor is an OV76BE"); | |
1171 | ||
1172 | /* OV511+ will return all zero isoc data unless we | |
1173 | * configure the sensor as a 7620. Someone needs to | |
1174 | * find the exact reg. setting that causes this. */ | |
1175 | sd->sensor = SEN_OV76BE; | |
1176 | } else if ((rc & 3) == 0) { | |
1177 | /* try to read product id registers */ | |
1178 | high = i2c_r(sd, 0x0a); | |
1179 | if (high < 0) { | |
1180 | PDEBUG(D_ERR, "Error detecting camera chip PID"); | |
1181 | return high; | |
1182 | } | |
1183 | low = i2c_r(sd, 0x0b); | |
1184 | if (low < 0) { | |
1185 | PDEBUG(D_ERR, "Error detecting camera chip VER"); | |
1186 | return low; | |
1187 | } | |
1188 | if (high == 0x76) { | |
594f5b8b JFM |
1189 | switch (low) { |
1190 | case 0x30: | |
6a7eba24 | 1191 | PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635"); |
4202f71c JFM |
1192 | PDEBUG(D_ERR, |
1193 | "7630 is not supported by this driver"); | |
1194 | return -1; | |
594f5b8b | 1195 | case 0x40: |
6a7eba24 JFM |
1196 | PDEBUG(D_PROBE, "Sensor is an OV7645"); |
1197 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
1198 | break; |
1199 | case 0x45: | |
6a7eba24 JFM |
1200 | PDEBUG(D_PROBE, "Sensor is an OV7645B"); |
1201 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
1202 | break; |
1203 | case 0x48: | |
6a7eba24 JFM |
1204 | PDEBUG(D_PROBE, "Sensor is an OV7648"); |
1205 | sd->sensor = SEN_OV7640; /* FIXME */ | |
594f5b8b JFM |
1206 | break; |
1207 | default: | |
1208 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); | |
6a7eba24 JFM |
1209 | return -1; |
1210 | } | |
1211 | } else { | |
1212 | PDEBUG(D_PROBE, "Sensor is an OV7620"); | |
1213 | sd->sensor = SEN_OV7620; | |
1214 | } | |
1215 | } else { | |
1216 | PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3); | |
1217 | return -1; | |
1218 | } | |
1219 | ||
6a7eba24 | 1220 | /* Set sensor-specific vars */ |
594f5b8b | 1221 | /* sd->sif = 0; already done */ |
6a7eba24 JFM |
1222 | return 0; |
1223 | } | |
1224 | ||
1225 | /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */ | |
1226 | static int ov6xx0_configure(struct sd *sd) | |
1227 | { | |
1228 | int rc; | |
4202f71c | 1229 | PDEBUG(D_PROBE, "starting OV6xx0 configuration"); |
6a7eba24 JFM |
1230 | |
1231 | /* Detect sensor (sub)type */ | |
1232 | rc = i2c_r(sd, OV7610_REG_COM_I); | |
1233 | if (rc < 0) { | |
1234 | PDEBUG(D_ERR, "Error detecting sensor type"); | |
1235 | return -1; | |
1236 | } | |
1237 | ||
1238 | /* Ugh. The first two bits are the version bits, but | |
1239 | * the entire register value must be used. I guess OVT | |
1240 | * underestimated how many variants they would make. */ | |
594f5b8b JFM |
1241 | switch (rc) { |
1242 | case 0x00: | |
6a7eba24 JFM |
1243 | sd->sensor = SEN_OV6630; |
1244 | PDEBUG(D_ERR, | |
1245 | "WARNING: Sensor is an OV66308. Your camera may have"); | |
1246 | PDEBUG(D_ERR, "been misdetected in previous driver versions."); | |
594f5b8b JFM |
1247 | break; |
1248 | case 0x01: | |
6a7eba24 | 1249 | sd->sensor = SEN_OV6620; |
594f5b8b JFM |
1250 | break; |
1251 | case 0x02: | |
6a7eba24 JFM |
1252 | sd->sensor = SEN_OV6630; |
1253 | PDEBUG(D_PROBE, "Sensor is an OV66308AE"); | |
594f5b8b JFM |
1254 | break; |
1255 | case 0x03: | |
6a7eba24 JFM |
1256 | sd->sensor = SEN_OV6630; |
1257 | PDEBUG(D_PROBE, "Sensor is an OV66308AF"); | |
594f5b8b JFM |
1258 | break; |
1259 | case 0x90: | |
6a7eba24 JFM |
1260 | sd->sensor = SEN_OV6630; |
1261 | PDEBUG(D_ERR, | |
1262 | "WARNING: Sensor is an OV66307. Your camera may have"); | |
1263 | PDEBUG(D_ERR, "been misdetected in previous driver versions."); | |
594f5b8b JFM |
1264 | break; |
1265 | default: | |
6a7eba24 JFM |
1266 | PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc); |
1267 | return -1; | |
1268 | } | |
1269 | ||
1270 | /* Set sensor-specific vars */ | |
594f5b8b | 1271 | sd->sif = 1; |
6a7eba24 | 1272 | |
6a7eba24 JFM |
1273 | return 0; |
1274 | } | |
1275 | ||
1276 | /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */ | |
1277 | static void ov51x_led_control(struct sd *sd, int on) | |
1278 | { | |
594f5b8b | 1279 | reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */ |
6a7eba24 JFM |
1280 | } |
1281 | ||
1282 | /* this function is called at probe time */ | |
1283 | static int sd_config(struct gspca_dev *gspca_dev, | |
1284 | const struct usb_device_id *id) | |
1285 | { | |
1286 | struct sd *sd = (struct sd *) gspca_dev; | |
1287 | struct cam *cam; | |
1288 | ||
a5ae2062 | 1289 | static const struct ov_regvals init_519[] = { |
6a7eba24 | 1290 | { 0x5a, 0x6d }, /* EnableSystem */ |
6a7eba24 JFM |
1291 | { 0x53, 0x9b }, |
1292 | { 0x54, 0xff }, /* set bit2 to enable jpeg */ | |
1293 | { 0x5d, 0x03 }, | |
1294 | { 0x49, 0x01 }, | |
1295 | { 0x48, 0x00 }, | |
1296 | /* Set LED pin to output mode. Bit 4 must be cleared or sensor | |
1297 | * detection will fail. This deserves further investigation. */ | |
1298 | { OV519_GPIO_IO_CTRL0, 0xee }, | |
1299 | { 0x51, 0x0f }, /* SetUsbInit */ | |
1300 | { 0x51, 0x00 }, | |
1301 | { 0x22, 0x00 }, | |
1302 | /* windows reads 0x55 at this point*/ | |
1303 | }; | |
1304 | ||
a5ae2062 | 1305 | if (write_regvals(sd, init_519, ARRAY_SIZE(init_519))) |
6a7eba24 | 1306 | goto error; |
6a7eba24 JFM |
1307 | ov51x_led_control(sd, 0); /* turn LED off */ |
1308 | ||
1309 | /* Test for 76xx */ | |
6a7eba24 JFM |
1310 | if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0) |
1311 | goto error; | |
1312 | ||
1313 | /* The OV519 must be more aggressive about sensor detection since | |
1314 | * I2C write will never fail if the sensor is not present. We have | |
1315 | * to try to initialize the sensor to detect its presence */ | |
4202f71c JFM |
1316 | if (init_ov_sensor(sd) >= 0) { |
1317 | if (ov7xx0_configure(sd) < 0) { | |
1318 | PDEBUG(D_ERR, "Failed to configure OV7xx0"); | |
1319 | goto error; | |
1320 | } | |
1321 | } else { | |
1322 | ||
6a7eba24 | 1323 | /* Test for 6xx0 */ |
6a7eba24 JFM |
1324 | if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0) |
1325 | goto error; | |
1326 | ||
4202f71c JFM |
1327 | if (init_ov_sensor(sd) >= 0) { |
1328 | if (ov6xx0_configure(sd) < 0) { | |
1329 | PDEBUG(D_ERR, "Failed to configure OV6xx0"); | |
1330 | goto error; | |
1331 | } | |
1332 | } else { | |
1333 | ||
6a7eba24 | 1334 | /* Test for 8xx0 */ |
6a7eba24 JFM |
1335 | if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0) |
1336 | goto error; | |
1337 | ||
1338 | if (init_ov_sensor(sd) < 0) { | |
1339 | PDEBUG(D_ERR, | |
1340 | "Can't determine sensor slave IDs"); | |
1341 | goto error; | |
6a7eba24 | 1342 | } |
4202f71c JFM |
1343 | if (ov8xx0_configure(sd) < 0) { |
1344 | PDEBUG(D_ERR, | |
ac40b1fa | 1345 | "Failed to configure OV8xx0 sensor"); |
6a7eba24 JFM |
1346 | goto error; |
1347 | } | |
1348 | } | |
6a7eba24 JFM |
1349 | } |
1350 | ||
1351 | cam = &gspca_dev->cam; | |
1352 | cam->epaddr = OV511_ENDPOINT_ADDRESS; | |
594f5b8b | 1353 | if (!sd->sif) { |
6a7eba24 | 1354 | cam->cam_mode = vga_mode; |
594f5b8b | 1355 | cam->nmodes = ARRAY_SIZE(vga_mode); |
6a7eba24 JFM |
1356 | } else { |
1357 | cam->cam_mode = sif_mode; | |
594f5b8b | 1358 | cam->nmodes = ARRAY_SIZE(sif_mode); |
6a7eba24 | 1359 | } |
594f5b8b JFM |
1360 | sd->brightness = BRIGHTNESS_DEF; |
1361 | sd->contrast = CONTRAST_DEF; | |
1362 | sd->colors = COLOR_DEF; | |
0cd6759d JFM |
1363 | sd->hflip = HFLIP_DEF; |
1364 | sd->vflip = VFLIP_DEF; | |
de00448f JFM |
1365 | if (sd->sensor != SEN_OV7670) |
1366 | gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | |
1367 | | (1 << VFLIP_IDX); | |
6a7eba24 JFM |
1368 | return 0; |
1369 | error: | |
1370 | PDEBUG(D_ERR, "OV519 Config failed"); | |
1371 | return -EBUSY; | |
1372 | } | |
1373 | ||
012d6b02 JFM |
1374 | /* this function is called at probe and resume time */ |
1375 | static int sd_init(struct gspca_dev *gspca_dev) | |
6a7eba24 | 1376 | { |
4202f71c JFM |
1377 | struct sd *sd = (struct sd *) gspca_dev; |
1378 | ||
1379 | /* initialize the sensor */ | |
1380 | switch (sd->sensor) { | |
1381 | case SEN_OV6620: | |
1382 | if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20))) | |
1383 | return -EIO; | |
1384 | break; | |
1385 | case SEN_OV6630: | |
1386 | if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30))) | |
1387 | return -EIO; | |
1388 | break; | |
1389 | default: | |
1390 | /* case SEN_OV7610: */ | |
1391 | /* case SEN_OV76BE: */ | |
1392 | if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610))) | |
1393 | return -EIO; | |
1394 | break; | |
1395 | case SEN_OV7620: | |
1396 | if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620))) | |
1397 | return -EIO; | |
1398 | break; | |
1399 | case SEN_OV7640: | |
1400 | if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640))) | |
1401 | return -EIO; | |
1402 | break; | |
1403 | case SEN_OV7670: | |
1404 | if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670))) | |
1405 | return -EIO; | |
1406 | break; | |
1407 | case SEN_OV8610: | |
1408 | if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610))) | |
1409 | return -EIO; | |
1410 | break; | |
1411 | } | |
6a7eba24 JFM |
1412 | return 0; |
1413 | } | |
1414 | ||
1415 | /* Sets up the OV519 with the given image parameters | |
1416 | * | |
1417 | * OV519 needs a completely different approach, until we can figure out what | |
1418 | * the individual registers do. | |
1419 | * | |
1420 | * Do not put any sensor-specific code in here (including I2C I/O functions) | |
1421 | */ | |
594f5b8b | 1422 | static int ov519_mode_init_regs(struct sd *sd) |
6a7eba24 | 1423 | { |
a5ae2062 | 1424 | static const struct ov_regvals mode_init_519_ov7670[] = { |
6a7eba24 JFM |
1425 | { 0x5d, 0x03 }, /* Turn off suspend mode */ |
1426 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
1427 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
1428 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
1429 | { 0xa3, 0x18 }, | |
1430 | { 0xa4, 0x04 }, | |
1431 | { 0xa5, 0x28 }, | |
1432 | { 0x37, 0x00 }, /* SetUsbInit */ | |
1433 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
1434 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
1435 | { 0x20, 0x0c }, | |
1436 | { 0x21, 0x38 }, | |
1437 | { 0x22, 0x1d }, | |
1438 | { 0x17, 0x50 }, /* undocumented */ | |
1439 | { 0x37, 0x00 }, /* undocumented */ | |
1440 | { 0x40, 0xff }, /* I2C timeout counter */ | |
1441 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
1442 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
1443 | { 0xff, 0x00 }, /* undocumented */ | |
1444 | /* windows reads 0x55 at this point, why? */ | |
1445 | }; | |
1446 | ||
a5ae2062 | 1447 | static const struct ov_regvals mode_init_519[] = { |
6a7eba24 JFM |
1448 | { 0x5d, 0x03 }, /* Turn off suspend mode */ |
1449 | { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */ | |
1450 | { 0x54, 0x0f }, /* bit2 (jpeg enable) */ | |
1451 | { 0xa2, 0x20 }, /* a2-a5 are undocumented */ | |
1452 | { 0xa3, 0x18 }, | |
1453 | { 0xa4, 0x04 }, | |
1454 | { 0xa5, 0x28 }, | |
1455 | { 0x37, 0x00 }, /* SetUsbInit */ | |
1456 | { 0x55, 0x02 }, /* 4.096 Mhz audio clock */ | |
1457 | /* Enable both fields, YUV Input, disable defect comp (why?) */ | |
1458 | { 0x22, 0x1d }, | |
1459 | { 0x17, 0x50 }, /* undocumented */ | |
1460 | { 0x37, 0x00 }, /* undocumented */ | |
1461 | { 0x40, 0xff }, /* I2C timeout counter */ | |
1462 | { 0x46, 0x00 }, /* I2C clock prescaler */ | |
1463 | { 0x59, 0x04 }, /* new from windrv 090403 */ | |
1464 | { 0xff, 0x00 }, /* undocumented */ | |
1465 | /* windows reads 0x55 at this point, why? */ | |
1466 | }; | |
1467 | ||
6a7eba24 JFM |
1468 | /******** Set the mode ********/ |
1469 | if (sd->sensor != SEN_OV7670) { | |
1470 | if (write_regvals(sd, mode_init_519, | |
a5ae2062 | 1471 | ARRAY_SIZE(mode_init_519))) |
6a7eba24 | 1472 | return -EIO; |
594f5b8b JFM |
1473 | if (sd->sensor == SEN_OV7640) { |
1474 | /* Select 8-bit input mode */ | |
ac40b1fa | 1475 | reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10); |
594f5b8b | 1476 | } |
6a7eba24 JFM |
1477 | } else { |
1478 | if (write_regvals(sd, mode_init_519_ov7670, | |
a5ae2062 | 1479 | ARRAY_SIZE(mode_init_519_ov7670))) |
6a7eba24 JFM |
1480 | return -EIO; |
1481 | } | |
1482 | ||
ac40b1fa JFM |
1483 | reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4); |
1484 | reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3); | |
1485 | reg_w(sd, OV519_R12_X_OFFSETL, 0x00); | |
1486 | reg_w(sd, OV519_R13_X_OFFSETH, 0x00); | |
1487 | reg_w(sd, OV519_R14_Y_OFFSETL, 0x00); | |
1488 | reg_w(sd, OV519_R15_Y_OFFSETH, 0x00); | |
1489 | reg_w(sd, OV519_R16_DIVIDER, 0x00); | |
1490 | reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */ | |
6a7eba24 JFM |
1491 | reg_w(sd, 0x26, 0x00); /* Undocumented */ |
1492 | ||
1493 | /******** Set the framerate ********/ | |
1494 | if (frame_rate > 0) | |
1495 | sd->frame_rate = frame_rate; | |
1496 | ||
1497 | /* FIXME: These are only valid at the max resolution. */ | |
1498 | sd->clockdiv = 0; | |
594f5b8b JFM |
1499 | switch (sd->sensor) { |
1500 | case SEN_OV7640: | |
6a7eba24 | 1501 | switch (sd->frame_rate) { |
594f5b8b | 1502 | /*fixme: default was 30 fps */ |
6a7eba24 JFM |
1503 | case 30: |
1504 | reg_w(sd, 0xa4, 0x0c); | |
1505 | reg_w(sd, 0x23, 0xff); | |
1506 | break; | |
1507 | case 25: | |
1508 | reg_w(sd, 0xa4, 0x0c); | |
1509 | reg_w(sd, 0x23, 0x1f); | |
1510 | break; | |
1511 | case 20: | |
1512 | reg_w(sd, 0xa4, 0x0c); | |
1513 | reg_w(sd, 0x23, 0x1b); | |
1514 | break; | |
1515 | default: | |
1516 | /* case 15: */ | |
1517 | reg_w(sd, 0xa4, 0x04); | |
1518 | reg_w(sd, 0x23, 0xff); | |
1519 | sd->clockdiv = 1; | |
1520 | break; | |
1521 | case 10: | |
1522 | reg_w(sd, 0xa4, 0x04); | |
1523 | reg_w(sd, 0x23, 0x1f); | |
1524 | sd->clockdiv = 1; | |
1525 | break; | |
1526 | case 5: | |
1527 | reg_w(sd, 0xa4, 0x04); | |
1528 | reg_w(sd, 0x23, 0x1b); | |
1529 | sd->clockdiv = 1; | |
1530 | break; | |
1531 | } | |
594f5b8b JFM |
1532 | break; |
1533 | case SEN_OV8610: | |
6a7eba24 JFM |
1534 | switch (sd->frame_rate) { |
1535 | default: /* 15 fps */ | |
1536 | /* case 15: */ | |
1537 | reg_w(sd, 0xa4, 0x06); | |
1538 | reg_w(sd, 0x23, 0xff); | |
1539 | break; | |
1540 | case 10: | |
1541 | reg_w(sd, 0xa4, 0x06); | |
1542 | reg_w(sd, 0x23, 0x1f); | |
1543 | break; | |
1544 | case 5: | |
1545 | reg_w(sd, 0xa4, 0x06); | |
1546 | reg_w(sd, 0x23, 0x1b); | |
1547 | break; | |
1548 | } | |
594f5b8b JFM |
1549 | break; |
1550 | case SEN_OV7670: /* guesses, based on 7640 */ | |
6a7eba24 JFM |
1551 | PDEBUG(D_STREAM, "Setting framerate to %d fps", |
1552 | (sd->frame_rate == 0) ? 15 : sd->frame_rate); | |
594f5b8b | 1553 | reg_w(sd, 0xa4, 0x10); |
6a7eba24 JFM |
1554 | switch (sd->frame_rate) { |
1555 | case 30: | |
6a7eba24 JFM |
1556 | reg_w(sd, 0x23, 0xff); |
1557 | break; | |
1558 | case 20: | |
6a7eba24 JFM |
1559 | reg_w(sd, 0x23, 0x1b); |
1560 | break; | |
594f5b8b JFM |
1561 | default: |
1562 | /* case 15: */ | |
6a7eba24 JFM |
1563 | reg_w(sd, 0x23, 0xff); |
1564 | sd->clockdiv = 1; | |
1565 | break; | |
1566 | } | |
594f5b8b | 1567 | break; |
6a7eba24 | 1568 | } |
6a7eba24 JFM |
1569 | return 0; |
1570 | } | |
1571 | ||
594f5b8b | 1572 | static int mode_init_ov_sensor_regs(struct sd *sd) |
6a7eba24 | 1573 | { |
594f5b8b JFM |
1574 | struct gspca_dev *gspca_dev; |
1575 | int qvga; | |
1576 | ||
1577 | gspca_dev = &sd->gspca_dev; | |
1578 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv; | |
6a7eba24 JFM |
1579 | |
1580 | /******** Mode (VGA/QVGA) and sensor specific regs ********/ | |
1581 | switch (sd->sensor) { | |
1582 | case SEN_OV8610: | |
1583 | /* For OV8610 qvga means qsvga */ | |
1584 | i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5); | |
1585 | break; | |
1586 | case SEN_OV7610: | |
1587 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
1588 | break; | |
1589 | case SEN_OV7620: | |
1590 | /* i2c_w(sd, 0x2b, 0x00); */ | |
1591 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
1592 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
1593 | i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); | |
1594 | i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); | |
1595 | i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); | |
1596 | i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); | |
1597 | i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); | |
1598 | break; | |
1599 | case SEN_OV76BE: | |
1600 | /* i2c_w(sd, 0x2b, 0x00); */ | |
1601 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
1602 | break; | |
1603 | case SEN_OV7640: | |
1604 | /* i2c_w(sd, 0x2b, 0x00); */ | |
1605 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
1606 | i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20); | |
1607 | /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */ | |
1608 | /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */ | |
1609 | /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */ | |
1610 | /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */ | |
1611 | /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */ | |
1612 | break; | |
1613 | case SEN_OV7670: | |
1614 | /* set COM7_FMT_VGA or COM7_FMT_QVGA | |
1615 | * do we need to set anything else? | |
1616 | * HSTART etc are set in set_ov_sensor_window itself */ | |
1617 | i2c_w_mask(sd, OV7670_REG_COM7, | |
1618 | qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA, | |
1619 | OV7670_COM7_FMT_MASK); | |
1620 | break; | |
1621 | case SEN_OV6620: | |
6a7eba24 JFM |
1622 | case SEN_OV6630: |
1623 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | |
1624 | break; | |
1625 | default: | |
1626 | return -EINVAL; | |
1627 | } | |
1628 | ||
1629 | /******** Palette-specific regs ********/ | |
594f5b8b JFM |
1630 | if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) { |
1631 | /* not valid on the OV6620/OV7620/6630? */ | |
1632 | i2c_w_mask(sd, 0x0e, 0x00, 0x40); | |
1633 | } | |
6a7eba24 | 1634 | |
594f5b8b JFM |
1635 | /* The OV518 needs special treatment. Although both the OV518 |
1636 | * and the OV6630 support a 16-bit video bus, only the 8 bit Y | |
1637 | * bus is actually used. The UV bus is tied to ground. | |
1638 | * Therefore, the OV6630 needs to be in 8-bit multiplexed | |
1639 | * output mode */ | |
6a7eba24 | 1640 | |
594f5b8b | 1641 | /* OV7640 is 8-bit only */ |
6a7eba24 | 1642 | |
594f5b8b JFM |
1643 | if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV7640) |
1644 | i2c_w_mask(sd, 0x13, 0x00, 0x20); | |
6a7eba24 JFM |
1645 | |
1646 | /******** Clock programming ********/ | |
1647 | /* The OV6620 needs special handling. This prevents the | |
1648 | * severe banding that normally occurs */ | |
1649 | if (sd->sensor == SEN_OV6620) { | |
1650 | ||
1651 | /* Clock down */ | |
1652 | i2c_w(sd, 0x2a, 0x04); | |
594f5b8b | 1653 | i2c_w(sd, 0x11, sd->clockdiv); |
6a7eba24 JFM |
1654 | i2c_w(sd, 0x2a, 0x84); |
1655 | /* This next setting is critical. It seems to improve | |
1656 | * the gain or the contrast. The "reserved" bits seem | |
1657 | * to have some effect in this case. */ | |
1658 | i2c_w(sd, 0x2d, 0x85); | |
ac40b1fa | 1659 | } else { |
594f5b8b | 1660 | i2c_w(sd, 0x11, sd->clockdiv); |
6a7eba24 JFM |
1661 | } |
1662 | ||
1663 | /******** Special Features ********/ | |
1664 | /* no evidence this is possible with OV7670, either */ | |
1665 | /* Test Pattern */ | |
1666 | if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670) | |
1667 | i2c_w_mask(sd, 0x12, 0x00, 0x02); | |
1668 | ||
1669 | /* Enable auto white balance */ | |
1670 | if (sd->sensor == SEN_OV7670) | |
1671 | i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB, | |
1672 | OV7670_COM8_AWB); | |
1673 | else | |
1674 | i2c_w_mask(sd, 0x12, 0x04, 0x04); | |
1675 | ||
1676 | /* This will go away as soon as ov51x_mode_init_sensor_regs() */ | |
1677 | /* is fully tested. */ | |
1678 | /* 7620/6620/6630? don't have register 0x35, so play it safe */ | |
1679 | if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) { | |
594f5b8b | 1680 | if (!qvga) |
6a7eba24 JFM |
1681 | i2c_w(sd, 0x35, 0x9e); |
1682 | else | |
1683 | i2c_w(sd, 0x35, 0x1e); | |
1684 | } | |
1685 | return 0; | |
1686 | } | |
1687 | ||
594f5b8b | 1688 | static void sethvflip(struct sd *sd) |
0cd6759d | 1689 | { |
594f5b8b JFM |
1690 | if (sd->sensor != SEN_OV7670) |
1691 | return; | |
0cd6759d JFM |
1692 | if (sd->gspca_dev.streaming) |
1693 | ov51x_stop(sd); | |
1694 | i2c_w_mask(sd, OV7670_REG_MVFP, | |
594f5b8b JFM |
1695 | OV7670_MVFP_MIRROR * sd->hflip |
1696 | | OV7670_MVFP_VFLIP * sd->vflip, | |
1697 | OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP); | |
0cd6759d JFM |
1698 | if (sd->gspca_dev.streaming) |
1699 | ov51x_restart(sd); | |
1700 | } | |
1701 | ||
594f5b8b | 1702 | static int set_ov_sensor_window(struct sd *sd) |
6a7eba24 | 1703 | { |
594f5b8b JFM |
1704 | struct gspca_dev *gspca_dev; |
1705 | int qvga; | |
6a7eba24 JFM |
1706 | int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale; |
1707 | int ret, hstart, hstop, vstop, vstart; | |
1708 | __u8 v; | |
1709 | ||
594f5b8b JFM |
1710 | gspca_dev = &sd->gspca_dev; |
1711 | qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv; | |
1712 | ||
6a7eba24 JFM |
1713 | /* The different sensor ICs handle setting up of window differently. |
1714 | * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */ | |
1715 | switch (sd->sensor) { | |
1716 | case SEN_OV8610: | |
1717 | hwsbase = 0x1e; | |
1718 | hwebase = 0x1e; | |
1719 | vwsbase = 0x02; | |
1720 | vwebase = 0x02; | |
1721 | break; | |
1722 | case SEN_OV7610: | |
1723 | case SEN_OV76BE: | |
1724 | hwsbase = 0x38; | |
1725 | hwebase = 0x3a; | |
1726 | vwsbase = vwebase = 0x05; | |
1727 | break; | |
1728 | case SEN_OV6620: | |
1729 | case SEN_OV6630: | |
1730 | hwsbase = 0x38; | |
1731 | hwebase = 0x3a; | |
1732 | vwsbase = 0x05; | |
1733 | vwebase = 0x06; | |
1734 | break; | |
1735 | case SEN_OV7620: | |
1736 | hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */ | |
1737 | hwebase = 0x2f; | |
1738 | vwsbase = vwebase = 0x05; | |
1739 | break; | |
1740 | case SEN_OV7640: | |
1741 | hwsbase = 0x1a; | |
1742 | hwebase = 0x1a; | |
1743 | vwsbase = vwebase = 0x03; | |
1744 | break; | |
1745 | case SEN_OV7670: | |
1746 | /*handling of OV7670 hardware sensor start and stop values | |
1747 | * is very odd, compared to the other OV sensors */ | |
1748 | vwsbase = vwebase = hwebase = hwsbase = 0x00; | |
1749 | break; | |
1750 | default: | |
1751 | return -EINVAL; | |
1752 | } | |
1753 | ||
1754 | switch (sd->sensor) { | |
1755 | case SEN_OV6620: | |
1756 | case SEN_OV6630: | |
594f5b8b | 1757 | if (qvga) { /* QCIF */ |
6a7eba24 JFM |
1758 | hwscale = 0; |
1759 | vwscale = 0; | |
1760 | } else { /* CIF */ | |
1761 | hwscale = 1; | |
1762 | vwscale = 1; /* The datasheet says 0; | |
1763 | * it's wrong */ | |
1764 | } | |
1765 | break; | |
1766 | case SEN_OV8610: | |
594f5b8b | 1767 | if (qvga) { /* QSVGA */ |
6a7eba24 JFM |
1768 | hwscale = 1; |
1769 | vwscale = 1; | |
1770 | } else { /* SVGA */ | |
1771 | hwscale = 2; | |
1772 | vwscale = 2; | |
1773 | } | |
1774 | break; | |
1775 | default: /* SEN_OV7xx0 */ | |
594f5b8b | 1776 | if (qvga) { /* QVGA */ |
6a7eba24 JFM |
1777 | hwscale = 1; |
1778 | vwscale = 0; | |
1779 | } else { /* VGA */ | |
1780 | hwscale = 2; | |
1781 | vwscale = 1; | |
1782 | } | |
1783 | } | |
1784 | ||
594f5b8b | 1785 | ret = mode_init_ov_sensor_regs(sd); |
6a7eba24 JFM |
1786 | if (ret < 0) |
1787 | return ret; | |
1788 | ||
1789 | if (sd->sensor == SEN_OV8610) { | |
1790 | i2c_w_mask(sd, 0x2d, 0x05, 0x40); | |
1791 | /* old 0x95, new 0x05 from windrv 090403 */ | |
1792 | /* bits 5-7: reserved */ | |
1793 | i2c_w_mask(sd, 0x28, 0x20, 0x20); | |
1794 | /* bit 5: progressive mode on */ | |
1795 | } | |
1796 | ||
1797 | /* The below is wrong for OV7670s because their window registers | |
1798 | * only store the high bits in 0x17 to 0x1a */ | |
1799 | ||
1800 | /* SRH Use sd->max values instead of requested win values */ | |
1801 | /* SCS Since we're sticking with only the max hardware widths | |
1802 | * for a given mode */ | |
1803 | /* I can hard code this for OV7670s */ | |
1804 | /* Yes, these numbers do look odd, but they're tested and work! */ | |
1805 | if (sd->sensor == SEN_OV7670) { | |
594f5b8b | 1806 | if (qvga) { /* QVGA from ov7670.c by |
6a7eba24 JFM |
1807 | * Jonathan Corbet */ |
1808 | hstart = 164; | |
1809 | hstop = 20; | |
1810 | vstart = 14; | |
1811 | vstop = 494; | |
1812 | } else { /* VGA */ | |
1813 | hstart = 158; | |
1814 | hstop = 14; | |
1815 | vstart = 10; | |
1816 | vstop = 490; | |
1817 | } | |
1818 | /* OV7670 hardware window registers are split across | |
1819 | * multiple locations */ | |
594f5b8b JFM |
1820 | i2c_w(sd, OV7670_REG_HSTART, hstart >> 3); |
1821 | i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3); | |
6a7eba24 JFM |
1822 | v = i2c_r(sd, OV7670_REG_HREF); |
1823 | v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07); | |
1824 | msleep(10); /* need to sleep between read and write to | |
1825 | * same reg! */ | |
1826 | i2c_w(sd, OV7670_REG_HREF, v); | |
1827 | ||
594f5b8b JFM |
1828 | i2c_w(sd, OV7670_REG_VSTART, vstart >> 2); |
1829 | i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2); | |
6a7eba24 JFM |
1830 | v = i2c_r(sd, OV7670_REG_VREF); |
1831 | v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03); | |
1832 | msleep(10); /* need to sleep between read and write to | |
1833 | * same reg! */ | |
1834 | i2c_w(sd, OV7670_REG_VREF, v); | |
594f5b8b | 1835 | sethvflip(sd); |
6a7eba24 | 1836 | } else { |
594f5b8b JFM |
1837 | i2c_w(sd, 0x17, hwsbase); |
1838 | i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale)); | |
1839 | i2c_w(sd, 0x19, vwsbase); | |
1840 | i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale)); | |
6a7eba24 JFM |
1841 | } |
1842 | return 0; | |
1843 | } | |
1844 | ||
6a7eba24 | 1845 | /* -- start the camera -- */ |
72ab97ce | 1846 | static int sd_start(struct gspca_dev *gspca_dev) |
6a7eba24 JFM |
1847 | { |
1848 | struct sd *sd = (struct sd *) gspca_dev; | |
1849 | int ret; | |
1850 | ||
594f5b8b | 1851 | ret = ov519_mode_init_regs(sd); |
6a7eba24 JFM |
1852 | if (ret < 0) |
1853 | goto out; | |
594f5b8b | 1854 | ret = set_ov_sensor_window(sd); |
6a7eba24 JFM |
1855 | if (ret < 0) |
1856 | goto out; | |
1857 | ||
594f5b8b | 1858 | ret = ov51x_restart(sd); |
6a7eba24 JFM |
1859 | if (ret < 0) |
1860 | goto out; | |
6a7eba24 | 1861 | ov51x_led_control(sd, 1); |
72ab97ce | 1862 | return 0; |
6a7eba24 JFM |
1863 | out: |
1864 | PDEBUG(D_ERR, "camera start error:%d", ret); | |
72ab97ce | 1865 | return ret; |
6a7eba24 JFM |
1866 | } |
1867 | ||
1868 | static void sd_stopN(struct gspca_dev *gspca_dev) | |
1869 | { | |
ac40b1fa JFM |
1870 | struct sd *sd = (struct sd *) gspca_dev; |
1871 | ||
1872 | ov51x_stop(sd); | |
1873 | ov51x_led_control(sd, 0); | |
6a7eba24 JFM |
1874 | } |
1875 | ||
6a7eba24 JFM |
1876 | static void sd_pkt_scan(struct gspca_dev *gspca_dev, |
1877 | struct gspca_frame *frame, /* target */ | |
a5ae2062 | 1878 | __u8 *data, /* isoc packet */ |
6a7eba24 JFM |
1879 | int len) /* iso packet length */ |
1880 | { | |
1881 | /* Header of ov519 is 16 bytes: | |
1882 | * Byte Value Description | |
1883 | * 0 0xff magic | |
1884 | * 1 0xff magic | |
1885 | * 2 0xff magic | |
1886 | * 3 0xXX 0x50 = SOF, 0x51 = EOF | |
1887 | * 9 0xXX 0x01 initial frame without data, | |
1888 | * 0x00 standard frame with image | |
1889 | * 14 Lo in EOF: length of image data / 8 | |
1890 | * 15 Hi | |
1891 | */ | |
1892 | ||
1893 | if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) { | |
1894 | switch (data[3]) { | |
1895 | case 0x50: /* start of frame */ | |
1896 | #define HDRSZ 16 | |
1897 | data += HDRSZ; | |
1898 | len -= HDRSZ; | |
1899 | #undef HDRSZ | |
1900 | if (data[0] == 0xff || data[1] == 0xd8) | |
1901 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, | |
1902 | data, len); | |
1903 | else | |
1904 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
1905 | return; | |
1906 | case 0x51: /* end of frame */ | |
1907 | if (data[9] != 0) | |
1908 | gspca_dev->last_packet_type = DISCARD_PACKET; | |
1909 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, | |
1910 | data, 0); | |
1911 | return; | |
1912 | } | |
1913 | } | |
1914 | ||
1915 | /* intermediate packet */ | |
1916 | gspca_frame_add(gspca_dev, INTER_PACKET, frame, | |
1917 | data, len); | |
1918 | } | |
1919 | ||
1920 | /* -- management routines -- */ | |
1921 | ||
1922 | static void setbrightness(struct gspca_dev *gspca_dev) | |
1923 | { | |
1924 | struct sd *sd = (struct sd *) gspca_dev; | |
1925 | int val; | |
6a7eba24 JFM |
1926 | |
1927 | val = sd->brightness; | |
6a7eba24 JFM |
1928 | switch (sd->sensor) { |
1929 | case SEN_OV8610: | |
1930 | case SEN_OV7610: | |
1931 | case SEN_OV76BE: | |
1932 | case SEN_OV6620: | |
1933 | case SEN_OV6630: | |
1934 | case SEN_OV7640: | |
1935 | i2c_w(sd, OV7610_REG_BRT, val); | |
1936 | break; | |
1937 | case SEN_OV7620: | |
1938 | /* 7620 doesn't like manual changes when in auto mode */ | |
1939 | /*fixme | |
1940 | * if (!sd->auto_brt) */ | |
1941 | i2c_w(sd, OV7610_REG_BRT, val); | |
1942 | break; | |
1943 | case SEN_OV7670: | |
594f5b8b | 1944 | /*win trace |
6a7eba24 JFM |
1945 | * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */ |
1946 | i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val)); | |
1947 | break; | |
1948 | } | |
6a7eba24 JFM |
1949 | } |
1950 | ||
1951 | static void setcontrast(struct gspca_dev *gspca_dev) | |
1952 | { | |
1953 | struct sd *sd = (struct sd *) gspca_dev; | |
1954 | int val; | |
6a7eba24 JFM |
1955 | |
1956 | val = sd->contrast; | |
6a7eba24 JFM |
1957 | switch (sd->sensor) { |
1958 | case SEN_OV7610: | |
1959 | case SEN_OV6620: | |
1960 | i2c_w(sd, OV7610_REG_CNT, val); | |
1961 | break; | |
1962 | case SEN_OV6630: | |
1963 | i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f); | |
1964 | case SEN_OV8610: { | |
a5ae2062 | 1965 | static const __u8 ctab[] = { |
6a7eba24 JFM |
1966 | 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f |
1967 | }; | |
1968 | ||
1969 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
1970 | i2c_w(sd, 0x64, ctab[val >> 5]); | |
1971 | break; | |
1972 | } | |
1973 | case SEN_OV7620: { | |
a5ae2062 | 1974 | static const __u8 ctab[] = { |
6a7eba24 JFM |
1975 | 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57, |
1976 | 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff | |
1977 | }; | |
1978 | ||
1979 | /* Use Y gamma control instead. Bit 0 enables it. */ | |
1980 | i2c_w(sd, 0x64, ctab[val >> 4]); | |
1981 | break; | |
1982 | } | |
1983 | case SEN_OV7640: | |
1984 | /* Use gain control instead. */ | |
1985 | i2c_w(sd, OV7610_REG_GAIN, val >> 2); | |
1986 | break; | |
1987 | case SEN_OV7670: | |
1988 | /* check that this isn't just the same as ov7610 */ | |
1989 | i2c_w(sd, OV7670_REG_CONTRAS, val >> 1); | |
1990 | break; | |
1991 | } | |
6a7eba24 JFM |
1992 | } |
1993 | ||
1994 | static void setcolors(struct gspca_dev *gspca_dev) | |
1995 | { | |
1996 | struct sd *sd = (struct sd *) gspca_dev; | |
1997 | int val; | |
6a7eba24 JFM |
1998 | |
1999 | val = sd->colors; | |
6a7eba24 JFM |
2000 | switch (sd->sensor) { |
2001 | case SEN_OV8610: | |
2002 | case SEN_OV7610: | |
2003 | case SEN_OV76BE: | |
2004 | case SEN_OV6620: | |
2005 | case SEN_OV6630: | |
2006 | i2c_w(sd, OV7610_REG_SAT, val); | |
2007 | break; | |
2008 | case SEN_OV7620: | |
2009 | /* Use UV gamma control instead. Bits 0 & 7 are reserved. */ | |
2010 | /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e); | |
2011 | if (rc < 0) | |
2012 | goto out; */ | |
2013 | i2c_w(sd, OV7610_REG_SAT, val); | |
2014 | break; | |
2015 | case SEN_OV7640: | |
2016 | i2c_w(sd, OV7610_REG_SAT, val & 0xf0); | |
2017 | break; | |
2018 | case SEN_OV7670: | |
2019 | /* supported later once I work out how to do it | |
2020 | * transparently fail now! */ | |
2021 | /* set REG_COM13 values for UV sat auto mode */ | |
2022 | break; | |
2023 | } | |
6a7eba24 JFM |
2024 | } |
2025 | ||
2026 | static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val) | |
2027 | { | |
2028 | struct sd *sd = (struct sd *) gspca_dev; | |
2029 | ||
2030 | sd->brightness = val; | |
ac40b1fa JFM |
2031 | if (gspca_dev->streaming) |
2032 | setbrightness(gspca_dev); | |
6a7eba24 JFM |
2033 | return 0; |
2034 | } | |
2035 | ||
2036 | static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val) | |
2037 | { | |
2038 | struct sd *sd = (struct sd *) gspca_dev; | |
2039 | ||
2040 | *val = sd->brightness; | |
2041 | return 0; | |
2042 | } | |
2043 | ||
2044 | static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val) | |
2045 | { | |
2046 | struct sd *sd = (struct sd *) gspca_dev; | |
2047 | ||
2048 | sd->contrast = val; | |
ac40b1fa JFM |
2049 | if (gspca_dev->streaming) |
2050 | setcontrast(gspca_dev); | |
6a7eba24 JFM |
2051 | return 0; |
2052 | } | |
2053 | ||
2054 | static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val) | |
2055 | { | |
2056 | struct sd *sd = (struct sd *) gspca_dev; | |
2057 | ||
2058 | *val = sd->contrast; | |
2059 | return 0; | |
2060 | } | |
2061 | ||
2062 | static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val) | |
2063 | { | |
2064 | struct sd *sd = (struct sd *) gspca_dev; | |
2065 | ||
2066 | sd->colors = val; | |
ac40b1fa JFM |
2067 | if (gspca_dev->streaming) |
2068 | setcolors(gspca_dev); | |
6a7eba24 JFM |
2069 | return 0; |
2070 | } | |
2071 | ||
2072 | static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val) | |
2073 | { | |
2074 | struct sd *sd = (struct sd *) gspca_dev; | |
2075 | ||
2076 | *val = sd->colors; | |
2077 | return 0; | |
2078 | } | |
2079 | ||
0cd6759d JFM |
2080 | static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val) |
2081 | { | |
2082 | struct sd *sd = (struct sd *) gspca_dev; | |
2083 | ||
2084 | sd->hflip = val; | |
ac40b1fa JFM |
2085 | if (gspca_dev->streaming) |
2086 | sethvflip(sd); | |
0cd6759d JFM |
2087 | return 0; |
2088 | } | |
2089 | ||
2090 | static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val) | |
2091 | { | |
2092 | struct sd *sd = (struct sd *) gspca_dev; | |
2093 | ||
2094 | *val = sd->hflip; | |
2095 | return 0; | |
2096 | } | |
2097 | ||
2098 | static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val) | |
2099 | { | |
2100 | struct sd *sd = (struct sd *) gspca_dev; | |
2101 | ||
2102 | sd->vflip = val; | |
ac40b1fa JFM |
2103 | if (gspca_dev->streaming) |
2104 | sethvflip(sd); | |
0cd6759d JFM |
2105 | return 0; |
2106 | } | |
2107 | ||
2108 | static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val) | |
2109 | { | |
2110 | struct sd *sd = (struct sd *) gspca_dev; | |
2111 | ||
2112 | *val = sd->vflip; | |
2113 | return 0; | |
2114 | } | |
2115 | ||
6a7eba24 | 2116 | /* sub-driver description */ |
a5ae2062 | 2117 | static const struct sd_desc sd_desc = { |
6a7eba24 JFM |
2118 | .name = MODULE_NAME, |
2119 | .ctrls = sd_ctrls, | |
2120 | .nctrls = ARRAY_SIZE(sd_ctrls), | |
2121 | .config = sd_config, | |
012d6b02 | 2122 | .init = sd_init, |
6a7eba24 JFM |
2123 | .start = sd_start, |
2124 | .stopN = sd_stopN, | |
6a7eba24 JFM |
2125 | .pkt_scan = sd_pkt_scan, |
2126 | }; | |
2127 | ||
2128 | /* -- module initialisation -- */ | |
a5ae2062 | 2129 | static const __devinitdata struct usb_device_id device_table[] = { |
9d64fdb1 JFM |
2130 | {USB_DEVICE(0x041e, 0x4052)}, |
2131 | {USB_DEVICE(0x041e, 0x405f)}, | |
2132 | {USB_DEVICE(0x041e, 0x4060)}, | |
2133 | {USB_DEVICE(0x041e, 0x4061)}, | |
2134 | {USB_DEVICE(0x041e, 0x4064)}, | |
2135 | {USB_DEVICE(0x041e, 0x4068)}, | |
2136 | {USB_DEVICE(0x045e, 0x028c)}, | |
2137 | {USB_DEVICE(0x054c, 0x0154)}, | |
2138 | {USB_DEVICE(0x054c, 0x0155)}, | |
2139 | {USB_DEVICE(0x05a9, 0x0519)}, | |
2140 | {USB_DEVICE(0x05a9, 0x0530)}, | |
2141 | {USB_DEVICE(0x05a9, 0x4519)}, | |
2142 | {USB_DEVICE(0x05a9, 0x8519)}, | |
6a7eba24 JFM |
2143 | {} |
2144 | }; | |
ac40b1fa | 2145 | |
6a7eba24 JFM |
2146 | MODULE_DEVICE_TABLE(usb, device_table); |
2147 | ||
2148 | /* -- device connect -- */ | |
2149 | static int sd_probe(struct usb_interface *intf, | |
2150 | const struct usb_device_id *id) | |
2151 | { | |
2152 | return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), | |
2153 | THIS_MODULE); | |
2154 | } | |
2155 | ||
2156 | static struct usb_driver sd_driver = { | |
2157 | .name = MODULE_NAME, | |
2158 | .id_table = device_table, | |
2159 | .probe = sd_probe, | |
2160 | .disconnect = gspca_disconnect, | |
6a709749 JFM |
2161 | #ifdef CONFIG_PM |
2162 | .suspend = gspca_suspend, | |
2163 | .resume = gspca_resume, | |
2164 | #endif | |
6a7eba24 JFM |
2165 | }; |
2166 | ||
2167 | /* -- module insert / remove -- */ | |
2168 | static int __init sd_mod_init(void) | |
2169 | { | |
2170 | if (usb_register(&sd_driver) < 0) | |
2171 | return -1; | |
10b0e96e | 2172 | PDEBUG(D_PROBE, "registered"); |
6a7eba24 JFM |
2173 | return 0; |
2174 | } | |
2175 | static void __exit sd_mod_exit(void) | |
2176 | { | |
2177 | usb_deregister(&sd_driver); | |
2178 | PDEBUG(D_PROBE, "deregistered"); | |
2179 | } | |
2180 | ||
2181 | module_init(sd_mod_init); | |
2182 | module_exit(sd_mod_exit); | |
2183 | ||
2184 | module_param(frame_rate, int, 0644); | |
2185 | MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)"); |