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[media] gspca - ov519: Fix sensor detection problems
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / gspca / ov519.c
CommitLineData
6a7eba24
JFM		 1/**
2 * OV519 driver
3 *
58c92d37 4 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
b46aaa02 5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6a7eba24 6 *
2961e875
RB		 7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
b46aaa02 12 * Copyright (c) 1999-2006 Mark W. McClelland
2961e875 13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
b46aaa02
HG		 14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
2961e875
RB		 18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
6a7eba24
JFM		 23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39#define MODULE_NAME "ov519"
40
417a4d26 41#include <linux/input.h>
6a7eba24
JFM		 42#include "gspca.h"
43
9a731a32
JFM		 44/* The jpeg_hdr is used by w996Xcf only */
45/* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
46#define CONEX_CAM
47#include "jpeg.h"
48
6a7eba24
JFM		 49MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
50MODULE_DESCRIPTION("OV519 USB Camera Driver");
51MODULE_LICENSE("GPL");
52
53/* global parameters */
54static int frame_rate;
55
56/* Number of times to retry a failed I2C transaction. Increase this if you
57 * are getting "Failed to read sensor ID..." */
58static int i2c_detect_tries = 10;
59
62833acd
JFM		 60/* controls */
61enum e_ctrl {
62 BRIGHTNESS,
63 CONTRAST,
58c92d37 64 EXPOSURE,
62833acd
JFM		 65 COLORS,
66 HFLIP,
67 VFLIP,
68 AUTOBRIGHT,
58c92d37 69 AUTOGAIN,
62833acd
JFM		 70 FREQ,
71 NCTRL /* number of controls */
72};
73
6a7eba24
JFM		 74/* ov519 device descriptor */
75struct sd {
76 struct gspca_dev gspca_dev; /* !! must be the first item */
77
62833acd
JFM		 78 struct gspca_ctrl ctrls[NCTRL];
79
9d1593a8 80 u8 packet_nr;
92918a53 81
49809d6a
HG		 82 char bridge;
83#define BRIDGE_OV511 0
84#define BRIDGE_OV511PLUS 1
85#define BRIDGE_OV518 2
86#define BRIDGE_OV518PLUS 3
42e142f6 87#define BRIDGE_OV519 4 /* = ov530 */
635118d5 88#define BRIDGE_OVFX2 5
a511ba94 89#define BRIDGE_W9968CF 6
9e4d8258
HG		 90#define BRIDGE_MASK 7
91
92 char invert_led;
93#define BRIDGE_INVERT_LED 8
49809d6a 94
417a4d26
HG		 95 char snapshot_pressed;
96 char snapshot_needs_reset;
97
6a7eba24 98 /* Determined by sensor type */
9d1593a8 99 u8 sif;
6a7eba24 100
9d1593a8 101 u8 quality;
79b35902
HG		 102#define QUALITY_MIN 50
103#define QUALITY_MAX 70
104#define QUALITY_DEF 50
6a7eba24 105
9d1593a8
JFM		 106 u8 stopped; /* Streaming is temporarily paused */
107 u8 first_frame;
6a7eba24 108
9d1593a8
JFM		 109 u8 frame_rate; /* current Framerate */
110 u8 clockdiv; /* clockdiv override */
6a7eba24 111
7bbe6b8d 112 s8 sensor; /* Type of image sensor chip (SEN_*) */
a511ba94
HG		 113
114 u8 sensor_addr;
d6fa6638
JFM		 115 u16 sensor_width;
116 u16 sensor_height;
117 s16 sensor_reg_cache[256];
79b35902 118
9a731a32 119 u8 jpeg_hdr[JPEG_HDR_SZ];
6a7eba24 120};
7bbe6b8d
JFM		 121enum sensors {
122 SEN_OV2610,
07c6c9c6 123 SEN_OV2610AE,
7bbe6b8d
JFM		 124 SEN_OV3610,
125 SEN_OV6620,
126 SEN_OV6630,
127 SEN_OV66308AF,
128 SEN_OV7610,
129 SEN_OV7620,
130 SEN_OV7620AE,
131 SEN_OV7640,
132 SEN_OV7648,
42e142f6 133 SEN_OV7660,
7bbe6b8d
JFM		 134 SEN_OV7670,
135 SEN_OV76BE,
136 SEN_OV8610,
798ae150 137 SEN_OV9600,
7bbe6b8d 138};
6a7eba24 139
a511ba94
HG		 140/* Note this is a bit of a hack, but the w9968cf driver needs the code for all
141 the ov sensors which is already present here. When we have the time we
142 really should move the sensor drivers to v4l2 sub drivers. */
143#include "w996Xcf.c"
144
6a7eba24 145/* V4L2 controls supported by the driver */
49809d6a
HG		 146static void setbrightness(struct gspca_dev *gspca_dev);
147static void setcontrast(struct gspca_dev *gspca_dev);
58c92d37 148static void setexposure(struct gspca_dev *gspca_dev);
49809d6a 149static void setcolors(struct gspca_dev *gspca_dev);
62833acd
JFM		 150static void sethvflip(struct gspca_dev *gspca_dev);
151static void setautobright(struct gspca_dev *gspca_dev);
58c92d37 152static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
62833acd
JFM		 153static void setfreq(struct gspca_dev *gspca_dev);
154static void setfreq_i(struct sd *sd);
6a7eba24 155
02ab18b0 156static const struct ctrl sd_ctrls[] = {
62833acd 157[BRIGHTNESS] = {
6a7eba24
JFM		 158 {
159 .id = V4L2_CID_BRIGHTNESS,
160 .type = V4L2_CTRL_TYPE_INTEGER,
161 .name = "Brightness",
162 .minimum = 0,
163 .maximum = 255,
164 .step = 1,
62833acd 165 .default_value = 127,
6a7eba24 166 },
62833acd 167 .set_control = setbrightness,
6a7eba24 168 },
62833acd 169[CONTRAST] = {
6a7eba24
JFM		 170 {
171 .id = V4L2_CID_CONTRAST,
172 .type = V4L2_CTRL_TYPE_INTEGER,
173 .name = "Contrast",
174 .minimum = 0,
175 .maximum = 255,
176 .step = 1,
62833acd 177 .default_value = 127,
6a7eba24 178 },
62833acd 179 .set_control = setcontrast,
6a7eba24 180 },
58c92d37
JFM		 181[EXPOSURE] = {
182 {
183 .id = V4L2_CID_EXPOSURE,
184 .type = V4L2_CTRL_TYPE_INTEGER,
185 .name = "Exposure",
186 .minimum = 0,
187 .maximum = 255,
188 .step = 1,
189 .default_value = 127,
190 },
191 .set_control = setexposure,
192 },
62833acd 193[COLORS] = {
6a7eba24
JFM		 194 {
195 .id = V4L2_CID_SATURATION,
196 .type = V4L2_CTRL_TYPE_INTEGER,
594f5b8b 197 .name = "Color",
6a7eba24
JFM		 198 .minimum = 0,
199 .maximum = 255,
200 .step = 1,
62833acd 201 .default_value = 127,
6a7eba24 202 },
62833acd 203 .set_control = setcolors,
6a7eba24 204 },
42e142f6 205/* The flip controls work for sensors ov7660 and ov7670 only */
62833acd 206[HFLIP] = {
0cd6759d
JFM		 207 {
208 .id = V4L2_CID_HFLIP,
209 .type = V4L2_CTRL_TYPE_BOOLEAN,
210 .name = "Mirror",
211 .minimum = 0,
212 .maximum = 1,
213 .step = 1,
62833acd 214 .default_value = 0,
0cd6759d 215 },
62833acd 216 .set_control = sethvflip,
0cd6759d 217 },
62833acd 218[VFLIP] = {
0cd6759d
JFM		 219 {
220 .id = V4L2_CID_VFLIP,
221 .type = V4L2_CTRL_TYPE_BOOLEAN,
222 .name = "Vflip",
223 .minimum = 0,
224 .maximum = 1,
225 .step = 1,
62833acd 226 .default_value = 0,
0cd6759d 227 },
62833acd 228 .set_control = sethvflip,
0cd6759d 229 },
62833acd 230[AUTOBRIGHT] = {
02ab18b0
HG		 231 {
232 .id = V4L2_CID_AUTOBRIGHTNESS,
233 .type = V4L2_CTRL_TYPE_BOOLEAN,
234 .name = "Auto Brightness",
235 .minimum = 0,
236 .maximum = 1,
237 .step = 1,
62833acd 238 .default_value = 1,
02ab18b0 239 },
62833acd 240 .set_control = setautobright,
02ab18b0 241 },
58c92d37
JFM		 242[AUTOGAIN] = {
243 {
244 .id = V4L2_CID_AUTOGAIN,
245 .type = V4L2_CTRL_TYPE_BOOLEAN,
246 .name = "Auto Gain",
247 .minimum = 0,
248 .maximum = 1,
249 .step = 1,
250 .default_value = 1,
251 .flags = V4L2_CTRL_FLAG_UPDATE
252 },
253 .set = sd_setautogain,
254 },
62833acd 255[FREQ] = {
02ab18b0
HG		 256 {
257 .id = V4L2_CID_POWER_LINE_FREQUENCY,
258 .type = V4L2_CTRL_TYPE_MENU,
259 .name = "Light frequency filter",
260 .minimum = 0,
87bae740 261 .maximum = 2, /* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
02ab18b0 262 .step = 1,
62833acd 263 .default_value = 0,
02ab18b0 264 },
62833acd 265 .set_control = setfreq,
02ab18b0 266 },
6a7eba24
JFM		 267};
268
83db7688
JFM		 269/* table of the disabled controls */
270static const unsigned ctrl_dis[] = {
58c92d37
JFM		 271[SEN_OV2610] = ((1 << NCTRL) - 1) /* no control */
272 ^ ((1 << EXPOSURE) /* but exposure */
273 | (1 << AUTOGAIN)), /* and autogain */
83db7688 274
58c92d37
JFM		 275[SEN_OV2610AE] = ((1 << NCTRL) - 1) /* no control */
276 ^ ((1 << EXPOSURE) /* but exposure */
277 | (1 << AUTOGAIN)), /* and autogain */
07c6c9c6 278
83db7688
JFM		 279[SEN_OV3610] = (1 << NCTRL) - 1, /* no control */
280
281[SEN_OV6620] = (1 << HFLIP) |
58c92d37
JFM		 282 (1 << VFLIP) |
283 (1 << EXPOSURE) |
284 (1 << AUTOGAIN),
83db7688
JFM		 285
286[SEN_OV6630] = (1 << HFLIP) |
58c92d37
JFM		 287 (1 << VFLIP) |
288 (1 << EXPOSURE) |
289 (1 << AUTOGAIN),
83db7688
JFM		 290
291[SEN_OV66308AF] = (1 << HFLIP) |
58c92d37
JFM		 292 (1 << VFLIP) |
293 (1 << EXPOSURE) |
294 (1 << AUTOGAIN),
83db7688
JFM		 295
296[SEN_OV7610] = (1 << HFLIP) |
58c92d37
JFM		 297 (1 << VFLIP) |
298 (1 << EXPOSURE) |
299 (1 << AUTOGAIN),
83db7688
JFM		 300
301[SEN_OV7620] = (1 << HFLIP) |
58c92d37
JFM		 302 (1 << VFLIP) |
303 (1 << EXPOSURE) |
304 (1 << AUTOGAIN),
83db7688
JFM		 305
306[SEN_OV7620AE] = (1 << HFLIP) |
58c92d37
JFM		 307 (1 << VFLIP) |
308 (1 << EXPOSURE) |
309 (1 << AUTOGAIN),
83db7688
JFM		 310
311[SEN_OV7640] = (1 << HFLIP) |
312 (1 << VFLIP) |
313 (1 << AUTOBRIGHT) |
58c92d37
JFM		 314 (1 << CONTRAST) |
315 (1 << EXPOSURE) |
316 (1 << AUTOGAIN),
83db7688
JFM		 317
318[SEN_OV7648] = (1 << HFLIP) |
319 (1 << VFLIP) |
320 (1 << AUTOBRIGHT) |
58c92d37
JFM		 321 (1 << CONTRAST) |
322 (1 << EXPOSURE) |
323 (1 << AUTOGAIN),
83db7688 324
58c92d37
JFM		 325[SEN_OV7660] = (1 << AUTOBRIGHT) |
326 (1 << EXPOSURE) |
327 (1 << AUTOGAIN),
42e142f6 328
83db7688 329[SEN_OV7670] = (1 << COLORS) |
58c92d37
JFM		 330 (1 << AUTOBRIGHT) |
331 (1 << EXPOSURE) |
332 (1 << AUTOGAIN),
83db7688
JFM		 333
334[SEN_OV76BE] = (1 << HFLIP) |
58c92d37
JFM		 335 (1 << VFLIP) |
336 (1 << EXPOSURE) |
337 (1 << AUTOGAIN),
83db7688
JFM		 338
339[SEN_OV8610] = (1 << HFLIP) |
340 (1 << VFLIP) |
58c92d37
JFM		 341 (1 << EXPOSURE) |
342 (1 << AUTOGAIN) |
83db7688 343 (1 << FREQ),
798ae150
JFM		 344[SEN_OV9600] = ((1 << NCTRL) - 1) /* no control */
345 ^ ((1 << EXPOSURE) /* but exposure */
346 | (1 << AUTOGAIN)), /* and autogain */
347
83db7688
JFM		 348};
349
49809d6a 350static const struct v4l2_pix_format ov519_vga_mode[] = {
c2446b3e
JFM		 351 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
352 .bytesperline = 320,
594f5b8b 353 .sizeimage = 320 * 240 * 3 / 8 + 590,
c2446b3e
JFM		 354 .colorspace = V4L2_COLORSPACE_JPEG,
355 .priv = 1},
356 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
357 .bytesperline = 640,
358 .sizeimage = 640 * 480 * 3 / 8 + 590,
359 .colorspace = V4L2_COLORSPACE_JPEG,
360 .priv = 0},
6a7eba24 361};
49809d6a 362static const struct v4l2_pix_format ov519_sif_mode[] = {
124cc9c0
HG		 363 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
364 .bytesperline = 160,
365 .sizeimage = 160 * 120 * 3 / 8 + 590,
366 .colorspace = V4L2_COLORSPACE_JPEG,
367 .priv = 3},
c2446b3e
JFM		 368 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
369 .bytesperline = 176,
594f5b8b 370 .sizeimage = 176 * 144 * 3 / 8 + 590,
c2446b3e
JFM		 371 .colorspace = V4L2_COLORSPACE_JPEG,
372 .priv = 1},
124cc9c0
HG		 373 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
374 .bytesperline = 320,
375 .sizeimage = 320 * 240 * 3 / 8 + 590,
376 .colorspace = V4L2_COLORSPACE_JPEG,
377 .priv = 2},
c2446b3e
JFM		 378 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
379 .bytesperline = 352,
594f5b8b 380 .sizeimage = 352 * 288 * 3 / 8 + 590,
c2446b3e
JFM		 381 .colorspace = V4L2_COLORSPACE_JPEG,
382 .priv = 0},
6a7eba24
JFM		 383};
384
b282d873
HG		 385/* Note some of the sizeimage values for the ov511 / ov518 may seem
386 larger then necessary, however they need to be this big as the ov511 /
387 ov518 always fills the entire isoc frame, using 0 padding bytes when
388 it doesn't have any data. So with low framerates the amount of data
25985edc 389 transferred can become quite large (libv4l will remove all the 0 padding
b282d873 390 in userspace). */
49809d6a
HG		 391static const struct v4l2_pix_format ov518_vga_mode[] = {
392 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
393 .bytesperline = 320,
b282d873 394 .sizeimage = 320 * 240 * 3,
49809d6a
HG		 395 .colorspace = V4L2_COLORSPACE_JPEG,
396 .priv = 1},
397 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
398 .bytesperline = 640,
b282d873 399 .sizeimage = 640 * 480 * 2,
49809d6a
HG		 400 .colorspace = V4L2_COLORSPACE_JPEG,
401 .priv = 0},
402};
403static const struct v4l2_pix_format ov518_sif_mode[] = {
124cc9c0
HG		 404 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
405 .bytesperline = 160,
b282d873 406 .sizeimage = 70000,
124cc9c0
HG		 407 .colorspace = V4L2_COLORSPACE_JPEG,
408 .priv = 3},
49809d6a
HG		 409 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
410 .bytesperline = 176,
b282d873 411 .sizeimage = 70000,
49809d6a
HG		 412 .colorspace = V4L2_COLORSPACE_JPEG,
413 .priv = 1},
124cc9c0
HG		 414 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
415 .bytesperline = 320,
b282d873 416 .sizeimage = 320 * 240 * 3,
124cc9c0
HG		 417 .colorspace = V4L2_COLORSPACE_JPEG,
418 .priv = 2},
49809d6a
HG		 419 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
420 .bytesperline = 352,
b282d873 421 .sizeimage = 352 * 288 * 3,
49809d6a
HG		 422 .colorspace = V4L2_COLORSPACE_JPEG,
423 .priv = 0},
424};
425
1876bb92
HG		 426static const struct v4l2_pix_format ov511_vga_mode[] = {
427 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
428 .bytesperline = 320,
429 .sizeimage = 320 * 240 * 3,
430 .colorspace = V4L2_COLORSPACE_JPEG,
431 .priv = 1},
432 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
433 .bytesperline = 640,
434 .sizeimage = 640 * 480 * 2,
435 .colorspace = V4L2_COLORSPACE_JPEG,
436 .priv = 0},
437};
438static const struct v4l2_pix_format ov511_sif_mode[] = {
439 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
440 .bytesperline = 160,
b282d873 441 .sizeimage = 70000,
1876bb92
HG		 442 .colorspace = V4L2_COLORSPACE_JPEG,
443 .priv = 3},
444 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
445 .bytesperline = 176,
b282d873 446 .sizeimage = 70000,
1876bb92
HG		 447 .colorspace = V4L2_COLORSPACE_JPEG,
448 .priv = 1},
449 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
450 .bytesperline = 320,
451 .sizeimage = 320 * 240 * 3,
452 .colorspace = V4L2_COLORSPACE_JPEG,
453 .priv = 2},
454 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
455 .bytesperline = 352,
456 .sizeimage = 352 * 288 * 3,
457 .colorspace = V4L2_COLORSPACE_JPEG,
458 .priv = 0},
459};
49809d6a 460
635118d5
HG		 461static const struct v4l2_pix_format ovfx2_vga_mode[] = {
462 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
463 .bytesperline = 320,
464 .sizeimage = 320 * 240,
465 .colorspace = V4L2_COLORSPACE_SRGB,
466 .priv = 1},
467 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
468 .bytesperline = 640,
469 .sizeimage = 640 * 480,
470 .colorspace = V4L2_COLORSPACE_SRGB,
471 .priv = 0},
472};
473static const struct v4l2_pix_format ovfx2_cif_mode[] = {
474 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
475 .bytesperline = 160,
476 .sizeimage = 160 * 120,
477 .colorspace = V4L2_COLORSPACE_SRGB,
478 .priv = 3},
479 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
480 .bytesperline = 176,
481 .sizeimage = 176 * 144,
482 .colorspace = V4L2_COLORSPACE_SRGB,
483 .priv = 1},
484 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
485 .bytesperline = 320,
486 .sizeimage = 320 * 240,
487 .colorspace = V4L2_COLORSPACE_SRGB,
488 .priv = 2},
489 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
490 .bytesperline = 352,
491 .sizeimage = 352 * 288,
492 .colorspace = V4L2_COLORSPACE_SRGB,
493 .priv = 0},
494};
495static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
c42cedbb
JFM		 496 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
497 .bytesperline = 800,
498 .sizeimage = 800 * 600,
499 .colorspace = V4L2_COLORSPACE_SRGB,
500 .priv = 1},
635118d5
HG		 501 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
502 .bytesperline = 1600,
503 .sizeimage = 1600 * 1200,
504 .colorspace = V4L2_COLORSPACE_SRGB},
505};
506static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
635118d5
HG		 507 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
508 .bytesperline = 640,
509 .sizeimage = 640 * 480,
b46aaa02
HG		 510 .colorspace = V4L2_COLORSPACE_SRGB,
511 .priv = 1},
512 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
513 .bytesperline = 800,
514 .sizeimage = 800 * 600,
515 .colorspace = V4L2_COLORSPACE_SRGB,
516 .priv = 1},
517 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
518 .bytesperline = 1024,
519 .sizeimage = 1024 * 768,
520 .colorspace = V4L2_COLORSPACE_SRGB,
521 .priv = 1},
522 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
523 .bytesperline = 1600,
524 .sizeimage = 1600 * 1200,
525 .colorspace = V4L2_COLORSPACE_SRGB,
526 .priv = 0},
527 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
528 .bytesperline = 2048,
529 .sizeimage = 2048 * 1536,
530 .colorspace = V4L2_COLORSPACE_SRGB,
531 .priv = 0},
635118d5 532};
798ae150
JFM		 533static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
534 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
535 .bytesperline = 640,
536 .sizeimage = 640 * 480,
537 .colorspace = V4L2_COLORSPACE_SRGB,
538 .priv = 1},
539 {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
540 .bytesperline = 1280,
541 .sizeimage = 1280 * 1024,
542 .colorspace = V4L2_COLORSPACE_SRGB},
543};
635118d5 544
49809d6a 545/* Registers common to OV511 / OV518 */
1876bb92 546#define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
780e3121 547#define R51x_SYS_RESET 0x50
1876bb92
HG		 548 /* Reset type flags */
549 #define OV511_RESET_OMNICE 0x08
780e3121 550#define R51x_SYS_INIT 0x53
49809d6a 551#define R51x_SYS_SNAP 0x52
87bae740 552#define R51x_SYS_CUST_ID 0x5f
49809d6a
HG		 553#define R51x_COMP_LUT_BEGIN 0x80
554
555/* OV511 Camera interface register numbers */
1876bb92
HG		 556#define R511_CAM_DELAY 0x10
557#define R511_CAM_EDGE 0x11
558#define R511_CAM_PXCNT 0x12
559#define R511_CAM_LNCNT 0x13
560#define R511_CAM_PXDIV 0x14
561#define R511_CAM_LNDIV 0x15
562#define R511_CAM_UV_EN 0x16
563#define R511_CAM_LINE_MODE 0x17
564#define R511_CAM_OPTS 0x18
565
566#define R511_SNAP_FRAME 0x19
87bae740
JFM		 567#define R511_SNAP_PXCNT 0x1a
568#define R511_SNAP_LNCNT 0x1b
569#define R511_SNAP_PXDIV 0x1c
570#define R511_SNAP_LNDIV 0x1d
571#define R511_SNAP_UV_EN 0x1e
87bae740 572#define R511_SNAP_OPTS 0x1f
1876bb92
HG		 573
574#define R511_DRAM_FLOW_CTL 0x20
575#define R511_FIFO_OPTS 0x31
576#define R511_I2C_CTL 0x40
49809d6a 577#define R511_SYS_LED_CTL 0x55 /* OV511+ only */
1876bb92
HG		 578#define R511_COMP_EN 0x78
579#define R511_COMP_LUT_EN 0x79
49809d6a
HG		 580
581/* OV518 Camera interface register numbers */
582#define R518_GPIO_OUT 0x56 /* OV518(+) only */
583#define R518_GPIO_CTL 0x57 /* OV518(+) only */
584
6a7eba24 585/* OV519 Camera interface register numbers */
ac40b1fa
JFM		 586#define OV519_R10_H_SIZE 0x10
587#define OV519_R11_V_SIZE 0x11
588#define OV519_R12_X_OFFSETL 0x12
589#define OV519_R13_X_OFFSETH 0x13
590#define OV519_R14_Y_OFFSETL 0x14
591#define OV519_R15_Y_OFFSETH 0x15
592#define OV519_R16_DIVIDER 0x16
593#define OV519_R20_DFR 0x20
594#define OV519_R25_FORMAT 0x25
6a7eba24
JFM		 595
596/* OV519 System Controller register numbers */
21867803
JFM		 597#define OV519_R51_RESET1 0x51
598#define OV519_R54_EN_CLK1 0x54
b4e96ea3 599#define OV519_R57_SNAPSHOT 0x57
6a7eba24
JFM		 600
601#define OV519_GPIO_DATA_OUT0 0x71
602#define OV519_GPIO_IO_CTRL0 0x72
603
87bae740 604/*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
6a7eba24 605
b46aaa02
HG		 606/*
607 * The FX2 chip does not give us a zero length read at end of frame.
608 * It does, however, give a short read at the end of a frame, if
3ad2f3fb 609 * necessary, rather than run two frames together.
b46aaa02
HG		 610 *
611 * By choosing the right bulk transfer size, we are guaranteed to always
612 * get a short read for the last read of each frame. Frame sizes are
613 * always a composite number (width * height, or a multiple) so if we
614 * choose a prime number, we are guaranteed that the last read of a
615 * frame will be short.
616 *
617 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
618 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
619 * to figure out why. [PMiller]
620 *
621 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
622 *
623 * It isn't enough to know the number of bytes per frame, in case we
624 * have data dropouts or buffer overruns (even though the FX2 double
625 * buffers, there are some pretty strict real time constraints for
626 * isochronous transfer for larger frame sizes).
627 */
9cf208e8 628/*jfm: this value does not work for 800x600 - see isoc_init */
b46aaa02
HG		 629#define OVFX2_BULK_SIZE (13 * 4096)
630
6a7eba24
JFM		 631/* I2C registers */
632#define R51x_I2C_W_SID 0x41
633#define R51x_I2C_SADDR_3 0x42
634#define R51x_I2C_SADDR_2 0x43
635#define R51x_I2C_R_SID 0x44
636#define R51x_I2C_DATA 0x45
637#define R518_I2C_CTL 0x47 /* OV518(+) only */
b46aaa02 638#define OVFX2_I2C_ADDR 0x00
6a7eba24
JFM		 639
640/* I2C ADDRESSES */
641#define OV7xx0_SID 0x42
229bb7dc 642#define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
6a7eba24
JFM		 643#define OV8xx0_SID 0xa0
644#define OV6xx0_SID 0xc0
645
646/* OV7610 registers */
647#define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
49809d6a
HG		 648#define OV7610_REG_BLUE 0x01 /* blue channel balance */
649#define OV7610_REG_RED 0x02 /* red channel balance */
6a7eba24
JFM		 650#define OV7610_REG_SAT 0x03 /* saturation */
651#define OV8610_REG_HUE 0x04 /* 04 reserved */
652#define OV7610_REG_CNT 0x05 /* Y contrast */
653#define OV7610_REG_BRT 0x06 /* Y brightness */
654#define OV7610_REG_COM_C 0x14 /* misc common regs */
655#define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
656#define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
657#define OV7610_REG_COM_I 0x29 /* misc settings */
658
42e142f6 659/* OV7660 and OV7670 registers */
21867803
JFM		 660#define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
661#define OV7670_R01_BLUE 0x01 /* blue gain */
662#define OV7670_R02_RED 0x02 /* red gain */
663#define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
664#define OV7670_R04_COM1 0x04 /* Control 1 */
665/*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
666#define OV7670_R0C_COM3 0x0c /* Control 3 */
667#define OV7670_R0D_COM4 0x0d /* Control 4 */
668#define OV7670_R0E_COM5 0x0e /* All "reserved" */
669#define OV7670_R0F_COM6 0x0f /* Control 6 */
670#define OV7670_R10_AECH 0x10 /* More bits of AEC value */
671#define OV7670_R11_CLKRC 0x11 /* Clock control */
672#define OV7670_R12_COM7 0x12 /* Control 7 */
87bae740
JFM		 673#define OV7670_COM7_FMT_VGA 0x00
674/*#define OV7670_COM7_YUV 0x00 * YUV */
675#define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
676#define OV7670_COM7_FMT_MASK 0x38
677#define OV7670_COM7_RESET 0x80 /* Register reset */
21867803 678#define OV7670_R13_COM8 0x13 /* Control 8 */
87bae740
JFM		 679#define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
680#define OV7670_COM8_AWB 0x02 /* White balance enable */
681#define OV7670_COM8_AGC 0x04 /* Auto gain enable */
682#define OV7670_COM8_BFILT 0x20 /* Band filter enable */
683#define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
684#define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
21867803
JFM		 685#define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
686#define OV7670_R15_COM10 0x15 /* Control 10 */
687#define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
688#define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
689#define OV7670_R19_VSTART 0x19 /* Vert start high bits */
690#define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
691#define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
87bae740
JFM		 692#define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
693#define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
21867803
JFM		 694#define OV7670_R24_AEW 0x24 /* AGC upper limit */
695#define OV7670_R25_AEB 0x25 /* AGC lower limit */
696#define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
697#define OV7670_R32_HREF 0x32 /* HREF pieces */
698#define OV7670_R3A_TSLB 0x3a /* lots of stuff */
699#define OV7670_R3B_COM11 0x3b /* Control 11 */
87bae740
JFM		 700#define OV7670_COM11_EXP 0x02
701#define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
21867803
JFM		 702#define OV7670_R3C_COM12 0x3c /* Control 12 */
703#define OV7670_R3D_COM13 0x3d /* Control 13 */
87bae740
JFM		 704#define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
705#define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
21867803
JFM		 706#define OV7670_R3E_COM14 0x3e /* Control 14 */
707#define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
708#define OV7670_R40_COM15 0x40 /* Control 15 */
87bae740 709/*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
21867803 710#define OV7670_R41_COM16 0x41 /* Control 16 */
87bae740 711#define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
42e142f6 712/* end of ov7660 common registers */
21867803
JFM		 713#define OV7670_R55_BRIGHT 0x55 /* Brightness */
714#define OV7670_R56_CONTRAS 0x56 /* Contrast control */
715#define OV7670_R69_GFIX 0x69 /* Fix gain control */
716/*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
717#define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
718#define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
719#define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
720#define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
721#define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
722#define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
723#define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
724#define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
725#define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
6a7eba24 726
4202f71c 727struct ov_regvals {
9d1593a8
JFM		 728 u8 reg;
729 u8 val;
4202f71c
JFM		 730};
731struct ov_i2c_regvals {
9d1593a8
JFM		 732 u8 reg;
733 u8 val;
4202f71c
JFM		 734};
735
635118d5 736/* Settings for OV2610 camera chip */
780e3121 737static const struct ov_i2c_regvals norm_2610[] = {
b46aaa02 738 { 0x12, 0x80 }, /* reset */
635118d5
HG		 739};
740
07c6c9c6
JFM		 741static const struct ov_i2c_regvals norm_2610ae[] = {
742 {0x12, 0x80}, /* reset */
743 {0x13, 0xcd},
744 {0x09, 0x01},
745 {0x0d, 0x00},
746 {0x11, 0x80},
747 {0x12, 0x20}, /* 1600x1200 */
748 {0x33, 0x0c},
749 {0x35, 0x90},
750 {0x36, 0x37},
751/* ms-win traces */
752 {0x11, 0x83}, /* clock / 3 ? */
753 {0x2d, 0x00}, /* 60 Hz filter */
754 {0x24, 0xb0}, /* normal colors */
755 {0x25, 0x90},
756 {0x10, 0x43},
757};
758
780e3121 759static const struct ov_i2c_regvals norm_3620b[] = {
635118d5
HG		 760 /*
761 * From the datasheet: "Note that after writing to register COMH
762 * (0x12) to change the sensor mode, registers related to the
763 * sensor’s cropping window will be reset back to their default
764 * values."
765 *
766 * "wait 4096 external clock ... to make sure the sensor is
767 * stable and ready to access registers" i.e. 160us at 24MHz
768 */
635118d5
HG		 769 { 0x12, 0x80 }, /* COMH reset */
770 { 0x12, 0x00 }, /* QXGA, master */
771
772 /*
773 * 11 CLKRC "Clock Rate Control"
774 * [7] internal frequency doublers: on
775 * [6] video port mode: master
776 * [5:0] clock divider: 1
777 */
778 { 0x11, 0x80 },
779
780 /*
781 * 13 COMI "Common Control I"
782 * = 192 (0xC0) 11000000
783 * COMI[7] "AEC speed selection"
784 * = 1 (0x01) 1....... "Faster AEC correction"
785 * COMI[6] "AEC speed step selection"
786 * = 1 (0x01) .1...... "Big steps, fast"
787 * COMI[5] "Banding filter on off"
788 * = 0 (0x00) ..0..... "Off"
789 * COMI[4] "Banding filter option"
790 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
791 * the PLL is ON"
792 * COMI[3] "Reserved"
793 * = 0 (0x00) ....0...
794 * COMI[2] "AGC auto manual control selection"
795 * = 0 (0x00) .....0.. "Manual"
796 * COMI[1] "AWB auto manual control selection"
797 * = 0 (0x00) ......0. "Manual"
798 * COMI[0] "Exposure control"
799 * = 0 (0x00) .......0 "Manual"
800 */
87bae740 801 { 0x13, 0xc0 },
635118d5
HG		 802
803 /*
804 * 09 COMC "Common Control C"
805 * = 8 (0x08) 00001000
806 * COMC[7:5] "Reserved"
807 * = 0 (0x00) 000.....
808 * COMC[4] "Sleep Mode Enable"
809 * = 0 (0x00) ...0.... "Normal mode"
810 * COMC[3:2] "Sensor sampling reset timing selection"
811 * = 2 (0x02) ....10.. "Longer reset time"
812 * COMC[1:0] "Output drive current select"
813 * = 0 (0x00) ......00 "Weakest"
814 */
815 { 0x09, 0x08 },
816
817 /*
818 * 0C COMD "Common Control D"
819 * = 8 (0x08) 00001000
820 * COMD[7] "Reserved"
821 * = 0 (0x00) 0.......
822 * COMD[6] "Swap MSB and LSB at the output port"
823 * = 0 (0x00) .0...... "False"
824 * COMD[5:3] "Reserved"
825 * = 1 (0x01) ..001...
826 * COMD[2] "Output Average On Off"
827 * = 0 (0x00) .....0.. "Output Normal"
828 * COMD[1] "Sensor precharge voltage selection"
829 * = 0 (0x00) ......0. "Selects internal
830 * reference precharge
831 * voltage"
832 * COMD[0] "Snapshot option"
833 * = 0 (0x00) .......0 "Enable live video output
834 * after snapshot sequence"
835 */
836 { 0x0c, 0x08 },
837
838 /*
839 * 0D COME "Common Control E"
840 * = 161 (0xA1) 10100001
841 * COME[7] "Output average option"
842 * = 1 (0x01) 1....... "Output average of 4 pixels"
843 * COME[6] "Anti-blooming control"
844 * = 0 (0x00) .0...... "Off"
845 * COME[5:3] "Reserved"
846 * = 4 (0x04) ..100...
847 * COME[2] "Clock output power down pin status"
848 * = 0 (0x00) .....0.. "Tri-state data output pin
849 * on power down"
850 * COME[1] "Data output pin status selection at power down"
851 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
852 * HREF, and CHSYNC pins on
853 * power down"
854 * COME[0] "Auto zero circuit select"
855 * = 1 (0x01) .......1 "On"
856 */
87bae740 857 { 0x0d, 0xa1 },
635118d5
HG		 858
859 /*
860 * 0E COMF "Common Control F"
861 * = 112 (0x70) 01110000
862 * COMF[7] "System clock selection"
863 * = 0 (0x00) 0....... "Use 24 MHz system clock"
864 * COMF[6:4] "Reserved"
865 * = 7 (0x07) .111....
866 * COMF[3] "Manual auto negative offset canceling selection"
867 * = 0 (0x00) ....0... "Auto detect negative
868 * offset and cancel it"
869 * COMF[2:0] "Reserved"
870 * = 0 (0x00) .....000
871 */
872 { 0x0e, 0x70 },
873
874 /*
875 * 0F COMG "Common Control G"
876 * = 66 (0x42) 01000010
877 * COMG[7] "Optical black output selection"
878 * = 0 (0x00) 0....... "Disable"
879 * COMG[6] "Black level calibrate selection"
880 * = 1 (0x01) .1...... "Use optical black pixels
881 * to calibrate"
882 * COMG[5:4] "Reserved"
883 * = 0 (0x00) ..00....
884 * COMG[3] "Channel offset adjustment"
885 * = 0 (0x00) ....0... "Disable offset adjustment"
886 * COMG[2] "ADC black level calibration option"
887 * = 0 (0x00) .....0.. "Use B/G line and G/R
888 * line to calibrate each
889 * channel's black level"
890 * COMG[1] "Reserved"
891 * = 1 (0x01) ......1.
892 * COMG[0] "ADC black level calibration enable"
893 * = 0 (0x00) .......0 "Disable"
894 */
895 { 0x0f, 0x42 },
896
897 /*
898 * 14 COMJ "Common Control J"
899 * = 198 (0xC6) 11000110
900 * COMJ[7:6] "AGC gain ceiling"
901 * = 3 (0x03) 11...... "8x"
902 * COMJ[5:4] "Reserved"
903 * = 0 (0x00) ..00....
904 * COMJ[3] "Auto banding filter"
905 * = 0 (0x00) ....0... "Banding filter is always
906 * on off depending on
907 * COMI[5] setting"
908 * COMJ[2] "VSYNC drop option"
909 * = 1 (0x01) .....1.. "SYNC is dropped if frame
910 * data is dropped"
911 * COMJ[1] "Frame data drop"
912 * = 1 (0x01) ......1. "Drop frame data if
913 * exposure is not within
914 * tolerance. In AEC mode,
915 * data is normally dropped
916 * when data is out of
917 * range."
918 * COMJ[0] "Reserved"
919 * = 0 (0x00) .......0
920 */
87bae740 921 { 0x14, 0xc6 },
635118d5
HG		 922
923 /*
924 * 15 COMK "Common Control K"
925 * = 2 (0x02) 00000010
926 * COMK[7] "CHSYNC pin output swap"
927 * = 0 (0x00) 0....... "CHSYNC"
928 * COMK[6] "HREF pin output swap"
929 * = 0 (0x00) .0...... "HREF"
930 * COMK[5] "PCLK output selection"
931 * = 0 (0x00) ..0..... "PCLK always output"
932 * COMK[4] "PCLK edge selection"
933 * = 0 (0x00) ...0.... "Data valid on falling edge"
934 * COMK[3] "HREF output polarity"
935 * = 0 (0x00) ....0... "positive"
936 * COMK[2] "Reserved"
937 * = 0 (0x00) .....0..
938 * COMK[1] "VSYNC polarity"
939 * = 1 (0x01) ......1. "negative"
940 * COMK[0] "HSYNC polarity"
941 * = 0 (0x00) .......0 "positive"
942 */
943 { 0x15, 0x02 },
944
945 /*
946 * 33 CHLF "Current Control"
947 * = 9 (0x09) 00001001
948 * CHLF[7:6] "Sensor current control"
949 * = 0 (0x00) 00......
950 * CHLF[5] "Sensor current range control"
951 * = 0 (0x00) ..0..... "normal range"
952 * CHLF[4] "Sensor current"
953 * = 0 (0x00) ...0.... "normal current"
954 * CHLF[3] "Sensor buffer current control"
955 * = 1 (0x01) ....1... "half current"
956 * CHLF[2] "Column buffer current control"
957 * = 0 (0x00) .....0.. "normal current"
958 * CHLF[1] "Analog DSP current control"
959 * = 0 (0x00) ......0. "normal current"
960 * CHLF[1] "ADC current control"
961 * = 0 (0x00) ......0. "normal current"
962 */
963 { 0x33, 0x09 },
964
965 /*
966 * 34 VBLM "Blooming Control"
967 * = 80 (0x50) 01010000
968 * VBLM[7] "Hard soft reset switch"
969 * = 0 (0x00) 0....... "Hard reset"
970 * VBLM[6:4] "Blooming voltage selection"
971 * = 5 (0x05) .101....
972 * VBLM[3:0] "Sensor current control"
973 * = 0 (0x00) ....0000
974 */
975 { 0x34, 0x50 },
976
977 /*
978 * 36 VCHG "Sensor Precharge Voltage Control"
979 * = 0 (0x00) 00000000
980 * VCHG[7] "Reserved"
981 * = 0 (0x00) 0.......
982 * VCHG[6:4] "Sensor precharge voltage control"
983 * = 0 (0x00) .000....
984 * VCHG[3:0] "Sensor array common reference"
985 * = 0 (0x00) ....0000
986 */
987 { 0x36, 0x00 },
988
989 /*
990 * 37 ADC "ADC Reference Control"
991 * = 4 (0x04) 00000100
992 * ADC[7:4] "Reserved"
993 * = 0 (0x00) 0000....
994 * ADC[3] "ADC input signal range"
995 * = 0 (0x00) ....0... "Input signal 1.0x"
996 * ADC[2:0] "ADC range control"
997 * = 4 (0x04) .....100
998 */
999 { 0x37, 0x04 },
1000
1001 /*
1002 * 38 ACOM "Analog Common Ground"
1003 * = 82 (0x52) 01010010
1004 * ACOM[7] "Analog gain control"
1005 * = 0 (0x00) 0....... "Gain 1x"
1006 * ACOM[6] "Analog black level calibration"
1007 * = 1 (0x01) .1...... "On"
1008 * ACOM[5:0] "Reserved"
1009 * = 18 (0x12) ..010010
1010 */
1011 { 0x38, 0x52 },
1012
1013 /*
1014 * 3A FREFA "Internal Reference Adjustment"
1015 * = 0 (0x00) 00000000
1016 * FREFA[7:0] "Range"
1017 * = 0 (0x00) 00000000
1018 */
1019 { 0x3a, 0x00 },
1020
1021 /*
1022 * 3C FVOPT "Internal Reference Adjustment"
1023 * = 31 (0x1F) 00011111
1024 * FVOPT[7:0] "Range"
1025 * = 31 (0x1F) 00011111
1026 */
87bae740 1027 { 0x3c, 0x1f },
635118d5
HG		 1028
1029 /*
1030 * 44 Undocumented = 0 (0x00) 00000000
1031 * 44[7:0] "It's a secret"
1032 * = 0 (0x00) 00000000
1033 */
1034 { 0x44, 0x00 },
1035
1036 /*
1037 * 40 Undocumented = 0 (0x00) 00000000
1038 * 40[7:0] "It's a secret"
1039 * = 0 (0x00) 00000000
1040 */
1041 { 0x40, 0x00 },
1042
1043 /*
1044 * 41 Undocumented = 0 (0x00) 00000000
1045 * 41[7:0] "It's a secret"
1046 * = 0 (0x00) 00000000
1047 */
1048 { 0x41, 0x00 },
1049
1050 /*
1051 * 42 Undocumented = 0 (0x00) 00000000
1052 * 42[7:0] "It's a secret"
1053 * = 0 (0x00) 00000000
1054 */
1055 { 0x42, 0x00 },
1056
1057 /*
1058 * 43 Undocumented = 0 (0x00) 00000000
1059 * 43[7:0] "It's a secret"
1060 * = 0 (0x00) 00000000
1061 */
1062 { 0x43, 0x00 },
1063
1064 /*
1065 * 45 Undocumented = 128 (0x80) 10000000
1066 * 45[7:0] "It's a secret"
1067 * = 128 (0x80) 10000000
1068 */
1069 { 0x45, 0x80 },
1070
1071 /*
1072 * 48 Undocumented = 192 (0xC0) 11000000
1073 * 48[7:0] "It's a secret"
1074 * = 192 (0xC0) 11000000
1075 */
87bae740 1076 { 0x48, 0xc0 },
635118d5
HG		 1077
1078 /*
1079 * 49 Undocumented = 25 (0x19) 00011001
1080 * 49[7:0] "It's a secret"
1081 * = 25 (0x19) 00011001
1082 */
1083 { 0x49, 0x19 },
1084
1085 /*
1086 * 4B Undocumented = 128 (0x80) 10000000
1087 * 4B[7:0] "It's a secret"
1088 * = 128 (0x80) 10000000
1089 */
87bae740 1090 { 0x4b, 0x80 },
635118d5
HG		 1091
1092 /*
1093 * 4D Undocumented = 196 (0xC4) 11000100
1094 * 4D[7:0] "It's a secret"
1095 * = 196 (0xC4) 11000100
1096 */
87bae740 1097 { 0x4d, 0xc4 },
635118d5
HG		 1098
1099 /*
1100 * 35 VREF "Reference Voltage Control"
87bae740 1101 * = 76 (0x4c) 01001100
635118d5
HG		 1102 * VREF[7:5] "Column high reference control"
1103 * = 2 (0x02) 010..... "higher voltage"
1104 * VREF[4:2] "Column low reference control"
1105 * = 3 (0x03) ...011.. "Highest voltage"
1106 * VREF[1:0] "Reserved"
1107 * = 0 (0x00) ......00
1108 */
87bae740 1109 { 0x35, 0x4c },
635118d5
HG		 1110
1111 /*
1112 * 3D Undocumented = 0 (0x00) 00000000
1113 * 3D[7:0] "It's a secret"
1114 * = 0 (0x00) 00000000
1115 */
87bae740 1116 { 0x3d, 0x00 },
635118d5
HG		 1117
1118 /*
1119 * 3E Undocumented = 0 (0x00) 00000000
1120 * 3E[7:0] "It's a secret"
1121 * = 0 (0x00) 00000000
1122 */
87bae740 1123 { 0x3e, 0x00 },
635118d5
HG		 1124
1125 /*
1126 * 3B FREFB "Internal Reference Adjustment"
1127 * = 24 (0x18) 00011000
1128 * FREFB[7:0] "Range"
1129 * = 24 (0x18) 00011000
1130 */
1131 { 0x3b, 0x18 },
1132
1133 /*
1134 * 33 CHLF "Current Control"
1135 * = 25 (0x19) 00011001
1136 * CHLF[7:6] "Sensor current control"
1137 * = 0 (0x00) 00......
1138 * CHLF[5] "Sensor current range control"
1139 * = 0 (0x00) ..0..... "normal range"
1140 * CHLF[4] "Sensor current"
1141 * = 1 (0x01) ...1.... "double current"
1142 * CHLF[3] "Sensor buffer current control"
1143 * = 1 (0x01) ....1... "half current"
1144 * CHLF[2] "Column buffer current control"
1145 * = 0 (0x00) .....0.. "normal current"
1146 * CHLF[1] "Analog DSP current control"
1147 * = 0 (0x00) ......0. "normal current"
1148 * CHLF[1] "ADC current control"
1149 * = 0 (0x00) ......0. "normal current"
1150 */
1151 { 0x33, 0x19 },
1152
1153 /*
1154 * 34 VBLM "Blooming Control"
1155 * = 90 (0x5A) 01011010
1156 * VBLM[7] "Hard soft reset switch"
1157 * = 0 (0x00) 0....... "Hard reset"
1158 * VBLM[6:4] "Blooming voltage selection"
1159 * = 5 (0x05) .101....
1160 * VBLM[3:0] "Sensor current control"
1161 * = 10 (0x0A) ....1010
1162 */
87bae740 1163 { 0x34, 0x5a },
635118d5
HG		 1164
1165 /*
1166 * 3B FREFB "Internal Reference Adjustment"
1167 * = 0 (0x00) 00000000
1168 * FREFB[7:0] "Range"
1169 * = 0 (0x00) 00000000
1170 */
1171 { 0x3b, 0x00 },
1172
1173 /*
1174 * 33 CHLF "Current Control"
1175 * = 9 (0x09) 00001001
1176 * CHLF[7:6] "Sensor current control"
1177 * = 0 (0x00) 00......
1178 * CHLF[5] "Sensor current range control"
1179 * = 0 (0x00) ..0..... "normal range"
1180 * CHLF[4] "Sensor current"
1181 * = 0 (0x00) ...0.... "normal current"
1182 * CHLF[3] "Sensor buffer current control"
1183 * = 1 (0x01) ....1... "half current"
1184 * CHLF[2] "Column buffer current control"
1185 * = 0 (0x00) .....0.. "normal current"
1186 * CHLF[1] "Analog DSP current control"
1187 * = 0 (0x00) ......0. "normal current"
1188 * CHLF[1] "ADC current control"
1189 * = 0 (0x00) ......0. "normal current"
1190 */
1191 { 0x33, 0x09 },
1192
1193 /*
1194 * 34 VBLM "Blooming Control"
1195 * = 80 (0x50) 01010000
1196 * VBLM[7] "Hard soft reset switch"
1197 * = 0 (0x00) 0....... "Hard reset"
1198 * VBLM[6:4] "Blooming voltage selection"
1199 * = 5 (0x05) .101....
1200 * VBLM[3:0] "Sensor current control"
1201 * = 0 (0x00) ....0000
1202 */
1203 { 0x34, 0x50 },
1204
1205 /*
1206 * 12 COMH "Common Control H"
1207 * = 64 (0x40) 01000000
1208 * COMH[7] "SRST"
1209 * = 0 (0x00) 0....... "No-op"
1210 * COMH[6:4] "Resolution selection"
1211 * = 4 (0x04) .100.... "XGA"
1212 * COMH[3] "Master slave selection"
1213 * = 0 (0x00) ....0... "Master mode"
1214 * COMH[2] "Internal B/R channel option"
1215 * = 0 (0x00) .....0.. "B/R use same channel"
1216 * COMH[1] "Color bar test pattern"
1217 * = 0 (0x00) ......0. "Off"
1218 * COMH[0] "Reserved"
1219 * = 0 (0x00) .......0
1220 */
1221 { 0x12, 0x40 },
1222
1223 /*
1224 * 17 HREFST "Horizontal window start"
1225 * = 31 (0x1F) 00011111
1226 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1227 * = 31 (0x1F) 00011111
1228 */
87bae740 1229 { 0x17, 0x1f },
635118d5
HG		 1230
1231 /*
1232 * 18 HREFEND "Horizontal window end"
1233 * = 95 (0x5F) 01011111
1234 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1235 * = 95 (0x5F) 01011111
1236 */
87bae740 1237 { 0x18, 0x5f },
635118d5
HG		 1238
1239 /*
1240 * 19 VSTRT "Vertical window start"
1241 * = 0 (0x00) 00000000
1242 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1243 * = 0 (0x00) 00000000
1244 */
1245 { 0x19, 0x00 },
1246
1247 /*
1248 * 1A VEND "Vertical window end"
1249 * = 96 (0x60) 01100000
1250 * VEND[7:0] "Vertical Window End, 8 MSBs"
1251 * = 96 (0x60) 01100000
1252 */
1253 { 0x1a, 0x60 },
1254
1255 /*
1256 * 32 COMM "Common Control M"
1257 * = 18 (0x12) 00010010
1258 * COMM[7:6] "Pixel clock divide option"
1259 * = 0 (0x00) 00...... "/1"
1260 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1261 * = 2 (0x02) ..010...
1262 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1263 * = 2 (0x02) .....010
1264 */
1265 { 0x32, 0x12 },
1266
1267 /*
1268 * 03 COMA "Common Control A"
1269 * = 74 (0x4A) 01001010
1270 * COMA[7:4] "AWB Update Threshold"
1271 * = 4 (0x04) 0100....
1272 * COMA[3:2] "Vertical window end line control 2 LSBs"
1273 * = 2 (0x02) ....10..
1274 * COMA[1:0] "Vertical window start line control 2 LSBs"
1275 * = 2 (0x02) ......10
1276 */
87bae740 1277 { 0x03, 0x4a },
635118d5
HG		 1278
1279 /*
1280 * 11 CLKRC "Clock Rate Control"
1281 * = 128 (0x80) 10000000
1282 * CLKRC[7] "Internal frequency doublers on off seclection"
1283 * = 1 (0x01) 1....... "On"
1284 * CLKRC[6] "Digital video master slave selection"
1285 * = 0 (0x00) .0...... "Master mode, sensor
1286 * provides PCLK"
1287 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1288 * = 0 (0x00) ..000000
1289 */
1290 { 0x11, 0x80 },
1291
1292 /*
1293 * 12 COMH "Common Control H"
1294 * = 0 (0x00) 00000000
1295 * COMH[7] "SRST"
1296 * = 0 (0x00) 0....... "No-op"
1297 * COMH[6:4] "Resolution selection"
1298 * = 0 (0x00) .000.... "QXGA"
1299 * COMH[3] "Master slave selection"
1300 * = 0 (0x00) ....0... "Master mode"
1301 * COMH[2] "Internal B/R channel option"
1302 * = 0 (0x00) .....0.. "B/R use same channel"
1303 * COMH[1] "Color bar test pattern"
1304 * = 0 (0x00) ......0. "Off"
1305 * COMH[0] "Reserved"
1306 * = 0 (0x00) .......0
1307 */
1308 { 0x12, 0x00 },
1309
1310 /*
1311 * 12 COMH "Common Control H"
1312 * = 64 (0x40) 01000000
1313 * COMH[7] "SRST"
1314 * = 0 (0x00) 0....... "No-op"
1315 * COMH[6:4] "Resolution selection"
1316 * = 4 (0x04) .100.... "XGA"
1317 * COMH[3] "Master slave selection"
1318 * = 0 (0x00) ....0... "Master mode"
1319 * COMH[2] "Internal B/R channel option"
1320 * = 0 (0x00) .....0.. "B/R use same channel"
1321 * COMH[1] "Color bar test pattern"
1322 * = 0 (0x00) ......0. "Off"
1323 * COMH[0] "Reserved"
1324 * = 0 (0x00) .......0
1325 */
1326 { 0x12, 0x40 },
1327
1328 /*
1329 * 17 HREFST "Horizontal window start"
1330 * = 31 (0x1F) 00011111
1331 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1332 * = 31 (0x1F) 00011111
1333 */
87bae740 1334 { 0x17, 0x1f },
635118d5
HG		 1335
1336 /*
1337 * 18 HREFEND "Horizontal window end"
1338 * = 95 (0x5F) 01011111
1339 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1340 * = 95 (0x5F) 01011111
1341 */
87bae740 1342 { 0x18, 0x5f },
635118d5
HG		 1343
1344 /*
1345 * 19 VSTRT "Vertical window start"
1346 * = 0 (0x00) 00000000
1347 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1348 * = 0 (0x00) 00000000
1349 */
1350 { 0x19, 0x00 },
1351
1352 /*
1353 * 1A VEND "Vertical window end"
1354 * = 96 (0x60) 01100000
1355 * VEND[7:0] "Vertical Window End, 8 MSBs"
1356 * = 96 (0x60) 01100000
1357 */
1358 { 0x1a, 0x60 },
1359
1360 /*
1361 * 32 COMM "Common Control M"
1362 * = 18 (0x12) 00010010
1363 * COMM[7:6] "Pixel clock divide option"
1364 * = 0 (0x00) 00...... "/1"
1365 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1366 * = 2 (0x02) ..010...
1367 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1368 * = 2 (0x02) .....010
1369 */
1370 { 0x32, 0x12 },
1371
1372 /*
1373 * 03 COMA "Common Control A"
1374 * = 74 (0x4A) 01001010
1375 * COMA[7:4] "AWB Update Threshold"
1376 * = 4 (0x04) 0100....
1377 * COMA[3:2] "Vertical window end line control 2 LSBs"
1378 * = 2 (0x02) ....10..
1379 * COMA[1:0] "Vertical window start line control 2 LSBs"
1380 * = 2 (0x02) ......10
1381 */
87bae740 1382 { 0x03, 0x4a },
635118d5
HG		 1383
1384 /*
1385 * 02 RED "Red Gain Control"
1386 * = 175 (0xAF) 10101111
1387 * RED[7] "Action"
1388 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1389 * RED[6:0] "Value"
1390 * = 47 (0x2F) .0101111
1391 */
87bae740 1392 { 0x02, 0xaf },
635118d5
HG		 1393
1394 /*
1395 * 2D ADDVSL "VSYNC Pulse Width"
1396 * = 210 (0xD2) 11010010
1397 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1398 * = 210 (0xD2) 11010010
1399 */
87bae740 1400 { 0x2d, 0xd2 },
635118d5
HG		 1401
1402 /*
1403 * 00 GAIN = 24 (0x18) 00011000
1404 * GAIN[7:6] "Reserved"
1405 * = 0 (0x00) 00......
1406 * GAIN[5] "Double"
1407 * = 0 (0x00) ..0..... "False"
1408 * GAIN[4] "Double"
1409 * = 1 (0x01) ...1.... "True"
1410 * GAIN[3:0] "Range"
1411 * = 8 (0x08) ....1000
1412 */
1413 { 0x00, 0x18 },
1414
1415 /*
1416 * 01 BLUE "Blue Gain Control"
1417 * = 240 (0xF0) 11110000
1418 * BLUE[7] "Action"
1419 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1420 * BLUE[6:0] "Value"
1421 * = 112 (0x70) .1110000
1422 */
87bae740 1423 { 0x01, 0xf0 },
635118d5
HG		 1424
1425 /*
1426 * 10 AEC "Automatic Exposure Control"
1427 * = 10 (0x0A) 00001010
1428 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1429 * = 10 (0x0A) 00001010
1430 */
87bae740
JFM		 1431 { 0x10, 0x0a },
1432
1433 { 0xe1, 0x67 },
1434 { 0xe3, 0x03 },
1435 { 0xe4, 0x26 },
1436 { 0xe5, 0x3e },
1437 { 0xf8, 0x01 },
1438 { 0xff, 0x01 },
635118d5
HG		 1439};
1440
4202f71c
JFM		 1441static const struct ov_i2c_regvals norm_6x20[] = {
1442 { 0x12, 0x80 }, /* reset */
1443 { 0x11, 0x01 },
1444 { 0x03, 0x60 },
1445 { 0x05, 0x7f }, /* For when autoadjust is off */
1446 { 0x07, 0xa8 },
87bae740 1447 /* The ratio of 0x0c and 0x0d controls the white point */
4202f71c
JFM		 1448 { 0x0c, 0x24 },
1449 { 0x0d, 0x24 },
1450 { 0x0f, 0x15 }, /* COMS */
1451 { 0x10, 0x75 }, /* AEC Exposure time */
1452 { 0x12, 0x24 }, /* Enable AGC */
1453 { 0x14, 0x04 },
1454 /* 0x16: 0x06 helps frame stability with moving objects */
1455 { 0x16, 0x06 },
1456/* { 0x20, 0x30 }, * Aperture correction enable */
1457 { 0x26, 0xb2 }, /* BLC enable */
1458 /* 0x28: 0x05 Selects RGB format if RGB on */
1459 { 0x28, 0x05 },
1460 { 0x2a, 0x04 }, /* Disable framerate adjust */
1461/* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
ae49c404 1462 { 0x2d, 0x85 },
4202f71c
JFM		 1463 { 0x33, 0xa0 }, /* Color Processing Parameter */
1464 { 0x34, 0xd2 }, /* Max A/D range */
1465 { 0x38, 0x8b },
1466 { 0x39, 0x40 },
1467
1468 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1469 { 0x3c, 0x3c }, /* Change AEC mode */
1470 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1471
1472 { 0x3d, 0x80 },
1473 /* These next two registers (0x4a, 0x4b) are undocumented.
1474 * They control the color balance */
1475 { 0x4a, 0x80 },
1476 { 0x4b, 0x80 },
1477 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1478 { 0x4e, 0xc1 },
1479 { 0x4f, 0x04 },
1480/* Do 50-53 have any effect? */
1481/* Toggle 0x12[2] off and on here? */
1482};
1483
1484static const struct ov_i2c_regvals norm_6x30[] = {
1485 { 0x12, 0x80 }, /* Reset */
1486 { 0x00, 0x1f }, /* Gain */
1487 { 0x01, 0x99 }, /* Blue gain */
1488 { 0x02, 0x7c }, /* Red gain */
1489 { 0x03, 0xc0 }, /* Saturation */
1490 { 0x05, 0x0a }, /* Contrast */
1491 { 0x06, 0x95 }, /* Brightness */
1492 { 0x07, 0x2d }, /* Sharpness */
1493 { 0x0c, 0x20 },
1494 { 0x0d, 0x20 },
02ab18b0 1495 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
4202f71c
JFM		 1496 { 0x0f, 0x05 },
1497 { 0x10, 0x9a },
1498 { 0x11, 0x00 }, /* Pixel clock = fastest */
1499 { 0x12, 0x24 }, /* Enable AGC and AWB */
1500 { 0x13, 0x21 },
1501 { 0x14, 0x80 },
1502 { 0x15, 0x01 },
1503 { 0x16, 0x03 },
1504 { 0x17, 0x38 },
1505 { 0x18, 0xea },
1506 { 0x19, 0x04 },
1507 { 0x1a, 0x93 },
1508 { 0x1b, 0x00 },
1509 { 0x1e, 0xc4 },
1510 { 0x1f, 0x04 },
1511 { 0x20, 0x20 },
1512 { 0x21, 0x10 },
1513 { 0x22, 0x88 },
1514 { 0x23, 0xc0 }, /* Crystal circuit power level */
1515 { 0x25, 0x9a }, /* Increase AEC black ratio */
1516 { 0x26, 0xb2 }, /* BLC enable */
1517 { 0x27, 0xa2 },
1518 { 0x28, 0x00 },
1519 { 0x29, 0x00 },
1520 { 0x2a, 0x84 }, /* 60 Hz power */
1521 { 0x2b, 0xa8 }, /* 60 Hz power */
1522 { 0x2c, 0xa0 },
1523 { 0x2d, 0x95 }, /* Enable auto-brightness */
1524 { 0x2e, 0x88 },
1525 { 0x33, 0x26 },
1526 { 0x34, 0x03 },
1527 { 0x36, 0x8f },
1528 { 0x37, 0x80 },
1529 { 0x38, 0x83 },
1530 { 0x39, 0x80 },
1531 { 0x3a, 0x0f },
1532 { 0x3b, 0x3c },
1533 { 0x3c, 0x1a },
1534 { 0x3d, 0x80 },
1535 { 0x3e, 0x80 },
1536 { 0x3f, 0x0e },
1537 { 0x40, 0x00 }, /* White bal */
1538 { 0x41, 0x00 }, /* White bal */
1539 { 0x42, 0x80 },
1540 { 0x43, 0x3f }, /* White bal */
1541 { 0x44, 0x80 },
1542 { 0x45, 0x20 },
1543 { 0x46, 0x20 },
1544 { 0x47, 0x80 },
1545 { 0x48, 0x7f },
1546 { 0x49, 0x00 },
1547 { 0x4a, 0x00 },
1548 { 0x4b, 0x80 },
1549 { 0x4c, 0xd0 },
1550 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1551 { 0x4e, 0x40 },
1552 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1553 { 0x50, 0xff },
1554 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1555 { 0x55, 0xff },
1556 { 0x56, 0x12 },
1557 { 0x57, 0x81 },
1558 { 0x58, 0x75 },
1559 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1560 { 0x5a, 0x2c },
1561 { 0x5b, 0x0f }, /* AWB chrominance levels */
1562 { 0x5c, 0x10 },
1563 { 0x3d, 0x80 },
1564 { 0x27, 0xa6 },
1565 { 0x12, 0x20 }, /* Toggle AWB */
1566 { 0x12, 0x24 },
1567};
1568
1569/* Lawrence Glaister <lg@jfm.bc.ca> reports:
1570 *
1571 * Register 0x0f in the 7610 has the following effects:
1572 *
1573 * 0x85 (AEC method 1): Best overall, good contrast range
1574 * 0x45 (AEC method 2): Very overexposed
1575 * 0xa5 (spec sheet default): Ok, but the black level is
1576 * shifted resulting in loss of contrast
1577 * 0x05 (old driver setting): very overexposed, too much
1578 * contrast
1579 */
1580static const struct ov_i2c_regvals norm_7610[] = {
1581 { 0x10, 0xff },
1582 { 0x16, 0x06 },
1583 { 0x28, 0x24 },
1584 { 0x2b, 0xac },
1585 { 0x12, 0x00 },
1586 { 0x38, 0x81 },
1587 { 0x28, 0x24 }, /* 0c */
1588 { 0x0f, 0x85 }, /* lg's setting */
1589 { 0x15, 0x01 },
1590 { 0x20, 0x1c },
1591 { 0x23, 0x2a },
1592 { 0x24, 0x10 },
1593 { 0x25, 0x8a },
1594 { 0x26, 0xa2 },
1595 { 0x27, 0xc2 },
1596 { 0x2a, 0x04 },
1597 { 0x2c, 0xfe },
1598 { 0x2d, 0x93 },
1599 { 0x30, 0x71 },
1600 { 0x31, 0x60 },
1601 { 0x32, 0x26 },
1602 { 0x33, 0x20 },
1603 { 0x34, 0x48 },
1604 { 0x12, 0x24 },
1605 { 0x11, 0x01 },
1606 { 0x0c, 0x24 },
1607 { 0x0d, 0x24 },
1608};
1609
1610static const struct ov_i2c_regvals norm_7620[] = {
a511ba94 1611 { 0x12, 0x80 }, /* reset */
4202f71c
JFM		 1612 { 0x00, 0x00 }, /* gain */
1613 { 0x01, 0x80 }, /* blue gain */
1614 { 0x02, 0x80 }, /* red gain */
21867803 1615 { 0x03, 0xc0 }, /* OV7670_R03_VREF */
4202f71c
JFM		 1616 { 0x06, 0x60 },
1617 { 0x07, 0x00 },
1618 { 0x0c, 0x24 },
1619 { 0x0c, 0x24 },
1620 { 0x0d, 0x24 },
1621 { 0x11, 0x01 },
1622 { 0x12, 0x24 },
1623 { 0x13, 0x01 },
1624 { 0x14, 0x84 },
1625 { 0x15, 0x01 },
1626 { 0x16, 0x03 },
1627 { 0x17, 0x2f },
1628 { 0x18, 0xcf },
1629 { 0x19, 0x06 },
1630 { 0x1a, 0xf5 },
1631 { 0x1b, 0x00 },
1632 { 0x20, 0x18 },
1633 { 0x21, 0x80 },
1634 { 0x22, 0x80 },
1635 { 0x23, 0x00 },
1636 { 0x26, 0xa2 },
1637 { 0x27, 0xea },
b282d873 1638 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
4202f71c
JFM		 1639 { 0x29, 0x00 },
1640 { 0x2a, 0x10 },
1641 { 0x2b, 0x00 },
1642 { 0x2c, 0x88 },
1643 { 0x2d, 0x91 },
1644 { 0x2e, 0x80 },
1645 { 0x2f, 0x44 },
1646 { 0x60, 0x27 },
1647 { 0x61, 0x02 },
1648 { 0x62, 0x5f },
1649 { 0x63, 0xd5 },
1650 { 0x64, 0x57 },
1651 { 0x65, 0x83 },
1652 { 0x66, 0x55 },
1653 { 0x67, 0x92 },
1654 { 0x68, 0xcf },
1655 { 0x69, 0x76 },
1656 { 0x6a, 0x22 },
1657 { 0x6b, 0x00 },
1658 { 0x6c, 0x02 },
1659 { 0x6d, 0x44 },
1660 { 0x6e, 0x80 },
1661 { 0x6f, 0x1d },
1662 { 0x70, 0x8b },
1663 { 0x71, 0x00 },
1664 { 0x72, 0x14 },
1665 { 0x73, 0x54 },
1666 { 0x74, 0x00 },
1667 { 0x75, 0x8e },
1668 { 0x76, 0x00 },
1669 { 0x77, 0xff },
1670 { 0x78, 0x80 },
1671 { 0x79, 0x80 },
1672 { 0x7a, 0x80 },
1673 { 0x7b, 0xe2 },
1674 { 0x7c, 0x00 },
1675};
1676
1677/* 7640 and 7648. The defaults should be OK for most registers. */
1678static const struct ov_i2c_regvals norm_7640[] = {
1679 { 0x12, 0x80 },
1680 { 0x12, 0x14 },
1681};
1682
42e142f6
JFM		 1683static const struct ov_regvals init_519_ov7660[] = {
1684 { 0x5d, 0x03 }, /* Turn off suspend mode */
1685 { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1686 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1687 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1688 { 0xa3, 0x18 },
1689 { 0xa4, 0x04 },
1690 { 0xa5, 0x28 },
1691 { 0x37, 0x00 }, /* SetUsbInit */
1692 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1693 /* Enable both fields, YUV Input, disable defect comp (why?) */
1694 { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1695 { 0x21, 0x38 },
1696 { 0x22, 0x1d },
1697 { 0x17, 0x50 }, /* undocumented */
1698 { 0x37, 0x00 }, /* undocumented */
1699 { 0x40, 0xff }, /* I2C timeout counter */
1700 { 0x46, 0x00 }, /* I2C clock prescaler */
1701};
1702static const struct ov_i2c_regvals norm_7660[] = {
1703 {OV7670_R12_COM7, OV7670_COM7_RESET},
1704 {OV7670_R11_CLKRC, 0x81},
1705 {0x92, 0x00}, /* DM_LNL */
1706 {0x93, 0x00}, /* DM_LNH */
1707 {0x9d, 0x4c}, /* BD50ST */
1708 {0x9e, 0x3f}, /* BD60ST */
1709 {OV7670_R3B_COM11, 0x02},
1710 {OV7670_R13_COM8, 0xf5},
1711 {OV7670_R10_AECH, 0x00},
1712 {OV7670_R00_GAIN, 0x00},
1713 {OV7670_R01_BLUE, 0x7c},
1714 {OV7670_R02_RED, 0x9d},
1715 {OV7670_R12_COM7, 0x00},
1716 {OV7670_R04_COM1, 00},
1717 {OV7670_R18_HSTOP, 0x01},
1718 {OV7670_R17_HSTART, 0x13},
1719 {OV7670_R32_HREF, 0x92},
1720 {OV7670_R19_VSTART, 0x02},
1721 {OV7670_R1A_VSTOP, 0x7a},
1722 {OV7670_R03_VREF, 0x00},
1723 {OV7670_R0E_COM5, 0x04},
1724 {OV7670_R0F_COM6, 0x62},
1725 {OV7670_R15_COM10, 0x00},
1726 {0x16, 0x02}, /* RSVD */
1727 {0x1b, 0x00}, /* PSHFT */
1728 {OV7670_R1E_MVFP, 0x01},
1729 {0x29, 0x3c}, /* RSVD */
1730 {0x33, 0x00}, /* CHLF */
1731 {0x34, 0x07}, /* ARBLM */
1732 {0x35, 0x84}, /* RSVD */
1733 {0x36, 0x00}, /* RSVD */
1734 {0x37, 0x04}, /* ADC */
1735 {0x39, 0x43}, /* OFON */
1736 {OV7670_R3A_TSLB, 0x00},
1737 {OV7670_R3C_COM12, 0x6c},
1738 {OV7670_R3D_COM13, 0x98},
1739 {OV7670_R3F_EDGE, 0x23},
1740 {OV7670_R40_COM15, 0xc1},
1741 {OV7670_R41_COM16, 0x22},
1742 {0x6b, 0x0a}, /* DBLV */
1743 {0xa1, 0x08}, /* RSVD */
1744 {0x69, 0x80}, /* HV */
1745 {0x43, 0xf0}, /* RSVD.. */
1746 {0x44, 0x10},
1747 {0x45, 0x78},
1748 {0x46, 0xa8},
1749 {0x47, 0x60},
1750 {0x48, 0x80},
1751 {0x59, 0xba},
1752 {0x5a, 0x9a},
1753 {0x5b, 0x22},
1754 {0x5c, 0xb9},
1755 {0x5d, 0x9b},
1756 {0x5e, 0x10},
1757 {0x5f, 0xe0},
1758 {0x60, 0x85},
1759 {0x61, 0x60},
1760 {0x9f, 0x9d}, /* RSVD */
1761 {0xa0, 0xa0}, /* DSPC2 */
1762 {0x4f, 0x60}, /* matrix */
1763 {0x50, 0x64},
1764 {0x51, 0x04},
1765 {0x52, 0x18},
1766 {0x53, 0x3c},
1767 {0x54, 0x54},
1768 {0x55, 0x40},
1769 {0x56, 0x40},
1770 {0x57, 0x40},
1771 {0x58, 0x0d}, /* matrix sign */
1772 {0x8b, 0xcc}, /* RSVD */
1773 {0x8c, 0xcc},
1774 {0x8d, 0xcf},
1775 {0x6c, 0x40}, /* gamma curve */
1776 {0x6d, 0xe0},
1777 {0x6e, 0xa0},
1778 {0x6f, 0x80},
1779 {0x70, 0x70},
1780 {0x71, 0x80},
1781 {0x72, 0x60},
1782 {0x73, 0x60},
1783 {0x74, 0x50},
1784 {0x75, 0x40},
1785 {0x76, 0x38},
1786 {0x77, 0x3c},
1787 {0x78, 0x32},
1788 {0x79, 0x1a},
1789 {0x7a, 0x28},
1790 {0x7b, 0x24},
1791 {0x7c, 0x04}, /* gamma curve */
1792 {0x7d, 0x12},
1793 {0x7e, 0x26},
1794 {0x7f, 0x46},
1795 {0x80, 0x54},
1796 {0x81, 0x64},
1797 {0x82, 0x70},
1798 {0x83, 0x7c},
1799 {0x84, 0x86},
1800 {0x85, 0x8e},
1801 {0x86, 0x9c},
1802 {0x87, 0xab},
1803 {0x88, 0xc4},
1804 {0x89, 0xd1},
1805 {0x8a, 0xe5},
1806 {OV7670_R14_COM9, 0x1e},
1807 {OV7670_R24_AEW, 0x80},
1808 {OV7670_R25_AEB, 0x72},
1809 {OV7670_R26_VPT, 0xb3},
1810 {0x62, 0x80}, /* LCC1 */
1811 {0x63, 0x80}, /* LCC2 */
1812 {0x64, 0x06}, /* LCC3 */
1813 {0x65, 0x00}, /* LCC4 */
1814 {0x66, 0x01}, /* LCC5 */
1815 {0x94, 0x0e}, /* RSVD.. */
1816 {0x95, 0x14},
1817 {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1818 | OV7670_COM8_AECSTEP
1819 | OV7670_COM8_BFILT
1820 | 0x10
1821 | OV7670_COM8_AGC
1822 | OV7670_COM8_AWB
1823 | OV7670_COM8_AEC},
1824 {0xa1, 0xc8}
1825};
798ae150
JFM		 1826static const struct ov_i2c_regvals norm_9600[] = {
1827 {0x12, 0x80},
1828 {0x0c, 0x28},
1829 {0x11, 0x80},
1830 {0x13, 0xb5},
1831 {0x14, 0x3e},
1832 {0x1b, 0x04},
1833 {0x24, 0xb0},
1834 {0x25, 0x90},
1835 {0x26, 0x94},
1836 {0x35, 0x90},
1837 {0x37, 0x07},
1838 {0x38, 0x08},
1839 {0x01, 0x8e},
1840 {0x02, 0x85}
1841};
42e142f6 1842
4202f71c
JFM		 1843/* 7670. Defaults taken from OmniVision provided data,
1844* as provided by Jonathan Corbet of OLPC */
1845static const struct ov_i2c_regvals norm_7670[] = {
21867803
JFM		 1846 { OV7670_R12_COM7, OV7670_COM7_RESET },
1847 { OV7670_R3A_TSLB, 0x04 }, /* OV */
1848 { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1849 { OV7670_R11_CLKRC, 0x01 },
4202f71c
JFM		 1850/*
1851 * Set the hardware window. These values from OV don't entirely
1852 * make sense - hstop is less than hstart. But they work...
1853 */
21867803
JFM		 1854 { OV7670_R17_HSTART, 0x13 },
1855 { OV7670_R18_HSTOP, 0x01 },
1856 { OV7670_R32_HREF, 0xb6 },
1857 { OV7670_R19_VSTART, 0x02 },
1858 { OV7670_R1A_VSTOP, 0x7a },
1859 { OV7670_R03_VREF, 0x0a },
1860
1861 { OV7670_R0C_COM3, 0x00 },
1862 { OV7670_R3E_COM14, 0x00 },
4202f71c
JFM		 1863/* Mystery scaling numbers */
1864 { 0x70, 0x3a },
1865 { 0x71, 0x35 },
1866 { 0x72, 0x11 },
1867 { 0x73, 0xf0 },
1868 { 0xa2, 0x02 },
21867803 1869/* { OV7670_R15_COM10, 0x0 }, */
4202f71c
JFM		 1870
1871/* Gamma curve values */
1872 { 0x7a, 0x20 },
1873 { 0x7b, 0x10 },
1874 { 0x7c, 0x1e },
1875 { 0x7d, 0x35 },
1876 { 0x7e, 0x5a },
1877 { 0x7f, 0x69 },
1878 { 0x80, 0x76 },
1879 { 0x81, 0x80 },
1880 { 0x82, 0x88 },
1881 { 0x83, 0x8f },
1882 { 0x84, 0x96 },
1883 { 0x85, 0xa3 },
1884 { 0x86, 0xaf },
1885 { 0x87, 0xc4 },
1886 { 0x88, 0xd7 },
1887 { 0x89, 0xe8 },
1888
1889/* AGC and AEC parameters. Note we start by disabling those features,
1890 then turn them only after tweaking the values. */
21867803 1891 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
4202f71c
JFM		 1892 | OV7670_COM8_AECSTEP
1893 | OV7670_COM8_BFILT },
21867803
JFM		 1894 { OV7670_R00_GAIN, 0x00 },
1895 { OV7670_R10_AECH, 0x00 },
1896 { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1897 { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1898 { OV7670_RA5_BD50MAX, 0x05 },
1899 { OV7670_RAB_BD60MAX, 0x07 },
1900 { OV7670_R24_AEW, 0x95 },
1901 { OV7670_R25_AEB, 0x33 },
1902 { OV7670_R26_VPT, 0xe3 },
1903 { OV7670_R9F_HAECC1, 0x78 },
1904 { OV7670_RA0_HAECC2, 0x68 },
4202f71c 1905 { 0xa1, 0x03 }, /* magic */
21867803
JFM		 1906 { OV7670_RA6_HAECC3, 0xd8 },
1907 { OV7670_RA7_HAECC4, 0xd8 },
1908 { OV7670_RA8_HAECC5, 0xf0 },
1909 { OV7670_RA9_HAECC6, 0x90 },
1910 { OV7670_RAA_HAECC7, 0x94 },
1911 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
4202f71c
JFM		 1912 | OV7670_COM8_AECSTEP
1913 | OV7670_COM8_BFILT
1914 | OV7670_COM8_AGC
1915 | OV7670_COM8_AEC },
1916
1917/* Almost all of these are magic "reserved" values. */
21867803
JFM		 1918 { OV7670_R0E_COM5, 0x61 },
1919 { OV7670_R0F_COM6, 0x4b },
4202f71c 1920 { 0x16, 0x02 },
21867803 1921 { OV7670_R1E_MVFP, 0x07 },
4202f71c
JFM		 1922 { 0x21, 0x02 },
1923 { 0x22, 0x91 },
1924 { 0x29, 0x07 },
1925 { 0x33, 0x0b },
1926 { 0x35, 0x0b },
1927 { 0x37, 0x1d },
1928 { 0x38, 0x71 },
1929 { 0x39, 0x2a },
21867803 1930 { OV7670_R3C_COM12, 0x78 },
4202f71c
JFM		 1931 { 0x4d, 0x40 },
1932 { 0x4e, 0x20 },
21867803 1933 { OV7670_R69_GFIX, 0x00 },
4202f71c
JFM		 1934 { 0x6b, 0x4a },
1935 { 0x74, 0x10 },
1936 { 0x8d, 0x4f },
ac40b1fa
JFM		 1937 { 0x8e, 0x00 },
1938 { 0x8f, 0x00 },
1939 { 0x90, 0x00 },
1940 { 0x91, 0x00 },
1941 { 0x96, 0x00 },
1942 { 0x9a, 0x00 },
4202f71c
JFM		 1943 { 0xb0, 0x84 },
1944 { 0xb1, 0x0c },
1945 { 0xb2, 0x0e },
1946 { 0xb3, 0x82 },
1947 { 0xb8, 0x0a },
1948
1949/* More reserved magic, some of which tweaks white balance */
1950 { 0x43, 0x0a },
1951 { 0x44, 0xf0 },
1952 { 0x45, 0x34 },
1953 { 0x46, 0x58 },
1954 { 0x47, 0x28 },
1955 { 0x48, 0x3a },
1956 { 0x59, 0x88 },
1957 { 0x5a, 0x88 },
1958 { 0x5b, 0x44 },
1959 { 0x5c, 0x67 },
1960 { 0x5d, 0x49 },
1961 { 0x5e, 0x0e },
1962 { 0x6c, 0x0a },
1963 { 0x6d, 0x55 },
1964 { 0x6e, 0x11 },
fc63de88 1965 { 0x6f, 0x9f }, /* "9e for advance AWB" */
4202f71c 1966 { 0x6a, 0x40 },
21867803
JFM		 1967 { OV7670_R01_BLUE, 0x40 },
1968 { OV7670_R02_RED, 0x60 },
1969 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
4202f71c
JFM		 1970 | OV7670_COM8_AECSTEP
1971 | OV7670_COM8_BFILT
1972 | OV7670_COM8_AGC
1973 | OV7670_COM8_AEC
1974 | OV7670_COM8_AWB },
1975
1976/* Matrix coefficients */
1977 { 0x4f, 0x80 },
1978 { 0x50, 0x80 },
ac40b1fa 1979 { 0x51, 0x00 },
4202f71c
JFM		 1980 { 0x52, 0x22 },
1981 { 0x53, 0x5e },
1982 { 0x54, 0x80 },
1983 { 0x58, 0x9e },
1984
21867803
JFM		 1985 { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1986 { OV7670_R3F_EDGE, 0x00 },
4202f71c
JFM		 1987 { 0x75, 0x05 },
1988 { 0x76, 0xe1 },
ac40b1fa 1989 { 0x4c, 0x00 },
4202f71c 1990 { 0x77, 0x01 },
21867803 1991 { OV7670_R3D_COM13, OV7670_COM13_GAMMA
4202f71c
JFM		 1992 | OV7670_COM13_UVSAT
1993 | 2}, /* was 3 */
1994 { 0x4b, 0x09 },
1995 { 0xc9, 0x60 },
21867803 1996 { OV7670_R41_COM16, 0x38 },
4202f71c
JFM		 1997 { 0x56, 0x40 },
1998
1999 { 0x34, 0x11 },
21867803 2000 { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
4202f71c 2001 { 0xa4, 0x88 },
ac40b1fa 2002 { 0x96, 0x00 },
4202f71c
JFM		 2003 { 0x97, 0x30 },
2004 { 0x98, 0x20 },
2005 { 0x99, 0x30 },
2006 { 0x9a, 0x84 },
2007 { 0x9b, 0x29 },
2008 { 0x9c, 0x03 },
2009 { 0x9d, 0x4c },
2010 { 0x9e, 0x3f },
2011 { 0x78, 0x04 },
2012
2013/* Extra-weird stuff. Some sort of multiplexor register */
2014 { 0x79, 0x01 },
2015 { 0xc8, 0xf0 },
2016 { 0x79, 0x0f },
2017 { 0xc8, 0x00 },
2018 { 0x79, 0x10 },
2019 { 0xc8, 0x7e },
2020 { 0x79, 0x0a },
2021 { 0xc8, 0x80 },
2022 { 0x79, 0x0b },
2023 { 0xc8, 0x01 },
2024 { 0x79, 0x0c },
2025 { 0xc8, 0x0f },
2026 { 0x79, 0x0d },
2027 { 0xc8, 0x20 },
2028 { 0x79, 0x09 },
2029 { 0xc8, 0x80 },
2030 { 0x79, 0x02 },
2031 { 0xc8, 0xc0 },
2032 { 0x79, 0x03 },
2033 { 0xc8, 0x40 },
2034 { 0x79, 0x05 },
2035 { 0xc8, 0x30 },
2036 { 0x79, 0x26 },
2037};
2038
2039static const struct ov_i2c_regvals norm_8610[] = {
2040 { 0x12, 0x80 },
2041 { 0x00, 0x00 },
2042 { 0x01, 0x80 },
2043 { 0x02, 0x80 },
2044 { 0x03, 0xc0 },
2045 { 0x04, 0x30 },
2046 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
2047 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
2048 { 0x0a, 0x86 },
2049 { 0x0b, 0xb0 },
2050 { 0x0c, 0x20 },
2051 { 0x0d, 0x20 },
2052 { 0x11, 0x01 },
2053 { 0x12, 0x25 },
2054 { 0x13, 0x01 },
2055 { 0x14, 0x04 },
2056 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
2057 { 0x16, 0x03 },
2058 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
2059 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
2060 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
2061 { 0x1a, 0xf5 },
2062 { 0x1b, 0x00 },
2063 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
2064 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
2065 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
2066 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
2067 { 0x26, 0xa2 },
2068 { 0x27, 0xea },
2069 { 0x28, 0x00 },
2070 { 0x29, 0x00 },
2071 { 0x2a, 0x80 },
2072 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
2073 { 0x2c, 0xac },
2074 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
2075 { 0x2e, 0x80 },
2076 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
2077 { 0x4c, 0x00 },
2078 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
2079 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
2080 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
2081 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
2082 { 0x63, 0xff },
2083 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
2084 * maybe thats wrong */
2085 { 0x65, 0x00 },
2086 { 0x66, 0x55 },
2087 { 0x67, 0xb0 },
2088 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
2089 { 0x69, 0x02 },
2090 { 0x6a, 0x22 },
2091 { 0x6b, 0x00 },
2092 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
2093 * deleting bit7 colors the first images red */
2094 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
2095 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
2096 { 0x6f, 0x01 },
2097 { 0x70, 0x8b },
2098 { 0x71, 0x00 },
2099 { 0x72, 0x14 },
2100 { 0x73, 0x54 },
2101 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2102 { 0x75, 0x0e },
2103 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2104 { 0x77, 0xff },
2105 { 0x78, 0x80 },
2106 { 0x79, 0x80 },
2107 { 0x7a, 0x80 },
2108 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2109 { 0x7c, 0x00 },
2110 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2111 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2112 { 0x7f, 0xfb },
2113 { 0x80, 0x28 },
2114 { 0x81, 0x00 },
2115 { 0x82, 0x23 },
2116 { 0x83, 0x0b },
2117 { 0x84, 0x00 },
2118 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2119 { 0x86, 0xc9 },
2120 { 0x87, 0x00 },
2121 { 0x88, 0x00 },
2122 { 0x89, 0x01 },
2123 { 0x12, 0x20 },
2124 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2125};
2126
6a7eba24
JFM		 2127static unsigned char ov7670_abs_to_sm(unsigned char v)
2128{
2129 if (v > 127)
2130 return v & 0x7f;
2131 return (128 - v) | 0x80;
2132}
2133
2134/* Write a OV519 register */
f8f20188 2135static void reg_w(struct sd *sd, u16 index, u16 value)
6a7eba24 2136{
a511ba94 2137 int ret, req = 0;
b46aaa02 2138
f8f20188
JFM		 2139 if (sd->gspca_dev.usb_err < 0)
2140 return;
2141
b46aaa02
HG		 2142 switch (sd->bridge) {
2143 case BRIDGE_OV511:
2144 case BRIDGE_OV511PLUS:
2145 req = 2;
2146 break;
2147 case BRIDGE_OVFX2:
a511ba94
HG		 2148 req = 0x0a;
2149 /* fall through */
2150 case BRIDGE_W9968CF:
858ea5e9
JFM		 2151 PDEBUG(D_USBO, "SET %02x %04x %04x",
2152 req, value, index);
b46aaa02
HG		 2153 ret = usb_control_msg(sd->gspca_dev.dev,
2154 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
a511ba94 2155 req,
b46aaa02 2156 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
a511ba94 2157 value, index, NULL, 0, 500);
b46aaa02
HG		 2158 goto leave;
2159 default:
2160 req = 1;
2161 }
6a7eba24 2162
858ea5e9
JFM		 2163 PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2164 req, index, value);
739570bb 2165 sd->gspca_dev.usb_buf[0] = value;
6a7eba24
JFM		 2166 ret = usb_control_msg(sd->gspca_dev.dev,
2167 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 2168 req,
6a7eba24
JFM		 2169 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2170 0, index,
739570bb 2171 sd->gspca_dev.usb_buf, 1, 500);
b46aaa02 2172leave:
a511ba94 2173 if (ret < 0) {
858ea5e9 2174 err("reg_w %02x failed %d", index, ret);
f8f20188
JFM		 2175 sd->gspca_dev.usb_err = ret;
2176 return;
a511ba94 2177 }
6a7eba24
JFM		 2178}
2179
a511ba94 2180/* Read from a OV519 register, note not valid for the w9968cf!! */
6a7eba24 2181/* returns: negative is error, pos or zero is data */
9d1593a8 2182static int reg_r(struct sd *sd, u16 index)
6a7eba24
JFM		 2183{
2184 int ret;
b46aaa02
HG		 2185 int req;
2186
f8f20188
JFM		 2187 if (sd->gspca_dev.usb_err < 0)
2188 return -1;
2189
b46aaa02
HG		 2190 switch (sd->bridge) {
2191 case BRIDGE_OV511:
2192 case BRIDGE_OV511PLUS:
2193 req = 3;
2194 break;
2195 case BRIDGE_OVFX2:
2196 req = 0x0b;
2197 break;
2198 default:
2199 req = 1;
2200 }
6a7eba24
JFM		 2201
2202 ret = usb_control_msg(sd->gspca_dev.dev,
2203 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
49809d6a 2204 req,
6a7eba24 2205 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 2206 0, index, sd->gspca_dev.usb_buf, 1, 500);
6a7eba24 2207
a511ba94 2208 if (ret >= 0) {
739570bb 2209 ret = sd->gspca_dev.usb_buf[0];
858ea5e9
JFM		 2210 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2211 req, index, ret);
f8f20188 2212 } else {
858ea5e9 2213 err("reg_r %02x failed %d", index, ret);
f8f20188
JFM		 2214 sd->gspca_dev.usb_err = ret;
2215 }
a511ba94 2216
6a7eba24
JFM		 2217 return ret;
2218}
2219
2220/* Read 8 values from a OV519 register */
2221static int reg_r8(struct sd *sd,
9d1593a8 2222 u16 index)
6a7eba24
JFM		 2223{
2224 int ret;
6a7eba24 2225
f8f20188
JFM		 2226 if (sd->gspca_dev.usb_err < 0)
2227 return -1;
2228
6a7eba24
JFM		 2229 ret = usb_control_msg(sd->gspca_dev.dev,
2230 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2231 1, /* REQ_IO */
2232 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
739570bb 2233 0, index, sd->gspca_dev.usb_buf, 8, 500);
6a7eba24 2234
f8f20188 2235 if (ret >= 0) {
739570bb 2236 ret = sd->gspca_dev.usb_buf[0];
f8f20188 2237 } else {
858ea5e9 2238 err("reg_r8 %02x failed %d", index, ret);
f8f20188
JFM		 2239 sd->gspca_dev.usb_err = ret;
2240 }
a511ba94 2241
6a7eba24
JFM		 2242 return ret;
2243}
2244
2245/*
2246 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2247 * the same position as 1's in "mask" are cleared and set to "value". Bits
2248 * that are in the same position as 0's in "mask" are preserved, regardless
2249 * of their respective state in "value".
2250 */
f8f20188 2251static void reg_w_mask(struct sd *sd,
9d1593a8
JFM		 2252 u16 index,
2253 u8 value,
2254 u8 mask)
6a7eba24
JFM		 2255{
2256 int ret;
9d1593a8 2257 u8 oldval;
6a7eba24
JFM		 2258
2259 if (mask != 0xff) {
2260 value &= mask; /* Enforce mask on value */
2261 ret = reg_r(sd, index);
2262 if (ret < 0)
f8f20188 2263 return;
6a7eba24
JFM		 2264
2265 oldval = ret & ~mask; /* Clear the masked bits */
2266 value |= oldval; /* Set the desired bits */
2267 }
f8f20188 2268 reg_w(sd, index, value);
6a7eba24
JFM		 2269}
2270
49809d6a
HG		 2271/*
2272 * Writes multiple (n) byte value to a single register. Only valid with certain
2273 * registers (0x30 and 0xc4 - 0xce).
2274 */
f8f20188 2275static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
49809d6a
HG		 2276{
2277 int ret;
2278
f8f20188
JFM		 2279 if (sd->gspca_dev.usb_err < 0)
2280 return;
2281
83955556 2282 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
49809d6a
HG		 2283
2284 ret = usb_control_msg(sd->gspca_dev.dev,
2285 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2286 1 /* REG_IO */,
2287 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2288 0, index,
2289 sd->gspca_dev.usb_buf, n, 500);
a511ba94 2290 if (ret < 0) {
858ea5e9 2291 err("reg_w32 %02x failed %d", index, ret);
f8f20188 2292 sd->gspca_dev.usb_err = ret;
a511ba94 2293 }
49809d6a
HG		 2294}
2295
f8f20188 2296static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
1876bb92
HG		 2297{
2298 int rc, retries;
2299
858ea5e9 2300 PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
1876bb92
HG		 2301
2302 /* Three byte write cycle */
2303 for (retries = 6; ; ) {
2304 /* Select camera register */
f8f20188 2305 reg_w(sd, R51x_I2C_SADDR_3, reg);
1876bb92
HG		 2306
2307 /* Write "value" to I2C data port of OV511 */
f8f20188 2308 reg_w(sd, R51x_I2C_DATA, value);
1876bb92
HG		 2309
2310 /* Initiate 3-byte write cycle */
f8f20188 2311 reg_w(sd, R511_I2C_CTL, 0x01);
1876bb92 2312
83955556 2313 do {
1876bb92 2314 rc = reg_r(sd, R511_I2C_CTL);
83955556 2315 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1876bb92
HG		 2316
2317 if (rc < 0)
f8f20188 2318 return;
1876bb92
HG		 2319
2320 if ((rc & 2) == 0) /* Ack? */
2321 break;
2322 if (--retries < 0) {
2323 PDEBUG(D_USBO, "i2c write retries exhausted");
f8f20188 2324 return;
1876bb92
HG		 2325 }
2326 }
1876bb92
HG		 2327}
2328
9d1593a8 2329static int ov511_i2c_r(struct sd *sd, u8 reg)
1876bb92
HG		 2330{
2331 int rc, value, retries;
2332
2333 /* Two byte write cycle */
2334 for (retries = 6; ; ) {
2335 /* Select camera register */
f8f20188 2336 reg_w(sd, R51x_I2C_SADDR_2, reg);
1876bb92
HG		 2337
2338 /* Initiate 2-byte write cycle */
f8f20188 2339 reg_w(sd, R511_I2C_CTL, 0x03);
1876bb92 2340
83955556 2341 do {
1876bb92 2342 rc = reg_r(sd, R511_I2C_CTL);
83955556 2343 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1876bb92
HG		 2344
2345 if (rc < 0)
2346 return rc;
2347
2348 if ((rc & 2) == 0) /* Ack? */
2349 break;
2350
2351 /* I2C abort */
2352 reg_w(sd, R511_I2C_CTL, 0x10);
2353
2354 if (--retries < 0) {
2355 PDEBUG(D_USBI, "i2c write retries exhausted");
2356 return -1;
2357 }
2358 }
2359
2360 /* Two byte read cycle */
2361 for (retries = 6; ; ) {
2362 /* Initiate 2-byte read cycle */
f8f20188 2363 reg_w(sd, R511_I2C_CTL, 0x05);
1876bb92 2364
83955556 2365 do {
1876bb92 2366 rc = reg_r(sd, R511_I2C_CTL);
83955556 2367 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
1876bb92
HG		 2368
2369 if (rc < 0)
2370 return rc;
2371
2372 if ((rc & 2) == 0) /* Ack? */
2373 break;
2374
2375 /* I2C abort */
f8f20188 2376 reg_w(sd, R511_I2C_CTL, 0x10);
1876bb92
HG		 2377
2378 if (--retries < 0) {
2379 PDEBUG(D_USBI, "i2c read retries exhausted");
2380 return -1;
2381 }
2382 }
2383
2384 value = reg_r(sd, R51x_I2C_DATA);
2385
858ea5e9 2386 PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
1876bb92
HG		 2387
2388 /* This is needed to make i2c_w() work */
f8f20188 2389 reg_w(sd, R511_I2C_CTL, 0x05);
1876bb92
HG		 2390
2391 return value;
2392}
49809d6a 2393
6a7eba24
JFM		 2394/*
2395 * The OV518 I2C I/O procedure is different, hence, this function.
2396 * This is normally only called from i2c_w(). Note that this function
2397 * always succeeds regardless of whether the sensor is present and working.
2398 */
f8f20188 2399static void ov518_i2c_w(struct sd *sd,
9d1593a8
JFM		 2400 u8 reg,
2401 u8 value)
6a7eba24 2402{
858ea5e9 2403 PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
6a7eba24
JFM		 2404
2405 /* Select camera register */
f8f20188 2406 reg_w(sd, R51x_I2C_SADDR_3, reg);
6a7eba24
JFM		 2407
2408 /* Write "value" to I2C data port of OV511 */
f8f20188 2409 reg_w(sd, R51x_I2C_DATA, value);
6a7eba24
JFM		 2410
2411 /* Initiate 3-byte write cycle */
f8f20188 2412 reg_w(sd, R518_I2C_CTL, 0x01);
6a7eba24
JFM		 2413
2414 /* wait for write complete */
2415 msleep(4);
f8f20188 2416 reg_r8(sd, R518_I2C_CTL);
6a7eba24
JFM		 2417}
2418
2419/*
2420 * returns: negative is error, pos or zero is data
2421 *
2422 * The OV518 I2C I/O procedure is different, hence, this function.
2423 * This is normally only called from i2c_r(). Note that this function
2424 * always succeeds regardless of whether the sensor is present and working.
2425 */
9d1593a8 2426static int ov518_i2c_r(struct sd *sd, u8 reg)
6a7eba24 2427{
f8f20188 2428 int value;
6a7eba24
JFM		 2429
2430 /* Select camera register */
f8f20188 2431 reg_w(sd, R51x_I2C_SADDR_2, reg);
6a7eba24
JFM		 2432
2433 /* Initiate 2-byte write cycle */
f8f20188 2434 reg_w(sd, R518_I2C_CTL, 0x03);
b877a9a7 2435 reg_r8(sd, R518_I2C_CTL);
6a7eba24
JFM		 2436
2437 /* Initiate 2-byte read cycle */
f8f20188 2438 reg_w(sd, R518_I2C_CTL, 0x05);
b877a9a7
JFM		 2439 reg_r8(sd, R518_I2C_CTL);
2440
6a7eba24 2441 value = reg_r(sd, R51x_I2C_DATA);
858ea5e9 2442 PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
6a7eba24
JFM		 2443 return value;
2444}
2445
f8f20188 2446static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
b46aaa02
HG		 2447{
2448 int ret;
2449
f8f20188
JFM		 2450 if (sd->gspca_dev.usb_err < 0)
2451 return;
2452
b46aaa02
HG		 2453 ret = usb_control_msg(sd->gspca_dev.dev,
2454 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2455 0x02,
2456 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
9d1593a8 2457 (u16) value, (u16) reg, NULL, 0, 500);
b46aaa02 2458
a511ba94 2459 if (ret < 0) {
858ea5e9 2460 err("ovfx2_i2c_w %02x failed %d", reg, ret);
f8f20188 2461 sd->gspca_dev.usb_err = ret;
a511ba94 2462 }
b46aaa02 2463
858ea5e9 2464 PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
b46aaa02
HG		 2465}
2466
9d1593a8 2467static int ovfx2_i2c_r(struct sd *sd, u8 reg)
b46aaa02
HG		 2468{
2469 int ret;
2470
f8f20188
JFM		 2471 if (sd->gspca_dev.usb_err < 0)
2472 return -1;
2473
b46aaa02
HG		 2474 ret = usb_control_msg(sd->gspca_dev.dev,
2475 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2476 0x03,
2477 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
9d1593a8 2478 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
b46aaa02
HG		 2479
2480 if (ret >= 0) {
2481 ret = sd->gspca_dev.usb_buf[0];
858ea5e9 2482 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
f8f20188 2483 } else {
858ea5e9 2484 err("ovfx2_i2c_r %02x failed %d", reg, ret);
f8f20188
JFM		 2485 sd->gspca_dev.usb_err = ret;
2486 }
b46aaa02
HG		 2487
2488 return ret;
2489}
2490
f8f20188 2491static void i2c_w(struct sd *sd, u8 reg, u8 value)
1876bb92 2492{
fb1f9020 2493 if (sd->sensor_reg_cache[reg] == value)
f8f20188 2494 return;
fb1f9020 2495
1876bb92
HG		 2496 switch (sd->bridge) {
2497 case BRIDGE_OV511:
2498 case BRIDGE_OV511PLUS:
f8f20188 2499 ov511_i2c_w(sd, reg, value);
fb1f9020 2500 break;
1876bb92
HG		 2501 case BRIDGE_OV518:
2502 case BRIDGE_OV518PLUS:
2503 case BRIDGE_OV519:
f8f20188 2504 ov518_i2c_w(sd, reg, value);
fb1f9020 2505 break;
b46aaa02 2506 case BRIDGE_OVFX2:
f8f20188 2507 ovfx2_i2c_w(sd, reg, value);
fb1f9020 2508 break;
a511ba94 2509 case BRIDGE_W9968CF:
f8f20188 2510 w9968cf_i2c_w(sd, reg, value);
fb1f9020 2511 break;
1876bb92 2512 }
fb1f9020 2513
f8f20188 2514 if (sd->gspca_dev.usb_err >= 0) {
fb1f9020
HG		 2515 /* Up on sensor reset empty the register cache */
2516 if (reg == 0x12 && (value & 0x80))
2517 memset(sd->sensor_reg_cache, -1,
87bae740 2518 sizeof(sd->sensor_reg_cache));
fb1f9020
HG		 2519 else
2520 sd->sensor_reg_cache[reg] = value;
2521 }
1876bb92
HG		 2522}
2523
9d1593a8 2524static int i2c_r(struct sd *sd, u8 reg)
1876bb92 2525{
8394bcf3 2526 int ret = -1;
fb1f9020
HG		 2527
2528 if (sd->sensor_reg_cache[reg] != -1)
2529 return sd->sensor_reg_cache[reg];
2530
1876bb92
HG		 2531 switch (sd->bridge) {
2532 case BRIDGE_OV511:
2533 case BRIDGE_OV511PLUS:
fb1f9020
HG		 2534 ret = ov511_i2c_r(sd, reg);
2535 break;
1876bb92
HG		 2536 case BRIDGE_OV518:
2537 case BRIDGE_OV518PLUS:
2538 case BRIDGE_OV519:
fb1f9020
HG		 2539 ret = ov518_i2c_r(sd, reg);
2540 break;
b46aaa02 2541 case BRIDGE_OVFX2:
fb1f9020
HG		 2542 ret = ovfx2_i2c_r(sd, reg);
2543 break;
a511ba94 2544 case BRIDGE_W9968CF:
fb1f9020
HG		 2545 ret = w9968cf_i2c_r(sd, reg);
2546 break;
1876bb92 2547 }
fb1f9020
HG		 2548
2549 if (ret >= 0)
2550 sd->sensor_reg_cache[reg] = ret;
2551
2552 return ret;
1876bb92
HG		 2553}
2554
6a7eba24
JFM		 2555/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2556 * the same position as 1's in "mask" are cleared and set to "value". Bits
2557 * that are in the same position as 0's in "mask" are preserved, regardless
2558 * of their respective state in "value".
2559 */
f8f20188 2560static void i2c_w_mask(struct sd *sd,
9d1593a8
JFM		 2561 u8 reg,
2562 u8 value,
2563 u8 mask)
6a7eba24
JFM		 2564{
2565 int rc;
9d1593a8 2566 u8 oldval;
6a7eba24
JFM		 2567
2568 value &= mask; /* Enforce mask on value */
2569 rc = i2c_r(sd, reg);
2570 if (rc < 0)
f8f20188 2571 return;
6a7eba24
JFM		 2572 oldval = rc & ~mask; /* Clear the masked bits */
2573 value |= oldval; /* Set the desired bits */
f8f20188 2574 i2c_w(sd, reg, value);
6a7eba24
JFM		 2575}
2576
2577/* Temporarily stops OV511 from functioning. Must do this before changing
2578 * registers while the camera is streaming */
f8f20188 2579static inline void ov51x_stop(struct sd *sd)
6a7eba24
JFM		 2580{
2581 PDEBUG(D_STREAM, "stopping");
2582 sd->stopped = 1;
49809d6a
HG		 2583 switch (sd->bridge) {
2584 case BRIDGE_OV511:
2585 case BRIDGE_OV511PLUS:
f8f20188
JFM		 2586 reg_w(sd, R51x_SYS_RESET, 0x3d);
2587 break;
49809d6a
HG		 2588 case BRIDGE_OV518:
2589 case BRIDGE_OV518PLUS:
f8f20188
JFM		 2590 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2591 break;
49809d6a 2592 case BRIDGE_OV519:
f8f20188 2593 reg_w(sd, OV519_R51_RESET1, 0x0f);
5927abcb
JFM		 2594 reg_w(sd, OV519_R51_RESET1, 0x00);
2595 reg_w(sd, 0x22, 0x00); /* FRAR */
f8f20188 2596 break;
b46aaa02 2597 case BRIDGE_OVFX2:
f8f20188
JFM		 2598 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2599 break;
a511ba94 2600 case BRIDGE_W9968CF:
f8f20188
JFM		 2601 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2602 break;
49809d6a 2603 }
6a7eba24
JFM		 2604}
2605
2606/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2607 * actually stopped (for performance). */
f8f20188 2608static inline void ov51x_restart(struct sd *sd)
6a7eba24
JFM		 2609{
2610 PDEBUG(D_STREAM, "restarting");
2611 if (!sd->stopped)
f8f20188 2612 return;
6a7eba24
JFM		 2613 sd->stopped = 0;
2614
2615 /* Reinitialize the stream */
49809d6a
HG		 2616 switch (sd->bridge) {
2617 case BRIDGE_OV511:
2618 case BRIDGE_OV511PLUS:
f8f20188
JFM		 2619 reg_w(sd, R51x_SYS_RESET, 0x00);
2620 break;
49809d6a
HG		 2621 case BRIDGE_OV518:
2622 case BRIDGE_OV518PLUS:
f8f20188
JFM		 2623 reg_w(sd, 0x2f, 0x80);
2624 reg_w(sd, R51x_SYS_RESET, 0x00);
2625 break;
49809d6a 2626 case BRIDGE_OV519:
5927abcb 2627 reg_w(sd, OV519_R51_RESET1, 0x0f);
f8f20188 2628 reg_w(sd, OV519_R51_RESET1, 0x00);
5927abcb 2629 reg_w(sd, 0x22, 0x1d); /* FRAR */
f8f20188 2630 break;
b46aaa02 2631 case BRIDGE_OVFX2:
f8f20188
JFM		 2632 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2633 break;
a511ba94 2634 case BRIDGE_W9968CF:
f8f20188
JFM		 2635 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2636 break;
49809d6a 2637 }
6a7eba24
JFM		 2638}
2639
f8f20188 2640static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
229bb7dc 2641
6a7eba24
JFM		 2642/* This does an initial reset of an OmniVision sensor and ensures that I2C
2643 * is synchronized. Returns <0 on failure.
2644 */
9d1593a8 2645static int init_ov_sensor(struct sd *sd, u8 slave)
6a7eba24 2646{
ac40b1fa 2647 int i;
6a7eba24 2648
f8f20188 2649 ov51x_set_slave_ids(sd, slave);
229bb7dc 2650
6a7eba24 2651 /* Reset the sensor */
f8f20188 2652 i2c_w(sd, 0x12, 0x80);
6a7eba24
JFM		 2653
2654 /* Wait for it to initialize */
2655 msleep(150);
2656
ac40b1fa 2657 for (i = 0; i < i2c_detect_tries; i++) {
6a7eba24
JFM		 2658 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2659 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
ac40b1fa
JFM		 2660 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2661 return 0;
6a7eba24
JFM		 2662 }
2663
2664 /* Reset the sensor */
f8f20188
JFM		 2665 i2c_w(sd, 0x12, 0x80);
2666
6a7eba24
JFM		 2667 /* Wait for it to initialize */
2668 msleep(150);
87bae740 2669
6a7eba24
JFM		 2670 /* Dummy read to sync I2C */
2671 if (i2c_r(sd, 0x00) < 0)
f8f20188 2672 return -1;
6a7eba24 2673 }
f8f20188 2674 return -1;
6a7eba24
JFM		 2675}
2676
6a7eba24
JFM		 2677/* Set the read and write slave IDs. The "slave" argument is the write slave,
2678 * and the read slave will be set to (slave + 1).
2679 * This should not be called from outside the i2c I/O functions.
2680 * Sets I2C read and write slave IDs. Returns <0 for error
2681 */
f8f20188 2682static void ov51x_set_slave_ids(struct sd *sd,
9d1593a8 2683 u8 slave)
6a7eba24 2684{
a511ba94
HG		 2685 switch (sd->bridge) {
2686 case BRIDGE_OVFX2:
f8f20188
JFM		 2687 reg_w(sd, OVFX2_I2C_ADDR, slave);
2688 return;
a511ba94
HG		 2689 case BRIDGE_W9968CF:
2690 sd->sensor_addr = slave;
f8f20188 2691 return;
a511ba94 2692 }
b46aaa02 2693
f8f20188
JFM		 2694 reg_w(sd, R51x_I2C_W_SID, slave);
2695 reg_w(sd, R51x_I2C_R_SID, slave + 1);
6a7eba24
JFM		 2696}
2697
f8f20188 2698static void write_regvals(struct sd *sd,
a5ae2062 2699 const struct ov_regvals *regvals,
6a7eba24
JFM		 2700 int n)
2701{
6a7eba24 2702 while (--n >= 0) {
f8f20188 2703 reg_w(sd, regvals->reg, regvals->val);
6a7eba24
JFM		 2704 regvals++;
2705 }
6a7eba24
JFM		 2706}
2707
f8f20188
JFM		 2708static void write_i2c_regvals(struct sd *sd,
2709 const struct ov_i2c_regvals *regvals,
2710 int n)
6a7eba24 2711{
6a7eba24 2712 while (--n >= 0) {
f8f20188 2713 i2c_w(sd, regvals->reg, regvals->val);
6a7eba24
JFM		 2714 regvals++;
2715 }
6a7eba24
JFM		 2716}
2717
2718/****************************************************************************
2719 *
2720 * OV511 and sensor configuration
2721 *
2722 ***************************************************************************/
2723
798ae150 2724/* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
f8f20188 2725static void ov_hires_configure(struct sd *sd)
635118d5
HG		 2726{
2727 int high, low;
2728
2729 if (sd->bridge != BRIDGE_OVFX2) {
0b656321 2730 err("error hires sensors only supported with ovfx2");
f8f20188 2731 return;
635118d5
HG		 2732 }
2733
2734 PDEBUG(D_PROBE, "starting ov hires configuration");
2735
2736 /* Detect sensor (sub)type */
2737 high = i2c_r(sd, 0x0a);
2738 low = i2c_r(sd, 0x0b);
2739 /* info("%x, %x", high, low); */
798ae150
JFM		 2740 switch (high) {
2741 case 0x96:
2742 switch (low) {
2743 case 0x40:
2744 PDEBUG(D_PROBE, "Sensor is a OV2610");
2745 sd->sensor = SEN_OV2610;
2746 return;
2747 case 0x41:
2748 PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2749 sd->sensor = SEN_OV2610AE;
2750 return;
2751 case 0xb1:
2752 PDEBUG(D_PROBE, "Sensor is a OV9600");
2753 sd->sensor = SEN_OV9600;
2754 return;
2755 }
2756 break;
2757 case 0x36:
2758 if ((low & 0x0f) == 0x00) {
2759 PDEBUG(D_PROBE, "Sensor is a OV3610");
2760 sd->sensor = SEN_OV3610;
2761 return;
2762 }
2763 break;
635118d5 2764 }
798ae150 2765 err("Error unknown sensor type: %02x%02x", high, low);
635118d5
HG		 2766}
2767
6a7eba24
JFM		 2768/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2769 * the same register settings as the OV8610, since they are very similar.
2770 */
f8f20188 2771static void ov8xx0_configure(struct sd *sd)
6a7eba24
JFM		 2772{
2773 int rc;
6a7eba24
JFM		 2774
2775 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2776
6a7eba24
JFM		 2777 /* Detect sensor (sub)type */
2778 rc = i2c_r(sd, OV7610_REG_COM_I);
2779 if (rc < 0) {
2780 PDEBUG(D_ERR, "Error detecting sensor type");
f8f20188 2781 return;
6a7eba24 2782 }
f8f20188 2783 if ((rc & 3) == 1)
6a7eba24 2784 sd->sensor = SEN_OV8610;
f8f20188 2785 else
0b656321 2786 err("Unknown image sensor version: %d", rc & 3);
6a7eba24
JFM		 2787}
2788
2789/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2790 * the same register settings as the OV7610, since they are very similar.
2791 */
f8f20188 2792static void ov7xx0_configure(struct sd *sd)
6a7eba24
JFM		 2793{
2794 int rc, high, low;
2795
6a7eba24
JFM		 2796 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2797
6a7eba24
JFM		 2798 /* Detect sensor (sub)type */
2799 rc = i2c_r(sd, OV7610_REG_COM_I);
2800
2801 /* add OV7670 here
2802 * it appears to be wrongly detected as a 7610 by default */
2803 if (rc < 0) {
2804 PDEBUG(D_ERR, "Error detecting sensor type");
f8f20188 2805 return;
6a7eba24
JFM		 2806 }
2807 if ((rc & 3) == 3) {
2808 /* quick hack to make OV7670s work */
2809 high = i2c_r(sd, 0x0a);
2810 low = i2c_r(sd, 0x0b);
2811 /* info("%x, %x", high, low); */
7a5a414c
JFM		 2812 if (high == 0x76 && (low & 0xf0) == 0x70) {
2813 PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
6a7eba24
JFM		 2814 sd->sensor = SEN_OV7670;
2815 } else {
2816 PDEBUG(D_PROBE, "Sensor is an OV7610");
2817 sd->sensor = SEN_OV7610;
2818 }
2819 } else if ((rc & 3) == 1) {
2820 /* I don't know what's different about the 76BE yet. */
b282d873 2821 if (i2c_r(sd, 0x15) & 1) {
6a7eba24 2822 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
859cc470 2823 sd->sensor = SEN_OV7620AE;
b282d873 2824 } else {
6a7eba24 2825 PDEBUG(D_PROBE, "Sensor is an OV76BE");
b282d873
HG		 2826 sd->sensor = SEN_OV76BE;
2827 }
6a7eba24
JFM		 2828 } else if ((rc & 3) == 0) {
2829 /* try to read product id registers */
2830 high = i2c_r(sd, 0x0a);
2831 if (high < 0) {
2832 PDEBUG(D_ERR, "Error detecting camera chip PID");
f8f20188 2833 return;
6a7eba24
JFM		 2834 }
2835 low = i2c_r(sd, 0x0b);
2836 if (low < 0) {
2837 PDEBUG(D_ERR, "Error detecting camera chip VER");
f8f20188 2838 return;
6a7eba24
JFM		 2839 }
2840 if (high == 0x76) {
594f5b8b
JFM		 2841 switch (low) {
2842 case 0x30:
0b656321
JFM		 2843 err("Sensor is an OV7630/OV7635");
2844 err("7630 is not supported by this driver");
f8f20188 2845 return;
594f5b8b 2846 case 0x40:
6a7eba24
JFM		 2847 PDEBUG(D_PROBE, "Sensor is an OV7645");
2848 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2849 break;
2850 case 0x45:
6a7eba24
JFM		 2851 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2852 sd->sensor = SEN_OV7640; /* FIXME */
594f5b8b
JFM		 2853 break;
2854 case 0x48:
6a7eba24 2855 PDEBUG(D_PROBE, "Sensor is an OV7648");
035d3a3d 2856 sd->sensor = SEN_OV7648;
594f5b8b 2857 break;
42e142f6
JFM		 2858 case 0x60:
2859 PDEBUG(D_PROBE, "Sensor is a OV7660");
2860 sd->sensor = SEN_OV7660;
2861 sd->invert_led = 0;
2862 break;
594f5b8b
JFM		 2863 default:
2864 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
f8f20188 2865 return;
6a7eba24
JFM		 2866 }
2867 } else {
2868 PDEBUG(D_PROBE, "Sensor is an OV7620");
2869 sd->sensor = SEN_OV7620;
2870 }
2871 } else {
0b656321 2872 err("Unknown image sensor version: %d", rc & 3);
6a7eba24 2873 }
6a7eba24
JFM		 2874}
2875
2876/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
f8f20188 2877static void ov6xx0_configure(struct sd *sd)
6a7eba24
JFM		 2878{
2879 int rc;
4202f71c 2880 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
6a7eba24
JFM		 2881
2882 /* Detect sensor (sub)type */
2883 rc = i2c_r(sd, OV7610_REG_COM_I);
2884 if (rc < 0) {
2885 PDEBUG(D_ERR, "Error detecting sensor type");
f8f20188 2886 return;
6a7eba24
JFM		 2887 }
2888
2889 /* Ugh. The first two bits are the version bits, but
2890 * the entire register value must be used. I guess OVT
2891 * underestimated how many variants they would make. */
594f5b8b
JFM		 2892 switch (rc) {
2893 case 0x00:
6a7eba24 2894 sd->sensor = SEN_OV6630;
0b656321
JFM		 2895 warn("WARNING: Sensor is an OV66308. Your camera may have");
2896 warn("been misdetected in previous driver versions.");
594f5b8b
JFM		 2897 break;
2898 case 0x01:
6a7eba24 2899 sd->sensor = SEN_OV6620;
7d971373 2900 PDEBUG(D_PROBE, "Sensor is an OV6620");
594f5b8b
JFM		 2901 break;
2902 case 0x02:
6a7eba24
JFM		 2903 sd->sensor = SEN_OV6630;
2904 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
594f5b8b
JFM		 2905 break;
2906 case 0x03:
7d971373 2907 sd->sensor = SEN_OV66308AF;
6a7eba24 2908 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
594f5b8b
JFM		 2909 break;
2910 case 0x90:
6a7eba24 2911 sd->sensor = SEN_OV6630;
0b656321
JFM		 2912 warn("WARNING: Sensor is an OV66307. Your camera may have");
2913 warn("been misdetected in previous driver versions.");
594f5b8b
JFM		 2914 break;
2915 default:
0b656321 2916 err("FATAL: Unknown sensor version: 0x%02x", rc);
f8f20188 2917 return;
6a7eba24
JFM		 2918 }
2919
2920 /* Set sensor-specific vars */
594f5b8b 2921 sd->sif = 1;
6a7eba24
JFM		 2922}
2923
2924/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2925static void ov51x_led_control(struct sd *sd, int on)
2926{
9e4d8258
HG		 2927 if (sd->invert_led)
2928 on = !on;
2929
49809d6a
HG		 2930 switch (sd->bridge) {
2931 /* OV511 has no LED control */
2932 case BRIDGE_OV511PLUS:
a23acec4 2933 reg_w(sd, R511_SYS_LED_CTL, on);
49809d6a
HG		 2934 break;
2935 case BRIDGE_OV518:
2936 case BRIDGE_OV518PLUS:
a23acec4 2937 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
49809d6a
HG		 2938 break;
2939 case BRIDGE_OV519:
a23acec4 2940 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
49809d6a
HG		 2941 break;
2942 }
6a7eba24
JFM		 2943}
2944
417a4d26
HG		 2945static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2946{
2947 struct sd *sd = (struct sd *) gspca_dev;
2948
2949 if (!sd->snapshot_needs_reset)
2950 return;
2951
2952 /* Note it is important that we clear sd->snapshot_needs_reset,
2953 before actually clearing the snapshot state in the bridge
2954 otherwise we might race with the pkt_scan interrupt handler */
2955 sd->snapshot_needs_reset = 0;
2956
2957 switch (sd->bridge) {
88e8d20a
HG		 2958 case BRIDGE_OV511:
2959 case BRIDGE_OV511PLUS:
2960 reg_w(sd, R51x_SYS_SNAP, 0x02);
2961 reg_w(sd, R51x_SYS_SNAP, 0x00);
2962 break;
92e232ac
HG		 2963 case BRIDGE_OV518:
2964 case BRIDGE_OV518PLUS:
2965 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2966 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2967 break;
417a4d26
HG		 2968 case BRIDGE_OV519:
2969 reg_w(sd, R51x_SYS_RESET, 0x40);
2970 reg_w(sd, R51x_SYS_RESET, 0x00);
2971 break;
2972 }
2973}
2974
f8f20188 2975static void ov51x_upload_quan_tables(struct sd *sd)
49809d6a 2976{
1876bb92
HG		 2977 const unsigned char yQuanTable511[] = {
2978 0, 1, 1, 2, 2, 3, 3, 4,
2979 1, 1, 1, 2, 2, 3, 4, 4,
2980 1, 1, 2, 2, 3, 4, 4, 4,
2981 2, 2, 2, 3, 4, 4, 4, 4,
2982 2, 2, 3, 4, 4, 5, 5, 5,
2983 3, 3, 4, 4, 5, 5, 5, 5,
2984 3, 4, 4, 4, 5, 5, 5, 5,
2985 4, 4, 4, 4, 5, 5, 5, 5
2986 };
2987
2988 const unsigned char uvQuanTable511[] = {
2989 0, 2, 2, 3, 4, 4, 4, 4,
2990 2, 2, 2, 4, 4, 4, 4, 4,
2991 2, 2, 3, 4, 4, 4, 4, 4,
2992 3, 4, 4, 4, 4, 4, 4, 4,
2993 4, 4, 4, 4, 4, 4, 4, 4,
2994 4, 4, 4, 4, 4, 4, 4, 4,
2995 4, 4, 4, 4, 4, 4, 4, 4,
2996 4, 4, 4, 4, 4, 4, 4, 4
2997 };
2998
2999 /* OV518 quantization tables are 8x4 (instead of 8x8) */
49809d6a
HG		 3000 const unsigned char yQuanTable518[] = {
3001 5, 4, 5, 6, 6, 7, 7, 7,
3002 5, 5, 5, 5, 6, 7, 7, 7,
3003 6, 6, 6, 6, 7, 7, 7, 8,
3004 7, 7, 6, 7, 7, 7, 8, 8
3005 };
49809d6a
HG		 3006 const unsigned char uvQuanTable518[] = {
3007 6, 6, 6, 7, 7, 7, 7, 7,
3008 6, 6, 6, 7, 7, 7, 7, 7,
3009 6, 6, 6, 7, 7, 7, 7, 8,
3010 7, 7, 7, 7, 7, 7, 8, 8
3011 };
3012
1876bb92 3013 const unsigned char *pYTable, *pUVTable;
49809d6a 3014 unsigned char val0, val1;
f8f20188 3015 int i, size, reg = R51x_COMP_LUT_BEGIN;
49809d6a
HG		 3016
3017 PDEBUG(D_PROBE, "Uploading quantization tables");
3018
1876bb92
HG		 3019 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
3020 pYTable = yQuanTable511;
3021 pUVTable = uvQuanTable511;
87bae740 3022 size = 32;
1876bb92
HG		 3023 } else {
3024 pYTable = yQuanTable518;
3025 pUVTable = uvQuanTable518;
87bae740 3026 size = 16;
1876bb92
HG		 3027 }
3028
3029 for (i = 0; i < size; i++) {
49809d6a
HG		 3030 val0 = *pYTable++;
3031 val1 = *pYTable++;
3032 val0 &= 0x0f;
3033 val1 &= 0x0f;
3034 val0 |= val1 << 4;
f8f20188 3035 reg_w(sd, reg, val0);
49809d6a
HG		 3036
3037 val0 = *pUVTable++;
3038 val1 = *pUVTable++;
3039 val0 &= 0x0f;
3040 val1 &= 0x0f;
3041 val0 |= val1 << 4;
f8f20188 3042 reg_w(sd, reg + size, val0);
49809d6a
HG		 3043
3044 reg++;
3045 }
49809d6a
HG		 3046}
3047
1876bb92 3048/* This initializes the OV511/OV511+ and the sensor */
f8f20188 3049static void ov511_configure(struct gspca_dev *gspca_dev)
1876bb92
HG		 3050{
3051 struct sd *sd = (struct sd *) gspca_dev;
1876bb92
HG		 3052
3053 /* For 511 and 511+ */
3054 const struct ov_regvals init_511[] = {
3055 { R51x_SYS_RESET, 0x7f },
3056 { R51x_SYS_INIT, 0x01 },
3057 { R51x_SYS_RESET, 0x7f },
3058 { R51x_SYS_INIT, 0x01 },
3059 { R51x_SYS_RESET, 0x3f },
3060 { R51x_SYS_INIT, 0x01 },
3061 { R51x_SYS_RESET, 0x3d },
3062 };
3063
3064 const struct ov_regvals norm_511[] = {
780e3121 3065 { R511_DRAM_FLOW_CTL, 0x01 },
1876bb92
HG		 3066 { R51x_SYS_SNAP, 0x00 },
3067 { R51x_SYS_SNAP, 0x02 },
3068 { R51x_SYS_SNAP, 0x00 },
3069 { R511_FIFO_OPTS, 0x1f },
3070 { R511_COMP_EN, 0x00 },
3071 { R511_COMP_LUT_EN, 0x03 },
3072 };
3073
3074 const struct ov_regvals norm_511_p[] = {
3075 { R511_DRAM_FLOW_CTL, 0xff },
3076 { R51x_SYS_SNAP, 0x00 },
3077 { R51x_SYS_SNAP, 0x02 },
3078 { R51x_SYS_SNAP, 0x00 },
3079 { R511_FIFO_OPTS, 0xff },
3080 { R511_COMP_EN, 0x00 },
3081 { R511_COMP_LUT_EN, 0x03 },
3082 };
3083
3084 const struct ov_regvals compress_511[] = {
3085 { 0x70, 0x1f },
3086 { 0x71, 0x05 },
3087 { 0x72, 0x06 },
3088 { 0x73, 0x06 },
3089 { 0x74, 0x14 },
3090 { 0x75, 0x03 },
3091 { 0x76, 0x04 },
3092 { 0x77, 0x04 },
3093 };
3094
3095 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
3096
f8f20188 3097 write_regvals(sd, init_511, ARRAY_SIZE(init_511));
1876bb92
HG		 3098
3099 switch (sd->bridge) {
3100 case BRIDGE_OV511:
f8f20188 3101 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
1876bb92
HG		 3102 break;
3103 case BRIDGE_OV511PLUS:
f8f20188 3104 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
1876bb92
HG		 3105 break;
3106 }
3107
3108 /* Init compression */
f8f20188 3109 write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
1876bb92 3110
f8f20188 3111 ov51x_upload_quan_tables(sd);
1876bb92
HG		 3112}
3113
49809d6a 3114/* This initializes the OV518/OV518+ and the sensor */
f8f20188 3115static void ov518_configure(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 3116{
3117 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 3118
3119 /* For 518 and 518+ */
e080fcd9 3120 const struct ov_regvals init_518[] = {
49809d6a
HG		 3121 { R51x_SYS_RESET, 0x40 },
3122 { R51x_SYS_INIT, 0xe1 },
3123 { R51x_SYS_RESET, 0x3e },
3124 { R51x_SYS_INIT, 0xe1 },
3125 { R51x_SYS_RESET, 0x00 },
3126 { R51x_SYS_INIT, 0xe1 },
3127 { 0x46, 0x00 },
3128 { 0x5d, 0x03 },
3129 };
3130
e080fcd9 3131 const struct ov_regvals norm_518[] = {
49809d6a
HG		 3132 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3133 { R51x_SYS_SNAP, 0x01 }, /* Enable */
780e3121 3134 { 0x31, 0x0f },
49809d6a
HG		 3135 { 0x5d, 0x03 },
3136 { 0x24, 0x9f },
3137 { 0x25, 0x90 },
3138 { 0x20, 0x00 },
3139 { 0x51, 0x04 },
3140 { 0x71, 0x19 },
3141 { 0x2f, 0x80 },
3142 };
3143
e080fcd9 3144 const struct ov_regvals norm_518_p[] = {
49809d6a
HG		 3145 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3146 { R51x_SYS_SNAP, 0x01 }, /* Enable */
780e3121 3147 { 0x31, 0x0f },
49809d6a
HG		 3148 { 0x5d, 0x03 },
3149 { 0x24, 0x9f },
3150 { 0x25, 0x90 },
3151 { 0x20, 0x60 },
3152 { 0x51, 0x02 },
3153 { 0x71, 0x19 },
3154 { 0x40, 0xff },
3155 { 0x41, 0x42 },
3156 { 0x46, 0x00 },
3157 { 0x33, 0x04 },
3158 { 0x21, 0x19 },
3159 { 0x3f, 0x10 },
3160 { 0x2f, 0x80 },
3161 };
3162
3163 /* First 5 bits of custom ID reg are a revision ID on OV518 */
3164 PDEBUG(D_PROBE, "Device revision %d",
87bae740 3165 0x1f & reg_r(sd, R51x_SYS_CUST_ID));
49809d6a 3166
f8f20188 3167 write_regvals(sd, init_518, ARRAY_SIZE(init_518));
49809d6a
HG		 3168
3169 /* Set LED GPIO pin to output mode */
f8f20188 3170 reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
6a7eba24 3171
49809d6a
HG		 3172 switch (sd->bridge) {
3173 case BRIDGE_OV518:
f8f20188 3174 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
49809d6a
HG		 3175 break;
3176 case BRIDGE_OV518PLUS:
f8f20188 3177 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
49809d6a
HG		 3178 break;
3179 }
3180
f8f20188 3181 ov51x_upload_quan_tables(sd);
49809d6a 3182
f8f20188 3183 reg_w(sd, 0x2f, 0x80);
49809d6a
HG		 3184}
3185
f8f20188 3186static void ov519_configure(struct sd *sd)
49809d6a 3187{
a5ae2062 3188 static const struct ov_regvals init_519[] = {
87bae740 3189 { 0x5a, 0x6d }, /* EnableSystem */
fc63de88 3190 { 0x53, 0x9b }, /* don't enable the microcontroller */
21867803 3191 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
87bae740
JFM		 3192 { 0x5d, 0x03 },
3193 { 0x49, 0x01 },
3194 { 0x48, 0x00 },
6a7eba24
JFM		 3195 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3196 * detection will fail. This deserves further investigation. */
3197 { OV519_GPIO_IO_CTRL0, 0xee },
21867803
JFM		 3198 { OV519_R51_RESET1, 0x0f },
3199 { OV519_R51_RESET1, 0x00 },
87bae740 3200 { 0x22, 0x00 },
6a7eba24
JFM		 3201 /* windows reads 0x55 at this point*/
3202 };
3203
f8f20188 3204 write_regvals(sd, init_519, ARRAY_SIZE(init_519));
49809d6a
HG		 3205}
3206
f8f20188 3207static void ovfx2_configure(struct sd *sd)
b46aaa02
HG		 3208{
3209 static const struct ov_regvals init_fx2[] = {
3210 { 0x00, 0x60 },
3211 { 0x02, 0x01 },
3212 { 0x0f, 0x1d },
3213 { 0xe9, 0x82 },
3214 { 0xea, 0xc7 },
3215 { 0xeb, 0x10 },
3216 { 0xec, 0xf6 },
3217 };
3218
3219 sd->stopped = 1;
3220
f8f20188 3221 write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
b46aaa02
HG		 3222}
3223
42e142f6
JFM		 3224/* set the mode */
3225/* This function works for ov7660 only */
3226static void ov519_set_mode(struct sd *sd)
3227{
3228 static const struct ov_regvals bridge_ov7660[2][10] = {
3229 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3230 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3231 {0x25, 0x01}, {0x26, 0x00}},
3232 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3233 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3234 {0x25, 0x03}, {0x26, 0x00}}
3235 };
3236 static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3237 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3238 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3239 };
3240 static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3241 {OV7670_R17_HSTART, 0x13},
3242 {OV7670_R18_HSTOP, 0x01},
3243 {OV7670_R32_HREF, 0x92},
3244 {OV7670_R19_VSTART, 0x02},
3245 {OV7670_R1A_VSTOP, 0x7a},
3246 {OV7670_R03_VREF, 0x00},
3247/* {0x33, 0x00}, */
3248/* {0x34, 0x07}, */
3249/* {0x36, 0x00}, */
3250/* {0x6b, 0x0a}, */
3251 };
3252
3253 write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3254 ARRAY_SIZE(bridge_ov7660[0]));
3255 write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3256 ARRAY_SIZE(sensor_ov7660[0]));
3257 write_i2c_regvals(sd, sensor_ov7660_2,
3258 ARRAY_SIZE(sensor_ov7660_2));
3259}
3260
3261/* set the frame rate */
3262/* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3263static void ov519_set_fr(struct sd *sd)
3264{
3265 int fr;
3266 u8 clock;
3267 /* frame rate table with indices:
3268 * - mode = 0: 320x240, 1: 640x480
3269 * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3270 * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3271 */
3272 static const u8 fr_tb[2][6][3] = {
3273 {{0x04, 0xff, 0x00},
3274 {0x04, 0x1f, 0x00},
3275 {0x04, 0x1b, 0x00},
3276 {0x04, 0x15, 0x00},
3277 {0x04, 0x09, 0x00},
3278 {0x04, 0x01, 0x00}},
3279 {{0x0c, 0xff, 0x00},
3280 {0x0c, 0x1f, 0x00},
3281 {0x0c, 0x1b, 0x00},
3282 {0x04, 0xff, 0x01},
3283 {0x04, 0x1f, 0x01},
3284 {0x04, 0x1b, 0x01}},
3285 };
3286
3287 if (frame_rate > 0)
3288 sd->frame_rate = frame_rate;
3289 if (sd->frame_rate >= 30)
3290 fr = 0;
3291 else if (sd->frame_rate >= 25)
3292 fr = 1;
3293 else if (sd->frame_rate >= 20)
3294 fr = 2;
3295 else if (sd->frame_rate >= 15)
3296 fr = 3;
3297 else if (sd->frame_rate >= 10)
3298 fr = 4;
3299 else
3300 fr = 5;
3301 reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3302 reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3303 clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3304 if (sd->sensor == SEN_OV7660)
3305 clock |= 0x80; /* enable double clock */
3306 ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3307}
3308
58c92d37
JFM		 3309static void setautogain(struct gspca_dev *gspca_dev)
3310{
3311 struct sd *sd = (struct sd *) gspca_dev;
3312
3313 i2c_w_mask(sd, 0x13, sd->ctrls[AUTOGAIN].val ? 0x05 : 0x00, 0x05);
3314}
3315
49809d6a
HG		 3316/* this function is called at probe time */
3317static int sd_config(struct gspca_dev *gspca_dev,
3318 const struct usb_device_id *id)
3319{
3320 struct sd *sd = (struct sd *) gspca_dev;
b46aaa02 3321 struct cam *cam = &gspca_dev->cam;
49809d6a 3322
9e4d8258 3323 sd->bridge = id->driver_info & BRIDGE_MASK;
a23acec4 3324 sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
49809d6a
HG		 3325
3326 switch (sd->bridge) {
1876bb92
HG		 3327 case BRIDGE_OV511:
3328 case BRIDGE_OV511PLUS:
7491f785
JFM		 3329 cam->cam_mode = ov511_vga_mode;
3330 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
1876bb92 3331 break;
49809d6a
HG		 3332 case BRIDGE_OV518:
3333 case BRIDGE_OV518PLUS:
7491f785
JFM		 3334 cam->cam_mode = ov518_vga_mode;
3335 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
49809d6a
HG		 3336 break;
3337 case BRIDGE_OV519:
7491f785
JFM		 3338 cam->cam_mode = ov519_vga_mode;
3339 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3340 sd->invert_led = !sd->invert_led;
49809d6a 3341 break;
b46aaa02 3342 case BRIDGE_OVFX2:
7491f785
JFM		 3343 cam->cam_mode = ov519_vga_mode;
3344 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
b46aaa02
HG		 3345 cam->bulk_size = OVFX2_BULK_SIZE;
3346 cam->bulk_nurbs = MAX_NURBS;
3347 cam->bulk = 1;
3348 break;
a511ba94 3349 case BRIDGE_W9968CF:
7491f785
JFM		 3350 cam->cam_mode = w9968cf_vga_mode;
3351 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
a511ba94
HG		 3352 cam->reverse_alts = 1;
3353 break;
49809d6a
HG		 3354 }
3355
7491f785
JFM		 3356 gspca_dev->cam.ctrls = sd->ctrls;
3357 sd->quality = QUALITY_DEF;
c8ef0a5b 3358 sd->frame_rate = 15;
7491f785
JFM		 3359
3360 return 0;
3361}
3362
3363/* this function is called at probe and resume time */
3364static int sd_init(struct gspca_dev *gspca_dev)
3365{
3366 struct sd *sd = (struct sd *) gspca_dev;
3367 struct cam *cam = &gspca_dev->cam;
3368
3369 switch (sd->bridge) {
3370 case BRIDGE_OV511:
3371 case BRIDGE_OV511PLUS:
3372 ov511_configure(gspca_dev);
3373 break;
3374 case BRIDGE_OV518:
3375 case BRIDGE_OV518PLUS:
3376 ov518_configure(gspca_dev);
3377 break;
3378 case BRIDGE_OV519:
3379 ov519_configure(sd);
3380 break;
3381 case BRIDGE_OVFX2:
3382 ovfx2_configure(sd);
3383 break;
3384 case BRIDGE_W9968CF:
3385 w9968cf_configure(sd);
3386 break;
3387 }
6a7eba24 3388
6a7eba24
JFM		 3389 /* The OV519 must be more aggressive about sensor detection since
3390 * I2C write will never fail if the sensor is not present. We have
3391 * to try to initialize the sensor to detect its presence */
7bbe6b8d 3392 sd->sensor = -1;
229bb7dc
HG		 3393
3394 /* Test for 76xx */
3395 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
f8f20188
JFM		 3396 ov7xx0_configure(sd);
3397
229bb7dc
HG		 3398 /* Test for 6xx0 */
3399 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
f8f20188
JFM		 3400 ov6xx0_configure(sd);
3401
229bb7dc
HG		 3402 /* Test for 8xx0 */
3403 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
f8f20188
JFM		 3404 ov8xx0_configure(sd);
3405
635118d5
HG		 3406 /* Test for 3xxx / 2xxx */
3407 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
f8f20188 3408 ov_hires_configure(sd);
229bb7dc 3409 } else {
0b656321 3410 err("Can't determine sensor slave IDs");
229bb7dc 3411 goto error;
6a7eba24
JFM		 3412 }
3413
7bbe6b8d
JFM		 3414 if (sd->sensor < 0)
3415 goto error;
3416
7491f785
JFM		 3417 ov51x_led_control(sd, 0); /* turn LED off */
3418
49809d6a 3419 switch (sd->bridge) {
1876bb92
HG		 3420 case BRIDGE_OV511:
3421 case BRIDGE_OV511PLUS:
7491f785 3422 if (sd->sif) {
1876bb92
HG		 3423 cam->cam_mode = ov511_sif_mode;
3424 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3425 }
3426 break;
49809d6a
HG		 3427 case BRIDGE_OV518:
3428 case BRIDGE_OV518PLUS:
7491f785 3429 if (sd->sif) {
49809d6a
HG		 3430 cam->cam_mode = ov518_sif_mode;
3431 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3432 }
3433 break;
3434 case BRIDGE_OV519:
7491f785 3435 if (sd->sif) {
49809d6a
HG		 3436 cam->cam_mode = ov519_sif_mode;
3437 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3438 }
3439 break;
635118d5 3440 case BRIDGE_OVFX2:
07c6c9c6
JFM		 3441 switch (sd->sensor) {
3442 case SEN_OV2610:
3443 case SEN_OV2610AE:
635118d5
HG		 3444 cam->cam_mode = ovfx2_ov2610_mode;
3445 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
07c6c9c6
JFM		 3446 break;
3447 case SEN_OV3610:
635118d5
HG		 3448 cam->cam_mode = ovfx2_ov3610_mode;
3449 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
07c6c9c6 3450 break;
798ae150
JFM		 3451 case SEN_OV9600:
3452 cam->cam_mode = ovfx2_ov9600_mode;
3453 cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3454 break;
07c6c9c6
JFM		 3455 default:
3456 if (sd->sif) {
3457 cam->cam_mode = ov519_sif_mode;
3458 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3459 }
3460 break;
635118d5
HG		 3461 }
3462 break;
a511ba94 3463 case BRIDGE_W9968CF:
79b35902 3464 if (sd->sif)
7491f785 3465 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
a511ba94
HG		 3466
3467 /* w9968cf needs initialisation once the sensor is known */
f8f20188 3468 w9968cf_init(sd);
a511ba94 3469 break;
6a7eba24 3470 }
83db7688
JFM		 3471
3472 gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
02ab18b0 3473
4202f71c
JFM		 3474 /* initialize the sensor */
3475 switch (sd->sensor) {
635118d5 3476 case SEN_OV2610:
f8f20188
JFM		 3477 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3478
635118d5 3479 /* Enable autogain, autoexpo, awb, bandfilter */
f8f20188 3480 i2c_w_mask(sd, 0x13, 0x27, 0x27);
635118d5 3481 break;
07c6c9c6
JFM		 3482 case SEN_OV2610AE:
3483 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3484
3485 /* enable autoexpo */
3486 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3487 break;
635118d5 3488 case SEN_OV3610:
f8f20188
JFM		 3489 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3490
635118d5 3491 /* Enable autogain, autoexpo, awb, bandfilter */
f8f20188 3492 i2c_w_mask(sd, 0x13, 0x27, 0x27);
635118d5 3493 break;
4202f71c 3494 case SEN_OV6620:
f8f20188 3495 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
4202f71c
JFM		 3496 break;
3497 case SEN_OV6630:
7d971373 3498 case SEN_OV66308AF:
62833acd
JFM		 3499 sd->ctrls[CONTRAST].def = 200;
3500 /* The default is too low for the ov6630 */
f8f20188 3501 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
4202f71c
JFM		 3502 break;
3503 default:
3504/* case SEN_OV7610: */
3505/* case SEN_OV76BE: */
f8f20188
JFM		 3506 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3507 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
4202f71c
JFM		 3508 break;
3509 case SEN_OV7620:
859cc470 3510 case SEN_OV7620AE:
f8f20188 3511 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
4202f71c
JFM		 3512 break;
3513 case SEN_OV7640:
035d3a3d 3514 case SEN_OV7648:
f8f20188 3515 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
4202f71c 3516 break;
42e142f6
JFM		 3517 case SEN_OV7660:
3518 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3519 msleep(14);
3520 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3521 write_regvals(sd, init_519_ov7660,
3522 ARRAY_SIZE(init_519_ov7660));
3523 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3524 sd->gspca_dev.curr_mode = 1; /* 640x480 */
42e142f6
JFM		 3525 ov519_set_mode(sd);
3526 ov519_set_fr(sd);
3527 sd->ctrls[COLORS].max = 4; /* 0..4 */
3528 sd->ctrls[COLORS].val =
3529 sd->ctrls[COLORS].def = 2;
3530 setcolors(gspca_dev);
3531 sd->ctrls[CONTRAST].max = 6; /* 0..6 */
3532 sd->ctrls[CONTRAST].val =
3533 sd->ctrls[CONTRAST].def = 3;
3534 setcontrast(gspca_dev);
3535 sd->ctrls[BRIGHTNESS].max = 6; /* 0..6 */
3536 sd->ctrls[BRIGHTNESS].val =
3537 sd->ctrls[BRIGHTNESS].def = 3;
3538 setbrightness(gspca_dev);
3539 sd_reset_snapshot(gspca_dev);
3540 ov51x_restart(sd);
3541 ov51x_stop(sd); /* not in win traces */
3542 ov51x_led_control(sd, 0);
3543 break;
4202f71c 3544 case SEN_OV7670:
62833acd
JFM		 3545 sd->ctrls[FREQ].max = 3; /* auto */
3546 sd->ctrls[FREQ].def = 3;
f8f20188 3547 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
4202f71c
JFM		 3548 break;
3549 case SEN_OV8610:
f8f20188 3550 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
4202f71c 3551 break;
798ae150
JFM		 3552 case SEN_OV9600:
3553 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3554
3555 /* enable autoexpo */
3556/* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3557 break;
4202f71c 3558 }
f8f20188 3559 return gspca_dev->usb_err;
7491f785
JFM		 3560error:
3561 PDEBUG(D_ERR, "OV519 Config failed");
3562 return -EINVAL;
6a7eba24
JFM		 3563}
3564
c42cedbb
JFM		 3565/* function called at start time before URB creation */
3566static int sd_isoc_init(struct gspca_dev *gspca_dev)
3567{
3568 struct sd *sd = (struct sd *) gspca_dev;
3569
3570 switch (sd->bridge) {
3571 case BRIDGE_OVFX2:
9cf208e8 3572 if (gspca_dev->width != 800)
c42cedbb
JFM		 3573 gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3574 else
3575 gspca_dev->cam.bulk_size = 7 * 4096;
3576 break;
3577 }
3578 return 0;
3579}
3580
1876bb92
HG		 3581/* Set up the OV511/OV511+ with the given image parameters.
3582 *
3583 * Do not put any sensor-specific code in here (including I2C I/O functions)
3584 */
f8f20188 3585static void ov511_mode_init_regs(struct sd *sd)
1876bb92
HG		 3586{
3587 int hsegs, vsegs, packet_size, fps, needed;
3588 int interlaced = 0;
3589 struct usb_host_interface *alt;
3590 struct usb_interface *intf;
3591
3592 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3593 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3594 if (!alt) {
0b656321 3595 err("Couldn't get altsetting");
f8f20188
JFM		 3596 sd->gspca_dev.usb_err = -EIO;
3597 return;
1876bb92
HG		 3598 }
3599
3600 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3601 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3602
3603 reg_w(sd, R511_CAM_UV_EN, 0x01);
3604 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3605 reg_w(sd, R511_SNAP_OPTS, 0x03);
3606
3607 /* Here I'm assuming that snapshot size == image size.
3608 * I hope that's always true. --claudio
3609 */
3610 hsegs = (sd->gspca_dev.width >> 3) - 1;
3611 vsegs = (sd->gspca_dev.height >> 3) - 1;
3612
3613 reg_w(sd, R511_CAM_PXCNT, hsegs);
3614 reg_w(sd, R511_CAM_LNCNT, vsegs);
3615 reg_w(sd, R511_CAM_PXDIV, 0x00);
3616 reg_w(sd, R511_CAM_LNDIV, 0x00);
3617
3618 /* YUV420, low pass filter on */
3619 reg_w(sd, R511_CAM_OPTS, 0x03);
3620
3621 /* Snapshot additions */
3622 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3623 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3624 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3625 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3626
3627 /******** Set the framerate ********/
3628 if (frame_rate > 0)
3629 sd->frame_rate = frame_rate;
3630
3631 switch (sd->sensor) {
3632 case SEN_OV6620:
3633 /* No framerate control, doesn't like higher rates yet */
3634 sd->clockdiv = 3;
3635 break;
3636
3637 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3638 for more sensors we need to do this for them too */
3639 case SEN_OV7620:
859cc470 3640 case SEN_OV7620AE:
1876bb92 3641 case SEN_OV7640:
035d3a3d 3642 case SEN_OV7648:
b282d873 3643 case SEN_OV76BE:
1876bb92
HG		 3644 if (sd->gspca_dev.width == 320)
3645 interlaced = 1;
3646 /* Fall through */
3647 case SEN_OV6630:
1876bb92
HG		 3648 case SEN_OV7610:
3649 case SEN_OV7670:
3650 switch (sd->frame_rate) {
3651 case 30:
3652 case 25:
3653 /* Not enough bandwidth to do 640x480 @ 30 fps */
3654 if (sd->gspca_dev.width != 640) {
3655 sd->clockdiv = 0;
3656 break;
3657 }
3658 /* Fall through for 640x480 case */
3659 default:
3660/* case 20: */
3661/* case 15: */
3662 sd->clockdiv = 1;
3663 break;
3664 case 10:
3665 sd->clockdiv = 2;
3666 break;
3667 case 5:
3668 sd->clockdiv = 5;
3669 break;
3670 }
3671 if (interlaced) {
3672 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3673 /* Higher then 10 does not work */
3674 if (sd->clockdiv > 10)
3675 sd->clockdiv = 10;
3676 }
3677 break;
3678
3679 case SEN_OV8610:
3680 /* No framerate control ?? */
3681 sd->clockdiv = 0;
3682 break;
3683 }
3684
3685 /* Check if we have enough bandwidth to disable compression */
3686 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3687 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3688 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3689 if (needed > 1400 * packet_size) {
3690 /* Enable Y and UV quantization and compression */
3691 reg_w(sd, R511_COMP_EN, 0x07);
3692 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3693 } else {
3694 reg_w(sd, R511_COMP_EN, 0x06);
3695 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3696 }
3697
3698 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3699 reg_w(sd, R51x_SYS_RESET, 0);
1876bb92
HG		 3700}
3701
49809d6a
HG		 3702/* Sets up the OV518/OV518+ with the given image parameters
3703 *
3704 * OV518 needs a completely different approach, until we can figure out what
3705 * the individual registers do. Also, only 15 FPS is supported now.
3706 *
3707 * Do not put any sensor-specific code in here (including I2C I/O functions)
3708 */
f8f20188 3709static void ov518_mode_init_regs(struct sd *sd)
49809d6a 3710{
b282d873
HG		 3711 int hsegs, vsegs, packet_size;
3712 struct usb_host_interface *alt;
3713 struct usb_interface *intf;
3714
3715 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3716 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3717 if (!alt) {
0b656321 3718 err("Couldn't get altsetting");
f8f20188
JFM		 3719 sd->gspca_dev.usb_err = -EIO;
3720 return;
b282d873
HG		 3721 }
3722
3723 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3724 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
49809d6a
HG		 3725
3726 /******** Set the mode ********/
49809d6a
HG		 3727 reg_w(sd, 0x2b, 0);
3728 reg_w(sd, 0x2c, 0);
3729 reg_w(sd, 0x2d, 0);
3730 reg_w(sd, 0x2e, 0);
3731 reg_w(sd, 0x3b, 0);
3732 reg_w(sd, 0x3c, 0);
3733 reg_w(sd, 0x3d, 0);
3734 reg_w(sd, 0x3e, 0);
3735
3736 if (sd->bridge == BRIDGE_OV518) {
3737 /* Set 8-bit (YVYU) input format */
3738 reg_w_mask(sd, 0x20, 0x08, 0x08);
3739
3740 /* Set 12-bit (4:2:0) output format */
3741 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3742 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3743 } else {
3744 reg_w(sd, 0x28, 0x80);
3745 reg_w(sd, 0x38, 0x80);
3746 }
3747
3748 hsegs = sd->gspca_dev.width / 16;
3749 vsegs = sd->gspca_dev.height / 4;
3750
3751 reg_w(sd, 0x29, hsegs);
3752 reg_w(sd, 0x2a, vsegs);
3753
3754 reg_w(sd, 0x39, hsegs);
3755 reg_w(sd, 0x3a, vsegs);
3756
3757 /* Windows driver does this here; who knows why */
3758 reg_w(sd, 0x2f, 0x80);
3759
87bae740 3760 /******** Set the framerate ********/
b282d873 3761 sd->clockdiv = 1;
49809d6a
HG		 3762
3763 /* Mode independent, but framerate dependent, regs */
b282d873
HG		 3764 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3765 reg_w(sd, 0x51, 0x04);
49809d6a
HG		 3766 reg_w(sd, 0x22, 0x18);
3767 reg_w(sd, 0x23, 0xff);
3768
b282d873
HG		 3769 if (sd->bridge == BRIDGE_OV518PLUS) {
3770 switch (sd->sensor) {
859cc470 3771 case SEN_OV7620AE:
b282d873
HG		 3772 if (sd->gspca_dev.width == 320) {
3773 reg_w(sd, 0x20, 0x00);
3774 reg_w(sd, 0x21, 0x19);
3775 } else {
3776 reg_w(sd, 0x20, 0x60);
3777 reg_w(sd, 0x21, 0x1f);
3778 }
3779 break;
859cc470
HG		 3780 case SEN_OV7620:
3781 reg_w(sd, 0x20, 0x00);
3782 reg_w(sd, 0x21, 0x19);
3783 break;
b282d873
HG		 3784 default:
3785 reg_w(sd, 0x21, 0x19);
3786 }
3787 } else
49809d6a
HG		 3788 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3789
3790 /* FIXME: Sensor-specific */
3791 /* Bit 5 is what matters here. Of course, it is "reserved" */
3792 i2c_w(sd, 0x54, 0x23);
3793
3794 reg_w(sd, 0x2f, 0x80);
3795
3796 if (sd->bridge == BRIDGE_OV518PLUS) {
3797 reg_w(sd, 0x24, 0x94);
3798 reg_w(sd, 0x25, 0x90);
3799 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3800 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3801 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3802 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3803 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3804 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3805 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3806 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3807 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3808 } else {
3809 reg_w(sd, 0x24, 0x9f);
3810 reg_w(sd, 0x25, 0x90);
3811 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3812 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3813 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3814 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3815 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3816 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3817 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3818 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3819 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3820 }
3821
3822 reg_w(sd, 0x2f, 0x80);
49809d6a
HG		 3823}
3824
6a7eba24
JFM		 3825/* Sets up the OV519 with the given image parameters
3826 *
3827 * OV519 needs a completely different approach, until we can figure out what
3828 * the individual registers do.
3829 *
3830 * Do not put any sensor-specific code in here (including I2C I/O functions)
3831 */
f8f20188 3832static void ov519_mode_init_regs(struct sd *sd)
6a7eba24 3833{
a5ae2062 3834 static const struct ov_regvals mode_init_519_ov7670[] = {
6a7eba24
JFM		 3835 { 0x5d, 0x03 }, /* Turn off suspend mode */
3836 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
21867803 3837 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
6a7eba24
JFM		 3838 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3839 { 0xa3, 0x18 },
3840 { 0xa4, 0x04 },
3841 { 0xa5, 0x28 },
3842 { 0x37, 0x00 }, /* SetUsbInit */
3843 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3844 /* Enable both fields, YUV Input, disable defect comp (why?) */
3845 { 0x20, 0x0c },
3846 { 0x21, 0x38 },
3847 { 0x22, 0x1d },
3848 { 0x17, 0x50 }, /* undocumented */
3849 { 0x37, 0x00 }, /* undocumented */
3850 { 0x40, 0xff }, /* I2C timeout counter */
3851 { 0x46, 0x00 }, /* I2C clock prescaler */
3852 { 0x59, 0x04 }, /* new from windrv 090403 */
3853 { 0xff, 0x00 }, /* undocumented */
3854 /* windows reads 0x55 at this point, why? */
3855 };
3856
a5ae2062 3857 static const struct ov_regvals mode_init_519[] = {
6a7eba24
JFM		 3858 { 0x5d, 0x03 }, /* Turn off suspend mode */
3859 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
21867803 3860 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
6a7eba24
JFM		 3861 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3862 { 0xa3, 0x18 },
3863 { 0xa4, 0x04 },
3864 { 0xa5, 0x28 },
3865 { 0x37, 0x00 }, /* SetUsbInit */
3866 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3867 /* Enable both fields, YUV Input, disable defect comp (why?) */
3868 { 0x22, 0x1d },
3869 { 0x17, 0x50 }, /* undocumented */
3870 { 0x37, 0x00 }, /* undocumented */
3871 { 0x40, 0xff }, /* I2C timeout counter */
3872 { 0x46, 0x00 }, /* I2C clock prescaler */
3873 { 0x59, 0x04 }, /* new from windrv 090403 */
3874 { 0xff, 0x00 }, /* undocumented */
3875 /* windows reads 0x55 at this point, why? */
3876 };
3877
6a7eba24 3878 /******** Set the mode ********/
42e142f6
JFM		 3879 switch (sd->sensor) {
3880 default:
f8f20188 3881 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
035d3a3d
HG		 3882 if (sd->sensor == SEN_OV7640 ||
3883 sd->sensor == SEN_OV7648) {
594f5b8b 3884 /* Select 8-bit input mode */
ac40b1fa 3885 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
594f5b8b 3886 }
42e142f6
JFM		 3887 break;
3888 case SEN_OV7660:
3889 return; /* done by ov519_set_mode/fr() */
3890 case SEN_OV7670:
f8f20188
JFM		 3891 write_regvals(sd, mode_init_519_ov7670,
3892 ARRAY_SIZE(mode_init_519_ov7670));
42e142f6 3893 break;
6a7eba24
JFM		 3894 }
3895
ac40b1fa
JFM		 3896 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3897 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
80142efa
HG		 3898 if (sd->sensor == SEN_OV7670 &&
3899 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3900 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
035d3a3d
HG		 3901 else if (sd->sensor == SEN_OV7648 &&
3902 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3903 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
80142efa
HG		 3904 else
3905 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
ac40b1fa
JFM		 3906 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3907 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3908 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3909 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3910 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
6a7eba24
JFM		 3911 reg_w(sd, 0x26, 0x00); /* Undocumented */
3912
3913 /******** Set the framerate ********/
3914 if (frame_rate > 0)
3915 sd->frame_rate = frame_rate;
3916
3917/* FIXME: These are only valid at the max resolution. */
3918 sd->clockdiv = 0;
594f5b8b
JFM		 3919 switch (sd->sensor) {
3920 case SEN_OV7640:
035d3a3d 3921 case SEN_OV7648:
6a7eba24 3922 switch (sd->frame_rate) {
53e74515
JFM		 3923 default:
3924/* case 30: */
6a7eba24
JFM		 3925 reg_w(sd, 0xa4, 0x0c);
3926 reg_w(sd, 0x23, 0xff);
3927 break;
3928 case 25:
3929 reg_w(sd, 0xa4, 0x0c);
3930 reg_w(sd, 0x23, 0x1f);
3931 break;
3932 case 20:
3933 reg_w(sd, 0xa4, 0x0c);
3934 reg_w(sd, 0x23, 0x1b);
3935 break;
53e74515 3936 case 15:
6a7eba24
JFM		 3937 reg_w(sd, 0xa4, 0x04);
3938 reg_w(sd, 0x23, 0xff);
3939 sd->clockdiv = 1;
3940 break;
3941 case 10:
3942 reg_w(sd, 0xa4, 0x04);
3943 reg_w(sd, 0x23, 0x1f);
3944 sd->clockdiv = 1;
3945 break;
3946 case 5:
3947 reg_w(sd, 0xa4, 0x04);
3948 reg_w(sd, 0x23, 0x1b);
3949 sd->clockdiv = 1;
3950 break;
3951 }
594f5b8b
JFM		 3952 break;
3953 case SEN_OV8610:
6a7eba24
JFM		 3954 switch (sd->frame_rate) {
3955 default: /* 15 fps */
3956/* case 15: */
3957 reg_w(sd, 0xa4, 0x06);
3958 reg_w(sd, 0x23, 0xff);
3959 break;
3960 case 10:
3961 reg_w(sd, 0xa4, 0x06);
3962 reg_w(sd, 0x23, 0x1f);
3963 break;
3964 case 5:
3965 reg_w(sd, 0xa4, 0x06);
3966 reg_w(sd, 0x23, 0x1b);
3967 break;
3968 }
594f5b8b
JFM		 3969 break;
3970 case SEN_OV7670: /* guesses, based on 7640 */
6a7eba24
JFM		 3971 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3972 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
594f5b8b 3973 reg_w(sd, 0xa4, 0x10);
6a7eba24
JFM		 3974 switch (sd->frame_rate) {
3975 case 30:
6a7eba24
JFM		 3976 reg_w(sd, 0x23, 0xff);
3977 break;
3978 case 20:
6a7eba24
JFM		 3979 reg_w(sd, 0x23, 0x1b);
3980 break;
594f5b8b
JFM		 3981 default:
3982/* case 15: */
6a7eba24
JFM		 3983 reg_w(sd, 0x23, 0xff);
3984 sd->clockdiv = 1;
3985 break;
3986 }
594f5b8b 3987 break;
6a7eba24 3988 }
6a7eba24
JFM		 3989}
3990
f8f20188 3991static void mode_init_ov_sensor_regs(struct sd *sd)
6a7eba24 3992{
594f5b8b 3993 struct gspca_dev *gspca_dev;
ebbb5c3e 3994 int qvga, xstart, xend, ystart, yend;
9d1593a8 3995 u8 v;
594f5b8b
JFM		 3996
3997 gspca_dev = &sd->gspca_dev;
87bae740 3998 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
6a7eba24
JFM		 3999
4000 /******** Mode (VGA/QVGA) and sensor specific regs ********/
4001 switch (sd->sensor) {
635118d5
HG		 4002 case SEN_OV2610:
4003 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4004 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4005 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
4006 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
4007 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4008 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4009 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
f8f20188 4010 return;
07c6c9c6
JFM		 4011 case SEN_OV2610AE: {
4012 u8 v;
4013
4014 /* frame rates:
4015 * 10fps / 5 fps for 1600x1200
4016 * 40fps / 20fps for 800x600
4017 */
4018 v = 80;
4019 if (qvga) {
4020 if (sd->frame_rate < 25)
4021 v = 0x81;
4022 } else {
4023 if (sd->frame_rate < 10)
4024 v = 0x81;
4025 }
4026 i2c_w(sd, 0x11, v);
4027 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
4028 return;
4029 }
ebbb5c3e 4030 case SEN_OV3610:
635118d5
HG		 4031 if (qvga) {
4032 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
b46aaa02 4033 ystart = (776 - gspca_dev->height) / 2;
635118d5 4034 } else {
b46aaa02 4035 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
635118d5
HG		 4036 ystart = (1544 - gspca_dev->height) / 2;
4037 }
4038 xend = xstart + gspca_dev->width;
4039 yend = ystart + gspca_dev->height;
4040 /* Writing to the COMH register resets the other windowing regs
4041 to their default values, so we must do this first. */
4042 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
4043 i2c_w_mask(sd, 0x32,
4044 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
4045 0x3f);
4046 i2c_w_mask(sd, 0x03,
4047 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
4048 0x0f);
4049 i2c_w(sd, 0x17, xstart >> 4);
4050 i2c_w(sd, 0x18, xend >> 4);
4051 i2c_w(sd, 0x19, ystart >> 3);
4052 i2c_w(sd, 0x1a, yend >> 3);
f8f20188 4053 return;
6a7eba24
JFM		 4054 case SEN_OV8610:
4055 /* For OV8610 qvga means qsvga */
4056 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
ebbb5c3e
HG		 4057 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4058 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4059 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
4060 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
6a7eba24
JFM		 4061 break;
4062 case SEN_OV7610:
4063 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
780e3121 4064 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
ebbb5c3e
HG		 4065 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4066 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
6a7eba24
JFM		 4067 break;
4068 case SEN_OV7620:
859cc470 4069 case SEN_OV7620AE:
b282d873 4070 case SEN_OV76BE:
6a7eba24
JFM		 4071 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4072 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4073 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
4074 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
4075 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
b282d873 4076 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
6a7eba24 4077 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
ebbb5c3e
HG		 4078 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4079 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4080 if (sd->sensor == SEN_OV76BE)
4081 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
6a7eba24 4082 break;
6a7eba24 4083 case SEN_OV7640:
035d3a3d 4084 case SEN_OV7648:
6a7eba24
JFM		 4085 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4086 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
8d0082fa
HG		 4087 /* Setting this undocumented bit in qvga mode removes a very
4088 annoying vertical shaking of the image */
035d3a3d 4089 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
8d0082fa 4090 /* Unknown */
035d3a3d 4091 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
8d0082fa 4092 /* Allow higher automatic gain (to allow higher framerates) */
035d3a3d 4093 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
ebbb5c3e 4094 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
6a7eba24
JFM		 4095 break;
4096 case SEN_OV7670:
4097 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4098 * do we need to set anything else?
4099 * HSTART etc are set in set_ov_sensor_window itself */
21867803 4100 i2c_w_mask(sd, OV7670_R12_COM7,
6a7eba24
JFM		 4101 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4102 OV7670_COM7_FMT_MASK);
ebbb5c3e 4103 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
21867803 4104 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
ebbb5c3e
HG		 4105 OV7670_COM8_AWB);
4106 if (qvga) { /* QVGA from ov7670.c by
4107 * Jonathan Corbet */
4108 xstart = 164;
4109 xend = 28;
4110 ystart = 14;
4111 yend = 494;
4112 } else { /* VGA */
4113 xstart = 158;
4114 xend = 14;
4115 ystart = 10;
4116 yend = 490;
4117 }
4118 /* OV7670 hardware window registers are split across
4119 * multiple locations */
21867803
JFM		 4120 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4121 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4122 v = i2c_r(sd, OV7670_R32_HREF);
ebbb5c3e
HG		 4123 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4124 msleep(10); /* need to sleep between read and write to
4125 * same reg! */
21867803 4126 i2c_w(sd, OV7670_R32_HREF, v);
ebbb5c3e 4127
21867803
JFM		 4128 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4129 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4130 v = i2c_r(sd, OV7670_R03_VREF);
ebbb5c3e
HG		 4131 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4132 msleep(10); /* need to sleep between read and write to
4133 * same reg! */
21867803 4134 i2c_w(sd, OV7670_R03_VREF, v);
6a7eba24
JFM		 4135 break;
4136 case SEN_OV6620:
ebbb5c3e
HG		 4137 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4138 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4139 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4140 break;
6a7eba24 4141 case SEN_OV6630:
7d971373 4142 case SEN_OV66308AF:
6a7eba24 4143 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
ebbb5c3e 4144 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
6a7eba24 4145 break;
798ae150
JFM		 4146 case SEN_OV9600: {
4147 const struct ov_i2c_regvals *vals;
4148 static const struct ov_i2c_regvals sxga_15[] = {
4149 {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4150 };
4151 static const struct ov_i2c_regvals sxga_7_5[] = {
4152 {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4153 };
4154 static const struct ov_i2c_regvals vga_30[] = {
4155 {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4156 };
4157 static const struct ov_i2c_regvals vga_15[] = {
4158 {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4159 };
4160
4161 /* frame rates:
4162 * 15fps / 7.5 fps for 1280x1024
4163 * 30fps / 15fps for 640x480
4164 */
4165 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4166 if (qvga)
4167 vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4168 else
4169 vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4170 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4171 return;
4172 }
6a7eba24 4173 default:
f8f20188 4174 return;
6a7eba24
JFM		 4175 }
4176
6a7eba24 4177 /******** Clock programming ********/
ae49c404 4178 i2c_w(sd, 0x11, sd->clockdiv);
6a7eba24
JFM		 4179}
4180
42e142f6 4181/* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
62833acd 4182static void sethvflip(struct gspca_dev *gspca_dev)
0cd6759d 4183{
62833acd
JFM		 4184 struct sd *sd = (struct sd *) gspca_dev;
4185
0cd6759d 4186 if (sd->gspca_dev.streaming)
5927abcb 4187 reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
21867803 4188 i2c_w_mask(sd, OV7670_R1E_MVFP,
62833acd
JFM		 4189 OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
4190 | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
594f5b8b 4191 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
0cd6759d 4192 if (sd->gspca_dev.streaming)
5927abcb 4193 reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
0cd6759d
JFM		 4194}
4195
f8f20188 4196static void set_ov_sensor_window(struct sd *sd)
6a7eba24 4197{
594f5b8b 4198 struct gspca_dev *gspca_dev;
124cc9c0 4199 int qvga, crop;
6a7eba24 4200 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
6a7eba24 4201
635118d5 4202 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
42e142f6
JFM		 4203 switch (sd->sensor) {
4204 case SEN_OV2610:
07c6c9c6 4205 case SEN_OV2610AE:
42e142f6
JFM		 4206 case SEN_OV3610:
4207 case SEN_OV7670:
798ae150 4208 case SEN_OV9600:
f8f20188
JFM		 4209 mode_init_ov_sensor_regs(sd);
4210 return;
42e142f6
JFM		 4211 case SEN_OV7660:
4212 ov519_set_mode(sd);
4213 ov519_set_fr(sd);
4214 return;
f8f20188 4215 }
42e142f6 4216
594f5b8b 4217 gspca_dev = &sd->gspca_dev;
87bae740
JFM		 4218 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4219 crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
594f5b8b 4220
6a7eba24
JFM		 4221 /* The different sensor ICs handle setting up of window differently.
4222 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4223 switch (sd->sensor) {
4224 case SEN_OV8610:
4225 hwsbase = 0x1e;
4226 hwebase = 0x1e;
4227 vwsbase = 0x02;
4228 vwebase = 0x02;
4229 break;
4230 case SEN_OV7610:
4231 case SEN_OV76BE:
4232 hwsbase = 0x38;
4233 hwebase = 0x3a;
4234 vwsbase = vwebase = 0x05;
4235 break;
4236 case SEN_OV6620:
4237 case SEN_OV6630:
7d971373 4238 case SEN_OV66308AF:
6a7eba24
JFM		 4239 hwsbase = 0x38;
4240 hwebase = 0x3a;
4241 vwsbase = 0x05;
4242 vwebase = 0x06;
7d971373 4243 if (sd->sensor == SEN_OV66308AF && qvga)
49809d6a 4244 /* HDG: this fixes U and V getting swapped */
7d971373 4245 hwsbase++;
124cc9c0
HG		 4246 if (crop) {
4247 hwsbase += 8;
4248 hwebase += 8;
4249 vwsbase += 11;
4250 vwebase += 11;
4251 }
6a7eba24
JFM		 4252 break;
4253 case SEN_OV7620:
859cc470 4254 case SEN_OV7620AE:
6a7eba24
JFM		 4255 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
4256 hwebase = 0x2f;
4257 vwsbase = vwebase = 0x05;
4258 break;
4259 case SEN_OV7640:
035d3a3d 4260 case SEN_OV7648:
6a7eba24
JFM		 4261 hwsbase = 0x1a;
4262 hwebase = 0x1a;
4263 vwsbase = vwebase = 0x03;
4264 break;
6a7eba24 4265 default:
f8f20188 4266 return;
6a7eba24
JFM		 4267 }
4268
4269 switch (sd->sensor) {
4270 case SEN_OV6620:
4271 case SEN_OV6630:
7d971373 4272 case SEN_OV66308AF:
594f5b8b 4273 if (qvga) { /* QCIF */
6a7eba24
JFM		 4274 hwscale = 0;
4275 vwscale = 0;
4276 } else { /* CIF */
4277 hwscale = 1;
4278 vwscale = 1; /* The datasheet says 0;
4279 * it's wrong */
4280 }
4281 break;
4282 case SEN_OV8610:
594f5b8b 4283 if (qvga) { /* QSVGA */
6a7eba24
JFM		 4284 hwscale = 1;
4285 vwscale = 1;
4286 } else { /* SVGA */
4287 hwscale = 2;
4288 vwscale = 2;
4289 }
4290 break;
4291 default: /* SEN_OV7xx0 */
594f5b8b 4292 if (qvga) { /* QVGA */
6a7eba24
JFM		 4293 hwscale = 1;
4294 vwscale = 0;
4295 } else { /* VGA */
4296 hwscale = 2;
4297 vwscale = 1;
4298 }
4299 }
4300
f8f20188 4301 mode_init_ov_sensor_regs(sd);
6a7eba24 4302
ebbb5c3e 4303 i2c_w(sd, 0x17, hwsbase);
a511ba94 4304 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
ebbb5c3e 4305 i2c_w(sd, 0x19, vwsbase);
a511ba94 4306 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
6a7eba24
JFM		 4307}
4308
6a7eba24 4309/* -- start the camera -- */
72ab97ce 4310static int sd_start(struct gspca_dev *gspca_dev)
6a7eba24
JFM		 4311{
4312 struct sd *sd = (struct sd *) gspca_dev;
6a7eba24 4313
a511ba94
HG		 4314 /* Default for most bridges, allow bridge_mode_init_regs to override */
4315 sd->sensor_width = sd->gspca_dev.width;
4316 sd->sensor_height = sd->gspca_dev.height;
4317
49809d6a 4318 switch (sd->bridge) {
1876bb92
HG		 4319 case BRIDGE_OV511:
4320 case BRIDGE_OV511PLUS:
f8f20188 4321 ov511_mode_init_regs(sd);
1876bb92 4322 break;
49809d6a
HG		 4323 case BRIDGE_OV518:
4324 case BRIDGE_OV518PLUS:
f8f20188 4325 ov518_mode_init_regs(sd);
49809d6a
HG		 4326 break;
4327 case BRIDGE_OV519:
f8f20188 4328 ov519_mode_init_regs(sd);
49809d6a 4329 break;
b46aaa02 4330 /* case BRIDGE_OVFX2: nothing to do */
a511ba94 4331 case BRIDGE_W9968CF:
f8f20188 4332 w9968cf_mode_init_regs(sd);
a511ba94 4333 break;
49809d6a 4334 }
49809d6a 4335
f8f20188 4336 set_ov_sensor_window(sd);
6a7eba24 4337
e2817029
JFM		 4338 if (!(sd->gspca_dev.ctrl_dis & (1 << CONTRAST)))
4339 setcontrast(gspca_dev);
4340 if (!(sd->gspca_dev.ctrl_dis & (1 << BRIGHTNESS)))
4341 setbrightness(gspca_dev);
58c92d37
JFM		 4342 if (!(sd->gspca_dev.ctrl_dis & (1 << EXPOSURE)))
4343 setexposure(gspca_dev);
e2817029
JFM		 4344 if (!(sd->gspca_dev.ctrl_dis & (1 << COLORS)))
4345 setcolors(gspca_dev);
4346 if (!(sd->gspca_dev.ctrl_dis & ((1 << HFLIP) | (1 << VFLIP))))
4347 sethvflip(gspca_dev);
4348 if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOBRIGHT)))
4349 setautobright(gspca_dev);
58c92d37
JFM		 4350 if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOGAIN)))
4351 setautogain(gspca_dev);
e2817029
JFM		 4352 if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
4353 setfreq_i(sd);
49809d6a 4354
417a4d26
HG		 4355 /* Force clear snapshot state in case the snapshot button was
4356 pressed while we weren't streaming */
4357 sd->snapshot_needs_reset = 1;
4358 sd_reset_snapshot(gspca_dev);
417a4d26 4359
d6b6d7ae
HG		 4360 sd->first_frame = 3;
4361
f8f20188 4362 ov51x_restart(sd);
6a7eba24 4363 ov51x_led_control(sd, 1);
f8f20188 4364 return gspca_dev->usb_err;
6a7eba24
JFM		 4365}
4366
4367static void sd_stopN(struct gspca_dev *gspca_dev)
4368{
ac40b1fa
JFM		 4369 struct sd *sd = (struct sd *) gspca_dev;
4370
4371 ov51x_stop(sd);
4372 ov51x_led_control(sd, 0);
6a7eba24
JFM		 4373}
4374
79b35902
HG		 4375static void sd_stop0(struct gspca_dev *gspca_dev)
4376{
4377 struct sd *sd = (struct sd *) gspca_dev;
4378
d65174c0
JFM		 4379 if (!sd->gspca_dev.present)
4380 return;
79b35902
HG		 4381 if (sd->bridge == BRIDGE_W9968CF)
4382 w9968cf_stop0(sd);
614d0691 4383
14653e64 4384#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
614d0691
HG		 4385 /* If the last button state is pressed, release it now! */
4386 if (sd->snapshot_pressed) {
4387 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4388 input_sync(gspca_dev->input_dev);
4389 sd->snapshot_pressed = 0;
4390 }
4391#endif
b4e96ea3
JFM		 4392 if (sd->bridge == BRIDGE_OV519)
4393 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
79b35902
HG		 4394}
4395
92e232ac
HG		 4396static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4397{
4398 struct sd *sd = (struct sd *) gspca_dev;
4399
4400 if (sd->snapshot_pressed != state) {
2856643e 4401#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
92e232ac
HG		 4402 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4403 input_sync(gspca_dev->input_dev);
4404#endif
4405 if (state)
4406 sd->snapshot_needs_reset = 1;
4407
4408 sd->snapshot_pressed = state;
4409 } else {
88e8d20a
HG		 4410 /* On the ov511 / ov519 we need to reset the button state
4411 multiple times, as resetting does not work as long as the
4412 button stays pressed */
4413 switch (sd->bridge) {
4414 case BRIDGE_OV511:
4415 case BRIDGE_OV511PLUS:
4416 case BRIDGE_OV519:
4417 if (state)
4418 sd->snapshot_needs_reset = 1;
4419 break;
4420 }
92e232ac
HG		 4421 }
4422}
4423
1876bb92 4424static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
76dd272b
JFM		 4425 u8 *in, /* isoc packet */
4426 int len) /* iso packet length */
1876bb92
HG		 4427{
4428 struct sd *sd = (struct sd *) gspca_dev;
4429
4430 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4431 * byte non-zero. The EOF packet has image width/height in the
4432 * 10th and 11th bytes. The 9th byte is given as follows:
4433 *
4434 * bit 7: EOF
4435 * 6: compression enabled
4436 * 5: 422/420/400 modes
4437 * 4: 422/420/400 modes
4438 * 3: 1
4439 * 2: snapshot button on
4440 * 1: snapshot frame
4441 * 0: even/odd field
4442 */
4443 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4444 (in[8] & 0x08)) {
88e8d20a 4445 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
1876bb92
HG		 4446 if (in[8] & 0x80) {
4447 /* Frame end */
4448 if ((in[9] + 1) * 8 != gspca_dev->width ||
4449 (in[10] + 1) * 8 != gspca_dev->height) {
4450 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4451 " requested: %dx%d\n",
4452 (in[9] + 1) * 8, (in[10] + 1) * 8,
4453 gspca_dev->width, gspca_dev->height);
4454 gspca_dev->last_packet_type = DISCARD_PACKET;
4455 return;
4456 }
25985edc 4457 /* Add 11 byte footer to frame, might be useful */
76dd272b 4458 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
1876bb92
HG		 4459 return;
4460 } else {
4461 /* Frame start */
76dd272b 4462 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
1876bb92
HG		 4463 sd->packet_nr = 0;
4464 }
4465 }
4466
4467 /* Ignore the packet number */
4468 len--;
4469
4470 /* intermediate packet */
76dd272b 4471 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
1876bb92
HG		 4472}
4473
49809d6a 4474static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
76dd272b 4475 u8 *data, /* isoc packet */
49809d6a
HG		 4476 int len) /* iso packet length */
4477{
92918a53 4478 struct sd *sd = (struct sd *) gspca_dev;
49809d6a
HG		 4479
4480 /* A false positive here is likely, until OVT gives me
4481 * the definitive SOF/EOF format */
4482 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
92e232ac 4483 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
76dd272b
JFM		 4484 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4485 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
92918a53
HG		 4486 sd->packet_nr = 0;
4487 }
4488
4489 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4490 return;
4491
4492 /* Does this device use packet numbers ? */
4493 if (len & 7) {
4494 len--;
4495 if (sd->packet_nr == data[len])
4496 sd->packet_nr++;
4497 /* The last few packets of the frame (which are all 0's
4498 except that they may contain part of the footer), are
4499 numbered 0 */
4500 else if (sd->packet_nr == 0 || data[len]) {
4501 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4502 (int)data[len], (int)sd->packet_nr);
4503 gspca_dev->last_packet_type = DISCARD_PACKET;
4504 return;
4505 }
49809d6a
HG		 4506 }
4507
4508 /* intermediate packet */
76dd272b 4509 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
49809d6a
HG		 4510}
4511
4512static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
76dd272b 4513 u8 *data, /* isoc packet */
6a7eba24
JFM		 4514 int len) /* iso packet length */
4515{
4516 /* Header of ov519 is 16 bytes:
4517 * Byte Value Description
4518 * 0 0xff magic
4519 * 1 0xff magic
4520 * 2 0xff magic
4521 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4522 * 9 0xXX 0x01 initial frame without data,
4523 * 0x00 standard frame with image
4524 * 14 Lo in EOF: length of image data / 8
4525 * 15 Hi
4526 */
4527
4528 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4529 switch (data[3]) {
4530 case 0x50: /* start of frame */
417a4d26
HG		 4531 /* Don't check the button state here, as the state
4532 usually (always ?) changes at EOF and checking it
4533 here leads to unnecessary snapshot state resets. */
6a7eba24
JFM		 4534#define HDRSZ 16
4535 data += HDRSZ;
4536 len -= HDRSZ;
4537#undef HDRSZ
4538 if (data[0] == 0xff || data[1] == 0xd8)
76dd272b 4539 gspca_frame_add(gspca_dev, FIRST_PACKET,
6a7eba24
JFM		 4540 data, len);
4541 else
4542 gspca_dev->last_packet_type = DISCARD_PACKET;
4543 return;
4544 case 0x51: /* end of frame */
92e232ac 4545 ov51x_handle_button(gspca_dev, data[11] & 1);
6a7eba24
JFM		 4546 if (data[9] != 0)
4547 gspca_dev->last_packet_type = DISCARD_PACKET;
76dd272b
JFM		 4548 gspca_frame_add(gspca_dev, LAST_PACKET,
4549 NULL, 0);
6a7eba24
JFM		 4550 return;
4551 }
4552 }
4553
4554 /* intermediate packet */
76dd272b 4555 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
6a7eba24
JFM		 4556}
4557
b46aaa02 4558static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
76dd272b 4559 u8 *data, /* isoc packet */
b46aaa02
HG		 4560 int len) /* iso packet length */
4561{
d6b6d7ae 4562 struct sd *sd = (struct sd *) gspca_dev;
d6b6d7ae
HG		 4563
4564 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4565
b46aaa02 4566 /* A short read signals EOF */
9d2b9095 4567 if (len < gspca_dev->cam.bulk_size) {
d6b6d7ae
HG		 4568 /* If the frame is short, and it is one of the first ones
4569 the sensor and bridge are still syncing, so drop it. */
4570 if (sd->first_frame) {
4571 sd->first_frame--;
b192ca98
JFM		 4572 if (gspca_dev->image_len <
4573 sd->gspca_dev.width * sd->gspca_dev.height)
d6b6d7ae
HG		 4574 gspca_dev->last_packet_type = DISCARD_PACKET;
4575 }
4576 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
76dd272b 4577 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
b46aaa02 4578 }
b46aaa02
HG		 4579}
4580
49809d6a 4581static void sd_pkt_scan(struct gspca_dev *gspca_dev,
76dd272b 4582 u8 *data, /* isoc packet */
49809d6a
HG		 4583 int len) /* iso packet length */
4584{
4585 struct sd *sd = (struct sd *) gspca_dev;
4586
4587 switch (sd->bridge) {
4588 case BRIDGE_OV511:
4589 case BRIDGE_OV511PLUS:
76dd272b 4590 ov511_pkt_scan(gspca_dev, data, len);
49809d6a
HG		 4591 break;
4592 case BRIDGE_OV518:
4593 case BRIDGE_OV518PLUS:
76dd272b 4594 ov518_pkt_scan(gspca_dev, data, len);
49809d6a
HG		 4595 break;
4596 case BRIDGE_OV519:
76dd272b 4597 ov519_pkt_scan(gspca_dev, data, len);
49809d6a 4598 break;
b46aaa02 4599 case BRIDGE_OVFX2:
76dd272b 4600 ovfx2_pkt_scan(gspca_dev, data, len);
b46aaa02 4601 break;
a511ba94 4602 case BRIDGE_W9968CF:
76dd272b 4603 w9968cf_pkt_scan(gspca_dev, data, len);
a511ba94 4604 break;
49809d6a
HG		 4605 }
4606}
4607
6a7eba24
JFM		 4608/* -- management routines -- */
4609
4610static void setbrightness(struct gspca_dev *gspca_dev)
4611{
4612 struct sd *sd = (struct sd *) gspca_dev;
4613 int val;
42e142f6
JFM		 4614 static const struct ov_i2c_regvals brit_7660[][7] = {
4615 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4616 {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4617 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4618 {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4619 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4620 {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4621 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4622 {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4623 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4624 {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4625 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4626 {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4627 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4628 {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4629 };
6a7eba24 4630
62833acd 4631 val = sd->ctrls[BRIGHTNESS].val;
6a7eba24
JFM		 4632 switch (sd->sensor) {
4633 case SEN_OV8610:
4634 case SEN_OV7610:
4635 case SEN_OV76BE:
4636 case SEN_OV6620:
4637 case SEN_OV6630:
7d971373 4638 case SEN_OV66308AF:
6a7eba24 4639 case SEN_OV7640:
035d3a3d 4640 case SEN_OV7648:
6a7eba24
JFM		 4641 i2c_w(sd, OV7610_REG_BRT, val);
4642 break;
4643 case SEN_OV7620:
859cc470 4644 case SEN_OV7620AE:
6a7eba24 4645 /* 7620 doesn't like manual changes when in auto mode */
62833acd 4646 if (!sd->ctrls[AUTOBRIGHT].val)
6a7eba24
JFM		 4647 i2c_w(sd, OV7610_REG_BRT, val);
4648 break;
42e142f6
JFM		 4649 case SEN_OV7660:
4650 write_i2c_regvals(sd, brit_7660[val],
4651 ARRAY_SIZE(brit_7660[0]));
4652 break;
6a7eba24 4653 case SEN_OV7670:
594f5b8b 4654/*win trace
21867803
JFM		 4655 * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4656 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
6a7eba24
JFM		 4657 break;
4658 }
6a7eba24
JFM		 4659}
4660
4661static void setcontrast(struct gspca_dev *gspca_dev)
4662{
4663 struct sd *sd = (struct sd *) gspca_dev;
4664 int val;
42e142f6
JFM		 4665 static const struct ov_i2c_regvals contrast_7660[][31] = {
4666 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4667 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4668 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4669 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4670 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4671 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4672 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4673 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4674 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4675 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4676 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4677 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4678 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4679 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4680 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4681 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4682 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4683 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4684 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4685 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4686 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4687 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4688 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4689 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4690 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4691 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4692 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4693 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4694 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4695 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4696 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4697 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4698 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4699 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4700 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4701 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4702 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4703 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4704 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4705 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4706 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4707 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4708 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4709 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4710 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4711 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4712 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4713 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4714 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4715 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4716 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4717 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4718 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4719 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4720 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4721 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4722 };
6a7eba24 4723
62833acd 4724 val = sd->ctrls[CONTRAST].val;
6a7eba24
JFM		 4725 switch (sd->sensor) {
4726 case SEN_OV7610:
4727 case SEN_OV6620:
4728 i2c_w(sd, OV7610_REG_CNT, val);
4729 break;
4730 case SEN_OV6630:
7d971373 4731 case SEN_OV66308AF:
6a7eba24 4732 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
49809d6a 4733 break;
6a7eba24 4734 case SEN_OV8610: {
9d1593a8 4735 static const u8 ctab[] = {
6a7eba24
JFM		 4736 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4737 };
4738
4739 /* Use Y gamma control instead. Bit 0 enables it. */
4740 i2c_w(sd, 0x64, ctab[val >> 5]);
4741 break;
4742 }
859cc470
HG		 4743 case SEN_OV7620:
4744 case SEN_OV7620AE: {
9d1593a8 4745 static const u8 ctab[] = {
6a7eba24
JFM		 4746 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4747 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4748 };
4749
4750 /* Use Y gamma control instead. Bit 0 enables it. */
4751 i2c_w(sd, 0x64, ctab[val >> 4]);
4752 break;
4753 }
42e142f6
JFM		 4754 case SEN_OV7660:
4755 write_i2c_regvals(sd, contrast_7660[val],
4756 ARRAY_SIZE(contrast_7660[0]));
4757 break;
6a7eba24
JFM		 4758 case SEN_OV7670:
4759 /* check that this isn't just the same as ov7610 */
21867803 4760 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
6a7eba24
JFM		 4761 break;
4762 }
6a7eba24
JFM		 4763}
4764
58c92d37
JFM		 4765static void setexposure(struct gspca_dev *gspca_dev)
4766{
4767 struct sd *sd = (struct sd *) gspca_dev;
4768
4769 if (!sd->ctrls[AUTOGAIN].val)
4770 i2c_w(sd, 0x10, sd->ctrls[EXPOSURE].val);
4771}
4772
6a7eba24
JFM		 4773static void setcolors(struct gspca_dev *gspca_dev)
4774{
4775 struct sd *sd = (struct sd *) gspca_dev;
4776 int val;
42e142f6
JFM		 4777 static const struct ov_i2c_regvals colors_7660[][6] = {
4778 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4779 {0x53, 0x19}, {0x54, 0x23}},
4780 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4781 {0x53, 0x2c}, {0x54, 0x3e}},
4782 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4783 {0x53, 0x40}, {0x54, 0x59}},
4784 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4785 {0x53, 0x53}, {0x54, 0x73}},
4786 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4787 {0x53, 0x66}, {0x54, 0x8e}},
4788 };
6a7eba24 4789
62833acd 4790 val = sd->ctrls[COLORS].val;
6a7eba24
JFM		 4791 switch (sd->sensor) {
4792 case SEN_OV8610:
4793 case SEN_OV7610:
4794 case SEN_OV76BE:
4795 case SEN_OV6620:
4796 case SEN_OV6630:
7d971373 4797 case SEN_OV66308AF:
6a7eba24
JFM		 4798 i2c_w(sd, OV7610_REG_SAT, val);
4799 break;
4800 case SEN_OV7620:
859cc470 4801 case SEN_OV7620AE:
6a7eba24
JFM		 4802 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4803/* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4804 if (rc < 0)
4805 goto out; */
4806 i2c_w(sd, OV7610_REG_SAT, val);
4807 break;
4808 case SEN_OV7640:
035d3a3d 4809 case SEN_OV7648:
6a7eba24
JFM		 4810 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4811 break;
42e142f6
JFM		 4812 case SEN_OV7660:
4813 write_i2c_regvals(sd, colors_7660[val],
4814 ARRAY_SIZE(colors_7660[0]));
4815 break;
6a7eba24
JFM		 4816 case SEN_OV7670:
4817 /* supported later once I work out how to do it
4818 * transparently fail now! */
4819 /* set REG_COM13 values for UV sat auto mode */
4820 break;
4821 }
6a7eba24
JFM		 4822}
4823
62833acd 4824static void setautobright(struct gspca_dev *gspca_dev)
02ab18b0 4825{
62833acd
JFM		 4826 struct sd *sd = (struct sd *) gspca_dev;
4827
62833acd 4828 i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
02ab18b0
HG		 4829}
4830
58c92d37
JFM		 4831static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
4832{
4833 struct sd *sd = (struct sd *) gspca_dev;
4834
4835 sd->ctrls[AUTOGAIN].val = val;
4836 if (val) {
4837 gspca_dev->ctrl_inac |= (1 << EXPOSURE);
4838 } else {
4839 gspca_dev->ctrl_inac &= ~(1 << EXPOSURE);
4840 sd->ctrls[EXPOSURE].val = i2c_r(sd, 0x10);
4841 }
4842 if (gspca_dev->streaming)
4843 setautogain(gspca_dev);
4844 return gspca_dev->usb_err;
4845}
4846
62833acd 4847static void setfreq_i(struct sd *sd)
02ab18b0 4848{
42e142f6
JFM		 4849 if (sd->sensor == SEN_OV7660
4850 || sd->sensor == SEN_OV7670) {
62833acd 4851 switch (sd->ctrls[FREQ].val) {
02ab18b0 4852 case 0: /* Banding filter disabled */
21867803 4853 i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
02ab18b0
HG		 4854 break;
4855 case 1: /* 50 hz */
21867803 4856 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
02ab18b0 4857 OV7670_COM8_BFILT);
21867803 4858 i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
02ab18b0
HG		 4859 break;
4860 case 2: /* 60 hz */
21867803 4861 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
02ab18b0 4862 OV7670_COM8_BFILT);
21867803 4863 i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
02ab18b0 4864 break;
21867803
JFM		 4865 case 3: /* Auto hz - ov7670 only */
4866 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
02ab18b0 4867 OV7670_COM8_BFILT);
21867803 4868 i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
02ab18b0
HG		 4869 0x18);
4870 break;
4871 }
4872 } else {
62833acd 4873 switch (sd->ctrls[FREQ].val) {
02ab18b0
HG		 4874 case 0: /* Banding filter disabled */
4875 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4876 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4877 break;
4878 case 1: /* 50 hz (filter on and framerate adj) */
4879 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4880 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4881 /* 20 fps -> 16.667 fps */
4882 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 4883 sd->sensor == SEN_OV6630 ||
4884 sd->sensor == SEN_OV66308AF)
02ab18b0
HG		 4885 i2c_w(sd, 0x2b, 0x5e);
4886 else
4887 i2c_w(sd, 0x2b, 0xac);
4888 break;
4889 case 2: /* 60 hz (filter on, ...) */
4890 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4891 if (sd->sensor == SEN_OV6620 ||
7d971373
HG		 4892 sd->sensor == SEN_OV6630 ||
4893 sd->sensor == SEN_OV66308AF) {
02ab18b0
HG		 4894 /* 20 fps -> 15 fps */
4895 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4896 i2c_w(sd, 0x2b, 0xa8);
4897 } else {
4898 /* no framerate adj. */
4899 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4900 }
4901 break;
4902 }
4903 }
4904}
62833acd 4905static void setfreq(struct gspca_dev *gspca_dev)
02ab18b0
HG		 4906{
4907 struct sd *sd = (struct sd *) gspca_dev;
4908
62833acd 4909 setfreq_i(sd);
02ab18b0 4910
62833acd
JFM		 4911 /* Ugly but necessary */
4912 if (sd->bridge == BRIDGE_W9968CF)
4913 w9968cf_set_crop_window(sd);
02ab18b0
HG		 4914}
4915
4916static int sd_querymenu(struct gspca_dev *gspca_dev,
4917 struct v4l2_querymenu *menu)
4918{
4919 struct sd *sd = (struct sd *) gspca_dev;
4920
4921 switch (menu->id) {
4922 case V4L2_CID_POWER_LINE_FREQUENCY:
4923 switch (menu->index) {
4924 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4925 strcpy((char *) menu->name, "NoFliker");
4926 return 0;
4927 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4928 strcpy((char *) menu->name, "50 Hz");
4929 return 0;
4930 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4931 strcpy((char *) menu->name, "60 Hz");
4932 return 0;
4933 case 3:
4934 if (sd->sensor != SEN_OV7670)
4935 return -EINVAL;
4936
4937 strcpy((char *) menu->name, "Automatic");
4938 return 0;
4939 }
4940 break;
4941 }
4942 return -EINVAL;
4943}
4944
79b35902
HG		 4945static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4946 struct v4l2_jpegcompression *jcomp)
4947{
4948 struct sd *sd = (struct sd *) gspca_dev;
4949
4950 if (sd->bridge != BRIDGE_W9968CF)
4951 return -EINVAL;
4952
4953 memset(jcomp, 0, sizeof *jcomp);
4954 jcomp->quality = sd->quality;
4955 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4956 V4L2_JPEG_MARKER_DRI;
4957 return 0;
4958}
4959
4960static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4961 struct v4l2_jpegcompression *jcomp)
4962{
4963 struct sd *sd = (struct sd *) gspca_dev;
4964
4965 if (sd->bridge != BRIDGE_W9968CF)
4966 return -EINVAL;
4967
4968 if (gspca_dev->streaming)
4969 return -EBUSY;
4970
4971 if (jcomp->quality < QUALITY_MIN)
4972 sd->quality = QUALITY_MIN;
4973 else if (jcomp->quality > QUALITY_MAX)
4974 sd->quality = QUALITY_MAX;
4975 else
4976 sd->quality = jcomp->quality;
4977
4978 /* Return resulting jcomp params to app */
4979 sd_get_jcomp(gspca_dev, jcomp);
4980
4981 return 0;
4982}
4983
6a7eba24 4984/* sub-driver description */
a5ae2062 4985static const struct sd_desc sd_desc = {
6a7eba24
JFM		 4986 .name = MODULE_NAME,
4987 .ctrls = sd_ctrls,
4988 .nctrls = ARRAY_SIZE(sd_ctrls),
4989 .config = sd_config,
012d6b02 4990 .init = sd_init,
c42cedbb 4991 .isoc_init = sd_isoc_init,
6a7eba24
JFM		 4992 .start = sd_start,
4993 .stopN = sd_stopN,
79b35902 4994 .stop0 = sd_stop0,
6a7eba24 4995 .pkt_scan = sd_pkt_scan,
417a4d26 4996 .dq_callback = sd_reset_snapshot,
02ab18b0 4997 .querymenu = sd_querymenu,
79b35902
HG		 4998 .get_jcomp = sd_get_jcomp,
4999 .set_jcomp = sd_set_jcomp,
2856643e 5000#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
417a4d26
HG		 5001 .other_input = 1,
5002#endif
6a7eba24
JFM		 5003};
5004
5005/* -- module initialisation -- */
95c967c1 5006static const struct usb_device_id device_table[] = {
a511ba94 5007 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
49809d6a
HG		 5008 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
5009 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
5010 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
5011 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
9e4d8258 5012 {USB_DEVICE(0x041e, 0x4064),
87bae740 5013 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
518c8df7 5014 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
9e4d8258 5015 {USB_DEVICE(0x041e, 0x4068),
87bae740 5016 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
49809d6a
HG		 5017 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
5018 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
98184f78 5019 {USB_DEVICE(0x054c, 0x0155),
87bae740 5020 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
1876bb92 5021 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
49809d6a
HG		 5022 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
5023 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
5024 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
b46aaa02 5025 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
49809d6a
HG		 5026 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
5027 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
1876bb92 5028 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
49809d6a 5029 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
1876bb92 5030 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
b46aaa02
HG		 5031 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5032 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
a511ba94 5033 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
87bae740 5034 {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
6a7eba24
JFM		 5035 {}
5036};
ac40b1fa 5037
6a7eba24
JFM		 5038MODULE_DEVICE_TABLE(usb, device_table);
5039
5040/* -- device connect -- */
5041static int sd_probe(struct usb_interface *intf,
5042 const struct usb_device_id *id)
5043{
5044 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5045 THIS_MODULE);
5046}
5047
5048static struct usb_driver sd_driver = {
5049 .name = MODULE_NAME,
5050 .id_table = device_table,
5051 .probe = sd_probe,
5052 .disconnect = gspca_disconnect,
6a709749
JFM		 5053#ifdef CONFIG_PM
5054 .suspend = gspca_suspend,
5055 .resume = gspca_resume,
5056#endif
6a7eba24
JFM		 5057};
5058
5059/* -- module insert / remove -- */
5060static int __init sd_mod_init(void)
5061{
54826437 5062 return usb_register(&sd_driver);
6a7eba24
JFM		 5063}
5064static void __exit sd_mod_exit(void)
5065{
5066 usb_deregister(&sd_driver);
6a7eba24
JFM		 5067}
5068
5069module_init(sd_mod_init);
5070module_exit(sd_mod_exit);
5071
5072module_param(frame_rate, int, 0644);
5073MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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