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Commit | Line | Data |
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abfa3df3 JC |
1 | /* |
2 | * The Marvell camera core. This device appears in a number of settings, | |
3 | * so it needs platform-specific support outside of the core. | |
4 | * | |
5 | * Copyright 2011 Jonathan Corbet corbet@lwn.net | |
6 | */ | |
7 | #include <linux/kernel.h> | |
8 | #include <linux/module.h> | |
9 | #include <linux/fs.h> | |
abfa3df3 JC |
10 | #include <linux/mm.h> |
11 | #include <linux/i2c.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/spinlock.h> | |
abfa3df3 | 14 | #include <linux/slab.h> |
abfa3df3 JC |
15 | #include <linux/device.h> |
16 | #include <linux/wait.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/dma-mapping.h> | |
19 | #include <linux/delay.h> | |
abfa3df3 | 20 | #include <linux/vmalloc.h> |
abfa3df3 | 21 | #include <linux/io.h> |
362d45b2 JC |
22 | #include <linux/videodev2.h> |
23 | #include <media/v4l2-device.h> | |
24 | #include <media/v4l2-ioctl.h> | |
25 | #include <media/v4l2-chip-ident.h> | |
26 | #include <media/ov7670.h> | |
27 | #include <media/videobuf2-vmalloc.h> | |
a9b36e85 | 28 | #include <media/videobuf2-dma-contig.h> |
abfa3df3 JC |
29 | |
30 | #include "mcam-core.h" | |
31 | ||
a9b36e85 JC |
32 | /* |
33 | * Basic frame stats - to be deleted shortly | |
34 | */ | |
35 | static int frames; | |
36 | static int singles; | |
37 | static int delivered; | |
abfa3df3 JC |
38 | |
39 | /* | |
40 | * Internal DMA buffer management. Since the controller cannot do S/G I/O, | |
41 | * we must have physically contiguous buffers to bring frames into. | |
42 | * These parameters control how many buffers we use, whether we | |
43 | * allocate them at load time (better chance of success, but nails down | |
44 | * memory) or when somebody tries to use the camera (riskier), and, | |
45 | * for load-time allocation, how big they should be. | |
46 | * | |
47 | * The controller can cycle through three buffers. We could use | |
48 | * more by flipping pointers around, but it probably makes little | |
49 | * sense. | |
50 | */ | |
51 | ||
52 | static int alloc_bufs_at_read; | |
53 | module_param(alloc_bufs_at_read, bool, 0444); | |
54 | MODULE_PARM_DESC(alloc_bufs_at_read, | |
55 | "Non-zero value causes DMA buffers to be allocated when the " | |
56 | "video capture device is read, rather than at module load " | |
57 | "time. This saves memory, but decreases the chances of " | |
a9b36e85 JC |
58 | "successfully getting those buffers. This parameter is " |
59 | "only used in the vmalloc buffer mode"); | |
abfa3df3 JC |
60 | |
61 | static int n_dma_bufs = 3; | |
62 | module_param(n_dma_bufs, uint, 0644); | |
63 | MODULE_PARM_DESC(n_dma_bufs, | |
64 | "The number of DMA buffers to allocate. Can be either two " | |
65 | "(saves memory, makes timing tighter) or three."); | |
66 | ||
67 | static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ | |
68 | module_param(dma_buf_size, uint, 0444); | |
69 | MODULE_PARM_DESC(dma_buf_size, | |
70 | "The size of the allocated DMA buffers. If actual operating " | |
71 | "parameters require larger buffers, an attempt to reallocate " | |
72 | "will be made."); | |
73 | ||
74 | static int min_buffers = 1; | |
75 | module_param(min_buffers, uint, 0644); | |
76 | MODULE_PARM_DESC(min_buffers, | |
77 | "The minimum number of streaming I/O buffers we are willing " | |
78 | "to work with."); | |
79 | ||
80 | static int max_buffers = 10; | |
81 | module_param(max_buffers, uint, 0644); | |
82 | MODULE_PARM_DESC(max_buffers, | |
83 | "The maximum number of streaming I/O buffers an application " | |
84 | "will be allowed to allocate. These buffers are big and live " | |
85 | "in vmalloc space."); | |
86 | ||
87 | static int flip; | |
88 | module_param(flip, bool, 0444); | |
89 | MODULE_PARM_DESC(flip, | |
90 | "If set, the sensor will be instructed to flip the image " | |
91 | "vertically."); | |
92 | ||
a9b36e85 JC |
93 | static int buffer_mode = -1; |
94 | module_param(buffer_mode, int, 0444); | |
95 | MODULE_PARM_DESC(buffer_mode, | |
96 | "Set the buffer mode to be used; default is to go with what " | |
97 | "the platform driver asks for. Set to 0 for vmalloc, 1 for " | |
98 | "DMA contiguous."); | |
99 | ||
abfa3df3 JC |
100 | /* |
101 | * Status flags. Always manipulated with bit operations. | |
102 | */ | |
103 | #define CF_BUF0_VALID 0 /* Buffers valid - first three */ | |
104 | #define CF_BUF1_VALID 1 | |
105 | #define CF_BUF2_VALID 2 | |
106 | #define CF_DMA_ACTIVE 3 /* A frame is incoming */ | |
107 | #define CF_CONFIG_NEEDED 4 /* Must configure hardware */ | |
a9b36e85 | 108 | #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */ |
abfa3df3 JC |
109 | |
110 | #define sensor_call(cam, o, f, args...) \ | |
111 | v4l2_subdev_call(cam->sensor, o, f, ##args) | |
112 | ||
113 | static struct mcam_format_struct { | |
114 | __u8 *desc; | |
115 | __u32 pixelformat; | |
116 | int bpp; /* Bytes per pixel */ | |
117 | enum v4l2_mbus_pixelcode mbus_code; | |
118 | } mcam_formats[] = { | |
119 | { | |
120 | .desc = "YUYV 4:2:2", | |
121 | .pixelformat = V4L2_PIX_FMT_YUYV, | |
122 | .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, | |
123 | .bpp = 2, | |
124 | }, | |
125 | { | |
126 | .desc = "RGB 444", | |
127 | .pixelformat = V4L2_PIX_FMT_RGB444, | |
128 | .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, | |
129 | .bpp = 2, | |
130 | }, | |
131 | { | |
132 | .desc = "RGB 565", | |
133 | .pixelformat = V4L2_PIX_FMT_RGB565, | |
134 | .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, | |
135 | .bpp = 2, | |
136 | }, | |
137 | { | |
138 | .desc = "Raw RGB Bayer", | |
139 | .pixelformat = V4L2_PIX_FMT_SBGGR8, | |
140 | .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, | |
141 | .bpp = 1 | |
142 | }, | |
143 | }; | |
144 | #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats) | |
145 | ||
146 | static struct mcam_format_struct *mcam_find_format(u32 pixelformat) | |
147 | { | |
148 | unsigned i; | |
149 | ||
150 | for (i = 0; i < N_MCAM_FMTS; i++) | |
151 | if (mcam_formats[i].pixelformat == pixelformat) | |
152 | return mcam_formats + i; | |
153 | /* Not found? Then return the first format. */ | |
154 | return mcam_formats; | |
155 | } | |
156 | ||
157 | /* | |
158 | * Start over with DMA buffers - dev_lock needed. | |
159 | */ | |
160 | static void mcam_reset_buffers(struct mcam_camera *cam) | |
161 | { | |
162 | int i; | |
163 | ||
164 | cam->next_buf = -1; | |
165 | for (i = 0; i < cam->nbufs; i++) | |
166 | clear_bit(i, &cam->flags); | |
abfa3df3 JC |
167 | } |
168 | ||
169 | static inline int mcam_needs_config(struct mcam_camera *cam) | |
170 | { | |
171 | return test_bit(CF_CONFIG_NEEDED, &cam->flags); | |
172 | } | |
173 | ||
174 | static void mcam_set_config_needed(struct mcam_camera *cam, int needed) | |
175 | { | |
176 | if (needed) | |
177 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | |
178 | else | |
179 | clear_bit(CF_CONFIG_NEEDED, &cam->flags); | |
180 | } | |
181 | ||
b5210fd2 JC |
182 | /* |
183 | * Our buffer type for working with videobuf2. Note that the vb2 | |
184 | * developers have decreed that struct vb2_buffer must be at the | |
185 | * beginning of this structure. | |
186 | */ | |
187 | struct mcam_vb_buffer { | |
188 | struct vb2_buffer vb_buf; | |
189 | struct list_head queue; | |
190 | }; | |
191 | ||
192 | static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb) | |
193 | { | |
194 | return container_of(vb, struct mcam_vb_buffer, vb_buf); | |
195 | } | |
196 | ||
abfa3df3 JC |
197 | |
198 | /* | |
67a8dbbc | 199 | * Debugging and related. |
abfa3df3 JC |
200 | */ |
201 | #define cam_err(cam, fmt, arg...) \ | |
202 | dev_err((cam)->dev, fmt, ##arg); | |
203 | #define cam_warn(cam, fmt, arg...) \ | |
204 | dev_warn((cam)->dev, fmt, ##arg); | |
205 | #define cam_dbg(cam, fmt, arg...) \ | |
206 | dev_dbg((cam)->dev, fmt, ##arg); | |
207 | ||
208 | ||
209 | ||
210 | /* ------------------------------------------------------------------- */ | |
211 | /* | |
212 | * Deal with the controller. | |
213 | */ | |
214 | ||
215 | /* | |
a9b36e85 | 216 | * Set up DMA buffers when operating in vmalloc mode |
abfa3df3 | 217 | */ |
a9b36e85 | 218 | static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam) |
abfa3df3 JC |
219 | { |
220 | /* | |
221 | * Store the first two Y buffers (we aren't supporting | |
222 | * planar formats for now, so no UV bufs). Then either | |
223 | * set the third if it exists, or tell the controller | |
224 | * to just use two. | |
225 | */ | |
226 | mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); | |
227 | mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); | |
228 | if (cam->nbufs > 2) { | |
229 | mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); | |
230 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); | |
231 | } else | |
232 | mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); | |
67a8dbbc JC |
233 | if (cam->chip_id == V4L2_IDENT_CAFE) |
234 | mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */ | |
abfa3df3 JC |
235 | } |
236 | ||
a9b36e85 JC |
237 | /* |
238 | * Set up a contiguous buffer for the given frame. Here also is where | |
239 | * the underrun strategy is set: if there is no buffer available, reuse | |
240 | * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to | |
241 | * keep the interrupt handler from giving that buffer back to user | |
242 | * space. In this way, we always have a buffer to DMA to and don't | |
243 | * have to try to play games stopping and restarting the controller. | |
244 | */ | |
245 | static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame) | |
246 | { | |
247 | struct mcam_vb_buffer *buf; | |
248 | /* | |
249 | * If there are no available buffers, go into single mode | |
250 | */ | |
251 | if (list_empty(&cam->buffers)) { | |
252 | buf = cam->vb_bufs[frame ^ 0x1]; | |
253 | cam->vb_bufs[frame] = buf; | |
254 | mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, | |
255 | vb2_dma_contig_plane_paddr(&buf->vb_buf, 0)); | |
256 | set_bit(CF_SINGLE_BUFFER, &cam->flags); | |
257 | singles++; | |
258 | return; | |
259 | } | |
260 | /* | |
261 | * OK, we have a buffer we can use. | |
262 | */ | |
263 | buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue); | |
264 | list_del_init(&buf->queue); | |
265 | mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, | |
266 | vb2_dma_contig_plane_paddr(&buf->vb_buf, 0)); | |
267 | cam->vb_bufs[frame] = buf; | |
268 | clear_bit(CF_SINGLE_BUFFER, &cam->flags); | |
269 | } | |
270 | ||
271 | static void mcam_ctlr_dma_contig(struct mcam_camera *cam) | |
272 | { | |
273 | mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); | |
274 | cam->nbufs = 2; | |
275 | mcam_set_contig_buffer(cam, 0); | |
276 | mcam_set_contig_buffer(cam, 1); | |
277 | } | |
278 | ||
279 | ||
280 | static void mcam_ctlr_dma(struct mcam_camera *cam) | |
281 | { | |
282 | if (cam->buffer_mode == B_DMA_contig) | |
283 | mcam_ctlr_dma_contig(cam); | |
284 | else | |
285 | mcam_ctlr_dma_vmalloc(cam); | |
286 | } | |
287 | ||
abfa3df3 JC |
288 | static void mcam_ctlr_image(struct mcam_camera *cam) |
289 | { | |
290 | int imgsz; | |
291 | struct v4l2_pix_format *fmt = &cam->pix_format; | |
292 | ||
293 | imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | | |
294 | (fmt->bytesperline & IMGSZ_H_MASK); | |
295 | mcam_reg_write(cam, REG_IMGSIZE, imgsz); | |
296 | mcam_reg_write(cam, REG_IMGOFFSET, 0); | |
297 | /* YPITCH just drops the last two bits */ | |
298 | mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, | |
299 | IMGP_YP_MASK); | |
300 | /* | |
301 | * Tell the controller about the image format we are using. | |
302 | */ | |
303 | switch (cam->pix_format.pixelformat) { | |
304 | case V4L2_PIX_FMT_YUYV: | |
305 | mcam_reg_write_mask(cam, REG_CTRL0, | |
306 | C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, | |
307 | C0_DF_MASK); | |
308 | break; | |
309 | ||
310 | case V4L2_PIX_FMT_RGB444: | |
311 | mcam_reg_write_mask(cam, REG_CTRL0, | |
312 | C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, | |
313 | C0_DF_MASK); | |
314 | /* Alpha value? */ | |
315 | break; | |
316 | ||
317 | case V4L2_PIX_FMT_RGB565: | |
318 | mcam_reg_write_mask(cam, REG_CTRL0, | |
319 | C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, | |
320 | C0_DF_MASK); | |
321 | break; | |
322 | ||
323 | default: | |
324 | cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); | |
325 | break; | |
326 | } | |
327 | /* | |
328 | * Make sure it knows we want to use hsync/vsync. | |
329 | */ | |
330 | mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, | |
331 | C0_SIFM_MASK); | |
332 | } | |
333 | ||
334 | ||
335 | /* | |
336 | * Configure the controller for operation; caller holds the | |
337 | * device mutex. | |
338 | */ | |
339 | static int mcam_ctlr_configure(struct mcam_camera *cam) | |
340 | { | |
341 | unsigned long flags; | |
342 | ||
343 | spin_lock_irqsave(&cam->dev_lock, flags); | |
344 | mcam_ctlr_dma(cam); | |
345 | mcam_ctlr_image(cam); | |
346 | mcam_set_config_needed(cam, 0); | |
347 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
348 | return 0; | |
349 | } | |
350 | ||
351 | static void mcam_ctlr_irq_enable(struct mcam_camera *cam) | |
352 | { | |
353 | /* | |
354 | * Clear any pending interrupts, since we do not | |
355 | * expect to have I/O active prior to enabling. | |
356 | */ | |
357 | mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); | |
358 | mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); | |
359 | } | |
360 | ||
361 | static void mcam_ctlr_irq_disable(struct mcam_camera *cam) | |
362 | { | |
363 | mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); | |
364 | } | |
365 | ||
366 | /* | |
367 | * Make the controller start grabbing images. Everything must | |
368 | * be set up before doing this. | |
369 | */ | |
370 | static void mcam_ctlr_start(struct mcam_camera *cam) | |
371 | { | |
372 | /* set_bit performs a read, so no other barrier should be | |
373 | needed here */ | |
374 | mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); | |
375 | } | |
376 | ||
377 | static void mcam_ctlr_stop(struct mcam_camera *cam) | |
378 | { | |
379 | mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | |
380 | } | |
381 | ||
382 | static void mcam_ctlr_init(struct mcam_camera *cam) | |
383 | { | |
384 | unsigned long flags; | |
385 | ||
386 | spin_lock_irqsave(&cam->dev_lock, flags); | |
387 | /* | |
388 | * Make sure it's not powered down. | |
389 | */ | |
390 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); | |
391 | /* | |
392 | * Turn off the enable bit. It sure should be off anyway, | |
393 | * but it's good to be sure. | |
394 | */ | |
395 | mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | |
396 | /* | |
397 | * Clock the sensor appropriately. Controller clock should | |
398 | * be 48MHz, sensor "typical" value is half that. | |
399 | */ | |
400 | mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); | |
401 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
402 | } | |
403 | ||
404 | ||
405 | /* | |
406 | * Stop the controller, and don't return until we're really sure that no | |
407 | * further DMA is going on. | |
408 | */ | |
409 | static void mcam_ctlr_stop_dma(struct mcam_camera *cam) | |
410 | { | |
411 | unsigned long flags; | |
412 | ||
413 | /* | |
414 | * Theory: stop the camera controller (whether it is operating | |
415 | * or not). Delay briefly just in case we race with the SOF | |
416 | * interrupt, then wait until no DMA is active. | |
417 | */ | |
418 | spin_lock_irqsave(&cam->dev_lock, flags); | |
419 | mcam_ctlr_stop(cam); | |
420 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
b5210fd2 | 421 | msleep(10); |
abfa3df3 JC |
422 | if (test_bit(CF_DMA_ACTIVE, &cam->flags)) |
423 | cam_err(cam, "Timeout waiting for DMA to end\n"); | |
424 | /* This would be bad news - what now? */ | |
425 | spin_lock_irqsave(&cam->dev_lock, flags); | |
426 | cam->state = S_IDLE; | |
427 | mcam_ctlr_irq_disable(cam); | |
428 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
429 | } | |
430 | ||
431 | /* | |
432 | * Power up and down. | |
433 | */ | |
434 | static void mcam_ctlr_power_up(struct mcam_camera *cam) | |
435 | { | |
436 | unsigned long flags; | |
437 | ||
438 | spin_lock_irqsave(&cam->dev_lock, flags); | |
abfa3df3 | 439 | cam->plat_power_up(cam); |
67a8dbbc | 440 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); |
abfa3df3 JC |
441 | spin_unlock_irqrestore(&cam->dev_lock, flags); |
442 | msleep(5); /* Just to be sure */ | |
443 | } | |
444 | ||
445 | static void mcam_ctlr_power_down(struct mcam_camera *cam) | |
446 | { | |
447 | unsigned long flags; | |
448 | ||
449 | spin_lock_irqsave(&cam->dev_lock, flags); | |
67a8dbbc JC |
450 | /* |
451 | * School of hard knocks department: be sure we do any register | |
452 | * twiddling on the controller *before* calling the platform | |
453 | * power down routine. | |
454 | */ | |
abfa3df3 | 455 | mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); |
67a8dbbc | 456 | cam->plat_power_down(cam); |
abfa3df3 JC |
457 | spin_unlock_irqrestore(&cam->dev_lock, flags); |
458 | } | |
459 | ||
460 | /* -------------------------------------------------------------------- */ | |
461 | /* | |
462 | * Communications with the sensor. | |
463 | */ | |
464 | ||
465 | static int __mcam_cam_reset(struct mcam_camera *cam) | |
466 | { | |
467 | return sensor_call(cam, core, reset, 0); | |
468 | } | |
469 | ||
470 | /* | |
471 | * We have found the sensor on the i2c. Let's try to have a | |
472 | * conversation. | |
473 | */ | |
474 | static int mcam_cam_init(struct mcam_camera *cam) | |
475 | { | |
476 | struct v4l2_dbg_chip_ident chip; | |
477 | int ret; | |
478 | ||
479 | mutex_lock(&cam->s_mutex); | |
480 | if (cam->state != S_NOTREADY) | |
481 | cam_warn(cam, "Cam init with device in funky state %d", | |
482 | cam->state); | |
483 | ret = __mcam_cam_reset(cam); | |
484 | if (ret) | |
485 | goto out; | |
486 | chip.ident = V4L2_IDENT_NONE; | |
487 | chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; | |
488 | chip.match.addr = cam->sensor_addr; | |
489 | ret = sensor_call(cam, core, g_chip_ident, &chip); | |
490 | if (ret) | |
491 | goto out; | |
492 | cam->sensor_type = chip.ident; | |
493 | if (cam->sensor_type != V4L2_IDENT_OV7670) { | |
494 | cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); | |
495 | ret = -EINVAL; | |
496 | goto out; | |
497 | } | |
498 | /* Get/set parameters? */ | |
499 | ret = 0; | |
500 | cam->state = S_IDLE; | |
501 | out: | |
502 | mcam_ctlr_power_down(cam); | |
503 | mutex_unlock(&cam->s_mutex); | |
504 | return ret; | |
505 | } | |
506 | ||
507 | /* | |
508 | * Configure the sensor to match the parameters we have. Caller should | |
509 | * hold s_mutex | |
510 | */ | |
511 | static int mcam_cam_set_flip(struct mcam_camera *cam) | |
512 | { | |
513 | struct v4l2_control ctrl; | |
514 | ||
515 | memset(&ctrl, 0, sizeof(ctrl)); | |
516 | ctrl.id = V4L2_CID_VFLIP; | |
517 | ctrl.value = flip; | |
518 | return sensor_call(cam, core, s_ctrl, &ctrl); | |
519 | } | |
520 | ||
521 | ||
522 | static int mcam_cam_configure(struct mcam_camera *cam) | |
523 | { | |
524 | struct v4l2_mbus_framefmt mbus_fmt; | |
525 | int ret; | |
526 | ||
527 | v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); | |
528 | ret = sensor_call(cam, core, init, 0); | |
529 | if (ret == 0) | |
530 | ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); | |
531 | /* | |
532 | * OV7670 does weird things if flip is set *before* format... | |
533 | */ | |
534 | ret += mcam_cam_set_flip(cam); | |
535 | return ret; | |
536 | } | |
537 | ||
538 | /* -------------------------------------------------------------------- */ | |
539 | /* | |
540 | * DMA buffer management. These functions need s_mutex held. | |
541 | */ | |
542 | ||
543 | /* FIXME: this is inefficient as hell, since dma_alloc_coherent just | |
544 | * does a get_free_pages() call, and we waste a good chunk of an orderN | |
545 | * allocation. Should try to allocate the whole set in one chunk. | |
546 | */ | |
547 | static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) | |
548 | { | |
549 | int i; | |
550 | ||
551 | mcam_set_config_needed(cam, 1); | |
552 | if (loadtime) | |
553 | cam->dma_buf_size = dma_buf_size; | |
554 | else | |
555 | cam->dma_buf_size = cam->pix_format.sizeimage; | |
556 | if (n_dma_bufs > 3) | |
557 | n_dma_bufs = 3; | |
558 | ||
559 | cam->nbufs = 0; | |
560 | for (i = 0; i < n_dma_bufs; i++) { | |
561 | cam->dma_bufs[i] = dma_alloc_coherent(cam->dev, | |
562 | cam->dma_buf_size, cam->dma_handles + i, | |
563 | GFP_KERNEL); | |
564 | if (cam->dma_bufs[i] == NULL) { | |
565 | cam_warn(cam, "Failed to allocate DMA buffer\n"); | |
566 | break; | |
567 | } | |
abfa3df3 JC |
568 | (cam->nbufs)++; |
569 | } | |
570 | ||
571 | switch (cam->nbufs) { | |
572 | case 1: | |
573 | dma_free_coherent(cam->dev, cam->dma_buf_size, | |
574 | cam->dma_bufs[0], cam->dma_handles[0]); | |
575 | cam->nbufs = 0; | |
576 | case 0: | |
577 | cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); | |
578 | return -ENOMEM; | |
579 | ||
580 | case 2: | |
581 | if (n_dma_bufs > 2) | |
582 | cam_warn(cam, "Will limp along with only 2 buffers\n"); | |
583 | break; | |
584 | } | |
585 | return 0; | |
586 | } | |
587 | ||
588 | static void mcam_free_dma_bufs(struct mcam_camera *cam) | |
589 | { | |
590 | int i; | |
591 | ||
592 | for (i = 0; i < cam->nbufs; i++) { | |
593 | dma_free_coherent(cam->dev, cam->dma_buf_size, | |
594 | cam->dma_bufs[i], cam->dma_handles[i]); | |
595 | cam->dma_bufs[i] = NULL; | |
596 | } | |
597 | cam->nbufs = 0; | |
598 | } | |
599 | ||
600 | ||
601 | ||
abfa3df3 JC |
602 | /* ----------------------------------------------------------------------- */ |
603 | /* | |
604 | * Here starts the V4L2 interface code. | |
605 | */ | |
606 | ||
abfa3df3 JC |
607 | |
608 | /* | |
609 | * Get everything ready, and start grabbing frames. | |
610 | */ | |
a9b36e85 | 611 | static int mcam_read_setup(struct mcam_camera *cam) |
abfa3df3 JC |
612 | { |
613 | int ret; | |
614 | unsigned long flags; | |
615 | ||
616 | /* | |
617 | * Configuration. If we still don't have DMA buffers, | |
618 | * make one last, desperate attempt. | |
619 | */ | |
a9b36e85 JC |
620 | if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 && |
621 | mcam_alloc_dma_bufs(cam, 0)) | |
622 | return -ENOMEM; | |
abfa3df3 JC |
623 | |
624 | if (mcam_needs_config(cam)) { | |
625 | mcam_cam_configure(cam); | |
626 | ret = mcam_ctlr_configure(cam); | |
627 | if (ret) | |
628 | return ret; | |
629 | } | |
630 | ||
631 | /* | |
632 | * Turn it loose. | |
633 | */ | |
634 | spin_lock_irqsave(&cam->dev_lock, flags); | |
635 | mcam_reset_buffers(cam); | |
636 | mcam_ctlr_irq_enable(cam); | |
a9b36e85 | 637 | cam->state = S_STREAMING; |
abfa3df3 JC |
638 | mcam_ctlr_start(cam); |
639 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
640 | return 0; | |
641 | } | |
642 | ||
b5210fd2 JC |
643 | /* ----------------------------------------------------------------------- */ |
644 | /* | |
645 | * Videobuf2 interface code. | |
646 | */ | |
abfa3df3 | 647 | |
b5210fd2 JC |
648 | static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs, |
649 | unsigned int *num_planes, unsigned long sizes[], | |
650 | void *alloc_ctxs[]) | |
abfa3df3 | 651 | { |
b5210fd2 JC |
652 | struct mcam_camera *cam = vb2_get_drv_priv(vq); |
653 | ||
654 | sizes[0] = cam->pix_format.sizeimage; | |
655 | *num_planes = 1; /* Someday we have to support planar formats... */ | |
a9b36e85 JC |
656 | if (*nbufs < 3 || *nbufs > 32) |
657 | *nbufs = 3; /* semi-arbitrary numbers */ | |
658 | if (cam->buffer_mode == B_DMA_contig) | |
659 | alloc_ctxs[0] = cam->vb_alloc_ctx; | |
b5210fd2 JC |
660 | return 0; |
661 | } | |
662 | ||
663 | static int mcam_vb_buf_init(struct vb2_buffer *vb) | |
664 | { | |
665 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | |
666 | ||
667 | INIT_LIST_HEAD(&mvb->queue); | |
668 | return 0; | |
669 | } | |
670 | ||
671 | static void mcam_vb_buf_queue(struct vb2_buffer *vb) | |
672 | { | |
673 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | |
674 | struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); | |
675 | unsigned long flags; | |
a9b36e85 | 676 | int start; |
b5210fd2 JC |
677 | |
678 | spin_lock_irqsave(&cam->dev_lock, flags); | |
a9b36e85 JC |
679 | start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers); |
680 | list_add(&mvb->queue, &cam->buffers); | |
b5210fd2 | 681 | spin_unlock_irqrestore(&cam->dev_lock, flags); |
a9b36e85 JC |
682 | if (start) |
683 | mcam_read_setup(cam); | |
b5210fd2 JC |
684 | } |
685 | ||
686 | /* | |
687 | * vb2 uses these to release the mutex when waiting in dqbuf. I'm | |
688 | * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs | |
689 | * to be called with the mutex held), but better safe than sorry. | |
690 | */ | |
691 | static void mcam_vb_wait_prepare(struct vb2_queue *vq) | |
692 | { | |
693 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
694 | ||
695 | mutex_unlock(&cam->s_mutex); | |
696 | } | |
697 | ||
698 | static void mcam_vb_wait_finish(struct vb2_queue *vq) | |
699 | { | |
700 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
abfa3df3 | 701 | |
abfa3df3 | 702 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 703 | } |
abfa3df3 | 704 | |
b5210fd2 JC |
705 | /* |
706 | * These need to be called with the mutex held from vb2 | |
707 | */ | |
708 | static int mcam_vb_start_streaming(struct vb2_queue *vq) | |
709 | { | |
710 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
abfa3df3 | 711 | |
a9b36e85 JC |
712 | if (cam->state != S_IDLE) |
713 | return -EINVAL; | |
714 | cam->sequence = 0; | |
715 | /* | |
716 | * Videobuf2 sneakily hoards all the buffers and won't | |
717 | * give them to us until *after* streaming starts. But | |
718 | * we can't actually start streaming until we have a | |
719 | * destination. So go into a wait state and hope they | |
720 | * give us buffers soon. | |
721 | */ | |
722 | if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) { | |
723 | cam->state = S_BUFWAIT; | |
724 | return 0; | |
abfa3df3 | 725 | } |
a9b36e85 | 726 | return mcam_read_setup(cam); |
b5210fd2 JC |
727 | } |
728 | ||
729 | static int mcam_vb_stop_streaming(struct vb2_queue *vq) | |
730 | { | |
731 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
732 | unsigned long flags; | |
733 | ||
a9b36e85 JC |
734 | if (cam->state == S_BUFWAIT) { |
735 | /* They never gave us buffers */ | |
736 | cam->state = S_IDLE; | |
737 | return 0; | |
738 | } | |
b5210fd2 JC |
739 | if (cam->state != S_STREAMING) |
740 | return -EINVAL; | |
741 | mcam_ctlr_stop_dma(cam); | |
abfa3df3 | 742 | /* |
b5210fd2 JC |
743 | * VB2 reclaims the buffers, so we need to forget |
744 | * about them. | |
abfa3df3 | 745 | */ |
b5210fd2 JC |
746 | spin_lock_irqsave(&cam->dev_lock, flags); |
747 | INIT_LIST_HEAD(&cam->buffers); | |
748 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
749 | return 0; | |
abfa3df3 JC |
750 | } |
751 | ||
752 | ||
b5210fd2 JC |
753 | static const struct vb2_ops mcam_vb2_ops = { |
754 | .queue_setup = mcam_vb_queue_setup, | |
755 | .buf_init = mcam_vb_buf_init, | |
756 | .buf_queue = mcam_vb_buf_queue, | |
757 | .start_streaming = mcam_vb_start_streaming, | |
758 | .stop_streaming = mcam_vb_stop_streaming, | |
759 | .wait_prepare = mcam_vb_wait_prepare, | |
760 | .wait_finish = mcam_vb_wait_finish, | |
761 | }; | |
abfa3df3 | 762 | |
b5210fd2 JC |
763 | static int mcam_setup_vb2(struct mcam_camera *cam) |
764 | { | |
765 | struct vb2_queue *vq = &cam->vb_queue; | |
abfa3df3 | 766 | |
b5210fd2 JC |
767 | memset(vq, 0, sizeof(*vq)); |
768 | vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
769 | vq->io_modes = VB2_MMAP; /* Add userptr */ | |
770 | vq->drv_priv = cam; | |
771 | vq->ops = &mcam_vb2_ops; | |
a9b36e85 JC |
772 | if (cam->buffer_mode == B_DMA_contig) { |
773 | vq->mem_ops = &vb2_dma_contig_memops; | |
774 | cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev); | |
775 | } else | |
776 | vq->mem_ops = &vb2_vmalloc_memops; | |
b5210fd2 | 777 | vq->buf_struct_size = sizeof(struct mcam_vb_buffer); |
abfa3df3 | 778 | |
b5210fd2 JC |
779 | return vb2_queue_init(vq); |
780 | } | |
781 | ||
782 | static void mcam_cleanup_vb2(struct mcam_camera *cam) | |
783 | { | |
784 | vb2_queue_release(&cam->vb_queue); | |
a9b36e85 JC |
785 | if (cam->buffer_mode == B_DMA_contig) |
786 | vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx); | |
b5210fd2 JC |
787 | } |
788 | ||
789 | static ssize_t mcam_v4l_read(struct file *filp, | |
790 | char __user *buffer, size_t len, loff_t *pos) | |
791 | { | |
792 | struct mcam_camera *cam = filp->private_data; | |
793 | int ret; | |
794 | ||
795 | mutex_lock(&cam->s_mutex); | |
796 | ret = vb2_read(&cam->vb_queue, buffer, len, pos, | |
797 | filp->f_flags & O_NONBLOCK); | |
798 | mutex_unlock(&cam->s_mutex); | |
799 | return ret; | |
800 | } | |
abfa3df3 JC |
801 | |
802 | ||
803 | ||
804 | /* | |
805 | * Streaming I/O support. | |
806 | */ | |
807 | ||
abfa3df3 JC |
808 | static int mcam_vidioc_streamon(struct file *filp, void *priv, |
809 | enum v4l2_buf_type type) | |
810 | { | |
811 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 812 | int ret; |
abfa3df3 | 813 | |
abfa3df3 | 814 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 815 | ret = vb2_streamon(&cam->vb_queue, type); |
abfa3df3 | 816 | mutex_unlock(&cam->s_mutex); |
abfa3df3 JC |
817 | return ret; |
818 | } | |
819 | ||
820 | ||
821 | static int mcam_vidioc_streamoff(struct file *filp, void *priv, | |
822 | enum v4l2_buf_type type) | |
823 | { | |
824 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 825 | int ret; |
abfa3df3 | 826 | |
abfa3df3 | 827 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 828 | ret = vb2_streamoff(&cam->vb_queue, type); |
abfa3df3 | 829 | mutex_unlock(&cam->s_mutex); |
abfa3df3 JC |
830 | return ret; |
831 | } | |
832 | ||
833 | ||
abfa3df3 JC |
834 | static int mcam_vidioc_reqbufs(struct file *filp, void *priv, |
835 | struct v4l2_requestbuffers *req) | |
836 | { | |
837 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 838 | int ret; |
abfa3df3 | 839 | |
abfa3df3 | 840 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 841 | ret = vb2_reqbufs(&cam->vb_queue, req); |
abfa3df3 JC |
842 | mutex_unlock(&cam->s_mutex); |
843 | return ret; | |
844 | } | |
845 | ||
846 | ||
847 | static int mcam_vidioc_querybuf(struct file *filp, void *priv, | |
848 | struct v4l2_buffer *buf) | |
849 | { | |
850 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 851 | int ret; |
abfa3df3 JC |
852 | |
853 | mutex_lock(&cam->s_mutex); | |
b5210fd2 | 854 | ret = vb2_querybuf(&cam->vb_queue, buf); |
abfa3df3 JC |
855 | mutex_unlock(&cam->s_mutex); |
856 | return ret; | |
857 | } | |
858 | ||
859 | static int mcam_vidioc_qbuf(struct file *filp, void *priv, | |
860 | struct v4l2_buffer *buf) | |
861 | { | |
862 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 863 | int ret; |
abfa3df3 JC |
864 | |
865 | mutex_lock(&cam->s_mutex); | |
b5210fd2 | 866 | ret = vb2_qbuf(&cam->vb_queue, buf); |
abfa3df3 JC |
867 | mutex_unlock(&cam->s_mutex); |
868 | return ret; | |
869 | } | |
870 | ||
871 | static int mcam_vidioc_dqbuf(struct file *filp, void *priv, | |
872 | struct v4l2_buffer *buf) | |
873 | { | |
874 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 875 | int ret; |
abfa3df3 JC |
876 | |
877 | mutex_lock(&cam->s_mutex); | |
b5210fd2 | 878 | ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK); |
abfa3df3 | 879 | mutex_unlock(&cam->s_mutex); |
abfa3df3 JC |
880 | return ret; |
881 | } | |
882 | ||
883 | ||
abfa3df3 JC |
884 | static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma) |
885 | { | |
886 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 887 | int ret; |
abfa3df3 | 888 | |
abfa3df3 | 889 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 890 | ret = vb2_mmap(&cam->vb_queue, vma); |
abfa3df3 JC |
891 | mutex_unlock(&cam->s_mutex); |
892 | return ret; | |
893 | } | |
894 | ||
895 | ||
896 | ||
897 | static int mcam_v4l_open(struct file *filp) | |
898 | { | |
899 | struct mcam_camera *cam = video_drvdata(filp); | |
b5210fd2 | 900 | int ret = 0; |
abfa3df3 JC |
901 | |
902 | filp->private_data = cam; | |
903 | ||
a9b36e85 | 904 | frames = singles = delivered = 0; |
abfa3df3 JC |
905 | mutex_lock(&cam->s_mutex); |
906 | if (cam->users == 0) { | |
b5210fd2 JC |
907 | ret = mcam_setup_vb2(cam); |
908 | if (ret) | |
909 | goto out; | |
abfa3df3 JC |
910 | mcam_ctlr_power_up(cam); |
911 | __mcam_cam_reset(cam); | |
912 | mcam_set_config_needed(cam, 1); | |
abfa3df3 JC |
913 | } |
914 | (cam->users)++; | |
b5210fd2 | 915 | out: |
abfa3df3 | 916 | mutex_unlock(&cam->s_mutex); |
b5210fd2 | 917 | return ret; |
abfa3df3 JC |
918 | } |
919 | ||
920 | ||
921 | static int mcam_v4l_release(struct file *filp) | |
922 | { | |
923 | struct mcam_camera *cam = filp->private_data; | |
924 | ||
a9b36e85 JC |
925 | cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames, |
926 | singles, delivered); | |
abfa3df3 JC |
927 | mutex_lock(&cam->s_mutex); |
928 | (cam->users)--; | |
929 | if (filp == cam->owner) { | |
930 | mcam_ctlr_stop_dma(cam); | |
abfa3df3 JC |
931 | cam->owner = NULL; |
932 | } | |
933 | if (cam->users == 0) { | |
b5210fd2 | 934 | mcam_cleanup_vb2(cam); |
abfa3df3 | 935 | mcam_ctlr_power_down(cam); |
a9b36e85 | 936 | if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read) |
abfa3df3 JC |
937 | mcam_free_dma_bufs(cam); |
938 | } | |
939 | mutex_unlock(&cam->s_mutex); | |
940 | return 0; | |
941 | } | |
942 | ||
943 | ||
944 | ||
945 | static unsigned int mcam_v4l_poll(struct file *filp, | |
946 | struct poll_table_struct *pt) | |
947 | { | |
948 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 949 | int ret; |
abfa3df3 | 950 | |
b5210fd2 JC |
951 | mutex_lock(&cam->s_mutex); |
952 | ret = vb2_poll(&cam->vb_queue, filp, pt); | |
953 | mutex_unlock(&cam->s_mutex); | |
954 | return ret; | |
abfa3df3 JC |
955 | } |
956 | ||
957 | ||
958 | ||
959 | static int mcam_vidioc_queryctrl(struct file *filp, void *priv, | |
960 | struct v4l2_queryctrl *qc) | |
961 | { | |
962 | struct mcam_camera *cam = priv; | |
963 | int ret; | |
964 | ||
965 | mutex_lock(&cam->s_mutex); | |
966 | ret = sensor_call(cam, core, queryctrl, qc); | |
967 | mutex_unlock(&cam->s_mutex); | |
968 | return ret; | |
969 | } | |
970 | ||
971 | ||
972 | static int mcam_vidioc_g_ctrl(struct file *filp, void *priv, | |
973 | struct v4l2_control *ctrl) | |
974 | { | |
975 | struct mcam_camera *cam = priv; | |
976 | int ret; | |
977 | ||
978 | mutex_lock(&cam->s_mutex); | |
979 | ret = sensor_call(cam, core, g_ctrl, ctrl); | |
980 | mutex_unlock(&cam->s_mutex); | |
981 | return ret; | |
982 | } | |
983 | ||
984 | ||
985 | static int mcam_vidioc_s_ctrl(struct file *filp, void *priv, | |
986 | struct v4l2_control *ctrl) | |
987 | { | |
988 | struct mcam_camera *cam = priv; | |
989 | int ret; | |
990 | ||
991 | mutex_lock(&cam->s_mutex); | |
992 | ret = sensor_call(cam, core, s_ctrl, ctrl); | |
993 | mutex_unlock(&cam->s_mutex); | |
994 | return ret; | |
995 | } | |
996 | ||
997 | ||
abfa3df3 JC |
998 | static int mcam_vidioc_querycap(struct file *file, void *priv, |
999 | struct v4l2_capability *cap) | |
1000 | { | |
1001 | strcpy(cap->driver, "marvell_ccic"); | |
1002 | strcpy(cap->card, "marvell_ccic"); | |
1003 | cap->version = 1; | |
1004 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | |
1005 | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; | |
1006 | return 0; | |
1007 | } | |
1008 | ||
1009 | ||
1010 | /* | |
1011 | * The default format we use until somebody says otherwise. | |
1012 | */ | |
1013 | static const struct v4l2_pix_format mcam_def_pix_format = { | |
1014 | .width = VGA_WIDTH, | |
1015 | .height = VGA_HEIGHT, | |
1016 | .pixelformat = V4L2_PIX_FMT_YUYV, | |
1017 | .field = V4L2_FIELD_NONE, | |
1018 | .bytesperline = VGA_WIDTH*2, | |
1019 | .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, | |
1020 | }; | |
1021 | ||
1022 | static const enum v4l2_mbus_pixelcode mcam_def_mbus_code = | |
1023 | V4L2_MBUS_FMT_YUYV8_2X8; | |
1024 | ||
1025 | static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp, | |
1026 | void *priv, struct v4l2_fmtdesc *fmt) | |
1027 | { | |
1028 | if (fmt->index >= N_MCAM_FMTS) | |
1029 | return -EINVAL; | |
1030 | strlcpy(fmt->description, mcam_formats[fmt->index].desc, | |
1031 | sizeof(fmt->description)); | |
1032 | fmt->pixelformat = mcam_formats[fmt->index].pixelformat; | |
1033 | return 0; | |
1034 | } | |
1035 | ||
1036 | static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, | |
1037 | struct v4l2_format *fmt) | |
1038 | { | |
1039 | struct mcam_camera *cam = priv; | |
1040 | struct mcam_format_struct *f; | |
1041 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | |
1042 | struct v4l2_mbus_framefmt mbus_fmt; | |
1043 | int ret; | |
1044 | ||
1045 | f = mcam_find_format(pix->pixelformat); | |
1046 | pix->pixelformat = f->pixelformat; | |
1047 | v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); | |
1048 | mutex_lock(&cam->s_mutex); | |
1049 | ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); | |
1050 | mutex_unlock(&cam->s_mutex); | |
1051 | v4l2_fill_pix_format(pix, &mbus_fmt); | |
1052 | pix->bytesperline = pix->width * f->bpp; | |
1053 | pix->sizeimage = pix->height * pix->bytesperline; | |
1054 | return ret; | |
1055 | } | |
1056 | ||
1057 | static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, | |
1058 | struct v4l2_format *fmt) | |
1059 | { | |
1060 | struct mcam_camera *cam = priv; | |
1061 | struct mcam_format_struct *f; | |
1062 | int ret; | |
1063 | ||
1064 | /* | |
1065 | * Can't do anything if the device is not idle | |
1066 | * Also can't if there are streaming buffers in place. | |
1067 | */ | |
b5210fd2 | 1068 | if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0) |
abfa3df3 JC |
1069 | return -EBUSY; |
1070 | ||
1071 | f = mcam_find_format(fmt->fmt.pix.pixelformat); | |
1072 | ||
1073 | /* | |
1074 | * See if the formatting works in principle. | |
1075 | */ | |
1076 | ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt); | |
1077 | if (ret) | |
1078 | return ret; | |
1079 | /* | |
1080 | * Now we start to change things for real, so let's do it | |
1081 | * under lock. | |
1082 | */ | |
1083 | mutex_lock(&cam->s_mutex); | |
1084 | cam->pix_format = fmt->fmt.pix; | |
1085 | cam->mbus_code = f->mbus_code; | |
1086 | ||
1087 | /* | |
1088 | * Make sure we have appropriate DMA buffers. | |
1089 | */ | |
1090 | ret = -ENOMEM; | |
a9b36e85 JC |
1091 | if (cam->buffer_mode == B_vmalloc) { |
1092 | if (cam->nbufs > 0 && | |
1093 | cam->dma_buf_size < cam->pix_format.sizeimage) | |
1094 | mcam_free_dma_bufs(cam); | |
1095 | if (cam->nbufs == 0) { | |
1096 | if (mcam_alloc_dma_bufs(cam, 0)) | |
1097 | goto out; | |
1098 | } | |
abfa3df3 | 1099 | } |
a9b36e85 JC |
1100 | mcam_set_config_needed(cam, 1); |
1101 | ret = 0; | |
abfa3df3 JC |
1102 | out: |
1103 | mutex_unlock(&cam->s_mutex); | |
1104 | return ret; | |
1105 | } | |
1106 | ||
1107 | /* | |
1108 | * Return our stored notion of how the camera is/should be configured. | |
1109 | * The V4l2 spec wants us to be smarter, and actually get this from | |
1110 | * the camera (and not mess with it at open time). Someday. | |
1111 | */ | |
1112 | static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, | |
1113 | struct v4l2_format *f) | |
1114 | { | |
1115 | struct mcam_camera *cam = priv; | |
1116 | ||
1117 | f->fmt.pix = cam->pix_format; | |
1118 | return 0; | |
1119 | } | |
1120 | ||
1121 | /* | |
1122 | * We only have one input - the sensor - so minimize the nonsense here. | |
1123 | */ | |
1124 | static int mcam_vidioc_enum_input(struct file *filp, void *priv, | |
1125 | struct v4l2_input *input) | |
1126 | { | |
1127 | if (input->index != 0) | |
1128 | return -EINVAL; | |
1129 | ||
1130 | input->type = V4L2_INPUT_TYPE_CAMERA; | |
1131 | input->std = V4L2_STD_ALL; /* Not sure what should go here */ | |
1132 | strcpy(input->name, "Camera"); | |
1133 | return 0; | |
1134 | } | |
1135 | ||
1136 | static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) | |
1137 | { | |
1138 | *i = 0; | |
1139 | return 0; | |
1140 | } | |
1141 | ||
1142 | static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i) | |
1143 | { | |
1144 | if (i != 0) | |
1145 | return -EINVAL; | |
1146 | return 0; | |
1147 | } | |
1148 | ||
1149 | /* from vivi.c */ | |
1150 | static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) | |
1151 | { | |
1152 | return 0; | |
1153 | } | |
1154 | ||
1155 | /* | |
1156 | * G/S_PARM. Most of this is done by the sensor, but we are | |
1157 | * the level which controls the number of read buffers. | |
1158 | */ | |
1159 | static int mcam_vidioc_g_parm(struct file *filp, void *priv, | |
1160 | struct v4l2_streamparm *parms) | |
1161 | { | |
1162 | struct mcam_camera *cam = priv; | |
1163 | int ret; | |
1164 | ||
1165 | mutex_lock(&cam->s_mutex); | |
1166 | ret = sensor_call(cam, video, g_parm, parms); | |
1167 | mutex_unlock(&cam->s_mutex); | |
1168 | parms->parm.capture.readbuffers = n_dma_bufs; | |
1169 | return ret; | |
1170 | } | |
1171 | ||
1172 | static int mcam_vidioc_s_parm(struct file *filp, void *priv, | |
1173 | struct v4l2_streamparm *parms) | |
1174 | { | |
1175 | struct mcam_camera *cam = priv; | |
1176 | int ret; | |
1177 | ||
1178 | mutex_lock(&cam->s_mutex); | |
1179 | ret = sensor_call(cam, video, s_parm, parms); | |
1180 | mutex_unlock(&cam->s_mutex); | |
1181 | parms->parm.capture.readbuffers = n_dma_bufs; | |
1182 | return ret; | |
1183 | } | |
1184 | ||
1185 | static int mcam_vidioc_g_chip_ident(struct file *file, void *priv, | |
1186 | struct v4l2_dbg_chip_ident *chip) | |
1187 | { | |
1188 | struct mcam_camera *cam = priv; | |
1189 | ||
1190 | chip->ident = V4L2_IDENT_NONE; | |
1191 | chip->revision = 0; | |
1192 | if (v4l2_chip_match_host(&chip->match)) { | |
1193 | chip->ident = cam->chip_id; | |
1194 | return 0; | |
1195 | } | |
1196 | return sensor_call(cam, core, g_chip_ident, chip); | |
1197 | } | |
1198 | ||
1199 | static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv, | |
1200 | struct v4l2_frmsizeenum *sizes) | |
1201 | { | |
1202 | struct mcam_camera *cam = priv; | |
1203 | int ret; | |
1204 | ||
1205 | mutex_lock(&cam->s_mutex); | |
1206 | ret = sensor_call(cam, video, enum_framesizes, sizes); | |
1207 | mutex_unlock(&cam->s_mutex); | |
1208 | return ret; | |
1209 | } | |
1210 | ||
1211 | static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv, | |
1212 | struct v4l2_frmivalenum *interval) | |
1213 | { | |
1214 | struct mcam_camera *cam = priv; | |
1215 | int ret; | |
1216 | ||
1217 | mutex_lock(&cam->s_mutex); | |
1218 | ret = sensor_call(cam, video, enum_frameintervals, interval); | |
1219 | mutex_unlock(&cam->s_mutex); | |
1220 | return ret; | |
1221 | } | |
1222 | ||
1223 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1224 | static int mcam_vidioc_g_register(struct file *file, void *priv, | |
1225 | struct v4l2_dbg_register *reg) | |
1226 | { | |
1227 | struct mcam_camera *cam = priv; | |
1228 | ||
1229 | if (v4l2_chip_match_host(®->match)) { | |
1230 | reg->val = mcam_reg_read(cam, reg->reg); | |
1231 | reg->size = 4; | |
1232 | return 0; | |
1233 | } | |
1234 | return sensor_call(cam, core, g_register, reg); | |
1235 | } | |
1236 | ||
1237 | static int mcam_vidioc_s_register(struct file *file, void *priv, | |
1238 | struct v4l2_dbg_register *reg) | |
1239 | { | |
1240 | struct mcam_camera *cam = priv; | |
1241 | ||
1242 | if (v4l2_chip_match_host(®->match)) { | |
1243 | mcam_reg_write(cam, reg->reg, reg->val); | |
1244 | return 0; | |
1245 | } | |
1246 | return sensor_call(cam, core, s_register, reg); | |
1247 | } | |
1248 | #endif | |
1249 | ||
1250 | /* | |
1251 | * This template device holds all of those v4l2 methods; we | |
1252 | * clone it for specific real devices. | |
1253 | */ | |
1254 | ||
1255 | static const struct v4l2_file_operations mcam_v4l_fops = { | |
1256 | .owner = THIS_MODULE, | |
1257 | .open = mcam_v4l_open, | |
1258 | .release = mcam_v4l_release, | |
1259 | .read = mcam_v4l_read, | |
1260 | .poll = mcam_v4l_poll, | |
1261 | .mmap = mcam_v4l_mmap, | |
1262 | .unlocked_ioctl = video_ioctl2, | |
1263 | }; | |
1264 | ||
1265 | static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = { | |
1266 | .vidioc_querycap = mcam_vidioc_querycap, | |
1267 | .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap, | |
1268 | .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap, | |
1269 | .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap, | |
1270 | .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap, | |
1271 | .vidioc_enum_input = mcam_vidioc_enum_input, | |
1272 | .vidioc_g_input = mcam_vidioc_g_input, | |
1273 | .vidioc_s_input = mcam_vidioc_s_input, | |
1274 | .vidioc_s_std = mcam_vidioc_s_std, | |
1275 | .vidioc_reqbufs = mcam_vidioc_reqbufs, | |
1276 | .vidioc_querybuf = mcam_vidioc_querybuf, | |
1277 | .vidioc_qbuf = mcam_vidioc_qbuf, | |
1278 | .vidioc_dqbuf = mcam_vidioc_dqbuf, | |
1279 | .vidioc_streamon = mcam_vidioc_streamon, | |
1280 | .vidioc_streamoff = mcam_vidioc_streamoff, | |
1281 | .vidioc_queryctrl = mcam_vidioc_queryctrl, | |
1282 | .vidioc_g_ctrl = mcam_vidioc_g_ctrl, | |
1283 | .vidioc_s_ctrl = mcam_vidioc_s_ctrl, | |
1284 | .vidioc_g_parm = mcam_vidioc_g_parm, | |
1285 | .vidioc_s_parm = mcam_vidioc_s_parm, | |
1286 | .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes, | |
1287 | .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals, | |
1288 | .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident, | |
1289 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1290 | .vidioc_g_register = mcam_vidioc_g_register, | |
1291 | .vidioc_s_register = mcam_vidioc_s_register, | |
1292 | #endif | |
1293 | }; | |
1294 | ||
1295 | static struct video_device mcam_v4l_template = { | |
1296 | .name = "mcam", | |
1297 | .tvnorms = V4L2_STD_NTSC_M, | |
1298 | .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ | |
1299 | ||
1300 | .fops = &mcam_v4l_fops, | |
1301 | .ioctl_ops = &mcam_v4l_ioctl_ops, | |
1302 | .release = video_device_release_empty, | |
1303 | }; | |
1304 | ||
1305 | /* ---------------------------------------------------------------------- */ | |
1306 | /* | |
1307 | * Interrupt handler stuff | |
1308 | */ | |
1309 | ||
1310 | ||
a9b36e85 JC |
1311 | static void mcam_buffer_done(struct mcam_camera *cam, int frame, |
1312 | struct vb2_buffer *vbuf) | |
1313 | { | |
1314 | vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage; | |
1315 | vbuf->v4l2_buf.sequence = cam->buf_seq[frame]; | |
1316 | vbuf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_QUEUED; | |
1317 | vbuf->v4l2_buf.flags |= V4L2_BUF_FLAG_DONE; | |
1318 | vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage); | |
1319 | vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE); | |
1320 | } | |
abfa3df3 | 1321 | |
a9b36e85 JC |
1322 | /* |
1323 | * Copy data out to user space in the vmalloc case | |
1324 | */ | |
abfa3df3 JC |
1325 | static void mcam_frame_tasklet(unsigned long data) |
1326 | { | |
1327 | struct mcam_camera *cam = (struct mcam_camera *) data; | |
1328 | int i; | |
1329 | unsigned long flags; | |
b5210fd2 | 1330 | struct mcam_vb_buffer *buf; |
abfa3df3 JC |
1331 | |
1332 | spin_lock_irqsave(&cam->dev_lock, flags); | |
1333 | for (i = 0; i < cam->nbufs; i++) { | |
1334 | int bufno = cam->next_buf; | |
b5210fd2 JC |
1335 | |
1336 | if (cam->state != S_STREAMING || bufno < 0) | |
1337 | break; /* I/O got stopped */ | |
abfa3df3 JC |
1338 | if (++(cam->next_buf) >= cam->nbufs) |
1339 | cam->next_buf = 0; | |
1340 | if (!test_bit(bufno, &cam->flags)) | |
1341 | continue; | |
a9b36e85 JC |
1342 | if (list_empty(&cam->buffers)) { |
1343 | singles++; | |
abfa3df3 | 1344 | break; /* Leave it valid, hope for better later */ |
a9b36e85 JC |
1345 | } |
1346 | delivered++; | |
abfa3df3 | 1347 | clear_bit(bufno, &cam->flags); |
b5210fd2 JC |
1348 | buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, |
1349 | queue); | |
1350 | list_del_init(&buf->queue); | |
abfa3df3 JC |
1351 | /* |
1352 | * Drop the lock during the big copy. This *should* be safe... | |
1353 | */ | |
1354 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
b5210fd2 | 1355 | memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno], |
abfa3df3 | 1356 | cam->pix_format.sizeimage); |
a9b36e85 | 1357 | mcam_buffer_done(cam, bufno, &buf->vb_buf); |
abfa3df3 | 1358 | spin_lock_irqsave(&cam->dev_lock, flags); |
abfa3df3 | 1359 | } |
abfa3df3 JC |
1360 | spin_unlock_irqrestore(&cam->dev_lock, flags); |
1361 | } | |
1362 | ||
a9b36e85 JC |
1363 | /* |
1364 | * For direct DMA, mark the buffer ready and set up another one. | |
1365 | */ | |
1366 | static void mcam_dma_complete(struct mcam_camera *cam, int frame) | |
1367 | { | |
1368 | struct mcam_vb_buffer *buf = cam->vb_bufs[frame]; | |
1369 | ||
1370 | if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) { | |
1371 | delivered++; | |
1372 | mcam_buffer_done(cam, frame, &buf->vb_buf); | |
1373 | } | |
1374 | mcam_set_contig_buffer(cam, frame); | |
1375 | } | |
abfa3df3 JC |
1376 | |
1377 | ||
1378 | static void mcam_frame_complete(struct mcam_camera *cam, int frame) | |
1379 | { | |
1380 | /* | |
1381 | * Basic frame housekeeping. | |
1382 | */ | |
abfa3df3 JC |
1383 | set_bit(frame, &cam->flags); |
1384 | clear_bit(CF_DMA_ACTIVE, &cam->flags); | |
a9b36e85 | 1385 | cam->next_buf = frame; |
abfa3df3 | 1386 | cam->buf_seq[frame] = ++(cam->sequence); |
a9b36e85 | 1387 | cam->last_delivered = frame; |
abfa3df3 | 1388 | |
a9b36e85 | 1389 | frames++; |
abfa3df3 | 1390 | switch (cam->state) { |
abfa3df3 | 1391 | /* |
a9b36e85 | 1392 | * We're streaming and have a ready frame, hand it back |
abfa3df3 JC |
1393 | */ |
1394 | case S_STREAMING: | |
a9b36e85 JC |
1395 | if (cam->buffer_mode == B_vmalloc) |
1396 | tasklet_schedule(&cam->s_tasklet); | |
1397 | else | |
1398 | mcam_dma_complete(cam, frame); | |
abfa3df3 JC |
1399 | break; |
1400 | ||
1401 | default: | |
1402 | cam_err(cam, "Frame interrupt in non-operational state\n"); | |
1403 | break; | |
1404 | } | |
1405 | } | |
1406 | ||
1407 | ||
1408 | ||
1409 | ||
1410 | int mccic_irq(struct mcam_camera *cam, unsigned int irqs) | |
1411 | { | |
1412 | unsigned int frame, handled = 0; | |
1413 | ||
1414 | mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ | |
1415 | /* | |
1416 | * Handle any frame completions. There really should | |
1417 | * not be more than one of these, or we have fallen | |
1418 | * far behind. | |
1419 | */ | |
1420 | for (frame = 0; frame < cam->nbufs; frame++) | |
1421 | if (irqs & (IRQ_EOF0 << frame)) { | |
1422 | mcam_frame_complete(cam, frame); | |
1423 | handled = 1; | |
1424 | } | |
1425 | /* | |
1426 | * If a frame starts, note that we have DMA active. This | |
1427 | * code assumes that we won't get multiple frame interrupts | |
1428 | * at once; may want to rethink that. | |
1429 | */ | |
1430 | if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) { | |
1431 | set_bit(CF_DMA_ACTIVE, &cam->flags); | |
1432 | handled = 1; | |
1433 | } | |
1434 | return handled; | |
1435 | } | |
1436 | ||
1437 | /* | |
1438 | * Registration and such. | |
1439 | */ | |
1440 | ||
abfa3df3 | 1441 | static struct ov7670_config sensor_cfg = { |
abfa3df3 JC |
1442 | /* |
1443 | * Exclude QCIF mode, because it only captures a tiny portion | |
1444 | * of the sensor FOV | |
1445 | */ | |
1446 | .min_width = 320, | |
1447 | .min_height = 240, | |
1448 | }; | |
1449 | ||
1450 | ||
1451 | int mccic_register(struct mcam_camera *cam) | |
1452 | { | |
1453 | struct i2c_board_info ov7670_info = { | |
1454 | .type = "ov7670", | |
1c68f889 | 1455 | .addr = 0x42 >> 1, |
abfa3df3 JC |
1456 | .platform_data = &sensor_cfg, |
1457 | }; | |
1458 | int ret; | |
1459 | ||
1460 | /* | |
1461 | * Register with V4L | |
1462 | */ | |
1463 | ret = v4l2_device_register(cam->dev, &cam->v4l2_dev); | |
1464 | if (ret) | |
1465 | return ret; | |
1466 | ||
1467 | mutex_init(&cam->s_mutex); | |
1468 | cam->state = S_NOTREADY; | |
1469 | mcam_set_config_needed(cam, 1); | |
abfa3df3 JC |
1470 | cam->pix_format = mcam_def_pix_format; |
1471 | cam->mbus_code = mcam_def_mbus_code; | |
1472 | INIT_LIST_HEAD(&cam->dev_list); | |
b5210fd2 | 1473 | INIT_LIST_HEAD(&cam->buffers); |
abfa3df3 | 1474 | tasklet_init(&cam->s_tasklet, mcam_frame_tasklet, (unsigned long) cam); |
a9b36e85 JC |
1475 | /* |
1476 | * User space may want to override the asked-for buffer mode; | |
1477 | * here's hoping they know what they're doing. | |
1478 | */ | |
1479 | if (buffer_mode == 0) | |
1480 | cam->buffer_mode = B_vmalloc; | |
1481 | else if (buffer_mode == 1) | |
1482 | cam->buffer_mode = B_DMA_contig; | |
1483 | else if (buffer_mode != -1) | |
1484 | printk(KERN_ERR "marvel-cam: " | |
1485 | "Strange module buffer mode %d - ignoring\n", | |
1486 | buffer_mode); | |
abfa3df3 JC |
1487 | mcam_ctlr_init(cam); |
1488 | ||
abfa3df3 JC |
1489 | /* |
1490 | * Try to find the sensor. | |
1491 | */ | |
2164b5af JC |
1492 | sensor_cfg.clock_speed = cam->clock_speed; |
1493 | sensor_cfg.use_smbus = cam->use_smbus; | |
abfa3df3 JC |
1494 | cam->sensor_addr = ov7670_info.addr; |
1495 | cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, | |
595a93a4 | 1496 | cam->i2c_adapter, &ov7670_info, NULL); |
abfa3df3 JC |
1497 | if (cam->sensor == NULL) { |
1498 | ret = -ENODEV; | |
1499 | goto out_unregister; | |
1500 | } | |
1501 | ||
1502 | ret = mcam_cam_init(cam); | |
1503 | if (ret) | |
1504 | goto out_unregister; | |
1505 | /* | |
1506 | * Get the v4l2 setup done. | |
1507 | */ | |
1508 | mutex_lock(&cam->s_mutex); | |
1509 | cam->vdev = mcam_v4l_template; | |
1510 | cam->vdev.debug = 0; | |
1511 | cam->vdev.v4l2_dev = &cam->v4l2_dev; | |
1512 | ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); | |
1513 | if (ret) | |
1514 | goto out; | |
1515 | video_set_drvdata(&cam->vdev, cam); | |
1516 | ||
1517 | /* | |
1518 | * If so requested, try to get our DMA buffers now. | |
1519 | */ | |
a9b36e85 | 1520 | if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) { |
abfa3df3 JC |
1521 | if (mcam_alloc_dma_bufs(cam, 1)) |
1522 | cam_warn(cam, "Unable to alloc DMA buffers at load" | |
1523 | " will try again later."); | |
1524 | } | |
1525 | ||
1526 | out: | |
1527 | mutex_unlock(&cam->s_mutex); | |
1528 | return ret; | |
1529 | out_unregister: | |
1530 | v4l2_device_unregister(&cam->v4l2_dev); | |
1531 | return ret; | |
1532 | } | |
1533 | ||
1534 | ||
1535 | void mccic_shutdown(struct mcam_camera *cam) | |
1536 | { | |
67a8dbbc JC |
1537 | /* |
1538 | * If we have no users (and we really, really should have no | |
1539 | * users) the device will already be powered down. Trying to | |
1540 | * take it down again will wedge the machine, which is frowned | |
1541 | * upon. | |
1542 | */ | |
1543 | if (cam->users > 0) { | |
abfa3df3 | 1544 | cam_warn(cam, "Removing a device with users!\n"); |
67a8dbbc JC |
1545 | mcam_ctlr_power_down(cam); |
1546 | } | |
b5210fd2 | 1547 | vb2_queue_release(&cam->vb_queue); |
a9b36e85 JC |
1548 | if (cam->buffer_mode == B_vmalloc) |
1549 | mcam_free_dma_bufs(cam); | |
abfa3df3 JC |
1550 | video_unregister_device(&cam->vdev); |
1551 | v4l2_device_unregister(&cam->v4l2_dev); | |
1552 | } | |
1553 | ||
1554 | /* | |
1555 | * Power management | |
1556 | */ | |
1557 | #ifdef CONFIG_PM | |
1558 | ||
1559 | void mccic_suspend(struct mcam_camera *cam) | |
1560 | { | |
1561 | enum mcam_state cstate = cam->state; | |
1562 | ||
1563 | mcam_ctlr_stop_dma(cam); | |
1564 | mcam_ctlr_power_down(cam); | |
1565 | cam->state = cstate; | |
1566 | } | |
1567 | ||
1568 | int mccic_resume(struct mcam_camera *cam) | |
1569 | { | |
1570 | int ret = 0; | |
1571 | ||
1572 | mutex_lock(&cam->s_mutex); | |
1573 | if (cam->users > 0) { | |
1574 | mcam_ctlr_power_up(cam); | |
1575 | __mcam_cam_reset(cam); | |
1576 | } else { | |
1577 | mcam_ctlr_power_down(cam); | |
1578 | } | |
1579 | mutex_unlock(&cam->s_mutex); | |
1580 | ||
1581 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | |
b5210fd2 | 1582 | if (cam->state == S_STREAMING) |
a9b36e85 | 1583 | ret = mcam_read_setup(cam); |
abfa3df3 JC |
1584 | return ret; |
1585 | } | |
1586 | #endif /* CONFIG_PM */ |