]>
Commit | Line | Data |
---|---|---|
77110abb | 1 | /* |
d7f83a51 | 2 | * Driver for MT9M111/MT9M112 CMOS Image Sensor from Micron |
77110abb RJ |
3 | * |
4 | * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/videodev2.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/i2c.h> | |
13 | #include <linux/log2.h> | |
14 | #include <linux/gpio.h> | |
15 | #include <linux/delay.h> | |
16 | ||
17 | #include <media/v4l2-common.h> | |
18 | #include <media/v4l2-chip-ident.h> | |
19 | #include <media/soc_camera.h> | |
20 | ||
21 | /* | |
d7f83a51 | 22 | * mt9m111 and mt9m112 i2c address is 0x5d or 0x48 (depending on SAddr pin) |
77110abb RJ |
23 | * The platform has to define i2c_board_info and call i2c_register_board_info() |
24 | */ | |
25 | ||
26 | /* mt9m111: Sensor register addresses */ | |
27 | #define MT9M111_CHIP_VERSION 0x000 | |
28 | #define MT9M111_ROW_START 0x001 | |
29 | #define MT9M111_COLUMN_START 0x002 | |
30 | #define MT9M111_WINDOW_HEIGHT 0x003 | |
31 | #define MT9M111_WINDOW_WIDTH 0x004 | |
32 | #define MT9M111_HORIZONTAL_BLANKING_B 0x005 | |
33 | #define MT9M111_VERTICAL_BLANKING_B 0x006 | |
34 | #define MT9M111_HORIZONTAL_BLANKING_A 0x007 | |
35 | #define MT9M111_VERTICAL_BLANKING_A 0x008 | |
36 | #define MT9M111_SHUTTER_WIDTH 0x009 | |
37 | #define MT9M111_ROW_SPEED 0x00a | |
38 | #define MT9M111_EXTRA_DELAY 0x00b | |
39 | #define MT9M111_SHUTTER_DELAY 0x00c | |
40 | #define MT9M111_RESET 0x00d | |
41 | #define MT9M111_READ_MODE_B 0x020 | |
42 | #define MT9M111_READ_MODE_A 0x021 | |
43 | #define MT9M111_FLASH_CONTROL 0x023 | |
44 | #define MT9M111_GREEN1_GAIN 0x02b | |
45 | #define MT9M111_BLUE_GAIN 0x02c | |
46 | #define MT9M111_RED_GAIN 0x02d | |
47 | #define MT9M111_GREEN2_GAIN 0x02e | |
48 | #define MT9M111_GLOBAL_GAIN 0x02f | |
49 | #define MT9M111_CONTEXT_CONTROL 0x0c8 | |
50 | #define MT9M111_PAGE_MAP 0x0f0 | |
51 | #define MT9M111_BYTE_WISE_ADDR 0x0f1 | |
52 | ||
53 | #define MT9M111_RESET_SYNC_CHANGES (1 << 15) | |
54 | #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9) | |
55 | #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8) | |
56 | #define MT9M111_RESET_RESET_SOC (1 << 5) | |
57 | #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4) | |
58 | #define MT9M111_RESET_CHIP_ENABLE (1 << 3) | |
59 | #define MT9M111_RESET_ANALOG_STANDBY (1 << 2) | |
60 | #define MT9M111_RESET_RESTART_FRAME (1 << 1) | |
61 | #define MT9M111_RESET_RESET_MODE (1 << 0) | |
62 | ||
63 | #define MT9M111_RMB_MIRROR_COLS (1 << 1) | |
64 | #define MT9M111_RMB_MIRROR_ROWS (1 << 0) | |
65 | #define MT9M111_CTXT_CTRL_RESTART (1 << 15) | |
66 | #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12) | |
67 | #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10) | |
68 | #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9) | |
69 | #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8) | |
70 | #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7) | |
71 | #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3) | |
72 | #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2) | |
73 | #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1) | |
74 | #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0) | |
75 | /* | |
76 | * mt9m111: Colorpipe register addresses (0x100..0x1ff) | |
77 | */ | |
78 | #define MT9M111_OPER_MODE_CTRL 0x106 | |
79 | #define MT9M111_OUTPUT_FORMAT_CTRL 0x108 | |
80 | #define MT9M111_REDUCER_XZOOM_B 0x1a0 | |
81 | #define MT9M111_REDUCER_XSIZE_B 0x1a1 | |
82 | #define MT9M111_REDUCER_YZOOM_B 0x1a3 | |
83 | #define MT9M111_REDUCER_YSIZE_B 0x1a4 | |
84 | #define MT9M111_REDUCER_XZOOM_A 0x1a6 | |
85 | #define MT9M111_REDUCER_XSIZE_A 0x1a7 | |
86 | #define MT9M111_REDUCER_YZOOM_A 0x1a9 | |
87 | #define MT9M111_REDUCER_YSIZE_A 0x1aa | |
88 | ||
89 | #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a | |
90 | #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b | |
91 | ||
92 | #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) | |
39bf372f | 93 | #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) |
77110abb RJ |
94 | |
95 | #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) | |
96 | #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) | |
97 | #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) | |
98 | #define MT9M111_OUTFMT_RGB (1 << 8) | |
99 | #define MT9M111_OUTFMT_RGB565 (0x0 << 6) | |
100 | #define MT9M111_OUTFMT_RGB555 (0x1 << 6) | |
101 | #define MT9M111_OUTFMT_RGB444x (0x2 << 6) | |
102 | #define MT9M111_OUTFMT_RGBx444 (0x3 << 6) | |
103 | #define MT9M111_OUTFMT_TST_RAMP_OFF (0x0 << 4) | |
104 | #define MT9M111_OUTFMT_TST_RAMP_COL (0x1 << 4) | |
105 | #define MT9M111_OUTFMT_TST_RAMP_ROW (0x2 << 4) | |
106 | #define MT9M111_OUTFMT_TST_RAMP_FRAME (0x3 << 4) | |
107 | #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) | |
108 | #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) | |
109 | #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y (1 << 1) | |
110 | #define MT9M111_OUTFMT_SWAP_RGB_EVEN (1 << 1) | |
111 | #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr (1 << 0) | |
112 | /* | |
113 | * mt9m111: Camera control register addresses (0x200..0x2ff not implemented) | |
114 | */ | |
115 | ||
9538e1c2 GL |
116 | #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg) |
117 | #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) | |
118 | #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) | |
119 | #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) | |
77110abb RJ |
120 | |
121 | #define MT9M111_MIN_DARK_ROWS 8 | |
122 | #define MT9M111_MIN_DARK_COLS 24 | |
123 | #define MT9M111_MAX_HEIGHT 1024 | |
124 | #define MT9M111_MAX_WIDTH 1280 | |
125 | ||
126 | #define COL_FMT(_name, _depth, _fourcc, _colorspace) \ | |
127 | { .name = _name, .depth = _depth, .fourcc = _fourcc, \ | |
128 | .colorspace = _colorspace } | |
129 | #define RGB_FMT(_name, _depth, _fourcc) \ | |
130 | COL_FMT(_name, _depth, _fourcc, V4L2_COLORSPACE_SRGB) | |
88f4b899 RJ |
131 | #define JPG_FMT(_name, _depth, _fourcc) \ |
132 | COL_FMT(_name, _depth, _fourcc, V4L2_COLORSPACE_JPEG) | |
77110abb RJ |
133 | |
134 | static const struct soc_camera_data_format mt9m111_colour_formats[] = { | |
88f4b899 RJ |
135 | JPG_FMT("CbYCrY 16 bit", 16, V4L2_PIX_FMT_UYVY), |
136 | JPG_FMT("CrYCbY 16 bit", 16, V4L2_PIX_FMT_VYUY), | |
137 | JPG_FMT("YCbYCr 16 bit", 16, V4L2_PIX_FMT_YUYV), | |
138 | JPG_FMT("YCrYCb 16 bit", 16, V4L2_PIX_FMT_YVYU), | |
77110abb RJ |
139 | RGB_FMT("RGB 565", 16, V4L2_PIX_FMT_RGB565), |
140 | RGB_FMT("RGB 555", 16, V4L2_PIX_FMT_RGB555), | |
141 | RGB_FMT("Bayer (sRGB) 10 bit", 10, V4L2_PIX_FMT_SBGGR16), | |
142 | RGB_FMT("Bayer (sRGB) 8 bit", 8, V4L2_PIX_FMT_SBGGR8), | |
143 | }; | |
144 | ||
145 | enum mt9m111_context { | |
146 | HIGHPOWER = 0, | |
147 | LOWPOWER, | |
148 | }; | |
149 | ||
150 | struct mt9m111 { | |
979ea1dd | 151 | struct v4l2_subdev subdev; |
d7f83a51 | 152 | int model; /* V4L2_IDENT_MT9M11x* codes from v4l2-chip-ident.h */ |
77110abb | 153 | enum mt9m111_context context; |
09e231b3 | 154 | struct v4l2_rect rect; |
77110abb RJ |
155 | u32 pixfmt; |
156 | unsigned char autoexposure; | |
157 | unsigned char datawidth; | |
158 | unsigned int powered:1; | |
159 | unsigned int hflip:1; | |
160 | unsigned int vflip:1; | |
161 | unsigned int swap_rgb_even_odd:1; | |
162 | unsigned int swap_rgb_red_blue:1; | |
163 | unsigned int swap_yuv_y_chromas:1; | |
164 | unsigned int swap_yuv_cb_cr:1; | |
39bf372f | 165 | unsigned int autowhitebalance:1; |
77110abb RJ |
166 | }; |
167 | ||
979ea1dd GL |
168 | static struct mt9m111 *to_mt9m111(const struct i2c_client *client) |
169 | { | |
170 | return container_of(i2c_get_clientdata(client), struct mt9m111, subdev); | |
171 | } | |
172 | ||
77110abb RJ |
173 | static int reg_page_map_set(struct i2c_client *client, const u16 reg) |
174 | { | |
175 | int ret; | |
176 | u16 page; | |
177 | static int lastpage = -1; /* PageMap cache value */ | |
178 | ||
179 | page = (reg >> 8); | |
180 | if (page == lastpage) | |
181 | return 0; | |
182 | if (page > 2) | |
183 | return -EINVAL; | |
184 | ||
185 | ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page)); | |
506c629a | 186 | if (!ret) |
77110abb RJ |
187 | lastpage = page; |
188 | return ret; | |
189 | } | |
190 | ||
9538e1c2 | 191 | static int mt9m111_reg_read(struct i2c_client *client, const u16 reg) |
77110abb | 192 | { |
77110abb RJ |
193 | int ret; |
194 | ||
195 | ret = reg_page_map_set(client, reg); | |
196 | if (!ret) | |
197 | ret = swab16(i2c_smbus_read_word_data(client, (reg & 0xff))); | |
198 | ||
9538e1c2 | 199 | dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret); |
77110abb RJ |
200 | return ret; |
201 | } | |
202 | ||
9538e1c2 | 203 | static int mt9m111_reg_write(struct i2c_client *client, const u16 reg, |
77110abb RJ |
204 | const u16 data) |
205 | { | |
77110abb RJ |
206 | int ret; |
207 | ||
208 | ret = reg_page_map_set(client, reg); | |
506c629a | 209 | if (!ret) |
40e2e092 | 210 | ret = i2c_smbus_write_word_data(client, reg & 0xff, |
77110abb | 211 | swab16(data)); |
9538e1c2 | 212 | dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret); |
77110abb RJ |
213 | return ret; |
214 | } | |
215 | ||
9538e1c2 | 216 | static int mt9m111_reg_set(struct i2c_client *client, const u16 reg, |
77110abb RJ |
217 | const u16 data) |
218 | { | |
219 | int ret; | |
220 | ||
9538e1c2 | 221 | ret = mt9m111_reg_read(client, reg); |
77110abb | 222 | if (ret >= 0) |
9538e1c2 | 223 | ret = mt9m111_reg_write(client, reg, ret | data); |
77110abb RJ |
224 | return ret; |
225 | } | |
226 | ||
9538e1c2 | 227 | static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg, |
77110abb RJ |
228 | const u16 data) |
229 | { | |
230 | int ret; | |
231 | ||
9538e1c2 GL |
232 | ret = mt9m111_reg_read(client, reg); |
233 | return mt9m111_reg_write(client, reg, ret & ~data); | |
77110abb RJ |
234 | } |
235 | ||
979ea1dd | 236 | static int mt9m111_set_context(struct i2c_client *client, |
77110abb RJ |
237 | enum mt9m111_context ctxt) |
238 | { | |
239 | int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B | |
240 | | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B | |
241 | | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B | |
242 | | MT9M111_CTXT_CTRL_VBLANK_SEL_B | |
243 | | MT9M111_CTXT_CTRL_HBLANK_SEL_B; | |
244 | int valA = MT9M111_CTXT_CTRL_RESTART; | |
245 | ||
246 | if (ctxt == HIGHPOWER) | |
247 | return reg_write(CONTEXT_CONTROL, valB); | |
248 | else | |
249 | return reg_write(CONTEXT_CONTROL, valA); | |
250 | } | |
251 | ||
979ea1dd | 252 | static int mt9m111_setup_rect(struct i2c_client *client, |
09e231b3 | 253 | struct v4l2_rect *rect) |
77110abb | 254 | { |
979ea1dd | 255 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
506c629a | 256 | int ret, is_raw_format; |
09e231b3 GL |
257 | int width = rect->width; |
258 | int height = rect->height; | |
77110abb RJ |
259 | |
260 | if ((mt9m111->pixfmt == V4L2_PIX_FMT_SBGGR8) | |
261 | || (mt9m111->pixfmt == V4L2_PIX_FMT_SBGGR16)) | |
262 | is_raw_format = 1; | |
263 | else | |
264 | is_raw_format = 0; | |
265 | ||
09e231b3 | 266 | ret = reg_write(COLUMN_START, rect->left); |
506c629a | 267 | if (!ret) |
09e231b3 | 268 | ret = reg_write(ROW_START, rect->top); |
77110abb RJ |
269 | |
270 | if (is_raw_format) { | |
506c629a | 271 | if (!ret) |
77110abb | 272 | ret = reg_write(WINDOW_WIDTH, width); |
506c629a | 273 | if (!ret) |
77110abb RJ |
274 | ret = reg_write(WINDOW_HEIGHT, height); |
275 | } else { | |
506c629a | 276 | if (!ret) |
77110abb | 277 | ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH); |
506c629a | 278 | if (!ret) |
77110abb | 279 | ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT); |
506c629a | 280 | if (!ret) |
77110abb | 281 | ret = reg_write(REDUCER_XSIZE_B, width); |
506c629a | 282 | if (!ret) |
77110abb | 283 | ret = reg_write(REDUCER_YSIZE_B, height); |
506c629a | 284 | if (!ret) |
77110abb | 285 | ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH); |
506c629a | 286 | if (!ret) |
77110abb | 287 | ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT); |
506c629a | 288 | if (!ret) |
77110abb | 289 | ret = reg_write(REDUCER_XSIZE_A, width); |
506c629a | 290 | if (!ret) |
77110abb RJ |
291 | ret = reg_write(REDUCER_YSIZE_A, height); |
292 | } | |
293 | ||
294 | return ret; | |
295 | } | |
296 | ||
979ea1dd | 297 | static int mt9m111_setup_pixfmt(struct i2c_client *client, u16 outfmt) |
77110abb RJ |
298 | { |
299 | int ret; | |
300 | ||
301 | ret = reg_write(OUTPUT_FORMAT_CTRL2_A, outfmt); | |
506c629a | 302 | if (!ret) |
77110abb RJ |
303 | ret = reg_write(OUTPUT_FORMAT_CTRL2_B, outfmt); |
304 | return ret; | |
305 | } | |
306 | ||
979ea1dd | 307 | static int mt9m111_setfmt_bayer8(struct i2c_client *client) |
77110abb | 308 | { |
979ea1dd | 309 | return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_PROCESSED_BAYER); |
77110abb RJ |
310 | } |
311 | ||
979ea1dd | 312 | static int mt9m111_setfmt_bayer10(struct i2c_client *client) |
77110abb | 313 | { |
979ea1dd | 314 | return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_BYPASS_IFP); |
77110abb RJ |
315 | } |
316 | ||
979ea1dd | 317 | static int mt9m111_setfmt_rgb565(struct i2c_client *client) |
77110abb | 318 | { |
979ea1dd | 319 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
320 | int val = 0; |
321 | ||
322 | if (mt9m111->swap_rgb_red_blue) | |
323 | val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr; | |
324 | if (mt9m111->swap_rgb_even_odd) | |
325 | val |= MT9M111_OUTFMT_SWAP_RGB_EVEN; | |
326 | val |= MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; | |
327 | ||
979ea1dd | 328 | return mt9m111_setup_pixfmt(client, val); |
77110abb RJ |
329 | } |
330 | ||
979ea1dd | 331 | static int mt9m111_setfmt_rgb555(struct i2c_client *client) |
77110abb | 332 | { |
979ea1dd | 333 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
334 | int val = 0; |
335 | ||
336 | if (mt9m111->swap_rgb_red_blue) | |
337 | val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr; | |
338 | if (mt9m111->swap_rgb_even_odd) | |
339 | val |= MT9M111_OUTFMT_SWAP_RGB_EVEN; | |
340 | val |= MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; | |
341 | ||
979ea1dd | 342 | return mt9m111_setup_pixfmt(client, val); |
77110abb RJ |
343 | } |
344 | ||
979ea1dd | 345 | static int mt9m111_setfmt_yuv(struct i2c_client *client) |
77110abb | 346 | { |
979ea1dd | 347 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
348 | int val = 0; |
349 | ||
350 | if (mt9m111->swap_yuv_cb_cr) | |
351 | val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr; | |
352 | if (mt9m111->swap_yuv_y_chromas) | |
353 | val |= MT9M111_OUTFMT_SWAP_YCbCr_C_Y; | |
354 | ||
979ea1dd | 355 | return mt9m111_setup_pixfmt(client, val); |
77110abb RJ |
356 | } |
357 | ||
979ea1dd | 358 | static int mt9m111_enable(struct i2c_client *client) |
77110abb | 359 | { |
979ea1dd | 360 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
361 | int ret; |
362 | ||
363 | ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE); | |
506c629a | 364 | if (!ret) |
77110abb RJ |
365 | mt9m111->powered = 1; |
366 | return ret; | |
367 | } | |
368 | ||
979ea1dd | 369 | static int mt9m111_reset(struct i2c_client *client) |
77110abb RJ |
370 | { |
371 | int ret; | |
372 | ||
373 | ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); | |
506c629a | 374 | if (!ret) |
77110abb | 375 | ret = reg_set(RESET, MT9M111_RESET_RESET_SOC); |
506c629a | 376 | if (!ret) |
77110abb RJ |
377 | ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE |
378 | | MT9M111_RESET_RESET_SOC); | |
afb13683 | 379 | |
77110abb RJ |
380 | return ret; |
381 | } | |
382 | ||
77110abb RJ |
383 | static unsigned long mt9m111_query_bus_param(struct soc_camera_device *icd) |
384 | { | |
40e2e092 | 385 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
bd73b36f | 386 | unsigned long flags = SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING | |
77110abb | 387 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH | |
2d9329f3 | 388 | SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8; |
bd73b36f GL |
389 | |
390 | return soc_camera_apply_sensor_flags(icl, flags); | |
77110abb RJ |
391 | } |
392 | ||
393 | static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f) | |
394 | { | |
395 | return 0; | |
396 | } | |
397 | ||
08590b96 | 398 | static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) |
09e231b3 | 399 | { |
08590b96 GL |
400 | struct v4l2_rect *rect = &a->c; |
401 | struct i2c_client *client = sd->priv; | |
979ea1dd | 402 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
09e231b3 GL |
403 | int ret; |
404 | ||
85f8be68 | 405 | dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n", |
09e231b3 GL |
406 | __func__, rect->left, rect->top, rect->width, |
407 | rect->height); | |
408 | ||
979ea1dd | 409 | ret = mt9m111_setup_rect(client, rect); |
09e231b3 GL |
410 | if (!ret) |
411 | mt9m111->rect = *rect; | |
412 | return ret; | |
413 | } | |
414 | ||
979ea1dd | 415 | static int mt9m111_set_pixfmt(struct i2c_client *client, u32 pixfmt) |
77110abb | 416 | { |
979ea1dd | 417 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
506c629a | 418 | int ret; |
77110abb RJ |
419 | |
420 | switch (pixfmt) { | |
421 | case V4L2_PIX_FMT_SBGGR8: | |
979ea1dd | 422 | ret = mt9m111_setfmt_bayer8(client); |
77110abb RJ |
423 | break; |
424 | case V4L2_PIX_FMT_SBGGR16: | |
979ea1dd | 425 | ret = mt9m111_setfmt_bayer10(client); |
77110abb RJ |
426 | break; |
427 | case V4L2_PIX_FMT_RGB555: | |
979ea1dd | 428 | ret = mt9m111_setfmt_rgb555(client); |
77110abb RJ |
429 | break; |
430 | case V4L2_PIX_FMT_RGB565: | |
979ea1dd | 431 | ret = mt9m111_setfmt_rgb565(client); |
77110abb | 432 | break; |
88f4b899 RJ |
433 | case V4L2_PIX_FMT_UYVY: |
434 | mt9m111->swap_yuv_y_chromas = 0; | |
435 | mt9m111->swap_yuv_cb_cr = 0; | |
979ea1dd | 436 | ret = mt9m111_setfmt_yuv(client); |
88f4b899 RJ |
437 | break; |
438 | case V4L2_PIX_FMT_VYUY: | |
439 | mt9m111->swap_yuv_y_chromas = 0; | |
440 | mt9m111->swap_yuv_cb_cr = 1; | |
979ea1dd | 441 | ret = mt9m111_setfmt_yuv(client); |
88f4b899 | 442 | break; |
77110abb | 443 | case V4L2_PIX_FMT_YUYV: |
88f4b899 RJ |
444 | mt9m111->swap_yuv_y_chromas = 1; |
445 | mt9m111->swap_yuv_cb_cr = 0; | |
979ea1dd | 446 | ret = mt9m111_setfmt_yuv(client); |
88f4b899 RJ |
447 | break; |
448 | case V4L2_PIX_FMT_YVYU: | |
449 | mt9m111->swap_yuv_y_chromas = 1; | |
450 | mt9m111->swap_yuv_cb_cr = 1; | |
979ea1dd | 451 | ret = mt9m111_setfmt_yuv(client); |
77110abb RJ |
452 | break; |
453 | default: | |
979ea1dd | 454 | dev_err(&client->dev, "Pixel format not handled : %x\n", pixfmt); |
77110abb RJ |
455 | ret = -EINVAL; |
456 | } | |
457 | ||
506c629a | 458 | if (!ret) |
77110abb RJ |
459 | mt9m111->pixfmt = pixfmt; |
460 | ||
461 | return ret; | |
462 | } | |
463 | ||
979ea1dd | 464 | static int mt9m111_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f) |
77110abb | 465 | { |
979ea1dd GL |
466 | struct i2c_client *client = sd->priv; |
467 | struct mt9m111 *mt9m111 = to_mt9m111(client); | |
09e231b3 GL |
468 | struct v4l2_pix_format *pix = &f->fmt.pix; |
469 | struct v4l2_rect rect = { | |
470 | .left = mt9m111->rect.left, | |
471 | .top = mt9m111->rect.top, | |
472 | .width = pix->width, | |
473 | .height = pix->height, | |
474 | }; | |
506c629a | 475 | int ret; |
77110abb | 476 | |
979ea1dd | 477 | dev_dbg(&client->dev, "%s fmt=%x left=%d, top=%d, width=%d, height=%d\n", |
09e231b3 GL |
478 | __func__, pix->pixelformat, rect.left, rect.top, rect.width, |
479 | rect.height); | |
77110abb | 480 | |
979ea1dd | 481 | ret = mt9m111_setup_rect(client, &rect); |
09e231b3 | 482 | if (!ret) |
979ea1dd | 483 | ret = mt9m111_set_pixfmt(client, pix->pixelformat); |
506c629a | 484 | if (!ret) |
09e231b3 | 485 | mt9m111->rect = rect; |
506c629a | 486 | return ret; |
77110abb RJ |
487 | } |
488 | ||
979ea1dd | 489 | static int mt9m111_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f) |
77110abb | 490 | { |
64f5905e GL |
491 | struct v4l2_pix_format *pix = &f->fmt.pix; |
492 | ||
493 | if (pix->height > MT9M111_MAX_HEIGHT) | |
494 | pix->height = MT9M111_MAX_HEIGHT; | |
495 | if (pix->width > MT9M111_MAX_WIDTH) | |
496 | pix->width = MT9M111_MAX_WIDTH; | |
77110abb RJ |
497 | |
498 | return 0; | |
499 | } | |
500 | ||
979ea1dd GL |
501 | static int mt9m111_g_chip_ident(struct v4l2_subdev *sd, |
502 | struct v4l2_dbg_chip_ident *id) | |
77110abb | 503 | { |
979ea1dd GL |
504 | struct i2c_client *client = sd->priv; |
505 | struct mt9m111 *mt9m111 = to_mt9m111(client); | |
77110abb | 506 | |
aecde8b5 | 507 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) |
77110abb RJ |
508 | return -EINVAL; |
509 | ||
40e2e092 | 510 | if (id->match.addr != client->addr) |
77110abb RJ |
511 | return -ENODEV; |
512 | ||
513 | id->ident = mt9m111->model; | |
514 | id->revision = 0; | |
515 | ||
516 | return 0; | |
517 | } | |
518 | ||
519 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
979ea1dd GL |
520 | static int mt9m111_g_register(struct v4l2_subdev *sd, |
521 | struct v4l2_dbg_register *reg) | |
77110abb | 522 | { |
979ea1dd | 523 | struct i2c_client *client = sd->priv; |
77110abb | 524 | int val; |
77110abb | 525 | |
aecde8b5 | 526 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff) |
77110abb | 527 | return -EINVAL; |
9538e1c2 | 528 | if (reg->match.addr != client->addr) |
77110abb RJ |
529 | return -ENODEV; |
530 | ||
9538e1c2 | 531 | val = mt9m111_reg_read(client, reg->reg); |
aecde8b5 | 532 | reg->size = 2; |
77110abb RJ |
533 | reg->val = (u64)val; |
534 | ||
535 | if (reg->val > 0xffff) | |
536 | return -EIO; | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
979ea1dd GL |
541 | static int mt9m111_s_register(struct v4l2_subdev *sd, |
542 | struct v4l2_dbg_register *reg) | |
77110abb | 543 | { |
979ea1dd | 544 | struct i2c_client *client = sd->priv; |
77110abb | 545 | |
aecde8b5 | 546 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff) |
77110abb RJ |
547 | return -EINVAL; |
548 | ||
9538e1c2 | 549 | if (reg->match.addr != client->addr) |
77110abb RJ |
550 | return -ENODEV; |
551 | ||
9538e1c2 | 552 | if (mt9m111_reg_write(client, reg->reg, reg->val) < 0) |
77110abb RJ |
553 | return -EIO; |
554 | ||
555 | return 0; | |
556 | } | |
557 | #endif | |
558 | ||
559 | static const struct v4l2_queryctrl mt9m111_controls[] = { | |
560 | { | |
561 | .id = V4L2_CID_VFLIP, | |
562 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
563 | .name = "Flip Verticaly", | |
564 | .minimum = 0, | |
565 | .maximum = 1, | |
566 | .step = 1, | |
567 | .default_value = 0, | |
568 | }, { | |
569 | .id = V4L2_CID_HFLIP, | |
570 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
571 | .name = "Flip Horizontaly", | |
572 | .minimum = 0, | |
573 | .maximum = 1, | |
574 | .step = 1, | |
575 | .default_value = 0, | |
576 | }, { /* gain = 1/32*val (=>gain=1 if val==32) */ | |
577 | .id = V4L2_CID_GAIN, | |
578 | .type = V4L2_CTRL_TYPE_INTEGER, | |
579 | .name = "Gain", | |
580 | .minimum = 0, | |
581 | .maximum = 63 * 2 * 2, | |
582 | .step = 1, | |
583 | .default_value = 32, | |
584 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
585 | }, { | |
586 | .id = V4L2_CID_EXPOSURE_AUTO, | |
587 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
588 | .name = "Auto Exposure", | |
589 | .minimum = 0, | |
590 | .maximum = 1, | |
591 | .step = 1, | |
592 | .default_value = 1, | |
593 | } | |
594 | }; | |
595 | ||
77110abb RJ |
596 | static int mt9m111_resume(struct soc_camera_device *icd); |
597 | static int mt9m111_init(struct soc_camera_device *icd); | |
598 | static int mt9m111_release(struct soc_camera_device *icd); | |
599 | ||
600 | static struct soc_camera_ops mt9m111_ops = { | |
77110abb RJ |
601 | .init = mt9m111_init, |
602 | .resume = mt9m111_resume, | |
603 | .release = mt9m111_release, | |
77110abb RJ |
604 | .query_bus_param = mt9m111_query_bus_param, |
605 | .set_bus_param = mt9m111_set_bus_param, | |
606 | .controls = mt9m111_controls, | |
607 | .num_controls = ARRAY_SIZE(mt9m111_controls), | |
77110abb RJ |
608 | }; |
609 | ||
979ea1dd | 610 | static int mt9m111_set_flip(struct i2c_client *client, int flip, int mask) |
77110abb | 611 | { |
979ea1dd | 612 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
613 | int ret; |
614 | ||
615 | if (mt9m111->context == HIGHPOWER) { | |
616 | if (flip) | |
617 | ret = reg_set(READ_MODE_B, mask); | |
618 | else | |
619 | ret = reg_clear(READ_MODE_B, mask); | |
620 | } else { | |
621 | if (flip) | |
622 | ret = reg_set(READ_MODE_A, mask); | |
623 | else | |
624 | ret = reg_clear(READ_MODE_A, mask); | |
625 | } | |
626 | ||
627 | return ret; | |
628 | } | |
629 | ||
979ea1dd | 630 | static int mt9m111_get_global_gain(struct i2c_client *client) |
77110abb | 631 | { |
0f28b793 | 632 | int data; |
77110abb RJ |
633 | |
634 | data = reg_read(GLOBAL_GAIN); | |
635 | if (data >= 0) | |
0f28b793 | 636 | return (data & 0x2f) * (1 << ((data >> 10) & 1)) * |
637 | (1 << ((data >> 9) & 1)); | |
638 | return data; | |
77110abb | 639 | } |
0f28b793 | 640 | |
979ea1dd | 641 | static int mt9m111_set_global_gain(struct i2c_client *client, int gain) |
77110abb | 642 | { |
979ea1dd | 643 | struct soc_camera_device *icd = client->dev.platform_data; |
77110abb RJ |
644 | u16 val; |
645 | ||
646 | if (gain > 63 * 2 * 2) | |
647 | return -EINVAL; | |
648 | ||
649 | icd->gain = gain; | |
650 | if ((gain >= 64 * 2) && (gain < 63 * 2 * 2)) | |
651 | val = (1 << 10) | (1 << 9) | (gain / 4); | |
652 | else if ((gain >= 64) && (gain < 64 * 2)) | |
506c629a | 653 | val = (1 << 9) | (gain / 2); |
77110abb RJ |
654 | else |
655 | val = gain; | |
656 | ||
657 | return reg_write(GLOBAL_GAIN, val); | |
658 | } | |
659 | ||
979ea1dd | 660 | static int mt9m111_set_autoexposure(struct i2c_client *client, int on) |
77110abb | 661 | { |
979ea1dd | 662 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
663 | int ret; |
664 | ||
665 | if (on) | |
666 | ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); | |
667 | else | |
668 | ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN); | |
669 | ||
506c629a | 670 | if (!ret) |
77110abb RJ |
671 | mt9m111->autoexposure = on; |
672 | ||
673 | return ret; | |
674 | } | |
39bf372f | 675 | |
979ea1dd | 676 | static int mt9m111_set_autowhitebalance(struct i2c_client *client, int on) |
39bf372f | 677 | { |
979ea1dd | 678 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
39bf372f RJ |
679 | int ret; |
680 | ||
681 | if (on) | |
682 | ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); | |
683 | else | |
684 | ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN); | |
685 | ||
686 | if (!ret) | |
687 | mt9m111->autowhitebalance = on; | |
688 | ||
689 | return ret; | |
690 | } | |
691 | ||
979ea1dd | 692 | static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
77110abb | 693 | { |
979ea1dd GL |
694 | struct i2c_client *client = sd->priv; |
695 | struct mt9m111 *mt9m111 = to_mt9m111(client); | |
77110abb RJ |
696 | int data; |
697 | ||
698 | switch (ctrl->id) { | |
699 | case V4L2_CID_VFLIP: | |
700 | if (mt9m111->context == HIGHPOWER) | |
701 | data = reg_read(READ_MODE_B); | |
702 | else | |
703 | data = reg_read(READ_MODE_A); | |
704 | ||
705 | if (data < 0) | |
706 | return -EIO; | |
707 | ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS); | |
708 | break; | |
709 | case V4L2_CID_HFLIP: | |
710 | if (mt9m111->context == HIGHPOWER) | |
711 | data = reg_read(READ_MODE_B); | |
712 | else | |
713 | data = reg_read(READ_MODE_A); | |
714 | ||
715 | if (data < 0) | |
716 | return -EIO; | |
717 | ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS); | |
718 | break; | |
719 | case V4L2_CID_GAIN: | |
979ea1dd | 720 | data = mt9m111_get_global_gain(client); |
77110abb RJ |
721 | if (data < 0) |
722 | return data; | |
723 | ctrl->value = data; | |
724 | break; | |
725 | case V4L2_CID_EXPOSURE_AUTO: | |
726 | ctrl->value = mt9m111->autoexposure; | |
727 | break; | |
39bf372f RJ |
728 | case V4L2_CID_AUTO_WHITE_BALANCE: |
729 | ctrl->value = mt9m111->autowhitebalance; | |
730 | break; | |
77110abb RJ |
731 | } |
732 | return 0; | |
733 | } | |
734 | ||
979ea1dd | 735 | static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
77110abb | 736 | { |
979ea1dd GL |
737 | struct i2c_client *client = sd->priv; |
738 | struct mt9m111 *mt9m111 = to_mt9m111(client); | |
77110abb | 739 | const struct v4l2_queryctrl *qctrl; |
506c629a | 740 | int ret; |
77110abb RJ |
741 | |
742 | qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id); | |
77110abb RJ |
743 | if (!qctrl) |
744 | return -EINVAL; | |
745 | ||
746 | switch (ctrl->id) { | |
747 | case V4L2_CID_VFLIP: | |
748 | mt9m111->vflip = ctrl->value; | |
979ea1dd | 749 | ret = mt9m111_set_flip(client, ctrl->value, |
77110abb RJ |
750 | MT9M111_RMB_MIRROR_ROWS); |
751 | break; | |
752 | case V4L2_CID_HFLIP: | |
753 | mt9m111->hflip = ctrl->value; | |
979ea1dd | 754 | ret = mt9m111_set_flip(client, ctrl->value, |
77110abb RJ |
755 | MT9M111_RMB_MIRROR_COLS); |
756 | break; | |
757 | case V4L2_CID_GAIN: | |
979ea1dd | 758 | ret = mt9m111_set_global_gain(client, ctrl->value); |
77110abb RJ |
759 | break; |
760 | case V4L2_CID_EXPOSURE_AUTO: | |
979ea1dd | 761 | ret = mt9m111_set_autoexposure(client, ctrl->value); |
77110abb | 762 | break; |
39bf372f | 763 | case V4L2_CID_AUTO_WHITE_BALANCE: |
979ea1dd | 764 | ret = mt9m111_set_autowhitebalance(client, ctrl->value); |
39bf372f | 765 | break; |
77110abb RJ |
766 | default: |
767 | ret = -EINVAL; | |
768 | } | |
769 | ||
506c629a | 770 | return ret; |
77110abb RJ |
771 | } |
772 | ||
979ea1dd | 773 | static int mt9m111_restore_state(struct i2c_client *client) |
77110abb | 774 | { |
979ea1dd GL |
775 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
776 | struct soc_camera_device *icd = client->dev.platform_data; | |
777 | ||
778 | mt9m111_set_context(client, mt9m111->context); | |
779 | mt9m111_set_pixfmt(client, mt9m111->pixfmt); | |
780 | mt9m111_setup_rect(client, &mt9m111->rect); | |
781 | mt9m111_set_flip(client, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS); | |
782 | mt9m111_set_flip(client, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS); | |
783 | mt9m111_set_global_gain(client, icd->gain); | |
784 | mt9m111_set_autoexposure(client, mt9m111->autoexposure); | |
785 | mt9m111_set_autowhitebalance(client, mt9m111->autowhitebalance); | |
77110abb RJ |
786 | return 0; |
787 | } | |
788 | ||
789 | static int mt9m111_resume(struct soc_camera_device *icd) | |
790 | { | |
40e2e092 | 791 | struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); |
979ea1dd | 792 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
793 | int ret = 0; |
794 | ||
795 | if (mt9m111->powered) { | |
979ea1dd | 796 | ret = mt9m111_enable(client); |
506c629a | 797 | if (!ret) |
979ea1dd | 798 | ret = mt9m111_reset(client); |
506c629a | 799 | if (!ret) |
979ea1dd | 800 | ret = mt9m111_restore_state(client); |
77110abb RJ |
801 | } |
802 | return ret; | |
803 | } | |
804 | ||
805 | static int mt9m111_init(struct soc_camera_device *icd) | |
806 | { | |
40e2e092 | 807 | struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); |
979ea1dd | 808 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
809 | int ret; |
810 | ||
811 | mt9m111->context = HIGHPOWER; | |
979ea1dd | 812 | ret = mt9m111_enable(client); |
506c629a | 813 | if (!ret) |
979ea1dd | 814 | ret = mt9m111_reset(client); |
506c629a | 815 | if (!ret) |
979ea1dd | 816 | ret = mt9m111_set_context(client, mt9m111->context); |
506c629a | 817 | if (!ret) |
979ea1dd | 818 | ret = mt9m111_set_autoexposure(client, mt9m111->autoexposure); |
506c629a | 819 | if (ret) |
85f8be68 | 820 | dev_err(&client->dev, "mt9m11x init failed: %d\n", ret); |
506c629a | 821 | return ret; |
77110abb RJ |
822 | } |
823 | ||
824 | static int mt9m111_release(struct soc_camera_device *icd) | |
825 | { | |
979ea1dd GL |
826 | struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); |
827 | struct mt9m111 *mt9m111 = to_mt9m111(client); | |
77110abb RJ |
828 | int ret; |
829 | ||
979ea1dd GL |
830 | ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE); |
831 | if (!ret) | |
832 | mt9m111->powered = 0; | |
833 | ||
77110abb | 834 | if (ret < 0) |
85f8be68 | 835 | dev_err(&client->dev, "mt9m11x release failed: %d\n", ret); |
77110abb | 836 | |
506c629a | 837 | return ret; |
77110abb RJ |
838 | } |
839 | ||
840 | /* | |
841 | * Interface active, can use i2c. If it fails, it can indeed mean, that | |
842 | * this wasn't our capture interface, so, we wait for the right one | |
843 | */ | |
40e2e092 GL |
844 | static int mt9m111_video_probe(struct soc_camera_device *icd, |
845 | struct i2c_client *client) | |
77110abb | 846 | { |
979ea1dd | 847 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
77110abb RJ |
848 | s32 data; |
849 | int ret; | |
850 | ||
851 | /* | |
852 | * We must have a parent by now. And it cannot be a wrong one. | |
853 | * So this entire test is completely redundant. | |
854 | */ | |
855 | if (!icd->dev.parent || | |
856 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | |
857 | return -ENODEV; | |
858 | ||
979ea1dd | 859 | ret = mt9m111_enable(client); |
77110abb RJ |
860 | if (ret) |
861 | goto ei2c; | |
979ea1dd | 862 | ret = mt9m111_reset(client); |
77110abb RJ |
863 | if (ret) |
864 | goto ei2c; | |
865 | ||
866 | data = reg_read(CHIP_VERSION); | |
867 | ||
868 | switch (data) { | |
d7f83a51 | 869 | case 0x143a: /* MT9M111 */ |
77110abb | 870 | mt9m111->model = V4L2_IDENT_MT9M111; |
d7f83a51 MR |
871 | break; |
872 | case 0x148c: /* MT9M112 */ | |
873 | mt9m111->model = V4L2_IDENT_MT9M112; | |
77110abb RJ |
874 | break; |
875 | default: | |
876 | ret = -ENODEV; | |
85f8be68 | 877 | dev_err(&client->dev, |
d7f83a51 | 878 | "No MT9M11x chip detected, register read %x\n", data); |
77110abb RJ |
879 | goto ei2c; |
880 | } | |
881 | ||
d7f83a51 MR |
882 | icd->formats = mt9m111_colour_formats; |
883 | icd->num_formats = ARRAY_SIZE(mt9m111_colour_formats); | |
884 | ||
85f8be68 | 885 | dev_info(&client->dev, "Detected a MT9M11x chip ID %x\n", data); |
77110abb | 886 | |
77110abb | 887 | mt9m111->autoexposure = 1; |
39bf372f | 888 | mt9m111->autowhitebalance = 1; |
77110abb RJ |
889 | |
890 | mt9m111->swap_rgb_even_odd = 1; | |
891 | mt9m111->swap_rgb_red_blue = 1; | |
892 | ||
77110abb RJ |
893 | ei2c: |
894 | return ret; | |
895 | } | |
896 | ||
979ea1dd GL |
897 | static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { |
898 | .g_ctrl = mt9m111_g_ctrl, | |
899 | .s_ctrl = mt9m111_s_ctrl, | |
900 | .g_chip_ident = mt9m111_g_chip_ident, | |
901 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
902 | .g_register = mt9m111_g_register, | |
903 | .s_register = mt9m111_s_register, | |
904 | #endif | |
905 | }; | |
906 | ||
907 | static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = { | |
908 | .s_fmt = mt9m111_s_fmt, | |
909 | .try_fmt = mt9m111_try_fmt, | |
08590b96 | 910 | .s_crop = mt9m111_s_crop, |
979ea1dd GL |
911 | }; |
912 | ||
913 | static struct v4l2_subdev_ops mt9m111_subdev_ops = { | |
914 | .core = &mt9m111_subdev_core_ops, | |
915 | .video = &mt9m111_subdev_video_ops, | |
916 | }; | |
917 | ||
77110abb RJ |
918 | static int mt9m111_probe(struct i2c_client *client, |
919 | const struct i2c_device_id *did) | |
920 | { | |
921 | struct mt9m111 *mt9m111; | |
40e2e092 | 922 | struct soc_camera_device *icd = client->dev.platform_data; |
77110abb | 923 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
40e2e092 | 924 | struct soc_camera_link *icl; |
77110abb RJ |
925 | int ret; |
926 | ||
40e2e092 GL |
927 | if (!icd) { |
928 | dev_err(&client->dev, "MT9M11x: missing soc-camera data!\n"); | |
929 | return -EINVAL; | |
930 | } | |
931 | ||
932 | icl = to_soc_camera_link(icd); | |
77110abb | 933 | if (!icl) { |
d7f83a51 | 934 | dev_err(&client->dev, "MT9M11x driver needs platform data\n"); |
77110abb RJ |
935 | return -EINVAL; |
936 | } | |
937 | ||
938 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | |
939 | dev_warn(&adapter->dev, | |
940 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | |
941 | return -EIO; | |
942 | } | |
943 | ||
944 | mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL); | |
945 | if (!mt9m111) | |
946 | return -ENOMEM; | |
947 | ||
979ea1dd | 948 | v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops); |
77110abb RJ |
949 | |
950 | /* Second stage probe - when a capture adapter is there */ | |
a0705b07 GL |
951 | icd->ops = &mt9m111_ops; |
952 | icd->rect_max.left = MT9M111_MIN_DARK_COLS; | |
953 | icd->rect_max.top = MT9M111_MIN_DARK_ROWS; | |
954 | icd->rect_max.width = MT9M111_MAX_WIDTH; | |
955 | icd->rect_max.height = MT9M111_MAX_HEIGHT; | |
956 | icd->rect_current.left = icd->rect_max.left; | |
957 | icd->rect_current.top = icd->rect_max.top; | |
958 | icd->width_min = MT9M111_MIN_DARK_ROWS; | |
959 | icd->height_min = MT9M111_MIN_DARK_COLS; | |
960 | icd->y_skip_top = 0; | |
77110abb | 961 | |
40e2e092 GL |
962 | ret = mt9m111_video_probe(icd, client); |
963 | if (ret) { | |
964 | icd->ops = NULL; | |
965 | i2c_set_clientdata(client, NULL); | |
966 | kfree(mt9m111); | |
967 | } | |
77110abb | 968 | |
77110abb RJ |
969 | return ret; |
970 | } | |
971 | ||
972 | static int mt9m111_remove(struct i2c_client *client) | |
973 | { | |
979ea1dd | 974 | struct mt9m111 *mt9m111 = to_mt9m111(client); |
40e2e092 GL |
975 | struct soc_camera_device *icd = client->dev.platform_data; |
976 | ||
977 | icd->ops = NULL; | |
978 | i2c_set_clientdata(client, NULL); | |
979 | client->driver = NULL; | |
77110abb RJ |
980 | kfree(mt9m111); |
981 | ||
982 | return 0; | |
983 | } | |
984 | ||
985 | static const struct i2c_device_id mt9m111_id[] = { | |
986 | { "mt9m111", 0 }, | |
987 | { } | |
988 | }; | |
989 | MODULE_DEVICE_TABLE(i2c, mt9m111_id); | |
990 | ||
991 | static struct i2c_driver mt9m111_i2c_driver = { | |
992 | .driver = { | |
993 | .name = "mt9m111", | |
994 | }, | |
995 | .probe = mt9m111_probe, | |
996 | .remove = mt9m111_remove, | |
997 | .id_table = mt9m111_id, | |
998 | }; | |
999 | ||
1000 | static int __init mt9m111_mod_init(void) | |
1001 | { | |
1002 | return i2c_add_driver(&mt9m111_i2c_driver); | |
1003 | } | |
1004 | ||
1005 | static void __exit mt9m111_mod_exit(void) | |
1006 | { | |
1007 | i2c_del_driver(&mt9m111_i2c_driver); | |
1008 | } | |
1009 | ||
1010 | module_init(mt9m111_mod_init); | |
1011 | module_exit(mt9m111_mod_exit); | |
1012 | ||
d7f83a51 | 1013 | MODULE_DESCRIPTION("Micron MT9M111/MT9M112 Camera driver"); |
77110abb RJ |
1014 | MODULE_AUTHOR("Robert Jarzmik"); |
1015 | MODULE_LICENSE("GPL"); |