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77110abb 1/*
c8cf078e 2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
77110abb
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3 *
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/videodev2.h>
11#include <linux/slab.h>
12#include <linux/i2c.h>
13#include <linux/log2.h>
14#include <linux/gpio.h>
15#include <linux/delay.h>
16
17#include <media/v4l2-common.h>
18#include <media/v4l2-chip-ident.h>
19#include <media/soc_camera.h>
20
21/*
c8cf078e
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22 * MT9M111, MT9M112 and MT9M131:
23 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
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24 * The platform has to define i2c_board_info and call i2c_register_board_info()
25 */
26
c8cf078e
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27/*
28 * Sensor core register addresses (0x000..0x0ff)
29 */
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30#define MT9M111_CHIP_VERSION 0x000
31#define MT9M111_ROW_START 0x001
32#define MT9M111_COLUMN_START 0x002
33#define MT9M111_WINDOW_HEIGHT 0x003
34#define MT9M111_WINDOW_WIDTH 0x004
35#define MT9M111_HORIZONTAL_BLANKING_B 0x005
36#define MT9M111_VERTICAL_BLANKING_B 0x006
37#define MT9M111_HORIZONTAL_BLANKING_A 0x007
38#define MT9M111_VERTICAL_BLANKING_A 0x008
39#define MT9M111_SHUTTER_WIDTH 0x009
40#define MT9M111_ROW_SPEED 0x00a
41#define MT9M111_EXTRA_DELAY 0x00b
42#define MT9M111_SHUTTER_DELAY 0x00c
43#define MT9M111_RESET 0x00d
44#define MT9M111_READ_MODE_B 0x020
45#define MT9M111_READ_MODE_A 0x021
46#define MT9M111_FLASH_CONTROL 0x023
47#define MT9M111_GREEN1_GAIN 0x02b
48#define MT9M111_BLUE_GAIN 0x02c
49#define MT9M111_RED_GAIN 0x02d
50#define MT9M111_GREEN2_GAIN 0x02e
51#define MT9M111_GLOBAL_GAIN 0x02f
52#define MT9M111_CONTEXT_CONTROL 0x0c8
53#define MT9M111_PAGE_MAP 0x0f0
54#define MT9M111_BYTE_WISE_ADDR 0x0f1
55
56#define MT9M111_RESET_SYNC_CHANGES (1 << 15)
57#define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
58#define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
59#define MT9M111_RESET_RESET_SOC (1 << 5)
60#define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
61#define MT9M111_RESET_CHIP_ENABLE (1 << 3)
62#define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
63#define MT9M111_RESET_RESTART_FRAME (1 << 1)
64#define MT9M111_RESET_RESET_MODE (1 << 0)
65
66#define MT9M111_RMB_MIRROR_COLS (1 << 1)
67#define MT9M111_RMB_MIRROR_ROWS (1 << 0)
68#define MT9M111_CTXT_CTRL_RESTART (1 << 15)
69#define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
70#define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
71#define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
72#define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
73#define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
74#define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
75#define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
76#define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
77#define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
c8cf078e 78
77110abb 79/*
c8cf078e 80 * Colorpipe register addresses (0x100..0x1ff)
77110abb
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81 */
82#define MT9M111_OPER_MODE_CTRL 0x106
83#define MT9M111_OUTPUT_FORMAT_CTRL 0x108
84#define MT9M111_REDUCER_XZOOM_B 0x1a0
85#define MT9M111_REDUCER_XSIZE_B 0x1a1
86#define MT9M111_REDUCER_YZOOM_B 0x1a3
87#define MT9M111_REDUCER_YSIZE_B 0x1a4
88#define MT9M111_REDUCER_XZOOM_A 0x1a6
89#define MT9M111_REDUCER_XSIZE_A 0x1a7
90#define MT9M111_REDUCER_YZOOM_A 0x1a9
91#define MT9M111_REDUCER_YSIZE_A 0x1aa
92
93#define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
94#define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
95
96#define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
39bf372f 97#define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
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98
99#define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
100#define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
101#define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
102#define MT9M111_OUTFMT_RGB (1 << 8)
ec73365b
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103#define MT9M111_OUTFMT_RGB565 (0 << 6)
104#define MT9M111_OUTFMT_RGB555 (1 << 6)
105#define MT9M111_OUTFMT_RGB444x (2 << 6)
106#define MT9M111_OUTFMT_RGBx444 (3 << 6)
107#define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
108#define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
109#define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
110#define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
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111#define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
112#define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
113#define MT9M111_OUTFMT_SWAP_YCbCr_C_Y (1 << 1)
114#define MT9M111_OUTFMT_SWAP_RGB_EVEN (1 << 1)
115#define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr (1 << 0)
c8cf078e 116
77110abb 117/*
c8cf078e 118 * Camera control register addresses (0x200..0x2ff not implemented)
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119 */
120
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121#define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
122#define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
123#define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
124#define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
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125
126#define MT9M111_MIN_DARK_ROWS 8
669470a8 127#define MT9M111_MIN_DARK_COLS 26
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128#define MT9M111_MAX_HEIGHT 1024
129#define MT9M111_MAX_WIDTH 1280
130
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131/* MT9M111 has only one fixed colorspace per pixelcode */
132struct mt9m111_datafmt {
133 enum v4l2_mbus_pixelcode code;
134 enum v4l2_colorspace colorspace;
135};
136
137/* Find a data format by a pixel code in an array */
138static const struct mt9m111_datafmt *mt9m111_find_datafmt(
139 enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
140 int n)
141{
142 int i;
143 for (i = 0; i < n; i++)
144 if (fmt[i].code == code)
145 return fmt + i;
146
147 return NULL;
148}
149
150static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
ace6e979
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151 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
152 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
153 {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
154 {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
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155 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
156 {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
157 {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
158 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
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159};
160
161enum mt9m111_context {
162 HIGHPOWER = 0,
163 LOWPOWER,
164};
165
166struct mt9m111 {
979ea1dd 167 struct v4l2_subdev subdev;
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168 int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
169 * from v4l2-chip-ident.h */
77110abb 170 enum mt9m111_context context;
09e231b3 171 struct v4l2_rect rect;
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172 struct mutex power_lock; /* lock to protect power_count */
173 int power_count;
760697be 174 const struct mt9m111_datafmt *fmt;
96c75399 175 unsigned int gain;
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176 unsigned char autoexposure;
177 unsigned char datawidth;
178 unsigned int powered:1;
179 unsigned int hflip:1;
180 unsigned int vflip:1;
181 unsigned int swap_rgb_even_odd:1;
182 unsigned int swap_rgb_red_blue:1;
183 unsigned int swap_yuv_y_chromas:1;
184 unsigned int swap_yuv_cb_cr:1;
39bf372f 185 unsigned int autowhitebalance:1;
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186};
187
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188static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
189{
190 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
191}
192
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193static int reg_page_map_set(struct i2c_client *client, const u16 reg)
194{
195 int ret;
196 u16 page;
197 static int lastpage = -1; /* PageMap cache value */
198
199 page = (reg >> 8);
200 if (page == lastpage)
201 return 0;
202 if (page > 2)
203 return -EINVAL;
204
205 ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page));
506c629a 206 if (!ret)
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207 lastpage = page;
208 return ret;
209}
210
9538e1c2 211static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
77110abb 212{
77110abb
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213 int ret;
214
215 ret = reg_page_map_set(client, reg);
216 if (!ret)
6a6c8786 217 ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff));
77110abb 218
9538e1c2 219 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
77110abb
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220 return ret;
221}
222
9538e1c2 223static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
77110abb
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224 const u16 data)
225{
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226 int ret;
227
228 ret = reg_page_map_set(client, reg);
506c629a 229 if (!ret)
40e2e092 230 ret = i2c_smbus_write_word_data(client, reg & 0xff,
77110abb 231 swab16(data));
9538e1c2 232 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
77110abb
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233 return ret;
234}
235
9538e1c2 236static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
77110abb
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237 const u16 data)
238{
239 int ret;
240
9538e1c2 241 ret = mt9m111_reg_read(client, reg);
77110abb 242 if (ret >= 0)
9538e1c2 243 ret = mt9m111_reg_write(client, reg, ret | data);
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244 return ret;
245}
246
9538e1c2 247static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
77110abb
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248 const u16 data)
249{
250 int ret;
251
9538e1c2
GL
252 ret = mt9m111_reg_read(client, reg);
253 return mt9m111_reg_write(client, reg, ret & ~data);
77110abb
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254}
255
2768cbbb 256static int mt9m111_set_context(struct mt9m111 *mt9m111,
77110abb
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257 enum mt9m111_context ctxt)
258{
2768cbbb 259 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
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260 int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B
261 | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
262 | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
263 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
264 | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
265 int valA = MT9M111_CTXT_CTRL_RESTART;
266
267 if (ctxt == HIGHPOWER)
268 return reg_write(CONTEXT_CONTROL, valB);
269 else
270 return reg_write(CONTEXT_CONTROL, valA);
271}
272
2768cbbb 273static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
09e231b3 274 struct v4l2_rect *rect)
77110abb 275{
2768cbbb 276 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
506c629a 277 int ret, is_raw_format;
09e231b3
GL
278 int width = rect->width;
279 int height = rect->height;
77110abb 280
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281 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
282 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
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283 is_raw_format = 1;
284 else
285 is_raw_format = 0;
286
09e231b3 287 ret = reg_write(COLUMN_START, rect->left);
506c629a 288 if (!ret)
09e231b3 289 ret = reg_write(ROW_START, rect->top);
77110abb
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290
291 if (is_raw_format) {
506c629a 292 if (!ret)
77110abb 293 ret = reg_write(WINDOW_WIDTH, width);
506c629a 294 if (!ret)
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295 ret = reg_write(WINDOW_HEIGHT, height);
296 } else {
506c629a 297 if (!ret)
77110abb 298 ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
506c629a 299 if (!ret)
77110abb 300 ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
506c629a 301 if (!ret)
77110abb 302 ret = reg_write(REDUCER_XSIZE_B, width);
506c629a 303 if (!ret)
77110abb 304 ret = reg_write(REDUCER_YSIZE_B, height);
506c629a 305 if (!ret)
77110abb 306 ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
506c629a 307 if (!ret)
77110abb 308 ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
506c629a 309 if (!ret)
77110abb 310 ret = reg_write(REDUCER_XSIZE_A, width);
506c629a 311 if (!ret)
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312 ret = reg_write(REDUCER_YSIZE_A, height);
313 }
314
315 return ret;
316}
317
979ea1dd 318static int mt9m111_setup_pixfmt(struct i2c_client *client, u16 outfmt)
77110abb
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319{
320 int ret;
4bc90dea
TG
321 u16 mask = MT9M111_OUTFMT_PROCESSED_BAYER | MT9M111_OUTFMT_RGB |
322 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_SWAP_RGB_EVEN |
323 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
324 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr |
325 MT9M111_OUTFMT_SWAP_YCbCr_C_Y;
77110abb 326
4bc90dea
TG
327 ret = reg_read(OUTPUT_FORMAT_CTRL2_A);
328 if (ret >= 0)
329 ret = reg_write(OUTPUT_FORMAT_CTRL2_A, (ret & ~mask) | outfmt);
506c629a 330 if (!ret)
4bc90dea
TG
331 ret = reg_read(OUTPUT_FORMAT_CTRL2_B);
332 if (ret >= 0)
333 ret = reg_write(OUTPUT_FORMAT_CTRL2_B, (ret & ~mask) | outfmt);
334
77110abb
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335 return ret;
336}
337
2768cbbb 338static int mt9m111_setfmt_bayer8(struct mt9m111 *mt9m111)
77110abb 339{
2768cbbb
GL
340 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
341
760697be
GL
342 return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_PROCESSED_BAYER |
343 MT9M111_OUTFMT_RGB);
77110abb
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344}
345
2768cbbb 346static int mt9m111_setfmt_bayer10(struct mt9m111 *mt9m111)
77110abb 347{
2768cbbb
GL
348 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
349
979ea1dd 350 return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_BYPASS_IFP);
77110abb
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351}
352
2768cbbb 353static int mt9m111_setfmt_rgb565(struct mt9m111 *mt9m111)
77110abb 354{
2768cbbb
GL
355 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
356 int val = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
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357
358 if (mt9m111->swap_rgb_red_blue)
359 val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr;
360 if (mt9m111->swap_rgb_even_odd)
361 val |= MT9M111_OUTFMT_SWAP_RGB_EVEN;
77110abb 362
979ea1dd 363 return mt9m111_setup_pixfmt(client, val);
77110abb
RJ
364}
365
2768cbbb 366static int mt9m111_setfmt_rgb555(struct mt9m111 *mt9m111)
77110abb 367{
2768cbbb
GL
368 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
369 int val = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
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370
371 if (mt9m111->swap_rgb_red_blue)
372 val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr;
373 if (mt9m111->swap_rgb_even_odd)
374 val |= MT9M111_OUTFMT_SWAP_RGB_EVEN;
77110abb 375
979ea1dd 376 return mt9m111_setup_pixfmt(client, val);
77110abb
RJ
377}
378
2768cbbb 379static int mt9m111_setfmt_yuv(struct mt9m111 *mt9m111)
77110abb 380{
2768cbbb 381 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
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382 int val = 0;
383
384 if (mt9m111->swap_yuv_cb_cr)
385 val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr;
386 if (mt9m111->swap_yuv_y_chromas)
387 val |= MT9M111_OUTFMT_SWAP_YCbCr_C_Y;
388
979ea1dd 389 return mt9m111_setup_pixfmt(client, val);
77110abb
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390}
391
2768cbbb 392static int mt9m111_enable(struct mt9m111 *mt9m111)
77110abb 393{
2768cbbb 394 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
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395 int ret;
396
397 ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
506c629a 398 if (!ret)
77110abb
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399 mt9m111->powered = 1;
400 return ret;
401}
402
2768cbbb 403static int mt9m111_reset(struct mt9m111 *mt9m111)
77110abb 404{
2768cbbb 405 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
406 int ret;
407
408 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
506c629a 409 if (!ret)
77110abb 410 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
506c629a 411 if (!ret)
77110abb
RJ
412 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
413 | MT9M111_RESET_RESET_SOC);
afb13683 414
77110abb
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415 return ret;
416}
417
77110abb
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418static unsigned long mt9m111_query_bus_param(struct soc_camera_device *icd)
419{
40e2e092 420 struct soc_camera_link *icl = to_soc_camera_link(icd);
bd73b36f 421 unsigned long flags = SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |
77110abb 422 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
2d9329f3 423 SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
bd73b36f
GL
424
425 return soc_camera_apply_sensor_flags(icl, flags);
77110abb
RJ
426}
427
428static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f)
429{
430 return 0;
431}
432
2768cbbb 433static int mt9m111_make_rect(struct mt9m111 *mt9m111,
6a6c8786
GL
434 struct v4l2_rect *rect)
435{
760697be
GL
436 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
437 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
6a6c8786
GL
438 /* Bayer format - even size lengths */
439 rect->width = ALIGN(rect->width, 2);
440 rect->height = ALIGN(rect->height, 2);
441 /* Let the user play with the starting pixel */
442 }
443
444 /* FIXME: the datasheet doesn't specify minimum sizes */
445 soc_camera_limit_side(&rect->left, &rect->width,
446 MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
447
448 soc_camera_limit_side(&rect->top, &rect->height,
449 MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
450
2768cbbb 451 return mt9m111_setup_rect(mt9m111, rect);
6a6c8786
GL
452}
453
08590b96 454static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
09e231b3 455{
6a6c8786 456 struct v4l2_rect rect = a->c;
c4ce6d14 457 struct i2c_client *client = v4l2_get_subdevdata(sd);
2768cbbb 458 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
09e231b3
GL
459 int ret;
460
85f8be68 461 dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
6a6c8786 462 __func__, rect.left, rect.top, rect.width, rect.height);
09e231b3 463
6b6d33c7
MG
464 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
465 return -EINVAL;
466
2768cbbb 467 ret = mt9m111_make_rect(mt9m111, &rect);
09e231b3 468 if (!ret)
6a6c8786 469 mt9m111->rect = rect;
09e231b3
GL
470 return ret;
471}
472
6a6c8786
GL
473static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
474{
2768cbbb 475 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
6a6c8786
GL
476
477 a->c = mt9m111->rect;
478 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
479
480 return 0;
481}
482
483static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
484{
6b6d33c7
MG
485 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
486 return -EINVAL;
487
6a6c8786
GL
488 a->bounds.left = MT9M111_MIN_DARK_COLS;
489 a->bounds.top = MT9M111_MIN_DARK_ROWS;
490 a->bounds.width = MT9M111_MAX_WIDTH;
491 a->bounds.height = MT9M111_MAX_HEIGHT;
492 a->defrect = a->bounds;
6a6c8786
GL
493 a->pixelaspect.numerator = 1;
494 a->pixelaspect.denominator = 1;
495
496 return 0;
497}
498
760697be
GL
499static int mt9m111_g_fmt(struct v4l2_subdev *sd,
500 struct v4l2_mbus_framefmt *mf)
6a6c8786 501{
2768cbbb 502 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
6a6c8786 503
760697be
GL
504 mf->width = mt9m111->rect.width;
505 mf->height = mt9m111->rect.height;
506 mf->code = mt9m111->fmt->code;
01f5a394 507 mf->colorspace = mt9m111->fmt->colorspace;
760697be 508 mf->field = V4L2_FIELD_NONE;
6a6c8786
GL
509
510 return 0;
511}
512
2768cbbb 513static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
760697be 514 enum v4l2_mbus_pixelcode code)
77110abb 515{
2768cbbb 516 struct i2c_client *client;
506c629a 517 int ret;
77110abb 518
760697be
GL
519 switch (code) {
520 case V4L2_MBUS_FMT_SBGGR8_1X8:
2768cbbb 521 ret = mt9m111_setfmt_bayer8(mt9m111);
77110abb 522 break;
760697be 523 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
2768cbbb 524 ret = mt9m111_setfmt_bayer10(mt9m111);
77110abb 525 break;
760697be 526 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
2768cbbb 527 ret = mt9m111_setfmt_rgb555(mt9m111);
77110abb 528 break;
760697be 529 case V4L2_MBUS_FMT_RGB565_2X8_LE:
2768cbbb 530 ret = mt9m111_setfmt_rgb565(mt9m111);
77110abb 531 break;
ace6e979 532 case V4L2_MBUS_FMT_UYVY8_2X8:
88f4b899
RJ
533 mt9m111->swap_yuv_y_chromas = 0;
534 mt9m111->swap_yuv_cb_cr = 0;
2768cbbb 535 ret = mt9m111_setfmt_yuv(mt9m111);
88f4b899 536 break;
ace6e979 537 case V4L2_MBUS_FMT_VYUY8_2X8:
88f4b899
RJ
538 mt9m111->swap_yuv_y_chromas = 0;
539 mt9m111->swap_yuv_cb_cr = 1;
2768cbbb 540 ret = mt9m111_setfmt_yuv(mt9m111);
88f4b899 541 break;
ace6e979 542 case V4L2_MBUS_FMT_YUYV8_2X8:
88f4b899
RJ
543 mt9m111->swap_yuv_y_chromas = 1;
544 mt9m111->swap_yuv_cb_cr = 0;
2768cbbb 545 ret = mt9m111_setfmt_yuv(mt9m111);
88f4b899 546 break;
ace6e979 547 case V4L2_MBUS_FMT_YVYU8_2X8:
88f4b899
RJ
548 mt9m111->swap_yuv_y_chromas = 1;
549 mt9m111->swap_yuv_cb_cr = 1;
2768cbbb 550 ret = mt9m111_setfmt_yuv(mt9m111);
77110abb
RJ
551 break;
552 default:
2768cbbb 553 client = v4l2_get_subdevdata(&mt9m111->subdev);
96c75399 554 dev_err(&client->dev, "Pixel format not handled : %x\n",
760697be 555 code);
77110abb
RJ
556 ret = -EINVAL;
557 }
558
77110abb
RJ
559 return ret;
560}
561
760697be
GL
562static int mt9m111_s_fmt(struct v4l2_subdev *sd,
563 struct v4l2_mbus_framefmt *mf)
77110abb 564{
c4ce6d14 565 struct i2c_client *client = v4l2_get_subdevdata(sd);
760697be 566 const struct mt9m111_datafmt *fmt;
2768cbbb 567 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
09e231b3
GL
568 struct v4l2_rect rect = {
569 .left = mt9m111->rect.left,
570 .top = mt9m111->rect.top,
760697be
GL
571 .width = mf->width,
572 .height = mf->height,
09e231b3 573 };
506c629a 574 int ret;
77110abb 575
760697be
GL
576 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
577 ARRAY_SIZE(mt9m111_colour_fmts));
578 if (!fmt)
579 return -EINVAL;
580
96c75399 581 dev_dbg(&client->dev,
760697be
GL
582 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
583 mf->code, rect.left, rect.top, rect.width, rect.height);
77110abb 584
2768cbbb 585 ret = mt9m111_make_rect(mt9m111, &rect);
09e231b3 586 if (!ret)
2768cbbb 587 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
760697be
GL
588 if (!ret) {
589 mt9m111->rect = rect;
590 mt9m111->fmt = fmt;
591 mf->colorspace = fmt->colorspace;
592 }
593
506c629a 594 return ret;
77110abb
RJ
595}
596
760697be
GL
597static int mt9m111_try_fmt(struct v4l2_subdev *sd,
598 struct v4l2_mbus_framefmt *mf)
77110abb 599{
2768cbbb 600 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
760697be
GL
601 const struct mt9m111_datafmt *fmt;
602 bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
603 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
604
605 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
606 ARRAY_SIZE(mt9m111_colour_fmts));
607 if (!fmt) {
608 fmt = mt9m111->fmt;
609 mf->code = fmt->code;
610 }
6a6c8786
GL
611
612 /*
613 * With Bayer format enforce even side lengths, but let the user play
614 * with the starting pixel
615 */
64f5905e 616
760697be
GL
617 if (mf->height > MT9M111_MAX_HEIGHT)
618 mf->height = MT9M111_MAX_HEIGHT;
619 else if (mf->height < 2)
620 mf->height = 2;
6a6c8786 621 else if (bayer)
760697be 622 mf->height = ALIGN(mf->height, 2);
6a6c8786 623
760697be
GL
624 if (mf->width > MT9M111_MAX_WIDTH)
625 mf->width = MT9M111_MAX_WIDTH;
626 else if (mf->width < 2)
627 mf->width = 2;
6a6c8786 628 else if (bayer)
760697be
GL
629 mf->width = ALIGN(mf->width, 2);
630
631 mf->colorspace = fmt->colorspace;
77110abb
RJ
632
633 return 0;
634}
635
979ea1dd
GL
636static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
637 struct v4l2_dbg_chip_ident *id)
77110abb 638{
c4ce6d14 639 struct i2c_client *client = v4l2_get_subdevdata(sd);
2768cbbb 640 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
77110abb 641
aecde8b5 642 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
77110abb
RJ
643 return -EINVAL;
644
40e2e092 645 if (id->match.addr != client->addr)
77110abb
RJ
646 return -ENODEV;
647
648 id->ident = mt9m111->model;
649 id->revision = 0;
650
651 return 0;
652}
653
654#ifdef CONFIG_VIDEO_ADV_DEBUG
979ea1dd
GL
655static int mt9m111_g_register(struct v4l2_subdev *sd,
656 struct v4l2_dbg_register *reg)
77110abb 657{
c4ce6d14 658 struct i2c_client *client = v4l2_get_subdevdata(sd);
77110abb 659 int val;
77110abb 660
aecde8b5 661 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
77110abb 662 return -EINVAL;
9538e1c2 663 if (reg->match.addr != client->addr)
77110abb
RJ
664 return -ENODEV;
665
9538e1c2 666 val = mt9m111_reg_read(client, reg->reg);
aecde8b5 667 reg->size = 2;
77110abb
RJ
668 reg->val = (u64)val;
669
670 if (reg->val > 0xffff)
671 return -EIO;
672
673 return 0;
674}
675
979ea1dd
GL
676static int mt9m111_s_register(struct v4l2_subdev *sd,
677 struct v4l2_dbg_register *reg)
77110abb 678{
c4ce6d14 679 struct i2c_client *client = v4l2_get_subdevdata(sd);
77110abb 680
aecde8b5 681 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
77110abb
RJ
682 return -EINVAL;
683
9538e1c2 684 if (reg->match.addr != client->addr)
77110abb
RJ
685 return -ENODEV;
686
9538e1c2 687 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
77110abb
RJ
688 return -EIO;
689
690 return 0;
691}
692#endif
693
694static const struct v4l2_queryctrl mt9m111_controls[] = {
695 {
696 .id = V4L2_CID_VFLIP,
697 .type = V4L2_CTRL_TYPE_BOOLEAN,
698 .name = "Flip Verticaly",
699 .minimum = 0,
700 .maximum = 1,
701 .step = 1,
702 .default_value = 0,
703 }, {
704 .id = V4L2_CID_HFLIP,
705 .type = V4L2_CTRL_TYPE_BOOLEAN,
706 .name = "Flip Horizontaly",
707 .minimum = 0,
708 .maximum = 1,
709 .step = 1,
710 .default_value = 0,
711 }, { /* gain = 1/32*val (=>gain=1 if val==32) */
712 .id = V4L2_CID_GAIN,
713 .type = V4L2_CTRL_TYPE_INTEGER,
714 .name = "Gain",
715 .minimum = 0,
716 .maximum = 63 * 2 * 2,
717 .step = 1,
718 .default_value = 32,
719 .flags = V4L2_CTRL_FLAG_SLIDER,
720 }, {
721 .id = V4L2_CID_EXPOSURE_AUTO,
722 .type = V4L2_CTRL_TYPE_BOOLEAN,
723 .name = "Auto Exposure",
724 .minimum = 0,
725 .maximum = 1,
726 .step = 1,
727 .default_value = 1,
728 }
729};
730
77110abb 731static struct soc_camera_ops mt9m111_ops = {
77110abb
RJ
732 .query_bus_param = mt9m111_query_bus_param,
733 .set_bus_param = mt9m111_set_bus_param,
734 .controls = mt9m111_controls,
735 .num_controls = ARRAY_SIZE(mt9m111_controls),
77110abb
RJ
736};
737
2768cbbb 738static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
77110abb 739{
2768cbbb 740 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
741 int ret;
742
743 if (mt9m111->context == HIGHPOWER) {
744 if (flip)
745 ret = reg_set(READ_MODE_B, mask);
746 else
747 ret = reg_clear(READ_MODE_B, mask);
748 } else {
749 if (flip)
750 ret = reg_set(READ_MODE_A, mask);
751 else
752 ret = reg_clear(READ_MODE_A, mask);
753 }
754
755 return ret;
756}
757
2768cbbb 758static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
77110abb 759{
2768cbbb 760 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
0f28b793 761 int data;
77110abb
RJ
762
763 data = reg_read(GLOBAL_GAIN);
764 if (data >= 0)
0f28b793 765 return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
766 (1 << ((data >> 9) & 1));
767 return data;
77110abb 768}
0f28b793 769
2768cbbb 770static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
77110abb 771{
2768cbbb 772 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
773 u16 val;
774
775 if (gain > 63 * 2 * 2)
776 return -EINVAL;
777
96c75399 778 mt9m111->gain = gain;
77110abb
RJ
779 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
780 val = (1 << 10) | (1 << 9) | (gain / 4);
781 else if ((gain >= 64) && (gain < 64 * 2))
506c629a 782 val = (1 << 9) | (gain / 2);
77110abb
RJ
783 else
784 val = gain;
785
786 return reg_write(GLOBAL_GAIN, val);
787}
788
2768cbbb 789static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
77110abb 790{
2768cbbb 791 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
792 int ret;
793
794 if (on)
795 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
796 else
797 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
798
506c629a 799 if (!ret)
77110abb
RJ
800 mt9m111->autoexposure = on;
801
802 return ret;
803}
39bf372f 804
2768cbbb 805static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
39bf372f 806{
2768cbbb 807 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
39bf372f
RJ
808 int ret;
809
810 if (on)
811 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
812 else
813 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
814
815 if (!ret)
816 mt9m111->autowhitebalance = on;
817
818 return ret;
819}
820
979ea1dd 821static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
77110abb 822{
c4ce6d14 823 struct i2c_client *client = v4l2_get_subdevdata(sd);
2768cbbb 824 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
77110abb
RJ
825 int data;
826
827 switch (ctrl->id) {
828 case V4L2_CID_VFLIP:
829 if (mt9m111->context == HIGHPOWER)
830 data = reg_read(READ_MODE_B);
831 else
832 data = reg_read(READ_MODE_A);
833
834 if (data < 0)
835 return -EIO;
836 ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS);
837 break;
838 case V4L2_CID_HFLIP:
839 if (mt9m111->context == HIGHPOWER)
840 data = reg_read(READ_MODE_B);
841 else
842 data = reg_read(READ_MODE_A);
843
844 if (data < 0)
845 return -EIO;
846 ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS);
847 break;
848 case V4L2_CID_GAIN:
2768cbbb 849 data = mt9m111_get_global_gain(mt9m111);
77110abb
RJ
850 if (data < 0)
851 return data;
852 ctrl->value = data;
853 break;
854 case V4L2_CID_EXPOSURE_AUTO:
855 ctrl->value = mt9m111->autoexposure;
856 break;
39bf372f
RJ
857 case V4L2_CID_AUTO_WHITE_BALANCE:
858 ctrl->value = mt9m111->autowhitebalance;
859 break;
77110abb
RJ
860 }
861 return 0;
862}
863
979ea1dd 864static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
77110abb 865{
2768cbbb 866 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
77110abb 867 const struct v4l2_queryctrl *qctrl;
506c629a 868 int ret;
77110abb
RJ
869
870 qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id);
77110abb
RJ
871 if (!qctrl)
872 return -EINVAL;
873
874 switch (ctrl->id) {
875 case V4L2_CID_VFLIP:
876 mt9m111->vflip = ctrl->value;
2768cbbb 877 ret = mt9m111_set_flip(mt9m111, ctrl->value,
77110abb
RJ
878 MT9M111_RMB_MIRROR_ROWS);
879 break;
880 case V4L2_CID_HFLIP:
881 mt9m111->hflip = ctrl->value;
2768cbbb 882 ret = mt9m111_set_flip(mt9m111, ctrl->value,
77110abb
RJ
883 MT9M111_RMB_MIRROR_COLS);
884 break;
885 case V4L2_CID_GAIN:
2768cbbb 886 ret = mt9m111_set_global_gain(mt9m111, ctrl->value);
77110abb
RJ
887 break;
888 case V4L2_CID_EXPOSURE_AUTO:
2768cbbb 889 ret = mt9m111_set_autoexposure(mt9m111, ctrl->value);
77110abb 890 break;
39bf372f 891 case V4L2_CID_AUTO_WHITE_BALANCE:
2768cbbb 892 ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value);
39bf372f 893 break;
77110abb
RJ
894 default:
895 ret = -EINVAL;
896 }
897
506c629a 898 return ret;
77110abb
RJ
899}
900
14c5ea9b 901static int mt9m111_suspend(struct mt9m111 *mt9m111)
96c75399 902{
2768cbbb 903 mt9m111->gain = mt9m111_get_global_gain(mt9m111);
96c75399
GL
904
905 return 0;
906}
907
2768cbbb 908static void mt9m111_restore_state(struct mt9m111 *mt9m111)
77110abb 909{
2768cbbb
GL
910 mt9m111_set_context(mt9m111, mt9m111->context);
911 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
912 mt9m111_setup_rect(mt9m111, &mt9m111->rect);
913 mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS);
914 mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS);
915 mt9m111_set_global_gain(mt9m111, mt9m111->gain);
916 mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
917 mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance);
77110abb
RJ
918}
919
14c5ea9b 920static int mt9m111_resume(struct mt9m111 *mt9m111)
77110abb 921{
77110abb
RJ
922 int ret = 0;
923
924 if (mt9m111->powered) {
2768cbbb 925 ret = mt9m111_enable(mt9m111);
506c629a 926 if (!ret)
2768cbbb 927 ret = mt9m111_reset(mt9m111);
506c629a 928 if (!ret)
2768cbbb 929 mt9m111_restore_state(mt9m111);
77110abb
RJ
930 }
931 return ret;
932}
933
2768cbbb 934static int mt9m111_init(struct mt9m111 *mt9m111)
77110abb 935{
2768cbbb 936 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
77110abb
RJ
937 int ret;
938
939 mt9m111->context = HIGHPOWER;
2768cbbb 940 ret = mt9m111_enable(mt9m111);
506c629a 941 if (!ret)
2768cbbb 942 ret = mt9m111_reset(mt9m111);
506c629a 943 if (!ret)
2768cbbb 944 ret = mt9m111_set_context(mt9m111, mt9m111->context);
506c629a 945 if (!ret)
2768cbbb 946 ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
506c629a 947 if (ret)
c8cf078e 948 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
506c629a 949 return ret;
77110abb
RJ
950}
951
77110abb
RJ
952/*
953 * Interface active, can use i2c. If it fails, it can indeed mean, that
954 * this wasn't our capture interface, so, we wait for the right one
955 */
40e2e092
GL
956static int mt9m111_video_probe(struct soc_camera_device *icd,
957 struct i2c_client *client)
77110abb 958{
979ea1dd 959 struct mt9m111 *mt9m111 = to_mt9m111(client);
77110abb
RJ
960 s32 data;
961 int ret;
962
7dfff953
GL
963 /* We must have a parent by now. And it cannot be a wrong one. */
964 BUG_ON(!icd->parent ||
965 to_soc_camera_host(icd->parent)->nr != icd->iface);
77110abb 966
a4c56fd8
GL
967 mt9m111->autoexposure = 1;
968 mt9m111->autowhitebalance = 1;
969
970 mt9m111->swap_rgb_even_odd = 1;
971 mt9m111->swap_rgb_red_blue = 1;
972
77110abb
RJ
973 data = reg_read(CHIP_VERSION);
974
975 switch (data) {
c8cf078e 976 case 0x143a: /* MT9M111 or MT9M131 */
77110abb 977 mt9m111->model = V4L2_IDENT_MT9M111;
c8cf078e
PW
978 dev_info(&client->dev,
979 "Detected a MT9M111/MT9M131 chip ID %x\n", data);
d7f83a51
MR
980 break;
981 case 0x148c: /* MT9M112 */
982 mt9m111->model = V4L2_IDENT_MT9M112;
c8cf078e 983 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
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984 break;
985 default:
986 ret = -ENODEV;
85f8be68 987 dev_err(&client->dev,
c8cf078e
PW
988 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
989 data);
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990 goto ei2c;
991 }
992
2768cbbb 993 ret = mt9m111_init(mt9m111);
175bad92 994
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995ei2c:
996 return ret;
997}
998
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GL
999static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
1000{
1001 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
1002 struct i2c_client *client = v4l2_get_subdevdata(sd);
1003 int ret = 0;
1004
1005 mutex_lock(&mt9m111->power_lock);
1006
1007 /*
1008 * If the power count is modified from 0 to != 0 or from != 0 to 0,
1009 * update the power state.
1010 */
1011 if (mt9m111->power_count == !on) {
1012 if (on) {
1013 ret = mt9m111_resume(mt9m111);
1014 if (ret) {
1015 dev_err(&client->dev,
1016 "Failed to resume the sensor: %d\n", ret);
1017 goto out;
1018 }
1019 } else {
1020 mt9m111_suspend(mt9m111);
1021 }
1022 }
1023
1024 /* Update the power count. */
1025 mt9m111->power_count += on ? 1 : -1;
1026 WARN_ON(mt9m111->power_count < 0);
1027
1028out:
1029 mutex_unlock(&mt9m111->power_lock);
1030 return ret;
1031}
1032
979ea1dd
GL
1033static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
1034 .g_ctrl = mt9m111_g_ctrl,
1035 .s_ctrl = mt9m111_s_ctrl,
1036 .g_chip_ident = mt9m111_g_chip_ident,
14c5ea9b 1037 .s_power = mt9m111_s_power,
979ea1dd
GL
1038#ifdef CONFIG_VIDEO_ADV_DEBUG
1039 .g_register = mt9m111_g_register,
1040 .s_register = mt9m111_s_register,
1041#endif
1042};
1043
3805f201 1044static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
760697be
GL
1045 enum v4l2_mbus_pixelcode *code)
1046{
3805f201 1047 if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
760697be
GL
1048 return -EINVAL;
1049
1050 *code = mt9m111_colour_fmts[index].code;
1051 return 0;
1052}
1053
979ea1dd 1054static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
760697be
GL
1055 .s_mbus_fmt = mt9m111_s_fmt,
1056 .g_mbus_fmt = mt9m111_g_fmt,
1057 .try_mbus_fmt = mt9m111_try_fmt,
08590b96 1058 .s_crop = mt9m111_s_crop,
6a6c8786
GL
1059 .g_crop = mt9m111_g_crop,
1060 .cropcap = mt9m111_cropcap,
760697be 1061 .enum_mbus_fmt = mt9m111_enum_fmt,
979ea1dd
GL
1062};
1063
1064static struct v4l2_subdev_ops mt9m111_subdev_ops = {
1065 .core = &mt9m111_subdev_core_ops,
1066 .video = &mt9m111_subdev_video_ops,
1067};
1068
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1069static int mt9m111_probe(struct i2c_client *client,
1070 const struct i2c_device_id *did)
1071{
1072 struct mt9m111 *mt9m111;
40e2e092 1073 struct soc_camera_device *icd = client->dev.platform_data;
77110abb 1074 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
40e2e092 1075 struct soc_camera_link *icl;
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RJ
1076 int ret;
1077
40e2e092 1078 if (!icd) {
c8cf078e 1079 dev_err(&client->dev, "mt9m111: soc-camera data missing!\n");
40e2e092
GL
1080 return -EINVAL;
1081 }
1082
1083 icl = to_soc_camera_link(icd);
77110abb 1084 if (!icl) {
c8cf078e 1085 dev_err(&client->dev, "mt9m111: driver needs platform data\n");
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RJ
1086 return -EINVAL;
1087 }
1088
1089 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1090 dev_warn(&adapter->dev,
1091 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
1092 return -EIO;
1093 }
1094
1095 mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
1096 if (!mt9m111)
1097 return -ENOMEM;
1098
979ea1dd 1099 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
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1100
1101 /* Second stage probe - when a capture adapter is there */
a0705b07 1102 icd->ops = &mt9m111_ops;
77110abb 1103
6a6c8786
GL
1104 mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
1105 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
1106 mt9m111->rect.width = MT9M111_MAX_WIDTH;
1107 mt9m111->rect.height = MT9M111_MAX_HEIGHT;
760697be 1108 mt9m111->fmt = &mt9m111_colour_fmts[0];
6a6c8786 1109
40e2e092
GL
1110 ret = mt9m111_video_probe(icd, client);
1111 if (ret) {
1112 icd->ops = NULL;
40e2e092
GL
1113 kfree(mt9m111);
1114 }
77110abb 1115
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RJ
1116 return ret;
1117}
1118
1119static int mt9m111_remove(struct i2c_client *client)
1120{
979ea1dd 1121 struct mt9m111 *mt9m111 = to_mt9m111(client);
40e2e092
GL
1122 struct soc_camera_device *icd = client->dev.platform_data;
1123
1124 icd->ops = NULL;
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RJ
1125 kfree(mt9m111);
1126
1127 return 0;
1128}
1129
1130static const struct i2c_device_id mt9m111_id[] = {
1131 { "mt9m111", 0 },
1132 { }
1133};
1134MODULE_DEVICE_TABLE(i2c, mt9m111_id);
1135
1136static struct i2c_driver mt9m111_i2c_driver = {
1137 .driver = {
1138 .name = "mt9m111",
1139 },
1140 .probe = mt9m111_probe,
1141 .remove = mt9m111_remove,
1142 .id_table = mt9m111_id,
1143};
1144
1145static int __init mt9m111_mod_init(void)
1146{
1147 return i2c_add_driver(&mt9m111_i2c_driver);
1148}
1149
1150static void __exit mt9m111_mod_exit(void)
1151{
1152 i2c_del_driver(&mt9m111_i2c_driver);
1153}
1154
1155module_init(mt9m111_mod_init);
1156module_exit(mt9m111_mod_exit);
1157
c8cf078e 1158MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
77110abb
RJ
1159MODULE_AUTHOR("Robert Jarzmik");
1160MODULE_LICENSE("GPL");