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7397bfbe GL |
1 | /* |
2 | * Driver for MT9V022 CMOS Image Sensor from Micron | |
3 | * | |
4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/videodev2.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/log2.h> | |
16 | ||
979ea1dd | 17 | #include <media/v4l2-subdev.h> |
7397bfbe GL |
18 | #include <media/v4l2-chip-ident.h> |
19 | #include <media/soc_camera.h> | |
20 | ||
5d28d525 GL |
21 | /* |
22 | * mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c | |
979ea1dd | 23 | * The platform has to define ctruct i2c_board_info objects and link to them |
5d28d525 GL |
24 | * from struct soc_camera_link |
25 | */ | |
7397bfbe GL |
26 | |
27 | static char *sensor_type; | |
28 | module_param(sensor_type, charp, S_IRUGO); | |
61a2d07d | 29 | MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\""); |
7397bfbe GL |
30 | |
31 | /* mt9v022 selected register addresses */ | |
32 | #define MT9V022_CHIP_VERSION 0x00 | |
33 | #define MT9V022_COLUMN_START 0x01 | |
34 | #define MT9V022_ROW_START 0x02 | |
35 | #define MT9V022_WINDOW_HEIGHT 0x03 | |
36 | #define MT9V022_WINDOW_WIDTH 0x04 | |
37 | #define MT9V022_HORIZONTAL_BLANKING 0x05 | |
38 | #define MT9V022_VERTICAL_BLANKING 0x06 | |
39 | #define MT9V022_CHIP_CONTROL 0x07 | |
40 | #define MT9V022_SHUTTER_WIDTH1 0x08 | |
41 | #define MT9V022_SHUTTER_WIDTH2 0x09 | |
42 | #define MT9V022_SHUTTER_WIDTH_CTRL 0x0a | |
43 | #define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b | |
44 | #define MT9V022_RESET 0x0c | |
45 | #define MT9V022_READ_MODE 0x0d | |
46 | #define MT9V022_MONITOR_MODE 0x0e | |
47 | #define MT9V022_PIXEL_OPERATION_MODE 0x0f | |
48 | #define MT9V022_LED_OUT_CONTROL 0x1b | |
49 | #define MT9V022_ADC_MODE_CONTROL 0x1c | |
96c75399 | 50 | #define MT9V022_ANALOG_GAIN 0x35 |
7397bfbe GL |
51 | #define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47 |
52 | #define MT9V022_PIXCLK_FV_LV 0x74 | |
53 | #define MT9V022_DIGITAL_TEST_PATTERN 0x7f | |
54 | #define MT9V022_AEC_AGC_ENABLE 0xAF | |
55 | #define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD | |
56 | ||
57 | /* Progressive scan, master, defaults */ | |
58 | #define MT9V022_CHIP_CONTROL_DEFAULT 0x188 | |
59 | ||
6a6c8786 GL |
60 | #define MT9V022_MAX_WIDTH 752 |
61 | #define MT9V022_MAX_HEIGHT 480 | |
62 | #define MT9V022_MIN_WIDTH 48 | |
63 | #define MT9V022_MIN_HEIGHT 32 | |
64 | #define MT9V022_COLUMN_SKIP 1 | |
65 | #define MT9V022_ROW_SKIP 4 | |
66 | ||
760697be GL |
67 | /* MT9V022 has only one fixed colorspace per pixelcode */ |
68 | struct mt9v022_datafmt { | |
69 | enum v4l2_mbus_pixelcode code; | |
70 | enum v4l2_colorspace colorspace; | |
71 | }; | |
72 | ||
73 | /* Find a data format by a pixel code in an array */ | |
74 | static const struct mt9v022_datafmt *mt9v022_find_datafmt( | |
75 | enum v4l2_mbus_pixelcode code, const struct mt9v022_datafmt *fmt, | |
76 | int n) | |
77 | { | |
78 | int i; | |
79 | for (i = 0; i < n; i++) | |
80 | if (fmt[i].code == code) | |
81 | return fmt + i; | |
82 | ||
83 | return NULL; | |
84 | } | |
85 | ||
86 | static const struct mt9v022_datafmt mt9v022_colour_fmts[] = { | |
5d28d525 GL |
87 | /* |
88 | * Order important: first natively supported, | |
89 | * second supported with a GPIO extender | |
90 | */ | |
760697be GL |
91 | {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB}, |
92 | {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, | |
bb55de3b GL |
93 | }; |
94 | ||
760697be | 95 | static const struct mt9v022_datafmt mt9v022_monochrome_fmts[] = { |
bb55de3b | 96 | /* Order important - see above */ |
760697be GL |
97 | {V4L2_MBUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG}, |
98 | {V4L2_MBUS_FMT_GREY8_1X8, V4L2_COLORSPACE_JPEG}, | |
7397bfbe GL |
99 | }; |
100 | ||
101 | struct mt9v022 { | |
979ea1dd | 102 | struct v4l2_subdev subdev; |
6a6c8786 | 103 | struct v4l2_rect rect; /* Sensor window */ |
760697be GL |
104 | const struct mt9v022_datafmt *fmt; |
105 | const struct mt9v022_datafmt *fmts; | |
106 | int num_fmts; | |
7fb0fd05 | 107 | int model; /* V4L2_IDENT_MT9V022* codes from v4l2-chip-ident.h */ |
7397bfbe | 108 | u16 chip_control; |
32536108 | 109 | unsigned short y_skip_top; /* Lines to skip at the top */ |
7397bfbe GL |
110 | }; |
111 | ||
979ea1dd GL |
112 | static struct mt9v022 *to_mt9v022(const struct i2c_client *client) |
113 | { | |
114 | return container_of(i2c_get_clientdata(client), struct mt9v022, subdev); | |
115 | } | |
116 | ||
9538e1c2 | 117 | static int reg_read(struct i2c_client *client, const u8 reg) |
7397bfbe | 118 | { |
7397bfbe GL |
119 | s32 data = i2c_smbus_read_word_data(client, reg); |
120 | return data < 0 ? data : swab16(data); | |
121 | } | |
122 | ||
9538e1c2 | 123 | static int reg_write(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
124 | const u16 data) |
125 | { | |
9538e1c2 | 126 | return i2c_smbus_write_word_data(client, reg, swab16(data)); |
7397bfbe GL |
127 | } |
128 | ||
9538e1c2 | 129 | static int reg_set(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
130 | const u16 data) |
131 | { | |
132 | int ret; | |
133 | ||
9538e1c2 | 134 | ret = reg_read(client, reg); |
7397bfbe GL |
135 | if (ret < 0) |
136 | return ret; | |
9538e1c2 | 137 | return reg_write(client, reg, ret | data); |
7397bfbe GL |
138 | } |
139 | ||
9538e1c2 | 140 | static int reg_clear(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
141 | const u16 data) |
142 | { | |
143 | int ret; | |
144 | ||
9538e1c2 | 145 | ret = reg_read(client, reg); |
7397bfbe GL |
146 | if (ret < 0) |
147 | return ret; | |
9538e1c2 | 148 | return reg_write(client, reg, ret & ~data); |
7397bfbe GL |
149 | } |
150 | ||
a4c56fd8 | 151 | static int mt9v022_init(struct i2c_client *client) |
7397bfbe | 152 | { |
979ea1dd | 153 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
7397bfbe GL |
154 | int ret; |
155 | ||
5d28d525 GL |
156 | /* |
157 | * Almost the default mode: master, parallel, simultaneous, and an | |
7397bfbe | 158 | * undocumented bit 0x200, which is present in table 7, but not in 8, |
5d28d525 GL |
159 | * plus snapshot mode to disable scan for now |
160 | */ | |
7397bfbe | 161 | mt9v022->chip_control |= 0x10; |
9538e1c2 | 162 | ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); |
11211641 | 163 | if (!ret) |
9538e1c2 | 164 | ret = reg_write(client, MT9V022_READ_MODE, 0x300); |
7397bfbe GL |
165 | |
166 | /* All defaults */ | |
11211641 | 167 | if (!ret) |
7397bfbe | 168 | /* AEC, AGC on */ |
9538e1c2 | 169 | ret = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x3); |
96c75399 GL |
170 | if (!ret) |
171 | ret = reg_write(client, MT9V022_ANALOG_GAIN, 16); | |
172 | if (!ret) | |
173 | ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480); | |
11211641 | 174 | if (!ret) |
9538e1c2 | 175 | ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, 480); |
11211641 | 176 | if (!ret) |
7397bfbe | 177 | /* default - auto */ |
9538e1c2 | 178 | ret = reg_clear(client, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1); |
11211641 | 179 | if (!ret) |
9538e1c2 | 180 | ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0); |
7397bfbe | 181 | |
11211641 | 182 | return ret; |
7397bfbe GL |
183 | } |
184 | ||
979ea1dd | 185 | static int mt9v022_s_stream(struct v4l2_subdev *sd, int enable) |
7397bfbe | 186 | { |
979ea1dd GL |
187 | struct i2c_client *client = sd->priv; |
188 | struct mt9v022 *mt9v022 = to_mt9v022(client); | |
81034663 | 189 | |
979ea1dd GL |
190 | if (enable) |
191 | /* Switch to master "normal" mode */ | |
192 | mt9v022->chip_control &= ~0x10; | |
193 | else | |
194 | /* Switch to snapshot mode */ | |
195 | mt9v022->chip_control |= 0x10; | |
7397bfbe | 196 | |
979ea1dd | 197 | if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0) |
7397bfbe GL |
198 | return -EIO; |
199 | return 0; | |
200 | } | |
201 | ||
ad5f2e85 GL |
202 | static int mt9v022_set_bus_param(struct soc_camera_device *icd, |
203 | unsigned long flags) | |
7397bfbe | 204 | { |
40e2e092 | 205 | struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); |
979ea1dd | 206 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
40e2e092 | 207 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
ad5f2e85 | 208 | unsigned int width_flag = flags & SOCAM_DATAWIDTH_MASK; |
7397bfbe | 209 | int ret; |
ad5f2e85 | 210 | u16 pixclk = 0; |
7397bfbe GL |
211 | |
212 | /* Only one width bit may be set */ | |
213 | if (!is_power_of_2(width_flag)) | |
214 | return -EINVAL; | |
215 | ||
e958e27a SH |
216 | if (icl->set_bus_param) { |
217 | ret = icl->set_bus_param(icl, width_flag); | |
218 | if (ret) | |
ad5f2e85 | 219 | return ret; |
e958e27a SH |
220 | } else { |
221 | /* | |
222 | * Without board specific bus width settings we only support the | |
223 | * sensors native bus width | |
224 | */ | |
225 | if (width_flag != SOCAM_DATAWIDTH_10) | |
226 | return -EINVAL; | |
ad5f2e85 GL |
227 | } |
228 | ||
bd73b36f GL |
229 | flags = soc_camera_apply_sensor_flags(icl, flags); |
230 | ||
ad5f2e85 GL |
231 | if (flags & SOCAM_PCLK_SAMPLE_RISING) |
232 | pixclk |= 0x10; | |
233 | ||
234 | if (!(flags & SOCAM_HSYNC_ACTIVE_HIGH)) | |
235 | pixclk |= 0x1; | |
236 | ||
237 | if (!(flags & SOCAM_VSYNC_ACTIVE_HIGH)) | |
238 | pixclk |= 0x2; | |
239 | ||
9538e1c2 | 240 | ret = reg_write(client, MT9V022_PIXCLK_FV_LV, pixclk); |
ad5f2e85 GL |
241 | if (ret < 0) |
242 | return ret; | |
243 | ||
244 | if (!(flags & SOCAM_MASTER)) | |
245 | mt9v022->chip_control &= ~0x8; | |
246 | ||
9538e1c2 | 247 | ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); |
ad5f2e85 GL |
248 | if (ret < 0) |
249 | return ret; | |
250 | ||
85f8be68 | 251 | dev_dbg(&client->dev, "Calculated pixclk 0x%x, chip control 0x%x\n", |
ad5f2e85 GL |
252 | pixclk, mt9v022->chip_control); |
253 | ||
254 | return 0; | |
255 | } | |
256 | ||
257 | static unsigned long mt9v022_query_bus_param(struct soc_camera_device *icd) | |
258 | { | |
40e2e092 | 259 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
4a9ce755 GL |
260 | unsigned int flags = SOCAM_MASTER | SOCAM_SLAVE | |
261 | SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | | |
262 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW | | |
263 | SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | | |
264 | SOCAM_DATA_ACTIVE_HIGH; | |
ad5f2e85 | 265 | |
e958e27a | 266 | if (icl->query_bus_param) |
4a9ce755 | 267 | flags |= icl->query_bus_param(icl) & SOCAM_DATAWIDTH_MASK; |
e958e27a | 268 | else |
4a9ce755 | 269 | flags |= SOCAM_DATAWIDTH_10; |
ad5f2e85 | 270 | |
4a9ce755 | 271 | return soc_camera_apply_sensor_flags(icl, flags); |
ad5f2e85 GL |
272 | } |
273 | ||
08590b96 | 274 | static int mt9v022_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) |
ad5f2e85 | 275 | { |
08590b96 | 276 | struct i2c_client *client = sd->priv; |
6a6c8786 GL |
277 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
278 | struct v4l2_rect rect = a->c; | |
ad5f2e85 GL |
279 | int ret; |
280 | ||
6a6c8786 | 281 | /* Bayer format - even size lengths */ |
760697be | 282 | if (mt9v022->fmts == mt9v022_colour_fmts) { |
6a6c8786 GL |
283 | rect.width = ALIGN(rect.width, 2); |
284 | rect.height = ALIGN(rect.height, 2); | |
285 | /* Let the user play with the starting pixel */ | |
286 | } | |
287 | ||
288 | soc_camera_limit_side(&rect.left, &rect.width, | |
289 | MT9V022_COLUMN_SKIP, MT9V022_MIN_WIDTH, MT9V022_MAX_WIDTH); | |
290 | ||
291 | soc_camera_limit_side(&rect.top, &rect.height, | |
292 | MT9V022_ROW_SKIP, MT9V022_MIN_HEIGHT, MT9V022_MAX_HEIGHT); | |
293 | ||
7397bfbe | 294 | /* Like in example app. Contradicts the datasheet though */ |
9538e1c2 | 295 | ret = reg_read(client, MT9V022_AEC_AGC_ENABLE); |
7397bfbe GL |
296 | if (ret >= 0) { |
297 | if (ret & 1) /* Autoexposure */ | |
9538e1c2 | 298 | ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, |
32536108 | 299 | rect.height + mt9v022->y_skip_top + 43); |
7397bfbe | 300 | else |
9538e1c2 | 301 | ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, |
32536108 | 302 | rect.height + mt9v022->y_skip_top + 43); |
7397bfbe GL |
303 | } |
304 | /* Setup frame format: defaults apart from width and height */ | |
11211641 | 305 | if (!ret) |
6a6c8786 | 306 | ret = reg_write(client, MT9V022_COLUMN_START, rect.left); |
11211641 | 307 | if (!ret) |
6a6c8786 | 308 | ret = reg_write(client, MT9V022_ROW_START, rect.top); |
11211641 | 309 | if (!ret) |
5d28d525 GL |
310 | /* |
311 | * Default 94, Phytec driver says: | |
312 | * "width + horizontal blank >= 660" | |
313 | */ | |
9538e1c2 | 314 | ret = reg_write(client, MT9V022_HORIZONTAL_BLANKING, |
6a6c8786 GL |
315 | rect.width > 660 - 43 ? 43 : |
316 | 660 - rect.width); | |
11211641 | 317 | if (!ret) |
9538e1c2 | 318 | ret = reg_write(client, MT9V022_VERTICAL_BLANKING, 45); |
11211641 | 319 | if (!ret) |
6a6c8786 | 320 | ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width); |
11211641 | 321 | if (!ret) |
9538e1c2 | 322 | ret = reg_write(client, MT9V022_WINDOW_HEIGHT, |
32536108 | 323 | rect.height + mt9v022->y_skip_top); |
7397bfbe GL |
324 | |
325 | if (ret < 0) | |
326 | return ret; | |
327 | ||
e26b3144 | 328 | dev_dbg(&client->dev, "Frame %dx%d pixel\n", rect.width, rect.height); |
6a6c8786 GL |
329 | |
330 | mt9v022->rect = rect; | |
331 | ||
332 | return 0; | |
333 | } | |
334 | ||
335 | static int mt9v022_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
336 | { | |
337 | struct i2c_client *client = sd->priv; | |
338 | struct mt9v022 *mt9v022 = to_mt9v022(client); | |
339 | ||
340 | a->c = mt9v022->rect; | |
341 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | static int mt9v022_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
347 | { | |
348 | a->bounds.left = MT9V022_COLUMN_SKIP; | |
349 | a->bounds.top = MT9V022_ROW_SKIP; | |
350 | a->bounds.width = MT9V022_MAX_WIDTH; | |
351 | a->bounds.height = MT9V022_MAX_HEIGHT; | |
352 | a->defrect = a->bounds; | |
353 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
354 | a->pixelaspect.numerator = 1; | |
355 | a->pixelaspect.denominator = 1; | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
760697be GL |
360 | static int mt9v022_g_fmt(struct v4l2_subdev *sd, |
361 | struct v4l2_mbus_framefmt *mf) | |
6a6c8786 GL |
362 | { |
363 | struct i2c_client *client = sd->priv; | |
364 | struct mt9v022 *mt9v022 = to_mt9v022(client); | |
6a6c8786 | 365 | |
760697be GL |
366 | mf->width = mt9v022->rect.width; |
367 | mf->height = mt9v022->rect.height; | |
368 | mf->code = mt9v022->fmt->code; | |
369 | mf->colorspace = mt9v022->fmt->colorspace; | |
370 | mf->field = V4L2_FIELD_NONE; | |
7397bfbe | 371 | |
7397bfbe GL |
372 | return 0; |
373 | } | |
374 | ||
760697be GL |
375 | static int mt9v022_s_fmt(struct v4l2_subdev *sd, |
376 | struct v4l2_mbus_framefmt *mf) | |
09e231b3 | 377 | { |
979ea1dd GL |
378 | struct i2c_client *client = sd->priv; |
379 | struct mt9v022 *mt9v022 = to_mt9v022(client); | |
08590b96 GL |
380 | struct v4l2_crop a = { |
381 | .c = { | |
6a6c8786 GL |
382 | .left = mt9v022->rect.left, |
383 | .top = mt9v022->rect.top, | |
760697be GL |
384 | .width = mf->width, |
385 | .height = mf->height, | |
08590b96 | 386 | }, |
09e231b3 | 387 | }; |
6a6c8786 | 388 | int ret; |
09e231b3 | 389 | |
5d28d525 GL |
390 | /* |
391 | * The caller provides a supported format, as verified per call to | |
392 | * icd->try_fmt(), datawidth is from our supported format list | |
393 | */ | |
760697be GL |
394 | switch (mf->code) { |
395 | case V4L2_MBUS_FMT_GREY8_1X8: | |
396 | case V4L2_MBUS_FMT_Y10_1X10: | |
09e231b3 GL |
397 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATM) |
398 | return -EINVAL; | |
399 | break; | |
760697be GL |
400 | case V4L2_MBUS_FMT_SBGGR8_1X8: |
401 | case V4L2_MBUS_FMT_SBGGR10_1X10: | |
09e231b3 GL |
402 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC) |
403 | return -EINVAL; | |
404 | break; | |
405 | case 0: | |
406 | /* No format change, only geometry */ | |
407 | break; | |
408 | default: | |
409 | return -EINVAL; | |
410 | } | |
411 | ||
412 | /* No support for scaling on this camera, just crop. */ | |
6a6c8786 GL |
413 | ret = mt9v022_s_crop(sd, &a); |
414 | if (!ret) { | |
760697be GL |
415 | mf->width = mt9v022->rect.width; |
416 | mf->height = mt9v022->rect.height; | |
417 | mt9v022->fmt = mt9v022_find_datafmt(mf->code, | |
418 | mt9v022->fmts, mt9v022->num_fmts); | |
419 | mf->colorspace = mt9v022->fmt->colorspace; | |
6a6c8786 GL |
420 | } |
421 | ||
422 | return ret; | |
09e231b3 GL |
423 | } |
424 | ||
760697be GL |
425 | static int mt9v022_try_fmt(struct v4l2_subdev *sd, |
426 | struct v4l2_mbus_framefmt *mf) | |
7397bfbe | 427 | { |
979ea1dd | 428 | struct i2c_client *client = sd->priv; |
32536108 | 429 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
760697be GL |
430 | const struct mt9v022_datafmt *fmt; |
431 | int align = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | |
432 | mf->code == V4L2_MBUS_FMT_SBGGR10_1X10; | |
64f5905e | 433 | |
760697be | 434 | v4l_bound_align_image(&mf->width, MT9V022_MIN_WIDTH, |
6a6c8786 | 435 | MT9V022_MAX_WIDTH, align, |
760697be | 436 | &mf->height, MT9V022_MIN_HEIGHT + mt9v022->y_skip_top, |
32536108 | 437 | MT9V022_MAX_HEIGHT + mt9v022->y_skip_top, align, 0); |
7397bfbe | 438 | |
760697be GL |
439 | fmt = mt9v022_find_datafmt(mf->code, mt9v022->fmts, |
440 | mt9v022->num_fmts); | |
441 | if (!fmt) { | |
442 | fmt = mt9v022->fmt; | |
443 | mf->code = fmt->code; | |
444 | } | |
445 | ||
446 | mf->colorspace = fmt->colorspace; | |
447 | ||
7397bfbe GL |
448 | return 0; |
449 | } | |
450 | ||
979ea1dd GL |
451 | static int mt9v022_g_chip_ident(struct v4l2_subdev *sd, |
452 | struct v4l2_dbg_chip_ident *id) | |
7397bfbe | 453 | { |
979ea1dd GL |
454 | struct i2c_client *client = sd->priv; |
455 | struct mt9v022 *mt9v022 = to_mt9v022(client); | |
7397bfbe | 456 | |
aecde8b5 | 457 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) |
7397bfbe GL |
458 | return -EINVAL; |
459 | ||
40e2e092 | 460 | if (id->match.addr != client->addr) |
7397bfbe GL |
461 | return -ENODEV; |
462 | ||
463 | id->ident = mt9v022->model; | |
464 | id->revision = 0; | |
465 | ||
466 | return 0; | |
467 | } | |
468 | ||
469 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
979ea1dd GL |
470 | static int mt9v022_g_register(struct v4l2_subdev *sd, |
471 | struct v4l2_dbg_register *reg) | |
7397bfbe | 472 | { |
979ea1dd | 473 | struct i2c_client *client = sd->priv; |
7397bfbe | 474 | |
aecde8b5 | 475 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
476 | return -EINVAL; |
477 | ||
9538e1c2 | 478 | if (reg->match.addr != client->addr) |
7397bfbe GL |
479 | return -ENODEV; |
480 | ||
aecde8b5 | 481 | reg->size = 2; |
9538e1c2 | 482 | reg->val = reg_read(client, reg->reg); |
7397bfbe GL |
483 | |
484 | if (reg->val > 0xffff) | |
485 | return -EIO; | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
979ea1dd GL |
490 | static int mt9v022_s_register(struct v4l2_subdev *sd, |
491 | struct v4l2_dbg_register *reg) | |
7397bfbe | 492 | { |
979ea1dd | 493 | struct i2c_client *client = sd->priv; |
7397bfbe | 494 | |
aecde8b5 | 495 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
496 | return -EINVAL; |
497 | ||
9538e1c2 | 498 | if (reg->match.addr != client->addr) |
7397bfbe GL |
499 | return -ENODEV; |
500 | ||
9538e1c2 | 501 | if (reg_write(client, reg->reg, reg->val) < 0) |
7397bfbe GL |
502 | return -EIO; |
503 | ||
504 | return 0; | |
505 | } | |
506 | #endif | |
507 | ||
4407a463 | 508 | static const struct v4l2_queryctrl mt9v022_controls[] = { |
7397bfbe GL |
509 | { |
510 | .id = V4L2_CID_VFLIP, | |
511 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
512 | .name = "Flip Vertically", | |
513 | .minimum = 0, | |
514 | .maximum = 1, | |
515 | .step = 1, | |
516 | .default_value = 0, | |
517 | }, { | |
518 | .id = V4L2_CID_HFLIP, | |
519 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
520 | .name = "Flip Horizontally", | |
521 | .minimum = 0, | |
522 | .maximum = 1, | |
523 | .step = 1, | |
524 | .default_value = 0, | |
525 | }, { | |
526 | .id = V4L2_CID_GAIN, | |
527 | .type = V4L2_CTRL_TYPE_INTEGER, | |
528 | .name = "Analog Gain", | |
529 | .minimum = 64, | |
530 | .maximum = 127, | |
531 | .step = 1, | |
532 | .default_value = 64, | |
533 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
534 | }, { | |
535 | .id = V4L2_CID_EXPOSURE, | |
536 | .type = V4L2_CTRL_TYPE_INTEGER, | |
537 | .name = "Exposure", | |
538 | .minimum = 1, | |
539 | .maximum = 255, | |
540 | .step = 1, | |
541 | .default_value = 255, | |
542 | .flags = V4L2_CTRL_FLAG_SLIDER, | |
543 | }, { | |
544 | .id = V4L2_CID_AUTOGAIN, | |
545 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
546 | .name = "Automatic Gain", | |
547 | .minimum = 0, | |
548 | .maximum = 1, | |
549 | .step = 1, | |
550 | .default_value = 1, | |
551 | }, { | |
552 | .id = V4L2_CID_EXPOSURE_AUTO, | |
553 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
554 | .name = "Automatic Exposure", | |
555 | .minimum = 0, | |
556 | .maximum = 1, | |
557 | .step = 1, | |
558 | .default_value = 1, | |
559 | } | |
560 | }; | |
561 | ||
7397bfbe | 562 | static struct soc_camera_ops mt9v022_ops = { |
ad5f2e85 GL |
563 | .set_bus_param = mt9v022_set_bus_param, |
564 | .query_bus_param = mt9v022_query_bus_param, | |
7397bfbe GL |
565 | .controls = mt9v022_controls, |
566 | .num_controls = ARRAY_SIZE(mt9v022_controls), | |
7397bfbe GL |
567 | }; |
568 | ||
979ea1dd | 569 | static int mt9v022_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
7397bfbe | 570 | { |
979ea1dd | 571 | struct i2c_client *client = sd->priv; |
96c75399 GL |
572 | const struct v4l2_queryctrl *qctrl; |
573 | unsigned long range; | |
7397bfbe GL |
574 | int data; |
575 | ||
96c75399 GL |
576 | qctrl = soc_camera_find_qctrl(&mt9v022_ops, ctrl->id); |
577 | ||
7397bfbe GL |
578 | switch (ctrl->id) { |
579 | case V4L2_CID_VFLIP: | |
9538e1c2 | 580 | data = reg_read(client, MT9V022_READ_MODE); |
7397bfbe GL |
581 | if (data < 0) |
582 | return -EIO; | |
583 | ctrl->value = !!(data & 0x10); | |
584 | break; | |
585 | case V4L2_CID_HFLIP: | |
9538e1c2 | 586 | data = reg_read(client, MT9V022_READ_MODE); |
7397bfbe GL |
587 | if (data < 0) |
588 | return -EIO; | |
589 | ctrl->value = !!(data & 0x20); | |
590 | break; | |
591 | case V4L2_CID_EXPOSURE_AUTO: | |
9538e1c2 | 592 | data = reg_read(client, MT9V022_AEC_AGC_ENABLE); |
7397bfbe GL |
593 | if (data < 0) |
594 | return -EIO; | |
595 | ctrl->value = !!(data & 0x1); | |
596 | break; | |
597 | case V4L2_CID_AUTOGAIN: | |
9538e1c2 | 598 | data = reg_read(client, MT9V022_AEC_AGC_ENABLE); |
7397bfbe GL |
599 | if (data < 0) |
600 | return -EIO; | |
601 | ctrl->value = !!(data & 0x2); | |
96c75399 GL |
602 | break; |
603 | case V4L2_CID_GAIN: | |
604 | data = reg_read(client, MT9V022_ANALOG_GAIN); | |
605 | if (data < 0) | |
606 | return -EIO; | |
607 | ||
608 | range = qctrl->maximum - qctrl->minimum; | |
609 | ctrl->value = ((data - 16) * range + 24) / 48 + qctrl->minimum; | |
610 | ||
611 | break; | |
612 | case V4L2_CID_EXPOSURE: | |
613 | data = reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH); | |
614 | if (data < 0) | |
615 | return -EIO; | |
616 | ||
617 | range = qctrl->maximum - qctrl->minimum; | |
618 | ctrl->value = ((data - 1) * range + 239) / 479 + qctrl->minimum; | |
619 | ||
7397bfbe GL |
620 | break; |
621 | } | |
622 | return 0; | |
623 | } | |
624 | ||
979ea1dd | 625 | static int mt9v022_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
7397bfbe GL |
626 | { |
627 | int data; | |
979ea1dd | 628 | struct i2c_client *client = sd->priv; |
7397bfbe GL |
629 | const struct v4l2_queryctrl *qctrl; |
630 | ||
631 | qctrl = soc_camera_find_qctrl(&mt9v022_ops, ctrl->id); | |
7397bfbe GL |
632 | if (!qctrl) |
633 | return -EINVAL; | |
634 | ||
635 | switch (ctrl->id) { | |
636 | case V4L2_CID_VFLIP: | |
637 | if (ctrl->value) | |
9538e1c2 | 638 | data = reg_set(client, MT9V022_READ_MODE, 0x10); |
7397bfbe | 639 | else |
9538e1c2 | 640 | data = reg_clear(client, MT9V022_READ_MODE, 0x10); |
7397bfbe GL |
641 | if (data < 0) |
642 | return -EIO; | |
643 | break; | |
644 | case V4L2_CID_HFLIP: | |
645 | if (ctrl->value) | |
9538e1c2 | 646 | data = reg_set(client, MT9V022_READ_MODE, 0x20); |
7397bfbe | 647 | else |
9538e1c2 | 648 | data = reg_clear(client, MT9V022_READ_MODE, 0x20); |
7397bfbe GL |
649 | if (data < 0) |
650 | return -EIO; | |
651 | break; | |
652 | case V4L2_CID_GAIN: | |
653 | /* mt9v022 has minimum == default */ | |
654 | if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum) | |
655 | return -EINVAL; | |
656 | else { | |
657 | unsigned long range = qctrl->maximum - qctrl->minimum; | |
96c75399 | 658 | /* Valid values 16 to 64, 32 to 64 must be even. */ |
7397bfbe | 659 | unsigned long gain = ((ctrl->value - qctrl->minimum) * |
96c75399 | 660 | 48 + range / 2) / range + 16; |
7397bfbe GL |
661 | if (gain >= 32) |
662 | gain &= ~1; | |
5d28d525 GL |
663 | /* |
664 | * The user wants to set gain manually, hope, she | |
665 | * knows, what she's doing... Switch AGC off. | |
666 | */ | |
7397bfbe | 667 | |
9538e1c2 | 668 | if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) |
7397bfbe GL |
669 | return -EIO; |
670 | ||
96c75399 GL |
671 | dev_dbg(&client->dev, "Setting gain from %d to %lu\n", |
672 | reg_read(client, MT9V022_ANALOG_GAIN), gain); | |
9538e1c2 | 673 | if (reg_write(client, MT9V022_ANALOG_GAIN, gain) < 0) |
7397bfbe | 674 | return -EIO; |
7397bfbe GL |
675 | } |
676 | break; | |
677 | case V4L2_CID_EXPOSURE: | |
678 | /* mt9v022 has maximum == default */ | |
679 | if (ctrl->value > qctrl->maximum || ctrl->value < qctrl->minimum) | |
680 | return -EINVAL; | |
681 | else { | |
682 | unsigned long range = qctrl->maximum - qctrl->minimum; | |
683 | unsigned long shutter = ((ctrl->value - qctrl->minimum) * | |
684 | 479 + range / 2) / range + 1; | |
5d28d525 GL |
685 | /* |
686 | * The user wants to set shutter width manually, hope, | |
687 | * she knows, what she's doing... Switch AEC off. | |
688 | */ | |
7397bfbe | 689 | |
9538e1c2 | 690 | if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1) < 0) |
7397bfbe GL |
691 | return -EIO; |
692 | ||
85f8be68 | 693 | dev_dbg(&client->dev, "Shutter width from %d to %lu\n", |
9538e1c2 | 694 | reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH), |
7397bfbe | 695 | shutter); |
9538e1c2 | 696 | if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, |
7397bfbe GL |
697 | shutter) < 0) |
698 | return -EIO; | |
7397bfbe GL |
699 | } |
700 | break; | |
701 | case V4L2_CID_AUTOGAIN: | |
702 | if (ctrl->value) | |
9538e1c2 | 703 | data = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x2); |
7397bfbe | 704 | else |
9538e1c2 | 705 | data = reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2); |
7397bfbe GL |
706 | if (data < 0) |
707 | return -EIO; | |
708 | break; | |
709 | case V4L2_CID_EXPOSURE_AUTO: | |
710 | if (ctrl->value) | |
9538e1c2 | 711 | data = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x1); |
7397bfbe | 712 | else |
9538e1c2 | 713 | data = reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1); |
7397bfbe GL |
714 | if (data < 0) |
715 | return -EIO; | |
716 | break; | |
717 | } | |
718 | return 0; | |
719 | } | |
720 | ||
5d28d525 GL |
721 | /* |
722 | * Interface active, can use i2c. If it fails, it can indeed mean, that | |
723 | * this wasn't our capture interface, so, we wait for the right one | |
724 | */ | |
40e2e092 GL |
725 | static int mt9v022_video_probe(struct soc_camera_device *icd, |
726 | struct i2c_client *client) | |
7397bfbe | 727 | { |
979ea1dd | 728 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
40e2e092 | 729 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
7397bfbe GL |
730 | s32 data; |
731 | int ret; | |
e958e27a | 732 | unsigned long flags; |
7397bfbe GL |
733 | |
734 | if (!icd->dev.parent || | |
735 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | |
736 | return -ENODEV; | |
737 | ||
738 | /* Read out the chip version register */ | |
9538e1c2 | 739 | data = reg_read(client, MT9V022_CHIP_VERSION); |
7397bfbe GL |
740 | |
741 | /* must be 0x1311 or 0x1313 */ | |
742 | if (data != 0x1311 && data != 0x1313) { | |
743 | ret = -ENODEV; | |
85f8be68 | 744 | dev_info(&client->dev, "No MT9V022 found, ID register 0x%x\n", |
7397bfbe GL |
745 | data); |
746 | goto ei2c; | |
747 | } | |
748 | ||
749 | /* Soft reset */ | |
9538e1c2 | 750 | ret = reg_write(client, MT9V022_RESET, 1); |
7397bfbe GL |
751 | if (ret < 0) |
752 | goto ei2c; | |
753 | /* 15 clock cycles */ | |
754 | udelay(200); | |
9538e1c2 | 755 | if (reg_read(client, MT9V022_RESET)) { |
85f8be68 | 756 | dev_err(&client->dev, "Resetting MT9V022 failed!\n"); |
40e2e092 GL |
757 | if (ret > 0) |
758 | ret = -EIO; | |
7397bfbe GL |
759 | goto ei2c; |
760 | } | |
761 | ||
762 | /* Set monochrome or colour sensor type */ | |
763 | if (sensor_type && (!strcmp("colour", sensor_type) || | |
764 | !strcmp("color", sensor_type))) { | |
9538e1c2 | 765 | ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11); |
7397bfbe | 766 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATC; |
760697be | 767 | mt9v022->fmts = mt9v022_colour_fmts; |
7397bfbe | 768 | } else { |
9538e1c2 | 769 | ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11); |
7397bfbe | 770 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATM; |
760697be | 771 | mt9v022->fmts = mt9v022_monochrome_fmts; |
7397bfbe GL |
772 | } |
773 | ||
e958e27a | 774 | if (ret < 0) |
40e2e092 | 775 | goto ei2c; |
e958e27a | 776 | |
760697be | 777 | mt9v022->num_fmts = 0; |
e958e27a SH |
778 | |
779 | /* | |
780 | * This is a 10bit sensor, so by default we only allow 10bit. | |
781 | * The platform may support different bus widths due to | |
782 | * different routing of the data lines. | |
783 | */ | |
784 | if (icl->query_bus_param) | |
785 | flags = icl->query_bus_param(icl); | |
786 | else | |
787 | flags = SOCAM_DATAWIDTH_10; | |
788 | ||
789 | if (flags & SOCAM_DATAWIDTH_10) | |
760697be | 790 | mt9v022->num_fmts++; |
e958e27a | 791 | else |
760697be | 792 | mt9v022->fmts++; |
e958e27a SH |
793 | |
794 | if (flags & SOCAM_DATAWIDTH_8) | |
760697be | 795 | mt9v022->num_fmts++; |
e958e27a | 796 | |
760697be | 797 | mt9v022->fmt = &mt9v022->fmts[0]; |
6a6c8786 | 798 | |
85f8be68 | 799 | dev_info(&client->dev, "Detected a MT9V022 chip ID %x, %s sensor\n", |
7397bfbe GL |
800 | data, mt9v022->model == V4L2_IDENT_MT9V022IX7ATM ? |
801 | "monochrome" : "colour"); | |
802 | ||
a4c56fd8 GL |
803 | ret = mt9v022_init(client); |
804 | if (ret < 0) | |
805 | dev_err(&client->dev, "Failed to initialise the camera\n"); | |
806 | ||
7397bfbe GL |
807 | ei2c: |
808 | return ret; | |
809 | } | |
810 | ||
811 | static void mt9v022_video_remove(struct soc_camera_device *icd) | |
812 | { | |
40e2e092 | 813 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
7397bfbe | 814 | |
6a6c8786 | 815 | dev_dbg(&icd->dev, "Video removed: %p, %p\n", |
a85bdace | 816 | icd->dev.parent, icd->vdev); |
594bb46d GL |
817 | if (icl->free_bus) |
818 | icl->free_bus(icl); | |
7397bfbe GL |
819 | } |
820 | ||
32536108 GL |
821 | static int mt9v022_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines) |
822 | { | |
823 | struct i2c_client *client = sd->priv; | |
824 | struct mt9v022 *mt9v022 = to_mt9v022(client); | |
825 | ||
826 | *lines = mt9v022->y_skip_top; | |
827 | ||
828 | return 0; | |
829 | } | |
830 | ||
979ea1dd GL |
831 | static struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = { |
832 | .g_ctrl = mt9v022_g_ctrl, | |
833 | .s_ctrl = mt9v022_s_ctrl, | |
834 | .g_chip_ident = mt9v022_g_chip_ident, | |
835 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
836 | .g_register = mt9v022_g_register, | |
837 | .s_register = mt9v022_s_register, | |
838 | #endif | |
839 | }; | |
840 | ||
760697be GL |
841 | static int mt9v022_enum_fmt(struct v4l2_subdev *sd, int index, |
842 | enum v4l2_mbus_pixelcode *code) | |
843 | { | |
844 | struct i2c_client *client = sd->priv; | |
845 | struct mt9v022 *mt9v022 = to_mt9v022(client); | |
846 | ||
847 | if ((unsigned int)index >= mt9v022->num_fmts) | |
848 | return -EINVAL; | |
849 | ||
850 | *code = mt9v022->fmts[index].code; | |
851 | return 0; | |
852 | } | |
853 | ||
979ea1dd GL |
854 | static struct v4l2_subdev_video_ops mt9v022_subdev_video_ops = { |
855 | .s_stream = mt9v022_s_stream, | |
760697be GL |
856 | .s_mbus_fmt = mt9v022_s_fmt, |
857 | .g_mbus_fmt = mt9v022_g_fmt, | |
858 | .try_mbus_fmt = mt9v022_try_fmt, | |
08590b96 | 859 | .s_crop = mt9v022_s_crop, |
6a6c8786 GL |
860 | .g_crop = mt9v022_g_crop, |
861 | .cropcap = mt9v022_cropcap, | |
760697be | 862 | .enum_mbus_fmt = mt9v022_enum_fmt, |
979ea1dd GL |
863 | }; |
864 | ||
32536108 GL |
865 | static struct v4l2_subdev_sensor_ops mt9v022_subdev_sensor_ops = { |
866 | .g_skip_top_lines = mt9v022_g_skip_top_lines, | |
867 | }; | |
868 | ||
979ea1dd GL |
869 | static struct v4l2_subdev_ops mt9v022_subdev_ops = { |
870 | .core = &mt9v022_subdev_core_ops, | |
871 | .video = &mt9v022_subdev_video_ops, | |
32536108 | 872 | .sensor = &mt9v022_subdev_sensor_ops, |
979ea1dd GL |
873 | }; |
874 | ||
d2653e92 JD |
875 | static int mt9v022_probe(struct i2c_client *client, |
876 | const struct i2c_device_id *did) | |
7397bfbe GL |
877 | { |
878 | struct mt9v022 *mt9v022; | |
40e2e092 | 879 | struct soc_camera_device *icd = client->dev.platform_data; |
7397bfbe | 880 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
40e2e092 | 881 | struct soc_camera_link *icl; |
7397bfbe GL |
882 | int ret; |
883 | ||
40e2e092 GL |
884 | if (!icd) { |
885 | dev_err(&client->dev, "MT9V022: missing soc-camera data!\n"); | |
886 | return -EINVAL; | |
887 | } | |
888 | ||
889 | icl = to_soc_camera_link(icd); | |
7397bfbe GL |
890 | if (!icl) { |
891 | dev_err(&client->dev, "MT9V022 driver needs platform data\n"); | |
892 | return -EINVAL; | |
893 | } | |
894 | ||
895 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | |
896 | dev_warn(&adapter->dev, | |
897 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | |
898 | return -EIO; | |
899 | } | |
900 | ||
901 | mt9v022 = kzalloc(sizeof(struct mt9v022), GFP_KERNEL); | |
902 | if (!mt9v022) | |
903 | return -ENOMEM; | |
904 | ||
979ea1dd GL |
905 | v4l2_i2c_subdev_init(&mt9v022->subdev, client, &mt9v022_subdev_ops); |
906 | ||
7397bfbe | 907 | mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT; |
7397bfbe | 908 | |
a0705b07 | 909 | icd->ops = &mt9v022_ops; |
96c75399 GL |
910 | /* |
911 | * MT9V022 _really_ corrupts the first read out line. | |
912 | * TODO: verify on i.MX31 | |
913 | */ | |
32536108 | 914 | mt9v022->y_skip_top = 1; |
6a6c8786 GL |
915 | mt9v022->rect.left = MT9V022_COLUMN_SKIP; |
916 | mt9v022->rect.top = MT9V022_ROW_SKIP; | |
917 | mt9v022->rect.width = MT9V022_MAX_WIDTH; | |
918 | mt9v022->rect.height = MT9V022_MAX_HEIGHT; | |
919 | ||
40e2e092 GL |
920 | ret = mt9v022_video_probe(icd, client); |
921 | if (ret) { | |
922 | icd->ops = NULL; | |
923 | i2c_set_clientdata(client, NULL); | |
924 | kfree(mt9v022); | |
925 | } | |
7397bfbe | 926 | |
7397bfbe GL |
927 | return ret; |
928 | } | |
929 | ||
930 | static int mt9v022_remove(struct i2c_client *client) | |
931 | { | |
979ea1dd | 932 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
40e2e092 | 933 | struct soc_camera_device *icd = client->dev.platform_data; |
7397bfbe | 934 | |
40e2e092 GL |
935 | icd->ops = NULL; |
936 | mt9v022_video_remove(icd); | |
937 | i2c_set_clientdata(client, NULL); | |
938 | client->driver = NULL; | |
7397bfbe GL |
939 | kfree(mt9v022); |
940 | ||
941 | return 0; | |
942 | } | |
3760f736 JD |
943 | static const struct i2c_device_id mt9v022_id[] = { |
944 | { "mt9v022", 0 }, | |
945 | { } | |
946 | }; | |
947 | MODULE_DEVICE_TABLE(i2c, mt9v022_id); | |
948 | ||
7397bfbe GL |
949 | static struct i2c_driver mt9v022_i2c_driver = { |
950 | .driver = { | |
951 | .name = "mt9v022", | |
952 | }, | |
953 | .probe = mt9v022_probe, | |
954 | .remove = mt9v022_remove, | |
3760f736 | 955 | .id_table = mt9v022_id, |
7397bfbe GL |
956 | }; |
957 | ||
958 | static int __init mt9v022_mod_init(void) | |
959 | { | |
960 | return i2c_add_driver(&mt9v022_i2c_driver); | |
961 | } | |
962 | ||
963 | static void __exit mt9v022_mod_exit(void) | |
964 | { | |
965 | i2c_del_driver(&mt9v022_i2c_driver); | |
966 | } | |
967 | ||
968 | module_init(mt9v022_mod_init); | |
969 | module_exit(mt9v022_mod_exit); | |
970 | ||
971 | MODULE_DESCRIPTION("Micron MT9V022 Camera driver"); | |
972 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | |
973 | MODULE_LICENSE("GPL"); |