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Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/linux-dm
[mirror_ubuntu-bionic-kernel.git] / drivers / media / video / noon010pc30.c
CommitLineData
f8e2e3ea
SN		 1/*
2 * Driver for SiliconFile NOON010PC30 CIF (1/11") Image Sensor with ISP
3 *
6426e14a 4 * Copyright (C) 2010 - 2011 Samsung Electronics Co., Ltd.
f8e2e3ea
SN		 5 * Contact: Sylwester Nawrocki, <s.nawrocki@samsung.com>
6 *
7 * Initial register configuration based on a driver authored by
8 * HeungJun Kim <riverful.kim@samsung.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
6426e14a 13 * (at your option) any later version.
f8e2e3ea
SN		 14 */
15
16#include <linux/delay.h>
17#include <linux/gpio.h>
18#include <linux/i2c.h>
19#include <linux/slab.h>
20#include <linux/regulator/consumer.h>
21#include <media/noon010pc30.h>
22#include <media/v4l2-chip-ident.h>
23#include <linux/videodev2.h>
24#include <media/v4l2-ctrls.h>
25#include <media/v4l2-device.h>
26#include <media/v4l2-mediabus.h>
27#include <media/v4l2-subdev.h>
28
29static int debug;
30module_param(debug, int, 0644);
31MODULE_PARM_DESC(debug, "Enable module debug trace. Set to 1 to enable.");
32
33#define MODULE_NAME "NOON010PC30"
34
35/*
36 * Register offsets within a page
37 * b15..b8 - page id, b7..b0 - register address
38 */
39#define POWER_CTRL_REG 0x0001
40#define PAGEMODE_REG 0x03
41#define DEVICE_ID_REG 0x0004
42#define NOON010PC30_ID 0x86
43#define VDO_CTL_REG(n) (0x0010 + (n))
44#define SYNC_CTL_REG 0x0012
45/* Window size and position */
46#define WIN_ROWH_REG 0x0013
47#define WIN_ROWL_REG 0x0014
48#define WIN_COLH_REG 0x0015
49#define WIN_COLL_REG 0x0016
50#define WIN_HEIGHTH_REG 0x0017
51#define WIN_HEIGHTL_REG 0x0018
52#define WIN_WIDTHH_REG 0x0019
53#define WIN_WIDTHL_REG 0x001A
54#define HBLANKH_REG 0x001B
55#define HBLANKL_REG 0x001C
56#define VSYNCH_REG 0x001D
57#define VSYNCL_REG 0x001E
58/* VSYNC control */
59#define VS_CTL_REG(n) (0x00A1 + (n))
60/* page 1 */
61#define ISP_CTL_REG(n) (0x0110 + (n))
62#define YOFS_REG 0x0119
63#define DARK_YOFS_REG 0x011A
64#define SAT_CTL_REG 0x0120
65#define BSAT_REG 0x0121
66#define RSAT_REG 0x0122
67/* Color correction */
68#define CMC_CTL_REG 0x0130
69#define CMC_OFSGH_REG 0x0133
70#define CMC_OFSGL_REG 0x0135
71#define CMC_SIGN_REG 0x0136
72#define CMC_GOFS_REG 0x0137
73#define CMC_COEF_REG(n) (0x0138 + (n))
74#define CMC_OFS_REG(n) (0x0141 + (n))
75/* Gamma correction */
76#define GMA_CTL_REG 0x0160
77#define GMA_COEF_REG(n) (0x0161 + (n))
78/* Lens Shading */
79#define LENS_CTRL_REG 0x01D0
80#define LENS_XCEN_REG 0x01D1
81#define LENS_YCEN_REG 0x01D2
82#define LENS_RC_REG 0x01D3
83#define LENS_GC_REG 0x01D4
84#define LENS_BC_REG 0x01D5
85#define L_AGON_REG 0x01D6
86#define L_AGOFF_REG 0x01D7
87/* Page 3 - Auto Exposure */
88#define AE_CTL_REG(n) (0x0310 + (n))
89#define AE_CTL9_REG 0x032C
90#define AE_CTL10_REG 0x032D
91#define AE_YLVL_REG 0x031C
92#define AE_YTH_REG(n) (0x031D + (n))
93#define AE_WGT_REG 0x0326
94#define EXP_TIMEH_REG 0x0333
95#define EXP_TIMEM_REG 0x0334
96#define EXP_TIMEL_REG 0x0335
97#define EXP_MMINH_REG 0x0336
98#define EXP_MMINL_REG 0x0337
99#define EXP_MMAXH_REG 0x0338
100#define EXP_MMAXM_REG 0x0339
101#define EXP_MMAXL_REG 0x033A
102/* Page 4 - Auto White Balance */
103#define AWB_CTL_REG(n) (0x0410 + (n))
104#define AWB_ENABE 0x80
105#define AWB_WGHT_REG 0x0419
106#define BGAIN_PAR_REG(n) (0x044F + (n))
107/* Manual white balance, when AWB_CTL2[0]=1 */
108#define MWB_RGAIN_REG 0x0466
109#define MWB_BGAIN_REG 0x0467
110
111/* The token to mark an array end */
112#define REG_TERM 0xFFFF
113
114struct noon010_format {
115 enum v4l2_mbus_pixelcode code;
116 enum v4l2_colorspace colorspace;
117 u16 ispctl1_reg;
118};
119
120struct noon010_frmsize {
121 u16 width;
122 u16 height;
123 int vid_ctl1;
124};
125
126static const char * const noon010_supply_name[] = {
127 "vdd_core", "vddio", "vdda"
128};
129
130#define NOON010_NUM_SUPPLIES ARRAY_SIZE(noon010_supply_name)
131
132struct noon010_info {
133 struct v4l2_subdev sd;
6426e14a 134 struct media_pad pad;
f8e2e3ea 135 struct v4l2_ctrl_handler hdl;
6426e14a
SN		 136 struct regulator_bulk_data supply[NOON010_NUM_SUPPLIES];
137 u32 gpio_nreset;
138 u32 gpio_nstby;
139
140 /* Protects the struct members below */
141 struct mutex lock;
142
f8e2e3ea
SN		 143 const struct noon010_format *curr_fmt;
144 const struct noon010_frmsize *curr_win;
6426e14a
SN		 145 unsigned int apply_new_cfg:1;
146 unsigned int streaming:1;
f8e2e3ea
SN		 147 unsigned int hflip:1;
148 unsigned int vflip:1;
149 unsigned int power:1;
150 u8 i2c_reg_page;
f8e2e3ea
SN		 151};
152
153struct i2c_regval {
154 u16 addr;
155 u16 val;
156};
157
158/* Supported resolutions. */
159static const struct noon010_frmsize noon010_sizes[] = {
160 {
161 .width = 352,
162 .height = 288,
163 .vid_ctl1 = 0,
164 }, {
165 .width = 176,
166 .height = 144,
167 .vid_ctl1 = 0x10,
168 }, {
169 .width = 88,
170 .height = 72,
171 .vid_ctl1 = 0x20,
172 },
173};
174
175/* Supported pixel formats. */
176static const struct noon010_format noon010_formats[] = {
177 {
178 .code = V4L2_MBUS_FMT_YUYV8_2X8,
179 .colorspace = V4L2_COLORSPACE_JPEG,
180 .ispctl1_reg = 0x03,
181 }, {
182 .code = V4L2_MBUS_FMT_YVYU8_2X8,
183 .colorspace = V4L2_COLORSPACE_JPEG,
184 .ispctl1_reg = 0x02,
185 }, {
186 .code = V4L2_MBUS_FMT_VYUY8_2X8,
187 .colorspace = V4L2_COLORSPACE_JPEG,
188 .ispctl1_reg = 0,
189 }, {
190 .code = V4L2_MBUS_FMT_UYVY8_2X8,
191 .colorspace = V4L2_COLORSPACE_JPEG,
192 .ispctl1_reg = 0x01,
193 }, {
194 .code = V4L2_MBUS_FMT_RGB565_2X8_BE,
195 .colorspace = V4L2_COLORSPACE_JPEG,
196 .ispctl1_reg = 0x40,
197 },
198};
199
200static const struct i2c_regval noon010_base_regs[] = {
201 { WIN_COLL_REG, 0x06 }, { HBLANKL_REG, 0x7C },
202 /* Color corection and saturation */
203 { ISP_CTL_REG(0), 0x30 }, { ISP_CTL_REG(2), 0x30 },
204 { YOFS_REG, 0x80 }, { DARK_YOFS_REG, 0x04 },
205 { SAT_CTL_REG, 0x1F }, { BSAT_REG, 0x90 },
206 { CMC_CTL_REG, 0x0F }, { CMC_OFSGH_REG, 0x3C },
207 { CMC_OFSGL_REG, 0x2C }, { CMC_SIGN_REG, 0x3F },
208 { CMC_COEF_REG(0), 0x79 }, { CMC_OFS_REG(0), 0x00 },
209 { CMC_COEF_REG(1), 0x39 }, { CMC_OFS_REG(1), 0x00 },
210 { CMC_COEF_REG(2), 0x00 }, { CMC_OFS_REG(2), 0x00 },
211 { CMC_COEF_REG(3), 0x11 }, { CMC_OFS_REG(3), 0x8B },
212 { CMC_COEF_REG(4), 0x65 }, { CMC_OFS_REG(4), 0x07 },
213 { CMC_COEF_REG(5), 0x14 }, { CMC_OFS_REG(5), 0x04 },
214 { CMC_COEF_REG(6), 0x01 }, { CMC_OFS_REG(6), 0x9C },
215 { CMC_COEF_REG(7), 0x33 }, { CMC_OFS_REG(7), 0x89 },
216 { CMC_COEF_REG(8), 0x74 }, { CMC_OFS_REG(8), 0x25 },
217 /* Automatic white balance */
218 { AWB_CTL_REG(0), 0x78 }, { AWB_CTL_REG(1), 0x2E },
219 { AWB_CTL_REG(2), 0x20 }, { AWB_CTL_REG(3), 0x85 },
220 /* Auto exposure */
221 { AE_CTL_REG(0), 0xDC }, { AE_CTL_REG(1), 0x81 },
222 { AE_CTL_REG(2), 0x30 }, { AE_CTL_REG(3), 0xA5 },
223 { AE_CTL_REG(4), 0x40 }, { AE_CTL_REG(5), 0x51 },
224 { AE_CTL_REG(6), 0x33 }, { AE_CTL_REG(7), 0x7E },
225 { AE_CTL9_REG, 0x00 }, { AE_CTL10_REG, 0x02 },
226 { AE_YLVL_REG, 0x44 }, { AE_YTH_REG(0), 0x34 },
227 { AE_YTH_REG(1), 0x30 }, { AE_WGT_REG, 0xD5 },
228 /* Lens shading compensation */
229 { LENS_CTRL_REG, 0x01 }, { LENS_XCEN_REG, 0x80 },
230 { LENS_YCEN_REG, 0x70 }, { LENS_RC_REG, 0x53 },
231 { LENS_GC_REG, 0x40 }, { LENS_BC_REG, 0x3E },
232 { REG_TERM, 0 },
233};
234
235static inline struct noon010_info *to_noon010(struct v4l2_subdev *sd)
236{
237 return container_of(sd, struct noon010_info, sd);
238}
239
240static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
241{
242 return &container_of(ctrl->handler, struct noon010_info, hdl)->sd;
243}
244
245static inline int set_i2c_page(struct noon010_info *info,
246 struct i2c_client *client, unsigned int reg)
247{
248 u32 page = reg >> 8 & 0xFF;
249 int ret = 0;
250
251 if (info->i2c_reg_page != page && (reg & 0xFF) != 0x03) {
252 ret = i2c_smbus_write_byte_data(client, PAGEMODE_REG, page);
253 if (!ret)
254 info->i2c_reg_page = page;
255 }
256 return ret;
257}
258
259static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr)
260{
261 struct i2c_client *client = v4l2_get_subdevdata(sd);
262 struct noon010_info *info = to_noon010(sd);
263 int ret = set_i2c_page(info, client, reg_addr);
264
265 if (ret)
266 return ret;
267 return i2c_smbus_read_byte_data(client, reg_addr & 0xFF);
268}
269
270static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val)
271{
272 struct i2c_client *client = v4l2_get_subdevdata(sd);
273 struct noon010_info *info = to_noon010(sd);
274 int ret = set_i2c_page(info, client, reg_addr);
275
276 if (ret)
277 return ret;
278 return i2c_smbus_write_byte_data(client, reg_addr & 0xFF, val);
279}
280
281static inline int noon010_bulk_write_reg(struct v4l2_subdev *sd,
282 const struct i2c_regval *msg)
283{
284 while (msg->addr != REG_TERM) {
285 int ret = cam_i2c_write(sd, msg->addr, msg->val);
286
287 if (ret)
288 return ret;
289 msg++;
290 }
291 return 0;
292}
293
294/* Device reset and sleep mode control */
295static int noon010_power_ctrl(struct v4l2_subdev *sd, bool reset, bool sleep)
296{
297 struct noon010_info *info = to_noon010(sd);
298 u8 reg = sleep ? 0xF1 : 0xF0;
299 int ret = 0;
300
bc360324 301 if (reset) {
f8e2e3ea 302 ret = cam_i2c_write(sd, POWER_CTRL_REG, reg | 0x02);
bc360324
SN		 303 udelay(20);
304 }
f8e2e3ea
SN		 305 if (!ret) {
306 ret = cam_i2c_write(sd, POWER_CTRL_REG, reg);
307 if (reset && !ret)
308 info->i2c_reg_page = -1;
309 }
310 return ret;
311}
312
313/* Automatic white balance control */
314static int noon010_enable_autowhitebalance(struct v4l2_subdev *sd, int on)
315{
316 int ret;
317
318 ret = cam_i2c_write(sd, AWB_CTL_REG(1), on ? 0x2E : 0x2F);
319 if (!ret)
320 ret = cam_i2c_write(sd, AWB_CTL_REG(0), on ? 0xFB : 0x7B);
321 return ret;
322}
323
6426e14a 324/* Called with struct noon010_info.lock mutex held */
f8e2e3ea
SN		 325static int noon010_set_flip(struct v4l2_subdev *sd, int hflip, int vflip)
326{
327 struct noon010_info *info = to_noon010(sd);
328 int reg, ret;
329
330 reg = cam_i2c_read(sd, VDO_CTL_REG(1));
331 if (reg < 0)
332 return reg;
333
334 reg &= 0x7C;
335 if (hflip)
336 reg |= 0x01;
337 if (vflip)
338 reg |= 0x02;
339
340 ret = cam_i2c_write(sd, VDO_CTL_REG(1), reg | 0x80);
341 if (!ret) {
342 info->hflip = hflip;
343 info->vflip = vflip;
344 }
345 return ret;
346}
347
348/* Configure resolution and color format */
349static int noon010_set_params(struct v4l2_subdev *sd)
350{
351 struct noon010_info *info = to_noon010(sd);
f8e2e3ea 352
6426e14a
SN		 353 int ret = cam_i2c_write(sd, VDO_CTL_REG(0),
354 info->curr_win->vid_ctl1);
355 if (ret)
356 return ret;
357 return cam_i2c_write(sd, ISP_CTL_REG(0),
358 info->curr_fmt->ispctl1_reg);
f8e2e3ea
SN		 359}
360
361/* Find nearest matching image pixel size. */
6426e14a
SN		 362static int noon010_try_frame_size(struct v4l2_mbus_framefmt *mf,
363 const struct noon010_frmsize **size)
f8e2e3ea
SN		 364{
365 unsigned int min_err = ~0;
366 int i = ARRAY_SIZE(noon010_sizes);
367 const struct noon010_frmsize *fsize = &noon010_sizes[0],
368 *match = NULL;
369
370 while (i--) {
371 int err = abs(fsize->width - mf->width)
372 + abs(fsize->height - mf->height);
373
374 if (err < min_err) {
375 min_err = err;
376 match = fsize;
377 }
378 fsize++;
379 }
380 if (match) {
381 mf->width = match->width;
382 mf->height = match->height;
6426e14a
SN		 383 if (size)
384 *size = match;
f8e2e3ea
SN		 385 return 0;
386 }
387 return -EINVAL;
388}
389
6426e14a 390/* Called with info.lock mutex held */
f8e2e3ea
SN		 391static int power_enable(struct noon010_info *info)
392{
393 int ret;
394
395 if (info->power) {
396 v4l2_info(&info->sd, "%s: sensor is already on\n", __func__);
397 return 0;
398 }
399
400 if (gpio_is_valid(info->gpio_nstby))
401 gpio_set_value(info->gpio_nstby, 0);
402
403 if (gpio_is_valid(info->gpio_nreset))
404 gpio_set_value(info->gpio_nreset, 0);
405
406 ret = regulator_bulk_enable(NOON010_NUM_SUPPLIES, info->supply);
407 if (ret)
408 return ret;
409
410 if (gpio_is_valid(info->gpio_nreset)) {
411 msleep(50);
412 gpio_set_value(info->gpio_nreset, 1);
413 }
414 if (gpio_is_valid(info->gpio_nstby)) {
415 udelay(1000);
416 gpio_set_value(info->gpio_nstby, 1);
417 }
418 if (gpio_is_valid(info->gpio_nreset)) {
419 udelay(1000);
420 gpio_set_value(info->gpio_nreset, 0);
421 msleep(100);
422 gpio_set_value(info->gpio_nreset, 1);
423 msleep(20);
424 }
425 info->power = 1;
426
427 v4l2_dbg(1, debug, &info->sd, "%s: sensor is on\n", __func__);
428 return 0;
429}
430
6426e14a 431/* Called with info.lock mutex held */
f8e2e3ea
SN		 432static int power_disable(struct noon010_info *info)
433{
434 int ret;
435
436 if (!info->power) {
437 v4l2_info(&info->sd, "%s: sensor is already off\n", __func__);
438 return 0;
439 }
440
441 ret = regulator_bulk_disable(NOON010_NUM_SUPPLIES, info->supply);
442 if (ret)
443 return ret;
444
445 if (gpio_is_valid(info->gpio_nstby))
446 gpio_set_value(info->gpio_nstby, 0);
447
448 if (gpio_is_valid(info->gpio_nreset))
449 gpio_set_value(info->gpio_nreset, 0);
450
451 info->power = 0;
452
453 v4l2_dbg(1, debug, &info->sd, "%s: sensor is off\n", __func__);
454
455 return 0;
456}
457
458static int noon010_s_ctrl(struct v4l2_ctrl *ctrl)
459{
460 struct v4l2_subdev *sd = to_sd(ctrl);
6426e14a
SN		 461 struct noon010_info *info = to_noon010(sd);
462 int ret = 0;
f8e2e3ea
SN		 463
464 v4l2_dbg(1, debug, sd, "%s: ctrl_id: %d, value: %d\n",
465 __func__, ctrl->id, ctrl->val);
466
6426e14a
SN		 467 mutex_lock(&info->lock);
468 /*
469 * If the device is not powered up by the host driver do
470 * not apply any controls to H/W at this time. Instead
471 * the controls will be restored right after power-up.
472 */
473 if (!info->power)
474 goto unlock;
475
f8e2e3ea
SN		 476 switch (ctrl->id) {
477 case V4L2_CID_AUTO_WHITE_BALANCE:
6426e14a
SN		 478 ret = noon010_enable_autowhitebalance(sd, ctrl->val);
479 break;
f8e2e3ea 480 case V4L2_CID_BLUE_BALANCE:
6426e14a
SN		 481 ret = cam_i2c_write(sd, MWB_BGAIN_REG, ctrl->val);
482 break;
f8e2e3ea 483 case V4L2_CID_RED_BALANCE:
6426e14a
SN		 484 ret = cam_i2c_write(sd, MWB_RGAIN_REG, ctrl->val);
485 break;
f8e2e3ea 486 default:
6426e14a 487 ret = -EINVAL;
f8e2e3ea 488 }
6426e14a
SN		 489unlock:
490 mutex_unlock(&info->lock);
491 return ret;
f8e2e3ea
SN		 492}
493
6426e14a
SN		 494static int noon010_enum_mbus_code(struct v4l2_subdev *sd,
495 struct v4l2_subdev_fh *fh,
496 struct v4l2_subdev_mbus_code_enum *code)
f8e2e3ea 497{
6426e14a 498 if (code->index >= ARRAY_SIZE(noon010_formats))
f8e2e3ea
SN		 499 return -EINVAL;
500
6426e14a 501 code->code = noon010_formats[code->index].code;
f8e2e3ea
SN		 502 return 0;
503}
504
6426e14a
SN		 505static int noon010_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
506 struct v4l2_subdev_format *fmt)
f8e2e3ea
SN		 507{
508 struct noon010_info *info = to_noon010(sd);
6426e14a 509 struct v4l2_mbus_framefmt *mf;
f8e2e3ea 510
6426e14a
SN		 511 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
512 if (fh) {
513 mf = v4l2_subdev_get_try_format(fh, 0);
514 fmt->format = *mf;
515 }
516 return 0;
f8e2e3ea 517 }
6426e14a 518 mf = &fmt->format;
f8e2e3ea 519
6426e14a
SN		 520 mutex_lock(&info->lock);
521 mf->width = info->curr_win->width;
522 mf->height = info->curr_win->height;
523 mf->code = info->curr_fmt->code;
524 mf->colorspace = info->curr_fmt->colorspace;
525 mf->field = V4L2_FIELD_NONE;
f8e2e3ea 526
6426e14a 527 mutex_unlock(&info->lock);
f8e2e3ea
SN		 528 return 0;
529}
530
531/* Return nearest media bus frame format. */
6426e14a 532static const struct noon010_format *noon010_try_fmt(struct v4l2_subdev *sd,
f8e2e3ea
SN		 533 struct v4l2_mbus_framefmt *mf)
534{
535 int i = ARRAY_SIZE(noon010_formats);
536
6426e14a 537 while (--i)
f8e2e3ea
SN		 538 if (mf->code == noon010_formats[i].code)
539 break;
f8e2e3ea
SN		 540 mf->code = noon010_formats[i].code;
541
542 return &noon010_formats[i];
543}
544
6426e14a
SN		 545static int noon010_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
546 struct v4l2_subdev_format *fmt)
f8e2e3ea
SN		 547{
548 struct noon010_info *info = to_noon010(sd);
6426e14a
SN		 549 const struct noon010_frmsize *size = NULL;
550 const struct noon010_format *nf;
551 struct v4l2_mbus_framefmt *mf;
552 int ret = 0;
f8e2e3ea 553
6426e14a
SN		 554 nf = noon010_try_fmt(sd, &fmt->format);
555 noon010_try_frame_size(&fmt->format, &size);
556 fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
f8e2e3ea 557
6426e14a
SN		 558 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
559 if (fh) {
560 mf = v4l2_subdev_get_try_format(fh, 0);
561 *mf = fmt->format;
562 }
563 return 0;
564 }
565 mutex_lock(&info->lock);
566 if (!info->streaming) {
567 info->apply_new_cfg = 1;
568 info->curr_fmt = nf;
569 info->curr_win = size;
570 } else {
571 ret = -EBUSY;
572 }
573 mutex_unlock(&info->lock);
574 return ret;
f8e2e3ea
SN		 575}
576
bc360324 577/* Called with struct noon010_info.lock mutex held */
f8e2e3ea
SN		 578static int noon010_base_config(struct v4l2_subdev *sd)
579{
bc360324
SN		 580 int ret = noon010_bulk_write_reg(sd, noon010_base_regs);
581 if (!ret)
f8e2e3ea 582 ret = noon010_set_params(sd);
f8e2e3ea
SN		 583 if (!ret)
584 ret = noon010_set_flip(sd, 1, 0);
f8e2e3ea 585
f8e2e3ea
SN		 586 return ret;
587}
588
589static int noon010_s_power(struct v4l2_subdev *sd, int on)
590{
591 struct noon010_info *info = to_noon010(sd);
bc360324 592 int ret;
f8e2e3ea 593
bc360324 594 mutex_lock(&info->lock);
f8e2e3ea
SN		 595 if (on) {
596 ret = power_enable(info);
bc360324
SN		 597 if (!ret)
598 ret = noon010_base_config(sd);
f8e2e3ea
SN		 599 } else {
600 noon010_power_ctrl(sd, false, true);
601 ret = power_disable(info);
f8e2e3ea 602 }
bc360324
SN		 603 mutex_unlock(&info->lock);
604
605 /* Restore the controls state */
606 if (!ret && on)
607 ret = v4l2_ctrl_handler_setup(&info->hdl);
f8e2e3ea
SN		 608
609 return ret;
610}
611
6426e14a
SN		 612static int noon010_s_stream(struct v4l2_subdev *sd, int on)
613{
614 struct noon010_info *info = to_noon010(sd);
615 int ret = 0;
616
617 mutex_lock(&info->lock);
618 if (!info->streaming != !on) {
619 ret = noon010_power_ctrl(sd, false, !on);
620 if (!ret)
621 info->streaming = on;
622 }
623 if (!ret && on && info->apply_new_cfg) {
624 ret = noon010_set_params(sd);
625 if (!ret)
626 info->apply_new_cfg = 0;
627 }
628 mutex_unlock(&info->lock);
629 return ret;
630}
631
f8e2e3ea
SN		 632static int noon010_log_status(struct v4l2_subdev *sd)
633{
634 struct noon010_info *info = to_noon010(sd);
635
636 v4l2_ctrl_handler_log_status(&info->hdl, sd->name);
637 return 0;
638}
639
6426e14a
SN		 640static int noon010_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
641{
642 struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(fh, 0);
643
644 mf->width = noon010_sizes[0].width;
645 mf->height = noon010_sizes[0].height;
646 mf->code = noon010_formats[0].code;
647 mf->colorspace = V4L2_COLORSPACE_JPEG;
648 mf->field = V4L2_FIELD_NONE;
649 return 0;
650}
651
652static const struct v4l2_subdev_internal_ops noon010_subdev_internal_ops = {
653 .open = noon010_open,
654};
655
f8e2e3ea
SN		 656static const struct v4l2_ctrl_ops noon010_ctrl_ops = {
657 .s_ctrl = noon010_s_ctrl,
658};
659
660static const struct v4l2_subdev_core_ops noon010_core_ops = {
f8e2e3ea
SN		 661 .s_power = noon010_s_power,
662 .g_ctrl = v4l2_subdev_g_ctrl,
663 .s_ctrl = v4l2_subdev_s_ctrl,
664 .queryctrl = v4l2_subdev_queryctrl,
665 .querymenu = v4l2_subdev_querymenu,
666 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
667 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
668 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
669 .log_status = noon010_log_status,
670};
671
6426e14a
SN		 672static struct v4l2_subdev_pad_ops noon010_pad_ops = {
673 .enum_mbus_code = noon010_enum_mbus_code,
674 .get_fmt = noon010_get_fmt,
675 .set_fmt = noon010_set_fmt,
676};
677
678static struct v4l2_subdev_video_ops noon010_video_ops = {
679 .s_stream = noon010_s_stream,
f8e2e3ea
SN		 680};
681
682static const struct v4l2_subdev_ops noon010_ops = {
683 .core = &noon010_core_ops,
6426e14a 684 .pad = &noon010_pad_ops,
f8e2e3ea
SN		 685 .video = &noon010_video_ops,
686};
687
688/* Return 0 if NOON010PC30L sensor type was detected or -ENODEV otherwise. */
689static int noon010_detect(struct i2c_client *client, struct noon010_info *info)
690{
691 int ret;
692
693 ret = power_enable(info);
694 if (ret)
695 return ret;
696
697 ret = i2c_smbus_read_byte_data(client, DEVICE_ID_REG);
698 if (ret < 0)
699 dev_err(&client->dev, "I2C read failed: 0x%X\n", ret);
700
701 power_disable(info);
702
703 return ret == NOON010PC30_ID ? 0 : -ENODEV;
704}
705
706static int noon010_probe(struct i2c_client *client,
707 const struct i2c_device_id *id)
708{
709 struct noon010_info *info;
710 struct v4l2_subdev *sd;
711 const struct noon010pc30_platform_data *pdata
712 = client->dev.platform_data;
713 int ret;
714 int i;
715
716 if (!pdata) {
717 dev_err(&client->dev, "No platform data!\n");
718 return -EIO;
719 }
720
721 info = kzalloc(sizeof(*info), GFP_KERNEL);
722 if (!info)
723 return -ENOMEM;
724
6426e14a 725 mutex_init(&info->lock);
f8e2e3ea
SN		 726 sd = &info->sd;
727 strlcpy(sd->name, MODULE_NAME, sizeof(sd->name));
728 v4l2_i2c_subdev_init(sd, client, &noon010_ops);
729
6426e14a
SN		 730 sd->internal_ops = &noon010_subdev_internal_ops;
731 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
732
f8e2e3ea
SN		 733 v4l2_ctrl_handler_init(&info->hdl, 3);
734
735 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
736 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
737 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
738 V4L2_CID_RED_BALANCE, 0, 127, 1, 64);
739 v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops,
740 V4L2_CID_BLUE_BALANCE, 0, 127, 1, 64);
741
742 sd->ctrl_handler = &info->hdl;
743
744 ret = info->hdl.error;
745 if (ret)
746 goto np_err;
747
f8e2e3ea
SN		 748 info->i2c_reg_page = -1;
749 info->gpio_nreset = -EINVAL;
750 info->gpio_nstby = -EINVAL;
bc360324
SN		 751 info->curr_fmt = &noon010_formats[0];
752 info->curr_win = &noon010_sizes[0];
f8e2e3ea
SN		 753
754 if (gpio_is_valid(pdata->gpio_nreset)) {
755 ret = gpio_request(pdata->gpio_nreset, "NOON010PC30 NRST");
756 if (ret) {
757 dev_err(&client->dev, "GPIO request error: %d\n", ret);
758 goto np_err;
759 }
760 info->gpio_nreset = pdata->gpio_nreset;
761 gpio_direction_output(info->gpio_nreset, 0);
762 gpio_export(info->gpio_nreset, 0);
763 }
764
765 if (gpio_is_valid(pdata->gpio_nstby)) {
766 ret = gpio_request(pdata->gpio_nstby, "NOON010PC30 NSTBY");
767 if (ret) {
768 dev_err(&client->dev, "GPIO request error: %d\n", ret);
769 goto np_gpio_err;
770 }
771 info->gpio_nstby = pdata->gpio_nstby;
772 gpio_direction_output(info->gpio_nstby, 0);
773 gpio_export(info->gpio_nstby, 0);
774 }
775
776 for (i = 0; i < NOON010_NUM_SUPPLIES; i++)
777 info->supply[i].supply = noon010_supply_name[i];
778
779 ret = regulator_bulk_get(&client->dev, NOON010_NUM_SUPPLIES,
780 info->supply);
781 if (ret)
782 goto np_reg_err;
783
6426e14a
SN		 784 info->pad.flags = MEDIA_PAD_FL_SOURCE;
785 sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
786 ret = media_entity_init(&sd->entity, 1, &info->pad, 0);
787 if (ret < 0)
788 goto np_me_err;
789
f8e2e3ea
SN		 790 ret = noon010_detect(client, info);
791 if (!ret)
792 return 0;
793
6426e14a 794np_me_err:
f8e2e3ea
SN		 795 regulator_bulk_free(NOON010_NUM_SUPPLIES, info->supply);
796np_reg_err:
797 if (gpio_is_valid(info->gpio_nstby))
798 gpio_free(info->gpio_nstby);
799np_gpio_err:
800 if (gpio_is_valid(info->gpio_nreset))
801 gpio_free(info->gpio_nreset);
802np_err:
803 v4l2_ctrl_handler_free(&info->hdl);
804 v4l2_device_unregister_subdev(sd);
805 kfree(info);
806 return ret;
807}
808
809static int noon010_remove(struct i2c_client *client)
810{
811 struct v4l2_subdev *sd = i2c_get_clientdata(client);
812 struct noon010_info *info = to_noon010(sd);
813
814 v4l2_device_unregister_subdev(sd);
815 v4l2_ctrl_handler_free(&info->hdl);
816
817 regulator_bulk_free(NOON010_NUM_SUPPLIES, info->supply);
818
819 if (gpio_is_valid(info->gpio_nreset))
820 gpio_free(info->gpio_nreset);
821
822 if (gpio_is_valid(info->gpio_nstby))
823 gpio_free(info->gpio_nstby);
824
6426e14a 825 media_entity_cleanup(&sd->entity);
f8e2e3ea
SN		 826 kfree(info);
827 return 0;
828}
829
830static const struct i2c_device_id noon010_id[] = {
831 { MODULE_NAME, 0 },
832 { },
833};
834MODULE_DEVICE_TABLE(i2c, noon010_id);
835
836
837static struct i2c_driver noon010_i2c_driver = {
838 .driver = {
839 .name = MODULE_NAME
840 },
841 .probe = noon010_probe,
842 .remove = noon010_remove,
843 .id_table = noon010_id,
844};
845
846static int __init noon010_init(void)
847{
848 return i2c_add_driver(&noon010_i2c_driver);
849}
850
851static void __exit noon010_exit(void)
852{
853 i2c_del_driver(&noon010_i2c_driver);
854}
855
856module_init(noon010_init);
857module_exit(noon010_exit);
858
859MODULE_DESCRIPTION("Siliconfile NOON010PC30 camera driver");
860MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
861MODULE_LICENSE("GPL");
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