]>
Commit | Line | Data |
---|---|---|
d855497e MI |
1 | /* |
2 | * | |
d855497e MI |
3 | * |
4 | * Copyright (C) 2005 Mike Isely <isely@pobox.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | * | |
19 | */ | |
20 | ||
21 | #include "pvrusb2-i2c-core.h" | |
22 | #include "pvrusb2-hdw-internal.h" | |
23 | #include "pvrusb2-debug.h" | |
8d364363 | 24 | #include "pvrusb2-fx2-cmd.h" |
5c808e64 | 25 | #include "pvrusb2.h" |
d855497e MI |
26 | |
27 | #define trace_i2c(...) pvr2_trace(PVR2_TRACE_I2C,__VA_ARGS__) | |
28 | ||
29 | /* | |
30 | ||
31 | This module attempts to implement a compliant I2C adapter for the pvrusb2 | |
32 | device. By doing this we can then make use of existing functionality in | |
33 | V4L (e.g. tuner.c) rather than rolling our own. | |
34 | ||
35 | */ | |
36 | ||
ff699e6b | 37 | static unsigned int i2c_scan; |
d855497e MI |
38 | module_param(i2c_scan, int, S_IRUGO|S_IWUSR); |
39 | MODULE_PARM_DESC(i2c_scan,"scan i2c bus at insmod time"); | |
40 | ||
5c808e64 MI |
41 | static int ir_mode[PVR_NUM] = { [0 ... PVR_NUM-1] = 1 }; |
42 | module_param_array(ir_mode, int, NULL, 0444); | |
43 | MODULE_PARM_DESC(ir_mode,"specify: 0=disable IR reception, 1=normal IR"); | |
44 | ||
07e337ee AB |
45 | static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp, |
46 | unsigned int detail, | |
47 | char *buf,unsigned int maxlen); | |
48 | ||
d855497e MI |
49 | static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */ |
50 | u8 i2c_addr, /* I2C address we're talking to */ | |
51 | u8 *data, /* Data to write */ | |
52 | u16 length) /* Size of data to write */ | |
53 | { | |
54 | /* Return value - default 0 means success */ | |
55 | int ret; | |
56 | ||
57 | ||
58 | if (!data) length = 0; | |
59 | if (length > (sizeof(hdw->cmd_buffer) - 3)) { | |
60 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
61 | "Killing an I2C write to %u that is too large" | |
62 | " (desired=%u limit=%u)", | |
63 | i2c_addr, | |
64 | length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3)); | |
65 | return -ENOTSUPP; | |
66 | } | |
67 | ||
68 | LOCK_TAKE(hdw->ctl_lock); | |
69 | ||
70 | /* Clear the command buffer (likely to be paranoia) */ | |
71 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | |
72 | ||
73 | /* Set up command buffer for an I2C write */ | |
8d364363 | 74 | hdw->cmd_buffer[0] = FX2CMD_I2C_WRITE; /* write prefix */ |
d855497e MI |
75 | hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */ |
76 | hdw->cmd_buffer[2] = length; /* length of what follows */ | |
77 | if (length) memcpy(hdw->cmd_buffer + 3, data, length); | |
78 | ||
79 | /* Do the operation */ | |
80 | ret = pvr2_send_request(hdw, | |
81 | hdw->cmd_buffer, | |
82 | length + 3, | |
83 | hdw->cmd_buffer, | |
84 | 1); | |
85 | if (!ret) { | |
86 | if (hdw->cmd_buffer[0] != 8) { | |
87 | ret = -EIO; | |
88 | if (hdw->cmd_buffer[0] != 7) { | |
89 | trace_i2c("unexpected status" | |
90 | " from i2_write[%d]: %d", | |
91 | i2c_addr,hdw->cmd_buffer[0]); | |
92 | } | |
93 | } | |
94 | } | |
95 | ||
96 | LOCK_GIVE(hdw->ctl_lock); | |
97 | ||
98 | return ret; | |
99 | } | |
100 | ||
101 | static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */ | |
102 | u8 i2c_addr, /* I2C address we're talking to */ | |
103 | u8 *data, /* Data to write */ | |
104 | u16 dlen, /* Size of data to write */ | |
105 | u8 *res, /* Where to put data we read */ | |
106 | u16 rlen) /* Amount of data to read */ | |
107 | { | |
108 | /* Return value - default 0 means success */ | |
109 | int ret; | |
110 | ||
111 | ||
112 | if (!data) dlen = 0; | |
113 | if (dlen > (sizeof(hdw->cmd_buffer) - 4)) { | |
114 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
115 | "Killing an I2C read to %u that has wlen too large" | |
116 | " (desired=%u limit=%u)", | |
117 | i2c_addr, | |
118 | dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4)); | |
119 | return -ENOTSUPP; | |
120 | } | |
121 | if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) { | |
122 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
123 | "Killing an I2C read to %u that has rlen too large" | |
124 | " (desired=%u limit=%u)", | |
125 | i2c_addr, | |
126 | rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1)); | |
127 | return -ENOTSUPP; | |
128 | } | |
129 | ||
130 | LOCK_TAKE(hdw->ctl_lock); | |
131 | ||
132 | /* Clear the command buffer (likely to be paranoia) */ | |
133 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | |
134 | ||
135 | /* Set up command buffer for an I2C write followed by a read */ | |
8d364363 | 136 | hdw->cmd_buffer[0] = FX2CMD_I2C_READ; /* read prefix */ |
d855497e MI |
137 | hdw->cmd_buffer[1] = dlen; /* arg length */ |
138 | hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one | |
139 | more byte (status). */ | |
140 | hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */ | |
141 | if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen); | |
142 | ||
143 | /* Do the operation */ | |
144 | ret = pvr2_send_request(hdw, | |
145 | hdw->cmd_buffer, | |
146 | 4 + dlen, | |
147 | hdw->cmd_buffer, | |
148 | rlen + 1); | |
149 | if (!ret) { | |
150 | if (hdw->cmd_buffer[0] != 8) { | |
151 | ret = -EIO; | |
152 | if (hdw->cmd_buffer[0] != 7) { | |
153 | trace_i2c("unexpected status" | |
154 | " from i2_read[%d]: %d", | |
155 | i2c_addr,hdw->cmd_buffer[0]); | |
156 | } | |
157 | } | |
158 | } | |
159 | ||
160 | /* Copy back the result */ | |
161 | if (res && rlen) { | |
162 | if (ret) { | |
163 | /* Error, just blank out the return buffer */ | |
164 | memset(res, 0, rlen); | |
165 | } else { | |
166 | memcpy(res, hdw->cmd_buffer + 1, rlen); | |
167 | } | |
168 | } | |
169 | ||
170 | LOCK_GIVE(hdw->ctl_lock); | |
171 | ||
172 | return ret; | |
173 | } | |
174 | ||
175 | /* This is the common low level entry point for doing I2C operations to the | |
176 | hardware. */ | |
07e337ee AB |
177 | static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw, |
178 | u8 i2c_addr, | |
179 | u8 *wdata, | |
180 | u16 wlen, | |
181 | u8 *rdata, | |
182 | u16 rlen) | |
d855497e MI |
183 | { |
184 | if (!rdata) rlen = 0; | |
185 | if (!wdata) wlen = 0; | |
186 | if (rlen || !wlen) { | |
187 | return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
188 | } else { | |
189 | return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen); | |
190 | } | |
191 | } | |
192 | ||
cc75aede MI |
193 | |
194 | /* This is a special entry point for cases of I2C transaction attempts to | |
195 | the IR receiver. The implementation here simulates the IR receiver by | |
196 | issuing a command to the FX2 firmware and using that response to return | |
197 | what the real I2C receiver would have returned. We use this for 24xxx | |
198 | devices, where the IR receiver chip has been removed and replaced with | |
199 | FX2 related logic. */ | |
200 | static int i2c_24xxx_ir(struct pvr2_hdw *hdw, | |
201 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
202 | { | |
203 | u8 dat[4]; | |
204 | unsigned int stat; | |
205 | ||
206 | if (!(rlen || wlen)) { | |
207 | /* This is a probe attempt. Just let it succeed. */ | |
208 | return 0; | |
209 | } | |
210 | ||
211 | /* We don't understand this kind of transaction */ | |
212 | if ((wlen != 0) || (rlen == 0)) return -EIO; | |
213 | ||
214 | if (rlen < 3) { | |
215 | /* Mike Isely <isely@pobox.com> Appears to be a probe | |
216 | attempt from lirc. Just fill in zeroes and return. If | |
217 | we try instead to do the full transaction here, then bad | |
218 | things seem to happen within the lirc driver module | |
219 | (version 0.8.0-7 sources from Debian, when run under | |
220 | vanilla 2.6.17.6 kernel) - and I don't have the patience | |
221 | to chase it down. */ | |
222 | if (rlen > 0) rdata[0] = 0; | |
223 | if (rlen > 1) rdata[1] = 0; | |
224 | return 0; | |
225 | } | |
226 | ||
227 | /* Issue a command to the FX2 to read the IR receiver. */ | |
228 | LOCK_TAKE(hdw->ctl_lock); do { | |
8d364363 | 229 | hdw->cmd_buffer[0] = FX2CMD_GET_IR_CODE; |
cc75aede MI |
230 | stat = pvr2_send_request(hdw, |
231 | hdw->cmd_buffer,1, | |
232 | hdw->cmd_buffer,4); | |
233 | dat[0] = hdw->cmd_buffer[0]; | |
234 | dat[1] = hdw->cmd_buffer[1]; | |
235 | dat[2] = hdw->cmd_buffer[2]; | |
236 | dat[3] = hdw->cmd_buffer[3]; | |
237 | } while (0); LOCK_GIVE(hdw->ctl_lock); | |
238 | ||
239 | /* Give up if that operation failed. */ | |
240 | if (stat != 0) return stat; | |
241 | ||
242 | /* Mangle the results into something that looks like the real IR | |
243 | receiver. */ | |
244 | rdata[2] = 0xc1; | |
245 | if (dat[0] != 1) { | |
246 | /* No code received. */ | |
247 | rdata[0] = 0; | |
248 | rdata[1] = 0; | |
249 | } else { | |
250 | u16 val; | |
251 | /* Mash the FX2 firmware-provided IR code into something | |
252 | that the normal i2c chip-level driver expects. */ | |
253 | val = dat[1]; | |
254 | val <<= 8; | |
255 | val |= dat[2]; | |
256 | val >>= 1; | |
257 | val &= ~0x0003; | |
258 | val |= 0x8000; | |
259 | rdata[0] = (val >> 8) & 0xffu; | |
260 | rdata[1] = val & 0xffu; | |
261 | } | |
262 | ||
263 | return 0; | |
264 | } | |
265 | ||
d855497e MI |
266 | /* This is a special entry point that is entered if an I2C operation is |
267 | attempted to a wm8775 chip on model 24xxx hardware. Autodetect of this | |
268 | part doesn't work, but we know it is really there. So let's look for | |
269 | the autodetect attempt and just return success if we see that. */ | |
270 | static int i2c_hack_wm8775(struct pvr2_hdw *hdw, | |
271 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
272 | { | |
273 | if (!(rlen || wlen)) { | |
274 | // This is a probe attempt. Just let it succeed. | |
275 | return 0; | |
276 | } | |
277 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
278 | } | |
279 | ||
5c808e64 MI |
280 | /* This is an entry point designed to always fail any attempt to perform a |
281 | transfer. We use this to cause certain I2C addresses to not be | |
282 | probed. */ | |
283 | static int i2c_black_hole(struct pvr2_hdw *hdw, | |
284 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
285 | { | |
286 | return -EIO; | |
287 | } | |
288 | ||
d855497e MI |
289 | /* This is a special entry point that is entered if an I2C operation is |
290 | attempted to a cx25840 chip on model 24xxx hardware. This chip can | |
291 | sometimes wedge itself. Worse still, when this happens msp3400 can | |
292 | falsely detect this part and then the system gets hosed up after msp3400 | |
293 | gets confused and dies. What we want to do here is try to keep msp3400 | |
294 | away and also try to notice if the chip is wedged and send a warning to | |
295 | the system log. */ | |
296 | static int i2c_hack_cx25840(struct pvr2_hdw *hdw, | |
297 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
298 | { | |
299 | int ret; | |
300 | unsigned int subaddr; | |
301 | u8 wbuf[2]; | |
302 | int state = hdw->i2c_cx25840_hack_state; | |
303 | ||
304 | if (!(rlen || wlen)) { | |
305 | // Probe attempt - always just succeed and don't bother the | |
306 | // hardware (this helps to make the state machine further | |
307 | // down somewhat easier). | |
308 | return 0; | |
309 | } | |
310 | ||
311 | if (state == 3) { | |
312 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
313 | } | |
314 | ||
315 | /* We're looking for the exact pattern where the revision register | |
316 | is being read. The cx25840 module will always look at the | |
317 | revision register first. Any other pattern of access therefore | |
318 | has to be a probe attempt from somebody else so we'll reject it. | |
319 | Normally we could just let each client just probe the part | |
320 | anyway, but when the cx25840 is wedged, msp3400 will get a false | |
321 | positive and that just screws things up... */ | |
322 | ||
323 | if (wlen == 0) { | |
324 | switch (state) { | |
325 | case 1: subaddr = 0x0100; break; | |
326 | case 2: subaddr = 0x0101; break; | |
327 | default: goto fail; | |
328 | } | |
329 | } else if (wlen == 2) { | |
330 | subaddr = (wdata[0] << 8) | wdata[1]; | |
331 | switch (subaddr) { | |
332 | case 0x0100: state = 1; break; | |
333 | case 0x0101: state = 2; break; | |
334 | default: goto fail; | |
335 | } | |
336 | } else { | |
337 | goto fail; | |
338 | } | |
339 | if (!rlen) goto success; | |
340 | state = 0; | |
341 | if (rlen != 1) goto fail; | |
342 | ||
343 | /* If we get to here then we have a legitimate read for one of the | |
344 | two revision bytes, so pass it through. */ | |
345 | wbuf[0] = subaddr >> 8; | |
346 | wbuf[1] = subaddr; | |
347 | ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen); | |
348 | ||
349 | if ((ret != 0) || (*rdata == 0x04) || (*rdata == 0x0a)) { | |
350 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
351 | "WARNING: Detected a wedged cx25840 chip;" | |
352 | " the device will not work."); | |
353 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
354 | "WARNING: Try power cycling the pvrusb2 device."); | |
355 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
356 | "WARNING: Disabling further access to the device" | |
357 | " to prevent other foul-ups."); | |
358 | // This blocks all further communication with the part. | |
a0fd1cb1 | 359 | hdw->i2c_func[0x44] = NULL; |
d855497e MI |
360 | pvr2_hdw_render_useless(hdw); |
361 | goto fail; | |
362 | } | |
363 | ||
364 | /* Success! */ | |
365 | pvr2_trace(PVR2_TRACE_CHIPS,"cx25840 appears to be OK."); | |
366 | state = 3; | |
367 | ||
368 | success: | |
369 | hdw->i2c_cx25840_hack_state = state; | |
370 | return 0; | |
371 | ||
372 | fail: | |
373 | hdw->i2c_cx25840_hack_state = state; | |
374 | return -EIO; | |
375 | } | |
376 | ||
d855497e MI |
377 | /* This is a very, very limited I2C adapter implementation. We can only |
378 | support what we actually know will work on the device... */ | |
379 | static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap, | |
380 | struct i2c_msg msgs[], | |
381 | int num) | |
382 | { | |
383 | int ret = -ENOTSUPP; | |
a0fd1cb1 | 384 | pvr2_i2c_func funcp = NULL; |
d855497e MI |
385 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data); |
386 | ||
387 | if (!num) { | |
388 | ret = -EINVAL; | |
389 | goto done; | |
390 | } | |
d855497e MI |
391 | if (msgs[0].addr < PVR2_I2C_FUNC_CNT) { |
392 | funcp = hdw->i2c_func[msgs[0].addr]; | |
393 | } | |
394 | if (!funcp) { | |
395 | ret = -EIO; | |
396 | goto done; | |
397 | } | |
398 | ||
399 | if (num == 1) { | |
400 | if (msgs[0].flags & I2C_M_RD) { | |
401 | /* Simple read */ | |
402 | u16 tcnt,bcnt,offs; | |
403 | if (!msgs[0].len) { | |
404 | /* Length == 0 read. This is a probe. */ | |
a0fd1cb1 | 405 | if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) { |
d855497e MI |
406 | ret = -EIO; |
407 | goto done; | |
408 | } | |
409 | ret = 1; | |
410 | goto done; | |
411 | } | |
412 | /* If the read is short enough we'll do the whole | |
413 | thing atomically. Otherwise we have no choice | |
414 | but to break apart the reads. */ | |
415 | tcnt = msgs[0].len; | |
416 | offs = 0; | |
417 | while (tcnt) { | |
418 | bcnt = tcnt; | |
419 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | |
420 | bcnt = sizeof(hdw->cmd_buffer)-1; | |
421 | } | |
a0fd1cb1 | 422 | if (funcp(hdw,msgs[0].addr,NULL,0, |
d855497e MI |
423 | msgs[0].buf+offs,bcnt)) { |
424 | ret = -EIO; | |
425 | goto done; | |
426 | } | |
427 | offs += bcnt; | |
428 | tcnt -= bcnt; | |
429 | } | |
430 | ret = 1; | |
431 | goto done; | |
432 | } else { | |
433 | /* Simple write */ | |
434 | ret = 1; | |
435 | if (funcp(hdw,msgs[0].addr, | |
a0fd1cb1 | 436 | msgs[0].buf,msgs[0].len,NULL,0)) { |
d855497e MI |
437 | ret = -EIO; |
438 | } | |
439 | goto done; | |
440 | } | |
441 | } else if (num == 2) { | |
442 | if (msgs[0].addr != msgs[1].addr) { | |
443 | trace_i2c("i2c refusing 2 phase transfer with" | |
444 | " conflicting target addresses"); | |
445 | ret = -ENOTSUPP; | |
446 | goto done; | |
447 | } | |
448 | if ((!((msgs[0].flags & I2C_M_RD))) && | |
449 | (msgs[1].flags & I2C_M_RD)) { | |
450 | u16 tcnt,bcnt,wcnt,offs; | |
451 | /* Write followed by atomic read. If the read | |
452 | portion is short enough we'll do the whole thing | |
453 | atomically. Otherwise we have no choice but to | |
454 | break apart the reads. */ | |
455 | tcnt = msgs[1].len; | |
456 | wcnt = msgs[0].len; | |
457 | offs = 0; | |
458 | while (tcnt || wcnt) { | |
459 | bcnt = tcnt; | |
460 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | |
461 | bcnt = sizeof(hdw->cmd_buffer)-1; | |
462 | } | |
463 | if (funcp(hdw,msgs[0].addr, | |
464 | msgs[0].buf,wcnt, | |
465 | msgs[1].buf+offs,bcnt)) { | |
466 | ret = -EIO; | |
467 | goto done; | |
468 | } | |
469 | offs += bcnt; | |
470 | tcnt -= bcnt; | |
471 | wcnt = 0; | |
472 | } | |
473 | ret = 2; | |
474 | goto done; | |
475 | } else { | |
476 | trace_i2c("i2c refusing complex transfer" | |
477 | " read0=%d read1=%d", | |
478 | (msgs[0].flags & I2C_M_RD), | |
479 | (msgs[1].flags & I2C_M_RD)); | |
480 | } | |
481 | } else { | |
482 | trace_i2c("i2c refusing %d phase transfer",num); | |
483 | } | |
484 | ||
485 | done: | |
486 | if (pvrusb2_debug & PVR2_TRACE_I2C_TRAF) { | |
487 | unsigned int idx,offs,cnt; | |
488 | for (idx = 0; idx < num; idx++) { | |
489 | cnt = msgs[idx].len; | |
490 | printk(KERN_INFO | |
491 | "pvrusb2 i2c xfer %u/%u:" | |
7fb0dfc8 | 492 | " addr=0x%x len=%d %s", |
d855497e MI |
493 | idx+1,num, |
494 | msgs[idx].addr, | |
495 | cnt, | |
496 | (msgs[idx].flags & I2C_M_RD ? | |
7fb0dfc8 | 497 | "read" : "write")); |
d855497e MI |
498 | if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) { |
499 | if (cnt > 8) cnt = 8; | |
500 | printk(" ["); | |
501 | for (offs = 0; offs < (cnt>8?8:cnt); offs++) { | |
502 | if (offs) printk(" "); | |
503 | printk("%02x",msgs[idx].buf[offs]); | |
504 | } | |
505 | if (offs < cnt) printk(" ..."); | |
506 | printk("]"); | |
507 | } | |
508 | if (idx+1 == num) { | |
509 | printk(" result=%d",ret); | |
510 | } | |
511 | printk("\n"); | |
512 | } | |
513 | if (!num) { | |
514 | printk(KERN_INFO | |
515 | "pvrusb2 i2c xfer null transfer result=%d\n", | |
516 | ret); | |
517 | } | |
518 | } | |
519 | return ret; | |
520 | } | |
521 | ||
d855497e MI |
522 | static u32 pvr2_i2c_functionality(struct i2c_adapter *adap) |
523 | { | |
7fb0dfc8 | 524 | return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; |
d855497e MI |
525 | } |
526 | ||
527 | static int pvr2_i2c_core_singleton(struct i2c_client *cp, | |
528 | unsigned int cmd,void *arg) | |
529 | { | |
530 | int stat; | |
531 | if (!cp) return -EINVAL; | |
532 | if (!(cp->driver)) return -EINVAL; | |
533 | if (!(cp->driver->command)) return -EINVAL; | |
534 | if (!try_module_get(cp->driver->driver.owner)) return -EAGAIN; | |
535 | stat = cp->driver->command(cp,cmd,arg); | |
536 | module_put(cp->driver->driver.owner); | |
537 | return stat; | |
538 | } | |
539 | ||
540 | int pvr2_i2c_client_cmd(struct pvr2_i2c_client *cp,unsigned int cmd,void *arg) | |
541 | { | |
542 | int stat; | |
543 | if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) { | |
544 | char buf[100]; | |
545 | unsigned int cnt; | |
546 | cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG, | |
547 | buf,sizeof(buf)); | |
548 | pvr2_trace(PVR2_TRACE_I2C_CMD, | |
549 | "i2c COMMAND (code=%u 0x%x) to %.*s", | |
550 | cmd,cmd,cnt,buf); | |
551 | } | |
552 | stat = pvr2_i2c_core_singleton(cp->client,cmd,arg); | |
553 | if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) { | |
554 | char buf[100]; | |
555 | unsigned int cnt; | |
556 | cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG, | |
557 | buf,sizeof(buf)); | |
558 | pvr2_trace(PVR2_TRACE_I2C_CMD, | |
559 | "i2c COMMAND to %.*s (ret=%d)",cnt,buf,stat); | |
560 | } | |
561 | return stat; | |
562 | } | |
563 | ||
564 | int pvr2_i2c_core_cmd(struct pvr2_hdw *hdw,unsigned int cmd,void *arg) | |
565 | { | |
e77e2c2f | 566 | struct pvr2_i2c_client *cp, *ncp; |
d855497e MI |
567 | int stat = -EINVAL; |
568 | ||
569 | if (!hdw) return stat; | |
570 | ||
571 | mutex_lock(&hdw->i2c_list_lock); | |
e77e2c2f | 572 | list_for_each_entry_safe(cp, ncp, &hdw->i2c_clients, list) { |
d855497e MI |
573 | if (!cp->recv_enable) continue; |
574 | mutex_unlock(&hdw->i2c_list_lock); | |
575 | stat = pvr2_i2c_client_cmd(cp,cmd,arg); | |
576 | mutex_lock(&hdw->i2c_list_lock); | |
577 | } | |
578 | mutex_unlock(&hdw->i2c_list_lock); | |
579 | return stat; | |
580 | } | |
581 | ||
582 | ||
583 | static int handler_check(struct pvr2_i2c_client *cp) | |
584 | { | |
585 | struct pvr2_i2c_handler *hp = cp->handler; | |
586 | if (!hp) return 0; | |
587 | if (!hp->func_table->check) return 0; | |
588 | return hp->func_table->check(hp->func_data) != 0; | |
589 | } | |
590 | ||
591 | #define BUFSIZE 500 | |
592 | ||
18103c57 MI |
593 | |
594 | void pvr2_i2c_core_status_poll(struct pvr2_hdw *hdw) | |
595 | { | |
18103c57 MI |
596 | struct pvr2_i2c_client *cp; |
597 | mutex_lock(&hdw->i2c_list_lock); do { | |
598 | struct v4l2_tuner *vtp = &hdw->tuner_signal_info; | |
293b5d94 | 599 | memset(vtp,0,sizeof(*vtp)); |
e77e2c2f | 600 | list_for_each_entry(cp, &hdw->i2c_clients, list) { |
18103c57 MI |
601 | if (!cp->detected_flag) continue; |
602 | if (!cp->status_poll) continue; | |
603 | cp->status_poll(cp); | |
604 | } | |
605 | hdw->tuner_signal_stale = 0; | |
8433544e MI |
606 | pvr2_trace(PVR2_TRACE_CHIPS,"i2c status poll" |
607 | " type=%u strength=%u audio=0x%x cap=0x%x" | |
608 | " low=%u hi=%u", | |
609 | vtp->type, | |
610 | vtp->signal,vtp->rxsubchans,vtp->capability, | |
611 | vtp->rangelow,vtp->rangehigh); | |
18103c57 MI |
612 | } while (0); mutex_unlock(&hdw->i2c_list_lock); |
613 | } | |
614 | ||
615 | ||
616 | /* Issue various I2C operations to bring chip-level drivers into sync with | |
617 | state stored in this driver. */ | |
d855497e MI |
618 | void pvr2_i2c_core_sync(struct pvr2_hdw *hdw) |
619 | { | |
620 | unsigned long msk; | |
621 | unsigned int idx; | |
e77e2c2f | 622 | struct pvr2_i2c_client *cp, *ncp; |
d855497e MI |
623 | |
624 | if (!hdw->i2c_linked) return; | |
625 | if (!(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL)) { | |
626 | return; | |
627 | } | |
628 | mutex_lock(&hdw->i2c_list_lock); do { | |
629 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync BEGIN"); | |
630 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_DETECT) { | |
631 | /* One or more I2C clients have attached since we | |
632 | last synced. So scan the list and identify the | |
633 | new clients. */ | |
634 | char *buf; | |
635 | unsigned int cnt; | |
636 | unsigned long amask = 0; | |
637 | buf = kmalloc(BUFSIZE,GFP_KERNEL); | |
638 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_DETECT"); | |
639 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_DETECT; | |
e77e2c2f | 640 | list_for_each_entry(cp, &hdw->i2c_clients, list) { |
d855497e MI |
641 | if (!cp->detected_flag) { |
642 | cp->ctl_mask = 0; | |
643 | pvr2_i2c_probe(hdw,cp); | |
644 | cp->detected_flag = !0; | |
645 | msk = cp->ctl_mask; | |
646 | cnt = 0; | |
647 | if (buf) { | |
648 | cnt = pvr2_i2c_client_describe( | |
649 | cp, | |
650 | PVR2_I2C_DETAIL_ALL, | |
651 | buf,BUFSIZE); | |
652 | } | |
653 | trace_i2c("Probed: %.*s",cnt,buf); | |
654 | if (handler_check(cp)) { | |
655 | hdw->i2c_pend_types |= | |
656 | PVR2_I2C_PEND_CLIENT; | |
657 | } | |
658 | cp->pend_mask = msk; | |
659 | hdw->i2c_pend_mask |= msk; | |
660 | hdw->i2c_pend_types |= | |
661 | PVR2_I2C_PEND_REFRESH; | |
662 | } | |
663 | amask |= cp->ctl_mask; | |
664 | } | |
665 | hdw->i2c_active_mask = amask; | |
666 | if (buf) kfree(buf); | |
667 | } | |
668 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_STALE) { | |
669 | /* Need to do one or more global updates. Arrange | |
670 | for this to happen. */ | |
671 | unsigned long m2; | |
672 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
673 | "i2c: PEND_STALE (0x%lx)", | |
674 | hdw->i2c_stale_mask); | |
675 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_STALE; | |
e77e2c2f | 676 | list_for_each_entry(cp, &hdw->i2c_clients, list) { |
d855497e MI |
677 | m2 = hdw->i2c_stale_mask; |
678 | m2 &= cp->ctl_mask; | |
679 | m2 &= ~cp->pend_mask; | |
680 | if (m2) { | |
681 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
682 | "i2c: cp=%p setting 0x%lx", | |
683 | cp,m2); | |
684 | cp->pend_mask |= m2; | |
685 | } | |
686 | } | |
687 | hdw->i2c_pend_mask |= hdw->i2c_stale_mask; | |
688 | hdw->i2c_stale_mask = 0; | |
689 | hdw->i2c_pend_types |= PVR2_I2C_PEND_REFRESH; | |
690 | } | |
691 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_CLIENT) { | |
692 | /* One or more client handlers are asking for an | |
693 | update. Run through the list of known clients | |
694 | and update each one. */ | |
695 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_CLIENT"); | |
696 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_CLIENT; | |
e77e2c2f TP |
697 | list_for_each_entry_safe(cp, ncp, &hdw->i2c_clients, |
698 | list) { | |
d855497e MI |
699 | if (!cp->handler) continue; |
700 | if (!cp->handler->func_table->update) continue; | |
701 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
702 | "i2c: cp=%p update",cp); | |
703 | mutex_unlock(&hdw->i2c_list_lock); | |
704 | cp->handler->func_table->update( | |
705 | cp->handler->func_data); | |
706 | mutex_lock(&hdw->i2c_list_lock); | |
707 | /* If client's update function set some | |
708 | additional pending bits, account for that | |
709 | here. */ | |
710 | if (cp->pend_mask & ~hdw->i2c_pend_mask) { | |
711 | hdw->i2c_pend_mask |= cp->pend_mask; | |
712 | hdw->i2c_pend_types |= | |
713 | PVR2_I2C_PEND_REFRESH; | |
714 | } | |
715 | } | |
716 | } | |
717 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_REFRESH) { | |
718 | const struct pvr2_i2c_op *opf; | |
719 | unsigned long pm; | |
720 | /* Some actual updates are pending. Walk through | |
721 | each update type and perform it. */ | |
722 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_REFRESH" | |
723 | " (0x%lx)",hdw->i2c_pend_mask); | |
724 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_REFRESH; | |
725 | pm = hdw->i2c_pend_mask; | |
726 | hdw->i2c_pend_mask = 0; | |
727 | for (idx = 0, msk = 1; pm; idx++, msk <<= 1) { | |
728 | if (!(pm & msk)) continue; | |
729 | pm &= ~msk; | |
e77e2c2f TP |
730 | list_for_each_entry(cp, &hdw->i2c_clients, |
731 | list) { | |
d855497e MI |
732 | if (cp->pend_mask & msk) { |
733 | cp->pend_mask &= ~msk; | |
734 | cp->recv_enable = !0; | |
735 | } else { | |
736 | cp->recv_enable = 0; | |
737 | } | |
738 | } | |
739 | opf = pvr2_i2c_get_op(idx); | |
740 | if (!opf) continue; | |
741 | mutex_unlock(&hdw->i2c_list_lock); | |
742 | opf->update(hdw); | |
743 | mutex_lock(&hdw->i2c_list_lock); | |
744 | } | |
745 | } | |
746 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync END"); | |
747 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
748 | } | |
749 | ||
750 | int pvr2_i2c_core_check_stale(struct pvr2_hdw *hdw) | |
751 | { | |
752 | unsigned long msk,sm,pm; | |
753 | unsigned int idx; | |
754 | const struct pvr2_i2c_op *opf; | |
d855497e MI |
755 | struct pvr2_i2c_client *cp; |
756 | unsigned int pt = 0; | |
757 | ||
758 | pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale BEGIN"); | |
759 | ||
760 | pm = hdw->i2c_active_mask; | |
761 | sm = 0; | |
762 | for (idx = 0, msk = 1; pm; idx++, msk <<= 1) { | |
763 | if (!(msk & pm)) continue; | |
764 | pm &= ~msk; | |
765 | opf = pvr2_i2c_get_op(idx); | |
766 | if (!opf) continue; | |
767 | if (opf->check(hdw)) { | |
768 | sm |= msk; | |
769 | } | |
770 | } | |
771 | if (sm) pt |= PVR2_I2C_PEND_STALE; | |
772 | ||
e77e2c2f TP |
773 | list_for_each_entry(cp, &hdw->i2c_clients, list) |
774 | if (handler_check(cp)) | |
775 | pt |= PVR2_I2C_PEND_CLIENT; | |
d855497e MI |
776 | |
777 | if (pt) { | |
778 | mutex_lock(&hdw->i2c_list_lock); do { | |
779 | hdw->i2c_pend_types |= pt; | |
780 | hdw->i2c_stale_mask |= sm; | |
781 | hdw->i2c_pend_mask |= hdw->i2c_stale_mask; | |
782 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
783 | } | |
784 | ||
785 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
786 | "i2c: types=0x%x stale=0x%lx pend=0x%lx", | |
787 | hdw->i2c_pend_types, | |
788 | hdw->i2c_stale_mask, | |
789 | hdw->i2c_pend_mask); | |
790 | pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale END"); | |
791 | ||
792 | return (hdw->i2c_pend_types & PVR2_I2C_PEND_ALL) != 0; | |
793 | } | |
794 | ||
07e337ee AB |
795 | static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp, |
796 | unsigned int detail, | |
797 | char *buf,unsigned int maxlen) | |
d855497e MI |
798 | { |
799 | unsigned int ccnt,bcnt; | |
800 | int spcfl = 0; | |
801 | const struct pvr2_i2c_op *opf; | |
802 | ||
803 | ccnt = 0; | |
804 | if (detail & PVR2_I2C_DETAIL_DEBUG) { | |
805 | bcnt = scnprintf(buf,maxlen, | |
806 | "ctxt=%p ctl_mask=0x%lx", | |
807 | cp,cp->ctl_mask); | |
808 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
809 | spcfl = !0; | |
810 | } | |
811 | bcnt = scnprintf(buf,maxlen, | |
812 | "%s%s @ 0x%x", | |
813 | (spcfl ? " " : ""), | |
814 | cp->client->name, | |
815 | cp->client->addr); | |
816 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
817 | if ((detail & PVR2_I2C_DETAIL_HANDLER) && | |
818 | cp->handler && cp->handler->func_table->describe) { | |
819 | bcnt = scnprintf(buf,maxlen," ("); | |
820 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
821 | bcnt = cp->handler->func_table->describe( | |
822 | cp->handler->func_data,buf,maxlen); | |
823 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
824 | bcnt = scnprintf(buf,maxlen,")"); | |
825 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
826 | } | |
827 | if ((detail & PVR2_I2C_DETAIL_CTLMASK) && cp->ctl_mask) { | |
828 | unsigned int idx; | |
829 | unsigned long msk,sm; | |
830 | int spcfl; | |
831 | bcnt = scnprintf(buf,maxlen," ["); | |
832 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
833 | sm = 0; | |
834 | spcfl = 0; | |
835 | for (idx = 0, msk = 1; msk; idx++, msk <<= 1) { | |
836 | if (!(cp->ctl_mask & msk)) continue; | |
837 | opf = pvr2_i2c_get_op(idx); | |
838 | if (opf) { | |
839 | bcnt = scnprintf(buf,maxlen,"%s%s", | |
840 | spcfl ? " " : "", | |
841 | opf->name); | |
842 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
843 | spcfl = !0; | |
844 | } else { | |
845 | sm |= msk; | |
846 | } | |
847 | } | |
848 | if (sm) { | |
849 | bcnt = scnprintf(buf,maxlen,"%s%lx", | |
850 | idx != 0 ? " " : "",sm); | |
851 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
852 | } | |
853 | bcnt = scnprintf(buf,maxlen,"]"); | |
854 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
855 | } | |
856 | return ccnt; | |
857 | } | |
858 | ||
859 | unsigned int pvr2_i2c_report(struct pvr2_hdw *hdw, | |
860 | char *buf,unsigned int maxlen) | |
861 | { | |
862 | unsigned int ccnt,bcnt; | |
d855497e MI |
863 | struct pvr2_i2c_client *cp; |
864 | ccnt = 0; | |
865 | mutex_lock(&hdw->i2c_list_lock); do { | |
e77e2c2f | 866 | list_for_each_entry(cp, &hdw->i2c_clients, list) { |
d855497e MI |
867 | bcnt = pvr2_i2c_client_describe( |
868 | cp, | |
869 | (PVR2_I2C_DETAIL_HANDLER| | |
870 | PVR2_I2C_DETAIL_CTLMASK), | |
871 | buf,maxlen); | |
872 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
873 | bcnt = scnprintf(buf,maxlen,"\n"); | |
874 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
875 | } | |
876 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
877 | return ccnt; | |
878 | } | |
879 | ||
880 | static int pvr2_i2c_attach_inform(struct i2c_client *client) | |
881 | { | |
882 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data); | |
883 | struct pvr2_i2c_client *cp; | |
884 | int fl = !(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL); | |
ca545f7c | 885 | cp = kzalloc(sizeof(*cp),GFP_KERNEL); |
d855497e MI |
886 | trace_i2c("i2c_attach [client=%s @ 0x%x ctxt=%p]", |
887 | client->name, | |
888 | client->addr,cp); | |
889 | if (!cp) return -ENOMEM; | |
18103c57 | 890 | cp->hdw = hdw; |
d855497e MI |
891 | INIT_LIST_HEAD(&cp->list); |
892 | cp->client = client; | |
893 | mutex_lock(&hdw->i2c_list_lock); do { | |
432907f7 | 894 | hdw->cropcap_stale = !0; |
d855497e MI |
895 | list_add_tail(&cp->list,&hdw->i2c_clients); |
896 | hdw->i2c_pend_types |= PVR2_I2C_PEND_DETECT; | |
897 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
681c7399 | 898 | if (fl) queue_work(hdw->workqueue,&hdw->worki2csync); |
d855497e MI |
899 | return 0; |
900 | } | |
901 | ||
902 | static int pvr2_i2c_detach_inform(struct i2c_client *client) | |
903 | { | |
904 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data); | |
e77e2c2f | 905 | struct pvr2_i2c_client *cp, *ncp; |
d855497e MI |
906 | unsigned long amask = 0; |
907 | int foundfl = 0; | |
908 | mutex_lock(&hdw->i2c_list_lock); do { | |
432907f7 | 909 | hdw->cropcap_stale = !0; |
e77e2c2f | 910 | list_for_each_entry_safe(cp, ncp, &hdw->i2c_clients, list) { |
d855497e MI |
911 | if (cp->client == client) { |
912 | trace_i2c("pvr2_i2c_detach" | |
913 | " [client=%s @ 0x%x ctxt=%p]", | |
914 | client->name, | |
915 | client->addr,cp); | |
916 | if (cp->handler && | |
917 | cp->handler->func_table->detach) { | |
918 | cp->handler->func_table->detach( | |
919 | cp->handler->func_data); | |
920 | } | |
921 | list_del(&cp->list); | |
922 | kfree(cp); | |
923 | foundfl = !0; | |
924 | continue; | |
925 | } | |
926 | amask |= cp->ctl_mask; | |
927 | } | |
928 | hdw->i2c_active_mask = amask; | |
929 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
930 | if (!foundfl) { | |
931 | trace_i2c("pvr2_i2c_detach [client=%s @ 0x%x ctxt=<unknown>]", | |
932 | client->name, | |
933 | client->addr); | |
934 | } | |
935 | return 0; | |
936 | } | |
937 | ||
938 | static struct i2c_algorithm pvr2_i2c_algo_template = { | |
939 | .master_xfer = pvr2_i2c_xfer, | |
d855497e MI |
940 | .functionality = pvr2_i2c_functionality, |
941 | }; | |
942 | ||
943 | static struct i2c_adapter pvr2_i2c_adap_template = { | |
944 | .owner = THIS_MODULE, | |
945 | .class = I2C_CLASS_TV_ANALOG, | |
946 | .id = I2C_HW_B_BT848, | |
947 | .client_register = pvr2_i2c_attach_inform, | |
948 | .client_unregister = pvr2_i2c_detach_inform, | |
949 | }; | |
950 | ||
951 | static void do_i2c_scan(struct pvr2_hdw *hdw) | |
952 | { | |
953 | struct i2c_msg msg[1]; | |
954 | int i,rc; | |
955 | msg[0].addr = 0; | |
956 | msg[0].flags = I2C_M_RD; | |
957 | msg[0].len = 0; | |
a0fd1cb1 | 958 | msg[0].buf = NULL; |
d855497e MI |
959 | printk("%s: i2c scan beginning\n",hdw->name); |
960 | for (i = 0; i < 128; i++) { | |
961 | msg[0].addr = i; | |
eca8ebfc | 962 | rc = i2c_transfer(&hdw->i2c_adap,msg, ARRAY_SIZE(msg)); |
d855497e MI |
963 | if (rc != 1) continue; |
964 | printk("%s: i2c scan: found device @ 0x%x\n",hdw->name,i); | |
965 | } | |
966 | printk("%s: i2c scan done.\n",hdw->name); | |
967 | } | |
968 | ||
969 | void pvr2_i2c_core_init(struct pvr2_hdw *hdw) | |
970 | { | |
971 | unsigned int idx; | |
972 | ||
cc75aede MI |
973 | /* The default action for all possible I2C addresses is just to do |
974 | the transfer normally. */ | |
d855497e MI |
975 | for (idx = 0; idx < PVR2_I2C_FUNC_CNT; idx++) { |
976 | hdw->i2c_func[idx] = pvr2_i2c_basic_op; | |
977 | } | |
978 | ||
cc75aede | 979 | /* However, deal with various special cases for 24xxx hardware. */ |
5c808e64 MI |
980 | if (ir_mode[hdw->unit_number] == 0) { |
981 | printk(KERN_INFO "%s: IR disabled\n",hdw->name); | |
982 | hdw->i2c_func[0x18] = i2c_black_hole; | |
983 | } else if (ir_mode[hdw->unit_number] == 1) { | |
31335b13 MI |
984 | if (hdw->hdw_desc->ir_scheme == PVR2_IR_SCHEME_24XXX) { |
985 | /* This comment is present PURELY to get | |
986 | checkpatch.pl to STFU. Lovely, eh? */ | |
5c808e64 MI |
987 | hdw->i2c_func[0x18] = i2c_24xxx_ir; |
988 | } | |
989 | } | |
989eb154 | 990 | if (hdw->hdw_desc->flag_has_cx25840) { |
d855497e MI |
991 | hdw->i2c_func[0x44] = i2c_hack_cx25840; |
992 | } | |
989eb154 MI |
993 | if (hdw->hdw_desc->flag_has_wm8775) { |
994 | hdw->i2c_func[0x1b] = i2c_hack_wm8775; | |
995 | } | |
d855497e MI |
996 | |
997 | // Configure the adapter and set up everything else related to it. | |
998 | memcpy(&hdw->i2c_adap,&pvr2_i2c_adap_template,sizeof(hdw->i2c_adap)); | |
999 | memcpy(&hdw->i2c_algo,&pvr2_i2c_algo_template,sizeof(hdw->i2c_algo)); | |
1000 | strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name)); | |
12a917f6 | 1001 | hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev; |
d855497e MI |
1002 | hdw->i2c_adap.algo = &hdw->i2c_algo; |
1003 | hdw->i2c_adap.algo_data = hdw; | |
1004 | hdw->i2c_pend_mask = 0; | |
1005 | hdw->i2c_stale_mask = 0; | |
1006 | hdw->i2c_active_mask = 0; | |
1007 | INIT_LIST_HEAD(&hdw->i2c_clients); | |
1008 | mutex_init(&hdw->i2c_list_lock); | |
1009 | hdw->i2c_linked = !0; | |
1010 | i2c_add_adapter(&hdw->i2c_adap); | |
1011 | if (i2c_scan) do_i2c_scan(hdw); | |
1012 | } | |
1013 | ||
1014 | void pvr2_i2c_core_done(struct pvr2_hdw *hdw) | |
1015 | { | |
1016 | if (hdw->i2c_linked) { | |
1017 | i2c_del_adapter(&hdw->i2c_adap); | |
1018 | hdw->i2c_linked = 0; | |
1019 | } | |
1020 | } | |
1021 | ||
1022 | /* | |
1023 | Stuff for Emacs to see, in order to encourage consistent editing style: | |
1024 | *** Local Variables: *** | |
1025 | *** mode: c *** | |
1026 | *** fill-column: 75 *** | |
1027 | *** tab-width: 8 *** | |
1028 | *** c-basic-offset: 8 *** | |
1029 | *** End: *** | |
1030 | */ |