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Commit | Line | Data |
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d855497e MI |
1 | /* |
2 | * | |
3 | * $Id$ | |
4 | * | |
5 | * Copyright (C) 2005 Mike Isely <isely@pobox.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include "pvrusb2-i2c-core.h" | |
23 | #include "pvrusb2-hdw-internal.h" | |
24 | #include "pvrusb2-debug.h" | |
8d364363 | 25 | #include "pvrusb2-fx2-cmd.h" |
5c808e64 | 26 | #include "pvrusb2.h" |
d855497e MI |
27 | |
28 | #define trace_i2c(...) pvr2_trace(PVR2_TRACE_I2C,__VA_ARGS__) | |
29 | ||
30 | /* | |
31 | ||
32 | This module attempts to implement a compliant I2C adapter for the pvrusb2 | |
33 | device. By doing this we can then make use of existing functionality in | |
34 | V4L (e.g. tuner.c) rather than rolling our own. | |
35 | ||
36 | */ | |
37 | ||
38 | static unsigned int i2c_scan = 0; | |
39 | module_param(i2c_scan, int, S_IRUGO|S_IWUSR); | |
40 | MODULE_PARM_DESC(i2c_scan,"scan i2c bus at insmod time"); | |
41 | ||
5c808e64 MI |
42 | static int ir_mode[PVR_NUM] = { [0 ... PVR_NUM-1] = 1 }; |
43 | module_param_array(ir_mode, int, NULL, 0444); | |
44 | MODULE_PARM_DESC(ir_mode,"specify: 0=disable IR reception, 1=normal IR"); | |
45 | ||
07e337ee AB |
46 | static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp, |
47 | unsigned int detail, | |
48 | char *buf,unsigned int maxlen); | |
49 | ||
d855497e MI |
50 | static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */ |
51 | u8 i2c_addr, /* I2C address we're talking to */ | |
52 | u8 *data, /* Data to write */ | |
53 | u16 length) /* Size of data to write */ | |
54 | { | |
55 | /* Return value - default 0 means success */ | |
56 | int ret; | |
57 | ||
58 | ||
59 | if (!data) length = 0; | |
60 | if (length > (sizeof(hdw->cmd_buffer) - 3)) { | |
61 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
62 | "Killing an I2C write to %u that is too large" | |
63 | " (desired=%u limit=%u)", | |
64 | i2c_addr, | |
65 | length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3)); | |
66 | return -ENOTSUPP; | |
67 | } | |
68 | ||
69 | LOCK_TAKE(hdw->ctl_lock); | |
70 | ||
71 | /* Clear the command buffer (likely to be paranoia) */ | |
72 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | |
73 | ||
74 | /* Set up command buffer for an I2C write */ | |
8d364363 | 75 | hdw->cmd_buffer[0] = FX2CMD_I2C_WRITE; /* write prefix */ |
d855497e MI |
76 | hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */ |
77 | hdw->cmd_buffer[2] = length; /* length of what follows */ | |
78 | if (length) memcpy(hdw->cmd_buffer + 3, data, length); | |
79 | ||
80 | /* Do the operation */ | |
81 | ret = pvr2_send_request(hdw, | |
82 | hdw->cmd_buffer, | |
83 | length + 3, | |
84 | hdw->cmd_buffer, | |
85 | 1); | |
86 | if (!ret) { | |
87 | if (hdw->cmd_buffer[0] != 8) { | |
88 | ret = -EIO; | |
89 | if (hdw->cmd_buffer[0] != 7) { | |
90 | trace_i2c("unexpected status" | |
91 | " from i2_write[%d]: %d", | |
92 | i2c_addr,hdw->cmd_buffer[0]); | |
93 | } | |
94 | } | |
95 | } | |
96 | ||
97 | LOCK_GIVE(hdw->ctl_lock); | |
98 | ||
99 | return ret; | |
100 | } | |
101 | ||
102 | static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */ | |
103 | u8 i2c_addr, /* I2C address we're talking to */ | |
104 | u8 *data, /* Data to write */ | |
105 | u16 dlen, /* Size of data to write */ | |
106 | u8 *res, /* Where to put data we read */ | |
107 | u16 rlen) /* Amount of data to read */ | |
108 | { | |
109 | /* Return value - default 0 means success */ | |
110 | int ret; | |
111 | ||
112 | ||
113 | if (!data) dlen = 0; | |
114 | if (dlen > (sizeof(hdw->cmd_buffer) - 4)) { | |
115 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
116 | "Killing an I2C read to %u that has wlen too large" | |
117 | " (desired=%u limit=%u)", | |
118 | i2c_addr, | |
119 | dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4)); | |
120 | return -ENOTSUPP; | |
121 | } | |
122 | if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) { | |
123 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
124 | "Killing an I2C read to %u that has rlen too large" | |
125 | " (desired=%u limit=%u)", | |
126 | i2c_addr, | |
127 | rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1)); | |
128 | return -ENOTSUPP; | |
129 | } | |
130 | ||
131 | LOCK_TAKE(hdw->ctl_lock); | |
132 | ||
133 | /* Clear the command buffer (likely to be paranoia) */ | |
134 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | |
135 | ||
136 | /* Set up command buffer for an I2C write followed by a read */ | |
8d364363 | 137 | hdw->cmd_buffer[0] = FX2CMD_I2C_READ; /* read prefix */ |
d855497e MI |
138 | hdw->cmd_buffer[1] = dlen; /* arg length */ |
139 | hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one | |
140 | more byte (status). */ | |
141 | hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */ | |
142 | if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen); | |
143 | ||
144 | /* Do the operation */ | |
145 | ret = pvr2_send_request(hdw, | |
146 | hdw->cmd_buffer, | |
147 | 4 + dlen, | |
148 | hdw->cmd_buffer, | |
149 | rlen + 1); | |
150 | if (!ret) { | |
151 | if (hdw->cmd_buffer[0] != 8) { | |
152 | ret = -EIO; | |
153 | if (hdw->cmd_buffer[0] != 7) { | |
154 | trace_i2c("unexpected status" | |
155 | " from i2_read[%d]: %d", | |
156 | i2c_addr,hdw->cmd_buffer[0]); | |
157 | } | |
158 | } | |
159 | } | |
160 | ||
161 | /* Copy back the result */ | |
162 | if (res && rlen) { | |
163 | if (ret) { | |
164 | /* Error, just blank out the return buffer */ | |
165 | memset(res, 0, rlen); | |
166 | } else { | |
167 | memcpy(res, hdw->cmd_buffer + 1, rlen); | |
168 | } | |
169 | } | |
170 | ||
171 | LOCK_GIVE(hdw->ctl_lock); | |
172 | ||
173 | return ret; | |
174 | } | |
175 | ||
176 | /* This is the common low level entry point for doing I2C operations to the | |
177 | hardware. */ | |
07e337ee AB |
178 | static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw, |
179 | u8 i2c_addr, | |
180 | u8 *wdata, | |
181 | u16 wlen, | |
182 | u8 *rdata, | |
183 | u16 rlen) | |
d855497e MI |
184 | { |
185 | if (!rdata) rlen = 0; | |
186 | if (!wdata) wlen = 0; | |
187 | if (rlen || !wlen) { | |
188 | return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
189 | } else { | |
190 | return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen); | |
191 | } | |
192 | } | |
193 | ||
cc75aede MI |
194 | |
195 | /* This is a special entry point for cases of I2C transaction attempts to | |
196 | the IR receiver. The implementation here simulates the IR receiver by | |
197 | issuing a command to the FX2 firmware and using that response to return | |
198 | what the real I2C receiver would have returned. We use this for 24xxx | |
199 | devices, where the IR receiver chip has been removed and replaced with | |
200 | FX2 related logic. */ | |
201 | static int i2c_24xxx_ir(struct pvr2_hdw *hdw, | |
202 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
203 | { | |
204 | u8 dat[4]; | |
205 | unsigned int stat; | |
206 | ||
207 | if (!(rlen || wlen)) { | |
208 | /* This is a probe attempt. Just let it succeed. */ | |
209 | return 0; | |
210 | } | |
211 | ||
212 | /* We don't understand this kind of transaction */ | |
213 | if ((wlen != 0) || (rlen == 0)) return -EIO; | |
214 | ||
215 | if (rlen < 3) { | |
216 | /* Mike Isely <isely@pobox.com> Appears to be a probe | |
217 | attempt from lirc. Just fill in zeroes and return. If | |
218 | we try instead to do the full transaction here, then bad | |
219 | things seem to happen within the lirc driver module | |
220 | (version 0.8.0-7 sources from Debian, when run under | |
221 | vanilla 2.6.17.6 kernel) - and I don't have the patience | |
222 | to chase it down. */ | |
223 | if (rlen > 0) rdata[0] = 0; | |
224 | if (rlen > 1) rdata[1] = 0; | |
225 | return 0; | |
226 | } | |
227 | ||
228 | /* Issue a command to the FX2 to read the IR receiver. */ | |
229 | LOCK_TAKE(hdw->ctl_lock); do { | |
8d364363 | 230 | hdw->cmd_buffer[0] = FX2CMD_GET_IR_CODE; |
cc75aede MI |
231 | stat = pvr2_send_request(hdw, |
232 | hdw->cmd_buffer,1, | |
233 | hdw->cmd_buffer,4); | |
234 | dat[0] = hdw->cmd_buffer[0]; | |
235 | dat[1] = hdw->cmd_buffer[1]; | |
236 | dat[2] = hdw->cmd_buffer[2]; | |
237 | dat[3] = hdw->cmd_buffer[3]; | |
238 | } while (0); LOCK_GIVE(hdw->ctl_lock); | |
239 | ||
240 | /* Give up if that operation failed. */ | |
241 | if (stat != 0) return stat; | |
242 | ||
243 | /* Mangle the results into something that looks like the real IR | |
244 | receiver. */ | |
245 | rdata[2] = 0xc1; | |
246 | if (dat[0] != 1) { | |
247 | /* No code received. */ | |
248 | rdata[0] = 0; | |
249 | rdata[1] = 0; | |
250 | } else { | |
251 | u16 val; | |
252 | /* Mash the FX2 firmware-provided IR code into something | |
253 | that the normal i2c chip-level driver expects. */ | |
254 | val = dat[1]; | |
255 | val <<= 8; | |
256 | val |= dat[2]; | |
257 | val >>= 1; | |
258 | val &= ~0x0003; | |
259 | val |= 0x8000; | |
260 | rdata[0] = (val >> 8) & 0xffu; | |
261 | rdata[1] = val & 0xffu; | |
262 | } | |
263 | ||
264 | return 0; | |
265 | } | |
266 | ||
d855497e MI |
267 | /* This is a special entry point that is entered if an I2C operation is |
268 | attempted to a wm8775 chip on model 24xxx hardware. Autodetect of this | |
269 | part doesn't work, but we know it is really there. So let's look for | |
270 | the autodetect attempt and just return success if we see that. */ | |
271 | static int i2c_hack_wm8775(struct pvr2_hdw *hdw, | |
272 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
273 | { | |
274 | if (!(rlen || wlen)) { | |
275 | // This is a probe attempt. Just let it succeed. | |
276 | return 0; | |
277 | } | |
278 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
279 | } | |
280 | ||
5c808e64 MI |
281 | /* This is an entry point designed to always fail any attempt to perform a |
282 | transfer. We use this to cause certain I2C addresses to not be | |
283 | probed. */ | |
284 | static int i2c_black_hole(struct pvr2_hdw *hdw, | |
285 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
286 | { | |
287 | return -EIO; | |
288 | } | |
289 | ||
d855497e MI |
290 | /* This is a special entry point that is entered if an I2C operation is |
291 | attempted to a cx25840 chip on model 24xxx hardware. This chip can | |
292 | sometimes wedge itself. Worse still, when this happens msp3400 can | |
293 | falsely detect this part and then the system gets hosed up after msp3400 | |
294 | gets confused and dies. What we want to do here is try to keep msp3400 | |
295 | away and also try to notice if the chip is wedged and send a warning to | |
296 | the system log. */ | |
297 | static int i2c_hack_cx25840(struct pvr2_hdw *hdw, | |
298 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
299 | { | |
300 | int ret; | |
301 | unsigned int subaddr; | |
302 | u8 wbuf[2]; | |
303 | int state = hdw->i2c_cx25840_hack_state; | |
304 | ||
305 | if (!(rlen || wlen)) { | |
306 | // Probe attempt - always just succeed and don't bother the | |
307 | // hardware (this helps to make the state machine further | |
308 | // down somewhat easier). | |
309 | return 0; | |
310 | } | |
311 | ||
312 | if (state == 3) { | |
313 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
314 | } | |
315 | ||
316 | /* We're looking for the exact pattern where the revision register | |
317 | is being read. The cx25840 module will always look at the | |
318 | revision register first. Any other pattern of access therefore | |
319 | has to be a probe attempt from somebody else so we'll reject it. | |
320 | Normally we could just let each client just probe the part | |
321 | anyway, but when the cx25840 is wedged, msp3400 will get a false | |
322 | positive and that just screws things up... */ | |
323 | ||
324 | if (wlen == 0) { | |
325 | switch (state) { | |
326 | case 1: subaddr = 0x0100; break; | |
327 | case 2: subaddr = 0x0101; break; | |
328 | default: goto fail; | |
329 | } | |
330 | } else if (wlen == 2) { | |
331 | subaddr = (wdata[0] << 8) | wdata[1]; | |
332 | switch (subaddr) { | |
333 | case 0x0100: state = 1; break; | |
334 | case 0x0101: state = 2; break; | |
335 | default: goto fail; | |
336 | } | |
337 | } else { | |
338 | goto fail; | |
339 | } | |
340 | if (!rlen) goto success; | |
341 | state = 0; | |
342 | if (rlen != 1) goto fail; | |
343 | ||
344 | /* If we get to here then we have a legitimate read for one of the | |
345 | two revision bytes, so pass it through. */ | |
346 | wbuf[0] = subaddr >> 8; | |
347 | wbuf[1] = subaddr; | |
348 | ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen); | |
349 | ||
350 | if ((ret != 0) || (*rdata == 0x04) || (*rdata == 0x0a)) { | |
351 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
352 | "WARNING: Detected a wedged cx25840 chip;" | |
353 | " the device will not work."); | |
354 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
355 | "WARNING: Try power cycling the pvrusb2 device."); | |
356 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
357 | "WARNING: Disabling further access to the device" | |
358 | " to prevent other foul-ups."); | |
359 | // This blocks all further communication with the part. | |
a0fd1cb1 | 360 | hdw->i2c_func[0x44] = NULL; |
d855497e MI |
361 | pvr2_hdw_render_useless(hdw); |
362 | goto fail; | |
363 | } | |
364 | ||
365 | /* Success! */ | |
366 | pvr2_trace(PVR2_TRACE_CHIPS,"cx25840 appears to be OK."); | |
367 | state = 3; | |
368 | ||
369 | success: | |
370 | hdw->i2c_cx25840_hack_state = state; | |
371 | return 0; | |
372 | ||
373 | fail: | |
374 | hdw->i2c_cx25840_hack_state = state; | |
375 | return -EIO; | |
376 | } | |
377 | ||
d855497e MI |
378 | /* This is a very, very limited I2C adapter implementation. We can only |
379 | support what we actually know will work on the device... */ | |
380 | static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap, | |
381 | struct i2c_msg msgs[], | |
382 | int num) | |
383 | { | |
384 | int ret = -ENOTSUPP; | |
a0fd1cb1 | 385 | pvr2_i2c_func funcp = NULL; |
d855497e MI |
386 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data); |
387 | ||
388 | if (!num) { | |
389 | ret = -EINVAL; | |
390 | goto done; | |
391 | } | |
392 | if ((msgs[0].flags & I2C_M_NOSTART)) { | |
393 | trace_i2c("i2c refusing I2C_M_NOSTART"); | |
394 | goto done; | |
395 | } | |
396 | if (msgs[0].addr < PVR2_I2C_FUNC_CNT) { | |
397 | funcp = hdw->i2c_func[msgs[0].addr]; | |
398 | } | |
399 | if (!funcp) { | |
400 | ret = -EIO; | |
401 | goto done; | |
402 | } | |
403 | ||
404 | if (num == 1) { | |
405 | if (msgs[0].flags & I2C_M_RD) { | |
406 | /* Simple read */ | |
407 | u16 tcnt,bcnt,offs; | |
408 | if (!msgs[0].len) { | |
409 | /* Length == 0 read. This is a probe. */ | |
a0fd1cb1 | 410 | if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) { |
d855497e MI |
411 | ret = -EIO; |
412 | goto done; | |
413 | } | |
414 | ret = 1; | |
415 | goto done; | |
416 | } | |
417 | /* If the read is short enough we'll do the whole | |
418 | thing atomically. Otherwise we have no choice | |
419 | but to break apart the reads. */ | |
420 | tcnt = msgs[0].len; | |
421 | offs = 0; | |
422 | while (tcnt) { | |
423 | bcnt = tcnt; | |
424 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | |
425 | bcnt = sizeof(hdw->cmd_buffer)-1; | |
426 | } | |
a0fd1cb1 | 427 | if (funcp(hdw,msgs[0].addr,NULL,0, |
d855497e MI |
428 | msgs[0].buf+offs,bcnt)) { |
429 | ret = -EIO; | |
430 | goto done; | |
431 | } | |
432 | offs += bcnt; | |
433 | tcnt -= bcnt; | |
434 | } | |
435 | ret = 1; | |
436 | goto done; | |
437 | } else { | |
438 | /* Simple write */ | |
439 | ret = 1; | |
440 | if (funcp(hdw,msgs[0].addr, | |
a0fd1cb1 | 441 | msgs[0].buf,msgs[0].len,NULL,0)) { |
d855497e MI |
442 | ret = -EIO; |
443 | } | |
444 | goto done; | |
445 | } | |
446 | } else if (num == 2) { | |
447 | if (msgs[0].addr != msgs[1].addr) { | |
448 | trace_i2c("i2c refusing 2 phase transfer with" | |
449 | " conflicting target addresses"); | |
450 | ret = -ENOTSUPP; | |
451 | goto done; | |
452 | } | |
453 | if ((!((msgs[0].flags & I2C_M_RD))) && | |
454 | (msgs[1].flags & I2C_M_RD)) { | |
455 | u16 tcnt,bcnt,wcnt,offs; | |
456 | /* Write followed by atomic read. If the read | |
457 | portion is short enough we'll do the whole thing | |
458 | atomically. Otherwise we have no choice but to | |
459 | break apart the reads. */ | |
460 | tcnt = msgs[1].len; | |
461 | wcnt = msgs[0].len; | |
462 | offs = 0; | |
463 | while (tcnt || wcnt) { | |
464 | bcnt = tcnt; | |
465 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | |
466 | bcnt = sizeof(hdw->cmd_buffer)-1; | |
467 | } | |
468 | if (funcp(hdw,msgs[0].addr, | |
469 | msgs[0].buf,wcnt, | |
470 | msgs[1].buf+offs,bcnt)) { | |
471 | ret = -EIO; | |
472 | goto done; | |
473 | } | |
474 | offs += bcnt; | |
475 | tcnt -= bcnt; | |
476 | wcnt = 0; | |
477 | } | |
478 | ret = 2; | |
479 | goto done; | |
480 | } else { | |
481 | trace_i2c("i2c refusing complex transfer" | |
482 | " read0=%d read1=%d", | |
483 | (msgs[0].flags & I2C_M_RD), | |
484 | (msgs[1].flags & I2C_M_RD)); | |
485 | } | |
486 | } else { | |
487 | trace_i2c("i2c refusing %d phase transfer",num); | |
488 | } | |
489 | ||
490 | done: | |
491 | if (pvrusb2_debug & PVR2_TRACE_I2C_TRAF) { | |
492 | unsigned int idx,offs,cnt; | |
493 | for (idx = 0; idx < num; idx++) { | |
494 | cnt = msgs[idx].len; | |
495 | printk(KERN_INFO | |
496 | "pvrusb2 i2c xfer %u/%u:" | |
497 | " addr=0x%x len=%d %s%s", | |
498 | idx+1,num, | |
499 | msgs[idx].addr, | |
500 | cnt, | |
501 | (msgs[idx].flags & I2C_M_RD ? | |
502 | "read" : "write"), | |
503 | (msgs[idx].flags & I2C_M_NOSTART ? | |
504 | " nostart" : "")); | |
505 | if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) { | |
506 | if (cnt > 8) cnt = 8; | |
507 | printk(" ["); | |
508 | for (offs = 0; offs < (cnt>8?8:cnt); offs++) { | |
509 | if (offs) printk(" "); | |
510 | printk("%02x",msgs[idx].buf[offs]); | |
511 | } | |
512 | if (offs < cnt) printk(" ..."); | |
513 | printk("]"); | |
514 | } | |
515 | if (idx+1 == num) { | |
516 | printk(" result=%d",ret); | |
517 | } | |
518 | printk("\n"); | |
519 | } | |
520 | if (!num) { | |
521 | printk(KERN_INFO | |
522 | "pvrusb2 i2c xfer null transfer result=%d\n", | |
523 | ret); | |
524 | } | |
525 | } | |
526 | return ret; | |
527 | } | |
528 | ||
529 | static int pvr2_i2c_control(struct i2c_adapter *adapter, | |
530 | unsigned int cmd, unsigned long arg) | |
531 | { | |
532 | return 0; | |
533 | } | |
534 | ||
535 | static u32 pvr2_i2c_functionality(struct i2c_adapter *adap) | |
536 | { | |
537 | return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE_DATA; | |
538 | } | |
539 | ||
540 | static int pvr2_i2c_core_singleton(struct i2c_client *cp, | |
541 | unsigned int cmd,void *arg) | |
542 | { | |
543 | int stat; | |
544 | if (!cp) return -EINVAL; | |
545 | if (!(cp->driver)) return -EINVAL; | |
546 | if (!(cp->driver->command)) return -EINVAL; | |
547 | if (!try_module_get(cp->driver->driver.owner)) return -EAGAIN; | |
548 | stat = cp->driver->command(cp,cmd,arg); | |
549 | module_put(cp->driver->driver.owner); | |
550 | return stat; | |
551 | } | |
552 | ||
553 | int pvr2_i2c_client_cmd(struct pvr2_i2c_client *cp,unsigned int cmd,void *arg) | |
554 | { | |
555 | int stat; | |
556 | if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) { | |
557 | char buf[100]; | |
558 | unsigned int cnt; | |
559 | cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG, | |
560 | buf,sizeof(buf)); | |
561 | pvr2_trace(PVR2_TRACE_I2C_CMD, | |
562 | "i2c COMMAND (code=%u 0x%x) to %.*s", | |
563 | cmd,cmd,cnt,buf); | |
564 | } | |
565 | stat = pvr2_i2c_core_singleton(cp->client,cmd,arg); | |
566 | if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) { | |
567 | char buf[100]; | |
568 | unsigned int cnt; | |
569 | cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG, | |
570 | buf,sizeof(buf)); | |
571 | pvr2_trace(PVR2_TRACE_I2C_CMD, | |
572 | "i2c COMMAND to %.*s (ret=%d)",cnt,buf,stat); | |
573 | } | |
574 | return stat; | |
575 | } | |
576 | ||
577 | int pvr2_i2c_core_cmd(struct pvr2_hdw *hdw,unsigned int cmd,void *arg) | |
578 | { | |
579 | struct list_head *item,*nc; | |
580 | struct pvr2_i2c_client *cp; | |
581 | int stat = -EINVAL; | |
582 | ||
583 | if (!hdw) return stat; | |
584 | ||
585 | mutex_lock(&hdw->i2c_list_lock); | |
586 | list_for_each_safe(item,nc,&hdw->i2c_clients) { | |
587 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
588 | if (!cp->recv_enable) continue; | |
589 | mutex_unlock(&hdw->i2c_list_lock); | |
590 | stat = pvr2_i2c_client_cmd(cp,cmd,arg); | |
591 | mutex_lock(&hdw->i2c_list_lock); | |
592 | } | |
593 | mutex_unlock(&hdw->i2c_list_lock); | |
594 | return stat; | |
595 | } | |
596 | ||
597 | ||
598 | static int handler_check(struct pvr2_i2c_client *cp) | |
599 | { | |
600 | struct pvr2_i2c_handler *hp = cp->handler; | |
601 | if (!hp) return 0; | |
602 | if (!hp->func_table->check) return 0; | |
603 | return hp->func_table->check(hp->func_data) != 0; | |
604 | } | |
605 | ||
606 | #define BUFSIZE 500 | |
607 | ||
18103c57 MI |
608 | |
609 | void pvr2_i2c_core_status_poll(struct pvr2_hdw *hdw) | |
610 | { | |
611 | struct list_head *item; | |
612 | struct pvr2_i2c_client *cp; | |
613 | mutex_lock(&hdw->i2c_list_lock); do { | |
614 | struct v4l2_tuner *vtp = &hdw->tuner_signal_info; | |
293b5d94 | 615 | memset(vtp,0,sizeof(*vtp)); |
18103c57 MI |
616 | list_for_each(item,&hdw->i2c_clients) { |
617 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
618 | if (!cp->detected_flag) continue; | |
619 | if (!cp->status_poll) continue; | |
620 | cp->status_poll(cp); | |
621 | } | |
622 | hdw->tuner_signal_stale = 0; | |
8433544e MI |
623 | pvr2_trace(PVR2_TRACE_CHIPS,"i2c status poll" |
624 | " type=%u strength=%u audio=0x%x cap=0x%x" | |
625 | " low=%u hi=%u", | |
626 | vtp->type, | |
627 | vtp->signal,vtp->rxsubchans,vtp->capability, | |
628 | vtp->rangelow,vtp->rangehigh); | |
18103c57 MI |
629 | } while (0); mutex_unlock(&hdw->i2c_list_lock); |
630 | } | |
631 | ||
632 | ||
633 | /* Issue various I2C operations to bring chip-level drivers into sync with | |
634 | state stored in this driver. */ | |
d855497e MI |
635 | void pvr2_i2c_core_sync(struct pvr2_hdw *hdw) |
636 | { | |
637 | unsigned long msk; | |
638 | unsigned int idx; | |
639 | struct list_head *item,*nc; | |
640 | struct pvr2_i2c_client *cp; | |
641 | ||
642 | if (!hdw->i2c_linked) return; | |
643 | if (!(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL)) { | |
644 | return; | |
645 | } | |
646 | mutex_lock(&hdw->i2c_list_lock); do { | |
647 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync BEGIN"); | |
648 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_DETECT) { | |
649 | /* One or more I2C clients have attached since we | |
650 | last synced. So scan the list and identify the | |
651 | new clients. */ | |
652 | char *buf; | |
653 | unsigned int cnt; | |
654 | unsigned long amask = 0; | |
655 | buf = kmalloc(BUFSIZE,GFP_KERNEL); | |
656 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_DETECT"); | |
657 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_DETECT; | |
658 | list_for_each(item,&hdw->i2c_clients) { | |
659 | cp = list_entry(item,struct pvr2_i2c_client, | |
660 | list); | |
661 | if (!cp->detected_flag) { | |
662 | cp->ctl_mask = 0; | |
663 | pvr2_i2c_probe(hdw,cp); | |
664 | cp->detected_flag = !0; | |
665 | msk = cp->ctl_mask; | |
666 | cnt = 0; | |
667 | if (buf) { | |
668 | cnt = pvr2_i2c_client_describe( | |
669 | cp, | |
670 | PVR2_I2C_DETAIL_ALL, | |
671 | buf,BUFSIZE); | |
672 | } | |
673 | trace_i2c("Probed: %.*s",cnt,buf); | |
674 | if (handler_check(cp)) { | |
675 | hdw->i2c_pend_types |= | |
676 | PVR2_I2C_PEND_CLIENT; | |
677 | } | |
678 | cp->pend_mask = msk; | |
679 | hdw->i2c_pend_mask |= msk; | |
680 | hdw->i2c_pend_types |= | |
681 | PVR2_I2C_PEND_REFRESH; | |
682 | } | |
683 | amask |= cp->ctl_mask; | |
684 | } | |
685 | hdw->i2c_active_mask = amask; | |
686 | if (buf) kfree(buf); | |
687 | } | |
688 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_STALE) { | |
689 | /* Need to do one or more global updates. Arrange | |
690 | for this to happen. */ | |
691 | unsigned long m2; | |
692 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
693 | "i2c: PEND_STALE (0x%lx)", | |
694 | hdw->i2c_stale_mask); | |
695 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_STALE; | |
696 | list_for_each(item,&hdw->i2c_clients) { | |
697 | cp = list_entry(item,struct pvr2_i2c_client, | |
698 | list); | |
699 | m2 = hdw->i2c_stale_mask; | |
700 | m2 &= cp->ctl_mask; | |
701 | m2 &= ~cp->pend_mask; | |
702 | if (m2) { | |
703 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
704 | "i2c: cp=%p setting 0x%lx", | |
705 | cp,m2); | |
706 | cp->pend_mask |= m2; | |
707 | } | |
708 | } | |
709 | hdw->i2c_pend_mask |= hdw->i2c_stale_mask; | |
710 | hdw->i2c_stale_mask = 0; | |
711 | hdw->i2c_pend_types |= PVR2_I2C_PEND_REFRESH; | |
712 | } | |
713 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_CLIENT) { | |
714 | /* One or more client handlers are asking for an | |
715 | update. Run through the list of known clients | |
716 | and update each one. */ | |
717 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_CLIENT"); | |
718 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_CLIENT; | |
719 | list_for_each_safe(item,nc,&hdw->i2c_clients) { | |
720 | cp = list_entry(item,struct pvr2_i2c_client, | |
721 | list); | |
722 | if (!cp->handler) continue; | |
723 | if (!cp->handler->func_table->update) continue; | |
724 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
725 | "i2c: cp=%p update",cp); | |
726 | mutex_unlock(&hdw->i2c_list_lock); | |
727 | cp->handler->func_table->update( | |
728 | cp->handler->func_data); | |
729 | mutex_lock(&hdw->i2c_list_lock); | |
730 | /* If client's update function set some | |
731 | additional pending bits, account for that | |
732 | here. */ | |
733 | if (cp->pend_mask & ~hdw->i2c_pend_mask) { | |
734 | hdw->i2c_pend_mask |= cp->pend_mask; | |
735 | hdw->i2c_pend_types |= | |
736 | PVR2_I2C_PEND_REFRESH; | |
737 | } | |
738 | } | |
739 | } | |
740 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_REFRESH) { | |
741 | const struct pvr2_i2c_op *opf; | |
742 | unsigned long pm; | |
743 | /* Some actual updates are pending. Walk through | |
744 | each update type and perform it. */ | |
745 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_REFRESH" | |
746 | " (0x%lx)",hdw->i2c_pend_mask); | |
747 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_REFRESH; | |
748 | pm = hdw->i2c_pend_mask; | |
749 | hdw->i2c_pend_mask = 0; | |
750 | for (idx = 0, msk = 1; pm; idx++, msk <<= 1) { | |
751 | if (!(pm & msk)) continue; | |
752 | pm &= ~msk; | |
753 | list_for_each(item,&hdw->i2c_clients) { | |
754 | cp = list_entry(item, | |
755 | struct pvr2_i2c_client, | |
756 | list); | |
757 | if (cp->pend_mask & msk) { | |
758 | cp->pend_mask &= ~msk; | |
759 | cp->recv_enable = !0; | |
760 | } else { | |
761 | cp->recv_enable = 0; | |
762 | } | |
763 | } | |
764 | opf = pvr2_i2c_get_op(idx); | |
765 | if (!opf) continue; | |
766 | mutex_unlock(&hdw->i2c_list_lock); | |
767 | opf->update(hdw); | |
768 | mutex_lock(&hdw->i2c_list_lock); | |
769 | } | |
770 | } | |
771 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync END"); | |
772 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
773 | } | |
774 | ||
775 | int pvr2_i2c_core_check_stale(struct pvr2_hdw *hdw) | |
776 | { | |
777 | unsigned long msk,sm,pm; | |
778 | unsigned int idx; | |
779 | const struct pvr2_i2c_op *opf; | |
780 | struct list_head *item; | |
781 | struct pvr2_i2c_client *cp; | |
782 | unsigned int pt = 0; | |
783 | ||
784 | pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale BEGIN"); | |
785 | ||
786 | pm = hdw->i2c_active_mask; | |
787 | sm = 0; | |
788 | for (idx = 0, msk = 1; pm; idx++, msk <<= 1) { | |
789 | if (!(msk & pm)) continue; | |
790 | pm &= ~msk; | |
791 | opf = pvr2_i2c_get_op(idx); | |
792 | if (!opf) continue; | |
793 | if (opf->check(hdw)) { | |
794 | sm |= msk; | |
795 | } | |
796 | } | |
797 | if (sm) pt |= PVR2_I2C_PEND_STALE; | |
798 | ||
799 | list_for_each(item,&hdw->i2c_clients) { | |
800 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
801 | if (!handler_check(cp)) continue; | |
802 | pt |= PVR2_I2C_PEND_CLIENT; | |
803 | } | |
804 | ||
805 | if (pt) { | |
806 | mutex_lock(&hdw->i2c_list_lock); do { | |
807 | hdw->i2c_pend_types |= pt; | |
808 | hdw->i2c_stale_mask |= sm; | |
809 | hdw->i2c_pend_mask |= hdw->i2c_stale_mask; | |
810 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
811 | } | |
812 | ||
813 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
814 | "i2c: types=0x%x stale=0x%lx pend=0x%lx", | |
815 | hdw->i2c_pend_types, | |
816 | hdw->i2c_stale_mask, | |
817 | hdw->i2c_pend_mask); | |
818 | pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale END"); | |
819 | ||
820 | return (hdw->i2c_pend_types & PVR2_I2C_PEND_ALL) != 0; | |
821 | } | |
822 | ||
07e337ee AB |
823 | static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp, |
824 | unsigned int detail, | |
825 | char *buf,unsigned int maxlen) | |
d855497e MI |
826 | { |
827 | unsigned int ccnt,bcnt; | |
828 | int spcfl = 0; | |
829 | const struct pvr2_i2c_op *opf; | |
830 | ||
831 | ccnt = 0; | |
832 | if (detail & PVR2_I2C_DETAIL_DEBUG) { | |
833 | bcnt = scnprintf(buf,maxlen, | |
834 | "ctxt=%p ctl_mask=0x%lx", | |
835 | cp,cp->ctl_mask); | |
836 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
837 | spcfl = !0; | |
838 | } | |
839 | bcnt = scnprintf(buf,maxlen, | |
840 | "%s%s @ 0x%x", | |
841 | (spcfl ? " " : ""), | |
842 | cp->client->name, | |
843 | cp->client->addr); | |
844 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
845 | if ((detail & PVR2_I2C_DETAIL_HANDLER) && | |
846 | cp->handler && cp->handler->func_table->describe) { | |
847 | bcnt = scnprintf(buf,maxlen," ("); | |
848 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
849 | bcnt = cp->handler->func_table->describe( | |
850 | cp->handler->func_data,buf,maxlen); | |
851 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
852 | bcnt = scnprintf(buf,maxlen,")"); | |
853 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
854 | } | |
855 | if ((detail & PVR2_I2C_DETAIL_CTLMASK) && cp->ctl_mask) { | |
856 | unsigned int idx; | |
857 | unsigned long msk,sm; | |
858 | int spcfl; | |
859 | bcnt = scnprintf(buf,maxlen," ["); | |
860 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
861 | sm = 0; | |
862 | spcfl = 0; | |
863 | for (idx = 0, msk = 1; msk; idx++, msk <<= 1) { | |
864 | if (!(cp->ctl_mask & msk)) continue; | |
865 | opf = pvr2_i2c_get_op(idx); | |
866 | if (opf) { | |
867 | bcnt = scnprintf(buf,maxlen,"%s%s", | |
868 | spcfl ? " " : "", | |
869 | opf->name); | |
870 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
871 | spcfl = !0; | |
872 | } else { | |
873 | sm |= msk; | |
874 | } | |
875 | } | |
876 | if (sm) { | |
877 | bcnt = scnprintf(buf,maxlen,"%s%lx", | |
878 | idx != 0 ? " " : "",sm); | |
879 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
880 | } | |
881 | bcnt = scnprintf(buf,maxlen,"]"); | |
882 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
883 | } | |
884 | return ccnt; | |
885 | } | |
886 | ||
887 | unsigned int pvr2_i2c_report(struct pvr2_hdw *hdw, | |
888 | char *buf,unsigned int maxlen) | |
889 | { | |
890 | unsigned int ccnt,bcnt; | |
891 | struct list_head *item; | |
892 | struct pvr2_i2c_client *cp; | |
893 | ccnt = 0; | |
894 | mutex_lock(&hdw->i2c_list_lock); do { | |
895 | list_for_each(item,&hdw->i2c_clients) { | |
896 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
897 | bcnt = pvr2_i2c_client_describe( | |
898 | cp, | |
899 | (PVR2_I2C_DETAIL_HANDLER| | |
900 | PVR2_I2C_DETAIL_CTLMASK), | |
901 | buf,maxlen); | |
902 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
903 | bcnt = scnprintf(buf,maxlen,"\n"); | |
904 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
905 | } | |
906 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
907 | return ccnt; | |
908 | } | |
909 | ||
910 | static int pvr2_i2c_attach_inform(struct i2c_client *client) | |
911 | { | |
912 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data); | |
913 | struct pvr2_i2c_client *cp; | |
914 | int fl = !(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL); | |
ca545f7c | 915 | cp = kzalloc(sizeof(*cp),GFP_KERNEL); |
d855497e MI |
916 | trace_i2c("i2c_attach [client=%s @ 0x%x ctxt=%p]", |
917 | client->name, | |
918 | client->addr,cp); | |
919 | if (!cp) return -ENOMEM; | |
18103c57 | 920 | cp->hdw = hdw; |
d855497e MI |
921 | INIT_LIST_HEAD(&cp->list); |
922 | cp->client = client; | |
923 | mutex_lock(&hdw->i2c_list_lock); do { | |
924 | list_add_tail(&cp->list,&hdw->i2c_clients); | |
925 | hdw->i2c_pend_types |= PVR2_I2C_PEND_DETECT; | |
926 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
927 | if (fl) pvr2_hdw_poll_trigger_unlocked(hdw); | |
928 | return 0; | |
929 | } | |
930 | ||
931 | static int pvr2_i2c_detach_inform(struct i2c_client *client) | |
932 | { | |
933 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data); | |
934 | struct pvr2_i2c_client *cp; | |
935 | struct list_head *item,*nc; | |
936 | unsigned long amask = 0; | |
937 | int foundfl = 0; | |
938 | mutex_lock(&hdw->i2c_list_lock); do { | |
939 | list_for_each_safe(item,nc,&hdw->i2c_clients) { | |
940 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
941 | if (cp->client == client) { | |
942 | trace_i2c("pvr2_i2c_detach" | |
943 | " [client=%s @ 0x%x ctxt=%p]", | |
944 | client->name, | |
945 | client->addr,cp); | |
946 | if (cp->handler && | |
947 | cp->handler->func_table->detach) { | |
948 | cp->handler->func_table->detach( | |
949 | cp->handler->func_data); | |
950 | } | |
951 | list_del(&cp->list); | |
952 | kfree(cp); | |
953 | foundfl = !0; | |
954 | continue; | |
955 | } | |
956 | amask |= cp->ctl_mask; | |
957 | } | |
958 | hdw->i2c_active_mask = amask; | |
959 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
960 | if (!foundfl) { | |
961 | trace_i2c("pvr2_i2c_detach [client=%s @ 0x%x ctxt=<unknown>]", | |
962 | client->name, | |
963 | client->addr); | |
964 | } | |
965 | return 0; | |
966 | } | |
967 | ||
968 | static struct i2c_algorithm pvr2_i2c_algo_template = { | |
969 | .master_xfer = pvr2_i2c_xfer, | |
970 | .algo_control = pvr2_i2c_control, | |
971 | .functionality = pvr2_i2c_functionality, | |
972 | }; | |
973 | ||
974 | static struct i2c_adapter pvr2_i2c_adap_template = { | |
975 | .owner = THIS_MODULE, | |
976 | .class = I2C_CLASS_TV_ANALOG, | |
977 | .id = I2C_HW_B_BT848, | |
978 | .client_register = pvr2_i2c_attach_inform, | |
979 | .client_unregister = pvr2_i2c_detach_inform, | |
980 | }; | |
981 | ||
982 | static void do_i2c_scan(struct pvr2_hdw *hdw) | |
983 | { | |
984 | struct i2c_msg msg[1]; | |
985 | int i,rc; | |
986 | msg[0].addr = 0; | |
987 | msg[0].flags = I2C_M_RD; | |
988 | msg[0].len = 0; | |
a0fd1cb1 | 989 | msg[0].buf = NULL; |
d855497e MI |
990 | printk("%s: i2c scan beginning\n",hdw->name); |
991 | for (i = 0; i < 128; i++) { | |
992 | msg[0].addr = i; | |
eca8ebfc | 993 | rc = i2c_transfer(&hdw->i2c_adap,msg, ARRAY_SIZE(msg)); |
d855497e MI |
994 | if (rc != 1) continue; |
995 | printk("%s: i2c scan: found device @ 0x%x\n",hdw->name,i); | |
996 | } | |
997 | printk("%s: i2c scan done.\n",hdw->name); | |
998 | } | |
999 | ||
1000 | void pvr2_i2c_core_init(struct pvr2_hdw *hdw) | |
1001 | { | |
1002 | unsigned int idx; | |
1003 | ||
cc75aede MI |
1004 | /* The default action for all possible I2C addresses is just to do |
1005 | the transfer normally. */ | |
d855497e MI |
1006 | for (idx = 0; idx < PVR2_I2C_FUNC_CNT; idx++) { |
1007 | hdw->i2c_func[idx] = pvr2_i2c_basic_op; | |
1008 | } | |
1009 | ||
cc75aede | 1010 | /* However, deal with various special cases for 24xxx hardware. */ |
5c808e64 MI |
1011 | if (ir_mode[hdw->unit_number] == 0) { |
1012 | printk(KERN_INFO "%s: IR disabled\n",hdw->name); | |
1013 | hdw->i2c_func[0x18] = i2c_black_hole; | |
1014 | } else if (ir_mode[hdw->unit_number] == 1) { | |
1015 | if (hdw->hdw_type == PVR2_HDW_TYPE_24XXX) { | |
1016 | hdw->i2c_func[0x18] = i2c_24xxx_ir; | |
1017 | } | |
1018 | } | |
d855497e MI |
1019 | if (hdw->hdw_type == PVR2_HDW_TYPE_24XXX) { |
1020 | hdw->i2c_func[0x1b] = i2c_hack_wm8775; | |
1021 | hdw->i2c_func[0x44] = i2c_hack_cx25840; | |
1022 | } | |
d855497e MI |
1023 | |
1024 | // Configure the adapter and set up everything else related to it. | |
1025 | memcpy(&hdw->i2c_adap,&pvr2_i2c_adap_template,sizeof(hdw->i2c_adap)); | |
1026 | memcpy(&hdw->i2c_algo,&pvr2_i2c_algo_template,sizeof(hdw->i2c_algo)); | |
1027 | strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name)); | |
12a917f6 | 1028 | hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev; |
d855497e MI |
1029 | hdw->i2c_adap.algo = &hdw->i2c_algo; |
1030 | hdw->i2c_adap.algo_data = hdw; | |
1031 | hdw->i2c_pend_mask = 0; | |
1032 | hdw->i2c_stale_mask = 0; | |
1033 | hdw->i2c_active_mask = 0; | |
1034 | INIT_LIST_HEAD(&hdw->i2c_clients); | |
1035 | mutex_init(&hdw->i2c_list_lock); | |
1036 | hdw->i2c_linked = !0; | |
1037 | i2c_add_adapter(&hdw->i2c_adap); | |
1038 | if (i2c_scan) do_i2c_scan(hdw); | |
1039 | } | |
1040 | ||
1041 | void pvr2_i2c_core_done(struct pvr2_hdw *hdw) | |
1042 | { | |
1043 | if (hdw->i2c_linked) { | |
1044 | i2c_del_adapter(&hdw->i2c_adap); | |
1045 | hdw->i2c_linked = 0; | |
1046 | } | |
1047 | } | |
1048 | ||
1049 | /* | |
1050 | Stuff for Emacs to see, in order to encourage consistent editing style: | |
1051 | *** Local Variables: *** | |
1052 | *** mode: c *** | |
1053 | *** fill-column: 75 *** | |
1054 | *** tab-width: 8 *** | |
1055 | *** c-basic-offset: 8 *** | |
1056 | *** End: *** | |
1057 | */ |