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Commit | Line | Data |
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d855497e MI |
1 | /* |
2 | * | |
3 | * $Id$ | |
4 | * | |
5 | * Copyright (C) 2005 Mike Isely <isely@pobox.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include "pvrusb2-i2c-core.h" | |
23 | #include "pvrusb2-hdw-internal.h" | |
24 | #include "pvrusb2-debug.h" | |
25 | ||
26 | #define trace_i2c(...) pvr2_trace(PVR2_TRACE_I2C,__VA_ARGS__) | |
27 | ||
28 | /* | |
29 | ||
30 | This module attempts to implement a compliant I2C adapter for the pvrusb2 | |
31 | device. By doing this we can then make use of existing functionality in | |
32 | V4L (e.g. tuner.c) rather than rolling our own. | |
33 | ||
34 | */ | |
35 | ||
36 | static unsigned int i2c_scan = 0; | |
37 | module_param(i2c_scan, int, S_IRUGO|S_IWUSR); | |
38 | MODULE_PARM_DESC(i2c_scan,"scan i2c bus at insmod time"); | |
39 | ||
07e337ee AB |
40 | static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp, |
41 | unsigned int detail, | |
42 | char *buf,unsigned int maxlen); | |
43 | ||
d855497e MI |
44 | static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */ |
45 | u8 i2c_addr, /* I2C address we're talking to */ | |
46 | u8 *data, /* Data to write */ | |
47 | u16 length) /* Size of data to write */ | |
48 | { | |
49 | /* Return value - default 0 means success */ | |
50 | int ret; | |
51 | ||
52 | ||
53 | if (!data) length = 0; | |
54 | if (length > (sizeof(hdw->cmd_buffer) - 3)) { | |
55 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
56 | "Killing an I2C write to %u that is too large" | |
57 | " (desired=%u limit=%u)", | |
58 | i2c_addr, | |
59 | length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3)); | |
60 | return -ENOTSUPP; | |
61 | } | |
62 | ||
63 | LOCK_TAKE(hdw->ctl_lock); | |
64 | ||
65 | /* Clear the command buffer (likely to be paranoia) */ | |
66 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | |
67 | ||
68 | /* Set up command buffer for an I2C write */ | |
69 | hdw->cmd_buffer[0] = 0x08; /* write prefix */ | |
70 | hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */ | |
71 | hdw->cmd_buffer[2] = length; /* length of what follows */ | |
72 | if (length) memcpy(hdw->cmd_buffer + 3, data, length); | |
73 | ||
74 | /* Do the operation */ | |
75 | ret = pvr2_send_request(hdw, | |
76 | hdw->cmd_buffer, | |
77 | length + 3, | |
78 | hdw->cmd_buffer, | |
79 | 1); | |
80 | if (!ret) { | |
81 | if (hdw->cmd_buffer[0] != 8) { | |
82 | ret = -EIO; | |
83 | if (hdw->cmd_buffer[0] != 7) { | |
84 | trace_i2c("unexpected status" | |
85 | " from i2_write[%d]: %d", | |
86 | i2c_addr,hdw->cmd_buffer[0]); | |
87 | } | |
88 | } | |
89 | } | |
90 | ||
91 | LOCK_GIVE(hdw->ctl_lock); | |
92 | ||
93 | return ret; | |
94 | } | |
95 | ||
96 | static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */ | |
97 | u8 i2c_addr, /* I2C address we're talking to */ | |
98 | u8 *data, /* Data to write */ | |
99 | u16 dlen, /* Size of data to write */ | |
100 | u8 *res, /* Where to put data we read */ | |
101 | u16 rlen) /* Amount of data to read */ | |
102 | { | |
103 | /* Return value - default 0 means success */ | |
104 | int ret; | |
105 | ||
106 | ||
107 | if (!data) dlen = 0; | |
108 | if (dlen > (sizeof(hdw->cmd_buffer) - 4)) { | |
109 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
110 | "Killing an I2C read to %u that has wlen too large" | |
111 | " (desired=%u limit=%u)", | |
112 | i2c_addr, | |
113 | dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4)); | |
114 | return -ENOTSUPP; | |
115 | } | |
116 | if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) { | |
117 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
118 | "Killing an I2C read to %u that has rlen too large" | |
119 | " (desired=%u limit=%u)", | |
120 | i2c_addr, | |
121 | rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1)); | |
122 | return -ENOTSUPP; | |
123 | } | |
124 | ||
125 | LOCK_TAKE(hdw->ctl_lock); | |
126 | ||
127 | /* Clear the command buffer (likely to be paranoia) */ | |
128 | memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); | |
129 | ||
130 | /* Set up command buffer for an I2C write followed by a read */ | |
131 | hdw->cmd_buffer[0] = 0x09; /* read prefix */ | |
132 | hdw->cmd_buffer[1] = dlen; /* arg length */ | |
133 | hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one | |
134 | more byte (status). */ | |
135 | hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */ | |
136 | if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen); | |
137 | ||
138 | /* Do the operation */ | |
139 | ret = pvr2_send_request(hdw, | |
140 | hdw->cmd_buffer, | |
141 | 4 + dlen, | |
142 | hdw->cmd_buffer, | |
143 | rlen + 1); | |
144 | if (!ret) { | |
145 | if (hdw->cmd_buffer[0] != 8) { | |
146 | ret = -EIO; | |
147 | if (hdw->cmd_buffer[0] != 7) { | |
148 | trace_i2c("unexpected status" | |
149 | " from i2_read[%d]: %d", | |
150 | i2c_addr,hdw->cmd_buffer[0]); | |
151 | } | |
152 | } | |
153 | } | |
154 | ||
155 | /* Copy back the result */ | |
156 | if (res && rlen) { | |
157 | if (ret) { | |
158 | /* Error, just blank out the return buffer */ | |
159 | memset(res, 0, rlen); | |
160 | } else { | |
161 | memcpy(res, hdw->cmd_buffer + 1, rlen); | |
162 | } | |
163 | } | |
164 | ||
165 | LOCK_GIVE(hdw->ctl_lock); | |
166 | ||
167 | return ret; | |
168 | } | |
169 | ||
170 | /* This is the common low level entry point for doing I2C operations to the | |
171 | hardware. */ | |
07e337ee AB |
172 | static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw, |
173 | u8 i2c_addr, | |
174 | u8 *wdata, | |
175 | u16 wlen, | |
176 | u8 *rdata, | |
177 | u16 rlen) | |
d855497e MI |
178 | { |
179 | if (!rdata) rlen = 0; | |
180 | if (!wdata) wlen = 0; | |
181 | if (rlen || !wlen) { | |
182 | return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
183 | } else { | |
184 | return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen); | |
185 | } | |
186 | } | |
187 | ||
cc75aede MI |
188 | |
189 | /* This is a special entry point for cases of I2C transaction attempts to | |
190 | the IR receiver. The implementation here simulates the IR receiver by | |
191 | issuing a command to the FX2 firmware and using that response to return | |
192 | what the real I2C receiver would have returned. We use this for 24xxx | |
193 | devices, where the IR receiver chip has been removed and replaced with | |
194 | FX2 related logic. */ | |
195 | static int i2c_24xxx_ir(struct pvr2_hdw *hdw, | |
196 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
197 | { | |
198 | u8 dat[4]; | |
199 | unsigned int stat; | |
200 | ||
201 | if (!(rlen || wlen)) { | |
202 | /* This is a probe attempt. Just let it succeed. */ | |
203 | return 0; | |
204 | } | |
205 | ||
206 | /* We don't understand this kind of transaction */ | |
207 | if ((wlen != 0) || (rlen == 0)) return -EIO; | |
208 | ||
209 | if (rlen < 3) { | |
210 | /* Mike Isely <isely@pobox.com> Appears to be a probe | |
211 | attempt from lirc. Just fill in zeroes and return. If | |
212 | we try instead to do the full transaction here, then bad | |
213 | things seem to happen within the lirc driver module | |
214 | (version 0.8.0-7 sources from Debian, when run under | |
215 | vanilla 2.6.17.6 kernel) - and I don't have the patience | |
216 | to chase it down. */ | |
217 | if (rlen > 0) rdata[0] = 0; | |
218 | if (rlen > 1) rdata[1] = 0; | |
219 | return 0; | |
220 | } | |
221 | ||
222 | /* Issue a command to the FX2 to read the IR receiver. */ | |
223 | LOCK_TAKE(hdw->ctl_lock); do { | |
224 | hdw->cmd_buffer[0] = 0xec; | |
225 | stat = pvr2_send_request(hdw, | |
226 | hdw->cmd_buffer,1, | |
227 | hdw->cmd_buffer,4); | |
228 | dat[0] = hdw->cmd_buffer[0]; | |
229 | dat[1] = hdw->cmd_buffer[1]; | |
230 | dat[2] = hdw->cmd_buffer[2]; | |
231 | dat[3] = hdw->cmd_buffer[3]; | |
232 | } while (0); LOCK_GIVE(hdw->ctl_lock); | |
233 | ||
234 | /* Give up if that operation failed. */ | |
235 | if (stat != 0) return stat; | |
236 | ||
237 | /* Mangle the results into something that looks like the real IR | |
238 | receiver. */ | |
239 | rdata[2] = 0xc1; | |
240 | if (dat[0] != 1) { | |
241 | /* No code received. */ | |
242 | rdata[0] = 0; | |
243 | rdata[1] = 0; | |
244 | } else { | |
245 | u16 val; | |
246 | /* Mash the FX2 firmware-provided IR code into something | |
247 | that the normal i2c chip-level driver expects. */ | |
248 | val = dat[1]; | |
249 | val <<= 8; | |
250 | val |= dat[2]; | |
251 | val >>= 1; | |
252 | val &= ~0x0003; | |
253 | val |= 0x8000; | |
254 | rdata[0] = (val >> 8) & 0xffu; | |
255 | rdata[1] = val & 0xffu; | |
256 | } | |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
d855497e MI |
261 | /* This is a special entry point that is entered if an I2C operation is |
262 | attempted to a wm8775 chip on model 24xxx hardware. Autodetect of this | |
263 | part doesn't work, but we know it is really there. So let's look for | |
264 | the autodetect attempt and just return success if we see that. */ | |
265 | static int i2c_hack_wm8775(struct pvr2_hdw *hdw, | |
266 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
267 | { | |
268 | if (!(rlen || wlen)) { | |
269 | // This is a probe attempt. Just let it succeed. | |
270 | return 0; | |
271 | } | |
272 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
273 | } | |
274 | ||
275 | /* This is a special entry point that is entered if an I2C operation is | |
276 | attempted to a cx25840 chip on model 24xxx hardware. This chip can | |
277 | sometimes wedge itself. Worse still, when this happens msp3400 can | |
278 | falsely detect this part and then the system gets hosed up after msp3400 | |
279 | gets confused and dies. What we want to do here is try to keep msp3400 | |
280 | away and also try to notice if the chip is wedged and send a warning to | |
281 | the system log. */ | |
282 | static int i2c_hack_cx25840(struct pvr2_hdw *hdw, | |
283 | u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen) | |
284 | { | |
285 | int ret; | |
286 | unsigned int subaddr; | |
287 | u8 wbuf[2]; | |
288 | int state = hdw->i2c_cx25840_hack_state; | |
289 | ||
290 | if (!(rlen || wlen)) { | |
291 | // Probe attempt - always just succeed and don't bother the | |
292 | // hardware (this helps to make the state machine further | |
293 | // down somewhat easier). | |
294 | return 0; | |
295 | } | |
296 | ||
297 | if (state == 3) { | |
298 | return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); | |
299 | } | |
300 | ||
301 | /* We're looking for the exact pattern where the revision register | |
302 | is being read. The cx25840 module will always look at the | |
303 | revision register first. Any other pattern of access therefore | |
304 | has to be a probe attempt from somebody else so we'll reject it. | |
305 | Normally we could just let each client just probe the part | |
306 | anyway, but when the cx25840 is wedged, msp3400 will get a false | |
307 | positive and that just screws things up... */ | |
308 | ||
309 | if (wlen == 0) { | |
310 | switch (state) { | |
311 | case 1: subaddr = 0x0100; break; | |
312 | case 2: subaddr = 0x0101; break; | |
313 | default: goto fail; | |
314 | } | |
315 | } else if (wlen == 2) { | |
316 | subaddr = (wdata[0] << 8) | wdata[1]; | |
317 | switch (subaddr) { | |
318 | case 0x0100: state = 1; break; | |
319 | case 0x0101: state = 2; break; | |
320 | default: goto fail; | |
321 | } | |
322 | } else { | |
323 | goto fail; | |
324 | } | |
325 | if (!rlen) goto success; | |
326 | state = 0; | |
327 | if (rlen != 1) goto fail; | |
328 | ||
329 | /* If we get to here then we have a legitimate read for one of the | |
330 | two revision bytes, so pass it through. */ | |
331 | wbuf[0] = subaddr >> 8; | |
332 | wbuf[1] = subaddr; | |
333 | ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen); | |
334 | ||
335 | if ((ret != 0) || (*rdata == 0x04) || (*rdata == 0x0a)) { | |
336 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
337 | "WARNING: Detected a wedged cx25840 chip;" | |
338 | " the device will not work."); | |
339 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
340 | "WARNING: Try power cycling the pvrusb2 device."); | |
341 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, | |
342 | "WARNING: Disabling further access to the device" | |
343 | " to prevent other foul-ups."); | |
344 | // This blocks all further communication with the part. | |
a0fd1cb1 | 345 | hdw->i2c_func[0x44] = NULL; |
d855497e MI |
346 | pvr2_hdw_render_useless(hdw); |
347 | goto fail; | |
348 | } | |
349 | ||
350 | /* Success! */ | |
351 | pvr2_trace(PVR2_TRACE_CHIPS,"cx25840 appears to be OK."); | |
352 | state = 3; | |
353 | ||
354 | success: | |
355 | hdw->i2c_cx25840_hack_state = state; | |
356 | return 0; | |
357 | ||
358 | fail: | |
359 | hdw->i2c_cx25840_hack_state = state; | |
360 | return -EIO; | |
361 | } | |
362 | ||
d855497e MI |
363 | /* This is a very, very limited I2C adapter implementation. We can only |
364 | support what we actually know will work on the device... */ | |
365 | static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap, | |
366 | struct i2c_msg msgs[], | |
367 | int num) | |
368 | { | |
369 | int ret = -ENOTSUPP; | |
a0fd1cb1 | 370 | pvr2_i2c_func funcp = NULL; |
d855497e MI |
371 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data); |
372 | ||
373 | if (!num) { | |
374 | ret = -EINVAL; | |
375 | goto done; | |
376 | } | |
377 | if ((msgs[0].flags & I2C_M_NOSTART)) { | |
378 | trace_i2c("i2c refusing I2C_M_NOSTART"); | |
379 | goto done; | |
380 | } | |
381 | if (msgs[0].addr < PVR2_I2C_FUNC_CNT) { | |
382 | funcp = hdw->i2c_func[msgs[0].addr]; | |
383 | } | |
384 | if (!funcp) { | |
385 | ret = -EIO; | |
386 | goto done; | |
387 | } | |
388 | ||
389 | if (num == 1) { | |
390 | if (msgs[0].flags & I2C_M_RD) { | |
391 | /* Simple read */ | |
392 | u16 tcnt,bcnt,offs; | |
393 | if (!msgs[0].len) { | |
394 | /* Length == 0 read. This is a probe. */ | |
a0fd1cb1 | 395 | if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) { |
d855497e MI |
396 | ret = -EIO; |
397 | goto done; | |
398 | } | |
399 | ret = 1; | |
400 | goto done; | |
401 | } | |
402 | /* If the read is short enough we'll do the whole | |
403 | thing atomically. Otherwise we have no choice | |
404 | but to break apart the reads. */ | |
405 | tcnt = msgs[0].len; | |
406 | offs = 0; | |
407 | while (tcnt) { | |
408 | bcnt = tcnt; | |
409 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | |
410 | bcnt = sizeof(hdw->cmd_buffer)-1; | |
411 | } | |
a0fd1cb1 | 412 | if (funcp(hdw,msgs[0].addr,NULL,0, |
d855497e MI |
413 | msgs[0].buf+offs,bcnt)) { |
414 | ret = -EIO; | |
415 | goto done; | |
416 | } | |
417 | offs += bcnt; | |
418 | tcnt -= bcnt; | |
419 | } | |
420 | ret = 1; | |
421 | goto done; | |
422 | } else { | |
423 | /* Simple write */ | |
424 | ret = 1; | |
425 | if (funcp(hdw,msgs[0].addr, | |
a0fd1cb1 | 426 | msgs[0].buf,msgs[0].len,NULL,0)) { |
d855497e MI |
427 | ret = -EIO; |
428 | } | |
429 | goto done; | |
430 | } | |
431 | } else if (num == 2) { | |
432 | if (msgs[0].addr != msgs[1].addr) { | |
433 | trace_i2c("i2c refusing 2 phase transfer with" | |
434 | " conflicting target addresses"); | |
435 | ret = -ENOTSUPP; | |
436 | goto done; | |
437 | } | |
438 | if ((!((msgs[0].flags & I2C_M_RD))) && | |
439 | (msgs[1].flags & I2C_M_RD)) { | |
440 | u16 tcnt,bcnt,wcnt,offs; | |
441 | /* Write followed by atomic read. If the read | |
442 | portion is short enough we'll do the whole thing | |
443 | atomically. Otherwise we have no choice but to | |
444 | break apart the reads. */ | |
445 | tcnt = msgs[1].len; | |
446 | wcnt = msgs[0].len; | |
447 | offs = 0; | |
448 | while (tcnt || wcnt) { | |
449 | bcnt = tcnt; | |
450 | if (bcnt > sizeof(hdw->cmd_buffer)-1) { | |
451 | bcnt = sizeof(hdw->cmd_buffer)-1; | |
452 | } | |
453 | if (funcp(hdw,msgs[0].addr, | |
454 | msgs[0].buf,wcnt, | |
455 | msgs[1].buf+offs,bcnt)) { | |
456 | ret = -EIO; | |
457 | goto done; | |
458 | } | |
459 | offs += bcnt; | |
460 | tcnt -= bcnt; | |
461 | wcnt = 0; | |
462 | } | |
463 | ret = 2; | |
464 | goto done; | |
465 | } else { | |
466 | trace_i2c("i2c refusing complex transfer" | |
467 | " read0=%d read1=%d", | |
468 | (msgs[0].flags & I2C_M_RD), | |
469 | (msgs[1].flags & I2C_M_RD)); | |
470 | } | |
471 | } else { | |
472 | trace_i2c("i2c refusing %d phase transfer",num); | |
473 | } | |
474 | ||
475 | done: | |
476 | if (pvrusb2_debug & PVR2_TRACE_I2C_TRAF) { | |
477 | unsigned int idx,offs,cnt; | |
478 | for (idx = 0; idx < num; idx++) { | |
479 | cnt = msgs[idx].len; | |
480 | printk(KERN_INFO | |
481 | "pvrusb2 i2c xfer %u/%u:" | |
482 | " addr=0x%x len=%d %s%s", | |
483 | idx+1,num, | |
484 | msgs[idx].addr, | |
485 | cnt, | |
486 | (msgs[idx].flags & I2C_M_RD ? | |
487 | "read" : "write"), | |
488 | (msgs[idx].flags & I2C_M_NOSTART ? | |
489 | " nostart" : "")); | |
490 | if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) { | |
491 | if (cnt > 8) cnt = 8; | |
492 | printk(" ["); | |
493 | for (offs = 0; offs < (cnt>8?8:cnt); offs++) { | |
494 | if (offs) printk(" "); | |
495 | printk("%02x",msgs[idx].buf[offs]); | |
496 | } | |
497 | if (offs < cnt) printk(" ..."); | |
498 | printk("]"); | |
499 | } | |
500 | if (idx+1 == num) { | |
501 | printk(" result=%d",ret); | |
502 | } | |
503 | printk("\n"); | |
504 | } | |
505 | if (!num) { | |
506 | printk(KERN_INFO | |
507 | "pvrusb2 i2c xfer null transfer result=%d\n", | |
508 | ret); | |
509 | } | |
510 | } | |
511 | return ret; | |
512 | } | |
513 | ||
514 | static int pvr2_i2c_control(struct i2c_adapter *adapter, | |
515 | unsigned int cmd, unsigned long arg) | |
516 | { | |
517 | return 0; | |
518 | } | |
519 | ||
520 | static u32 pvr2_i2c_functionality(struct i2c_adapter *adap) | |
521 | { | |
522 | return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE_DATA; | |
523 | } | |
524 | ||
525 | static int pvr2_i2c_core_singleton(struct i2c_client *cp, | |
526 | unsigned int cmd,void *arg) | |
527 | { | |
528 | int stat; | |
529 | if (!cp) return -EINVAL; | |
530 | if (!(cp->driver)) return -EINVAL; | |
531 | if (!(cp->driver->command)) return -EINVAL; | |
532 | if (!try_module_get(cp->driver->driver.owner)) return -EAGAIN; | |
533 | stat = cp->driver->command(cp,cmd,arg); | |
534 | module_put(cp->driver->driver.owner); | |
535 | return stat; | |
536 | } | |
537 | ||
538 | int pvr2_i2c_client_cmd(struct pvr2_i2c_client *cp,unsigned int cmd,void *arg) | |
539 | { | |
540 | int stat; | |
541 | if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) { | |
542 | char buf[100]; | |
543 | unsigned int cnt; | |
544 | cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG, | |
545 | buf,sizeof(buf)); | |
546 | pvr2_trace(PVR2_TRACE_I2C_CMD, | |
547 | "i2c COMMAND (code=%u 0x%x) to %.*s", | |
548 | cmd,cmd,cnt,buf); | |
549 | } | |
550 | stat = pvr2_i2c_core_singleton(cp->client,cmd,arg); | |
551 | if (pvrusb2_debug & PVR2_TRACE_I2C_CMD) { | |
552 | char buf[100]; | |
553 | unsigned int cnt; | |
554 | cnt = pvr2_i2c_client_describe(cp,PVR2_I2C_DETAIL_DEBUG, | |
555 | buf,sizeof(buf)); | |
556 | pvr2_trace(PVR2_TRACE_I2C_CMD, | |
557 | "i2c COMMAND to %.*s (ret=%d)",cnt,buf,stat); | |
558 | } | |
559 | return stat; | |
560 | } | |
561 | ||
562 | int pvr2_i2c_core_cmd(struct pvr2_hdw *hdw,unsigned int cmd,void *arg) | |
563 | { | |
564 | struct list_head *item,*nc; | |
565 | struct pvr2_i2c_client *cp; | |
566 | int stat = -EINVAL; | |
567 | ||
568 | if (!hdw) return stat; | |
569 | ||
570 | mutex_lock(&hdw->i2c_list_lock); | |
571 | list_for_each_safe(item,nc,&hdw->i2c_clients) { | |
572 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
573 | if (!cp->recv_enable) continue; | |
574 | mutex_unlock(&hdw->i2c_list_lock); | |
575 | stat = pvr2_i2c_client_cmd(cp,cmd,arg); | |
576 | mutex_lock(&hdw->i2c_list_lock); | |
577 | } | |
578 | mutex_unlock(&hdw->i2c_list_lock); | |
579 | return stat; | |
580 | } | |
581 | ||
582 | ||
583 | static int handler_check(struct pvr2_i2c_client *cp) | |
584 | { | |
585 | struct pvr2_i2c_handler *hp = cp->handler; | |
586 | if (!hp) return 0; | |
587 | if (!hp->func_table->check) return 0; | |
588 | return hp->func_table->check(hp->func_data) != 0; | |
589 | } | |
590 | ||
591 | #define BUFSIZE 500 | |
592 | ||
593 | void pvr2_i2c_core_sync(struct pvr2_hdw *hdw) | |
594 | { | |
595 | unsigned long msk; | |
596 | unsigned int idx; | |
597 | struct list_head *item,*nc; | |
598 | struct pvr2_i2c_client *cp; | |
599 | ||
600 | if (!hdw->i2c_linked) return; | |
601 | if (!(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL)) { | |
602 | return; | |
603 | } | |
604 | mutex_lock(&hdw->i2c_list_lock); do { | |
605 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync BEGIN"); | |
606 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_DETECT) { | |
607 | /* One or more I2C clients have attached since we | |
608 | last synced. So scan the list and identify the | |
609 | new clients. */ | |
610 | char *buf; | |
611 | unsigned int cnt; | |
612 | unsigned long amask = 0; | |
613 | buf = kmalloc(BUFSIZE,GFP_KERNEL); | |
614 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_DETECT"); | |
615 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_DETECT; | |
616 | list_for_each(item,&hdw->i2c_clients) { | |
617 | cp = list_entry(item,struct pvr2_i2c_client, | |
618 | list); | |
619 | if (!cp->detected_flag) { | |
620 | cp->ctl_mask = 0; | |
621 | pvr2_i2c_probe(hdw,cp); | |
622 | cp->detected_flag = !0; | |
623 | msk = cp->ctl_mask; | |
624 | cnt = 0; | |
625 | if (buf) { | |
626 | cnt = pvr2_i2c_client_describe( | |
627 | cp, | |
628 | PVR2_I2C_DETAIL_ALL, | |
629 | buf,BUFSIZE); | |
630 | } | |
631 | trace_i2c("Probed: %.*s",cnt,buf); | |
632 | if (handler_check(cp)) { | |
633 | hdw->i2c_pend_types |= | |
634 | PVR2_I2C_PEND_CLIENT; | |
635 | } | |
636 | cp->pend_mask = msk; | |
637 | hdw->i2c_pend_mask |= msk; | |
638 | hdw->i2c_pend_types |= | |
639 | PVR2_I2C_PEND_REFRESH; | |
640 | } | |
641 | amask |= cp->ctl_mask; | |
642 | } | |
643 | hdw->i2c_active_mask = amask; | |
644 | if (buf) kfree(buf); | |
645 | } | |
646 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_STALE) { | |
647 | /* Need to do one or more global updates. Arrange | |
648 | for this to happen. */ | |
649 | unsigned long m2; | |
650 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
651 | "i2c: PEND_STALE (0x%lx)", | |
652 | hdw->i2c_stale_mask); | |
653 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_STALE; | |
654 | list_for_each(item,&hdw->i2c_clients) { | |
655 | cp = list_entry(item,struct pvr2_i2c_client, | |
656 | list); | |
657 | m2 = hdw->i2c_stale_mask; | |
658 | m2 &= cp->ctl_mask; | |
659 | m2 &= ~cp->pend_mask; | |
660 | if (m2) { | |
661 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
662 | "i2c: cp=%p setting 0x%lx", | |
663 | cp,m2); | |
664 | cp->pend_mask |= m2; | |
665 | } | |
666 | } | |
667 | hdw->i2c_pend_mask |= hdw->i2c_stale_mask; | |
668 | hdw->i2c_stale_mask = 0; | |
669 | hdw->i2c_pend_types |= PVR2_I2C_PEND_REFRESH; | |
670 | } | |
671 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_CLIENT) { | |
672 | /* One or more client handlers are asking for an | |
673 | update. Run through the list of known clients | |
674 | and update each one. */ | |
675 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_CLIENT"); | |
676 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_CLIENT; | |
677 | list_for_each_safe(item,nc,&hdw->i2c_clients) { | |
678 | cp = list_entry(item,struct pvr2_i2c_client, | |
679 | list); | |
680 | if (!cp->handler) continue; | |
681 | if (!cp->handler->func_table->update) continue; | |
682 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
683 | "i2c: cp=%p update",cp); | |
684 | mutex_unlock(&hdw->i2c_list_lock); | |
685 | cp->handler->func_table->update( | |
686 | cp->handler->func_data); | |
687 | mutex_lock(&hdw->i2c_list_lock); | |
688 | /* If client's update function set some | |
689 | additional pending bits, account for that | |
690 | here. */ | |
691 | if (cp->pend_mask & ~hdw->i2c_pend_mask) { | |
692 | hdw->i2c_pend_mask |= cp->pend_mask; | |
693 | hdw->i2c_pend_types |= | |
694 | PVR2_I2C_PEND_REFRESH; | |
695 | } | |
696 | } | |
697 | } | |
698 | if (hdw->i2c_pend_types & PVR2_I2C_PEND_REFRESH) { | |
699 | const struct pvr2_i2c_op *opf; | |
700 | unsigned long pm; | |
701 | /* Some actual updates are pending. Walk through | |
702 | each update type and perform it. */ | |
703 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: PEND_REFRESH" | |
704 | " (0x%lx)",hdw->i2c_pend_mask); | |
705 | hdw->i2c_pend_types &= ~PVR2_I2C_PEND_REFRESH; | |
706 | pm = hdw->i2c_pend_mask; | |
707 | hdw->i2c_pend_mask = 0; | |
708 | for (idx = 0, msk = 1; pm; idx++, msk <<= 1) { | |
709 | if (!(pm & msk)) continue; | |
710 | pm &= ~msk; | |
711 | list_for_each(item,&hdw->i2c_clients) { | |
712 | cp = list_entry(item, | |
713 | struct pvr2_i2c_client, | |
714 | list); | |
715 | if (cp->pend_mask & msk) { | |
716 | cp->pend_mask &= ~msk; | |
717 | cp->recv_enable = !0; | |
718 | } else { | |
719 | cp->recv_enable = 0; | |
720 | } | |
721 | } | |
722 | opf = pvr2_i2c_get_op(idx); | |
723 | if (!opf) continue; | |
724 | mutex_unlock(&hdw->i2c_list_lock); | |
725 | opf->update(hdw); | |
726 | mutex_lock(&hdw->i2c_list_lock); | |
727 | } | |
728 | } | |
729 | pvr2_trace(PVR2_TRACE_I2C_CORE,"i2c: core_sync END"); | |
730 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
731 | } | |
732 | ||
733 | int pvr2_i2c_core_check_stale(struct pvr2_hdw *hdw) | |
734 | { | |
735 | unsigned long msk,sm,pm; | |
736 | unsigned int idx; | |
737 | const struct pvr2_i2c_op *opf; | |
738 | struct list_head *item; | |
739 | struct pvr2_i2c_client *cp; | |
740 | unsigned int pt = 0; | |
741 | ||
742 | pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale BEGIN"); | |
743 | ||
744 | pm = hdw->i2c_active_mask; | |
745 | sm = 0; | |
746 | for (idx = 0, msk = 1; pm; idx++, msk <<= 1) { | |
747 | if (!(msk & pm)) continue; | |
748 | pm &= ~msk; | |
749 | opf = pvr2_i2c_get_op(idx); | |
750 | if (!opf) continue; | |
751 | if (opf->check(hdw)) { | |
752 | sm |= msk; | |
753 | } | |
754 | } | |
755 | if (sm) pt |= PVR2_I2C_PEND_STALE; | |
756 | ||
757 | list_for_each(item,&hdw->i2c_clients) { | |
758 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
759 | if (!handler_check(cp)) continue; | |
760 | pt |= PVR2_I2C_PEND_CLIENT; | |
761 | } | |
762 | ||
763 | if (pt) { | |
764 | mutex_lock(&hdw->i2c_list_lock); do { | |
765 | hdw->i2c_pend_types |= pt; | |
766 | hdw->i2c_stale_mask |= sm; | |
767 | hdw->i2c_pend_mask |= hdw->i2c_stale_mask; | |
768 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
769 | } | |
770 | ||
771 | pvr2_trace(PVR2_TRACE_I2C_CORE, | |
772 | "i2c: types=0x%x stale=0x%lx pend=0x%lx", | |
773 | hdw->i2c_pend_types, | |
774 | hdw->i2c_stale_mask, | |
775 | hdw->i2c_pend_mask); | |
776 | pvr2_trace(PVR2_TRACE_I2C_CORE,"pvr2_i2c_core_check_stale END"); | |
777 | ||
778 | return (hdw->i2c_pend_types & PVR2_I2C_PEND_ALL) != 0; | |
779 | } | |
780 | ||
07e337ee AB |
781 | static unsigned int pvr2_i2c_client_describe(struct pvr2_i2c_client *cp, |
782 | unsigned int detail, | |
783 | char *buf,unsigned int maxlen) | |
d855497e MI |
784 | { |
785 | unsigned int ccnt,bcnt; | |
786 | int spcfl = 0; | |
787 | const struct pvr2_i2c_op *opf; | |
788 | ||
789 | ccnt = 0; | |
790 | if (detail & PVR2_I2C_DETAIL_DEBUG) { | |
791 | bcnt = scnprintf(buf,maxlen, | |
792 | "ctxt=%p ctl_mask=0x%lx", | |
793 | cp,cp->ctl_mask); | |
794 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
795 | spcfl = !0; | |
796 | } | |
797 | bcnt = scnprintf(buf,maxlen, | |
798 | "%s%s @ 0x%x", | |
799 | (spcfl ? " " : ""), | |
800 | cp->client->name, | |
801 | cp->client->addr); | |
802 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
803 | if ((detail & PVR2_I2C_DETAIL_HANDLER) && | |
804 | cp->handler && cp->handler->func_table->describe) { | |
805 | bcnt = scnprintf(buf,maxlen," ("); | |
806 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
807 | bcnt = cp->handler->func_table->describe( | |
808 | cp->handler->func_data,buf,maxlen); | |
809 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
810 | bcnt = scnprintf(buf,maxlen,")"); | |
811 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
812 | } | |
813 | if ((detail & PVR2_I2C_DETAIL_CTLMASK) && cp->ctl_mask) { | |
814 | unsigned int idx; | |
815 | unsigned long msk,sm; | |
816 | int spcfl; | |
817 | bcnt = scnprintf(buf,maxlen," ["); | |
818 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
819 | sm = 0; | |
820 | spcfl = 0; | |
821 | for (idx = 0, msk = 1; msk; idx++, msk <<= 1) { | |
822 | if (!(cp->ctl_mask & msk)) continue; | |
823 | opf = pvr2_i2c_get_op(idx); | |
824 | if (opf) { | |
825 | bcnt = scnprintf(buf,maxlen,"%s%s", | |
826 | spcfl ? " " : "", | |
827 | opf->name); | |
828 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
829 | spcfl = !0; | |
830 | } else { | |
831 | sm |= msk; | |
832 | } | |
833 | } | |
834 | if (sm) { | |
835 | bcnt = scnprintf(buf,maxlen,"%s%lx", | |
836 | idx != 0 ? " " : "",sm); | |
837 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
838 | } | |
839 | bcnt = scnprintf(buf,maxlen,"]"); | |
840 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
841 | } | |
842 | return ccnt; | |
843 | } | |
844 | ||
845 | unsigned int pvr2_i2c_report(struct pvr2_hdw *hdw, | |
846 | char *buf,unsigned int maxlen) | |
847 | { | |
848 | unsigned int ccnt,bcnt; | |
849 | struct list_head *item; | |
850 | struct pvr2_i2c_client *cp; | |
851 | ccnt = 0; | |
852 | mutex_lock(&hdw->i2c_list_lock); do { | |
853 | list_for_each(item,&hdw->i2c_clients) { | |
854 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
855 | bcnt = pvr2_i2c_client_describe( | |
856 | cp, | |
857 | (PVR2_I2C_DETAIL_HANDLER| | |
858 | PVR2_I2C_DETAIL_CTLMASK), | |
859 | buf,maxlen); | |
860 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
861 | bcnt = scnprintf(buf,maxlen,"\n"); | |
862 | ccnt += bcnt; buf += bcnt; maxlen -= bcnt; | |
863 | } | |
864 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
865 | return ccnt; | |
866 | } | |
867 | ||
868 | static int pvr2_i2c_attach_inform(struct i2c_client *client) | |
869 | { | |
870 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data); | |
871 | struct pvr2_i2c_client *cp; | |
872 | int fl = !(hdw->i2c_pend_types & PVR2_I2C_PEND_ALL); | |
873 | cp = kmalloc(sizeof(*cp),GFP_KERNEL); | |
874 | trace_i2c("i2c_attach [client=%s @ 0x%x ctxt=%p]", | |
875 | client->name, | |
876 | client->addr,cp); | |
877 | if (!cp) return -ENOMEM; | |
878 | memset(cp,0,sizeof(*cp)); | |
879 | INIT_LIST_HEAD(&cp->list); | |
880 | cp->client = client; | |
881 | mutex_lock(&hdw->i2c_list_lock); do { | |
882 | list_add_tail(&cp->list,&hdw->i2c_clients); | |
883 | hdw->i2c_pend_types |= PVR2_I2C_PEND_DETECT; | |
884 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
885 | if (fl) pvr2_hdw_poll_trigger_unlocked(hdw); | |
886 | return 0; | |
887 | } | |
888 | ||
889 | static int pvr2_i2c_detach_inform(struct i2c_client *client) | |
890 | { | |
891 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)(client->adapter->algo_data); | |
892 | struct pvr2_i2c_client *cp; | |
893 | struct list_head *item,*nc; | |
894 | unsigned long amask = 0; | |
895 | int foundfl = 0; | |
896 | mutex_lock(&hdw->i2c_list_lock); do { | |
897 | list_for_each_safe(item,nc,&hdw->i2c_clients) { | |
898 | cp = list_entry(item,struct pvr2_i2c_client,list); | |
899 | if (cp->client == client) { | |
900 | trace_i2c("pvr2_i2c_detach" | |
901 | " [client=%s @ 0x%x ctxt=%p]", | |
902 | client->name, | |
903 | client->addr,cp); | |
904 | if (cp->handler && | |
905 | cp->handler->func_table->detach) { | |
906 | cp->handler->func_table->detach( | |
907 | cp->handler->func_data); | |
908 | } | |
909 | list_del(&cp->list); | |
910 | kfree(cp); | |
911 | foundfl = !0; | |
912 | continue; | |
913 | } | |
914 | amask |= cp->ctl_mask; | |
915 | } | |
916 | hdw->i2c_active_mask = amask; | |
917 | } while (0); mutex_unlock(&hdw->i2c_list_lock); | |
918 | if (!foundfl) { | |
919 | trace_i2c("pvr2_i2c_detach [client=%s @ 0x%x ctxt=<unknown>]", | |
920 | client->name, | |
921 | client->addr); | |
922 | } | |
923 | return 0; | |
924 | } | |
925 | ||
926 | static struct i2c_algorithm pvr2_i2c_algo_template = { | |
927 | .master_xfer = pvr2_i2c_xfer, | |
928 | .algo_control = pvr2_i2c_control, | |
929 | .functionality = pvr2_i2c_functionality, | |
930 | }; | |
931 | ||
932 | static struct i2c_adapter pvr2_i2c_adap_template = { | |
933 | .owner = THIS_MODULE, | |
934 | .class = I2C_CLASS_TV_ANALOG, | |
935 | .id = I2C_HW_B_BT848, | |
936 | .client_register = pvr2_i2c_attach_inform, | |
937 | .client_unregister = pvr2_i2c_detach_inform, | |
938 | }; | |
939 | ||
940 | static void do_i2c_scan(struct pvr2_hdw *hdw) | |
941 | { | |
942 | struct i2c_msg msg[1]; | |
943 | int i,rc; | |
944 | msg[0].addr = 0; | |
945 | msg[0].flags = I2C_M_RD; | |
946 | msg[0].len = 0; | |
a0fd1cb1 | 947 | msg[0].buf = NULL; |
d855497e MI |
948 | printk("%s: i2c scan beginning\n",hdw->name); |
949 | for (i = 0; i < 128; i++) { | |
950 | msg[0].addr = i; | |
951 | rc = i2c_transfer(&hdw->i2c_adap,msg, | |
952 | sizeof(msg)/sizeof(msg[0])); | |
953 | if (rc != 1) continue; | |
954 | printk("%s: i2c scan: found device @ 0x%x\n",hdw->name,i); | |
955 | } | |
956 | printk("%s: i2c scan done.\n",hdw->name); | |
957 | } | |
958 | ||
959 | void pvr2_i2c_core_init(struct pvr2_hdw *hdw) | |
960 | { | |
961 | unsigned int idx; | |
962 | ||
cc75aede MI |
963 | /* The default action for all possible I2C addresses is just to do |
964 | the transfer normally. */ | |
d855497e MI |
965 | for (idx = 0; idx < PVR2_I2C_FUNC_CNT; idx++) { |
966 | hdw->i2c_func[idx] = pvr2_i2c_basic_op; | |
967 | } | |
968 | ||
cc75aede | 969 | /* However, deal with various special cases for 24xxx hardware. */ |
d855497e MI |
970 | if (hdw->hdw_type == PVR2_HDW_TYPE_24XXX) { |
971 | hdw->i2c_func[0x1b] = i2c_hack_wm8775; | |
972 | hdw->i2c_func[0x44] = i2c_hack_cx25840; | |
cc75aede | 973 | hdw->i2c_func[0x18] = i2c_24xxx_ir; |
d855497e | 974 | } |
d855497e MI |
975 | |
976 | // Configure the adapter and set up everything else related to it. | |
977 | memcpy(&hdw->i2c_adap,&pvr2_i2c_adap_template,sizeof(hdw->i2c_adap)); | |
978 | memcpy(&hdw->i2c_algo,&pvr2_i2c_algo_template,sizeof(hdw->i2c_algo)); | |
979 | strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name)); | |
980 | hdw->i2c_adap.algo = &hdw->i2c_algo; | |
981 | hdw->i2c_adap.algo_data = hdw; | |
982 | hdw->i2c_pend_mask = 0; | |
983 | hdw->i2c_stale_mask = 0; | |
984 | hdw->i2c_active_mask = 0; | |
985 | INIT_LIST_HEAD(&hdw->i2c_clients); | |
986 | mutex_init(&hdw->i2c_list_lock); | |
987 | hdw->i2c_linked = !0; | |
988 | i2c_add_adapter(&hdw->i2c_adap); | |
989 | if (i2c_scan) do_i2c_scan(hdw); | |
990 | } | |
991 | ||
992 | void pvr2_i2c_core_done(struct pvr2_hdw *hdw) | |
993 | { | |
994 | if (hdw->i2c_linked) { | |
995 | i2c_del_adapter(&hdw->i2c_adap); | |
996 | hdw->i2c_linked = 0; | |
997 | } | |
998 | } | |
999 | ||
1000 | /* | |
1001 | Stuff for Emacs to see, in order to encourage consistent editing style: | |
1002 | *** Local Variables: *** | |
1003 | *** mode: c *** | |
1004 | *** fill-column: 75 *** | |
1005 | *** tab-width: 8 *** | |
1006 | *** c-basic-offset: 8 *** | |
1007 | *** End: *** | |
1008 | */ |