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V4L/DVB (3605): Add support for I2C_HW_B_CX2341X board adapter
[mirror_ubuntu-zesty-kernel.git] / drivers / media / video / saa7115.c
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f5762e44 1/* saa7115 - Philips SAA7113/SAA7114/SAA7115 video decoder driver
e19b2fcc
HV		 2 *
3 * Based on saa7114 driver by Maxim Yevtyushkin, which is based on
4 * the saa7111 driver by Dave Perks.
5 *
6 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
7 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
8 *
9 * Slight changes for video timing and attachment output by
10 * Wolfgang Scherr <scherr@net4you.net>
11 *
12 * Moved over to the linux >= 2.4.x i2c protocol (1/1/2003)
13 * by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 *
15 * Added saa7115 support by Kevin Thayer <nufan_wfk at yahoo.com>
16 * (2/17/2003)
17 *
18 * VBI support (2004) and cleanups (2005) by Hans Verkuil <hverkuil@xs4all.nl>
f5762e44 19 * SAA7113 support by Mauro Carvalho Chehab <mchehab@infradead.org>
e19b2fcc
HV		 20 *
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version 2
24 * of the License, or (at your option) any later version.
25 *
26 * This program is distributed in the hope that it will be useful,
27 * but WITHOUT ANY WARRANTY; without even the implied warranty of
28 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
29 * GNU General Public License for more details.
30 *
31 * You should have received a copy of the GNU General Public License
32 * along with this program; if not, write to the Free Software
33 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
34 */
35
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/slab.h>
40#include <linux/i2c.h>
41#include <linux/videodev2.h>
e19b2fcc 42#include <media/v4l2-common.h>
3578d3dd 43#include <asm/div64.h>
e19b2fcc 44
f5762e44
MCC		 45MODULE_DESCRIPTION("Philips SAA7113/SAA7114/SAA7115 video decoder driver");
46MODULE_AUTHOR( "Maxim Yevtyushkin, Kevin Thayer, Chris Kennedy, "
47 "Hans Verkuil, Mauro Carvalho Chehab");
e19b2fcc
HV		 48MODULE_LICENSE("GPL");
49
50static int debug = 0;
fac9e899 51module_param(debug, bool, 0644);
e19b2fcc
HV		 52
53MODULE_PARM_DESC(debug, "Debug level (0-1)");
54
f5762e44
MCC		 55static unsigned short normal_i2c[] = {
56 0x4a >>1, 0x48 >>1, /* SAA7113 */
57 0x42 >> 1, 0x40 >> 1, /* SAA7114 and SAA7115 */
58 I2C_CLIENT_END };
e19b2fcc
HV		 59
60
61I2C_CLIENT_INSMOD;
62
63struct saa7115_state {
64 v4l2_std_id std;
65 int input;
66 int enable;
3faeeae4 67 int radio;
e19b2fcc
HV		 68 int bright;
69 int contrast;
70 int hue;
71 int sat;
72 enum v4l2_chip_ident ident;
3578d3dd 73 u32 audclk_freq;
e19b2fcc
HV		 74};
75
76/* ----------------------------------------------------------------------- */
77
78static inline int saa7115_write(struct i2c_client *client, u8 reg, u8 value)
79{
80 return i2c_smbus_write_byte_data(client, reg, value);
81}
82
83static int saa7115_writeregs(struct i2c_client *client, const unsigned char *regs)
84{
85 unsigned char reg, data;
86
87 while (*regs != 0x00) {
88 reg = *(regs++);
89 data = *(regs++);
90 if (saa7115_write(client, reg, data) < 0)
91 return -1;
92 }
93 return 0;
94}
95
96static inline int saa7115_read(struct i2c_client *client, u8 reg)
97{
98 return i2c_smbus_read_byte_data(client, reg);
99}
100
101/* ----------------------------------------------------------------------- */
102
103/* If a value differs from the Hauppauge driver values, then the comment starts with
104 'was 0xXX' to denote the Hauppauge value. Otherwise the value is identical to what the
105 Hauppauge driver sets. */
106
107static const unsigned char saa7115_init_auto_input[] = {
f5762e44 108 /* Front-End Part */
e19b2fcc
HV		 109 0x01, 0x48, /* white peak control disabled */
110 0x03, 0x20, /* was 0x30. 0x20: long vertical blanking */
111 0x04, 0x90, /* analog gain set to 0 */
112 0x05, 0x90, /* analog gain set to 0 */
f5762e44 113 /* Decoder Part */
e19b2fcc
HV		 114 0x06, 0xeb, /* horiz sync begin = -21 */
115 0x07, 0xe0, /* horiz sync stop = -17 */
116 0x0a, 0x80, /* was 0x88. decoder brightness, 0x80 is itu standard */
117 0x0b, 0x44, /* was 0x48. decoder contrast, 0x44 is itu standard */
118 0x0c, 0x40, /* was 0x47. decoder saturation, 0x40 is itu standard */
119 0x0d, 0x00, /* chrominance hue control */
120 0x0f, 0x00, /* chrominance gain control: use automicatic mode */
121 0x10, 0x06, /* chrominance/luminance control: active adaptive combfilter */
122 0x11, 0x00, /* delay control */
123 0x12, 0x9d, /* RTS0 output control: VGATE */
124 0x13, 0x80, /* X-port output control: ITU656 standard mode, RTCO output enable RTCE */
125 0x14, 0x00, /* analog/ADC/auto compatibility control */
126 0x18, 0x40, /* raw data gain 0x00 = nominal */
127 0x19, 0x80, /* raw data offset 0x80 = 0 LSB */
128 0x1a, 0x77, /* color killer level control 0x77 = recommended */
129 0x1b, 0x42, /* misc chroma control 0x42 = recommended */
130 0x1c, 0xa9, /* combfilter control 0xA9 = recommended */
131 0x1d, 0x01, /* combfilter control 0x01 = recommended */
f5762e44
MCC		 132
133 /* Power Device Control */
e19b2fcc
HV		 134 0x88, 0xd0, /* reset device */
135 0x88, 0xf0, /* set device programmed, all in operational mode */
136 0x00, 0x00
137};
138
139static const unsigned char saa7115_cfg_reset_scaler[] = {
140 0x87, 0x00, /* disable I-port output */
141 0x88, 0xd0, /* reset scaler */
142 0x88, 0xf0, /* activate scaler */
143 0x87, 0x01, /* enable I-port output */
144 0x00, 0x00
145};
146
147/* ============== SAA7715 VIDEO templates ============= */
148
149static const unsigned char saa7115_cfg_60hz_fullres_x[] = {
150 0xcc, 0xd0, /* hsize low (output), hor. output window size = 0x2d0 = 720 */
151 0xcd, 0x02, /* hsize hi (output) */
152
153 /* Why not in 60hz-Land, too? */
154 0xd0, 0x01, /* downscale = 1 */
155 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
156 0xd9, 0x04,
157 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
158 0xdd, 0x02, /* H-scaling incr chroma */
159
160 0x00, 0x00
161};
162static const unsigned char saa7115_cfg_60hz_fullres_y[] = {
163 0xce, 0xf8, /* vsize low (output), ver. output window size = 248 (but 60hz is 240?) */
164 0xcf, 0x00, /* vsize hi (output) */
165
166 /* Why not in 60hz-Land, too? */
167 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
168 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
169
170 0xe0, 0x00, /* V-scaling incr luma low */
171 0xe1, 0x04, /* " hi */
172 0xe2, 0x00, /* V-scaling incr chroma low */
173 0xe3, 0x04, /* " hi */
174
175 0x00, 0x00
176};
177
178static const unsigned char saa7115_cfg_60hz_video[] = {
179 0x80, 0x00, /* reset tasks */
180 0x88, 0xd0, /* reset scaler */
181
182 0x15, 0x03, /* VGATE pulse start */
183 0x16, 0x11, /* VGATE pulse stop */
184 0x17, 0x9c, /* VGATE MSB and other values */
185
186 0x08, 0x68, /* 0xBO: auto detection, 0x68 = NTSC */
187 0x0e, 0x07, /* lots of different stuff... video autodetection is on */
188
189 0x5a, 0x06, /* Vertical offset, standard 60hz value for ITU656 line counting */
190
191 /* Task A */
192 0x90, 0x80, /* Task Handling Control */
193 0x91, 0x48, /* X-port formats/config */
194 0x92, 0x40, /* Input Ref. signal Def. */
195 0x93, 0x84, /* I-port config */
196 0x94, 0x01, /* hoffset low (input), 0x0002 is minimum */
197 0x95, 0x00, /* hoffset hi (input) */
198 0x96, 0xd0, /* hsize low (input), 0x02d0 = 720 */
199 0x97, 0x02, /* hsize hi (input) */
200 0x98, 0x05, /* voffset low (input) */
201 0x99, 0x00, /* voffset hi (input) */
202 0x9a, 0x0c, /* vsize low (input), 0x0c = 12 */
203 0x9b, 0x00, /* vsize hi (input) */
204 0x9c, 0xa0, /* hsize low (output), 0x05a0 = 1440 */
205 0x9d, 0x05, /* hsize hi (output) */
206 0x9e, 0x0c, /* vsize low (output), 0x0c = 12 */
207 0x9f, 0x00, /* vsize hi (output) */
208
209 /* Task B */
210 0xc0, 0x00, /* Task Handling Control */
211 0xc1, 0x08, /* X-port formats/config */
212 0xc2, 0x00, /* Input Ref. signal Def. */
213 0xc3, 0x80, /* I-port config */
214 0xc4, 0x02, /* hoffset low (input), 0x0002 is minimum */
215 0xc5, 0x00, /* hoffset hi (input) */
216 0xc6, 0xd0, /* hsize low (input), 0x02d0 = 720 */
217 0xc7, 0x02, /* hsize hi (input) */
218 0xc8, 0x12, /* voffset low (input), 0x12 = 18 */
219 0xc9, 0x00, /* voffset hi (input) */
220 0xca, 0xf8, /* vsize low (input), 0xf8 = 248 */
221 0xcb, 0x00, /* vsize hi (input) */
222 0xcc, 0xd0, /* hsize low (output), 0x02d0 = 720 */
223 0xcd, 0x02, /* hsize hi (output) */
224
225 0xf0, 0xad, /* Set PLL Register. 60hz 525 lines per frame, 27 MHz */
226 0xf1, 0x05, /* low bit with 0xF0 */
227 0xf5, 0xad, /* Set pulse generator register */
228 0xf6, 0x01,
229
230 0x87, 0x00, /* Disable I-port output */
231 0x88, 0xd0, /* reset scaler */
232 0x80, 0x20, /* Activate only task "B", continuous mode (was 0xA0) */
233 0x88, 0xf0, /* activate scaler */
234 0x87, 0x01, /* Enable I-port output */
235 0x00, 0x00
236};
237
238static const unsigned char saa7115_cfg_50hz_fullres_x[] = {
239 0xcc, 0xd0, /* hsize low (output), 720 same as 60hz */
240 0xcd, 0x02, /* hsize hi (output) */
241
242 0xd0, 0x01, /* down scale = 1 */
243 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
244 0xd9, 0x04,
245 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
246 0xdd, 0x02, /* H-scaling incr chroma */
247
248 0x00, 0x00
249};
250static const unsigned char saa7115_cfg_50hz_fullres_y[] = {
251 0xce, 0x20, /* vsize low (output), 0x0120 = 288 */
252 0xcf, 0x01, /* vsize hi (output) */
253
254 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
255 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
256
257 0xe0, 0x00, /* V-scaling incr luma low */
258 0xe1, 0x04, /* " hi */
259 0xe2, 0x00, /* V-scaling incr chroma low */
260 0xe3, 0x04, /* " hi */
261
262 0x00, 0x00
263};
264
265static const unsigned char saa7115_cfg_50hz_video[] = {
266 0x80, 0x00, /* reset tasks */
267 0x88, 0xd0, /* reset scaler */
268
269 0x15, 0x37, /* VGATE start */
270 0x16, 0x16, /* VGATE stop */
271 0x17, 0x99, /* VGATE MSB and other values */
272
273 0x08, 0x28, /* 0x28 = PAL */
274 0x0e, 0x07, /* chrominance control 1 */
275
276 0x5a, 0x03, /* Vertical offset, standard 50hz value */
277
278 /* Task A */
279 0x90, 0x81, /* Task Handling Control */
280 0x91, 0x48, /* X-port formats/config */
281 0x92, 0x40, /* Input Ref. signal Def. */
282 0x93, 0x84, /* I-port config */
283 /* This is weird: the datasheet says that you should use 2 as the minimum value, */
284 /* but Hauppauge uses 0, and changing that to 2 causes indeed problems (for 50hz) */
285 0x94, 0x00, /* hoffset low (input), 0x0002 is minimum */
286 0x95, 0x00, /* hoffset hi (input) */
287 0x96, 0xd0, /* hsize low (input), 0x02d0 = 720 */
288 0x97, 0x02, /* hsize hi (input) */
289 0x98, 0x03, /* voffset low (input) */
290 0x99, 0x00, /* voffset hi (input) */
291 0x9a, 0x12, /* vsize low (input), 0x12 = 18 */
292 0x9b, 0x00, /* vsize hi (input) */
293 0x9c, 0xa0, /* hsize low (output), 0x05a0 = 1440 */
294 0x9d, 0x05, /* hsize hi (output) */
295 0x9e, 0x12, /* vsize low (output), 0x12 = 18 */
296 0x9f, 0x00, /* vsize hi (output) */
297
298 /* Task B */
299 0xc0, 0x00, /* Task Handling Control */
300 0xc1, 0x08, /* X-port formats/config */
301 0xc2, 0x00, /* Input Ref. signal Def. */
302 0xc3, 0x80, /* I-port config */
303 0xc4, 0x00, /* hoffset low (input), 0x0002 is minimum. See comment at 0x94 above. */
304 0xc5, 0x00, /* hoffset hi (input) */
305 0xc6, 0xd0, /* hsize low (input), 0x02d0 = 720 */
306 0xc7, 0x02, /* hsize hi (input) */
307 0xc8, 0x16, /* voffset low (input), 0x16 = 22 */
308 0xc9, 0x00, /* voffset hi (input) */
309 0xca, 0x20, /* vsize low (input), 0x0120 = 288 */
310 0xcb, 0x01, /* vsize hi (input) */
311 0xcc, 0xd0, /* hsize low (output), 0x02d0 = 720 */
312 0xcd, 0x02, /* hsize hi (output) */
313 0xce, 0x20, /* vsize low (output), 0x0120 = 288 */
314 0xcf, 0x01, /* vsize hi (output) */
315
316 0xf0, 0xb0, /* Set PLL Register. 50hz 625 lines per frame, 27 MHz */
317 0xf1, 0x05, /* low bit with 0xF0, (was 0x05) */
318 0xf5, 0xb0, /* Set pulse generator register */
319 0xf6, 0x01,
320
321 0x87, 0x00, /* Disable I-port output */
322 0x88, 0xd0, /* reset scaler (was 0xD0) */
323 0x80, 0x20, /* Activate only task "B" */
324 0x88, 0xf0, /* activate scaler */
325 0x87, 0x01, /* Enable I-port output */
326 0x00, 0x00
327};
328
329/* ============== SAA7715 VIDEO templates (end) ======= */
330
331static const unsigned char saa7115_cfg_vbi_on[] = {
332 0x80, 0x00, /* reset tasks */
333 0x88, 0xd0, /* reset scaler */
334 0x80, 0x30, /* Activate both tasks */
335 0x88, 0xf0, /* activate scaler */
336 0x87, 0x01, /* Enable I-port output */
337 0x00, 0x00
338};
339
340static const unsigned char saa7115_cfg_vbi_off[] = {
341 0x80, 0x00, /* reset tasks */
342 0x88, 0xd0, /* reset scaler */
343 0x80, 0x20, /* Activate only task "B" */
344 0x88, 0xf0, /* activate scaler */
345 0x87, 0x01, /* Enable I-port output */
346 0x00, 0x00
347};
348
f5762e44
MCC		 349static const unsigned char saa7113_init_auto_input[] = {
350 0x01, 0x08, /* PH7113_INCREMENT_DELAY - (1) (1) (1) (1) IDEL3 IDEL2 IDELL1 IDEL0 */
351 0x02, 0xc2, /* PH7113_ANALOG_INPUT_CONTR_1 - FUSE1 FUSE0 GUDL1 GUDL0 MODE3 MODE2 MODE1 MODE0 */
352 0x03, 0x30, /* PH7113_ANALOG_INPUT_CONTR_2 - (1) HLNRS VBSL WPOFF HOLDG GAFIX GAI28 GAI18 */
353 0x04, 0x00, /* PH7113_ANALOG_INPUT_CONTR_3 - GAI17 GAI16 GAI15 GAI14 GAI13 GAI12 GAI11 GAI10 */
354 0x05, 0x00, /* PH7113_ANALOG_INPUT_CONTR_4 - GAI27 GAI26 GAI25 GAI24 GAI23 GAI22 GAI21 GAI20 */
355 0x06, 0x89, /* PH7113_HORIZONTAL_SYNC_START - HSB7 HSB6 HSB5 HSB4 HSB3 HSB2 HSB1 HSB0 */
356 0x07, 0x0d, /* PH7113_HORIZONTAL_SYNC_STOP - HSS7 HSS6 HSS5 HSS4 HSS3 HSS2 HSS1 HSS0 */
357 0x08, 0x88, /* PH7113_SYNC_CONTROL - AUFD FSEL FOET HTC1 HTC0 HPLL VNOI1 VNOI0 */
358 0x09, 0x01, /* PH7113_LUMINANCE_CONTROL - BYPS PREF BPSS1 BPSS0 VBLB UPTCV APER1 APER0 */
359 0x0a, 0x80, /* PH7113_LUMINANCE_BRIGHTNESS - BRIG7 BRIG6 BRIG5 BRIG4 BRIG3 BRIG2 BRIG1 BRIG0 */
360 0x0b, 0x47, /* PH7113_LUMINANCE_CONTRAST - CONT7 CONT6 CONT5 CONT4 CONT3 CONT2 CONT1 CONT0 */
361 0x0c, 0x40, /* PH7113_CHROMA_SATURATION - SATN7 SATN6 SATN5 SATN4 SATN3 SATN2 SATN1 SATN0 */
362 0x0d, 0x00, /* PH7113_CHROMA_HUE_CONTROL - HUEC7 HUEC6 HUEC5 HUEC4 HUEC3 HUEC2 HUEC1 HUEC0 */
363 0x0e, 0x01, /* PH7113_CHROMA_CONTROL - CDTO CSTD2 CSTD1 CSTD0 DCCF FCTC CHBW1 CHBW0 */
364 0x0f, 0x2a, /* PH7113_CHROMA_GAIN_CONTROL - ACGC CGAIN6 CGAIN5 CGAIN4 CGAIN3 CGAIN2 CGAIN1 CGAIN0 */
365 0x10, 0x08, /* PH7113_FORMAT_DELAY_CONTROL - OFTS1 OFTS0 HDEL1 HDEL0 VRLN YDEL2 YDEL1 YDEL0 */
366 0x11, 0x0c, /* PH7113_OUTPUT_CONTROL_1 - GPSW1 CM99 GPSW0 HLSEL OEYC OERT VIPB COLO */
367 0x12, 0x07, /* PH7113_OUTPUT_CONTROL_2 - RTSE13 RTSE12 RTSE11 RTSE10 RTSE03 RTSE02 RTSE01 RTSE00 */
368 0x13, 0x00, /* PH7113_OUTPUT_CONTROL_3 - ADLSB (1) (1) OLDSB FIDP (1) AOSL1 AOSL0 */
369 0x14, 0x00, /* RESERVED 14 - (1) (1) (1) (1) (1) (1) (1) (1) */
370 0x15, 0x00, /* PH7113_V_GATE1_START - VSTA7 VSTA6 VSTA5 VSTA4 VSTA3 VSTA2 VSTA1 VSTA0 */
371 0x16, 0x00, /* PH7113_V_GATE1_STOP - VSTO7 VSTO6 VSTO5 VSTO4 VSTO3 VSTO2 VSTO1 VSTO0 */
372 0x17, 0x00, /* PH7113_V_GATE1_MSB - (1) (1) (1) (1) (1) (1) VSTO8 VSTA8 */
373 0x00, 0x00
374};
375
e19b2fcc
HV		 376static const unsigned char saa7115_init_misc[] = {
377 0x38, 0x03, /* audio stuff */
378 0x39, 0x10,
379 0x3a, 0x08,
380
381 0x81, 0x01, /* reg 0x15,0x16 define blanking window */
382 0x82, 0x00,
383 0x83, 0x01, /* I port settings */
384 0x84, 0x20,
385 0x85, 0x21,
386 0x86, 0xc5,
387 0x87, 0x01,
388
389 /* Task A */
390 0xa0, 0x01, /* down scale = 1 */
391 0xa1, 0x00, /* prescale accumulation length = 1 */
392 0xa2, 0x00, /* dc gain and fir prefilter control */
393 0xa4, 0x80, /* Lum Brightness, nominal value = 0x80 */
394 0xa5, 0x40, /* Lum contrast, nominal value = 0x40 */
395 0xa6, 0x40, /* Chroma satur. nominal value = 0x80 */
396 0xa8, 0x00, /* hor lum scaling 0x0200 = 2 zoom */
397 0xa9, 0x02, /* note: 2 x zoom ensures that VBI lines have same length as video lines. */
398 0xaa, 0x00, /* H-phase offset Luma = 0 */
399 0xac, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
400 0xad, 0x01, /* H-scaling incr chroma */
401 0xae, 0x00, /* H-phase offset chroma. must be offset luma / 2 */
402
403 0xb0, 0x00, /* V-scaling incr luma low */
404 0xb1, 0x04, /* " hi */
405 0xb2, 0x00, /* V-scaling incr chroma low */
406 0xb3, 0x04, /* " hi */
407 0xb4, 0x01, /* V-scaling mode control */
408 0xb8, 0x00, /* V-phase offset chroma 00 */
409 0xb9, 0x00, /* V-phase offset chroma 01 */
410 0xba, 0x00, /* V-phase offset chroma 10 */
411 0xbb, 0x00, /* V-phase offset chroma 11 */
412 0xbc, 0x00, /* V-phase offset luma 00 */
413 0xbd, 0x00, /* V-phase offset luma 01 */
414 0xbe, 0x00, /* V-phase offset luma 10 */
415 0xbf, 0x00, /* V-phase offset luma 11 */
416
417 /* Task B */
418 0xd0, 0x01, /* down scale = 1 */
419 0xd1, 0x00, /* prescale accumulation length = 1 */
420 0xd2, 0x00, /* dc gain and fir prefilter control */
421 0xd4, 0x80, /* Lum Brightness, nominal value = 0x80 */
422 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
423 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
424 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
425 0xd9, 0x04,
426 0xda, 0x00, /* H-phase offset Luma = 0 */
427 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
428 0xdd, 0x02, /* H-scaling incr chroma */
429 0xde, 0x00, /* H-phase offset chroma. must be offset luma / 2 */
430
431 0xe0, 0x00, /* V-scaling incr luma low */
432 0xe1, 0x04, /* " hi */
433 0xe2, 0x00, /* V-scaling incr chroma low */
434 0xe3, 0x04, /* " hi */
435 0xe4, 0x01, /* V-scaling mode control */
436 0xe8, 0x00, /* V-phase offset chroma 00 */
437 0xe9, 0x00, /* V-phase offset chroma 01 */
438 0xea, 0x00, /* V-phase offset chroma 10 */
439 0xeb, 0x00, /* V-phase offset chroma 11 */
440 0xec, 0x00, /* V-phase offset luma 00 */
441 0xed, 0x00, /* V-phase offset luma 01 */
442 0xee, 0x00, /* V-phase offset luma 10 */
443 0xef, 0x00, /* V-phase offset luma 11 */
444
445 0xf2, 0x50, /* crystal clock = 24.576 MHz, target = 27MHz */
446 0xf3, 0x46,
447 0xf4, 0x00,
448 0xf7, 0x4b, /* not the recommended settings! */
449 0xf8, 0x00,
450 0xf9, 0x4b,
451 0xfa, 0x00,
452 0xfb, 0x4b,
453 0xff, 0x88, /* PLL2 lock detection settings: 71 lines 50% phase error */
454
455 /* Turn off VBI */
456 0x40, 0x20, /* No framing code errors allowed. */
457 0x41, 0xff,
458 0x42, 0xff,
459 0x43, 0xff,
460 0x44, 0xff,
461 0x45, 0xff,
462 0x46, 0xff,
463 0x47, 0xff,
464 0x48, 0xff,
465 0x49, 0xff,
466 0x4a, 0xff,
467 0x4b, 0xff,
468 0x4c, 0xff,
469 0x4d, 0xff,
470 0x4e, 0xff,
471 0x4f, 0xff,
472 0x50, 0xff,
473 0x51, 0xff,
474 0x52, 0xff,
475 0x53, 0xff,
476 0x54, 0xff,
477 0x55, 0xff,
478 0x56, 0xff,
479 0x57, 0xff,
480 0x58, 0x40,
481 0x59, 0x47,
482 0x5b, 0x83,
483 0x5d, 0xbd,
484 0x5e, 0x35,
485
486 0x02, 0x84, /* input tuner -> input 4, amplifier active */
487 0x09, 0x53, /* 0x53, was 0x56 for 60hz. luminance control */
488
489 0x80, 0x20, /* enable task B */
490 0x88, 0xd0,
491 0x88, 0xf0,
492 0x00, 0x00
493};
494
e19b2fcc
HV		 495static int saa7115_odd_parity(u8 c)
496{
497 c ^= (c >> 4);
498 c ^= (c >> 2);
499 c ^= (c >> 1);
500
501 return c & 1;
502}
503
504static int saa7115_decode_vps(u8 * dst, u8 * p)
505{
506 static const u8 biphase_tbl[] = {
507 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
508 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
509 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
510 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
511 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
512 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
513 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
514 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
515 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
516 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
517 0xc3, 0x4b, 0x43, 0xc3, 0x87, 0x0f, 0x07, 0x87,
518 0x83, 0x0b, 0x03, 0x83, 0xc3, 0x4b, 0x43, 0xc3,
519 0xc1, 0x49, 0x41, 0xc1, 0x85, 0x0d, 0x05, 0x85,
520 0x81, 0x09, 0x01, 0x81, 0xc1, 0x49, 0x41, 0xc1,
521 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
522 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
523 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
524 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
525 0xc2, 0x4a, 0x42, 0xc2, 0x86, 0x0e, 0x06, 0x86,
526 0x82, 0x0a, 0x02, 0x82, 0xc2, 0x4a, 0x42, 0xc2,
527 0xc0, 0x48, 0x40, 0xc0, 0x84, 0x0c, 0x04, 0x84,
528 0x80, 0x08, 0x00, 0x80, 0xc0, 0x48, 0x40, 0xc0,
529 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
530 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
531 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
532 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
533 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
534 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
535 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
536 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
537 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
538 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
539 };
540 int i;
541 u8 c, err = 0;
542
543 for (i = 0; i < 2 * 13; i += 2) {
544 err |= biphase_tbl[p[i]] | biphase_tbl[p[i + 1]];
545 c = (biphase_tbl[p[i + 1]] & 0xf) | ((biphase_tbl[p[i]] & 0xf) << 4);
546 dst[i / 2] = c;
547 }
548 return err & 0xf0;
549}
550
551static int saa7115_decode_wss(u8 * p)
552{
553 static const int wss_bits[8] = {
554 0, 0, 0, 1, 0, 1, 1, 1
555 };
556 unsigned char parity;
557 int wss = 0;
558 int i;
559
560 for (i = 0; i < 16; i++) {
561 int b1 = wss_bits[p[i] & 7];
562 int b2 = wss_bits[(p[i] >> 3) & 7];
563
564 if (b1 == b2)
565 return -1;
566 wss |= b2 << i;
567 }
568 parity = wss & 15;
569 parity ^= parity >> 2;
570 parity ^= parity >> 1;
571
572 if (!(parity & 1))
573 return -1;
574
575 return wss;
576}
577
578
3578d3dd 579static int saa7115_set_audio_clock_freq(struct i2c_client *client, u32 freq)
e19b2fcc
HV		 580{
581 struct saa7115_state *state = i2c_get_clientdata(client);
3578d3dd
HV		 582 u32 acpf;
583 u32 acni;
584 u32 hz;
585 u64 f;
e19b2fcc 586
f167cb4e 587 v4l_dbg(1, debug, client, "set audio clock freq: %d\n", freq);
3578d3dd
HV		 588
589 /* sanity check */
590 if (freq < 32000 || freq > 48000)
591 return -EINVAL;
592
593 /* hz is the refresh rate times 100 */
594 hz = (state->std & V4L2_STD_525_60) ? 5994 : 5000;
595 /* acpf = (256 * freq) / field_frequency == (256 * 100 * freq) / hz */
596 acpf = (25600 * freq) / hz;
597 /* acni = (256 * freq * 2^23) / crystal_frequency =
598 (freq * 2^(8+23)) / crystal_frequency =
599 (freq << 31) / 32.11 MHz */
600 f = freq;
601 f = f << 31;
602 do_div(f, 32110000);
603 acni = f;
604
605 saa7115_write(client, 0x30, acpf & 0xff);
606 saa7115_write(client, 0x31, (acpf >> 8) & 0xff);
607 saa7115_write(client, 0x32, (acpf >> 16) & 0x03);
608 saa7115_write(client, 0x34, acni & 0xff);
609 saa7115_write(client, 0x35, (acni >> 8) & 0xff);
610 saa7115_write(client, 0x36, (acni >> 16) & 0x3f);
e19b2fcc
HV		 611 state->audclk_freq = freq;
612 return 0;
613}
614
615static int saa7115_set_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
616{
617 struct saa7115_state *state = i2c_get_clientdata(client);
618
619 switch (ctrl->id) {
620 case V4L2_CID_BRIGHTNESS:
621 if (ctrl->value < 0 || ctrl->value > 255) {
fac9e899 622 v4l_err(client, "invalid brightness setting %d\n", ctrl->value);
e19b2fcc
HV		 623 return -ERANGE;
624 }
625
626 state->bright = ctrl->value;
627 saa7115_write(client, 0x0a, state->bright);
628 break;
629
630 case V4L2_CID_CONTRAST:
631 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 632 v4l_err(client, "invalid contrast setting %d\n", ctrl->value);
e19b2fcc
HV		 633 return -ERANGE;
634 }
635
636 state->contrast = ctrl->value;
637 saa7115_write(client, 0x0b, state->contrast);
638 break;
639
640 case V4L2_CID_SATURATION:
641 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 642 v4l_err(client, "invalid saturation setting %d\n", ctrl->value);
e19b2fcc
HV		 643 return -ERANGE;
644 }
645
646 state->sat = ctrl->value;
647 saa7115_write(client, 0x0c, state->sat);
648 break;
649
650 case V4L2_CID_HUE:
651 if (ctrl->value < -127 || ctrl->value > 127) {
fac9e899 652 v4l_err(client, "invalid hue setting %d\n", ctrl->value);
e19b2fcc
HV		 653 return -ERANGE;
654 }
655
656 state->hue = ctrl->value;
657 saa7115_write(client, 0x0d, state->hue);
658 break;
3faeeae4
HV		 659
660 default:
661 return -EINVAL;
e19b2fcc
HV		 662 }
663
664 return 0;
665}
666
667static int saa7115_get_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
668{
669 struct saa7115_state *state = i2c_get_clientdata(client);
670
671 switch (ctrl->id) {
672 case V4L2_CID_BRIGHTNESS:
673 ctrl->value = state->bright;
674 break;
675 case V4L2_CID_CONTRAST:
676 ctrl->value = state->contrast;
677 break;
678 case V4L2_CID_SATURATION:
679 ctrl->value = state->sat;
680 break;
681 case V4L2_CID_HUE:
682 ctrl->value = state->hue;
683 break;
684 default:
685 return -EINVAL;
686 }
687
688 return 0;
689}
690
691static void saa7115_set_v4lstd(struct i2c_client *client, v4l2_std_id std)
692{
693 struct saa7115_state *state = i2c_get_clientdata(client);
694 int taskb = saa7115_read(client, 0x80) & 0x10;
695
30b54d50
HV		 696 /* Prevent unnecessary standard changes. During a standard
697 change the I-Port is temporarily disabled. Any devices
698 reading from that port can get confused.
699 Note that VIDIOC_S_STD is also used to switch from
700 radio to TV mode, so if a VIDIOC_S_STD is broadcast to
701 all I2C devices then you do not want to have an unwanted
702 side-effect here. */
703 if (std == state->std)
704 return;
705
e19b2fcc
HV		 706 // This works for NTSC-M, SECAM-L and the 50Hz PAL variants.
707 if (std & V4L2_STD_525_60) {
f167cb4e 708 v4l_dbg(1, debug, client, "decoder set standard 60 Hz\n");
e19b2fcc
HV		 709 saa7115_writeregs(client, saa7115_cfg_60hz_video);
710 } else {
f167cb4e 711 v4l_dbg(1, debug, client, "decoder set standard 50 Hz\n");
e19b2fcc
HV		 712 saa7115_writeregs(client, saa7115_cfg_50hz_video);
713 }
714
f89982a9
MCC		 715 /* Register 0E - Bits D6-D4 on NO-AUTO mode
716 (SAA7113 doesn't have auto mode)
717 50 Hz / 625 lines 60 Hz / 525 lines
718 000 PAL BGDHI (4.43Mhz) NTSC M (3.58MHz)
719 001 NTSC 4.43 (50 Hz) PAL 4.43 (60 Hz)
720 010 Combination-PAL N (3.58MHz) NTSC 4.43 (60 Hz)
721 011 NTSC N (3.58MHz) PAL M (3.58MHz)
722 100 reserved NTSC-Japan (3.58MHz)
723 */
724 if (state->ident == V4L2_IDENT_SAA7113) {
725 u8 reg = saa7115_read(client, 0x0e) & 0x8f;
726
02c17224
MCC		 727 if (std == V4L2_STD_PAL_M) {
728 reg|=0x30;
729 } else if (std == V4L2_STD_PAL_N) {
730 reg|=0x20;
731 } else if (std == V4L2_STD_PAL_60) {
732 reg|=0x10;
733 } else if (std == V4L2_STD_NTSC_M_JP) {
734 reg|=0x40;
f89982a9
MCC		 735 }
736 saa7115_write(client, 0x0e, reg);
737 }
738
739
e19b2fcc
HV		 740 state->std = std;
741
742 /* restart task B if needed */
f5762e44 743 if (taskb && state->ident != V4L2_IDENT_SAA7115) {
e19b2fcc
HV		 744 saa7115_writeregs(client, saa7115_cfg_vbi_on);
745 }
746
747 /* switch audio mode too! */
748 saa7115_set_audio_clock_freq(client, state->audclk_freq);
749}
750
751static v4l2_std_id saa7115_get_v4lstd(struct i2c_client *client)
752{
753 struct saa7115_state *state = i2c_get_clientdata(client);
754
755 return state->std;
756}
757
758static void saa7115_log_status(struct i2c_client *client)
759{
e19b2fcc
HV		 760 struct saa7115_state *state = i2c_get_clientdata(client);
761 int reg1e, reg1f;
762 int signalOk;
763 int vcr;
764
fac9e899 765 v4l_info(client, "Audio frequency: %d Hz\n", state->audclk_freq);
f5762e44 766 if (state->ident != V4L2_IDENT_SAA7115) {
e19b2fcc
HV		 767 /* status for the saa7114 */
768 reg1f = saa7115_read(client, 0x1f);
769 signalOk = (reg1f & 0xc1) == 0x81;
fac9e899
HV		 770 v4l_info(client, "Video signal: %s\n", signalOk ? "ok" : "bad");
771 v4l_info(client, "Frequency: %s\n", (reg1f & 0x20) ? "60 Hz" : "50 Hz");
e19b2fcc
HV		 772 return;
773 }
774
775 /* status for the saa7115 */
776 reg1e = saa7115_read(client, 0x1e);
777 reg1f = saa7115_read(client, 0x1f);
778
779 signalOk = (reg1f & 0xc1) == 0x81 && (reg1e & 0xc0) == 0x80;
780 vcr = !(reg1f & 0x10);
781
21fa715e 782 if (state->input >= 6) {
fac9e899 783 v4l_info(client, "Input: S-Video %d\n", state->input - 6);
21fa715e 784 } else {
fac9e899 785 v4l_info(client, "Input: Composite %d\n", state->input);
21fa715e 786 }
fac9e899
HV		 787 v4l_info(client, "Video signal: %s\n", signalOk ? (vcr ? "VCR" : "broadcast/DVD") : "bad");
788 v4l_info(client, "Frequency: %s\n", (reg1f & 0x20) ? "60 Hz" : "50 Hz");
e19b2fcc
HV		 789
790 switch (reg1e & 0x03) {
791 case 1:
fac9e899 792 v4l_info(client, "Detected format: NTSC\n");
e19b2fcc
HV		 793 break;
794 case 2:
fac9e899 795 v4l_info(client, "Detected format: PAL\n");
e19b2fcc
HV		 796 break;
797 case 3:
fac9e899 798 v4l_info(client, "Detected format: SECAM\n");
e19b2fcc
HV		 799 break;
800 default:
fac9e899 801 v4l_info(client, "Detected format: BW/No color\n");
e19b2fcc
HV		 802 break;
803 }
804}
805
806/* setup the sliced VBI lcr registers according to the sliced VBI format */
807static void saa7115_set_lcr(struct i2c_client *client, struct v4l2_sliced_vbi_format *fmt)
808{
809 struct saa7115_state *state = i2c_get_clientdata(client);
810 int is_50hz = (state->std & V4L2_STD_625_50);
811 u8 lcr[24];
812 int i, x;
813
f5762e44
MCC		 814 /* saa7113/71144 doesn't yet support VBI */
815 if (state->ident != V4L2_IDENT_SAA7115)
e19b2fcc
HV		 816 return;
817
818 for (i = 0; i <= 23; i++)
819 lcr[i] = 0xff;
820
821 if (fmt->service_set == 0) {
822 /* raw VBI */
823 if (is_50hz)
824 for (i = 6; i <= 23; i++)
825 lcr[i] = 0xdd;
826 else
827 for (i = 10; i <= 21; i++)
828 lcr[i] = 0xdd;
829 } else {
830 /* sliced VBI */
831 /* first clear lines that cannot be captured */
832 if (is_50hz) {
833 for (i = 0; i <= 5; i++)
834 fmt->service_lines[0][i] =
835 fmt->service_lines[1][i] = 0;
836 }
837 else {
838 for (i = 0; i <= 9; i++)
839 fmt->service_lines[0][i] =
840 fmt->service_lines[1][i] = 0;
841 for (i = 22; i <= 23; i++)
842 fmt->service_lines[0][i] =
843 fmt->service_lines[1][i] = 0;
844 }
845
846 /* Now set the lcr values according to the specified service */
847 for (i = 6; i <= 23; i++) {
848 lcr[i] = 0;
849 for (x = 0; x <= 1; x++) {
850 switch (fmt->service_lines[1-x][i]) {
851 case 0:
852 lcr[i] |= 0xf << (4 * x);
853 break;
6ac48b45 854 case V4L2_SLICED_TELETEXT_PAL_B:
e19b2fcc
HV		 855 lcr[i] |= 1 << (4 * x);
856 break;
857 case V4L2_SLICED_CAPTION_525:
858 lcr[i] |= 4 << (4 * x);
859 break;
860 case V4L2_SLICED_WSS_625:
861 lcr[i] |= 5 << (4 * x);
862 break;
863 case V4L2_SLICED_VPS:
864 lcr[i] |= 7 << (4 * x);
865 break;
866 }
867 }
868 }
869 }
870
871 /* write the lcr registers */
872 for (i = 2; i <= 23; i++) {
873 saa7115_write(client, i - 2 + 0x41, lcr[i]);
874 }
875
876 /* enable/disable raw VBI capturing */
877 saa7115_writeregs(client, fmt->service_set == 0 ? saa7115_cfg_vbi_on : saa7115_cfg_vbi_off);
878}
879
880static int saa7115_get_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
881{
882 static u16 lcr2vbi[] = {
6ac48b45 883 0, V4L2_SLICED_TELETEXT_PAL_B, 0, /* 1 */
e19b2fcc
HV		 884 0, V4L2_SLICED_CAPTION_525, /* 4 */
885 V4L2_SLICED_WSS_625, 0, /* 5 */
886 V4L2_SLICED_VPS, 0, 0, 0, 0, /* 7 */
887 0, 0, 0, 0
888 };
889 struct v4l2_sliced_vbi_format *sliced = &fmt->fmt.sliced;
890 int i;
891
892 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
893 return -EINVAL;
894 memset(sliced, 0, sizeof(*sliced));
895 /* done if using raw VBI */
896 if (saa7115_read(client, 0x80) & 0x10)
897 return 0;
898 for (i = 2; i <= 23; i++) {
899 u8 v = saa7115_read(client, i - 2 + 0x41);
900
901 sliced->service_lines[0][i] = lcr2vbi[v >> 4];
902 sliced->service_lines[1][i] = lcr2vbi[v & 0xf];
903 sliced->service_set |=
904 sliced->service_lines[0][i] | sliced->service_lines[1][i];
905 }
906 return 0;
907}
908
909static int saa7115_set_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
910{
911 struct saa7115_state *state = i2c_get_clientdata(client);
912 struct v4l2_pix_format *pix;
913 int HPSC, HFSC;
914 int VSCY, Vsrc;
915 int is_50hz = state->std & V4L2_STD_625_50;
916
917 if (fmt->type == V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) {
918 saa7115_set_lcr(client, &fmt->fmt.sliced);
919 return 0;
920 }
921 if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
922 return -EINVAL;
923
924 pix = &(fmt->fmt.pix);
925
f167cb4e 926 v4l_dbg(1, debug, client, "decoder set size\n");
e19b2fcc
HV		 927
928 /* FIXME need better bounds checking here */
929 if ((pix->width < 1) || (pix->width > 1440))
930 return -EINVAL;
931 if ((pix->height < 1) || (pix->height > 960))
932 return -EINVAL;
933
934 /* probably have a valid size, let's set it */
935 /* Set output width/height */
936 /* width */
937 saa7115_write(client, 0xcc, (u8) (pix->width & 0xff));
938 saa7115_write(client, 0xcd, (u8) ((pix->width >> 8) & 0xff));
939 /* height */
940 saa7115_write(client, 0xce, (u8) (pix->height & 0xff));
941 saa7115_write(client, 0xcf, (u8) ((pix->height >> 8) & 0xff));
942
943 /* Scaling settings */
944 /* Hprescaler is floor(inres/outres) */
945 /* FIXME hardcoding input res */
946 if (pix->width != 720) {
947 HPSC = (int)(720 / pix->width);
948 /* 0 is not allowed (div. by zero) */
949 HPSC = HPSC ? HPSC : 1;
950 HFSC = (int)((1024 * 720) / (HPSC * pix->width));
951
f167cb4e 952 v4l_dbg(1, debug, client, "Hpsc: 0x%05x, Hfsc: 0x%05x\n", HPSC, HFSC);
e19b2fcc
HV		 953 /* FIXME hardcodes to "Task B"
954 * write H prescaler integer */
955 saa7115_write(client, 0xd0, (u8) (HPSC & 0x3f));
956
957 /* write H fine-scaling (luminance) */
958 saa7115_write(client, 0xd8, (u8) (HFSC & 0xff));
959 saa7115_write(client, 0xd9, (u8) ((HFSC >> 8) & 0xff));
960 /* write H fine-scaling (chrominance)
961 * must be lum/2, so i'll just bitshift :) */
962 saa7115_write(client, 0xDC, (u8) ((HFSC >> 1) & 0xff));
963 saa7115_write(client, 0xDD, (u8) ((HFSC >> 9) & 0xff));
964 } else {
965 if (is_50hz) {
f167cb4e 966 v4l_dbg(1, debug, client, "Setting full 50hz width\n");
e19b2fcc
HV		 967 saa7115_writeregs(client, saa7115_cfg_50hz_fullres_x);
968 } else {
f167cb4e 969 v4l_dbg(1, debug, client, "Setting full 60hz width\n");
e19b2fcc
HV		 970 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_x);
971 }
972 }
973
974 Vsrc = is_50hz ? 576 : 480;
975
976 if (pix->height != Vsrc) {
977 VSCY = (int)((1024 * Vsrc) / pix->height);
f167cb4e 978 v4l_dbg(1, debug, client, "Vsrc: %d, Vscy: 0x%05x\n", Vsrc, VSCY);
e19b2fcc
HV		 979
980 /* Correct Contrast and Luminance */
981 saa7115_write(client, 0xd5, (u8) (64 * 1024 / VSCY));
982 saa7115_write(client, 0xd6, (u8) (64 * 1024 / VSCY));
983
984 /* write V fine-scaling (luminance) */
985 saa7115_write(client, 0xe0, (u8) (VSCY & 0xff));
986 saa7115_write(client, 0xe1, (u8) ((VSCY >> 8) & 0xff));
987 /* write V fine-scaling (chrominance) */
988 saa7115_write(client, 0xe2, (u8) (VSCY & 0xff));
989 saa7115_write(client, 0xe3, (u8) ((VSCY >> 8) & 0xff));
990 } else {
991 if (is_50hz) {
f167cb4e 992 v4l_dbg(1, debug, client, "Setting full 50Hz height\n");
e19b2fcc
HV		 993 saa7115_writeregs(client, saa7115_cfg_50hz_fullres_y);
994 } else {
f167cb4e 995 v4l_dbg(1, debug, client, "Setting full 60hz height\n");
e19b2fcc
HV		 996 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_y);
997 }
998 }
999
1000 saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1001 return 0;
1002}
1003
1004/* Decode the sliced VBI data stream as created by the saa7115.
1005 The format is described in the saa7115 datasheet in Tables 25 and 26
1006 and in Figure 33.
1007 The current implementation uses SAV/EAV codes and not the ancillary data
1008 headers. The vbi->p pointer points to the SDID byte right after the SAV
1009 code. */
1010static void saa7115_decode_vbi_line(struct i2c_client *client,
1011 struct v4l2_decode_vbi_line *vbi)
1012{
1013 static const char vbi_no_data_pattern[] = {
1014 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0
1015 };
1016 struct saa7115_state *state = i2c_get_clientdata(client);
1017 u8 *p = vbi->p;
1018 u32 wss;
1019 int id1, id2; /* the ID1 and ID2 bytes from the internal header */
1020
1021 vbi->type = 0; /* mark result as a failure */
1022 id1 = p[2];
1023 id2 = p[3];
1024 /* Note: the field bit is inverted for 60 Hz video */
1025 if (state->std & V4L2_STD_525_60)
1026 id1 ^= 0x40;
1027
1028 /* Skip internal header, p now points to the start of the payload */
1029 p += 4;
1030 vbi->p = p;
1031
1032 /* calculate field and line number of the VBI packet (1-23) */
1033 vbi->is_second_field = ((id1 & 0x40) != 0);
1034 vbi->line = (id1 & 0x3f) << 3;
1035 vbi->line |= (id2 & 0x70) >> 4;
1036
1037 /* Obtain data type */
1038 id2 &= 0xf;
1039
1040 /* If the VBI slicer does not detect any signal it will fill up
1041 the payload buffer with 0xa0 bytes. */
1042 if (!memcmp(p, vbi_no_data_pattern, sizeof(vbi_no_data_pattern)))
1043 return;
1044
1045 /* decode payloads */
1046 switch (id2) {
1047 case 1:
6ac48b45 1048 vbi->type = V4L2_SLICED_TELETEXT_PAL_B;
e19b2fcc
HV		 1049 break;
1050 case 4:
1051 if (!saa7115_odd_parity(p[0]) || !saa7115_odd_parity(p[1]))
1052 return;
1053 vbi->type = V4L2_SLICED_CAPTION_525;
1054 break;
1055 case 5:
1056 wss = saa7115_decode_wss(p);
1057 if (wss == -1)
1058 return;
1059 p[0] = wss & 0xff;
1060 p[1] = wss >> 8;
1061 vbi->type = V4L2_SLICED_WSS_625;
1062 break;
1063 case 7:
1064 if (saa7115_decode_vps(p, p) != 0)
1065 return;
1066 vbi->type = V4L2_SLICED_VPS;
1067 break;
1068 default:
1069 return;
1070 }
1071}
1072
1073/* ============ SAA7115 AUDIO settings (end) ============= */
1074
da4ae5a7
HV		 1075static struct v4l2_queryctrl saa7115_qctrl[] = {
1076 {
1077 .id = V4L2_CID_BRIGHTNESS,
1078 .type = V4L2_CTRL_TYPE_INTEGER,
1079 .name = "Brightness",
1080 .minimum = 0,
1081 .maximum = 255,
1082 .step = 1,
1083 .default_value = 128,
1084 .flags = 0,
1085 }, {
1086 .id = V4L2_CID_CONTRAST,
1087 .type = V4L2_CTRL_TYPE_INTEGER,
1088 .name = "Contrast",
1089 .minimum = 0,
ecc0b947 1090 .maximum = 127,
da4ae5a7
HV		 1091 .step = 1,
1092 .default_value = 64,
1093 .flags = 0,
1094 }, {
1095 .id = V4L2_CID_SATURATION,
1096 .type = V4L2_CTRL_TYPE_INTEGER,
1097 .name = "Saturation",
1098 .minimum = 0,
ecc0b947 1099 .maximum = 127,
da4ae5a7
HV		 1100 .step = 1,
1101 .default_value = 64,
1102 .flags = 0,
1103 }, {
1104 .id = V4L2_CID_HUE,
1105 .type = V4L2_CTRL_TYPE_INTEGER,
1106 .name = "Hue",
1107 .minimum = -128,
1108 .maximum = 127,
1109 .step = 1,
1110 .default_value = 0,
1111 .flags = 0,
1112 },
1113};
1114
1115/* ----------------------------------------------------------------------- */
1116
e19b2fcc
HV		 1117static int saa7115_command(struct i2c_client *client, unsigned int cmd, void *arg)
1118{
1119 struct saa7115_state *state = i2c_get_clientdata(client);
1120 int *iarg = arg;
1121
1122 /* ioctls to allow direct access to the saa7115 registers for testing */
1123 switch (cmd) {
1124 case VIDIOC_S_FMT:
1125 return saa7115_set_v4lfmt(client, (struct v4l2_format *)arg);
1126
1127 case VIDIOC_G_FMT:
1128 return saa7115_get_v4lfmt(client, (struct v4l2_format *)arg);
1129
1130 case VIDIOC_INT_AUDIO_CLOCK_FREQ:
3578d3dd 1131 return saa7115_set_audio_clock_freq(client, *(u32 *)arg);
e19b2fcc
HV		 1132
1133 case VIDIOC_G_TUNER:
1134 {
1135 struct v4l2_tuner *vt = arg;
1136 int status;
1137
3faeeae4
HV		 1138 if (state->radio)
1139 break;
e19b2fcc
HV		 1140 status = saa7115_read(client, 0x1f);
1141
f167cb4e 1142 v4l_dbg(1, debug, client, "status: 0x%02x\n", status);
e19b2fcc
HV		 1143 vt->signal = ((status & (1 << 6)) == 0) ? 0xffff : 0x0;
1144 break;
1145 }
1146
1147 case VIDIOC_LOG_STATUS:
1148 saa7115_log_status(client);
1149 break;
1150
1151 case VIDIOC_G_CTRL:
1152 return saa7115_get_v4lctrl(client, (struct v4l2_control *)arg);
1153
1154 case VIDIOC_S_CTRL:
1155 return saa7115_set_v4lctrl(client, (struct v4l2_control *)arg);
1156
da4ae5a7
HV		 1157 case VIDIOC_QUERYCTRL:
1158 {
1159 struct v4l2_queryctrl *qc = arg;
1160 int i;
1161
1162 for (i = 0; i < ARRAY_SIZE(saa7115_qctrl); i++)
1163 if (qc->id && qc->id == saa7115_qctrl[i].id) {
1164 memcpy(qc, &saa7115_qctrl[i], sizeof(*qc));
1165 return 0;
1166 }
1167 return -EINVAL;
1168 }
1169
e19b2fcc
HV		 1170 case VIDIOC_G_STD:
1171 *(v4l2_std_id *)arg = saa7115_get_v4lstd(client);
1172 break;
1173
1174 case VIDIOC_S_STD:
3faeeae4 1175 state->radio = 0;
e19b2fcc
HV		 1176 saa7115_set_v4lstd(client, *(v4l2_std_id *)arg);
1177 break;
1178
3faeeae4
HV		 1179 case AUDC_SET_RADIO:
1180 state->radio = 1;
1181 break;
1182
e19b2fcc
HV		 1183 case VIDIOC_G_INPUT:
1184 *(int *)arg = state->input;
1185 break;
1186
1187 case VIDIOC_S_INPUT:
f167cb4e 1188 v4l_dbg(1, debug, client, "decoder set input %d\n", *iarg);
e19b2fcc
HV		 1189 /* inputs from 0-9 are available */
1190 if (*iarg < 0 || *iarg > 9) {
1191 return -EINVAL;
1192 }
1193
1194 if (state->input == *iarg)
1195 break;
f167cb4e 1196 v4l_dbg(1, debug, client, "now setting %s input\n",
e19b2fcc
HV		 1197 *iarg >= 6 ? "S-Video" : "Composite");
1198 state->input = *iarg;
1199
1200 /* select mode */
1201 saa7115_write(client, 0x02,
1202 (saa7115_read(client, 0x02) & 0xf0) |
1203 state->input);
1204
1205 /* bypass chrominance trap for modes 6..9 */
1206 saa7115_write(client, 0x09,
1207 (saa7115_read(client, 0x09) & 0x7f) |
1208 (state->input < 6 ? 0x0 : 0x80));
1209 break;
1210
1211 case VIDIOC_STREAMON:
1212 case VIDIOC_STREAMOFF:
f167cb4e 1213 v4l_dbg(1, debug, client, "%s output\n",
e19b2fcc
HV		 1214 (cmd == VIDIOC_STREAMON) ? "enable" : "disable");
1215
1216 if (state->enable != (cmd == VIDIOC_STREAMON)) {
1217 state->enable = (cmd == VIDIOC_STREAMON);
1218 saa7115_write(client, 0x87, state->enable);
1219 }
1220 break;
1221
1222 case VIDIOC_INT_DECODE_VBI_LINE:
1223 saa7115_decode_vbi_line(client, arg);
1224 break;
1225
1226 case VIDIOC_INT_RESET:
f167cb4e 1227 v4l_dbg(1, debug, client, "decoder RESET\n");
e19b2fcc
HV		 1228 saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1229 break;
1230
1231 case VIDIOC_INT_G_VBI_DATA:
1232 {
1233 struct v4l2_sliced_vbi_data *data = arg;
1234
1235 switch (data->id) {
1236 case V4L2_SLICED_WSS_625:
1237 if (saa7115_read(client, 0x6b) & 0xc0)
1238 return -EIO;
1239 data->data[0] = saa7115_read(client, 0x6c);
1240 data->data[1] = saa7115_read(client, 0x6d);
1241 return 0;
1242 case V4L2_SLICED_CAPTION_525:
1243 if (data->field == 0) {
1244 /* CC */
1245 if (saa7115_read(client, 0x66) & 0xc0)
1246 return -EIO;
1247 data->data[0] = saa7115_read(client, 0x67);
1248 data->data[1] = saa7115_read(client, 0x68);
1249 return 0;
1250 }
1251 /* XDS */
1252 if (saa7115_read(client, 0x66) & 0x30)
1253 return -EIO;
1254 data->data[0] = saa7115_read(client, 0x69);
1255 data->data[1] = saa7115_read(client, 0x6a);
1256 return 0;
1257 default:
1258 return -EINVAL;
1259 }
1260 break;
1261 }
1262
1263#ifdef CONFIG_VIDEO_ADV_DEBUG
1264 case VIDIOC_INT_G_REGISTER:
1265 {
1266 struct v4l2_register *reg = arg;
1267
1268 if (reg->i2c_id != I2C_DRIVERID_SAA711X)
1269 return -EINVAL;
1270 reg->val = saa7115_read(client, reg->reg & 0xff);
1271 break;
1272 }
1273
1274 case VIDIOC_INT_S_REGISTER:
1275 {
1276 struct v4l2_register *reg = arg;
1277
1278 if (reg->i2c_id != I2C_DRIVERID_SAA711X)
1279 return -EINVAL;
1280 if (!capable(CAP_SYS_ADMIN))
1281 return -EPERM;
1282 saa7115_write(client, reg->reg & 0xff, reg->val & 0xff);
1283 break;
1284 }
1285#endif
1286
1287 case VIDIOC_INT_G_CHIP_IDENT:
1288 *iarg = state->ident;
1289 break;
1290
1291 default:
1292 return -EINVAL;
1293 }
1294
1295 return 0;
1296}
1297
1298/* ----------------------------------------------------------------------- */
1299
1300static struct i2c_driver i2c_driver_saa7115;
1301
1302static int saa7115_attach(struct i2c_adapter *adapter, int address, int kind)
1303{
1304 struct i2c_client *client;
1305 struct saa7115_state *state;
1306 u8 chip_id;
1307
1308 /* Check if the adapter supports the needed features */
1309 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1310 return 0;
1311
7408187d 1312 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
e19b2fcc
HV		 1313 if (client == 0)
1314 return -ENOMEM;
e19b2fcc
HV		 1315 client->addr = address;
1316 client->adapter = adapter;
1317 client->driver = &i2c_driver_saa7115;
e19b2fcc
HV		 1318 snprintf(client->name, sizeof(client->name) - 1, "saa7115");
1319
f167cb4e 1320 v4l_dbg(1, debug, client, "detecting saa7115 client on address 0x%x\n", address << 1);
e19b2fcc
HV		 1321
1322 saa7115_write(client, 0, 5);
1323 chip_id = saa7115_read(client, 0) & 0x0f;
f5762e44 1324 if (chip_id <3 && chip_id > 5) {
f167cb4e 1325 v4l_dbg(1, debug, client, "saa7115 not found\n");
e19b2fcc
HV		 1326 kfree(client);
1327 return 0;
1328 }
f5762e44 1329 snprintf(client->name, sizeof(client->name) - 1, "saa711%d",chip_id);
fac9e899 1330 v4l_info(client, "saa711%d found @ 0x%x (%s)\n", chip_id, address << 1, adapter->name);
e19b2fcc 1331
7408187d 1332 state = kzalloc(sizeof(struct saa7115_state), GFP_KERNEL);
e19b2fcc
HV		 1333 i2c_set_clientdata(client, state);
1334 if (state == NULL) {
1335 kfree(client);
1336 return -ENOMEM;
1337 }
e19b2fcc
HV		 1338 state->std = V4L2_STD_NTSC;
1339 state->input = -1;
1340 state->enable = 1;
3faeeae4 1341 state->radio = 0;
e19b2fcc
HV		 1342 state->bright = 128;
1343 state->contrast = 64;
1344 state->hue = 0;
1345 state->sat = 64;
f5762e44
MCC		 1346 switch (chip_id) {
1347 case 3:
1348 state->ident = V4L2_IDENT_SAA7113;
1349 break;
1350 case 4:
1351 state->ident = V4L2_IDENT_SAA7114;
1352 break;
1353 default:
1354 state->ident = V4L2_IDENT_SAA7115;
1355 break;
1356 }
1357
3578d3dd 1358 state->audclk_freq = 48000;
e19b2fcc 1359
f167cb4e 1360 v4l_dbg(1, debug, client, "writing init values\n");
e19b2fcc
HV		 1361
1362 /* init to 60hz/48khz */
f5762e44
MCC		 1363 if (state->ident==V4L2_IDENT_SAA7113)
1364 saa7115_writeregs(client, saa7113_init_auto_input);
1365 else
1366 saa7115_writeregs(client, saa7115_init_auto_input);
e19b2fcc
HV		 1367 saa7115_writeregs(client, saa7115_init_misc);
1368 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_x);
1369 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_y);
1370 saa7115_writeregs(client, saa7115_cfg_60hz_video);
3578d3dd 1371 saa7115_set_audio_clock_freq(client, state->audclk_freq);
e19b2fcc
HV		 1372 saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1373
1374 i2c_attach_client(client);
1375
f167cb4e 1376 v4l_dbg(1, debug, client, "status: (1E) 0x%02x, (1F) 0x%02x\n",
e19b2fcc
HV		 1377 saa7115_read(client, 0x1e), saa7115_read(client, 0x1f));
1378
1379 return 0;
1380}
1381
1382static int saa7115_probe(struct i2c_adapter *adapter)
1383{
e19b2fcc 1384 if (adapter->class & I2C_CLASS_TV_ANALOG)
e19b2fcc
HV		 1385 return i2c_probe(adapter, &addr_data, &saa7115_attach);
1386 return 0;
1387}
1388
1389static int saa7115_detach(struct i2c_client *client)
1390{
1391 struct saa7115_state *state = i2c_get_clientdata(client);
1392 int err;
1393
1394 err = i2c_detach_client(client);
1395 if (err) {
1396 return err;
1397 }
1398
1399 kfree(state);
1400 kfree(client);
1401 return 0;
1402}
1403
1404/* ----------------------------------------------------------------------- */
1405
1406/* i2c implementation */
1407static struct i2c_driver i2c_driver_saa7115 = {
604f28e2 1408 .driver = {
604f28e2
LR		 1409 .name = "saa7115",
1410 },
e19b2fcc 1411 .id = I2C_DRIVERID_SAA711X,
e19b2fcc
HV		 1412 .attach_adapter = saa7115_probe,
1413 .detach_client = saa7115_detach,
1414 .command = saa7115_command,
e19b2fcc
HV		 1415};
1416
1417
1418static int __init saa7115_init_module(void)
1419{
1420 return i2c_add_driver(&i2c_driver_saa7115);
1421}
1422
1423static void __exit saa7115_cleanup_module(void)
1424{
1425 i2c_del_driver(&i2c_driver_saa7115);
1426}
1427
1428module_init(saa7115_init_module);
1429module_exit(saa7115_cleanup_module);
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