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V4L/DVB (3521): Avoid warnings at video-buf.c
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / saa7115.c
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f5762e44 1/* saa7115 - Philips SAA7113/SAA7114/SAA7115 video decoder driver
e19b2fcc
HV		 2 *
3 * Based on saa7114 driver by Maxim Yevtyushkin, which is based on
4 * the saa7111 driver by Dave Perks.
5 *
6 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
7 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
8 *
9 * Slight changes for video timing and attachment output by
10 * Wolfgang Scherr <scherr@net4you.net>
11 *
12 * Moved over to the linux >= 2.4.x i2c protocol (1/1/2003)
13 * by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 *
15 * Added saa7115 support by Kevin Thayer <nufan_wfk at yahoo.com>
16 * (2/17/2003)
17 *
18 * VBI support (2004) and cleanups (2005) by Hans Verkuil <hverkuil@xs4all.nl>
f5762e44 19 * SAA7113 support by Mauro Carvalho Chehab <mchehab@infradead.org>
e19b2fcc
HV		 20 *
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version 2
24 * of the License, or (at your option) any later version.
25 *
26 * This program is distributed in the hope that it will be useful,
27 * but WITHOUT ANY WARRANTY; without even the implied warranty of
28 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
29 * GNU General Public License for more details.
30 *
31 * You should have received a copy of the GNU General Public License
32 * along with this program; if not, write to the Free Software
33 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
34 */
35
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/slab.h>
40#include <linux/i2c.h>
41#include <linux/videodev2.h>
e19b2fcc 42#include <media/v4l2-common.h>
c7f3612c 43#include <media/audiochip.h>
3578d3dd 44#include <asm/div64.h>
e19b2fcc 45
f5762e44
MCC		 46MODULE_DESCRIPTION("Philips SAA7113/SAA7114/SAA7115 video decoder driver");
47MODULE_AUTHOR( "Maxim Yevtyushkin, Kevin Thayer, Chris Kennedy, "
48 "Hans Verkuil, Mauro Carvalho Chehab");
e19b2fcc
HV		 49MODULE_LICENSE("GPL");
50
51static int debug = 0;
fac9e899 52module_param(debug, bool, 0644);
e19b2fcc
HV		 53
54MODULE_PARM_DESC(debug, "Debug level (0-1)");
55
f5762e44
MCC		 56static unsigned short normal_i2c[] = {
57 0x4a >>1, 0x48 >>1, /* SAA7113 */
58 0x42 >> 1, 0x40 >> 1, /* SAA7114 and SAA7115 */
59 I2C_CLIENT_END };
e19b2fcc
HV		 60
61
62I2C_CLIENT_INSMOD;
63
64struct saa7115_state {
65 v4l2_std_id std;
66 int input;
67 int enable;
3faeeae4 68 int radio;
e19b2fcc
HV		 69 int bright;
70 int contrast;
71 int hue;
72 int sat;
73 enum v4l2_chip_ident ident;
3578d3dd 74 u32 audclk_freq;
e19b2fcc
HV		 75};
76
77/* ----------------------------------------------------------------------- */
78
79static inline int saa7115_write(struct i2c_client *client, u8 reg, u8 value)
80{
81 return i2c_smbus_write_byte_data(client, reg, value);
82}
83
84static int saa7115_writeregs(struct i2c_client *client, const unsigned char *regs)
85{
86 unsigned char reg, data;
87
88 while (*regs != 0x00) {
89 reg = *(regs++);
90 data = *(regs++);
91 if (saa7115_write(client, reg, data) < 0)
92 return -1;
93 }
94 return 0;
95}
96
97static inline int saa7115_read(struct i2c_client *client, u8 reg)
98{
99 return i2c_smbus_read_byte_data(client, reg);
100}
101
102/* ----------------------------------------------------------------------- */
103
104/* If a value differs from the Hauppauge driver values, then the comment starts with
105 'was 0xXX' to denote the Hauppauge value. Otherwise the value is identical to what the
106 Hauppauge driver sets. */
107
108static const unsigned char saa7115_init_auto_input[] = {
f5762e44 109 /* Front-End Part */
e19b2fcc
HV		 110 0x01, 0x48, /* white peak control disabled */
111 0x03, 0x20, /* was 0x30. 0x20: long vertical blanking */
112 0x04, 0x90, /* analog gain set to 0 */
113 0x05, 0x90, /* analog gain set to 0 */
f5762e44 114 /* Decoder Part */
e19b2fcc
HV		 115 0x06, 0xeb, /* horiz sync begin = -21 */
116 0x07, 0xe0, /* horiz sync stop = -17 */
117 0x0a, 0x80, /* was 0x88. decoder brightness, 0x80 is itu standard */
118 0x0b, 0x44, /* was 0x48. decoder contrast, 0x44 is itu standard */
119 0x0c, 0x40, /* was 0x47. decoder saturation, 0x40 is itu standard */
120 0x0d, 0x00, /* chrominance hue control */
121 0x0f, 0x00, /* chrominance gain control: use automicatic mode */
122 0x10, 0x06, /* chrominance/luminance control: active adaptive combfilter */
123 0x11, 0x00, /* delay control */
124 0x12, 0x9d, /* RTS0 output control: VGATE */
125 0x13, 0x80, /* X-port output control: ITU656 standard mode, RTCO output enable RTCE */
126 0x14, 0x00, /* analog/ADC/auto compatibility control */
127 0x18, 0x40, /* raw data gain 0x00 = nominal */
128 0x19, 0x80, /* raw data offset 0x80 = 0 LSB */
129 0x1a, 0x77, /* color killer level control 0x77 = recommended */
130 0x1b, 0x42, /* misc chroma control 0x42 = recommended */
131 0x1c, 0xa9, /* combfilter control 0xA9 = recommended */
132 0x1d, 0x01, /* combfilter control 0x01 = recommended */
f5762e44
MCC		 133
134 /* Power Device Control */
e19b2fcc
HV		 135 0x88, 0xd0, /* reset device */
136 0x88, 0xf0, /* set device programmed, all in operational mode */
137 0x00, 0x00
138};
139
140static const unsigned char saa7115_cfg_reset_scaler[] = {
141 0x87, 0x00, /* disable I-port output */
142 0x88, 0xd0, /* reset scaler */
143 0x88, 0xf0, /* activate scaler */
144 0x87, 0x01, /* enable I-port output */
145 0x00, 0x00
146};
147
148/* ============== SAA7715 VIDEO templates ============= */
149
150static const unsigned char saa7115_cfg_60hz_fullres_x[] = {
151 0xcc, 0xd0, /* hsize low (output), hor. output window size = 0x2d0 = 720 */
152 0xcd, 0x02, /* hsize hi (output) */
153
154 /* Why not in 60hz-Land, too? */
155 0xd0, 0x01, /* downscale = 1 */
156 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
157 0xd9, 0x04,
158 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
159 0xdd, 0x02, /* H-scaling incr chroma */
160
161 0x00, 0x00
162};
163static const unsigned char saa7115_cfg_60hz_fullres_y[] = {
164 0xce, 0xf8, /* vsize low (output), ver. output window size = 248 (but 60hz is 240?) */
165 0xcf, 0x00, /* vsize hi (output) */
166
167 /* Why not in 60hz-Land, too? */
168 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
169 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
170
171 0xe0, 0x00, /* V-scaling incr luma low */
172 0xe1, 0x04, /* " hi */
173 0xe2, 0x00, /* V-scaling incr chroma low */
174 0xe3, 0x04, /* " hi */
175
176 0x00, 0x00
177};
178
179static const unsigned char saa7115_cfg_60hz_video[] = {
180 0x80, 0x00, /* reset tasks */
181 0x88, 0xd0, /* reset scaler */
182
183 0x15, 0x03, /* VGATE pulse start */
184 0x16, 0x11, /* VGATE pulse stop */
185 0x17, 0x9c, /* VGATE MSB and other values */
186
187 0x08, 0x68, /* 0xBO: auto detection, 0x68 = NTSC */
188 0x0e, 0x07, /* lots of different stuff... video autodetection is on */
189
190 0x5a, 0x06, /* Vertical offset, standard 60hz value for ITU656 line counting */
191
192 /* Task A */
193 0x90, 0x80, /* Task Handling Control */
194 0x91, 0x48, /* X-port formats/config */
195 0x92, 0x40, /* Input Ref. signal Def. */
196 0x93, 0x84, /* I-port config */
197 0x94, 0x01, /* hoffset low (input), 0x0002 is minimum */
198 0x95, 0x00, /* hoffset hi (input) */
199 0x96, 0xd0, /* hsize low (input), 0x02d0 = 720 */
200 0x97, 0x02, /* hsize hi (input) */
201 0x98, 0x05, /* voffset low (input) */
202 0x99, 0x00, /* voffset hi (input) */
203 0x9a, 0x0c, /* vsize low (input), 0x0c = 12 */
204 0x9b, 0x00, /* vsize hi (input) */
205 0x9c, 0xa0, /* hsize low (output), 0x05a0 = 1440 */
206 0x9d, 0x05, /* hsize hi (output) */
207 0x9e, 0x0c, /* vsize low (output), 0x0c = 12 */
208 0x9f, 0x00, /* vsize hi (output) */
209
210 /* Task B */
211 0xc0, 0x00, /* Task Handling Control */
212 0xc1, 0x08, /* X-port formats/config */
213 0xc2, 0x00, /* Input Ref. signal Def. */
214 0xc3, 0x80, /* I-port config */
215 0xc4, 0x02, /* hoffset low (input), 0x0002 is minimum */
216 0xc5, 0x00, /* hoffset hi (input) */
217 0xc6, 0xd0, /* hsize low (input), 0x02d0 = 720 */
218 0xc7, 0x02, /* hsize hi (input) */
219 0xc8, 0x12, /* voffset low (input), 0x12 = 18 */
220 0xc9, 0x00, /* voffset hi (input) */
221 0xca, 0xf8, /* vsize low (input), 0xf8 = 248 */
222 0xcb, 0x00, /* vsize hi (input) */
223 0xcc, 0xd0, /* hsize low (output), 0x02d0 = 720 */
224 0xcd, 0x02, /* hsize hi (output) */
225
226 0xf0, 0xad, /* Set PLL Register. 60hz 525 lines per frame, 27 MHz */
227 0xf1, 0x05, /* low bit with 0xF0 */
228 0xf5, 0xad, /* Set pulse generator register */
229 0xf6, 0x01,
230
231 0x87, 0x00, /* Disable I-port output */
232 0x88, 0xd0, /* reset scaler */
233 0x80, 0x20, /* Activate only task "B", continuous mode (was 0xA0) */
234 0x88, 0xf0, /* activate scaler */
235 0x87, 0x01, /* Enable I-port output */
236 0x00, 0x00
237};
238
239static const unsigned char saa7115_cfg_50hz_fullres_x[] = {
240 0xcc, 0xd0, /* hsize low (output), 720 same as 60hz */
241 0xcd, 0x02, /* hsize hi (output) */
242
243 0xd0, 0x01, /* down scale = 1 */
244 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
245 0xd9, 0x04,
246 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
247 0xdd, 0x02, /* H-scaling incr chroma */
248
249 0x00, 0x00
250};
251static const unsigned char saa7115_cfg_50hz_fullres_y[] = {
252 0xce, 0x20, /* vsize low (output), 0x0120 = 288 */
253 0xcf, 0x01, /* vsize hi (output) */
254
255 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
256 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
257
258 0xe0, 0x00, /* V-scaling incr luma low */
259 0xe1, 0x04, /* " hi */
260 0xe2, 0x00, /* V-scaling incr chroma low */
261 0xe3, 0x04, /* " hi */
262
263 0x00, 0x00
264};
265
266static const unsigned char saa7115_cfg_50hz_video[] = {
267 0x80, 0x00, /* reset tasks */
268 0x88, 0xd0, /* reset scaler */
269
270 0x15, 0x37, /* VGATE start */
271 0x16, 0x16, /* VGATE stop */
272 0x17, 0x99, /* VGATE MSB and other values */
273
274 0x08, 0x28, /* 0x28 = PAL */
275 0x0e, 0x07, /* chrominance control 1 */
276
277 0x5a, 0x03, /* Vertical offset, standard 50hz value */
278
279 /* Task A */
280 0x90, 0x81, /* Task Handling Control */
281 0x91, 0x48, /* X-port formats/config */
282 0x92, 0x40, /* Input Ref. signal Def. */
283 0x93, 0x84, /* I-port config */
284 /* This is weird: the datasheet says that you should use 2 as the minimum value, */
285 /* but Hauppauge uses 0, and changing that to 2 causes indeed problems (for 50hz) */
286 0x94, 0x00, /* hoffset low (input), 0x0002 is minimum */
287 0x95, 0x00, /* hoffset hi (input) */
288 0x96, 0xd0, /* hsize low (input), 0x02d0 = 720 */
289 0x97, 0x02, /* hsize hi (input) */
290 0x98, 0x03, /* voffset low (input) */
291 0x99, 0x00, /* voffset hi (input) */
292 0x9a, 0x12, /* vsize low (input), 0x12 = 18 */
293 0x9b, 0x00, /* vsize hi (input) */
294 0x9c, 0xa0, /* hsize low (output), 0x05a0 = 1440 */
295 0x9d, 0x05, /* hsize hi (output) */
296 0x9e, 0x12, /* vsize low (output), 0x12 = 18 */
297 0x9f, 0x00, /* vsize hi (output) */
298
299 /* Task B */
300 0xc0, 0x00, /* Task Handling Control */
301 0xc1, 0x08, /* X-port formats/config */
302 0xc2, 0x00, /* Input Ref. signal Def. */
303 0xc3, 0x80, /* I-port config */
304 0xc4, 0x00, /* hoffset low (input), 0x0002 is minimum. See comment at 0x94 above. */
305 0xc5, 0x00, /* hoffset hi (input) */
306 0xc6, 0xd0, /* hsize low (input), 0x02d0 = 720 */
307 0xc7, 0x02, /* hsize hi (input) */
308 0xc8, 0x16, /* voffset low (input), 0x16 = 22 */
309 0xc9, 0x00, /* voffset hi (input) */
310 0xca, 0x20, /* vsize low (input), 0x0120 = 288 */
311 0xcb, 0x01, /* vsize hi (input) */
312 0xcc, 0xd0, /* hsize low (output), 0x02d0 = 720 */
313 0xcd, 0x02, /* hsize hi (output) */
314 0xce, 0x20, /* vsize low (output), 0x0120 = 288 */
315 0xcf, 0x01, /* vsize hi (output) */
316
317 0xf0, 0xb0, /* Set PLL Register. 50hz 625 lines per frame, 27 MHz */
318 0xf1, 0x05, /* low bit with 0xF0, (was 0x05) */
319 0xf5, 0xb0, /* Set pulse generator register */
320 0xf6, 0x01,
321
322 0x87, 0x00, /* Disable I-port output */
323 0x88, 0xd0, /* reset scaler (was 0xD0) */
324 0x80, 0x20, /* Activate only task "B" */
325 0x88, 0xf0, /* activate scaler */
326 0x87, 0x01, /* Enable I-port output */
327 0x00, 0x00
328};
329
330/* ============== SAA7715 VIDEO templates (end) ======= */
331
332static const unsigned char saa7115_cfg_vbi_on[] = {
333 0x80, 0x00, /* reset tasks */
334 0x88, 0xd0, /* reset scaler */
335 0x80, 0x30, /* Activate both tasks */
336 0x88, 0xf0, /* activate scaler */
337 0x87, 0x01, /* Enable I-port output */
338 0x00, 0x00
339};
340
341static const unsigned char saa7115_cfg_vbi_off[] = {
342 0x80, 0x00, /* reset tasks */
343 0x88, 0xd0, /* reset scaler */
344 0x80, 0x20, /* Activate only task "B" */
345 0x88, 0xf0, /* activate scaler */
346 0x87, 0x01, /* Enable I-port output */
347 0x00, 0x00
348};
349
f5762e44
MCC		 350static const unsigned char saa7113_init_auto_input[] = {
351 0x01, 0x08, /* PH7113_INCREMENT_DELAY - (1) (1) (1) (1) IDEL3 IDEL2 IDELL1 IDEL0 */
352 0x02, 0xc2, /* PH7113_ANALOG_INPUT_CONTR_1 - FUSE1 FUSE0 GUDL1 GUDL0 MODE3 MODE2 MODE1 MODE0 */
353 0x03, 0x30, /* PH7113_ANALOG_INPUT_CONTR_2 - (1) HLNRS VBSL WPOFF HOLDG GAFIX GAI28 GAI18 */
354 0x04, 0x00, /* PH7113_ANALOG_INPUT_CONTR_3 - GAI17 GAI16 GAI15 GAI14 GAI13 GAI12 GAI11 GAI10 */
355 0x05, 0x00, /* PH7113_ANALOG_INPUT_CONTR_4 - GAI27 GAI26 GAI25 GAI24 GAI23 GAI22 GAI21 GAI20 */
356 0x06, 0x89, /* PH7113_HORIZONTAL_SYNC_START - HSB7 HSB6 HSB5 HSB4 HSB3 HSB2 HSB1 HSB0 */
357 0x07, 0x0d, /* PH7113_HORIZONTAL_SYNC_STOP - HSS7 HSS6 HSS5 HSS4 HSS3 HSS2 HSS1 HSS0 */
358 0x08, 0x88, /* PH7113_SYNC_CONTROL - AUFD FSEL FOET HTC1 HTC0 HPLL VNOI1 VNOI0 */
359 0x09, 0x01, /* PH7113_LUMINANCE_CONTROL - BYPS PREF BPSS1 BPSS0 VBLB UPTCV APER1 APER0 */
360 0x0a, 0x80, /* PH7113_LUMINANCE_BRIGHTNESS - BRIG7 BRIG6 BRIG5 BRIG4 BRIG3 BRIG2 BRIG1 BRIG0 */
361 0x0b, 0x47, /* PH7113_LUMINANCE_CONTRAST - CONT7 CONT6 CONT5 CONT4 CONT3 CONT2 CONT1 CONT0 */
362 0x0c, 0x40, /* PH7113_CHROMA_SATURATION - SATN7 SATN6 SATN5 SATN4 SATN3 SATN2 SATN1 SATN0 */
363 0x0d, 0x00, /* PH7113_CHROMA_HUE_CONTROL - HUEC7 HUEC6 HUEC5 HUEC4 HUEC3 HUEC2 HUEC1 HUEC0 */
364 0x0e, 0x01, /* PH7113_CHROMA_CONTROL - CDTO CSTD2 CSTD1 CSTD0 DCCF FCTC CHBW1 CHBW0 */
365 0x0f, 0x2a, /* PH7113_CHROMA_GAIN_CONTROL - ACGC CGAIN6 CGAIN5 CGAIN4 CGAIN3 CGAIN2 CGAIN1 CGAIN0 */
366 0x10, 0x08, /* PH7113_FORMAT_DELAY_CONTROL - OFTS1 OFTS0 HDEL1 HDEL0 VRLN YDEL2 YDEL1 YDEL0 */
367 0x11, 0x0c, /* PH7113_OUTPUT_CONTROL_1 - GPSW1 CM99 GPSW0 HLSEL OEYC OERT VIPB COLO */
368 0x12, 0x07, /* PH7113_OUTPUT_CONTROL_2 - RTSE13 RTSE12 RTSE11 RTSE10 RTSE03 RTSE02 RTSE01 RTSE00 */
369 0x13, 0x00, /* PH7113_OUTPUT_CONTROL_3 - ADLSB (1) (1) OLDSB FIDP (1) AOSL1 AOSL0 */
370 0x14, 0x00, /* RESERVED 14 - (1) (1) (1) (1) (1) (1) (1) (1) */
371 0x15, 0x00, /* PH7113_V_GATE1_START - VSTA7 VSTA6 VSTA5 VSTA4 VSTA3 VSTA2 VSTA1 VSTA0 */
372 0x16, 0x00, /* PH7113_V_GATE1_STOP - VSTO7 VSTO6 VSTO5 VSTO4 VSTO3 VSTO2 VSTO1 VSTO0 */
373 0x17, 0x00, /* PH7113_V_GATE1_MSB - (1) (1) (1) (1) (1) (1) VSTO8 VSTA8 */
374 0x00, 0x00
375};
376
e19b2fcc
HV		 377static const unsigned char saa7115_init_misc[] = {
378 0x38, 0x03, /* audio stuff */
379 0x39, 0x10,
380 0x3a, 0x08,
381
382 0x81, 0x01, /* reg 0x15,0x16 define blanking window */
383 0x82, 0x00,
384 0x83, 0x01, /* I port settings */
385 0x84, 0x20,
386 0x85, 0x21,
387 0x86, 0xc5,
388 0x87, 0x01,
389
390 /* Task A */
391 0xa0, 0x01, /* down scale = 1 */
392 0xa1, 0x00, /* prescale accumulation length = 1 */
393 0xa2, 0x00, /* dc gain and fir prefilter control */
394 0xa4, 0x80, /* Lum Brightness, nominal value = 0x80 */
395 0xa5, 0x40, /* Lum contrast, nominal value = 0x40 */
396 0xa6, 0x40, /* Chroma satur. nominal value = 0x80 */
397 0xa8, 0x00, /* hor lum scaling 0x0200 = 2 zoom */
398 0xa9, 0x02, /* note: 2 x zoom ensures that VBI lines have same length as video lines. */
399 0xaa, 0x00, /* H-phase offset Luma = 0 */
400 0xac, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
401 0xad, 0x01, /* H-scaling incr chroma */
402 0xae, 0x00, /* H-phase offset chroma. must be offset luma / 2 */
403
404 0xb0, 0x00, /* V-scaling incr luma low */
405 0xb1, 0x04, /* " hi */
406 0xb2, 0x00, /* V-scaling incr chroma low */
407 0xb3, 0x04, /* " hi */
408 0xb4, 0x01, /* V-scaling mode control */
409 0xb8, 0x00, /* V-phase offset chroma 00 */
410 0xb9, 0x00, /* V-phase offset chroma 01 */
411 0xba, 0x00, /* V-phase offset chroma 10 */
412 0xbb, 0x00, /* V-phase offset chroma 11 */
413 0xbc, 0x00, /* V-phase offset luma 00 */
414 0xbd, 0x00, /* V-phase offset luma 01 */
415 0xbe, 0x00, /* V-phase offset luma 10 */
416 0xbf, 0x00, /* V-phase offset luma 11 */
417
418 /* Task B */
419 0xd0, 0x01, /* down scale = 1 */
420 0xd1, 0x00, /* prescale accumulation length = 1 */
421 0xd2, 0x00, /* dc gain and fir prefilter control */
422 0xd4, 0x80, /* Lum Brightness, nominal value = 0x80 */
423 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
424 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
425 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
426 0xd9, 0x04,
427 0xda, 0x00, /* H-phase offset Luma = 0 */
428 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
429 0xdd, 0x02, /* H-scaling incr chroma */
430 0xde, 0x00, /* H-phase offset chroma. must be offset luma / 2 */
431
432 0xe0, 0x00, /* V-scaling incr luma low */
433 0xe1, 0x04, /* " hi */
434 0xe2, 0x00, /* V-scaling incr chroma low */
435 0xe3, 0x04, /* " hi */
436 0xe4, 0x01, /* V-scaling mode control */
437 0xe8, 0x00, /* V-phase offset chroma 00 */
438 0xe9, 0x00, /* V-phase offset chroma 01 */
439 0xea, 0x00, /* V-phase offset chroma 10 */
440 0xeb, 0x00, /* V-phase offset chroma 11 */
441 0xec, 0x00, /* V-phase offset luma 00 */
442 0xed, 0x00, /* V-phase offset luma 01 */
443 0xee, 0x00, /* V-phase offset luma 10 */
444 0xef, 0x00, /* V-phase offset luma 11 */
445
446 0xf2, 0x50, /* crystal clock = 24.576 MHz, target = 27MHz */
447 0xf3, 0x46,
448 0xf4, 0x00,
449 0xf7, 0x4b, /* not the recommended settings! */
450 0xf8, 0x00,
451 0xf9, 0x4b,
452 0xfa, 0x00,
453 0xfb, 0x4b,
454 0xff, 0x88, /* PLL2 lock detection settings: 71 lines 50% phase error */
455
456 /* Turn off VBI */
457 0x40, 0x20, /* No framing code errors allowed. */
458 0x41, 0xff,
459 0x42, 0xff,
460 0x43, 0xff,
461 0x44, 0xff,
462 0x45, 0xff,
463 0x46, 0xff,
464 0x47, 0xff,
465 0x48, 0xff,
466 0x49, 0xff,
467 0x4a, 0xff,
468 0x4b, 0xff,
469 0x4c, 0xff,
470 0x4d, 0xff,
471 0x4e, 0xff,
472 0x4f, 0xff,
473 0x50, 0xff,
474 0x51, 0xff,
475 0x52, 0xff,
476 0x53, 0xff,
477 0x54, 0xff,
478 0x55, 0xff,
479 0x56, 0xff,
480 0x57, 0xff,
481 0x58, 0x40,
482 0x59, 0x47,
483 0x5b, 0x83,
484 0x5d, 0xbd,
485 0x5e, 0x35,
486
487 0x02, 0x84, /* input tuner -> input 4, amplifier active */
488 0x09, 0x53, /* 0x53, was 0x56 for 60hz. luminance control */
489
490 0x80, 0x20, /* enable task B */
491 0x88, 0xd0,
492 0x88, 0xf0,
493 0x00, 0x00
494};
495
e19b2fcc
HV		 496static int saa7115_odd_parity(u8 c)
497{
498 c ^= (c >> 4);
499 c ^= (c >> 2);
500 c ^= (c >> 1);
501
502 return c & 1;
503}
504
505static int saa7115_decode_vps(u8 * dst, u8 * p)
506{
507 static const u8 biphase_tbl[] = {
508 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
509 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
510 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
511 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
512 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
513 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
514 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
515 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
516 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
517 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
518 0xc3, 0x4b, 0x43, 0xc3, 0x87, 0x0f, 0x07, 0x87,
519 0x83, 0x0b, 0x03, 0x83, 0xc3, 0x4b, 0x43, 0xc3,
520 0xc1, 0x49, 0x41, 0xc1, 0x85, 0x0d, 0x05, 0x85,
521 0x81, 0x09, 0x01, 0x81, 0xc1, 0x49, 0x41, 0xc1,
522 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
523 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
524 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
525 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
526 0xc2, 0x4a, 0x42, 0xc2, 0x86, 0x0e, 0x06, 0x86,
527 0x82, 0x0a, 0x02, 0x82, 0xc2, 0x4a, 0x42, 0xc2,
528 0xc0, 0x48, 0x40, 0xc0, 0x84, 0x0c, 0x04, 0x84,
529 0x80, 0x08, 0x00, 0x80, 0xc0, 0x48, 0x40, 0xc0,
530 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
531 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
532 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
533 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
534 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
535 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
536 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
537 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
538 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
539 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
540 };
541 int i;
542 u8 c, err = 0;
543
544 for (i = 0; i < 2 * 13; i += 2) {
545 err |= biphase_tbl[p[i]] | biphase_tbl[p[i + 1]];
546 c = (biphase_tbl[p[i + 1]] & 0xf) | ((biphase_tbl[p[i]] & 0xf) << 4);
547 dst[i / 2] = c;
548 }
549 return err & 0xf0;
550}
551
552static int saa7115_decode_wss(u8 * p)
553{
554 static const int wss_bits[8] = {
555 0, 0, 0, 1, 0, 1, 1, 1
556 };
557 unsigned char parity;
558 int wss = 0;
559 int i;
560
561 for (i = 0; i < 16; i++) {
562 int b1 = wss_bits[p[i] & 7];
563 int b2 = wss_bits[(p[i] >> 3) & 7];
564
565 if (b1 == b2)
566 return -1;
567 wss |= b2 << i;
568 }
569 parity = wss & 15;
570 parity ^= parity >> 2;
571 parity ^= parity >> 1;
572
573 if (!(parity & 1))
574 return -1;
575
576 return wss;
577}
578
579
3578d3dd 580static int saa7115_set_audio_clock_freq(struct i2c_client *client, u32 freq)
e19b2fcc
HV		 581{
582 struct saa7115_state *state = i2c_get_clientdata(client);
3578d3dd
HV		 583 u32 acpf;
584 u32 acni;
585 u32 hz;
586 u64 f;
e19b2fcc 587
f167cb4e 588 v4l_dbg(1, debug, client, "set audio clock freq: %d\n", freq);
3578d3dd
HV		 589
590 /* sanity check */
591 if (freq < 32000 || freq > 48000)
592 return -EINVAL;
593
594 /* hz is the refresh rate times 100 */
595 hz = (state->std & V4L2_STD_525_60) ? 5994 : 5000;
596 /* acpf = (256 * freq) / field_frequency == (256 * 100 * freq) / hz */
597 acpf = (25600 * freq) / hz;
598 /* acni = (256 * freq * 2^23) / crystal_frequency =
599 (freq * 2^(8+23)) / crystal_frequency =
600 (freq << 31) / 32.11 MHz */
601 f = freq;
602 f = f << 31;
603 do_div(f, 32110000);
604 acni = f;
605
606 saa7115_write(client, 0x30, acpf & 0xff);
607 saa7115_write(client, 0x31, (acpf >> 8) & 0xff);
608 saa7115_write(client, 0x32, (acpf >> 16) & 0x03);
609 saa7115_write(client, 0x34, acni & 0xff);
610 saa7115_write(client, 0x35, (acni >> 8) & 0xff);
611 saa7115_write(client, 0x36, (acni >> 16) & 0x3f);
e19b2fcc
HV		 612 state->audclk_freq = freq;
613 return 0;
614}
615
616static int saa7115_set_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
617{
618 struct saa7115_state *state = i2c_get_clientdata(client);
619
620 switch (ctrl->id) {
621 case V4L2_CID_BRIGHTNESS:
622 if (ctrl->value < 0 || ctrl->value > 255) {
fac9e899 623 v4l_err(client, "invalid brightness setting %d\n", ctrl->value);
e19b2fcc
HV		 624 return -ERANGE;
625 }
626
627 state->bright = ctrl->value;
628 saa7115_write(client, 0x0a, state->bright);
629 break;
630
631 case V4L2_CID_CONTRAST:
632 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 633 v4l_err(client, "invalid contrast setting %d\n", ctrl->value);
e19b2fcc
HV		 634 return -ERANGE;
635 }
636
637 state->contrast = ctrl->value;
638 saa7115_write(client, 0x0b, state->contrast);
639 break;
640
641 case V4L2_CID_SATURATION:
642 if (ctrl->value < 0 || ctrl->value > 127) {
fac9e899 643 v4l_err(client, "invalid saturation setting %d\n", ctrl->value);
e19b2fcc
HV		 644 return -ERANGE;
645 }
646
647 state->sat = ctrl->value;
648 saa7115_write(client, 0x0c, state->sat);
649 break;
650
651 case V4L2_CID_HUE:
652 if (ctrl->value < -127 || ctrl->value > 127) {
fac9e899 653 v4l_err(client, "invalid hue setting %d\n", ctrl->value);
e19b2fcc
HV		 654 return -ERANGE;
655 }
656
657 state->hue = ctrl->value;
658 saa7115_write(client, 0x0d, state->hue);
659 break;
3faeeae4
HV		 660
661 default:
662 return -EINVAL;
e19b2fcc
HV		 663 }
664
665 return 0;
666}
667
668static int saa7115_get_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
669{
670 struct saa7115_state *state = i2c_get_clientdata(client);
671
672 switch (ctrl->id) {
673 case V4L2_CID_BRIGHTNESS:
674 ctrl->value = state->bright;
675 break;
676 case V4L2_CID_CONTRAST:
677 ctrl->value = state->contrast;
678 break;
679 case V4L2_CID_SATURATION:
680 ctrl->value = state->sat;
681 break;
682 case V4L2_CID_HUE:
683 ctrl->value = state->hue;
684 break;
685 default:
686 return -EINVAL;
687 }
688
689 return 0;
690}
691
692static void saa7115_set_v4lstd(struct i2c_client *client, v4l2_std_id std)
693{
694 struct saa7115_state *state = i2c_get_clientdata(client);
695 int taskb = saa7115_read(client, 0x80) & 0x10;
696
30b54d50
HV		 697 /* Prevent unnecessary standard changes. During a standard
698 change the I-Port is temporarily disabled. Any devices
699 reading from that port can get confused.
700 Note that VIDIOC_S_STD is also used to switch from
701 radio to TV mode, so if a VIDIOC_S_STD is broadcast to
702 all I2C devices then you do not want to have an unwanted
703 side-effect here. */
704 if (std == state->std)
705 return;
706
e19b2fcc
HV		 707 // This works for NTSC-M, SECAM-L and the 50Hz PAL variants.
708 if (std & V4L2_STD_525_60) {
f167cb4e 709 v4l_dbg(1, debug, client, "decoder set standard 60 Hz\n");
e19b2fcc
HV		 710 saa7115_writeregs(client, saa7115_cfg_60hz_video);
711 } else {
f167cb4e 712 v4l_dbg(1, debug, client, "decoder set standard 50 Hz\n");
e19b2fcc
HV		 713 saa7115_writeregs(client, saa7115_cfg_50hz_video);
714 }
715
f89982a9
MCC		 716 /* Register 0E - Bits D6-D4 on NO-AUTO mode
717 (SAA7113 doesn't have auto mode)
718 50 Hz / 625 lines 60 Hz / 525 lines
719 000 PAL BGDHI (4.43Mhz) NTSC M (3.58MHz)
720 001 NTSC 4.43 (50 Hz) PAL 4.43 (60 Hz)
721 010 Combination-PAL N (3.58MHz) NTSC 4.43 (60 Hz)
722 011 NTSC N (3.58MHz) PAL M (3.58MHz)
723 100 reserved NTSC-Japan (3.58MHz)
724 */
725 if (state->ident == V4L2_IDENT_SAA7113) {
726 u8 reg = saa7115_read(client, 0x0e) & 0x8f;
727
728 if (std & V4L2_STD_PAL) {
729 if (std == V4L2_STD_PAL_M) {
730 reg|=0x30;
731 } else if (std == V4L2_STD_PAL_N) {
732 reg|=0x20;
733 } else if (std == V4L2_STD_PAL_60) {
734 reg|=0x10;
735 }
736 } else if (std & V4L2_STD_NTSC) {
737 if (std == V4L2_STD_NTSC_M_JP) {
738 reg|=0x40;
739 }
740 }
741 saa7115_write(client, 0x0e, reg);
742 }
743
744
e19b2fcc
HV		 745 state->std = std;
746
747 /* restart task B if needed */
f5762e44 748 if (taskb && state->ident != V4L2_IDENT_SAA7115) {
e19b2fcc
HV		 749 saa7115_writeregs(client, saa7115_cfg_vbi_on);
750 }
751
752 /* switch audio mode too! */
753 saa7115_set_audio_clock_freq(client, state->audclk_freq);
754}
755
756static v4l2_std_id saa7115_get_v4lstd(struct i2c_client *client)
757{
758 struct saa7115_state *state = i2c_get_clientdata(client);
759
760 return state->std;
761}
762
763static void saa7115_log_status(struct i2c_client *client)
764{
e19b2fcc
HV		 765 struct saa7115_state *state = i2c_get_clientdata(client);
766 int reg1e, reg1f;
767 int signalOk;
768 int vcr;
769
fac9e899 770 v4l_info(client, "Audio frequency: %d Hz\n", state->audclk_freq);
f5762e44 771 if (state->ident != V4L2_IDENT_SAA7115) {
e19b2fcc
HV		 772 /* status for the saa7114 */
773 reg1f = saa7115_read(client, 0x1f);
774 signalOk = (reg1f & 0xc1) == 0x81;
fac9e899
HV		 775 v4l_info(client, "Video signal: %s\n", signalOk ? "ok" : "bad");
776 v4l_info(client, "Frequency: %s\n", (reg1f & 0x20) ? "60 Hz" : "50 Hz");
e19b2fcc
HV		 777 return;
778 }
779
780 /* status for the saa7115 */
781 reg1e = saa7115_read(client, 0x1e);
782 reg1f = saa7115_read(client, 0x1f);
783
784 signalOk = (reg1f & 0xc1) == 0x81 && (reg1e & 0xc0) == 0x80;
785 vcr = !(reg1f & 0x10);
786
21fa715e 787 if (state->input >= 6) {
fac9e899 788 v4l_info(client, "Input: S-Video %d\n", state->input - 6);
21fa715e 789 } else {
fac9e899 790 v4l_info(client, "Input: Composite %d\n", state->input);
21fa715e 791 }
fac9e899
HV		 792 v4l_info(client, "Video signal: %s\n", signalOk ? (vcr ? "VCR" : "broadcast/DVD") : "bad");
793 v4l_info(client, "Frequency: %s\n", (reg1f & 0x20) ? "60 Hz" : "50 Hz");
e19b2fcc
HV		 794
795 switch (reg1e & 0x03) {
796 case 1:
fac9e899 797 v4l_info(client, "Detected format: NTSC\n");
e19b2fcc
HV		 798 break;
799 case 2:
fac9e899 800 v4l_info(client, "Detected format: PAL\n");
e19b2fcc
HV		 801 break;
802 case 3:
fac9e899 803 v4l_info(client, "Detected format: SECAM\n");
e19b2fcc
HV		 804 break;
805 default:
fac9e899 806 v4l_info(client, "Detected format: BW/No color\n");
e19b2fcc
HV		 807 break;
808 }
809}
810
811/* setup the sliced VBI lcr registers according to the sliced VBI format */
812static void saa7115_set_lcr(struct i2c_client *client, struct v4l2_sliced_vbi_format *fmt)
813{
814 struct saa7115_state *state = i2c_get_clientdata(client);
815 int is_50hz = (state->std & V4L2_STD_625_50);
816 u8 lcr[24];
817 int i, x;
818
f5762e44
MCC		 819 /* saa7113/71144 doesn't yet support VBI */
820 if (state->ident != V4L2_IDENT_SAA7115)
e19b2fcc
HV		 821 return;
822
823 for (i = 0; i <= 23; i++)
824 lcr[i] = 0xff;
825
826 if (fmt->service_set == 0) {
827 /* raw VBI */
828 if (is_50hz)
829 for (i = 6; i <= 23; i++)
830 lcr[i] = 0xdd;
831 else
832 for (i = 10; i <= 21; i++)
833 lcr[i] = 0xdd;
834 } else {
835 /* sliced VBI */
836 /* first clear lines that cannot be captured */
837 if (is_50hz) {
838 for (i = 0; i <= 5; i++)
839 fmt->service_lines[0][i] =
840 fmt->service_lines[1][i] = 0;
841 }
842 else {
843 for (i = 0; i <= 9; i++)
844 fmt->service_lines[0][i] =
845 fmt->service_lines[1][i] = 0;
846 for (i = 22; i <= 23; i++)
847 fmt->service_lines[0][i] =
848 fmt->service_lines[1][i] = 0;
849 }
850
851 /* Now set the lcr values according to the specified service */
852 for (i = 6; i <= 23; i++) {
853 lcr[i] = 0;
854 for (x = 0; x <= 1; x++) {
855 switch (fmt->service_lines[1-x][i]) {
856 case 0:
857 lcr[i] |= 0xf << (4 * x);
858 break;
6ac48b45 859 case V4L2_SLICED_TELETEXT_PAL_B:
e19b2fcc
HV		 860 lcr[i] |= 1 << (4 * x);
861 break;
862 case V4L2_SLICED_CAPTION_525:
863 lcr[i] |= 4 << (4 * x);
864 break;
865 case V4L2_SLICED_WSS_625:
866 lcr[i] |= 5 << (4 * x);
867 break;
868 case V4L2_SLICED_VPS:
869 lcr[i] |= 7 << (4 * x);
870 break;
871 }
872 }
873 }
874 }
875
876 /* write the lcr registers */
877 for (i = 2; i <= 23; i++) {
878 saa7115_write(client, i - 2 + 0x41, lcr[i]);
879 }
880
881 /* enable/disable raw VBI capturing */
882 saa7115_writeregs(client, fmt->service_set == 0 ? saa7115_cfg_vbi_on : saa7115_cfg_vbi_off);
883}
884
885static int saa7115_get_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
886{
887 static u16 lcr2vbi[] = {
6ac48b45 888 0, V4L2_SLICED_TELETEXT_PAL_B, 0, /* 1 */
e19b2fcc
HV		 889 0, V4L2_SLICED_CAPTION_525, /* 4 */
890 V4L2_SLICED_WSS_625, 0, /* 5 */
891 V4L2_SLICED_VPS, 0, 0, 0, 0, /* 7 */
892 0, 0, 0, 0
893 };
894 struct v4l2_sliced_vbi_format *sliced = &fmt->fmt.sliced;
895 int i;
896
897 if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
898 return -EINVAL;
899 memset(sliced, 0, sizeof(*sliced));
900 /* done if using raw VBI */
901 if (saa7115_read(client, 0x80) & 0x10)
902 return 0;
903 for (i = 2; i <= 23; i++) {
904 u8 v = saa7115_read(client, i - 2 + 0x41);
905
906 sliced->service_lines[0][i] = lcr2vbi[v >> 4];
907 sliced->service_lines[1][i] = lcr2vbi[v & 0xf];
908 sliced->service_set |=
909 sliced->service_lines[0][i] | sliced->service_lines[1][i];
910 }
911 return 0;
912}
913
914static int saa7115_set_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
915{
916 struct saa7115_state *state = i2c_get_clientdata(client);
917 struct v4l2_pix_format *pix;
918 int HPSC, HFSC;
919 int VSCY, Vsrc;
920 int is_50hz = state->std & V4L2_STD_625_50;
921
922 if (fmt->type == V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) {
923 saa7115_set_lcr(client, &fmt->fmt.sliced);
924 return 0;
925 }
926 if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
927 return -EINVAL;
928
929 pix = &(fmt->fmt.pix);
930
f167cb4e 931 v4l_dbg(1, debug, client, "decoder set size\n");
e19b2fcc
HV		 932
933 /* FIXME need better bounds checking here */
934 if ((pix->width < 1) || (pix->width > 1440))
935 return -EINVAL;
936 if ((pix->height < 1) || (pix->height > 960))
937 return -EINVAL;
938
939 /* probably have a valid size, let's set it */
940 /* Set output width/height */
941 /* width */
942 saa7115_write(client, 0xcc, (u8) (pix->width & 0xff));
943 saa7115_write(client, 0xcd, (u8) ((pix->width >> 8) & 0xff));
944 /* height */
945 saa7115_write(client, 0xce, (u8) (pix->height & 0xff));
946 saa7115_write(client, 0xcf, (u8) ((pix->height >> 8) & 0xff));
947
948 /* Scaling settings */
949 /* Hprescaler is floor(inres/outres) */
950 /* FIXME hardcoding input res */
951 if (pix->width != 720) {
952 HPSC = (int)(720 / pix->width);
953 /* 0 is not allowed (div. by zero) */
954 HPSC = HPSC ? HPSC : 1;
955 HFSC = (int)((1024 * 720) / (HPSC * pix->width));
956
f167cb4e 957 v4l_dbg(1, debug, client, "Hpsc: 0x%05x, Hfsc: 0x%05x\n", HPSC, HFSC);
e19b2fcc
HV		 958 /* FIXME hardcodes to "Task B"
959 * write H prescaler integer */
960 saa7115_write(client, 0xd0, (u8) (HPSC & 0x3f));
961
962 /* write H fine-scaling (luminance) */
963 saa7115_write(client, 0xd8, (u8) (HFSC & 0xff));
964 saa7115_write(client, 0xd9, (u8) ((HFSC >> 8) & 0xff));
965 /* write H fine-scaling (chrominance)
966 * must be lum/2, so i'll just bitshift :) */
967 saa7115_write(client, 0xDC, (u8) ((HFSC >> 1) & 0xff));
968 saa7115_write(client, 0xDD, (u8) ((HFSC >> 9) & 0xff));
969 } else {
970 if (is_50hz) {
f167cb4e 971 v4l_dbg(1, debug, client, "Setting full 50hz width\n");
e19b2fcc
HV		 972 saa7115_writeregs(client, saa7115_cfg_50hz_fullres_x);
973 } else {
f167cb4e 974 v4l_dbg(1, debug, client, "Setting full 60hz width\n");
e19b2fcc
HV		 975 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_x);
976 }
977 }
978
979 Vsrc = is_50hz ? 576 : 480;
980
981 if (pix->height != Vsrc) {
982 VSCY = (int)((1024 * Vsrc) / pix->height);
f167cb4e 983 v4l_dbg(1, debug, client, "Vsrc: %d, Vscy: 0x%05x\n", Vsrc, VSCY);
e19b2fcc
HV		 984
985 /* Correct Contrast and Luminance */
986 saa7115_write(client, 0xd5, (u8) (64 * 1024 / VSCY));
987 saa7115_write(client, 0xd6, (u8) (64 * 1024 / VSCY));
988
989 /* write V fine-scaling (luminance) */
990 saa7115_write(client, 0xe0, (u8) (VSCY & 0xff));
991 saa7115_write(client, 0xe1, (u8) ((VSCY >> 8) & 0xff));
992 /* write V fine-scaling (chrominance) */
993 saa7115_write(client, 0xe2, (u8) (VSCY & 0xff));
994 saa7115_write(client, 0xe3, (u8) ((VSCY >> 8) & 0xff));
995 } else {
996 if (is_50hz) {
f167cb4e 997 v4l_dbg(1, debug, client, "Setting full 50Hz height\n");
e19b2fcc
HV		 998 saa7115_writeregs(client, saa7115_cfg_50hz_fullres_y);
999 } else {
f167cb4e 1000 v4l_dbg(1, debug, client, "Setting full 60hz height\n");
e19b2fcc
HV		 1001 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_y);
1002 }
1003 }
1004
1005 saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1006 return 0;
1007}
1008
1009/* Decode the sliced VBI data stream as created by the saa7115.
1010 The format is described in the saa7115 datasheet in Tables 25 and 26
1011 and in Figure 33.
1012 The current implementation uses SAV/EAV codes and not the ancillary data
1013 headers. The vbi->p pointer points to the SDID byte right after the SAV
1014 code. */
1015static void saa7115_decode_vbi_line(struct i2c_client *client,
1016 struct v4l2_decode_vbi_line *vbi)
1017{
1018 static const char vbi_no_data_pattern[] = {
1019 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0
1020 };
1021 struct saa7115_state *state = i2c_get_clientdata(client);
1022 u8 *p = vbi->p;
1023 u32 wss;
1024 int id1, id2; /* the ID1 and ID2 bytes from the internal header */
1025
1026 vbi->type = 0; /* mark result as a failure */
1027 id1 = p[2];
1028 id2 = p[3];
1029 /* Note: the field bit is inverted for 60 Hz video */
1030 if (state->std & V4L2_STD_525_60)
1031 id1 ^= 0x40;
1032
1033 /* Skip internal header, p now points to the start of the payload */
1034 p += 4;
1035 vbi->p = p;
1036
1037 /* calculate field and line number of the VBI packet (1-23) */
1038 vbi->is_second_field = ((id1 & 0x40) != 0);
1039 vbi->line = (id1 & 0x3f) << 3;
1040 vbi->line |= (id2 & 0x70) >> 4;
1041
1042 /* Obtain data type */
1043 id2 &= 0xf;
1044
1045 /* If the VBI slicer does not detect any signal it will fill up
1046 the payload buffer with 0xa0 bytes. */
1047 if (!memcmp(p, vbi_no_data_pattern, sizeof(vbi_no_data_pattern)))
1048 return;
1049
1050 /* decode payloads */
1051 switch (id2) {
1052 case 1:
6ac48b45 1053 vbi->type = V4L2_SLICED_TELETEXT_PAL_B;
e19b2fcc
HV		 1054 break;
1055 case 4:
1056 if (!saa7115_odd_parity(p[0]) || !saa7115_odd_parity(p[1]))
1057 return;
1058 vbi->type = V4L2_SLICED_CAPTION_525;
1059 break;
1060 case 5:
1061 wss = saa7115_decode_wss(p);
1062 if (wss == -1)
1063 return;
1064 p[0] = wss & 0xff;
1065 p[1] = wss >> 8;
1066 vbi->type = V4L2_SLICED_WSS_625;
1067 break;
1068 case 7:
1069 if (saa7115_decode_vps(p, p) != 0)
1070 return;
1071 vbi->type = V4L2_SLICED_VPS;
1072 break;
1073 default:
1074 return;
1075 }
1076}
1077
1078/* ============ SAA7115 AUDIO settings (end) ============= */
1079
da4ae5a7
HV		 1080static struct v4l2_queryctrl saa7115_qctrl[] = {
1081 {
1082 .id = V4L2_CID_BRIGHTNESS,
1083 .type = V4L2_CTRL_TYPE_INTEGER,
1084 .name = "Brightness",
1085 .minimum = 0,
1086 .maximum = 255,
1087 .step = 1,
1088 .default_value = 128,
1089 .flags = 0,
1090 }, {
1091 .id = V4L2_CID_CONTRAST,
1092 .type = V4L2_CTRL_TYPE_INTEGER,
1093 .name = "Contrast",
1094 .minimum = 0,
ecc0b947 1095 .maximum = 127,
da4ae5a7
HV		 1096 .step = 1,
1097 .default_value = 64,
1098 .flags = 0,
1099 }, {
1100 .id = V4L2_CID_SATURATION,
1101 .type = V4L2_CTRL_TYPE_INTEGER,
1102 .name = "Saturation",
1103 .minimum = 0,
ecc0b947 1104 .maximum = 127,
da4ae5a7
HV		 1105 .step = 1,
1106 .default_value = 64,
1107 .flags = 0,
1108 }, {
1109 .id = V4L2_CID_HUE,
1110 .type = V4L2_CTRL_TYPE_INTEGER,
1111 .name = "Hue",
1112 .minimum = -128,
1113 .maximum = 127,
1114 .step = 1,
1115 .default_value = 0,
1116 .flags = 0,
1117 },
1118};
1119
1120/* ----------------------------------------------------------------------- */
1121
e19b2fcc
HV		 1122static int saa7115_command(struct i2c_client *client, unsigned int cmd, void *arg)
1123{
1124 struct saa7115_state *state = i2c_get_clientdata(client);
1125 int *iarg = arg;
1126
1127 /* ioctls to allow direct access to the saa7115 registers for testing */
1128 switch (cmd) {
1129 case VIDIOC_S_FMT:
1130 return saa7115_set_v4lfmt(client, (struct v4l2_format *)arg);
1131
1132 case VIDIOC_G_FMT:
1133 return saa7115_get_v4lfmt(client, (struct v4l2_format *)arg);
1134
1135 case VIDIOC_INT_AUDIO_CLOCK_FREQ:
3578d3dd 1136 return saa7115_set_audio_clock_freq(client, *(u32 *)arg);
e19b2fcc
HV		 1137
1138 case VIDIOC_G_TUNER:
1139 {
1140 struct v4l2_tuner *vt = arg;
1141 int status;
1142
3faeeae4
HV		 1143 if (state->radio)
1144 break;
e19b2fcc
HV		 1145 status = saa7115_read(client, 0x1f);
1146
f167cb4e 1147 v4l_dbg(1, debug, client, "status: 0x%02x\n", status);
e19b2fcc
HV		 1148 vt->signal = ((status & (1 << 6)) == 0) ? 0xffff : 0x0;
1149 break;
1150 }
1151
1152 case VIDIOC_LOG_STATUS:
1153 saa7115_log_status(client);
1154 break;
1155
1156 case VIDIOC_G_CTRL:
1157 return saa7115_get_v4lctrl(client, (struct v4l2_control *)arg);
1158
1159 case VIDIOC_S_CTRL:
1160 return saa7115_set_v4lctrl(client, (struct v4l2_control *)arg);
1161
da4ae5a7
HV		 1162 case VIDIOC_QUERYCTRL:
1163 {
1164 struct v4l2_queryctrl *qc = arg;
1165 int i;
1166
1167 for (i = 0; i < ARRAY_SIZE(saa7115_qctrl); i++)
1168 if (qc->id && qc->id == saa7115_qctrl[i].id) {
1169 memcpy(qc, &saa7115_qctrl[i], sizeof(*qc));
1170 return 0;
1171 }
1172 return -EINVAL;
1173 }
1174
e19b2fcc
HV		 1175 case VIDIOC_G_STD:
1176 *(v4l2_std_id *)arg = saa7115_get_v4lstd(client);
1177 break;
1178
1179 case VIDIOC_S_STD:
3faeeae4 1180 state->radio = 0;
e19b2fcc
HV		 1181 saa7115_set_v4lstd(client, *(v4l2_std_id *)arg);
1182 break;
1183
3faeeae4
HV		 1184 case AUDC_SET_RADIO:
1185 state->radio = 1;
1186 break;
1187
e19b2fcc
HV		 1188 case VIDIOC_G_INPUT:
1189 *(int *)arg = state->input;
1190 break;
1191
1192 case VIDIOC_S_INPUT:
f167cb4e 1193 v4l_dbg(1, debug, client, "decoder set input %d\n", *iarg);
e19b2fcc
HV		 1194 /* inputs from 0-9 are available */
1195 if (*iarg < 0 || *iarg > 9) {
1196 return -EINVAL;
1197 }
1198
1199 if (state->input == *iarg)
1200 break;
f167cb4e 1201 v4l_dbg(1, debug, client, "now setting %s input\n",
e19b2fcc
HV		 1202 *iarg >= 6 ? "S-Video" : "Composite");
1203 state->input = *iarg;
1204
1205 /* select mode */
1206 saa7115_write(client, 0x02,
1207 (saa7115_read(client, 0x02) & 0xf0) |
1208 state->input);
1209
1210 /* bypass chrominance trap for modes 6..9 */
1211 saa7115_write(client, 0x09,
1212 (saa7115_read(client, 0x09) & 0x7f) |
1213 (state->input < 6 ? 0x0 : 0x80));
1214 break;
1215
1216 case VIDIOC_STREAMON:
1217 case VIDIOC_STREAMOFF:
f167cb4e 1218 v4l_dbg(1, debug, client, "%s output\n",
e19b2fcc
HV		 1219 (cmd == VIDIOC_STREAMON) ? "enable" : "disable");
1220
1221 if (state->enable != (cmd == VIDIOC_STREAMON)) {
1222 state->enable = (cmd == VIDIOC_STREAMON);
1223 saa7115_write(client, 0x87, state->enable);
1224 }
1225 break;
1226
1227 case VIDIOC_INT_DECODE_VBI_LINE:
1228 saa7115_decode_vbi_line(client, arg);
1229 break;
1230
1231 case VIDIOC_INT_RESET:
f167cb4e 1232 v4l_dbg(1, debug, client, "decoder RESET\n");
e19b2fcc
HV		 1233 saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1234 break;
1235
1236 case VIDIOC_INT_G_VBI_DATA:
1237 {
1238 struct v4l2_sliced_vbi_data *data = arg;
1239
1240 switch (data->id) {
1241 case V4L2_SLICED_WSS_625:
1242 if (saa7115_read(client, 0x6b) & 0xc0)
1243 return -EIO;
1244 data->data[0] = saa7115_read(client, 0x6c);
1245 data->data[1] = saa7115_read(client, 0x6d);
1246 return 0;
1247 case V4L2_SLICED_CAPTION_525:
1248 if (data->field == 0) {
1249 /* CC */
1250 if (saa7115_read(client, 0x66) & 0xc0)
1251 return -EIO;
1252 data->data[0] = saa7115_read(client, 0x67);
1253 data->data[1] = saa7115_read(client, 0x68);
1254 return 0;
1255 }
1256 /* XDS */
1257 if (saa7115_read(client, 0x66) & 0x30)
1258 return -EIO;
1259 data->data[0] = saa7115_read(client, 0x69);
1260 data->data[1] = saa7115_read(client, 0x6a);
1261 return 0;
1262 default:
1263 return -EINVAL;
1264 }
1265 break;
1266 }
1267
1268#ifdef CONFIG_VIDEO_ADV_DEBUG
1269 case VIDIOC_INT_G_REGISTER:
1270 {
1271 struct v4l2_register *reg = arg;
1272
1273 if (reg->i2c_id != I2C_DRIVERID_SAA711X)
1274 return -EINVAL;
1275 reg->val = saa7115_read(client, reg->reg & 0xff);
1276 break;
1277 }
1278
1279 case VIDIOC_INT_S_REGISTER:
1280 {
1281 struct v4l2_register *reg = arg;
1282
1283 if (reg->i2c_id != I2C_DRIVERID_SAA711X)
1284 return -EINVAL;
1285 if (!capable(CAP_SYS_ADMIN))
1286 return -EPERM;
1287 saa7115_write(client, reg->reg & 0xff, reg->val & 0xff);
1288 break;
1289 }
1290#endif
1291
1292 case VIDIOC_INT_G_CHIP_IDENT:
1293 *iarg = state->ident;
1294 break;
1295
1296 default:
1297 return -EINVAL;
1298 }
1299
1300 return 0;
1301}
1302
1303/* ----------------------------------------------------------------------- */
1304
1305static struct i2c_driver i2c_driver_saa7115;
1306
1307static int saa7115_attach(struct i2c_adapter *adapter, int address, int kind)
1308{
1309 struct i2c_client *client;
1310 struct saa7115_state *state;
1311 u8 chip_id;
1312
1313 /* Check if the adapter supports the needed features */
1314 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1315 return 0;
1316
7408187d 1317 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
e19b2fcc
HV		 1318 if (client == 0)
1319 return -ENOMEM;
e19b2fcc
HV		 1320 client->addr = address;
1321 client->adapter = adapter;
1322 client->driver = &i2c_driver_saa7115;
e19b2fcc
HV		 1323 snprintf(client->name, sizeof(client->name) - 1, "saa7115");
1324
f167cb4e 1325 v4l_dbg(1, debug, client, "detecting saa7115 client on address 0x%x\n", address << 1);
e19b2fcc
HV		 1326
1327 saa7115_write(client, 0, 5);
1328 chip_id = saa7115_read(client, 0) & 0x0f;
f5762e44 1329 if (chip_id <3 && chip_id > 5) {
f167cb4e 1330 v4l_dbg(1, debug, client, "saa7115 not found\n");
e19b2fcc
HV		 1331 kfree(client);
1332 return 0;
1333 }
f5762e44 1334 snprintf(client->name, sizeof(client->name) - 1, "saa711%d",chip_id);
fac9e899 1335 v4l_info(client, "saa711%d found @ 0x%x (%s)\n", chip_id, address << 1, adapter->name);
e19b2fcc 1336
7408187d 1337 state = kzalloc(sizeof(struct saa7115_state), GFP_KERNEL);
e19b2fcc
HV		 1338 i2c_set_clientdata(client, state);
1339 if (state == NULL) {
1340 kfree(client);
1341 return -ENOMEM;
1342 }
e19b2fcc
HV		 1343 state->std = V4L2_STD_NTSC;
1344 state->input = -1;
1345 state->enable = 1;
3faeeae4 1346 state->radio = 0;
e19b2fcc
HV		 1347 state->bright = 128;
1348 state->contrast = 64;
1349 state->hue = 0;
1350 state->sat = 64;
f5762e44
MCC		 1351 switch (chip_id) {
1352 case 3:
1353 state->ident = V4L2_IDENT_SAA7113;
1354 break;
1355 case 4:
1356 state->ident = V4L2_IDENT_SAA7114;
1357 break;
1358 default:
1359 state->ident = V4L2_IDENT_SAA7115;
1360 break;
1361 }
1362
3578d3dd 1363 state->audclk_freq = 48000;
e19b2fcc 1364
f167cb4e 1365 v4l_dbg(1, debug, client, "writing init values\n");
e19b2fcc
HV		 1366
1367 /* init to 60hz/48khz */
f5762e44
MCC		 1368 if (state->ident==V4L2_IDENT_SAA7113)
1369 saa7115_writeregs(client, saa7113_init_auto_input);
1370 else
1371 saa7115_writeregs(client, saa7115_init_auto_input);
e19b2fcc
HV		 1372 saa7115_writeregs(client, saa7115_init_misc);
1373 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_x);
1374 saa7115_writeregs(client, saa7115_cfg_60hz_fullres_y);
1375 saa7115_writeregs(client, saa7115_cfg_60hz_video);
3578d3dd 1376 saa7115_set_audio_clock_freq(client, state->audclk_freq);
e19b2fcc
HV		 1377 saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1378
1379 i2c_attach_client(client);
1380
f167cb4e 1381 v4l_dbg(1, debug, client, "status: (1E) 0x%02x, (1F) 0x%02x\n",
e19b2fcc
HV		 1382 saa7115_read(client, 0x1e), saa7115_read(client, 0x1f));
1383
1384 return 0;
1385}
1386
1387static int saa7115_probe(struct i2c_adapter *adapter)
1388{
e19b2fcc 1389 if (adapter->class & I2C_CLASS_TV_ANALOG)
e19b2fcc
HV		 1390 return i2c_probe(adapter, &addr_data, &saa7115_attach);
1391 return 0;
1392}
1393
1394static int saa7115_detach(struct i2c_client *client)
1395{
1396 struct saa7115_state *state = i2c_get_clientdata(client);
1397 int err;
1398
1399 err = i2c_detach_client(client);
1400 if (err) {
1401 return err;
1402 }
1403
1404 kfree(state);
1405 kfree(client);
1406 return 0;
1407}
1408
1409/* ----------------------------------------------------------------------- */
1410
1411/* i2c implementation */
1412static struct i2c_driver i2c_driver_saa7115 = {
604f28e2 1413 .driver = {
604f28e2
LR		 1414 .name = "saa7115",
1415 },
e19b2fcc 1416 .id = I2C_DRIVERID_SAA711X,
e19b2fcc
HV		 1417 .attach_adapter = saa7115_probe,
1418 .detach_client = saa7115_detach,
1419 .command = saa7115_command,
e19b2fcc
HV		 1420};
1421
1422
1423static int __init saa7115_init_module(void)
1424{
1425 return i2c_add_driver(&i2c_driver_saa7115);
1426}
1427
1428static void __exit saa7115_cleanup_module(void)
1429{
1430 i2c_del_driver(&i2c_driver_saa7115);
1431}
1432
1433module_init(saa7115_init_module);
1434module_exit(saa7115_cleanup_module);
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