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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
1da177e4 | 36 | |
1f10c7af AQ |
37 | #include "mt352.h" |
38 | #include "mt352_priv.h" /* FIXME */ | |
39 | #include "tda1004x.h" | |
40 | #include "nxt200x.h" | |
1da177e4 | 41 | |
e2ac28fa IL |
42 | #include "tda10086.h" |
43 | #include "tda826x.h" | |
8ce47dad | 44 | #include "tda827x.h" |
e2ac28fa | 45 | #include "isl6421.h" |
8ce47dad | 46 | |
1da177e4 LT |
47 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
48 | MODULE_LICENSE("GPL"); | |
49 | ||
50 | static unsigned int antenna_pwr = 0; | |
86ddd96f | 51 | |
1da177e4 LT |
52 | module_param(antenna_pwr, int, 0444); |
53 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
54 | ||
b331daa0 SB |
55 | static int use_frontend = 0; |
56 | module_param(use_frontend, int, 0644); | |
57 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 58 | |
58ef4f92 HH |
59 | static int debug = 0; |
60 | module_param(debug, int, 0644); | |
61 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
62 | ||
63 | #define dprintk(fmt, arg...) if (debug) \ | |
64 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg) | |
65 | ||
66 | /* ------------------------------------------------------------------ | |
67 | * mt352 based DVB-T cards | |
68 | */ | |
69 | ||
1da177e4 LT |
70 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
71 | { | |
72 | u32 ok; | |
73 | ||
74 | if (!on) { | |
75 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
76 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
77 | return 0; | |
78 | } | |
79 | ||
80 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
81 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
82 | udelay(10); | |
83 | ||
84 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
85 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
86 | udelay(10); | |
87 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
88 | udelay(10); | |
89 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
90 | printk("%s: %s %s\n", dev->name, __FUNCTION__, | |
91 | ok ? "on" : "off"); | |
92 | ||
93 | if (!ok) | |
94 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
95 | return ok; | |
96 | } | |
97 | ||
98 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
99 | { | |
100 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
101 | static u8 reset [] = { RESET, 0x80 }; | |
102 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
103 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
104 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
105 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
106 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
107 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
108 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
109 | struct saa7134_dev *dev= fe->dvb->priv; | |
110 | ||
111 | printk("%s: %s called\n",dev->name,__FUNCTION__); | |
112 | ||
113 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
114 | udelay(200); | |
115 | mt352_write(fe, reset, sizeof(reset)); | |
116 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
117 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
118 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
119 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
120 | ||
121 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
122 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
123 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 124 | |
1da177e4 LT |
125 | return 0; |
126 | } | |
127 | ||
a78d0bfa JAR |
128 | static int mt352_aver777_init(struct dvb_frontend* fe) |
129 | { | |
130 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
131 | static u8 reset [] = { RESET, 0x80 }; | |
132 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
133 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
134 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
135 | ||
136 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
137 | udelay(200); | |
138 | mt352_write(fe, reset, sizeof(reset)); | |
139 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
140 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
141 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
0463f12c AQ |
146 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
147 | struct dvb_frontend_parameters* params) | |
1da177e4 | 148 | { |
df8cf706 HH |
149 | u8 off[] = { 0x00, 0xf1}; |
150 | u8 on[] = { 0x00, 0x71}; | |
151 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
152 | ||
1da177e4 LT |
153 | struct saa7134_dev *dev = fe->dvb->priv; |
154 | struct v4l2_frequency f; | |
155 | ||
156 | /* set frequency (mt2050) */ | |
157 | f.tuner = 0; | |
158 | f.type = V4L2_TUNER_DIGITAL_TV; | |
159 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
160 | if (fe->ops.i2c_gate_ctrl) |
161 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 162 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 | 163 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); |
df8cf706 | 164 | msg.buf = on; |
dea74869 PB |
165 | if (fe->ops.i2c_gate_ctrl) |
166 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 167 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
168 | |
169 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
170 | ||
171 | /* mt352 setup */ | |
0463f12c | 172 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
173 | } |
174 | ||
bd4956b8 | 175 | static int mt352_aver777_tuner_calc_regs(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf, int buf_len) |
a78d0bfa | 176 | { |
a79ddae9 AQ |
177 | if (buf_len < 5) |
178 | return -EINVAL; | |
179 | ||
180 | pllbuf[0] = 0x61; | |
a78d0bfa JAR |
181 | dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1, |
182 | params->frequency, | |
183 | params->u.ofdm.bandwidth); | |
a79ddae9 | 184 | return 5; |
a78d0bfa JAR |
185 | } |
186 | ||
1da177e4 LT |
187 | static struct mt352_config pinnacle_300i = { |
188 | .demod_address = 0x3c >> 1, | |
189 | .adc_clock = 20333, | |
190 | .if2 = 36150, | |
191 | .no_tuner = 1, | |
192 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 193 | }; |
a78d0bfa JAR |
194 | |
195 | static struct mt352_config avermedia_777 = { | |
196 | .demod_address = 0xf, | |
197 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 198 | }; |
1da177e4 | 199 | |
58ef4f92 HH |
200 | /* ================================================================== |
201 | * tda1004x based DVB-T cards, helper functions | |
202 | */ | |
203 | ||
204 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
205 | const struct firmware **fw, char *name) | |
1da177e4 LT |
206 | { |
207 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
208 | return request_firmware(fw, name, &dev->pci->dev); |
209 | } | |
210 | ||
58ef4f92 HH |
211 | /* ------------------------------------------------------------------ |
212 | * these tuners are tu1216, td1316(a) | |
213 | */ | |
214 | ||
215 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
216 | { | |
217 | struct saa7134_dev *dev = fe->dvb->priv; | |
218 | struct tda1004x_state *state = fe->demodulator_priv; | |
219 | u8 addr = state->config->tuner_address; | |
86ddd96f | 220 | u8 tuner_buf[4]; |
2cf36ac4 | 221 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
222 | sizeof(tuner_buf) }; |
223 | int tuner_frequency = 0; | |
224 | u8 band, cp, filter; | |
225 | ||
226 | /* determine charge pump */ | |
227 | tuner_frequency = params->frequency + 36166000; | |
228 | if (tuner_frequency < 87000000) | |
229 | return -EINVAL; | |
230 | else if (tuner_frequency < 130000000) | |
231 | cp = 3; | |
232 | else if (tuner_frequency < 160000000) | |
233 | cp = 5; | |
234 | else if (tuner_frequency < 200000000) | |
235 | cp = 6; | |
236 | else if (tuner_frequency < 290000000) | |
237 | cp = 3; | |
238 | else if (tuner_frequency < 420000000) | |
239 | cp = 5; | |
240 | else if (tuner_frequency < 480000000) | |
241 | cp = 6; | |
242 | else if (tuner_frequency < 620000000) | |
243 | cp = 3; | |
244 | else if (tuner_frequency < 830000000) | |
245 | cp = 5; | |
246 | else if (tuner_frequency < 895000000) | |
247 | cp = 7; | |
248 | else | |
249 | return -EINVAL; | |
250 | ||
251 | /* determine band */ | |
252 | if (params->frequency < 49000000) | |
253 | return -EINVAL; | |
254 | else if (params->frequency < 161000000) | |
255 | band = 1; | |
256 | else if (params->frequency < 444000000) | |
257 | band = 2; | |
258 | else if (params->frequency < 861000000) | |
259 | band = 4; | |
260 | else | |
261 | return -EINVAL; | |
262 | ||
263 | /* setup PLL filter */ | |
264 | switch (params->u.ofdm.bandwidth) { | |
265 | case BANDWIDTH_6_MHZ: | |
266 | filter = 0; | |
267 | break; | |
268 | ||
269 | case BANDWIDTH_7_MHZ: | |
270 | filter = 0; | |
271 | break; | |
272 | ||
273 | case BANDWIDTH_8_MHZ: | |
274 | filter = 1; | |
275 | break; | |
1da177e4 | 276 | |
86ddd96f MCC |
277 | default: |
278 | return -EINVAL; | |
279 | } | |
280 | ||
281 | /* calculate divisor | |
282 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 283 | */ |
86ddd96f MCC |
284 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
285 | ||
286 | /* setup tuner buffer */ | |
287 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
288 | tuner_buf[1] = tuner_frequency & 0xff; | |
289 | tuner_buf[2] = 0xca; | |
290 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
291 | ||
dea74869 PB |
292 | if (fe->ops.i2c_gate_ctrl) |
293 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 HH |
294 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
295 | printk("%s/dvb: could not write to tuner at addr: 0x%02x\n",dev->name, addr << 1); | |
86ddd96f | 296 | return -EIO; |
58ef4f92 | 297 | } |
2cf36ac4 HH |
298 | msleep(1); |
299 | return 0; | |
300 | } | |
301 | ||
58ef4f92 | 302 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
303 | { |
304 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
305 | struct tda1004x_state *state = fe->demodulator_priv; |
306 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
307 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
308 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 309 | |
2cf36ac4 | 310 | /* setup PLL configuration */ |
dea74869 PB |
311 | if (fe->ops.i2c_gate_ctrl) |
312 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
313 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
314 | return -EIO; | |
86ddd96f | 315 | msleep(1); |
2cf36ac4 | 316 | |
1da177e4 LT |
317 | return 0; |
318 | } | |
319 | ||
2cf36ac4 HH |
320 | /* ------------------------------------------------------------------ */ |
321 | ||
2cf36ac4 | 322 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
323 | .demod_address = 0x8, |
324 | .invert = 1, | |
2cf36ac4 | 325 | .invert_oclk = 0, |
86ddd96f MCC |
326 | .xtal_freq = TDA10046_XTAL_4M, |
327 | .agc_config = TDA10046_AGC_DEFAULT, | |
328 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
329 | .tuner_address = 0x60, |
330 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
331 | }; |
332 | ||
2cf36ac4 HH |
333 | static struct tda1004x_config philips_tu1216_61_config = { |
334 | ||
335 | .demod_address = 0x8, | |
336 | .invert = 1, | |
337 | .invert_oclk = 0, | |
338 | .xtal_freq = TDA10046_XTAL_4M, | |
339 | .agc_config = TDA10046_AGC_DEFAULT, | |
340 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
341 | .tuner_address = 0x61, |
342 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
343 | }; |
344 | ||
345 | /* ------------------------------------------------------------------ */ | |
346 | ||
cbb94521 | 347 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
348 | { |
349 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
350 | struct tda1004x_state *state = fe->demodulator_priv; |
351 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 352 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 353 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
354 | |
355 | /* setup PLL configuration */ | |
dea74869 PB |
356 | if (fe->ops.i2c_gate_ctrl) |
357 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
358 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
359 | return -EIO; | |
2cf36ac4 HH |
360 | return 0; |
361 | } | |
362 | ||
a79ddae9 | 363 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 364 | { |
58ef4f92 HH |
365 | return philips_tda6651_pll_set(fe, params); |
366 | } | |
367 | ||
368 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
369 | { | |
370 | struct saa7134_dev *dev = fe->dvb->priv; | |
371 | struct tda1004x_state *state = fe->demodulator_priv; | |
372 | u8 addr = state->config->tuner_address; | |
373 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
374 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
375 | ||
376 | /* switch the tuner to analog mode */ | |
377 | if (fe->ops.i2c_gate_ctrl) | |
378 | fe->ops.i2c_gate_ctrl(fe, 1); | |
379 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
380 | return -EIO; | |
381 | return 0; | |
2cf36ac4 HH |
382 | } |
383 | ||
58ef4f92 HH |
384 | /* ------------------------------------------------------------------ */ |
385 | ||
cbb94521 HH |
386 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
387 | { | |
388 | struct saa7134_dev *dev = fe->dvb->priv; | |
389 | static u8 msg[] = { 0x00, 0x40}; | |
390 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
391 | ||
392 | ||
393 | if (philips_td1316_tuner_init(fe)) | |
394 | return -EIO; | |
395 | msleep(1); | |
396 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
397 | return -EIO; | |
398 | ||
399 | return 0; | |
400 | } | |
401 | ||
a79ddae9 | 402 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
403 | { |
404 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 405 | |
58ef4f92 HH |
406 | static u8 msg[] = { 0x00, 0x14 }; |
407 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
408 | ||
409 | if (philips_td1316_tuner_sleep(fe)) | |
410 | return -EIO; | |
2cf36ac4 HH |
411 | |
412 | /* switch the board to analog mode */ | |
dea74869 PB |
413 | if (fe->ops.i2c_gate_ctrl) |
414 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 415 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
416 | return 0; |
417 | } | |
418 | ||
419 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
420 | { | |
421 | struct saa7134_dev *dev = fe->dvb->priv; | |
422 | ||
423 | if (dev->original_demod_sleep) | |
424 | dev->original_demod_sleep(fe); | |
dea74869 | 425 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 426 | return 0; |
2cf36ac4 HH |
427 | } |
428 | ||
429 | static struct tda1004x_config philips_europa_config = { | |
430 | ||
431 | .demod_address = 0x8, | |
432 | .invert = 0, | |
433 | .invert_oclk = 0, | |
434 | .xtal_freq = TDA10046_XTAL_4M, | |
435 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
436 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
437 | .tuner_address = 0x61, |
438 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
439 | }; |
440 | ||
441 | /* ------------------------------------------------------------------ */ | |
86ddd96f | 442 | |
a79ddae9 | 443 | static int philips_fmd1216_tuner_init(struct dvb_frontend *fe) |
86ddd96f MCC |
444 | { |
445 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
446 | struct tda1004x_state *state = fe->demodulator_priv; |
447 | u8 addr = state->config->tuner_address; | |
86ddd96f MCC |
448 | /* this message is to set up ATC and ALC */ |
449 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 }; | |
58ef4f92 | 450 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; |
86ddd96f | 451 | |
dea74869 PB |
452 | if (fe->ops.i2c_gate_ctrl) |
453 | fe->ops.i2c_gate_ctrl(fe, 1); | |
86ddd96f MCC |
454 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
455 | return -EIO; | |
456 | msleep(1); | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
a79ddae9 | 461 | static int philips_fmd1216_tuner_sleep(struct dvb_frontend *fe) |
86ddd96f MCC |
462 | { |
463 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
464 | struct tda1004x_state *state = fe->demodulator_priv; |
465 | u8 addr = state->config->tuner_address; | |
86ddd96f MCC |
466 | /* this message actually turns the tuner back to analog mode */ |
467 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 }; | |
58ef4f92 | 468 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; |
86ddd96f | 469 | |
dea74869 PB |
470 | if (fe->ops.i2c_gate_ctrl) |
471 | fe->ops.i2c_gate_ctrl(fe, 1); | |
86ddd96f MCC |
472 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
473 | msleep(1); | |
474 | fmd1216_init[2] = 0x86; | |
475 | fmd1216_init[3] = 0x54; | |
dea74869 PB |
476 | if (fe->ops.i2c_gate_ctrl) |
477 | fe->ops.i2c_gate_ctrl(fe, 1); | |
86ddd96f MCC |
478 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
479 | msleep(1); | |
a79ddae9 | 480 | return 0; |
86ddd96f MCC |
481 | } |
482 | ||
a79ddae9 | 483 | static int philips_fmd1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
86ddd96f MCC |
484 | { |
485 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
486 | struct tda1004x_state *state = fe->demodulator_priv; |
487 | u8 addr = state->config->tuner_address; | |
86ddd96f | 488 | u8 tuner_buf[4]; |
58ef4f92 | 489 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
490 | sizeof(tuner_buf) }; |
491 | int tuner_frequency = 0; | |
492 | int divider = 0; | |
493 | u8 band, mode, cp; | |
494 | ||
495 | /* determine charge pump */ | |
496 | tuner_frequency = params->frequency + 36130000; | |
497 | if (tuner_frequency < 87000000) | |
498 | return -EINVAL; | |
499 | /* low band */ | |
500 | else if (tuner_frequency < 180000000) { | |
501 | band = 1; | |
502 | mode = 7; | |
503 | cp = 0; | |
504 | } else if (tuner_frequency < 195000000) { | |
505 | band = 1; | |
506 | mode = 6; | |
507 | cp = 1; | |
508 | /* mid band */ | |
509 | } else if (tuner_frequency < 366000000) { | |
510 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
511 | band = 10; | |
512 | } else { | |
513 | band = 2; | |
514 | } | |
515 | mode = 7; | |
516 | cp = 0; | |
517 | } else if (tuner_frequency < 478000000) { | |
518 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
519 | band = 10; | |
520 | } else { | |
521 | band = 2; | |
522 | } | |
523 | mode = 6; | |
524 | cp = 1; | |
525 | /* high band */ | |
526 | } else if (tuner_frequency < 662000000) { | |
527 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
528 | band = 12; | |
529 | } else { | |
530 | band = 4; | |
531 | } | |
532 | mode = 7; | |
533 | cp = 0; | |
534 | } else if (tuner_frequency < 840000000) { | |
535 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
536 | band = 12; | |
537 | } else { | |
538 | band = 4; | |
539 | } | |
540 | mode = 6; | |
541 | cp = 1; | |
542 | } else { | |
543 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
544 | band = 12; | |
545 | } else { | |
546 | band = 4; | |
547 | } | |
548 | mode = 7; | |
549 | cp = 1; | |
550 | ||
551 | } | |
552 | /* calculate divisor */ | |
553 | /* ((36166000 + Finput) / 166666) rounded! */ | |
554 | divider = (tuner_frequency + 83333) / 166667; | |
555 | ||
556 | /* setup tuner buffer */ | |
557 | tuner_buf[0] = (divider >> 8) & 0x7f; | |
558 | tuner_buf[1] = divider & 0xff; | |
559 | tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4; | |
560 | tuner_buf[3] = 0x40 | band; | |
561 | ||
dea74869 PB |
562 | if (fe->ops.i2c_gate_ctrl) |
563 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 HH |
564 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
565 | printk("%s/dvb: could not write to tuner at addr: 0x%02x\n",dev->name, addr << 1); | |
86ddd96f | 566 | return -EIO; |
58ef4f92 | 567 | } |
86ddd96f MCC |
568 | return 0; |
569 | } | |
570 | ||
408b664a | 571 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
572 | .demod_address = 0x08, |
573 | .invert = 1, | |
574 | .invert_oclk = 0, | |
575 | .xtal_freq = TDA10046_XTAL_16M, | |
576 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
577 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
578 | .tuner_address = 0x61, |
579 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
580 | }; |
581 | ||
58ef4f92 HH |
582 | /* ------------------------------------------------------------------ |
583 | * tda 1004x based cards with philips silicon tuner | |
584 | */ | |
585 | ||
586 | static void philips_tda827x_lna_gain(struct dvb_frontend *fe, int high) | |
587 | { | |
588 | struct saa7134_dev *dev = fe->dvb->priv; | |
589 | struct tda1004x_state *state = fe->demodulator_priv; | |
590 | u8 addr = state->config->i2c_gate; | |
591 | u8 config = state->config->tuner_config; | |
592 | u8 GP00_CF[] = {0x20, 0x01}; | |
593 | u8 GP00_LEV[] = {0x22, 0x00}; | |
594 | ||
595 | struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = GP00_CF, .len = 2}; | |
596 | if (config) { | |
597 | if (high) { | |
598 | dprintk("setting LNA to high gain\n"); | |
599 | } else { | |
600 | dprintk("setting LNA to low gain\n"); | |
601 | } | |
602 | } | |
603 | switch (config) { | |
604 | case 0: /* no LNA */ | |
605 | break; | |
606 | case 1: /* switch is GPIO 0 of tda8290 */ | |
607 | case 2: | |
608 | /* turn Vsync off */ | |
609 | saa7134_set_gpio(dev, 22, 0); | |
610 | GP00_LEV[1] = high ? 0 : 1; | |
611 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) { | |
612 | printk("%s/dvb: could not access tda8290 at addr: 0x%02x\n",dev->name, addr << 1); | |
613 | return; | |
614 | } | |
615 | msg.buf = GP00_LEV; | |
616 | if (config == 2) | |
617 | GP00_LEV[1] = high ? 1 : 0; | |
618 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
619 | break; | |
620 | case 3: /* switch with GPIO of saa713x */ | |
621 | saa7134_set_gpio(dev, 22, high); | |
622 | break; | |
623 | } | |
624 | } | |
625 | ||
626 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) | |
627 | { | |
58ef4f92 HH |
628 | struct tda1004x_state *state = fe->demodulator_priv; |
629 | ||
630 | u8 addr = state->config->i2c_gate; | |
631 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
632 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
633 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
634 | if (enable) { | |
635 | tda8290_msg.buf = tda8290_close; | |
636 | } else { | |
637 | tda8290_msg.buf = tda8290_open; | |
638 | } | |
06be3035 HH |
639 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
640 | printk("saa7134/dvb: could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
641 | return -EIO; |
642 | } | |
643 | msleep(20); | |
644 | return 0; | |
645 | } | |
646 | ||
86ddd96f MCC |
647 | /* ------------------------------------------------------------------ */ |
648 | ||
58ef4f92 | 649 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 650 | { |
90e9df7f | 651 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 652 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 653 | |
58ef4f92 HH |
654 | switch (state->config->antenna_switch) { |
655 | case 0: break; | |
656 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
657 | saa7134_set_gpio(dev, 21, 0); | |
658 | break; | |
659 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
660 | saa7134_set_gpio(dev, 21, 1); | |
661 | break; | |
587d2fd7 | 662 | } |
587d2fd7 HH |
663 | return 0; |
664 | } | |
665 | ||
58ef4f92 | 666 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 667 | { |
58ef4f92 HH |
668 | struct saa7134_dev *dev = fe->dvb->priv; |
669 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 670 | |
58ef4f92 HH |
671 | switch (state->config->antenna_switch) { |
672 | case 0: break; | |
673 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
674 | saa7134_set_gpio(dev, 21, 1); | |
675 | break; | |
676 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
677 | saa7134_set_gpio(dev, 21, 0); | |
678 | break; | |
679 | } | |
587d2fd7 | 680 | return 0; |
2d6b5f62 | 681 | } |
90e9df7f | 682 | |
8ce47dad MK |
683 | static struct tda827x_config tda827x_cfg = { |
684 | .lna_gain = philips_tda827x_lna_gain, | |
685 | .init = philips_tda827x_tuner_init, | |
686 | .sleep = philips_tda827x_tuner_sleep | |
687 | }; | |
90e9df7f | 688 | |
b8bc76d8 | 689 | static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config *tda_conf) |
90e9df7f | 690 | { |
58ef4f92 HH |
691 | dev->dvb.frontend = dvb_attach(tda10046_attach, tda_conf, &dev->i2c_adap); |
692 | if (dev->dvb.frontend) { | |
693 | if (tda_conf->i2c_gate) | |
694 | dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; | |
ede2200d HH |
695 | if (dvb_attach(tda827x_attach, dev->dvb.frontend, tda_conf->tuner_address, |
696 | &dev->i2c_adap,&tda827x_cfg) == NULL) { | |
697 | printk ("saa7134/dvb: no tda827x tuner found at addr: %02x\n", | |
698 | tda_conf->tuner_address); | |
699 | } | |
58ef4f92 | 700 | } |
90e9df7f HH |
701 | } |
702 | ||
58ef4f92 HH |
703 | /* ------------------------------------------------------------------ */ |
704 | static struct tda1004x_config tda827x_lifeview_config = { | |
90e9df7f HH |
705 | .demod_address = 0x08, |
706 | .invert = 1, | |
707 | .invert_oclk = 0, | |
708 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
709 | .agc_config = TDA10046_AGC_TDA827X, |
710 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 711 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
712 | .tuner_address = 0x60, |
713 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 714 | }; |
550a9a5e | 715 | |
58ef4f92 HH |
716 | static struct tda1004x_config philips_tiger_config = { |
717 | .demod_address = 0x08, | |
718 | .invert = 1, | |
719 | .invert_oclk = 0, | |
720 | .xtal_freq = TDA10046_XTAL_16M, | |
721 | .agc_config = TDA10046_AGC_TDA827X, | |
722 | .gpio_config = TDA10046_GP11_I, | |
723 | .if_freq = TDA10046_FREQ_045, | |
724 | .i2c_gate = 0x4b, | |
725 | .tuner_address = 0x61, | |
726 | .tuner_config = 0, | |
727 | .antenna_switch= 1, | |
728 | .request_firmware = philips_tda1004x_request_firmware | |
729 | }; | |
550a9a5e HH |
730 | |
731 | static struct tda1004x_config cinergy_ht_config = { | |
732 | .demod_address = 0x08, | |
733 | .invert = 1, | |
734 | .invert_oclk = 0, | |
735 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
736 | .agc_config = TDA10046_AGC_TDA827X, |
737 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 738 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
739 | .i2c_gate = 0x4b, |
740 | .tuner_address = 0x61, | |
741 | .tuner_config = 0, | |
742 | .request_firmware = philips_tda1004x_request_firmware | |
90e9df7f HH |
743 | }; |
744 | ||
58ef4f92 HH |
745 | static struct tda1004x_config cinergy_ht_pci_config = { |
746 | .demod_address = 0x08, | |
747 | .invert = 1, | |
748 | .invert_oclk = 0, | |
749 | .xtal_freq = TDA10046_XTAL_16M, | |
750 | .agc_config = TDA10046_AGC_TDA827X, | |
751 | .gpio_config = TDA10046_GP01_I, | |
752 | .if_freq = TDA10046_FREQ_045, | |
753 | .i2c_gate = 0x4b, | |
754 | .tuner_address = 0x60, | |
755 | .tuner_config = 0, | |
756 | .request_firmware = philips_tda1004x_request_firmware | |
757 | }; | |
758 | ||
759 | static struct tda1004x_config philips_tiger_s_config = { | |
760 | .demod_address = 0x08, | |
761 | .invert = 1, | |
762 | .invert_oclk = 0, | |
763 | .xtal_freq = TDA10046_XTAL_16M, | |
764 | .agc_config = TDA10046_AGC_TDA827X, | |
765 | .gpio_config = TDA10046_GP01_I, | |
766 | .if_freq = TDA10046_FREQ_045, | |
767 | .i2c_gate = 0x4b, | |
768 | .tuner_address = 0x61, | |
769 | .tuner_config = 2, | |
770 | .antenna_switch= 1, | |
771 | .request_firmware = philips_tda1004x_request_firmware | |
772 | }; | |
df42eaf2 | 773 | |
587d2fd7 HH |
774 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
775 | .demod_address = 0x08, | |
776 | .invert = 1, | |
777 | .invert_oclk = 0, | |
778 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
779 | .agc_config = TDA10046_AGC_TDA827X, |
780 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 781 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
782 | .i2c_gate = 0x4b, |
783 | .tuner_address = 0x61, | |
784 | .tuner_config = 1, | |
785 | .request_firmware = philips_tda1004x_request_firmware | |
587d2fd7 HH |
786 | }; |
787 | ||
c6e53daf TG |
788 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
789 | .demod_address = 0x08, | |
790 | .invert = 1, | |
791 | .invert_oclk = 0, | |
792 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
793 | .agc_config = TDA10046_AGC_TDA827X, |
794 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 795 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
796 | .i2c_gate = 0x4b, |
797 | .tuner_address = 0x61, | |
798 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
799 | }; |
800 | ||
83646817 HH |
801 | static struct tda1004x_config asus_p7131_dual_config = { |
802 | .demod_address = 0x08, | |
803 | .invert = 1, | |
804 | .invert_oclk = 0, | |
805 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
806 | .agc_config = TDA10046_AGC_TDA827X, |
807 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 808 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
809 | .i2c_gate = 0x4b, |
810 | .tuner_address = 0x61, | |
811 | .tuner_config = 0, | |
812 | .antenna_switch= 2, | |
813 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
814 | }; |
815 | ||
420f32fe NS |
816 | static struct tda1004x_config lifeview_trio_config = { |
817 | .demod_address = 0x09, | |
818 | .invert = 1, | |
819 | .invert_oclk = 0, | |
820 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
821 | .agc_config = TDA10046_AGC_TDA827X, |
822 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 823 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
824 | .tuner_address = 0x60, |
825 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
826 | }; |
827 | ||
58ef4f92 | 828 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
829 | .demod_address = 0x08, |
830 | .invert = 1, | |
831 | .invert_oclk = 0, | |
832 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 833 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 834 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 835 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
836 | .tuner_address = 0x60, |
837 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
838 | }; |
839 | ||
58ef4f92 | 840 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
841 | .demod_address = 0x08, |
842 | .invert = 1, | |
843 | .invert_oclk = 0, | |
844 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 845 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 846 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 847 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
848 | .i2c_gate = 0x4b, |
849 | .tuner_address = 0x60, | |
850 | .tuner_config = 0, | |
851 | .request_firmware = philips_tda1004x_request_firmware | |
3dfb729f PH |
852 | }; |
853 | ||
58ef4f92 HH |
854 | /* ------------------------------------------------------------------ |
855 | * special case: this card uses saa713x GPIO22 for the mode switch | |
856 | */ | |
5eda227f | 857 | |
58ef4f92 | 858 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
859 | { |
860 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
861 | philips_tda827x_tuner_init(fe); |
862 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 863 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
864 | return 0; |
865 | } | |
866 | ||
58ef4f92 | 867 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 868 | { |
5eda227f | 869 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 870 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 871 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
872 | philips_tda827x_tuner_sleep(fe); |
873 | return 0; | |
5eda227f HH |
874 | } |
875 | ||
8ce47dad MK |
876 | static struct tda827x_config ads_duo_cfg = { |
877 | .lna_gain = philips_tda827x_lna_gain, | |
878 | .init = ads_duo_tuner_init, | |
879 | .sleep = ads_duo_tuner_sleep | |
880 | }; | |
881 | ||
58ef4f92 | 882 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
883 | .demod_address = 0x08, |
884 | .invert = 1, | |
885 | .invert_oclk = 0, | |
886 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 887 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 888 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 889 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
890 | .tuner_address = 0x61, |
891 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
892 | }; |
893 | ||
58ef4f92 HH |
894 | /* ================================================================== |
895 | * tda10086 based DVB-S cards, helper functions | |
896 | */ | |
897 | ||
e2ac28fa IL |
898 | static struct tda10086_config flydvbs = { |
899 | .demod_address = 0x0e, | |
900 | .invert = 0, | |
901 | }; | |
902 | ||
58ef4f92 HH |
903 | /* ================================================================== |
904 | * nxt200x based ATSC cards, helper functions | |
905 | */ | |
90e9df7f | 906 | |
3b64e8e2 MK |
907 | static struct nxt200x_config avertvhda180 = { |
908 | .demod_address = 0x0a, | |
3b64e8e2 | 909 | }; |
3e1410ad | 910 | |
fbc81c07 CM |
911 | static int nxt200x_set_pll_input(u8 *buf, int input) |
912 | { | |
913 | if (input) | |
914 | buf[3] |= 0x08; | |
915 | else | |
916 | buf[3] &= ~0x08; | |
917 | return 0; | |
918 | } | |
919 | ||
3e1410ad AB |
920 | static struct nxt200x_config kworldatsc110 = { |
921 | .demod_address = 0x0a, | |
fbc81c07 | 922 | .set_pll_input = nxt200x_set_pll_input, |
3e1410ad | 923 | }; |
3b64e8e2 | 924 | |
58ef4f92 HH |
925 | /* ================================================================== |
926 | * Core code | |
927 | */ | |
1da177e4 LT |
928 | |
929 | static int dvb_init(struct saa7134_dev *dev) | |
930 | { | |
1c4f76ab | 931 | int ret; |
1da177e4 LT |
932 | /* init struct videobuf_dvb */ |
933 | dev->ts.nr_bufs = 32; | |
934 | dev->ts.nr_packets = 32*4; | |
935 | dev->dvb.name = dev->name; | |
936 | videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops, | |
937 | dev->pci, &dev->slock, | |
938 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
939 | V4L2_FIELD_ALTERNATE, | |
940 | sizeof(struct saa7134_buf), | |
941 | dev); | |
942 | ||
943 | switch (dev->board) { | |
944 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
945 | printk("%s: pinnacle 300i dvb setup\n",dev->name); | |
2bfe031d | 946 | dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 947 | &dev->i2c_adap); |
6b3ccab7 | 948 | if (dev->dvb.frontend) { |
dea74869 | 949 | dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; |
6b3ccab7 | 950 | } |
1da177e4 | 951 | break; |
a78d0bfa | 952 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 953 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
a78d0bfa | 954 | printk("%s: avertv 777 dvb setup\n",dev->name); |
2bfe031d | 955 | dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 956 | &dev->i2c_adap); |
6b3ccab7 | 957 | if (dev->dvb.frontend) { |
dea74869 | 958 | dev->dvb.frontend->ops.tuner_ops.calc_regs = mt352_aver777_tuner_calc_regs; |
6b3ccab7 | 959 | } |
a78d0bfa | 960 | break; |
1da177e4 | 961 | case SAA7134_BOARD_MD7134: |
f7b54b10 MK |
962 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
963 | &medion_cardbus, | |
964 | &dev->i2c_adap); | |
6b3ccab7 | 965 | if (dev->dvb.frontend) { |
dea74869 PB |
966 | dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init; |
967 | dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep; | |
968 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params; | |
6b3ccab7 | 969 | } |
1da177e4 | 970 | break; |
86ddd96f | 971 | case SAA7134_BOARD_PHILIPS_TOUGH: |
f7b54b10 MK |
972 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
973 | &philips_tu1216_60_config, | |
974 | &dev->i2c_adap); | |
6b3ccab7 | 975 | if (dev->dvb.frontend) { |
58ef4f92 HH |
976 | dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; |
977 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 978 | } |
86ddd96f MCC |
979 | break; |
980 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 981 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
b8bc76d8 | 982 | configure_tda827x_fe(dev, &tda827x_lifeview_config); |
86ddd96f | 983 | break; |
2cf36ac4 | 984 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 985 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
f7b54b10 MK |
986 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
987 | &philips_europa_config, | |
988 | &dev->i2c_adap); | |
6b3ccab7 | 989 | if (dev->dvb.frontend) { |
588f9831 HH |
990 | dev->original_demod_sleep = dev->dvb.frontend->ops.sleep; |
991 | dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
dea74869 PB |
992 | dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; |
993 | dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
994 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 995 | } |
2cf36ac4 HH |
996 | break; |
997 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
f7b54b10 MK |
998 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
999 | &philips_tu1216_61_config, | |
1000 | &dev->i2c_adap); | |
6b3ccab7 | 1001 | if (dev->dvb.frontend) { |
58ef4f92 HH |
1002 | dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; |
1003 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1004 | } |
2cf36ac4 | 1005 | break; |
90e9df7f | 1006 | case SAA7134_BOARD_PHILIPS_TIGER: |
b8bc76d8 | 1007 | configure_tda827x_fe(dev, &philips_tiger_config); |
587d2fd7 HH |
1008 | break; |
1009 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
b8bc76d8 | 1010 | configure_tda827x_fe(dev, &pinnacle_pctv_310i_config); |
90e9df7f | 1011 | break; |
c6e53daf | 1012 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
b8bc76d8 | 1013 | configure_tda827x_fe(dev, &hauppauge_hvr_1110_config); |
c6e53daf | 1014 | break; |
d4b0aba4 | 1015 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
b8bc76d8 | 1016 | configure_tda827x_fe(dev, &asus_p7131_dual_config); |
d4b0aba4 | 1017 | break; |
3d8466ec | 1018 | case SAA7134_BOARD_FLYDVBT_LR301: |
b8bc76d8 | 1019 | configure_tda827x_fe(dev, &tda827x_lifeview_config); |
3d8466ec | 1020 | break; |
420f32fe | 1021 | case SAA7134_BOARD_FLYDVB_TRIO: |
b331daa0 | 1022 | if(! use_frontend) { //terrestrial |
b8bc76d8 | 1023 | configure_tda827x_fe(dev, &lifeview_trio_config); |
1f683cd8 NS |
1024 | } else { //satellite |
1025 | dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); | |
1026 | if (dev->dvb.frontend) { | |
1027 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63, | |
1028 | &dev->i2c_adap, 0) == NULL) { | |
1029 | printk("%s: Lifeview Trio, No tda826x found!\n", __FUNCTION__); | |
1030 | } | |
1031 | if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap, | |
1032 | 0x08, 0, 0) == NULL) { | |
1033 | printk("%s: Lifeview Trio, No ISL6421 found!\n", __FUNCTION__); | |
1034 | } | |
1035 | } | |
6b3ccab7 | 1036 | } |
420f32fe | 1037 | break; |
df42eaf2 | 1038 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1039 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
f7b54b10 MK |
1040 | dev->dvb.frontend = dvb_attach(tda10046_attach, |
1041 | &ads_tech_duo_config, | |
1042 | &dev->i2c_adap); | |
6b3ccab7 | 1043 | if (dev->dvb.frontend) { |
ede2200d | 1044 | if (dvb_attach(tda827x_attach,dev->dvb.frontend, |
8ce47dad | 1045 | ads_tech_duo_config.tuner_address, |
ede2200d HH |
1046 | &dev->i2c_adap,&ads_duo_cfg) == NULL) { |
1047 | printk ("saa7134/dvb: no tda827x tuner found at addr: %02x\n", | |
1048 | ads_tech_duo_config.tuner_address); | |
1049 | } | |
6b3ccab7 | 1050 | } |
df42eaf2 | 1051 | break; |
3dfb729f | 1052 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
b8bc76d8 | 1053 | configure_tda827x_fe(dev, &tevion_dvbt220rf_config); |
d95b8942 | 1054 | break; |
5eda227f | 1055 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
b8bc76d8 | 1056 | configure_tda827x_fe(dev, &md8800_dvbt_config); |
5eda227f | 1057 | break; |
3b64e8e2 | 1058 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
f7b54b10 MK |
1059 | dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
1060 | &dev->i2c_adap); | |
a79ddae9 | 1061 | if (dev->dvb.frontend) { |
4ad8eee5 MK |
1062 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
1063 | NULL, &dvb_pll_tdhu2); | |
a79ddae9 | 1064 | } |
3b64e8e2 | 1065 | break; |
3e1410ad | 1066 | case SAA7134_BOARD_KWORLD_ATSC110: |
f7b54b10 MK |
1067 | dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
1068 | &dev->i2c_adap); | |
a79ddae9 | 1069 | if (dev->dvb.frontend) { |
4ad8eee5 MK |
1070 | dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61, |
1071 | NULL, &dvb_pll_tuv1236d); | |
a79ddae9 | 1072 | } |
3e1410ad | 1073 | break; |
e2ac28fa | 1074 | case SAA7134_BOARD_FLYDVBS_LR300: |
f7b54b10 MK |
1075 | dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
1076 | &dev->i2c_adap); | |
e2ac28fa | 1077 | if (dev->dvb.frontend) { |
f7b54b10 MK |
1078 | if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60, |
1079 | &dev->i2c_adap, 0) == NULL) { | |
e2ac28fa IL |
1080 | printk("%s: No tda826x found!\n", __FUNCTION__); |
1081 | } | |
f7b54b10 MK |
1082 | if (dvb_attach(isl6421_attach, dev->dvb.frontend, |
1083 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { | |
e2ac28fa IL |
1084 | printk("%s: No ISL6421 found!\n", __FUNCTION__); |
1085 | } | |
1086 | } | |
1087 | break; | |
cf146ca4 HH |
1088 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
1089 | dev->dvb.frontend = tda10046_attach(&medion_cardbus, | |
1090 | &dev->i2c_adap); | |
1091 | if (dev->dvb.frontend) { | |
1092 | dev->original_demod_sleep = dev->dvb.frontend->ops.sleep; | |
1093 | dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1094 | dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init; | |
1095 | dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep; | |
1096 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params; | |
1097 | } | |
1098 | break; | |
cbb94521 HH |
1099 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
1100 | dev->dvb.frontend = dvb_attach(tda10046_attach, | |
1101 | &philips_europa_config, | |
1102 | &dev->i2c_adap); | |
1103 | if (dev->dvb.frontend) { | |
1104 | dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1105 | dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
1106 | } | |
1107 | break; | |
550a9a5e | 1108 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
b8bc76d8 | 1109 | configure_tda827x_fe(dev, &cinergy_ht_config); |
9de271e6 MK |
1110 | break; |
1111 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
b8bc76d8 | 1112 | configure_tda827x_fe(dev, &cinergy_ht_pci_config); |
58ef4f92 HH |
1113 | break; |
1114 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
b8bc76d8 | 1115 | configure_tda827x_fe(dev, &philips_tiger_s_config); |
550a9a5e | 1116 | break; |
1da177e4 LT |
1117 | default: |
1118 | printk("%s: Huh? unknown DVB card?\n",dev->name); | |
1119 | break; | |
1120 | } | |
1121 | ||
1122 | if (NULL == dev->dvb.frontend) { | |
1123 | printk("%s: frontend initialization failed\n",dev->name); | |
1124 | return -1; | |
1125 | } | |
1126 | ||
1127 | /* register everything else */ | |
1c4f76ab HH |
1128 | ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev); |
1129 | ||
1130 | /* this sequence is necessary to make the tda1004x load its firmware | |
1131 | * and to enter analog mode of hybrid boards | |
1132 | */ | |
1133 | if (!ret) { | |
1134 | if (dev->dvb.frontend->ops.init) | |
1135 | dev->dvb.frontend->ops.init(dev->dvb.frontend); | |
1136 | if (dev->dvb.frontend->ops.sleep) | |
1137 | dev->dvb.frontend->ops.sleep(dev->dvb.frontend); | |
1138 | } | |
1139 | return ret; | |
1da177e4 LT |
1140 | } |
1141 | ||
1142 | static int dvb_fini(struct saa7134_dev *dev) | |
1143 | { | |
1144 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1145 | ||
1da177e4 LT |
1146 | switch (dev->board) { |
1147 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
1148 | /* otherwise we don't detect the tuner on next insmod */ | |
1149 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
1150 | break; | |
1151 | }; | |
1152 | videobuf_dvb_unregister(&dev->dvb); | |
1153 | return 0; | |
1154 | } | |
1155 | ||
1156 | static struct saa7134_mpeg_ops dvb_ops = { | |
1157 | .type = SAA7134_MPEG_DVB, | |
1158 | .init = dvb_init, | |
1159 | .fini = dvb_fini, | |
1160 | }; | |
1161 | ||
1162 | static int __init dvb_register(void) | |
1163 | { | |
1164 | return saa7134_ts_register(&dvb_ops); | |
1165 | } | |
1166 | ||
1167 | static void __exit dvb_unregister(void) | |
1168 | { | |
1169 | saa7134_ts_unregister(&dvb_ops); | |
1170 | } | |
1171 | ||
1172 | module_init(dvb_register); | |
1173 | module_exit(dvb_unregister); | |
1174 | ||
1175 | /* ------------------------------------------------------------------ */ | |
1176 | /* | |
1177 | * Local variables: | |
1178 | * c-basic-offset: 8 | |
1179 | * End: | |
1180 | */ |