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1da177e4 | 1 | /* |
86ddd96f | 2 | * $Id: saa7134-dvb.c,v 1.18 2005/07/04 16:05:50 mkrufky Exp $ |
1da177e4 LT |
3 | * |
4 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
5 | * | |
86ddd96f MCC |
6 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
7 | * cards with the tda10046 DVB-T channel decoder | |
8 | * | |
1da177e4 LT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/init.h> | |
25 | #include <linux/list.h> | |
26 | #include <linux/module.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/kthread.h> | |
31 | #include <linux/suspend.h> | |
32 | ||
55ee3b83 MK |
33 | #define CONFIG_DVB_MT352 1 |
34 | #define CONFIG_DVB_TDA1004X 1 | |
35 | ||
1da177e4 LT |
36 | #include "saa7134-reg.h" |
37 | #include "saa7134.h" | |
38 | ||
86ddd96f MCC |
39 | #if CONFIG_DVB_MT352 |
40 | # include "mt352.h" | |
41 | # include "mt352_priv.h" /* FIXME */ | |
42 | #endif | |
43 | #if CONFIG_DVB_TDA1004X | |
44 | # include "tda1004x.h" | |
45 | #endif | |
1da177e4 LT |
46 | |
47 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
48 | MODULE_LICENSE("GPL"); | |
49 | ||
50 | static unsigned int antenna_pwr = 0; | |
86ddd96f | 51 | |
1da177e4 LT |
52 | module_param(antenna_pwr, int, 0444); |
53 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
54 | ||
55 | /* ------------------------------------------------------------------ */ | |
56 | ||
86ddd96f | 57 | #if CONFIG_DVB_MT352 |
1da177e4 LT |
58 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
59 | { | |
60 | u32 ok; | |
61 | ||
62 | if (!on) { | |
63 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
64 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
65 | return 0; | |
66 | } | |
67 | ||
68 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
69 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
70 | udelay(10); | |
71 | ||
72 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
73 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
74 | udelay(10); | |
75 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
76 | udelay(10); | |
77 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
78 | printk("%s: %s %s\n", dev->name, __FUNCTION__, | |
79 | ok ? "on" : "off"); | |
80 | ||
81 | if (!ok) | |
82 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
83 | return ok; | |
84 | } | |
85 | ||
86 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
87 | { | |
88 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
89 | static u8 reset [] = { RESET, 0x80 }; | |
90 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
91 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
92 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
93 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
94 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
95 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
96 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
97 | struct saa7134_dev *dev= fe->dvb->priv; | |
98 | ||
99 | printk("%s: %s called\n",dev->name,__FUNCTION__); | |
100 | ||
101 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
102 | udelay(200); | |
103 | mt352_write(fe, reset, sizeof(reset)); | |
104 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
105 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
106 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
107 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
108 | ||
109 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
110 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
111 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
112 | return 0; | |
113 | } | |
114 | ||
115 | static int mt352_pinnacle_pll_set(struct dvb_frontend* fe, | |
116 | struct dvb_frontend_parameters* params, | |
117 | u8* pllbuf) | |
118 | { | |
119 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
120 | static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE; | |
121 | struct saa7134_dev *dev = fe->dvb->priv; | |
122 | struct v4l2_frequency f; | |
123 | ||
124 | /* set frequency (mt2050) */ | |
125 | f.tuner = 0; | |
126 | f.type = V4L2_TUNER_DIGITAL_TV; | |
127 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
128 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
129 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); | |
130 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off); | |
131 | ||
132 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
133 | ||
134 | /* mt352 setup */ | |
135 | mt352_pinnacle_init(fe); | |
136 | pllbuf[0] = 0xc2; | |
137 | pllbuf[1] = 0x00; | |
138 | pllbuf[2] = 0x00; | |
139 | pllbuf[3] = 0x80; | |
140 | pllbuf[4] = 0x00; | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static struct mt352_config pinnacle_300i = { | |
145 | .demod_address = 0x3c >> 1, | |
146 | .adc_clock = 20333, | |
147 | .if2 = 36150, | |
148 | .no_tuner = 1, | |
149 | .demod_init = mt352_pinnacle_init, | |
150 | .pll_set = mt352_pinnacle_pll_set, | |
151 | }; | |
86ddd96f | 152 | #endif |
1da177e4 LT |
153 | |
154 | /* ------------------------------------------------------------------ */ | |
155 | ||
86ddd96f MCC |
156 | #if CONFIG_DVB_TDA1004X |
157 | static int philips_tu1216_pll_init(struct dvb_frontend *fe) | |
1da177e4 | 158 | { |
86ddd96f MCC |
159 | struct saa7134_dev *dev = fe->dvb->priv; |
160 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; | |
161 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
162 | ||
163 | /* setup PLL configuration */ | |
164 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
165 | return -EIO; | |
166 | msleep(1); | |
167 | ||
1da177e4 LT |
168 | return 0; |
169 | } | |
170 | ||
86ddd96f | 171 | static int philips_tu1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
1da177e4 LT |
172 | { |
173 | struct saa7134_dev *dev = fe->dvb->priv; | |
86ddd96f MCC |
174 | u8 tuner_buf[4]; |
175 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,.len = | |
176 | sizeof(tuner_buf) }; | |
177 | int tuner_frequency = 0; | |
178 | u8 band, cp, filter; | |
179 | ||
180 | /* determine charge pump */ | |
181 | tuner_frequency = params->frequency + 36166000; | |
182 | if (tuner_frequency < 87000000) | |
183 | return -EINVAL; | |
184 | else if (tuner_frequency < 130000000) | |
185 | cp = 3; | |
186 | else if (tuner_frequency < 160000000) | |
187 | cp = 5; | |
188 | else if (tuner_frequency < 200000000) | |
189 | cp = 6; | |
190 | else if (tuner_frequency < 290000000) | |
191 | cp = 3; | |
192 | else if (tuner_frequency < 420000000) | |
193 | cp = 5; | |
194 | else if (tuner_frequency < 480000000) | |
195 | cp = 6; | |
196 | else if (tuner_frequency < 620000000) | |
197 | cp = 3; | |
198 | else if (tuner_frequency < 830000000) | |
199 | cp = 5; | |
200 | else if (tuner_frequency < 895000000) | |
201 | cp = 7; | |
202 | else | |
203 | return -EINVAL; | |
204 | ||
205 | /* determine band */ | |
206 | if (params->frequency < 49000000) | |
207 | return -EINVAL; | |
208 | else if (params->frequency < 161000000) | |
209 | band = 1; | |
210 | else if (params->frequency < 444000000) | |
211 | band = 2; | |
212 | else if (params->frequency < 861000000) | |
213 | band = 4; | |
214 | else | |
215 | return -EINVAL; | |
216 | ||
217 | /* setup PLL filter */ | |
218 | switch (params->u.ofdm.bandwidth) { | |
219 | case BANDWIDTH_6_MHZ: | |
220 | filter = 0; | |
221 | break; | |
222 | ||
223 | case BANDWIDTH_7_MHZ: | |
224 | filter = 0; | |
225 | break; | |
226 | ||
227 | case BANDWIDTH_8_MHZ: | |
228 | filter = 1; | |
229 | break; | |
1da177e4 | 230 | |
86ddd96f MCC |
231 | default: |
232 | return -EINVAL; | |
233 | } | |
234 | ||
235 | /* calculate divisor | |
236 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 237 | */ |
86ddd96f MCC |
238 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
239 | ||
240 | /* setup tuner buffer */ | |
241 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
242 | tuner_buf[1] = tuner_frequency & 0xff; | |
243 | tuner_buf[2] = 0xca; | |
244 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
245 | ||
246 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
247 | return -EIO; | |
248 | ||
249 | msleep(1); | |
1da177e4 LT |
250 | return 0; |
251 | } | |
252 | ||
86ddd96f MCC |
253 | static int philips_tu1216_request_firmware(struct dvb_frontend *fe, |
254 | const struct firmware **fw, char *name) | |
1da177e4 LT |
255 | { |
256 | struct saa7134_dev *dev = fe->dvb->priv; | |
257 | return request_firmware(fw, name, &dev->pci->dev); | |
258 | } | |
259 | ||
86ddd96f MCC |
260 | static struct tda1004x_config philips_tu1216_config = { |
261 | ||
262 | .demod_address = 0x8, | |
263 | .invert = 1, | |
264 | .invert_oclk = 1, | |
265 | .xtal_freq = TDA10046_XTAL_4M, | |
266 | .agc_config = TDA10046_AGC_DEFAULT, | |
267 | .if_freq = TDA10046_FREQ_3617, | |
268 | .pll_init = philips_tu1216_pll_init, | |
269 | .pll_set = philips_tu1216_pll_set, | |
270 | .pll_sleep = NULL, | |
271 | .request_firmware = philips_tu1216_request_firmware, | |
272 | }; | |
273 | ||
274 | /* ------------------------------------------------------------------ */ | |
275 | ||
276 | ||
277 | static int philips_fmd1216_pll_init(struct dvb_frontend *fe) | |
278 | { | |
279 | struct saa7134_dev *dev = fe->dvb->priv; | |
280 | /* this message is to set up ATC and ALC */ | |
281 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 }; | |
282 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; | |
283 | ||
284 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
285 | return -EIO; | |
286 | msleep(1); | |
287 | ||
288 | return 0; | |
289 | } | |
290 | ||
291 | static void philips_fmd1216_analog(struct dvb_frontend *fe) | |
292 | { | |
293 | struct saa7134_dev *dev = fe->dvb->priv; | |
294 | /* this message actually turns the tuner back to analog mode */ | |
295 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 }; | |
296 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; | |
297 | ||
298 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
299 | msleep(1); | |
300 | fmd1216_init[2] = 0x86; | |
301 | fmd1216_init[3] = 0x54; | |
302 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
303 | msleep(1); | |
304 | } | |
305 | ||
306 | static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
307 | { | |
308 | struct saa7134_dev *dev = fe->dvb->priv; | |
309 | u8 tuner_buf[4]; | |
310 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len = | |
311 | sizeof(tuner_buf) }; | |
312 | int tuner_frequency = 0; | |
313 | int divider = 0; | |
314 | u8 band, mode, cp; | |
315 | ||
316 | /* determine charge pump */ | |
317 | tuner_frequency = params->frequency + 36130000; | |
318 | if (tuner_frequency < 87000000) | |
319 | return -EINVAL; | |
320 | /* low band */ | |
321 | else if (tuner_frequency < 180000000) { | |
322 | band = 1; | |
323 | mode = 7; | |
324 | cp = 0; | |
325 | } else if (tuner_frequency < 195000000) { | |
326 | band = 1; | |
327 | mode = 6; | |
328 | cp = 1; | |
329 | /* mid band */ | |
330 | } else if (tuner_frequency < 366000000) { | |
331 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
332 | band = 10; | |
333 | } else { | |
334 | band = 2; | |
335 | } | |
336 | mode = 7; | |
337 | cp = 0; | |
338 | } else if (tuner_frequency < 478000000) { | |
339 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
340 | band = 10; | |
341 | } else { | |
342 | band = 2; | |
343 | } | |
344 | mode = 6; | |
345 | cp = 1; | |
346 | /* high band */ | |
347 | } else if (tuner_frequency < 662000000) { | |
348 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
349 | band = 12; | |
350 | } else { | |
351 | band = 4; | |
352 | } | |
353 | mode = 7; | |
354 | cp = 0; | |
355 | } else if (tuner_frequency < 840000000) { | |
356 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
357 | band = 12; | |
358 | } else { | |
359 | band = 4; | |
360 | } | |
361 | mode = 6; | |
362 | cp = 1; | |
363 | } else { | |
364 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
365 | band = 12; | |
366 | } else { | |
367 | band = 4; | |
368 | } | |
369 | mode = 7; | |
370 | cp = 1; | |
371 | ||
372 | } | |
373 | /* calculate divisor */ | |
374 | /* ((36166000 + Finput) / 166666) rounded! */ | |
375 | divider = (tuner_frequency + 83333) / 166667; | |
376 | ||
377 | /* setup tuner buffer */ | |
378 | tuner_buf[0] = (divider >> 8) & 0x7f; | |
379 | tuner_buf[1] = divider & 0xff; | |
380 | tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4; | |
381 | tuner_buf[3] = 0x40 | band; | |
382 | ||
383 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
384 | return -EIO; | |
385 | return 0; | |
386 | } | |
387 | ||
388 | ||
408b664a | 389 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
390 | .demod_address = 0x08, |
391 | .invert = 1, | |
392 | .invert_oclk = 0, | |
393 | .xtal_freq = TDA10046_XTAL_16M, | |
394 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
395 | .if_freq = TDA10046_FREQ_3613, | |
396 | .pll_init = philips_fmd1216_pll_init, | |
397 | .pll_set = philips_fmd1216_pll_set, | |
398 | .pll_sleep = philips_fmd1216_analog, | |
399 | .request_firmware = NULL, | |
400 | }; | |
401 | ||
402 | /* ------------------------------------------------------------------ */ | |
403 | ||
404 | struct tda827x_data { | |
405 | u32 lomax; | |
406 | u8 spd; | |
407 | u8 bs; | |
408 | u8 bp; | |
409 | u8 cp; | |
410 | u8 gc3; | |
411 | u8 div1p5; | |
412 | }; | |
413 | ||
414 | static struct tda827x_data tda827x_dvbt[] = { | |
415 | { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, | |
416 | { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, | |
417 | { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, | |
418 | { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, | |
419 | { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
420 | { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
421 | { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
422 | { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
423 | { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
424 | { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
425 | { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
426 | { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
427 | { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
428 | { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
429 | { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
430 | { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
431 | { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
432 | { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
433 | { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
434 | { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
435 | { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
436 | { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
437 | { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
438 | { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
439 | { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
440 | { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, | |
441 | { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
442 | { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, | |
443 | { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0} | |
444 | }; | |
445 | ||
446 | static int philips_tda827x_pll_init(struct dvb_frontend *fe) | |
447 | { | |
448 | return 0; | |
449 | } | |
450 | ||
451 | static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
452 | { | |
453 | struct saa7134_dev *dev = fe->dvb->priv; | |
454 | u8 tuner_buf[14]; | |
455 | ||
456 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf, | |
457 | .len = sizeof(tuner_buf) }; | |
458 | int i, tuner_freq, if_freq; | |
459 | u32 N; | |
460 | switch (params->u.ofdm.bandwidth) { | |
461 | case BANDWIDTH_6_MHZ: | |
462 | if_freq = 4000000; | |
463 | break; | |
464 | case BANDWIDTH_7_MHZ: | |
465 | if_freq = 4500000; | |
466 | break; | |
467 | default: /* 8 MHz or Auto */ | |
468 | if_freq = 5000000; | |
469 | break; | |
470 | } | |
471 | tuner_freq = params->frequency + if_freq; | |
472 | ||
473 | i = 0; | |
474 | while (tda827x_dvbt[i].lomax < tuner_freq) { | |
475 | if(tda827x_dvbt[i + 1].lomax == 0) | |
476 | break; | |
477 | i++; | |
478 | } | |
479 | ||
480 | N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2); | |
481 | tuner_buf[0] = 0; | |
482 | tuner_buf[1] = (N>>8) | 0x40; | |
483 | tuner_buf[2] = N & 0xff; | |
484 | tuner_buf[3] = 0; | |
485 | tuner_buf[4] = 0x52; | |
486 | tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) + | |
487 | (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp; | |
488 | tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f; | |
489 | tuner_buf[7] = 0xbf; | |
490 | tuner_buf[8] = 0x2a; | |
491 | tuner_buf[9] = 0x05; | |
492 | tuner_buf[10] = 0xff; | |
493 | tuner_buf[11] = 0x00; | |
494 | tuner_buf[12] = 0x00; | |
495 | tuner_buf[13] = 0x40; | |
496 | ||
497 | tuner_msg.len = 14; | |
498 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
499 | return -EIO; | |
500 | ||
501 | msleep(500); | |
502 | /* correct CP value */ | |
503 | tuner_buf[0] = 0x30; | |
504 | tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp; | |
505 | tuner_msg.len = 2; | |
506 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
511 | static void philips_tda827x_pll_sleep(struct dvb_frontend *fe) | |
512 | { | |
513 | struct saa7134_dev *dev = fe->dvb->priv; | |
514 | static u8 tda827x_sleep[] = { 0x30, 0xd0}; | |
515 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep, | |
516 | .len = sizeof(tda827x_sleep) }; | |
517 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
518 | } | |
519 | ||
520 | static struct tda1004x_config tda827x_lifeview_config = { | |
521 | .demod_address = 0x08, | |
522 | .invert = 1, | |
523 | .invert_oclk = 0, | |
524 | .xtal_freq = TDA10046_XTAL_16M, | |
525 | .agc_config = TDA10046_AGC_TDA827X, | |
526 | .if_freq = TDA10046_FREQ_045, | |
527 | .pll_init = philips_tda827x_pll_init, | |
528 | .pll_set = philips_tda827x_pll_set, | |
529 | .pll_sleep = philips_tda827x_pll_sleep, | |
530 | .request_firmware = NULL, | |
1da177e4 | 531 | }; |
86ddd96f | 532 | #endif |
1da177e4 LT |
533 | |
534 | /* ------------------------------------------------------------------ */ | |
535 | ||
536 | static int dvb_init(struct saa7134_dev *dev) | |
537 | { | |
538 | /* init struct videobuf_dvb */ | |
539 | dev->ts.nr_bufs = 32; | |
540 | dev->ts.nr_packets = 32*4; | |
541 | dev->dvb.name = dev->name; | |
542 | videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops, | |
543 | dev->pci, &dev->slock, | |
544 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
545 | V4L2_FIELD_ALTERNATE, | |
546 | sizeof(struct saa7134_buf), | |
547 | dev); | |
548 | ||
549 | switch (dev->board) { | |
86ddd96f | 550 | #if CONFIG_DVB_MT352 |
1da177e4 LT |
551 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: |
552 | printk("%s: pinnacle 300i dvb setup\n",dev->name); | |
553 | dev->dvb.frontend = mt352_attach(&pinnacle_300i, | |
554 | &dev->i2c_adap); | |
555 | break; | |
86ddd96f MCC |
556 | #endif |
557 | #if CONFIG_DVB_TDA1004X | |
1da177e4 LT |
558 | case SAA7134_BOARD_MD7134: |
559 | dev->dvb.frontend = tda10046_attach(&medion_cardbus, | |
560 | &dev->i2c_adap); | |
1da177e4 | 561 | break; |
86ddd96f MCC |
562 | case SAA7134_BOARD_PHILIPS_TOUGH: |
563 | dev->dvb.frontend = tda10046_attach(&philips_tu1216_config, | |
564 | &dev->i2c_adap); | |
565 | break; | |
566 | case SAA7134_BOARD_FLYDVBTDUO: | |
567 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, | |
568 | &dev->i2c_adap); | |
569 | break; | |
570 | case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS: | |
571 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, | |
572 | &dev->i2c_adap); | |
573 | break; | |
574 | #endif | |
1da177e4 LT |
575 | default: |
576 | printk("%s: Huh? unknown DVB card?\n",dev->name); | |
577 | break; | |
578 | } | |
579 | ||
580 | if (NULL == dev->dvb.frontend) { | |
581 | printk("%s: frontend initialization failed\n",dev->name); | |
582 | return -1; | |
583 | } | |
584 | ||
585 | /* register everything else */ | |
586 | return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev); | |
587 | } | |
588 | ||
589 | static int dvb_fini(struct saa7134_dev *dev) | |
590 | { | |
591 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
592 | ||
1da177e4 LT |
593 | switch (dev->board) { |
594 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
595 | /* otherwise we don't detect the tuner on next insmod */ | |
596 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
597 | break; | |
598 | }; | |
599 | videobuf_dvb_unregister(&dev->dvb); | |
600 | return 0; | |
601 | } | |
602 | ||
603 | static struct saa7134_mpeg_ops dvb_ops = { | |
604 | .type = SAA7134_MPEG_DVB, | |
605 | .init = dvb_init, | |
606 | .fini = dvb_fini, | |
607 | }; | |
608 | ||
609 | static int __init dvb_register(void) | |
610 | { | |
611 | return saa7134_ts_register(&dvb_ops); | |
612 | } | |
613 | ||
614 | static void __exit dvb_unregister(void) | |
615 | { | |
616 | saa7134_ts_unregister(&dvb_ops); | |
617 | } | |
618 | ||
619 | module_init(dvb_register); | |
620 | module_exit(dvb_unregister); | |
621 | ||
622 | /* ------------------------------------------------------------------ */ | |
623 | /* | |
624 | * Local variables: | |
625 | * c-basic-offset: 8 | |
626 | * End: | |
627 | */ |