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V4L/DVB (7392): saa7134: support 2nd DVB-S section of the MD8800
[mirror_ubuntu-jammy-kernel.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
5823b3a6 36#include <dvb_frontend.h>
1da177e4 37
1f10c7af
AQ		 38#include "mt352.h"
39#include "mt352_priv.h" /* FIXME */
40#include "tda1004x.h"
41#include "nxt200x.h"
bc36a686 42#include "tuner-xc2028.h"
1da177e4 43
e2ac28fa
IL		 44#include "tda10086.h"
45#include "tda826x.h"
8ce47dad 46#include "tda827x.h"
e2ac28fa 47#include "isl6421.h"
4b1431ca 48#include "isl6405.h"
6ab465a8 49#include "lnbp21.h"
8ce47dad 50
1da177e4
LT		 51MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
52MODULE_LICENSE("GPL");
53
ff699e6b 54static unsigned int antenna_pwr;
86ddd96f 55
1da177e4
LT		 56module_param(antenna_pwr, int, 0444);
57MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
58
ff699e6b 59static int use_frontend;
b331daa0
SB		 60module_param(use_frontend, int, 0644);
61MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 62
ff699e6b 63static int debug;
58ef4f92
HH		 64module_param(debug, int, 0644);
65MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
66
cf3c34c8
TP		 67#define dprintk(fmt, arg...) do { if (debug) \
68 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
69
70/* Print a warning */
71#define wprintk(fmt, arg...) \
72 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH		 73
74/* ------------------------------------------------------------------
75 * mt352 based DVB-T cards
76 */
77
1da177e4
LT		 78static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
79{
80 u32 ok;
81
82 if (!on) {
83 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
84 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
85 return 0;
86 }
87
88 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
89 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
90 udelay(10);
91
92 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
93 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
94 udelay(10);
95 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
96 udelay(10);
97 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 98 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT		 99
100 if (!ok)
101 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
102 return ok;
103}
104
105static int mt352_pinnacle_init(struct dvb_frontend* fe)
106{
107 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
108 static u8 reset [] = { RESET, 0x80 };
109 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
110 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
111 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
112 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
113 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
114 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
115 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
116 struct saa7134_dev *dev= fe->dvb->priv;
117
5823b3a6 118 dprintk("%s called\n", __func__);
1da177e4
LT		 119
120 mt352_write(fe, clock_config, sizeof(clock_config));
121 udelay(200);
122 mt352_write(fe, reset, sizeof(reset));
123 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
124 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
125 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
126 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
127
128 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
129 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
130 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 131
1da177e4
LT		 132 return 0;
133}
134
a78d0bfa
JAR		 135static int mt352_aver777_init(struct dvb_frontend* fe)
136{
137 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
138 static u8 reset [] = { RESET, 0x80 };
139 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
140 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
141 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
142
143 mt352_write(fe, clock_config, sizeof(clock_config));
144 udelay(200);
145 mt352_write(fe, reset, sizeof(reset));
146 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
147 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
148 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
149
150 return 0;
151}
152
0463f12c
AQ		 153static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
154 struct dvb_frontend_parameters* params)
1da177e4 155{
df8cf706
HH		 156 u8 off[] = { 0x00, 0xf1};
157 u8 on[] = { 0x00, 0x71};
158 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
159
1da177e4
LT		 160 struct saa7134_dev *dev = fe->dvb->priv;
161 struct v4l2_frequency f;
162
163 /* set frequency (mt2050) */
164 f.tuner = 0;
165 f.type = V4L2_TUNER_DIGITAL_TV;
166 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB		 167 if (fe->ops.i2c_gate_ctrl)
168 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 169 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 170 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 171 msg.buf = on;
dea74869
PB		 172 if (fe->ops.i2c_gate_ctrl)
173 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 174 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT		 175
176 pinnacle_antenna_pwr(dev, antenna_pwr);
177
178 /* mt352 setup */
0463f12c 179 return mt352_pinnacle_init(fe);
1da177e4
LT		 180}
181
182static struct mt352_config pinnacle_300i = {
183 .demod_address = 0x3c >> 1,
184 .adc_clock = 20333,
185 .if2 = 36150,
186 .no_tuner = 1,
187 .demod_init = mt352_pinnacle_init,
1da177e4 188};
a78d0bfa
JAR		 189
190static struct mt352_config avermedia_777 = {
191 .demod_address = 0xf,
192 .demod_init = mt352_aver777_init,
a78d0bfa 193};
1da177e4 194
bc36a686
MCC		 195static struct mt352_config avermedia_e506r_mt352_dev = {
196 .demod_address = (0x1e >> 1),
197 .no_tuner = 1,
198};
199
58ef4f92
HH		 200/* ==================================================================
201 * tda1004x based DVB-T cards, helper functions
202 */
203
204static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
205 const struct firmware **fw, char *name)
1da177e4
LT		 206{
207 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 208 return request_firmware(fw, name, &dev->pci->dev);
209}
210
58ef4f92
HH		 211/* ------------------------------------------------------------------
212 * these tuners are tu1216, td1316(a)
213 */
214
215static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
216{
217 struct saa7134_dev *dev = fe->dvb->priv;
218 struct tda1004x_state *state = fe->demodulator_priv;
219 u8 addr = state->config->tuner_address;
86ddd96f 220 u8 tuner_buf[4];
2cf36ac4 221 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 222 sizeof(tuner_buf) };
223 int tuner_frequency = 0;
224 u8 band, cp, filter;
225
226 /* determine charge pump */
227 tuner_frequency = params->frequency + 36166000;
228 if (tuner_frequency < 87000000)
229 return -EINVAL;
230 else if (tuner_frequency < 130000000)
231 cp = 3;
232 else if (tuner_frequency < 160000000)
233 cp = 5;
234 else if (tuner_frequency < 200000000)
235 cp = 6;
236 else if (tuner_frequency < 290000000)
237 cp = 3;
238 else if (tuner_frequency < 420000000)
239 cp = 5;
240 else if (tuner_frequency < 480000000)
241 cp = 6;
242 else if (tuner_frequency < 620000000)
243 cp = 3;
244 else if (tuner_frequency < 830000000)
245 cp = 5;
246 else if (tuner_frequency < 895000000)
247 cp = 7;
248 else
249 return -EINVAL;
250
251 /* determine band */
252 if (params->frequency < 49000000)
253 return -EINVAL;
254 else if (params->frequency < 161000000)
255 band = 1;
256 else if (params->frequency < 444000000)
257 band = 2;
258 else if (params->frequency < 861000000)
259 band = 4;
260 else
261 return -EINVAL;
262
263 /* setup PLL filter */
264 switch (params->u.ofdm.bandwidth) {
265 case BANDWIDTH_6_MHZ:
266 filter = 0;
267 break;
268
269 case BANDWIDTH_7_MHZ:
270 filter = 0;
271 break;
272
273 case BANDWIDTH_8_MHZ:
274 filter = 1;
275 break;
1da177e4 276
86ddd96f
MCC		 277 default:
278 return -EINVAL;
279 }
280
281 /* calculate divisor
282 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 283 */
86ddd96f
MCC		 284 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
285
286 /* setup tuner buffer */
287 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
288 tuner_buf[1] = tuner_frequency & 0xff;
289 tuner_buf[2] = 0xca;
290 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
291
dea74869
PB		 292 if (fe->ops.i2c_gate_ctrl)
293 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 294 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP		 295 wprintk("could not write to tuner at addr: 0x%02x\n",
296 addr << 1);
86ddd96f 297 return -EIO;
58ef4f92 298 }
2cf36ac4
HH		 299 msleep(1);
300 return 0;
301}
302
58ef4f92 303static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH		 304{
305 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 306 struct tda1004x_state *state = fe->demodulator_priv;
307 u8 addr = state->config->tuner_address;
2cf36ac4
HH		 308 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
309 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 310
2cf36ac4 311 /* setup PLL configuration */
dea74869
PB		 312 if (fe->ops.i2c_gate_ctrl)
313 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 314 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
315 return -EIO;
86ddd96f 316 msleep(1);
2cf36ac4 317
1da177e4
LT		 318 return 0;
319}
320
2cf36ac4
HH		 321/* ------------------------------------------------------------------ */
322
2cf36ac4 323static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 324 .demod_address = 0x8,
325 .invert = 1,
2cf36ac4 326 .invert_oclk = 0,
86ddd96f
MCC		 327 .xtal_freq = TDA10046_XTAL_4M,
328 .agc_config = TDA10046_AGC_DEFAULT,
329 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 330 .tuner_address = 0x60,
331 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 332};
333
2cf36ac4
HH		 334static struct tda1004x_config philips_tu1216_61_config = {
335
336 .demod_address = 0x8,
337 .invert = 1,
338 .invert_oclk = 0,
339 .xtal_freq = TDA10046_XTAL_4M,
340 .agc_config = TDA10046_AGC_DEFAULT,
341 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 342 .tuner_address = 0x61,
343 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 344};
345
346/* ------------------------------------------------------------------ */
347
cbb94521 348static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH		 349{
350 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 351 struct tda1004x_state *state = fe->demodulator_priv;
352 u8 addr = state->config->tuner_address;
2cf36ac4 353 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 354 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH		 355
356 /* setup PLL configuration */
dea74869
PB		 357 if (fe->ops.i2c_gate_ctrl)
358 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 359 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
360 return -EIO;
2cf36ac4
HH		 361 return 0;
362}
363
a79ddae9 364static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 365{
58ef4f92
HH		 366 return philips_tda6651_pll_set(fe, params);
367}
368
369static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
370{
371 struct saa7134_dev *dev = fe->dvb->priv;
372 struct tda1004x_state *state = fe->demodulator_priv;
373 u8 addr = state->config->tuner_address;
374 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
375 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
376
377 /* switch the tuner to analog mode */
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
380 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
381 return -EIO;
382 return 0;
2cf36ac4
HH		 383}
384
58ef4f92
HH		 385/* ------------------------------------------------------------------ */
386
cbb94521
HH		 387static int philips_europa_tuner_init(struct dvb_frontend *fe)
388{
389 struct saa7134_dev *dev = fe->dvb->priv;
390 static u8 msg[] = { 0x00, 0x40};
391 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
392
393
394 if (philips_td1316_tuner_init(fe))
395 return -EIO;
396 msleep(1);
397 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
398 return -EIO;
399
400 return 0;
401}
402
a79ddae9 403static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH		 404{
405 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 406
58ef4f92
HH		 407 static u8 msg[] = { 0x00, 0x14 };
408 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
409
410 if (philips_td1316_tuner_sleep(fe))
411 return -EIO;
2cf36ac4
HH		 412
413 /* switch the board to analog mode */
dea74869
PB		 414 if (fe->ops.i2c_gate_ctrl)
415 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 416 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ		 417 return 0;
418}
419
420static int philips_europa_demod_sleep(struct dvb_frontend *fe)
421{
422 struct saa7134_dev *dev = fe->dvb->priv;
423
424 if (dev->original_demod_sleep)
425 dev->original_demod_sleep(fe);
dea74869 426 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 427 return 0;
2cf36ac4
HH		 428}
429
430static struct tda1004x_config philips_europa_config = {
431
432 .demod_address = 0x8,
433 .invert = 0,
434 .invert_oclk = 0,
435 .xtal_freq = TDA10046_XTAL_4M,
436 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
437 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH		 438 .tuner_address = 0x61,
439 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 440};
441
442/* ------------------------------------------------------------------ */
86ddd96f 443
408b664a 444static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 445 .demod_address = 0x08,
446 .invert = 1,
447 .invert_oclk = 0,
448 .xtal_freq = TDA10046_XTAL_16M,
449 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
450 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH		 451 .tuner_address = 0x61,
452 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 453};
454
58ef4f92
HH		 455/* ------------------------------------------------------------------
456 * tda 1004x based cards with philips silicon tuner
457 */
458
459static void philips_tda827x_lna_gain(struct dvb_frontend *fe, int high)
460{
461 struct saa7134_dev *dev = fe->dvb->priv;
462 struct tda1004x_state *state = fe->demodulator_priv;
463 u8 addr = state->config->i2c_gate;
464 u8 config = state->config->tuner_config;
465 u8 GP00_CF[] = {0x20, 0x01};
466 u8 GP00_LEV[] = {0x22, 0x00};
467
468 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = GP00_CF, .len = 2};
469 if (config) {
470 if (high) {
471 dprintk("setting LNA to high gain\n");
472 } else {
473 dprintk("setting LNA to low gain\n");
474 }
475 }
476 switch (config) {
477 case 0: /* no LNA */
478 break;
479 case 1: /* switch is GPIO 0 of tda8290 */
480 case 2:
481 /* turn Vsync off */
482 saa7134_set_gpio(dev, 22, 0);
483 GP00_LEV[1] = high ? 0 : 1;
484 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
cf3c34c8
TP		 485 wprintk("could not access tda8290 at addr: 0x%02x\n",
486 addr << 1);
58ef4f92
HH		 487 return;
488 }
489 msg.buf = GP00_LEV;
490 if (config == 2)
491 GP00_LEV[1] = high ? 1 : 0;
492 i2c_transfer(&dev->i2c_adap, &msg, 1);
493 break;
494 case 3: /* switch with GPIO of saa713x */
495 saa7134_set_gpio(dev, 22, high);
496 break;
497 }
498}
499
500static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
501{
58ef4f92
HH		 502 struct tda1004x_state *state = fe->demodulator_priv;
503
504 u8 addr = state->config->i2c_gate;
505 static u8 tda8290_close[] = { 0x21, 0xc0};
506 static u8 tda8290_open[] = { 0x21, 0x80};
507 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
508 if (enable) {
509 tda8290_msg.buf = tda8290_close;
510 } else {
511 tda8290_msg.buf = tda8290_open;
512 }
06be3035 513 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP		 514 struct saa7134_dev *dev = fe->dvb->priv;
515 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH		 516 return -EIO;
517 }
518 msleep(20);
519 return 0;
520}
521
86ddd96f
MCC		 522/* ------------------------------------------------------------------ */
523
58ef4f92 524static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 525{
90e9df7f 526 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 527 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 528
58ef4f92
HH		 529 switch (state->config->antenna_switch) {
530 case 0: break;
531 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
532 saa7134_set_gpio(dev, 21, 0);
533 break;
534 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
535 saa7134_set_gpio(dev, 21, 1);
536 break;
587d2fd7 537 }
587d2fd7
HH		 538 return 0;
539}
540
58ef4f92 541static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 542{
58ef4f92
HH		 543 struct saa7134_dev *dev = fe->dvb->priv;
544 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 545
58ef4f92
HH		 546 switch (state->config->antenna_switch) {
547 case 0: break;
548 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
549 saa7134_set_gpio(dev, 21, 1);
550 break;
551 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
552 saa7134_set_gpio(dev, 21, 0);
553 break;
554 }
587d2fd7 555 return 0;
2d6b5f62 556}
90e9df7f 557
8ce47dad
MK		 558static struct tda827x_config tda827x_cfg = {
559 .lna_gain = philips_tda827x_lna_gain,
560 .init = philips_tda827x_tuner_init,
561 .sleep = philips_tda827x_tuner_sleep
562};
90e9df7f 563
b8bc76d8 564static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config *tda_conf)
90e9df7f 565{
58ef4f92
HH		 566 dev->dvb.frontend = dvb_attach(tda10046_attach, tda_conf, &dev->i2c_adap);
567 if (dev->dvb.frontend) {
568 if (tda_conf->i2c_gate)
569 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
ede2200d
HH		 570 if (dvb_attach(tda827x_attach, dev->dvb.frontend, tda_conf->tuner_address,
571 &dev->i2c_adap,&tda827x_cfg) == NULL) {
cf3c34c8 572 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d
HH		 573 tda_conf->tuner_address);
574 }
58ef4f92 575 }
90e9df7f
HH		 576}
577
58ef4f92 578/* ------------------------------------------------------------------ */
261f5081 579
58ef4f92 580static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH		 581 .demod_address = 0x08,
582 .invert = 1,
583 .invert_oclk = 0,
584 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 585 .agc_config = TDA10046_AGC_TDA827X,
586 .gpio_config = TDA10046_GP11_I,
550a9a5e 587 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 588 .tuner_address = 0x60,
589 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 590};
550a9a5e 591
58ef4f92
HH		 592static struct tda1004x_config philips_tiger_config = {
593 .demod_address = 0x08,
594 .invert = 1,
595 .invert_oclk = 0,
596 .xtal_freq = TDA10046_XTAL_16M,
597 .agc_config = TDA10046_AGC_TDA827X,
598 .gpio_config = TDA10046_GP11_I,
599 .if_freq = TDA10046_FREQ_045,
600 .i2c_gate = 0x4b,
601 .tuner_address = 0x61,
602 .tuner_config = 0,
603 .antenna_switch= 1,
604 .request_firmware = philips_tda1004x_request_firmware
605};
550a9a5e
HH		 606
607static struct tda1004x_config cinergy_ht_config = {
608 .demod_address = 0x08,
609 .invert = 1,
610 .invert_oclk = 0,
611 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 612 .agc_config = TDA10046_AGC_TDA827X,
613 .gpio_config = TDA10046_GP01_I,
90e9df7f 614 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 615 .i2c_gate = 0x4b,
616 .tuner_address = 0x61,
617 .tuner_config = 0,
618 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH		 619};
620
58ef4f92
HH		 621static struct tda1004x_config cinergy_ht_pci_config = {
622 .demod_address = 0x08,
623 .invert = 1,
624 .invert_oclk = 0,
625 .xtal_freq = TDA10046_XTAL_16M,
626 .agc_config = TDA10046_AGC_TDA827X,
627 .gpio_config = TDA10046_GP01_I,
628 .if_freq = TDA10046_FREQ_045,
629 .i2c_gate = 0x4b,
630 .tuner_address = 0x60,
631 .tuner_config = 0,
632 .request_firmware = philips_tda1004x_request_firmware
633};
634
635static struct tda1004x_config philips_tiger_s_config = {
636 .demod_address = 0x08,
637 .invert = 1,
638 .invert_oclk = 0,
639 .xtal_freq = TDA10046_XTAL_16M,
640 .agc_config = TDA10046_AGC_TDA827X,
641 .gpio_config = TDA10046_GP01_I,
642 .if_freq = TDA10046_FREQ_045,
643 .i2c_gate = 0x4b,
644 .tuner_address = 0x61,
645 .tuner_config = 2,
646 .antenna_switch= 1,
647 .request_firmware = philips_tda1004x_request_firmware
648};
df42eaf2 649
587d2fd7
HH		 650static struct tda1004x_config pinnacle_pctv_310i_config = {
651 .demod_address = 0x08,
652 .invert = 1,
653 .invert_oclk = 0,
654 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 655 .agc_config = TDA10046_AGC_TDA827X,
656 .gpio_config = TDA10046_GP11_I,
587d2fd7 657 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 658 .i2c_gate = 0x4b,
659 .tuner_address = 0x61,
660 .tuner_config = 1,
661 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH		 662};
663
c6e53daf
TG		 664static struct tda1004x_config hauppauge_hvr_1110_config = {
665 .demod_address = 0x08,
666 .invert = 1,
667 .invert_oclk = 0,
668 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 669 .agc_config = TDA10046_AGC_TDA827X,
670 .gpio_config = TDA10046_GP11_I,
c6e53daf 671 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 672 .i2c_gate = 0x4b,
673 .tuner_address = 0x61,
bc548370 674 .tuner_config = 1,
58ef4f92 675 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG		 676};
677
83646817
HH		 678static struct tda1004x_config asus_p7131_dual_config = {
679 .demod_address = 0x08,
680 .invert = 1,
681 .invert_oclk = 0,
682 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 683 .agc_config = TDA10046_AGC_TDA827X,
684 .gpio_config = TDA10046_GP11_I,
83646817 685 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 686 .i2c_gate = 0x4b,
687 .tuner_address = 0x61,
688 .tuner_config = 0,
689 .antenna_switch= 2,
690 .request_firmware = philips_tda1004x_request_firmware
83646817
HH		 691};
692
420f32fe
NS		 693static struct tda1004x_config lifeview_trio_config = {
694 .demod_address = 0x09,
695 .invert = 1,
696 .invert_oclk = 0,
697 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 698 .agc_config = TDA10046_AGC_TDA827X,
699 .gpio_config = TDA10046_GP00_I,
420f32fe 700 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 701 .tuner_address = 0x60,
702 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS		 703};
704
58ef4f92 705static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH		 706 .demod_address = 0x08,
707 .invert = 1,
708 .invert_oclk = 0,
709 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 710 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 711 .gpio_config = TDA10046_GP11_I,
df42eaf2 712 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 713 .tuner_address = 0x60,
714 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH		 715};
716
58ef4f92 717static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH		 718 .demod_address = 0x08,
719 .invert = 1,
720 .invert_oclk = 0,
721 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 722 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 723 .gpio_config = TDA10046_GP01_I,
3dfb729f 724 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 725 .i2c_gate = 0x4b,
726 .tuner_address = 0x60,
727 .tuner_config = 0,
728 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH		 729};
730
e06cea4c
HH		 731static struct tda1004x_config asus_p7131_4871_config = {
732 .demod_address = 0x08,
733 .invert = 1,
734 .invert_oclk = 0,
735 .xtal_freq = TDA10046_XTAL_16M,
736 .agc_config = TDA10046_AGC_TDA827X,
737 .gpio_config = TDA10046_GP01_I,
738 .if_freq = TDA10046_FREQ_045,
739 .i2c_gate = 0x4b,
740 .tuner_address = 0x61,
741 .tuner_config = 2,
742 .antenna_switch= 2,
743 .request_firmware = philips_tda1004x_request_firmware
744};
745
f3eec0c0 746static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH		 747 .demod_address = 0x08,
748 .invert = 1,
749 .invert_oclk = 0,
750 .xtal_freq = TDA10046_XTAL_16M,
751 .agc_config = TDA10046_AGC_TDA827X,
752 .gpio_config = TDA10046_GP11_I,
753 .if_freq = TDA10046_FREQ_045,
754 .i2c_gate = 0x4b,
755 .tuner_address = 0x61,
756 .tuner_config = 2,
757 .antenna_switch= 2,
758 .request_firmware = philips_tda1004x_request_firmware
759};
261f5081 760
b39423a9
SF		 761static struct tda1004x_config kworld_dvb_t_210_config = {
762 .demod_address = 0x08,
763 .invert = 1,
764 .invert_oclk = 0,
765 .xtal_freq = TDA10046_XTAL_16M,
766 .agc_config = TDA10046_AGC_TDA827X,
767 .gpio_config = TDA10046_GP11_I,
768 .if_freq = TDA10046_FREQ_045,
769 .i2c_gate = 0x4b,
770 .tuner_address = 0x61,
771 .tuner_config = 2,
772 .antenna_switch= 1,
773 .request_firmware = philips_tda1004x_request_firmware
774};
261f5081 775
d90d9f5a
ES		 776static struct tda1004x_config avermedia_super_007_config = {
777 .demod_address = 0x08,
778 .invert = 1,
779 .invert_oclk = 0,
780 .xtal_freq = TDA10046_XTAL_16M,
781 .agc_config = TDA10046_AGC_TDA827X,
782 .gpio_config = TDA10046_GP01_I,
783 .if_freq = TDA10046_FREQ_045,
784 .i2c_gate = 0x4b,
785 .tuner_address = 0x60,
786 .tuner_config = 0,
787 .antenna_switch= 1,
788 .request_firmware = philips_tda1004x_request_firmware
789};
790
4ba24373
HP		 791static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
792 .demod_address = 0x08,
793 .invert = 1,
794 .invert_oclk = 0,
795 .xtal_freq = TDA10046_XTAL_16M,
796 .agc_config = TDA10046_AGC_TDA827X,
797 .gpio_config = TDA10046_GP01_I,
798 .if_freq = TDA10046_FREQ_045,
799 .i2c_gate = 0x42,
800 .tuner_address = 0x61,
801 .tuner_config = 2,
802 .antenna_switch = 1,
803 .request_firmware = philips_tda1004x_request_firmware
804};
805
58ef4f92
HH		 806/* ------------------------------------------------------------------
807 * special case: this card uses saa713x GPIO22 for the mode switch
808 */
5eda227f 809
58ef4f92 810static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH		 811{
812 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 813 philips_tda827x_tuner_init(fe);
814 /* route TDA8275a AGC input to the channel decoder */
06be3035 815 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH		 816 return 0;
817}
818
58ef4f92 819static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 820{
5eda227f 821 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 822 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 823 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH		 824 philips_tda827x_tuner_sleep(fe);
825 return 0;
5eda227f
HH		 826}
827
8ce47dad
MK		 828static struct tda827x_config ads_duo_cfg = {
829 .lna_gain = philips_tda827x_lna_gain,
830 .init = ads_duo_tuner_init,
831 .sleep = ads_duo_tuner_sleep
832};
833
58ef4f92 834static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH		 835 .demod_address = 0x08,
836 .invert = 1,
837 .invert_oclk = 0,
838 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 839 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 840 .gpio_config = TDA10046_GP00_I,
5eda227f 841 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 842 .tuner_address = 0x61,
843 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH		 844};
845
58ef4f92
HH		 846/* ==================================================================
847 * tda10086 based DVB-S cards, helper functions
848 */
849
e2ac28fa
IL		 850static struct tda10086_config flydvbs = {
851 .demod_address = 0x0e,
852 .invert = 0,
ea75baf4 853 .diseqc_tone = 0,
e2ac28fa
IL		 854};
855
1b1cee35
HH		 856/* ------------------------------------------------------------------
857 * special case: lnb supply is connected to the gated i2c
858 */
859
860static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
861{
862 int res = -EIO;
863 struct saa7134_dev *dev = fe->dvb->priv;
864 if (fe->ops.i2c_gate_ctrl) {
865 fe->ops.i2c_gate_ctrl(fe, 1);
866 if (dev->original_set_voltage)
867 res = dev->original_set_voltage(fe, voltage);
868 fe->ops.i2c_gate_ctrl(fe, 0);
869 }
870 return res;
871};
872
873static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
874{
875 int res = -EIO;
876 struct saa7134_dev *dev = fe->dvb->priv;
877 if (fe->ops.i2c_gate_ctrl) {
878 fe->ops.i2c_gate_ctrl(fe, 1);
879 if (dev->original_set_high_voltage)
880 res = dev->original_set_high_voltage(fe, arg);
881 fe->ops.i2c_gate_ctrl(fe, 0);
882 }
883 return res;
884};
885
5823b3a6
HH		 886static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
887{
888 struct saa7134_dev *dev = fe->dvb->priv;
889 u8 wbuf[2] = { 0x1f, 00 };
890 u8 rbuf;
891 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
892 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
893
894 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
895 return -EIO;
896 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
897 if (voltage == SEC_VOLTAGE_18)
898 wbuf[1] = rbuf | 0x10;
899 else
900 wbuf[1] = rbuf & 0xef;
901 msg[0].len = 2;
902 i2c_transfer(&dev->i2c_adap, msg, 1);
903 return 0;
904}
905
906static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
907{
908 struct saa7134_dev *dev = fe->dvb->priv;
909 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
910 return -EIO;
911}
912
58ef4f92
HH		 913/* ==================================================================
914 * nxt200x based ATSC cards, helper functions
915 */
90e9df7f 916
3b64e8e2
MK		 917static struct nxt200x_config avertvhda180 = {
918 .demod_address = 0x0a,
3b64e8e2 919};
3e1410ad
AB		 920
921static struct nxt200x_config kworldatsc110 = {
922 .demod_address = 0x0a,
3e1410ad 923};
3b64e8e2 924
58ef4f92
HH		 925/* ==================================================================
926 * Core code
927 */
1da177e4
LT		 928
929static int dvb_init(struct saa7134_dev *dev)
930{
1c4f76ab 931 int ret;
bc36a686
MCC		 932 int attach_xc3028 = 0;
933
1da177e4
LT		 934 /* init struct videobuf_dvb */
935 dev->ts.nr_bufs = 32;
936 dev->ts.nr_packets = 32*4;
937 dev->dvb.name = dev->name;
0705135e
GL		 938 videobuf_queue_sg_init(&dev->dvb.dvbq, &saa7134_ts_qops,
939 &dev->pci->dev, &dev->slock,
1da177e4
LT		 940 V4L2_BUF_TYPE_VIDEO_CAPTURE,
941 V4L2_FIELD_ALTERNATE,
942 sizeof(struct saa7134_buf),
943 dev);
944
945 switch (dev->board) {
946 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 947 dprintk("pinnacle 300i dvb setup\n");
2bfe031d 948 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 949 &dev->i2c_adap);
6b3ccab7 950 if (dev->dvb.frontend) {
dea74869 951 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 952 }
1da177e4 953 break;
a78d0bfa 954 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 955 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 956 dprintk("avertv 777 dvb setup\n");
2bfe031d 957 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 958 &dev->i2c_adap);
6b3ccab7 959 if (dev->dvb.frontend) {
8511df9e 960 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 961 NULL, DVB_PLL_PHILIPS_TD1316);
6b3ccab7 962 }
a78d0bfa 963 break;
1da177e4 964 case SAA7134_BOARD_MD7134:
f7b54b10
MK		 965 dev->dvb.frontend = dvb_attach(tda10046_attach,
966 &medion_cardbus,
967 &dev->i2c_adap);
6b3ccab7 968 if (dev->dvb.frontend) {
b7754d74 969 dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address,
47a9991e 970 &dev->i2c_adap, DVB_PLL_FMD1216ME);
6b3ccab7 971 }
1da177e4 972 break;
86ddd96f 973 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK		 974 dev->dvb.frontend = dvb_attach(tda10046_attach,
975 &philips_tu1216_60_config,
976 &dev->i2c_adap);
6b3ccab7 977 if (dev->dvb.frontend) {
58ef4f92
HH		 978 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
979 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 980 }
86ddd96f
MCC		 981 break;
982 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 983 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
b8bc76d8 984 configure_tda827x_fe(dev, &tda827x_lifeview_config);
86ddd96f 985 break;
2cf36ac4 986 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 987 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK		 988 dev->dvb.frontend = dvb_attach(tda10046_attach,
989 &philips_europa_config,
990 &dev->i2c_adap);
6b3ccab7 991 if (dev->dvb.frontend) {
588f9831
HH		 992 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
993 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB		 994 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
995 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
996 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 997 }
2cf36ac4
HH		 998 break;
999 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK		 1000 dev->dvb.frontend = dvb_attach(tda10046_attach,
1001 &philips_tu1216_61_config,
1002 &dev->i2c_adap);
6b3ccab7 1003 if (dev->dvb.frontend) {
58ef4f92
HH		 1004 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1005 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1006 }
2cf36ac4 1007 break;
b39423a9
SF		 1008 case SAA7134_BOARD_KWORLD_DVBT_210:
1009 configure_tda827x_fe(dev, &kworld_dvb_t_210_config);
1010 break;
90e9df7f 1011 case SAA7134_BOARD_PHILIPS_TIGER:
b8bc76d8 1012 configure_tda827x_fe(dev, &philips_tiger_config);
587d2fd7
HH		 1013 break;
1014 case SAA7134_BOARD_PINNACLE_PCTV_310i:
b8bc76d8 1015 configure_tda827x_fe(dev, &pinnacle_pctv_310i_config);
90e9df7f 1016 break;
c6e53daf 1017 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
b8bc76d8 1018 configure_tda827x_fe(dev, &hauppauge_hvr_1110_config);
c6e53daf 1019 break;
d4b0aba4 1020 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
b8bc76d8 1021 configure_tda827x_fe(dev, &asus_p7131_dual_config);
d4b0aba4 1022 break;
3d8466ec 1023 case SAA7134_BOARD_FLYDVBT_LR301:
b8bc76d8 1024 configure_tda827x_fe(dev, &tda827x_lifeview_config);
3d8466ec 1025 break;
420f32fe 1026 case SAA7134_BOARD_FLYDVB_TRIO:
ea75baf4 1027 if(! use_frontend) { /* terrestrial */
b8bc76d8 1028 configure_tda827x_fe(dev, &lifeview_trio_config);
ea75baf4 1029 } else { /* satellite */
1f683cd8
NS		 1030 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1031 if (dev->dvb.frontend) {
1032 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63,
1033 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1034 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
1f683cd8
NS		 1035 }
1036 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap,
1037 0x08, 0, 0) == NULL) {
5823b3a6 1038 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
1f683cd8
NS		 1039 }
1040 }
6b3ccab7 1041 }
420f32fe 1042 break;
df42eaf2 1043 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1044 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK		 1045 dev->dvb.frontend = dvb_attach(tda10046_attach,
1046 &ads_tech_duo_config,
1047 &dev->i2c_adap);
6b3ccab7 1048 if (dev->dvb.frontend) {
ede2200d 1049 if (dvb_attach(tda827x_attach,dev->dvb.frontend,
8ce47dad 1050 ads_tech_duo_config.tuner_address,
ede2200d 1051 &dev->i2c_adap,&ads_duo_cfg) == NULL) {
cf3c34c8 1052 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d
HH		 1053 ads_tech_duo_config.tuner_address);
1054 }
6b3ccab7 1055 }
df42eaf2 1056 break;
3dfb729f 1057 case SAA7134_BOARD_TEVION_DVBT_220RF:
b8bc76d8 1058 configure_tda827x_fe(dev, &tevion_dvbt220rf_config);
d95b8942 1059 break;
5eda227f 1060 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca
HH		 1061 if (!use_frontend) { /* terrestrial */
1062 configure_tda827x_fe(dev, &md8800_dvbt_config);
1063 } else { /* satellite */
1064 dev->dvb.frontend = dvb_attach(tda10086_attach,
1065 &flydvbs, &dev->i2c_adap);
1066 if (dev->dvb.frontend) {
5823b3a6
HH		 1067 struct dvb_frontend *fe = dev->dvb.frontend;
1068 u8 dev_id = dev->eedata[2];
1069 u8 data = 0xc4;
1070 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1071
4b1431ca
HH		 1072 if (dvb_attach(tda826x_attach, dev->dvb.frontend,
1073 0x60, &dev->i2c_adap, 0) == NULL)
1074 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6
HH		 1075 "found !\n", __func__);
1076 if (dev_id != 0x08) {
1077 /* we need to open the i2c gate (we know it exists) */
1078 fe->ops.i2c_gate_ctrl(fe, 1);
1079 if (dvb_attach(isl6405_attach, fe,
1080 &dev->i2c_adap, 0x08, 0, 0) == NULL)
1081 wprintk("%s: Medion Quadro, no ISL6405 "
1082 "found !\n", __func__);
1083 /* fire up the 2nd section of the LNB supply since we can't do
1084 this from the other section */
1085 msg.buf = &data;
1086 i2c_transfer(&dev->i2c_adap, &msg, 1);
1087 fe->ops.i2c_gate_ctrl(fe, 0);
1088 dev->original_set_voltage = fe->ops.set_voltage;
1089 fe->ops.set_voltage = md8800_set_voltage;
1090 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1091 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1092 } else {
1093 fe->ops.set_voltage = md8800_set_voltage2;
1094 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1095 }
4b1431ca
HH		 1096 }
1097 }
5eda227f 1098 break;
3b64e8e2 1099 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK		 1100 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
1101 &dev->i2c_adap);
a79ddae9 1102 if (dev->dvb.frontend) {
4ad8eee5 1103 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 1104 NULL, DVB_PLL_TDHU2);
a79ddae9 1105 }
3b64e8e2 1106 break;
3e1410ad 1107 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK		 1108 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
1109 &dev->i2c_adap);
a79ddae9 1110 if (dev->dvb.frontend) {
4ad8eee5 1111 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 1112 NULL, DVB_PLL_TUV1236D);
a79ddae9 1113 }
3e1410ad 1114 break;
e2ac28fa 1115 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK		 1116 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1117 &dev->i2c_adap);
e2ac28fa 1118 if (dev->dvb.frontend) {
f7b54b10
MK		 1119 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1120 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1121 wprintk("%s: No tda826x found!\n", __func__);
e2ac28fa 1122 }
f7b54b10
MK		 1123 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1124 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1125 wprintk("%s: No ISL6421 found!\n", __func__);
e2ac28fa
IL		 1126 }
1127 }
1128 break;
cf146ca4 1129 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
0e8f4cc5
MS		 1130 dev->dvb.frontend = dvb_attach(tda10046_attach,
1131 &medion_cardbus,
1132 &dev->i2c_adap);
cf146ca4
HH		 1133 if (dev->dvb.frontend) {
1134 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1135 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74
TP		 1136
1137 dvb_attach(dvb_pll_attach, dev->dvb.frontend, medion_cardbus.tuner_address,
47a9991e 1138 &dev->i2c_adap, DVB_PLL_FMD1216ME);
cf146ca4
HH		 1139 }
1140 break;
cbb94521
HH		 1141 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
1142 dev->dvb.frontend = dvb_attach(tda10046_attach,
1143 &philips_europa_config,
1144 &dev->i2c_adap);
1145 if (dev->dvb.frontend) {
1146 dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1147 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1148 }
1149 break;
550a9a5e 1150 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
b8bc76d8 1151 configure_tda827x_fe(dev, &cinergy_ht_config);
9de271e6
MK		 1152 break;
1153 case SAA7134_BOARD_CINERGY_HT_PCI:
b8bc76d8 1154 configure_tda827x_fe(dev, &cinergy_ht_pci_config);
58ef4f92
HH		 1155 break;
1156 case SAA7134_BOARD_PHILIPS_TIGER_S:
b8bc76d8 1157 configure_tda827x_fe(dev, &philips_tiger_s_config);
550a9a5e 1158 break;
e06cea4c
HH		 1159 case SAA7134_BOARD_ASUS_P7131_4871:
1160 configure_tda827x_fe(dev, &asus_p7131_4871_config);
1161 break;
f3eec0c0
HH		 1162 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
1163 configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config);
e06cea4c 1164 break;
d90d9f5a
ES		 1165 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
1166 configure_tda827x_fe(dev, &avermedia_super_007_config);
1167 break;
4ba24373
HP		 1168 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
1169 configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config);
1170 break;
6ab465a8
HH		 1171 case SAA7134_BOARD_PHILIPS_SNAKE:
1172 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1173 &dev->i2c_adap);
1174 if (dev->dvb.frontend) {
1175 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1176 &dev->i2c_adap, 0) == NULL)
5823b3a6 1177 wprintk("%s: No tda826x found!\n", __func__);
6ab465a8
HH		 1178 if (dvb_attach(lnbp21_attach, dev->dvb.frontend,
1179 &dev->i2c_adap, 0, 0) == NULL)
5823b3a6 1180 wprintk("%s: No lnbp21 found!\n", __func__);
6ab465a8
HH		 1181 }
1182 break;
7b5b3f17
HP		 1183 case SAA7134_BOARD_CREATIX_CTX953:
1184 configure_tda827x_fe(dev, &md8800_dvbt_config);
1185 break;
6a6179b6
RK		 1186 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
1187 configure_tda827x_fe(dev, &philips_tiger_s_config);
1188 break;
bc36a686
MCC		 1189 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
1190 dev->dvb.frontend = dvb_attach(mt352_attach,
1191 &avermedia_e506r_mt352_dev,
1192 &dev->i2c_adap);
1193 attach_xc3028 = 1;
1194 break;
637afdb5
HH		 1195 case SAA7134_BOARD_MD7134_BRIDGE_2:
1196 dev->dvb.frontend = dvb_attach(tda10086_attach,
1197 &flydvbs, &dev->i2c_adap);
1198 if (dev->dvb.frontend) {
1199 struct dvb_frontend *fe;
1200 if (dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
1201 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL)
1202 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1203 "found !\n", __func__);
637afdb5
HH		 1204 /* we need to open the i2c gate (we know it exists) */
1205 fe = dev->dvb.frontend;
1206 fe->ops.i2c_gate_ctrl(fe, 1);
1207 if (dvb_attach(isl6405_attach, fe,
1208 &dev->i2c_adap, 0x08, 0, 0) == NULL)
1209 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1210 "found !\n", __func__);
637afdb5
HH		 1211 fe->ops.i2c_gate_ctrl(fe, 0);
1212 dev->original_set_voltage = fe->ops.set_voltage;
1213 fe->ops.set_voltage = md8800_set_voltage;
1214 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1215 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1216 }
1217 break;
1da177e4 1218 default:
cf3c34c8 1219 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT		 1220 break;
1221 }
1222
bc36a686
MCC		 1223 if (attach_xc3028) {
1224 struct dvb_frontend *fe;
1225 struct xc2028_config cfg = {
1226 .i2c_adap = &dev->i2c_adap,
1227 .i2c_addr = 0x61,
50407f99 1228 .video_dev = dev->i2c_adap.algo_data,
bc36a686
MCC		 1229 };
1230 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
1231 if (!fe) {
1232 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1233 dev->name);
1234 dvb_frontend_detach(dev->dvb.frontend);
1235 dvb_unregister_frontend(dev->dvb.frontend);
1236 dev->dvb.frontend = NULL;
1237 return -1;
1238 }
1239 }
1240
1da177e4 1241 if (NULL == dev->dvb.frontend) {
cf3c34c8 1242 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
1da177e4
LT		 1243 return -1;
1244 }
1245
1246 /* register everything else */
1c4f76ab
HH		 1247 ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
1248
1249 /* this sequence is necessary to make the tda1004x load its firmware
1250 * and to enter analog mode of hybrid boards
1251 */
1252 if (!ret) {
1253 if (dev->dvb.frontend->ops.init)
1254 dev->dvb.frontend->ops.init(dev->dvb.frontend);
1255 if (dev->dvb.frontend->ops.sleep)
1256 dev->dvb.frontend->ops.sleep(dev->dvb.frontend);
9971f4f1
HH		 1257 if (dev->dvb.frontend->ops.tuner_ops.sleep)
1258 dev->dvb.frontend->ops.tuner_ops.sleep(dev->dvb.frontend);
1c4f76ab
HH		 1259 }
1260 return ret;
1da177e4
LT		 1261}
1262
1263static int dvb_fini(struct saa7134_dev *dev)
1264{
7f171123
MCC		 1265 /* FIXME: I suspect that this code is bogus, since the entry for
1266 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1267 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1268 */
1269 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1270 struct v4l2_priv_tun_config tda9887_cfg;
1271 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1272
1273 tda9887_cfg.tuner = TUNER_TDA9887;
1274 tda9887_cfg.priv = &on;
1da177e4 1275
1da177e4 1276 /* otherwise we don't detect the tuner on next insmod */
7f171123 1277 saa7134_i2c_call_clients(dev, TUNER_SET_CONFIG, &tda9887_cfg);
5823b3a6
HH		 1278 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
1279 if ((dev->eedata[2] != 0x08) && use_frontend) {
1280 /* turn off the 2nd lnb supply */
1281 u8 data = 0x80;
1282 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1283 struct dvb_frontend *fe;
1284 fe = dev->dvb.frontend;
1285 if (fe->ops.i2c_gate_ctrl) {
1286 fe->ops.i2c_gate_ctrl(fe, 1);
1287 i2c_transfer(&dev->i2c_adap, &msg, 1);
1288 fe->ops.i2c_gate_ctrl(fe, 0);
1289 }
1290 }
7f171123 1291 }
1da177e4
LT		 1292 videobuf_dvb_unregister(&dev->dvb);
1293 return 0;
1294}
1295
1296static struct saa7134_mpeg_ops dvb_ops = {
1297 .type = SAA7134_MPEG_DVB,
1298 .init = dvb_init,
1299 .fini = dvb_fini,
1300};
1301
1302static int __init dvb_register(void)
1303{
1304 return saa7134_ts_register(&dvb_ops);
1305}
1306
1307static void __exit dvb_unregister(void)
1308{
1309 saa7134_ts_unregister(&dvb_ops);
1310}
1311
1312module_init(dvb_register);
1313module_exit(dvb_unregister);
1314
1315/* ------------------------------------------------------------------ */
1316/*
1317 * Local variables:
1318 * c-basic-offset: 8
1319 * End:
1320 */
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