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V4L/DVB (5314): Added support for tda827x tuners with preamlifiers
[mirror_ubuntu-zesty-kernel.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
1da177e4 36
1f10c7af
AQ		 37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
1da177e4 41
e2ac28fa
IL		 42#include "tda10086.h"
43#include "tda826x.h"
44#include "isl6421.h"
1da177e4
LT		 45MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
46MODULE_LICENSE("GPL");
47
48static unsigned int antenna_pwr = 0;
86ddd96f 49
1da177e4
LT		 50module_param(antenna_pwr, int, 0444);
51MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
52
b331daa0
SB		 53static int use_frontend = 0;
54module_param(use_frontend, int, 0644);
55MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 56
58ef4f92
HH		 57static int debug = 0;
58module_param(debug, int, 0644);
59MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
60
61#define dprintk(fmt, arg...) if (debug) \
62 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg)
63
64/* ------------------------------------------------------------------
65 * mt352 based DVB-T cards
66 */
67
1da177e4
LT		 68static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
69{
70 u32 ok;
71
72 if (!on) {
73 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
74 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
75 return 0;
76 }
77
78 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
79 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
80 udelay(10);
81
82 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
83 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
84 udelay(10);
85 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
86 udelay(10);
87 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
88 printk("%s: %s %s\n", dev->name, __FUNCTION__,
89 ok ? "on" : "off");
90
91 if (!ok)
92 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
93 return ok;
94}
95
96static int mt352_pinnacle_init(struct dvb_frontend* fe)
97{
98 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
99 static u8 reset [] = { RESET, 0x80 };
100 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
101 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
102 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
103 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
104 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
105 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
106 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
107 struct saa7134_dev *dev= fe->dvb->priv;
108
109 printk("%s: %s called\n",dev->name,__FUNCTION__);
110
111 mt352_write(fe, clock_config, sizeof(clock_config));
112 udelay(200);
113 mt352_write(fe, reset, sizeof(reset));
114 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
115 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
116 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
117 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
118
119 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
120 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
121 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 122
1da177e4
LT		 123 return 0;
124}
125
a78d0bfa
JAR		 126static int mt352_aver777_init(struct dvb_frontend* fe)
127{
128 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
129 static u8 reset [] = { RESET, 0x80 };
130 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
131 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
132 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
133
134 mt352_write(fe, clock_config, sizeof(clock_config));
135 udelay(200);
136 mt352_write(fe, reset, sizeof(reset));
137 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
138 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
139 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
140
141 return 0;
142}
143
0463f12c
AQ		 144static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
145 struct dvb_frontend_parameters* params)
1da177e4 146{
df8cf706
HH		 147 u8 off[] = { 0x00, 0xf1};
148 u8 on[] = { 0x00, 0x71};
149 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
150
1da177e4
LT		 151 struct saa7134_dev *dev = fe->dvb->priv;
152 struct v4l2_frequency f;
153
154 /* set frequency (mt2050) */
155 f.tuner = 0;
156 f.type = V4L2_TUNER_DIGITAL_TV;
157 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB		 158 if (fe->ops.i2c_gate_ctrl)
159 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 160 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 161 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 162 msg.buf = on;
dea74869
PB		 163 if (fe->ops.i2c_gate_ctrl)
164 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 165 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT		 166
167 pinnacle_antenna_pwr(dev, antenna_pwr);
168
169 /* mt352 setup */
0463f12c 170 return mt352_pinnacle_init(fe);
1da177e4
LT		 171}
172
bd4956b8 173static int mt352_aver777_tuner_calc_regs(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf, int buf_len)
a78d0bfa 174{
a79ddae9
AQ		 175 if (buf_len < 5)
176 return -EINVAL;
177
178 pllbuf[0] = 0x61;
a78d0bfa
JAR		 179 dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1,
180 params->frequency,
181 params->u.ofdm.bandwidth);
a79ddae9 182 return 5;
a78d0bfa
JAR		 183}
184
1da177e4
LT		 185static struct mt352_config pinnacle_300i = {
186 .demod_address = 0x3c >> 1,
187 .adc_clock = 20333,
188 .if2 = 36150,
189 .no_tuner = 1,
190 .demod_init = mt352_pinnacle_init,
1da177e4 191};
a78d0bfa
JAR		 192
193static struct mt352_config avermedia_777 = {
194 .demod_address = 0xf,
195 .demod_init = mt352_aver777_init,
a78d0bfa 196};
1da177e4 197
58ef4f92
HH		 198/* ==================================================================
199 * tda1004x based DVB-T cards, helper functions
200 */
201
202static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
203 const struct firmware **fw, char *name)
1da177e4
LT		 204{
205 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 206 return request_firmware(fw, name, &dev->pci->dev);
207}
208
209static void philips_tda1004x_set_board_name(struct dvb_frontend *fe, char *name)
210{
211 size_t len;
212
213 len = sizeof(fe->ops.info.name);
214 strncpy(fe->ops.info.name, name, len);
215 fe->ops.info.name[len - 1] = 0;
216}
217
218/* ------------------------------------------------------------------
219 * these tuners are tu1216, td1316(a)
220 */
221
222static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
223{
224 struct saa7134_dev *dev = fe->dvb->priv;
225 struct tda1004x_state *state = fe->demodulator_priv;
226 u8 addr = state->config->tuner_address;
86ddd96f 227 u8 tuner_buf[4];
2cf36ac4 228 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 229 sizeof(tuner_buf) };
230 int tuner_frequency = 0;
231 u8 band, cp, filter;
232
233 /* determine charge pump */
234 tuner_frequency = params->frequency + 36166000;
235 if (tuner_frequency < 87000000)
236 return -EINVAL;
237 else if (tuner_frequency < 130000000)
238 cp = 3;
239 else if (tuner_frequency < 160000000)
240 cp = 5;
241 else if (tuner_frequency < 200000000)
242 cp = 6;
243 else if (tuner_frequency < 290000000)
244 cp = 3;
245 else if (tuner_frequency < 420000000)
246 cp = 5;
247 else if (tuner_frequency < 480000000)
248 cp = 6;
249 else if (tuner_frequency < 620000000)
250 cp = 3;
251 else if (tuner_frequency < 830000000)
252 cp = 5;
253 else if (tuner_frequency < 895000000)
254 cp = 7;
255 else
256 return -EINVAL;
257
258 /* determine band */
259 if (params->frequency < 49000000)
260 return -EINVAL;
261 else if (params->frequency < 161000000)
262 band = 1;
263 else if (params->frequency < 444000000)
264 band = 2;
265 else if (params->frequency < 861000000)
266 band = 4;
267 else
268 return -EINVAL;
269
270 /* setup PLL filter */
271 switch (params->u.ofdm.bandwidth) {
272 case BANDWIDTH_6_MHZ:
273 filter = 0;
274 break;
275
276 case BANDWIDTH_7_MHZ:
277 filter = 0;
278 break;
279
280 case BANDWIDTH_8_MHZ:
281 filter = 1;
282 break;
1da177e4 283
86ddd96f
MCC		 284 default:
285 return -EINVAL;
286 }
287
288 /* calculate divisor
289 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 290 */
86ddd96f
MCC		 291 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
292
293 /* setup tuner buffer */
294 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
295 tuner_buf[1] = tuner_frequency & 0xff;
296 tuner_buf[2] = 0xca;
297 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
298
dea74869
PB		 299 if (fe->ops.i2c_gate_ctrl)
300 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92
HH		 301 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
302 printk("%s/dvb: could not write to tuner at addr: 0x%02x\n",dev->name, addr << 1);
86ddd96f 303 return -EIO;
58ef4f92 304 }
2cf36ac4
HH		 305 msleep(1);
306 return 0;
307}
308
58ef4f92 309static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH		 310{
311 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 312 struct tda1004x_state *state = fe->demodulator_priv;
313 u8 addr = state->config->tuner_address;
2cf36ac4
HH		 314 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
315 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 316
2cf36ac4 317 /* setup PLL configuration */
dea74869
PB		 318 if (fe->ops.i2c_gate_ctrl)
319 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 320 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
321 return -EIO;
86ddd96f 322 msleep(1);
2cf36ac4 323
1da177e4
LT		 324 return 0;
325}
326
2cf36ac4
HH		 327/* ------------------------------------------------------------------ */
328
2cf36ac4 329static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 330 .demod_address = 0x8,
331 .invert = 1,
2cf36ac4 332 .invert_oclk = 0,
86ddd96f
MCC		 333 .xtal_freq = TDA10046_XTAL_4M,
334 .agc_config = TDA10046_AGC_DEFAULT,
335 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 336 .tuner_address = 0x60,
337 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 338};
339
2cf36ac4
HH		 340static struct tda1004x_config philips_tu1216_61_config = {
341
342 .demod_address = 0x8,
343 .invert = 1,
344 .invert_oclk = 0,
345 .xtal_freq = TDA10046_XTAL_4M,
346 .agc_config = TDA10046_AGC_DEFAULT,
347 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 348 .tuner_address = 0x61,
349 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 350};
351
352/* ------------------------------------------------------------------ */
353
cbb94521 354static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH		 355{
356 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 357 struct tda1004x_state *state = fe->demodulator_priv;
358 u8 addr = state->config->tuner_address;
2cf36ac4 359 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 360 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH		 361
362 /* setup PLL configuration */
dea74869
PB		 363 if (fe->ops.i2c_gate_ctrl)
364 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 365 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
366 return -EIO;
2cf36ac4
HH		 367 return 0;
368}
369
a79ddae9 370static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 371{
58ef4f92
HH		 372 return philips_tda6651_pll_set(fe, params);
373}
374
375static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
376{
377 struct saa7134_dev *dev = fe->dvb->priv;
378 struct tda1004x_state *state = fe->demodulator_priv;
379 u8 addr = state->config->tuner_address;
380 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
381 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
382
383 /* switch the tuner to analog mode */
384 if (fe->ops.i2c_gate_ctrl)
385 fe->ops.i2c_gate_ctrl(fe, 1);
386 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
387 return -EIO;
388 return 0;
2cf36ac4
HH		 389}
390
58ef4f92
HH		 391/* ------------------------------------------------------------------ */
392
cbb94521
HH		 393static int philips_europa_tuner_init(struct dvb_frontend *fe)
394{
395 struct saa7134_dev *dev = fe->dvb->priv;
396 static u8 msg[] = { 0x00, 0x40};
397 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
398
399
400 if (philips_td1316_tuner_init(fe))
401 return -EIO;
402 msleep(1);
403 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
404 return -EIO;
405
406 return 0;
407}
408
a79ddae9 409static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH		 410{
411 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 412
58ef4f92
HH		 413 static u8 msg[] = { 0x00, 0x14 };
414 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
415
416 if (philips_td1316_tuner_sleep(fe))
417 return -EIO;
2cf36ac4
HH		 418
419 /* switch the board to analog mode */
dea74869
PB		 420 if (fe->ops.i2c_gate_ctrl)
421 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 422 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ		 423 return 0;
424}
425
426static int philips_europa_demod_sleep(struct dvb_frontend *fe)
427{
428 struct saa7134_dev *dev = fe->dvb->priv;
429
430 if (dev->original_demod_sleep)
431 dev->original_demod_sleep(fe);
dea74869 432 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 433 return 0;
2cf36ac4
HH		 434}
435
436static struct tda1004x_config philips_europa_config = {
437
438 .demod_address = 0x8,
439 .invert = 0,
440 .invert_oclk = 0,
441 .xtal_freq = TDA10046_XTAL_4M,
442 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
443 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH		 444 .tuner_address = 0x61,
445 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 446};
447
448/* ------------------------------------------------------------------ */
86ddd96f 449
a79ddae9 450static int philips_fmd1216_tuner_init(struct dvb_frontend *fe)
86ddd96f
MCC		 451{
452 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 453 struct tda1004x_state *state = fe->demodulator_priv;
454 u8 addr = state->config->tuner_address;
86ddd96f
MCC		 455 /* this message is to set up ATC and ALC */
456 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
58ef4f92 457 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
86ddd96f 458
dea74869
PB		 459 if (fe->ops.i2c_gate_ctrl)
460 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 461 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
462 return -EIO;
463 msleep(1);
464
465 return 0;
466}
467
a79ddae9 468static int philips_fmd1216_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC		 469{
470 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 471 struct tda1004x_state *state = fe->demodulator_priv;
472 u8 addr = state->config->tuner_address;
86ddd96f
MCC		 473 /* this message actually turns the tuner back to analog mode */
474 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
58ef4f92 475 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
86ddd96f 476
dea74869
PB		 477 if (fe->ops.i2c_gate_ctrl)
478 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 479 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
480 msleep(1);
481 fmd1216_init[2] = 0x86;
482 fmd1216_init[3] = 0x54;
dea74869
PB		 483 if (fe->ops.i2c_gate_ctrl)
484 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 485 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
486 msleep(1);
a79ddae9 487 return 0;
86ddd96f
MCC		 488}
489
a79ddae9 490static int philips_fmd1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC		 491{
492 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 493 struct tda1004x_state *state = fe->demodulator_priv;
494 u8 addr = state->config->tuner_address;
86ddd96f 495 u8 tuner_buf[4];
58ef4f92 496 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 497 sizeof(tuner_buf) };
498 int tuner_frequency = 0;
499 int divider = 0;
500 u8 band, mode, cp;
501
502 /* determine charge pump */
503 tuner_frequency = params->frequency + 36130000;
504 if (tuner_frequency < 87000000)
505 return -EINVAL;
506 /* low band */
507 else if (tuner_frequency < 180000000) {
508 band = 1;
509 mode = 7;
510 cp = 0;
511 } else if (tuner_frequency < 195000000) {
512 band = 1;
513 mode = 6;
514 cp = 1;
515 /* mid band */
516 } else if (tuner_frequency < 366000000) {
517 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
518 band = 10;
519 } else {
520 band = 2;
521 }
522 mode = 7;
523 cp = 0;
524 } else if (tuner_frequency < 478000000) {
525 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
526 band = 10;
527 } else {
528 band = 2;
529 }
530 mode = 6;
531 cp = 1;
532 /* high band */
533 } else if (tuner_frequency < 662000000) {
534 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
535 band = 12;
536 } else {
537 band = 4;
538 }
539 mode = 7;
540 cp = 0;
541 } else if (tuner_frequency < 840000000) {
542 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
543 band = 12;
544 } else {
545 band = 4;
546 }
547 mode = 6;
548 cp = 1;
549 } else {
550 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
551 band = 12;
552 } else {
553 band = 4;
554 }
555 mode = 7;
556 cp = 1;
557
558 }
559 /* calculate divisor */
560 /* ((36166000 + Finput) / 166666) rounded! */
561 divider = (tuner_frequency + 83333) / 166667;
562
563 /* setup tuner buffer */
564 tuner_buf[0] = (divider >> 8) & 0x7f;
565 tuner_buf[1] = divider & 0xff;
566 tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
567 tuner_buf[3] = 0x40 | band;
568
dea74869
PB		 569 if (fe->ops.i2c_gate_ctrl)
570 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92
HH		 571 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
572 printk("%s/dvb: could not write to tuner at addr: 0x%02x\n",dev->name, addr << 1);
86ddd96f 573 return -EIO;
58ef4f92 574 }
86ddd96f
MCC		 575 return 0;
576}
577
408b664a 578static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 579 .demod_address = 0x08,
580 .invert = 1,
581 .invert_oclk = 0,
582 .xtal_freq = TDA10046_XTAL_16M,
583 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
584 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH		 585 .tuner_address = 0x61,
586 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 587};
588
58ef4f92
HH		 589/* ------------------------------------------------------------------
590 * tda 1004x based cards with philips silicon tuner
591 */
592
593static void philips_tda827x_lna_gain(struct dvb_frontend *fe, int high)
594{
595 struct saa7134_dev *dev = fe->dvb->priv;
596 struct tda1004x_state *state = fe->demodulator_priv;
597 u8 addr = state->config->i2c_gate;
598 u8 config = state->config->tuner_config;
599 u8 GP00_CF[] = {0x20, 0x01};
600 u8 GP00_LEV[] = {0x22, 0x00};
601
602 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = GP00_CF, .len = 2};
603 if (config) {
604 if (high) {
605 dprintk("setting LNA to high gain\n");
606 } else {
607 dprintk("setting LNA to low gain\n");
608 }
609 }
610 switch (config) {
611 case 0: /* no LNA */
612 break;
613 case 1: /* switch is GPIO 0 of tda8290 */
614 case 2:
615 /* turn Vsync off */
616 saa7134_set_gpio(dev, 22, 0);
617 GP00_LEV[1] = high ? 0 : 1;
618 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
619 printk("%s/dvb: could not access tda8290 at addr: 0x%02x\n",dev->name, addr << 1);
620 return;
621 }
622 msg.buf = GP00_LEV;
623 if (config == 2)
624 GP00_LEV[1] = high ? 1 : 0;
625 i2c_transfer(&dev->i2c_adap, &msg, 1);
626 break;
627 case 3: /* switch with GPIO of saa713x */
628 saa7134_set_gpio(dev, 22, high);
629 break;
630 }
631}
632
633static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
634{
635 struct saa7134_dev *dev = fe->dvb->priv;
636 struct tda1004x_state *state = fe->demodulator_priv;
637
638 u8 addr = state->config->i2c_gate;
639 static u8 tda8290_close[] = { 0x21, 0xc0};
640 static u8 tda8290_open[] = { 0x21, 0x80};
641 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
642 if (enable) {
643 tda8290_msg.buf = tda8290_close;
644 } else {
645 tda8290_msg.buf = tda8290_open;
646 }
647 if (i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1) != 1) {
648 printk("%s/dvb: could not access tda8290 I2C gate\n",dev->name);
649 return -EIO;
650 }
651 msleep(20);
652 return 0;
653}
654
86ddd96f
MCC		 655/* ------------------------------------------------------------------ */
656
657struct tda827x_data {
658 u32 lomax;
659 u8 spd;
660 u8 bs;
661 u8 bp;
662 u8 cp;
663 u8 gc3;
664 u8 div1p5;
665};
666
667static struct tda827x_data tda827x_dvbt[] = {
668 { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
669 { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
670 { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
671 { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
672 { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
673 { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
674 { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
675 { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
676 { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
677 { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
678 { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
679 { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
680 { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
681 { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
682 { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
683 { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
684 { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
685 { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
686 { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
687 { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
688 { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
689 { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
690 { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
691 { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
692 { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
693 { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
694 { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
695 { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
696 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
697};
698
58ef4f92 699static int philips_tda827xo_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC		 700{
701 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 702 struct tda1004x_state *state = fe->demodulator_priv;
703 u8 addr = state->config->tuner_address;
86ddd96f
MCC		 704 u8 tuner_buf[14];
705
58ef4f92 706 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,
f2421ca3 707 .len = sizeof(tuner_buf) };
86ddd96f
MCC		 708 int i, tuner_freq, if_freq;
709 u32 N;
710 switch (params->u.ofdm.bandwidth) {
711 case BANDWIDTH_6_MHZ:
712 if_freq = 4000000;
713 break;
714 case BANDWIDTH_7_MHZ:
715 if_freq = 4500000;
716 break;
717 default: /* 8 MHz or Auto */
718 if_freq = 5000000;
719 break;
720 }
721 tuner_freq = params->frequency + if_freq;
722
723 i = 0;
724 while (tda827x_dvbt[i].lomax < tuner_freq) {
725 if(tda827x_dvbt[i + 1].lomax == 0)
726 break;
727 i++;
728 }
729
730 N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
731 tuner_buf[0] = 0;
732 tuner_buf[1] = (N>>8) | 0x40;
733 tuner_buf[2] = N & 0xff;
734 tuner_buf[3] = 0;
735 tuner_buf[4] = 0x52;
736 tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
737 (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
738 tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
739 tuner_buf[7] = 0xbf;
740 tuner_buf[8] = 0x2a;
741 tuner_buf[9] = 0x05;
742 tuner_buf[10] = 0xff;
743 tuner_buf[11] = 0x00;
744 tuner_buf[12] = 0x00;
745 tuner_buf[13] = 0x40;
746
747 tuner_msg.len = 14;
dea74869
PB		 748 if (fe->ops.i2c_gate_ctrl)
749 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92
HH		 750 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
751 printk("%s/dvb: could not write to tuner at addr: 0x%02x\n",dev->name, addr << 1);
86ddd96f 752 return -EIO;
58ef4f92 753 }
86ddd96f
MCC		 754 msleep(500);
755 /* correct CP value */
756 tuner_buf[0] = 0x30;
757 tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
758 tuner_msg.len = 2;
dea74869
PB		 759 if (fe->ops.i2c_gate_ctrl)
760 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 761 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
762
763 return 0;
764}
765
58ef4f92 766static int philips_tda827xo_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC		 767{
768 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 769 struct tda1004x_state *state = fe->demodulator_priv;
770 u8 addr = state->config->tuner_address;
86ddd96f 771 static u8 tda827x_sleep[] = { 0x30, 0xd0};
58ef4f92 772 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827x_sleep,
f2421ca3 773 .len = sizeof(tda827x_sleep) };
dea74869
PB		 774 if (fe->ops.i2c_gate_ctrl)
775 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f 776 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
a79ddae9 777 return 0;
86ddd96f
MCC		 778}
779
90e9df7f
HH		 780/* ------------------------------------------------------------------ */
781
782struct tda827xa_data {
783 u32 lomax;
784 u8 svco;
785 u8 spd;
786 u8 scr;
787 u8 sbs;
788 u8 gc3;
789};
790
791static struct tda827xa_data tda827xa_dvbt[] = {
792 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
793 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
794 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
795 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
796 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
797 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
798 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
799 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
800 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
801 { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
802 { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
803 { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
804 { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
805 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
806 { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
807 { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
808 { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
809 { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
810 { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
811 { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
812 { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
813 { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
814 { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
815 { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
816 { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
817 { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
818 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
819
58ef4f92 820static int philips_tda827xa_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
90e9df7f
HH		 821{
822 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 823 struct tda1004x_state *state = fe->demodulator_priv;
824 u8 addr = state->config->tuner_address;
825 u8 tuner_buf[10];
90e9df7f
HH		 826
827 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
828 int i, tuner_freq, if_freq;
829 u32 N;
830
58ef4f92
HH		 831 philips_tda827x_lna_gain( fe, 1);
832 msleep(20);
833
90e9df7f
HH		 834 switch (params->u.ofdm.bandwidth) {
835 case BANDWIDTH_6_MHZ:
836 if_freq = 4000000;
837 break;
838 case BANDWIDTH_7_MHZ:
839 if_freq = 4500000;
840 break;
841 default: /* 8 MHz or Auto */
842 if_freq = 5000000;
843 break;
844 }
845 tuner_freq = params->frequency + if_freq;
846
847 i = 0;
848 while (tda827xa_dvbt[i].lomax < tuner_freq) {
849 if(tda827xa_dvbt[i + 1].lomax == 0)
850 break;
851 i++;
852 }
853
854 N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
855 tuner_buf[0] = 0; // subaddress
856 tuner_buf[1] = N >> 8;
857 tuner_buf[2] = N & 0xff;
858 tuner_buf[3] = 0;
859 tuner_buf[4] = 0x16;
860 tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
861 tda827xa_dvbt[i].sbs;
862 tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
58ef4f92 863 tuner_buf[7] = 0x1c;
90e9df7f
HH		 864 tuner_buf[8] = 0x06;
865 tuner_buf[9] = 0x24;
58ef4f92
HH		 866 tuner_buf[10] = 0x00;
867 msg.len = 11;
dea74869
PB		 868 if (fe->ops.i2c_gate_ctrl)
869 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92
HH		 870 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
871 printk("%s/dvb: could not write to tuner at addr: 0x%02x\n",dev->name, addr << 1);
90e9df7f 872 return -EIO;
58ef4f92
HH		 873 }
874 tuner_buf[0] = 0x90;
875 tuner_buf[1] = 0xff;
876 tuner_buf[2] = 0x60;
877 tuner_buf[3] = 0x00;
878 tuner_buf[4] = 0x59; // lpsel, for 6MHz + 2
879 msg.len = 5;
880 if (fe->ops.i2c_gate_ctrl)
881 fe->ops.i2c_gate_ctrl(fe, 1);
882 i2c_transfer(&dev->i2c_adap, &msg, 1);
90e9df7f 883
58ef4f92
HH		 884 tuner_buf[0] = 0xa0;
885 tuner_buf[1] = 0x40;
90e9df7f 886 msg.len = 2;
dea74869
PB		 887 if (fe->ops.i2c_gate_ctrl)
888 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 889 i2c_transfer(&dev->i2c_adap, &msg, 1);
890
58ef4f92
HH		 891 msleep(11);
892 msg.flags = I2C_M_RD;
893 if (fe->ops.i2c_gate_ctrl)
894 fe->ops.i2c_gate_ctrl(fe, 1);
895 i2c_transfer(&dev->i2c_adap, &msg, 1);
896 msg.flags = 0;
897
898 tuner_buf[1] >>= 4;
899 dprintk("tda8275a AGC2 gain is: %d\n", tuner_buf[1]);
900 if ((tuner_buf[1]) < 2) {
901 philips_tda827x_lna_gain(fe, 0);
902 tuner_buf[0] = 0x60;
903 tuner_buf[1] = 0x0c;
904 if (fe->ops.i2c_gate_ctrl)
905 fe->ops.i2c_gate_ctrl(fe, 1);
906 i2c_transfer(&dev->i2c_adap, &msg, 1);
907 }
908
909 tuner_buf[0] = 0xc0;
910 tuner_buf[1] = 0x99; // lpsel, for 6MHz + 2
911 if (fe->ops.i2c_gate_ctrl)
912 fe->ops.i2c_gate_ctrl(fe, 1);
913 i2c_transfer(&dev->i2c_adap, &msg, 1);
914
915 tuner_buf[0] = 0x60;
916 tuner_buf[1] = 0x3c;
dea74869
PB		 917 if (fe->ops.i2c_gate_ctrl)
918 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 919 i2c_transfer(&dev->i2c_adap, &msg, 1);
920
90e9df7f 921 /* correct CP value */
58ef4f92
HH		 922 tuner_buf[0] = 0x30;
923 tuner_buf[1] = 0x10 + tda827xa_dvbt[i].scr;
924 if (fe->ops.i2c_gate_ctrl)
925 fe->ops.i2c_gate_ctrl(fe, 1);
926 i2c_transfer(&dev->i2c_adap, &msg, 1);
927
928 msleep(163);
929 tuner_buf[0] = 0xc0;
930 tuner_buf[1] = 0x39; // lpsel, for 6MHz + 2
dea74869
PB		 931 if (fe->ops.i2c_gate_ctrl)
932 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 933 i2c_transfer(&dev->i2c_adap, &msg, 1);
934
58ef4f92
HH		 935 msleep(3);
936 /* freeze AGC1 */
937 tuner_buf[0] = 0x50;
938 tuner_buf[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
dea74869
PB		 939 if (fe->ops.i2c_gate_ctrl)
940 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 941 i2c_transfer(&dev->i2c_adap, &msg, 1);
942
943 return 0;
944
945}
946
58ef4f92 947static int philips_tda827xa_tuner_sleep(struct dvb_frontend *fe)
90e9df7f
HH		 948{
949 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 950 struct tda1004x_state *state = fe->demodulator_priv;
951 u8 addr = state->config->tuner_address;
90e9df7f
HH		 952 static u8 tda827xa_sleep[] = { 0x30, 0x90};
953 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
f1bcef88 954 .len = sizeof(tda827xa_sleep) };
dea74869
PB		 955 if (fe->ops.i2c_gate_ctrl)
956 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f 957 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
587d2fd7
HH		 958 if (fe->ops.i2c_gate_ctrl)
959 fe->ops.i2c_gate_ctrl(fe, 0);
a79ddae9 960 return 0;
90e9df7f
HH		 961}
962
58ef4f92
HH		 963/* ------------------------------------------------------------------
964 * upper layer: distinguish the silicon tuner versions
965 */
90e9df7f 966
58ef4f92 967static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 968{
90e9df7f 969 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 970 struct tda1004x_state *state = fe->demodulator_priv;
971 u8 addr = state->config->tuner_address;
972 u8 data;
973 struct i2c_msg tuner_msg = {.addr = addr,.flags = I2C_M_RD,.buf = &data, .len = 1};
974 state->conf_probed = 0;
975 if (fe->ops.i2c_gate_ctrl)
976 fe->ops.i2c_gate_ctrl(fe, 1);
977 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
978 printk("%s/dvb: could not read from tuner at addr: 0x%02x\n",dev->name, addr << 1);
979 return -EIO;
980 }
981 if ((data & 0x3c) == 0) {
982 dprintk("tda827x tuner found\n");
983 state->conf_probed = 1;
587d2fd7 984 } else {
58ef4f92
HH		 985 dprintk("tda827xa tuner found\n");
986 state->conf_probed = 2;
987 }
988 switch (state->config->antenna_switch) {
989 case 0: break;
990 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
991 saa7134_set_gpio(dev, 21, 0);
992 break;
993 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
994 saa7134_set_gpio(dev, 21, 1);
995 break;
587d2fd7 996 }
587d2fd7
HH		 997 return 0;
998}
999
58ef4f92 1000static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 1001{
58ef4f92
HH		 1002 struct saa7134_dev *dev = fe->dvb->priv;
1003 struct tda1004x_state *state = fe->demodulator_priv;
1004 switch (state->conf_probed) {
1005 case 1: philips_tda827xo_tuner_sleep(fe);
1006 break;
1007 case 2: philips_tda827xa_tuner_sleep(fe);
1008 break;
1009 default: dprintk("Huh? unknown tda827x version!\n");
1010 return -EIO;
1011 }
1012 switch (state->config->antenna_switch) {
1013 case 0: break;
1014 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
1015 saa7134_set_gpio(dev, 21, 1);
1016 break;
1017 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
1018 saa7134_set_gpio(dev, 21, 0);
1019 break;
1020 }
587d2fd7 1021 return 0;
2d6b5f62 1022}
90e9df7f 1023
58ef4f92 1024static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
90e9df7f
HH		 1025{
1026 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 1027 struct tda1004x_state *state = fe->demodulator_priv;
1028 switch (state->conf_probed) {
1029 case 1: philips_tda827xo_pll_set(fe, params);
1030 break;
1031 case 2: philips_tda827xa_pll_set(fe, params);
1032 break;
1033 default: dprintk("Huh? unknown tda827x version!\n");
90e9df7f 1034 return -EIO;
58ef4f92 1035 }
90e9df7f
HH		 1036 return 0;
1037}
1038
58ef4f92
HH		 1039static void configure_tda827x_fe(struct saa7134_dev *dev, struct tda1004x_config *tda_conf,
1040 char *board_name)
90e9df7f 1041{
58ef4f92
HH		 1042 dev->dvb.frontend = dvb_attach(tda10046_attach, tda_conf, &dev->i2c_adap);
1043 if (dev->dvb.frontend) {
1044 if (tda_conf->i2c_gate)
1045 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
1046 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1047 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1048 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_pll_set;
1049 }
1050 philips_tda1004x_set_board_name(dev->dvb.frontend, board_name);
90e9df7f
HH		 1051}
1052
58ef4f92
HH		 1053/* ------------------------------------------------------------------ */
1054static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH		 1055 .demod_address = 0x08,
1056 .invert = 1,
1057 .invert_oclk = 0,
1058 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 1059 .agc_config = TDA10046_AGC_TDA827X,
1060 .gpio_config = TDA10046_GP11_I,
550a9a5e 1061 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1062 .tuner_address = 0x60,
1063 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 1064};
550a9a5e 1065
58ef4f92
HH		 1066static struct tda1004x_config philips_tiger_config = {
1067 .demod_address = 0x08,
1068 .invert = 1,
1069 .invert_oclk = 0,
1070 .xtal_freq = TDA10046_XTAL_16M,
1071 .agc_config = TDA10046_AGC_TDA827X,
1072 .gpio_config = TDA10046_GP11_I,
1073 .if_freq = TDA10046_FREQ_045,
1074 .i2c_gate = 0x4b,
1075 .tuner_address = 0x61,
1076 .tuner_config = 0,
1077 .antenna_switch= 1,
1078 .request_firmware = philips_tda1004x_request_firmware
1079};
550a9a5e
HH		 1080
1081static struct tda1004x_config cinergy_ht_config = {
1082 .demod_address = 0x08,
1083 .invert = 1,
1084 .invert_oclk = 0,
1085 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 1086 .agc_config = TDA10046_AGC_TDA827X,
1087 .gpio_config = TDA10046_GP01_I,
90e9df7f 1088 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1089 .i2c_gate = 0x4b,
1090 .tuner_address = 0x61,
1091 .tuner_config = 0,
1092 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH		 1093};
1094
58ef4f92
HH		 1095static struct tda1004x_config cinergy_ht_pci_config = {
1096 .demod_address = 0x08,
1097 .invert = 1,
1098 .invert_oclk = 0,
1099 .xtal_freq = TDA10046_XTAL_16M,
1100 .agc_config = TDA10046_AGC_TDA827X,
1101 .gpio_config = TDA10046_GP01_I,
1102 .if_freq = TDA10046_FREQ_045,
1103 .i2c_gate = 0x4b,
1104 .tuner_address = 0x60,
1105 .tuner_config = 0,
1106 .request_firmware = philips_tda1004x_request_firmware
1107};
1108
1109static struct tda1004x_config philips_tiger_s_config = {
1110 .demod_address = 0x08,
1111 .invert = 1,
1112 .invert_oclk = 0,
1113 .xtal_freq = TDA10046_XTAL_16M,
1114 .agc_config = TDA10046_AGC_TDA827X,
1115 .gpio_config = TDA10046_GP01_I,
1116 .if_freq = TDA10046_FREQ_045,
1117 .i2c_gate = 0x4b,
1118 .tuner_address = 0x61,
1119 .tuner_config = 2,
1120 .antenna_switch= 1,
1121 .request_firmware = philips_tda1004x_request_firmware
1122};
df42eaf2 1123
587d2fd7
HH		 1124static struct tda1004x_config pinnacle_pctv_310i_config = {
1125 .demod_address = 0x08,
1126 .invert = 1,
1127 .invert_oclk = 0,
1128 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 1129 .agc_config = TDA10046_AGC_TDA827X,
1130 .gpio_config = TDA10046_GP11_I,
587d2fd7 1131 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1132 .i2c_gate = 0x4b,
1133 .tuner_address = 0x61,
1134 .tuner_config = 1,
1135 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH		 1136};
1137
c6e53daf
TG		 1138static struct tda1004x_config hauppauge_hvr_1110_config = {
1139 .demod_address = 0x08,
1140 .invert = 1,
1141 .invert_oclk = 0,
1142 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 1143 .agc_config = TDA10046_AGC_TDA827X,
1144 .gpio_config = TDA10046_GP11_I,
c6e53daf 1145 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1146 .i2c_gate = 0x4b,
1147 .tuner_address = 0x61,
1148 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG		 1149};
1150
83646817
HH		 1151static struct tda1004x_config asus_p7131_dual_config = {
1152 .demod_address = 0x08,
1153 .invert = 1,
1154 .invert_oclk = 0,
1155 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 1156 .agc_config = TDA10046_AGC_TDA827X,
1157 .gpio_config = TDA10046_GP11_I,
83646817 1158 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1159 .i2c_gate = 0x4b,
1160 .tuner_address = 0x61,
1161 .tuner_config = 0,
1162 .antenna_switch= 2,
1163 .request_firmware = philips_tda1004x_request_firmware
83646817
HH		 1164};
1165
420f32fe
NS		 1166static struct tda1004x_config lifeview_trio_config = {
1167 .demod_address = 0x09,
1168 .invert = 1,
1169 .invert_oclk = 0,
1170 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 1171 .agc_config = TDA10046_AGC_TDA827X,
1172 .gpio_config = TDA10046_GP00_I,
420f32fe 1173 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1174 .tuner_address = 0x60,
1175 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS		 1176};
1177
58ef4f92 1178static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH		 1179 .demod_address = 0x08,
1180 .invert = 1,
1181 .invert_oclk = 0,
1182 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 1183 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 1184 .gpio_config = TDA10046_GP11_I,
df42eaf2 1185 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1186 .tuner_address = 0x60,
1187 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH		 1188};
1189
58ef4f92 1190static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH		 1191 .demod_address = 0x08,
1192 .invert = 1,
1193 .invert_oclk = 0,
1194 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 1195 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 1196 .gpio_config = TDA10046_GP01_I,
3dfb729f 1197 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1198 .i2c_gate = 0x4b,
1199 .tuner_address = 0x60,
1200 .tuner_config = 0,
1201 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH		 1202};
1203
58ef4f92
HH		 1204/* ------------------------------------------------------------------
1205 * special case: this card uses saa713x GPIO22 for the mode switch
1206 */
5eda227f 1207
58ef4f92 1208static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH		 1209{
1210 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 1211 philips_tda827x_tuner_init(fe);
1212 /* route TDA8275a AGC input to the channel decoder */
1213 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0400000);
5eda227f
HH		 1214 return 0;
1215}
1216
58ef4f92 1217static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 1218{
5eda227f 1219 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 1220 /* route TDA8275a AGC input to the analog IF chip*/
1221 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0400000);
1222 philips_tda827x_tuner_sleep(fe);
1223 return 0;
5eda227f
HH		 1224}
1225
58ef4f92 1226static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH		 1227 .demod_address = 0x08,
1228 .invert = 1,
1229 .invert_oclk = 0,
1230 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 1231 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 1232 .gpio_config = TDA10046_GP00_I,
5eda227f 1233 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 1234 .tuner_address = 0x61,
1235 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH		 1236};
1237
58ef4f92
HH		 1238/* ==================================================================
1239 * tda10086 based DVB-S cards, helper functions
1240 */
1241
e2ac28fa
IL		 1242static struct tda10086_config flydvbs = {
1243 .demod_address = 0x0e,
1244 .invert = 0,
1245};
1246
58ef4f92
HH		 1247/* ==================================================================
1248 * nxt200x based ATSC cards, helper functions
1249 */
90e9df7f 1250
3b64e8e2
MK		 1251static struct nxt200x_config avertvhda180 = {
1252 .demod_address = 0x0a,
3b64e8e2 1253};
3e1410ad 1254
fbc81c07
CM		 1255static int nxt200x_set_pll_input(u8 *buf, int input)
1256{
1257 if (input)
1258 buf[3] |= 0x08;
1259 else
1260 buf[3] &= ~0x08;
1261 return 0;
1262}
1263
3e1410ad
AB		 1264static struct nxt200x_config kworldatsc110 = {
1265 .demod_address = 0x0a,
fbc81c07 1266 .set_pll_input = nxt200x_set_pll_input,
3e1410ad 1267};
3b64e8e2 1268
58ef4f92
HH		 1269/* ==================================================================
1270 * Core code
1271 */
1da177e4
LT		 1272
1273static int dvb_init(struct saa7134_dev *dev)
1274{
58ef4f92 1275 char *board_name;
1da177e4
LT		 1276 /* init struct videobuf_dvb */
1277 dev->ts.nr_bufs = 32;
1278 dev->ts.nr_packets = 32*4;
1279 dev->dvb.name = dev->name;
1280 videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
1281 dev->pci, &dev->slock,
1282 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1283 V4L2_FIELD_ALTERNATE,
1284 sizeof(struct saa7134_buf),
1285 dev);
1286
1287 switch (dev->board) {
1288 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1289 printk("%s: pinnacle 300i dvb setup\n",dev->name);
2bfe031d 1290 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1291 &dev->i2c_adap);
6b3ccab7 1292 if (dev->dvb.frontend) {
dea74869 1293 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1294 }
1da177e4 1295 break;
a78d0bfa 1296 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1297 case SAA7134_BOARD_AVERMEDIA_A16AR:
a78d0bfa 1298 printk("%s: avertv 777 dvb setup\n",dev->name);
2bfe031d 1299 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1300 &dev->i2c_adap);
6b3ccab7 1301 if (dev->dvb.frontend) {
dea74869 1302 dev->dvb.frontend->ops.tuner_ops.calc_regs = mt352_aver777_tuner_calc_regs;
6b3ccab7 1303 }
a78d0bfa 1304 break;
1da177e4 1305 case SAA7134_BOARD_MD7134:
f7b54b10
MK		 1306 dev->dvb.frontend = dvb_attach(tda10046_attach,
1307 &medion_cardbus,
1308 &dev->i2c_adap);
6b3ccab7 1309 if (dev->dvb.frontend) {
dea74869
PB		 1310 dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init;
1311 dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep;
1312 dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params;
58ef4f92 1313 philips_tda1004x_set_board_name(dev->dvb.frontend, "DVB-T Medion MD7134");
6b3ccab7 1314 }
1da177e4 1315 break;
86ddd96f 1316 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK		 1317 dev->dvb.frontend = dvb_attach(tda10046_attach,
1318 &philips_tu1216_60_config,
1319 &dev->i2c_adap);
6b3ccab7 1320 if (dev->dvb.frontend) {
58ef4f92
HH		 1321 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1322 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
1323 philips_tda1004x_set_board_name(dev->dvb.frontend, "DVB-T Philips TOUGH");
6b3ccab7 1324 }
86ddd96f
MCC		 1325 break;
1326 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1327 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
58ef4f92 1328 configure_tda827x_fe(dev, &tda827x_lifeview_config, "DVB-T Lifeview FlyDVB Duo");
86ddd96f 1329 break;
2cf36ac4 1330 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1331 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK		 1332 dev->dvb.frontend = dvb_attach(tda10046_attach,
1333 &philips_europa_config,
1334 &dev->i2c_adap);
6b3ccab7 1335 if (dev->dvb.frontend) {
588f9831
HH		 1336 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1337 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB		 1338 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1339 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1340 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
58ef4f92
HH		 1341 if (dev->board == SAA7134_BOARD_VIDEOMATE_DVBT_300)
1342 board_name = "DVB-T Compro VideoMate 300";
1343 else
1344 board_name = "DVB-T Philips Europa";
1345 philips_tda1004x_set_board_name(dev->dvb.frontend, board_name);
6b3ccab7 1346 }
2cf36ac4
HH		 1347 break;
1348 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK		 1349 dev->dvb.frontend = dvb_attach(tda10046_attach,
1350 &philips_tu1216_61_config,
1351 &dev->i2c_adap);
6b3ccab7 1352 if (dev->dvb.frontend) {
58ef4f92
HH		 1353 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1354 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
1355 philips_tda1004x_set_board_name(dev->dvb.frontend, "DVB-T Compro VideoMate 200");
6b3ccab7 1356 }
2cf36ac4 1357 break;
90e9df7f 1358 case SAA7134_BOARD_PHILIPS_TIGER:
58ef4f92 1359 configure_tda827x_fe(dev, &philips_tiger_config, "DVB-T Philips Tiger");
587d2fd7
HH		 1360 break;
1361 case SAA7134_BOARD_PINNACLE_PCTV_310i:
58ef4f92 1362 configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, "DVB-T Pinnacle PCTV 310i");
90e9df7f 1363 break;
c6e53daf 1364 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
58ef4f92 1365 configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, "DVB-T Hauppauge HVR 1110");
c6e53daf 1366 break;
d4b0aba4 1367 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
58ef4f92 1368 configure_tda827x_fe(dev, &asus_p7131_dual_config, "DVB-T Asus P7137 Dual");
d4b0aba4 1369 break;
3d8466ec 1370 case SAA7134_BOARD_FLYDVBT_LR301:
58ef4f92 1371 configure_tda827x_fe(dev, &tda827x_lifeview_config, "DVB-T Lifeview FlyDVBT LR301");
3d8466ec 1372 break;
420f32fe 1373 case SAA7134_BOARD_FLYDVB_TRIO:
b331daa0 1374 if(! use_frontend) { //terrestrial
58ef4f92 1375 configure_tda827x_fe(dev, &lifeview_trio_config, NULL);
1f683cd8
NS		 1376 } else { //satellite
1377 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1378 if (dev->dvb.frontend) {
1379 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63,
1380 &dev->i2c_adap, 0) == NULL) {
1381 printk("%s: Lifeview Trio, No tda826x found!\n", __FUNCTION__);
1382 }
1383 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap,
1384 0x08, 0, 0) == NULL) {
1385 printk("%s: Lifeview Trio, No ISL6421 found!\n", __FUNCTION__);
1386 }
1387 }
6b3ccab7 1388 }
420f32fe 1389 break;
df42eaf2 1390 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1391 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK		 1392 dev->dvb.frontend = dvb_attach(tda10046_attach,
1393 &ads_tech_duo_config,
1394 &dev->i2c_adap);
6b3ccab7 1395 if (dev->dvb.frontend) {
dea74869
PB		 1396 dev->dvb.frontend->ops.tuner_ops.init = ads_duo_tuner_init;
1397 dev->dvb.frontend->ops.tuner_ops.sleep = ads_duo_tuner_sleep;
58ef4f92
HH		 1398 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_pll_set;
1399 if (dev->board == SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331)
1400 board_name = "DVB-T ADS DUO Cardbus PTV331";
1401 else
1402 board_name = "DVB-T Lifeview FlyDVT Cardbus";
1403 philips_tda1004x_set_board_name(dev->dvb.frontend, board_name);
6b3ccab7 1404 }
df42eaf2 1405 break;
3dfb729f 1406 case SAA7134_BOARD_TEVION_DVBT_220RF:
58ef4f92 1407 configure_tda827x_fe(dev, &tevion_dvbt220rf_config, "DVB-T Tevion 220RF");
d95b8942 1408 break;
5eda227f 1409 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
58ef4f92 1410 configure_tda827x_fe(dev, &md8800_dvbt_config, "DVB-T Medion MD8800");
5eda227f 1411 break;
3b64e8e2 1412 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK		 1413 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
1414 &dev->i2c_adap);
a79ddae9 1415 if (dev->dvb.frontend) {
4ad8eee5
MK		 1416 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
1417 NULL, &dvb_pll_tdhu2);
a79ddae9 1418 }
3b64e8e2 1419 break;
3e1410ad 1420 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK		 1421 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
1422 &dev->i2c_adap);
a79ddae9 1423 if (dev->dvb.frontend) {
4ad8eee5
MK		 1424 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
1425 NULL, &dvb_pll_tuv1236d);
a79ddae9 1426 }
3e1410ad 1427 break;
e2ac28fa 1428 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK		 1429 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1430 &dev->i2c_adap);
e2ac28fa 1431 if (dev->dvb.frontend) {
f7b54b10
MK		 1432 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1433 &dev->i2c_adap, 0) == NULL) {
e2ac28fa
IL		 1434 printk("%s: No tda826x found!\n", __FUNCTION__);
1435 }
f7b54b10
MK		 1436 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1437 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
e2ac28fa
IL		 1438 printk("%s: No ISL6421 found!\n", __FUNCTION__);
1439 }
1440 }
1441 break;
cf146ca4
HH		 1442 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
1443 dev->dvb.frontend = tda10046_attach(&medion_cardbus,
1444 &dev->i2c_adap);
1445 if (dev->dvb.frontend) {
1446 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1447 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1448 dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init;
1449 dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep;
1450 dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params;
58ef4f92 1451 philips_tda1004x_set_board_name(dev->dvb.frontend, "DVBT Asus Europa 2 Hybrid");
cf146ca4
HH		 1452 }
1453 break;
cbb94521
HH		 1454 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
1455 dev->dvb.frontend = dvb_attach(tda10046_attach,
1456 &philips_europa_config,
1457 &dev->i2c_adap);
1458 if (dev->dvb.frontend) {
1459 dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1460 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
58ef4f92 1461 philips_tda1004x_set_board_name(dev->dvb.frontend, "DVBT Compro Videomate 200a");
cbb94521
HH		 1462 }
1463 break;
550a9a5e 1464 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
58ef4f92 1465 configure_tda827x_fe(dev, &cinergy_ht_config, "DVB-T Terratec Cinergy HT Cardbus");
9de271e6
MK		 1466 break;
1467 case SAA7134_BOARD_CINERGY_HT_PCI:
58ef4f92
HH		 1468 configure_tda827x_fe(dev, &cinergy_ht_pci_config, "DVB-T Terratec Cinergy HT PCI");
1469 break;
1470 case SAA7134_BOARD_PHILIPS_TIGER_S:
1471 configure_tda827x_fe(dev, &philips_tiger_s_config, "DVB-T Philips Tiger S");
550a9a5e 1472 break;
1da177e4
LT		 1473 default:
1474 printk("%s: Huh? unknown DVB card?\n",dev->name);
1475 break;
1476 }
1477
1478 if (NULL == dev->dvb.frontend) {
1479 printk("%s: frontend initialization failed\n",dev->name);
1480 return -1;
1481 }
1482
1483 /* register everything else */
d09dbf92 1484 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
1da177e4
LT		 1485}
1486
1487static int dvb_fini(struct saa7134_dev *dev)
1488{
1489 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1490
1da177e4
LT		 1491 switch (dev->board) {
1492 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1493 /* otherwise we don't detect the tuner on next insmod */
1494 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
1495 break;
1496 };
1497 videobuf_dvb_unregister(&dev->dvb);
1498 return 0;
1499}
1500
1501static struct saa7134_mpeg_ops dvb_ops = {
1502 .type = SAA7134_MPEG_DVB,
1503 .init = dvb_init,
1504 .fini = dvb_fini,
1505};
1506
1507static int __init dvb_register(void)
1508{
1509 return saa7134_ts_register(&dvb_ops);
1510}
1511
1512static void __exit dvb_unregister(void)
1513{
1514 saa7134_ts_unregister(&dvb_ops);
1515}
1516
1517module_init(dvb_register);
1518module_exit(dvb_unregister);
1519
1520/* ------------------------------------------------------------------ */
1521/*
1522 * Local variables:
1523 * c-basic-offset: 8
1524 * End:
1525 */
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