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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
5823b3a6 | 36 | #include <dvb_frontend.h> |
1da177e4 | 37 | |
1f10c7af AQ |
38 | #include "mt352.h" |
39 | #include "mt352_priv.h" /* FIXME */ | |
40 | #include "tda1004x.h" | |
41 | #include "nxt200x.h" | |
bc36a686 | 42 | #include "tuner-xc2028.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
cb89cd33 | 50 | #include "tuner-simple.h" |
8ce47dad | 51 | |
47aeba5a DB |
52 | #include "zl10353.h" |
53 | ||
1da177e4 LT |
54 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
55 | MODULE_LICENSE("GPL"); | |
56 | ||
ff699e6b | 57 | static unsigned int antenna_pwr; |
86ddd96f | 58 | |
1da177e4 LT |
59 | module_param(antenna_pwr, int, 0444); |
60 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
61 | ||
ff699e6b | 62 | static int use_frontend; |
b331daa0 SB |
63 | module_param(use_frontend, int, 0644); |
64 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 65 | |
ff699e6b | 66 | static int debug; |
58ef4f92 HH |
67 | module_param(debug, int, 0644); |
68 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
69 | ||
78e92006 JG |
70 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
71 | ||
cf3c34c8 TP |
72 | #define dprintk(fmt, arg...) do { if (debug) \ |
73 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
74 | ||
75 | /* Print a warning */ | |
76 | #define wprintk(fmt, arg...) \ | |
77 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
78 | |
79 | /* ------------------------------------------------------------------ | |
80 | * mt352 based DVB-T cards | |
81 | */ | |
82 | ||
1da177e4 LT |
83 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
84 | { | |
85 | u32 ok; | |
86 | ||
87 | if (!on) { | |
88 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
89 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
90 | return 0; | |
91 | } | |
92 | ||
93 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
94 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
95 | udelay(10); | |
96 | ||
97 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
98 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
99 | udelay(10); | |
100 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
101 | udelay(10); | |
102 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 103 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
104 | |
105 | if (!ok) | |
106 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
107 | return ok; | |
108 | } | |
109 | ||
110 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
111 | { | |
112 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
113 | static u8 reset [] = { RESET, 0x80 }; | |
114 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
115 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
116 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
117 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
118 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
119 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
120 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
121 | struct saa7134_dev *dev= fe->dvb->priv; | |
122 | ||
5823b3a6 | 123 | dprintk("%s called\n", __func__); |
1da177e4 LT |
124 | |
125 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
126 | udelay(200); | |
127 | mt352_write(fe, reset, sizeof(reset)); | |
128 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
129 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
130 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
131 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
132 | ||
133 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
134 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
135 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 136 | |
1da177e4 LT |
137 | return 0; |
138 | } | |
139 | ||
a78d0bfa JAR |
140 | static int mt352_aver777_init(struct dvb_frontend* fe) |
141 | { | |
142 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
143 | static u8 reset [] = { RESET, 0x80 }; | |
144 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
145 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
146 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
147 | ||
148 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
149 | udelay(200); | |
150 | mt352_write(fe, reset, sizeof(reset)); | |
151 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
152 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
153 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
6e501a3f | 158 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
95a2fdb6 | 159 | { |
6e501a3f TF |
160 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
161 | static u8 reset [] = { RESET, 0x80 }; | |
162 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
163 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; | |
95a2fdb6 MCC |
164 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
165 | ||
166 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
167 | udelay(200); | |
168 | mt352_write(fe, reset, sizeof(reset)); | |
169 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
170 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
171 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
95a2fdb6 MCC |
172 | return 0; |
173 | } | |
174 | ||
0463f12c AQ |
175 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
176 | struct dvb_frontend_parameters* params) | |
1da177e4 | 177 | { |
df8cf706 HH |
178 | u8 off[] = { 0x00, 0xf1}; |
179 | u8 on[] = { 0x00, 0x71}; | |
180 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
181 | ||
1da177e4 LT |
182 | struct saa7134_dev *dev = fe->dvb->priv; |
183 | struct v4l2_frequency f; | |
184 | ||
185 | /* set frequency (mt2050) */ | |
186 | f.tuner = 0; | |
187 | f.type = V4L2_TUNER_DIGITAL_TV; | |
188 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
189 | if (fe->ops.i2c_gate_ctrl) |
190 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 191 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
fac6986c | 192 | saa_call_all(dev, tuner, s_frequency, &f); |
df8cf706 | 193 | msg.buf = on; |
dea74869 PB |
194 | if (fe->ops.i2c_gate_ctrl) |
195 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 196 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
197 | |
198 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
199 | ||
200 | /* mt352 setup */ | |
0463f12c | 201 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
202 | } |
203 | ||
204 | static struct mt352_config pinnacle_300i = { | |
205 | .demod_address = 0x3c >> 1, | |
206 | .adc_clock = 20333, | |
207 | .if2 = 36150, | |
208 | .no_tuner = 1, | |
209 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 210 | }; |
a78d0bfa JAR |
211 | |
212 | static struct mt352_config avermedia_777 = { | |
213 | .demod_address = 0xf, | |
214 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 215 | }; |
1da177e4 | 216 | |
6e501a3f | 217 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
bc36a686 MCC |
218 | .demod_address = (0x1e >> 1), |
219 | .no_tuner = 1, | |
6e501a3f | 220 | .demod_init = mt352_avermedia_xc3028_init, |
bc36a686 MCC |
221 | }; |
222 | ||
58ef4f92 HH |
223 | /* ================================================================== |
224 | * tda1004x based DVB-T cards, helper functions | |
225 | */ | |
226 | ||
227 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
228 | const struct firmware **fw, char *name) | |
1da177e4 LT |
229 | { |
230 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
231 | return request_firmware(fw, name, &dev->pci->dev); |
232 | } | |
233 | ||
58ef4f92 HH |
234 | /* ------------------------------------------------------------------ |
235 | * these tuners are tu1216, td1316(a) | |
236 | */ | |
237 | ||
238 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
239 | { | |
240 | struct saa7134_dev *dev = fe->dvb->priv; | |
241 | struct tda1004x_state *state = fe->demodulator_priv; | |
242 | u8 addr = state->config->tuner_address; | |
86ddd96f | 243 | u8 tuner_buf[4]; |
2cf36ac4 | 244 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
245 | sizeof(tuner_buf) }; |
246 | int tuner_frequency = 0; | |
247 | u8 band, cp, filter; | |
248 | ||
249 | /* determine charge pump */ | |
250 | tuner_frequency = params->frequency + 36166000; | |
251 | if (tuner_frequency < 87000000) | |
252 | return -EINVAL; | |
253 | else if (tuner_frequency < 130000000) | |
254 | cp = 3; | |
255 | else if (tuner_frequency < 160000000) | |
256 | cp = 5; | |
257 | else if (tuner_frequency < 200000000) | |
258 | cp = 6; | |
259 | else if (tuner_frequency < 290000000) | |
260 | cp = 3; | |
261 | else if (tuner_frequency < 420000000) | |
262 | cp = 5; | |
263 | else if (tuner_frequency < 480000000) | |
264 | cp = 6; | |
265 | else if (tuner_frequency < 620000000) | |
266 | cp = 3; | |
267 | else if (tuner_frequency < 830000000) | |
268 | cp = 5; | |
269 | else if (tuner_frequency < 895000000) | |
270 | cp = 7; | |
271 | else | |
272 | return -EINVAL; | |
273 | ||
274 | /* determine band */ | |
275 | if (params->frequency < 49000000) | |
276 | return -EINVAL; | |
277 | else if (params->frequency < 161000000) | |
278 | band = 1; | |
279 | else if (params->frequency < 444000000) | |
280 | band = 2; | |
281 | else if (params->frequency < 861000000) | |
282 | band = 4; | |
283 | else | |
284 | return -EINVAL; | |
285 | ||
286 | /* setup PLL filter */ | |
287 | switch (params->u.ofdm.bandwidth) { | |
288 | case BANDWIDTH_6_MHZ: | |
289 | filter = 0; | |
290 | break; | |
291 | ||
292 | case BANDWIDTH_7_MHZ: | |
293 | filter = 0; | |
294 | break; | |
295 | ||
296 | case BANDWIDTH_8_MHZ: | |
297 | filter = 1; | |
298 | break; | |
1da177e4 | 299 | |
86ddd96f MCC |
300 | default: |
301 | return -EINVAL; | |
302 | } | |
303 | ||
304 | /* calculate divisor | |
305 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 306 | */ |
86ddd96f MCC |
307 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
308 | ||
309 | /* setup tuner buffer */ | |
310 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
311 | tuner_buf[1] = tuner_frequency & 0xff; | |
312 | tuner_buf[2] = 0xca; | |
313 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
314 | ||
dea74869 PB |
315 | if (fe->ops.i2c_gate_ctrl) |
316 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 317 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
318 | wprintk("could not write to tuner at addr: 0x%02x\n", |
319 | addr << 1); | |
86ddd96f | 320 | return -EIO; |
58ef4f92 | 321 | } |
2cf36ac4 HH |
322 | msleep(1); |
323 | return 0; | |
324 | } | |
325 | ||
58ef4f92 | 326 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
327 | { |
328 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
329 | struct tda1004x_state *state = fe->demodulator_priv; |
330 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
331 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
332 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 333 | |
2cf36ac4 | 334 | /* setup PLL configuration */ |
dea74869 PB |
335 | if (fe->ops.i2c_gate_ctrl) |
336 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
337 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
338 | return -EIO; | |
86ddd96f | 339 | msleep(1); |
2cf36ac4 | 340 | |
1da177e4 LT |
341 | return 0; |
342 | } | |
343 | ||
2cf36ac4 HH |
344 | /* ------------------------------------------------------------------ */ |
345 | ||
2cf36ac4 | 346 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
347 | .demod_address = 0x8, |
348 | .invert = 1, | |
2cf36ac4 | 349 | .invert_oclk = 0, |
86ddd96f MCC |
350 | .xtal_freq = TDA10046_XTAL_4M, |
351 | .agc_config = TDA10046_AGC_DEFAULT, | |
352 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
353 | .tuner_address = 0x60, |
354 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
355 | }; |
356 | ||
2cf36ac4 HH |
357 | static struct tda1004x_config philips_tu1216_61_config = { |
358 | ||
359 | .demod_address = 0x8, | |
360 | .invert = 1, | |
361 | .invert_oclk = 0, | |
362 | .xtal_freq = TDA10046_XTAL_4M, | |
363 | .agc_config = TDA10046_AGC_DEFAULT, | |
364 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
365 | .tuner_address = 0x61, |
366 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
367 | }; |
368 | ||
369 | /* ------------------------------------------------------------------ */ | |
370 | ||
cbb94521 | 371 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
372 | { |
373 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
374 | struct tda1004x_state *state = fe->demodulator_priv; |
375 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 376 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 377 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
378 | |
379 | /* setup PLL configuration */ | |
dea74869 PB |
380 | if (fe->ops.i2c_gate_ctrl) |
381 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
382 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
383 | return -EIO; | |
2cf36ac4 HH |
384 | return 0; |
385 | } | |
386 | ||
a79ddae9 | 387 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 388 | { |
58ef4f92 HH |
389 | return philips_tda6651_pll_set(fe, params); |
390 | } | |
391 | ||
392 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
393 | { | |
394 | struct saa7134_dev *dev = fe->dvb->priv; | |
395 | struct tda1004x_state *state = fe->demodulator_priv; | |
396 | u8 addr = state->config->tuner_address; | |
397 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
398 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
399 | ||
400 | /* switch the tuner to analog mode */ | |
401 | if (fe->ops.i2c_gate_ctrl) | |
402 | fe->ops.i2c_gate_ctrl(fe, 1); | |
403 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
404 | return -EIO; | |
405 | return 0; | |
2cf36ac4 HH |
406 | } |
407 | ||
58ef4f92 HH |
408 | /* ------------------------------------------------------------------ */ |
409 | ||
cbb94521 HH |
410 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
411 | { | |
412 | struct saa7134_dev *dev = fe->dvb->priv; | |
413 | static u8 msg[] = { 0x00, 0x40}; | |
414 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
415 | ||
416 | ||
417 | if (philips_td1316_tuner_init(fe)) | |
418 | return -EIO; | |
419 | msleep(1); | |
420 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
421 | return -EIO; | |
422 | ||
423 | return 0; | |
424 | } | |
425 | ||
a79ddae9 | 426 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
427 | { |
428 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 429 | |
58ef4f92 HH |
430 | static u8 msg[] = { 0x00, 0x14 }; |
431 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
432 | ||
433 | if (philips_td1316_tuner_sleep(fe)) | |
434 | return -EIO; | |
2cf36ac4 HH |
435 | |
436 | /* switch the board to analog mode */ | |
dea74869 PB |
437 | if (fe->ops.i2c_gate_ctrl) |
438 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 439 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
440 | return 0; |
441 | } | |
442 | ||
443 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
444 | { | |
445 | struct saa7134_dev *dev = fe->dvb->priv; | |
446 | ||
447 | if (dev->original_demod_sleep) | |
448 | dev->original_demod_sleep(fe); | |
dea74869 | 449 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 450 | return 0; |
2cf36ac4 HH |
451 | } |
452 | ||
453 | static struct tda1004x_config philips_europa_config = { | |
454 | ||
455 | .demod_address = 0x8, | |
456 | .invert = 0, | |
457 | .invert_oclk = 0, | |
458 | .xtal_freq = TDA10046_XTAL_4M, | |
459 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
460 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
461 | .tuner_address = 0x61, |
462 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
463 | }; |
464 | ||
408b664a | 465 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
466 | .demod_address = 0x08, |
467 | .invert = 1, | |
468 | .invert_oclk = 0, | |
469 | .xtal_freq = TDA10046_XTAL_16M, | |
470 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
471 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
472 | .tuner_address = 0x61, |
473 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
474 | }; |
475 | ||
58ef4f92 HH |
476 | /* ------------------------------------------------------------------ |
477 | * tda 1004x based cards with philips silicon tuner | |
478 | */ | |
479 | ||
58ef4f92 HH |
480 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
481 | { | |
58ef4f92 HH |
482 | struct tda1004x_state *state = fe->demodulator_priv; |
483 | ||
484 | u8 addr = state->config->i2c_gate; | |
485 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
486 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
487 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
488 | if (enable) { | |
489 | tda8290_msg.buf = tda8290_close; | |
490 | } else { | |
491 | tda8290_msg.buf = tda8290_open; | |
492 | } | |
06be3035 | 493 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
494 | struct saa7134_dev *dev = fe->dvb->priv; |
495 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
496 | return -EIO; |
497 | } | |
498 | msleep(20); | |
499 | return 0; | |
500 | } | |
501 | ||
58ef4f92 | 502 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 503 | { |
90e9df7f | 504 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 505 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 506 | |
58ef4f92 HH |
507 | switch (state->config->antenna_switch) { |
508 | case 0: break; | |
509 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
510 | saa7134_set_gpio(dev, 21, 0); | |
511 | break; | |
512 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
513 | saa7134_set_gpio(dev, 21, 1); | |
514 | break; | |
587d2fd7 | 515 | } |
587d2fd7 HH |
516 | return 0; |
517 | } | |
518 | ||
58ef4f92 | 519 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 520 | { |
58ef4f92 HH |
521 | struct saa7134_dev *dev = fe->dvb->priv; |
522 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 523 | |
58ef4f92 HH |
524 | switch (state->config->antenna_switch) { |
525 | case 0: break; | |
526 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
527 | saa7134_set_gpio(dev, 21, 1); | |
528 | break; | |
529 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
530 | saa7134_set_gpio(dev, 21, 0); | |
531 | break; | |
532 | } | |
587d2fd7 | 533 | return 0; |
2d6b5f62 | 534 | } |
90e9df7f | 535 | |
d557dab5 MCC |
536 | static int configure_tda827x_fe(struct saa7134_dev *dev, |
537 | struct tda1004x_config *cdec_conf, | |
538 | struct tda827x_config *tuner_conf) | |
90e9df7f | 539 | { |
363c35fc ST |
540 | struct videobuf_dvb_frontend *fe0; |
541 | ||
92abe9ee DB |
542 | /* Get the first frontend */ |
543 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
363c35fc ST |
544 | |
545 | fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); | |
546 | if (fe0->dvb.frontend) { | |
7bff4b4d | 547 | if (cdec_conf->i2c_gate) |
363c35fc ST |
548 | fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
549 | if (dvb_attach(tda827x_attach, fe0->dvb.frontend, | |
d557dab5 MCC |
550 | cdec_conf->tuner_address, |
551 | &dev->i2c_adap, tuner_conf)) | |
552 | return 0; | |
553 | ||
554 | wprintk("no tda827x tuner found at addr: %02x\n", | |
7bff4b4d | 555 | cdec_conf->tuner_address); |
58ef4f92 | 556 | } |
d557dab5 | 557 | return -EINVAL; |
90e9df7f HH |
558 | } |
559 | ||
58ef4f92 | 560 | /* ------------------------------------------------------------------ */ |
261f5081 | 561 | |
7bff4b4d | 562 | static struct tda827x_config tda827x_cfg_0 = { |
7bff4b4d HH |
563 | .init = philips_tda827x_tuner_init, |
564 | .sleep = philips_tda827x_tuner_sleep, | |
565 | .config = 0, | |
566 | .switch_addr = 0 | |
567 | }; | |
568 | ||
569 | static struct tda827x_config tda827x_cfg_1 = { | |
7bff4b4d HH |
570 | .init = philips_tda827x_tuner_init, |
571 | .sleep = philips_tda827x_tuner_sleep, | |
572 | .config = 1, | |
573 | .switch_addr = 0x4b | |
574 | }; | |
575 | ||
576 | static struct tda827x_config tda827x_cfg_2 = { | |
7bff4b4d HH |
577 | .init = philips_tda827x_tuner_init, |
578 | .sleep = philips_tda827x_tuner_sleep, | |
579 | .config = 2, | |
580 | .switch_addr = 0x4b | |
581 | }; | |
582 | ||
583 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
7bff4b4d HH |
584 | .init = philips_tda827x_tuner_init, |
585 | .sleep = philips_tda827x_tuner_sleep, | |
586 | .config = 2, | |
587 | .switch_addr = 0x42 | |
588 | }; | |
589 | ||
590 | /* ------------------------------------------------------------------ */ | |
591 | ||
58ef4f92 | 592 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
593 | .demod_address = 0x08, |
594 | .invert = 1, | |
595 | .invert_oclk = 0, | |
596 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
597 | .agc_config = TDA10046_AGC_TDA827X, |
598 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 599 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
600 | .tuner_address = 0x60, |
601 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 602 | }; |
550a9a5e | 603 | |
58ef4f92 HH |
604 | static struct tda1004x_config philips_tiger_config = { |
605 | .demod_address = 0x08, | |
606 | .invert = 1, | |
607 | .invert_oclk = 0, | |
608 | .xtal_freq = TDA10046_XTAL_16M, | |
609 | .agc_config = TDA10046_AGC_TDA827X, | |
610 | .gpio_config = TDA10046_GP11_I, | |
611 | .if_freq = TDA10046_FREQ_045, | |
612 | .i2c_gate = 0x4b, | |
613 | .tuner_address = 0x61, | |
58ef4f92 HH |
614 | .antenna_switch= 1, |
615 | .request_firmware = philips_tda1004x_request_firmware | |
616 | }; | |
550a9a5e HH |
617 | |
618 | static struct tda1004x_config cinergy_ht_config = { | |
619 | .demod_address = 0x08, | |
620 | .invert = 1, | |
621 | .invert_oclk = 0, | |
622 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
623 | .agc_config = TDA10046_AGC_TDA827X, |
624 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 625 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
626 | .i2c_gate = 0x4b, |
627 | .tuner_address = 0x61, | |
58ef4f92 | 628 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
629 | }; |
630 | ||
58ef4f92 HH |
631 | static struct tda1004x_config cinergy_ht_pci_config = { |
632 | .demod_address = 0x08, | |
633 | .invert = 1, | |
634 | .invert_oclk = 0, | |
635 | .xtal_freq = TDA10046_XTAL_16M, | |
636 | .agc_config = TDA10046_AGC_TDA827X, | |
637 | .gpio_config = TDA10046_GP01_I, | |
638 | .if_freq = TDA10046_FREQ_045, | |
639 | .i2c_gate = 0x4b, | |
640 | .tuner_address = 0x60, | |
58ef4f92 HH |
641 | .request_firmware = philips_tda1004x_request_firmware |
642 | }; | |
643 | ||
644 | static struct tda1004x_config philips_tiger_s_config = { | |
645 | .demod_address = 0x08, | |
646 | .invert = 1, | |
647 | .invert_oclk = 0, | |
648 | .xtal_freq = TDA10046_XTAL_16M, | |
649 | .agc_config = TDA10046_AGC_TDA827X, | |
650 | .gpio_config = TDA10046_GP01_I, | |
651 | .if_freq = TDA10046_FREQ_045, | |
652 | .i2c_gate = 0x4b, | |
653 | .tuner_address = 0x61, | |
58ef4f92 HH |
654 | .antenna_switch= 1, |
655 | .request_firmware = philips_tda1004x_request_firmware | |
656 | }; | |
df42eaf2 | 657 | |
587d2fd7 HH |
658 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
659 | .demod_address = 0x08, | |
660 | .invert = 1, | |
661 | .invert_oclk = 0, | |
662 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
663 | .agc_config = TDA10046_AGC_TDA827X, |
664 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 665 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
666 | .i2c_gate = 0x4b, |
667 | .tuner_address = 0x61, | |
58ef4f92 | 668 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
669 | }; |
670 | ||
c6e53daf TG |
671 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
672 | .demod_address = 0x08, | |
673 | .invert = 1, | |
674 | .invert_oclk = 0, | |
675 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
676 | .agc_config = TDA10046_AGC_TDA827X, |
677 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 678 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
679 | .i2c_gate = 0x4b, |
680 | .tuner_address = 0x61, | |
681 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
682 | }; |
683 | ||
83646817 HH |
684 | static struct tda1004x_config asus_p7131_dual_config = { |
685 | .demod_address = 0x08, | |
686 | .invert = 1, | |
687 | .invert_oclk = 0, | |
688 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
689 | .agc_config = TDA10046_AGC_TDA827X, |
690 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 691 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
692 | .i2c_gate = 0x4b, |
693 | .tuner_address = 0x61, | |
58ef4f92 HH |
694 | .antenna_switch= 2, |
695 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
696 | }; |
697 | ||
420f32fe NS |
698 | static struct tda1004x_config lifeview_trio_config = { |
699 | .demod_address = 0x09, | |
700 | .invert = 1, | |
701 | .invert_oclk = 0, | |
702 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
703 | .agc_config = TDA10046_AGC_TDA827X, |
704 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 705 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
706 | .tuner_address = 0x60, |
707 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
708 | }; |
709 | ||
58ef4f92 | 710 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
711 | .demod_address = 0x08, |
712 | .invert = 1, | |
713 | .invert_oclk = 0, | |
714 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 715 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 716 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 717 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
718 | .tuner_address = 0x60, |
719 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
720 | }; |
721 | ||
58ef4f92 | 722 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
723 | .demod_address = 0x08, |
724 | .invert = 1, | |
725 | .invert_oclk = 0, | |
726 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 727 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 728 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 729 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
730 | .i2c_gate = 0x4b, |
731 | .tuner_address = 0x60, | |
58ef4f92 | 732 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
733 | }; |
734 | ||
e06cea4c HH |
735 | static struct tda1004x_config asus_p7131_4871_config = { |
736 | .demod_address = 0x08, | |
737 | .invert = 1, | |
738 | .invert_oclk = 0, | |
739 | .xtal_freq = TDA10046_XTAL_16M, | |
740 | .agc_config = TDA10046_AGC_TDA827X, | |
741 | .gpio_config = TDA10046_GP01_I, | |
742 | .if_freq = TDA10046_FREQ_045, | |
743 | .i2c_gate = 0x4b, | |
744 | .tuner_address = 0x61, | |
e06cea4c HH |
745 | .antenna_switch= 2, |
746 | .request_firmware = philips_tda1004x_request_firmware | |
747 | }; | |
748 | ||
f3eec0c0 | 749 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
750 | .demod_address = 0x08, |
751 | .invert = 1, | |
752 | .invert_oclk = 0, | |
753 | .xtal_freq = TDA10046_XTAL_16M, | |
754 | .agc_config = TDA10046_AGC_TDA827X, | |
755 | .gpio_config = TDA10046_GP11_I, | |
756 | .if_freq = TDA10046_FREQ_045, | |
757 | .i2c_gate = 0x4b, | |
758 | .tuner_address = 0x61, | |
e06cea4c HH |
759 | .antenna_switch= 2, |
760 | .request_firmware = philips_tda1004x_request_firmware | |
761 | }; | |
261f5081 | 762 | |
b39423a9 SF |
763 | static struct tda1004x_config kworld_dvb_t_210_config = { |
764 | .demod_address = 0x08, | |
765 | .invert = 1, | |
766 | .invert_oclk = 0, | |
767 | .xtal_freq = TDA10046_XTAL_16M, | |
768 | .agc_config = TDA10046_AGC_TDA827X, | |
769 | .gpio_config = TDA10046_GP11_I, | |
770 | .if_freq = TDA10046_FREQ_045, | |
771 | .i2c_gate = 0x4b, | |
772 | .tuner_address = 0x61, | |
b39423a9 SF |
773 | .antenna_switch= 1, |
774 | .request_firmware = philips_tda1004x_request_firmware | |
775 | }; | |
261f5081 | 776 | |
d90d9f5a ES |
777 | static struct tda1004x_config avermedia_super_007_config = { |
778 | .demod_address = 0x08, | |
779 | .invert = 1, | |
780 | .invert_oclk = 0, | |
781 | .xtal_freq = TDA10046_XTAL_16M, | |
782 | .agc_config = TDA10046_AGC_TDA827X, | |
783 | .gpio_config = TDA10046_GP01_I, | |
784 | .if_freq = TDA10046_FREQ_045, | |
785 | .i2c_gate = 0x4b, | |
786 | .tuner_address = 0x60, | |
d90d9f5a ES |
787 | .antenna_switch= 1, |
788 | .request_firmware = philips_tda1004x_request_firmware | |
789 | }; | |
790 | ||
4ba24373 HP |
791 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
792 | .demod_address = 0x08, | |
793 | .invert = 1, | |
794 | .invert_oclk = 0, | |
795 | .xtal_freq = TDA10046_XTAL_16M, | |
796 | .agc_config = TDA10046_AGC_TDA827X, | |
797 | .gpio_config = TDA10046_GP01_I, | |
798 | .if_freq = TDA10046_FREQ_045, | |
799 | .i2c_gate = 0x42, | |
800 | .tuner_address = 0x61, | |
4ba24373 HP |
801 | .antenna_switch = 1, |
802 | .request_firmware = philips_tda1004x_request_firmware | |
803 | }; | |
804 | ||
301e9d64 | 805 | static struct tda1004x_config asus_tiger_3in1_config = { |
806 | .demod_address = 0x0b, | |
807 | .invert = 1, | |
808 | .invert_oclk = 0, | |
809 | .xtal_freq = TDA10046_XTAL_16M, | |
810 | .agc_config = TDA10046_AGC_TDA827X, | |
811 | .gpio_config = TDA10046_GP11_I, | |
812 | .if_freq = TDA10046_FREQ_045, | |
813 | .i2c_gate = 0x4b, | |
814 | .tuner_address = 0x61, | |
815 | .antenna_switch = 1, | |
816 | .request_firmware = philips_tda1004x_request_firmware | |
817 | }; | |
818 | ||
58ef4f92 HH |
819 | /* ------------------------------------------------------------------ |
820 | * special case: this card uses saa713x GPIO22 for the mode switch | |
821 | */ | |
5eda227f | 822 | |
58ef4f92 | 823 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
824 | { |
825 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
826 | philips_tda827x_tuner_init(fe); |
827 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 828 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
829 | return 0; |
830 | } | |
831 | ||
58ef4f92 | 832 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 833 | { |
5eda227f | 834 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 835 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 836 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
837 | philips_tda827x_tuner_sleep(fe); |
838 | return 0; | |
5eda227f HH |
839 | } |
840 | ||
8ce47dad | 841 | static struct tda827x_config ads_duo_cfg = { |
8ce47dad | 842 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
843 | .sleep = ads_duo_tuner_sleep, |
844 | .config = 0 | |
8ce47dad MK |
845 | }; |
846 | ||
58ef4f92 | 847 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
848 | .demod_address = 0x08, |
849 | .invert = 1, | |
850 | .invert_oclk = 0, | |
851 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 852 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 853 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 854 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
855 | .tuner_address = 0x61, |
856 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
857 | }; |
858 | ||
47aeba5a DB |
859 | static struct zl10353_config behold_h6_config = { |
860 | .demod_address = 0x1e>>1, | |
861 | .no_tuner = 1, | |
862 | .parallel_ts = 1, | |
5f77af93 | 863 | .disable_i2c_gate_ctrl = 1, |
47aeba5a DB |
864 | }; |
865 | ||
58ef4f92 HH |
866 | /* ================================================================== |
867 | * tda10086 based DVB-S cards, helper functions | |
868 | */ | |
869 | ||
e2ac28fa IL |
870 | static struct tda10086_config flydvbs = { |
871 | .demod_address = 0x0e, | |
872 | .invert = 0, | |
ea75baf4 | 873 | .diseqc_tone = 0, |
9a1b04e4 HH |
874 | .xtal_freq = TDA10086_XTAL_16M, |
875 | }; | |
876 | ||
877 | static struct tda10086_config sd1878_4m = { | |
878 | .demod_address = 0x0e, | |
879 | .invert = 0, | |
880 | .diseqc_tone = 0, | |
881 | .xtal_freq = TDA10086_XTAL_4M, | |
e2ac28fa IL |
882 | }; |
883 | ||
1b1cee35 HH |
884 | /* ------------------------------------------------------------------ |
885 | * special case: lnb supply is connected to the gated i2c | |
886 | */ | |
887 | ||
888 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
889 | { | |
890 | int res = -EIO; | |
891 | struct saa7134_dev *dev = fe->dvb->priv; | |
892 | if (fe->ops.i2c_gate_ctrl) { | |
893 | fe->ops.i2c_gate_ctrl(fe, 1); | |
894 | if (dev->original_set_voltage) | |
895 | res = dev->original_set_voltage(fe, voltage); | |
896 | fe->ops.i2c_gate_ctrl(fe, 0); | |
897 | } | |
898 | return res; | |
899 | }; | |
900 | ||
901 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
902 | { | |
903 | int res = -EIO; | |
904 | struct saa7134_dev *dev = fe->dvb->priv; | |
905 | if (fe->ops.i2c_gate_ctrl) { | |
906 | fe->ops.i2c_gate_ctrl(fe, 1); | |
907 | if (dev->original_set_high_voltage) | |
908 | res = dev->original_set_high_voltage(fe, arg); | |
909 | fe->ops.i2c_gate_ctrl(fe, 0); | |
910 | } | |
911 | return res; | |
912 | }; | |
913 | ||
5823b3a6 HH |
914 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
915 | { | |
916 | struct saa7134_dev *dev = fe->dvb->priv; | |
917 | u8 wbuf[2] = { 0x1f, 00 }; | |
918 | u8 rbuf; | |
919 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
920 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
921 | ||
922 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
923 | return -EIO; | |
924 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
925 | if (voltage == SEC_VOLTAGE_18) | |
926 | wbuf[1] = rbuf | 0x10; | |
927 | else | |
928 | wbuf[1] = rbuf & 0xef; | |
929 | msg[0].len = 2; | |
930 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
931 | return 0; | |
932 | } | |
933 | ||
934 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
935 | { | |
936 | struct saa7134_dev *dev = fe->dvb->priv; | |
937 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
938 | return -EIO; | |
939 | } | |
940 | ||
58ef4f92 HH |
941 | /* ================================================================== |
942 | * nxt200x based ATSC cards, helper functions | |
943 | */ | |
90e9df7f | 944 | |
3b64e8e2 MK |
945 | static struct nxt200x_config avertvhda180 = { |
946 | .demod_address = 0x0a, | |
3b64e8e2 | 947 | }; |
3e1410ad AB |
948 | |
949 | static struct nxt200x_config kworldatsc110 = { | |
950 | .demod_address = 0x0a, | |
3e1410ad | 951 | }; |
3b64e8e2 | 952 | |
58ef4f92 HH |
953 | /* ================================================================== |
954 | * Core code | |
955 | */ | |
1da177e4 LT |
956 | |
957 | static int dvb_init(struct saa7134_dev *dev) | |
958 | { | |
1c4f76ab | 959 | int ret; |
bc36a686 | 960 | int attach_xc3028 = 0; |
363c35fc ST |
961 | struct videobuf_dvb_frontend *fe0; |
962 | ||
f972e0bd DB |
963 | /* FIXME: add support for multi-frontend */ |
964 | mutex_init(&dev->frontends.lock); | |
7bdf84fc | 965 | INIT_LIST_HEAD(&dev->frontends.felist); |
f972e0bd DB |
966 | |
967 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); | |
f3f741e7 DB |
968 | fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1); |
969 | if (!fe0) { | |
f972e0bd DB |
970 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
971 | return -ENOMEM; | |
972 | } | |
973 | ||
1da177e4 LT |
974 | /* init struct videobuf_dvb */ |
975 | dev->ts.nr_bufs = 32; | |
976 | dev->ts.nr_packets = 32*4; | |
363c35fc ST |
977 | fe0->dvb.name = dev->name; |
978 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops, | |
0705135e | 979 | &dev->pci->dev, &dev->slock, |
1da177e4 LT |
980 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
981 | V4L2_FIELD_ALTERNATE, | |
982 | sizeof(struct saa7134_buf), | |
983 | dev); | |
984 | ||
985 | switch (dev->board) { | |
986 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 987 | dprintk("pinnacle 300i dvb setup\n"); |
363c35fc | 988 | fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 989 | &dev->i2c_adap); |
363c35fc ST |
990 | if (fe0->dvb.frontend) { |
991 | fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; | |
6b3ccab7 | 992 | } |
1da177e4 | 993 | break; |
a78d0bfa | 994 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 995 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 996 | dprintk("avertv 777 dvb setup\n"); |
363c35fc | 997 | fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 998 | &dev->i2c_adap); |
363c35fc ST |
999 | if (fe0->dvb.frontend) { |
1000 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
fb147e97 MK |
1001 | &dev->i2c_adap, 0x61, |
1002 | TUNER_PHILIPS_TD1316); | |
6b3ccab7 | 1003 | } |
a78d0bfa | 1004 | break; |
95a2fdb6 | 1005 | case SAA7134_BOARD_AVERMEDIA_A16D: |
6e501a3f | 1006 | dprintk("AverMedia A16D dvb setup\n"); |
363c35fc | 1007 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1008 | &avermedia_xc3028_mt352_dev, |
1009 | &dev->i2c_adap); | |
95a2fdb6 MCC |
1010 | attach_xc3028 = 1; |
1011 | break; | |
1da177e4 | 1012 | case SAA7134_BOARD_MD7134: |
363c35fc | 1013 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1014 | &medion_cardbus, |
1015 | &dev->i2c_adap); | |
363c35fc ST |
1016 | if (fe0->dvb.frontend) { |
1017 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
cb89cd33 MK |
1018 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1019 | TUNER_PHILIPS_FMD1216ME_MK3); | |
6b3ccab7 | 1020 | } |
1da177e4 | 1021 | break; |
86ddd96f | 1022 | case SAA7134_BOARD_PHILIPS_TOUGH: |
363c35fc | 1023 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1024 | &philips_tu1216_60_config, |
1025 | &dev->i2c_adap); | |
363c35fc ST |
1026 | if (fe0->dvb.frontend) { |
1027 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1028 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1029 | } |
86ddd96f MCC |
1030 | break; |
1031 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1032 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
d557dab5 MCC |
1033 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1034 | &tda827x_cfg_0) < 0) | |
1035 | goto dettach_frontend; | |
86ddd96f | 1036 | break; |
2cf36ac4 | 1037 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1038 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
363c35fc | 1039 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1040 | &philips_europa_config, |
1041 | &dev->i2c_adap); | |
363c35fc ST |
1042 | if (fe0->dvb.frontend) { |
1043 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1044 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1045 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1046 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1047 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1048 | } |
2cf36ac4 HH |
1049 | break; |
1050 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
363c35fc | 1051 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1052 | &philips_tu1216_61_config, |
1053 | &dev->i2c_adap); | |
363c35fc ST |
1054 | if (fe0->dvb.frontend) { |
1055 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1056 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1057 | } |
2cf36ac4 | 1058 | break; |
b39423a9 | 1059 | case SAA7134_BOARD_KWORLD_DVBT_210: |
d557dab5 MCC |
1060 | if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config, |
1061 | &tda827x_cfg_2) < 0) | |
1062 | goto dettach_frontend; | |
b39423a9 | 1063 | break; |
90e9df7f | 1064 | case SAA7134_BOARD_PHILIPS_TIGER: |
d557dab5 MCC |
1065 | if (configure_tda827x_fe(dev, &philips_tiger_config, |
1066 | &tda827x_cfg_0) < 0) | |
1067 | goto dettach_frontend; | |
587d2fd7 HH |
1068 | break; |
1069 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
d557dab5 MCC |
1070 | if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, |
1071 | &tda827x_cfg_1) < 0) | |
1072 | goto dettach_frontend; | |
90e9df7f | 1073 | break; |
c6e53daf | 1074 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
d557dab5 MCC |
1075 | if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, |
1076 | &tda827x_cfg_1) < 0) | |
1077 | goto dettach_frontend; | |
c6e53daf | 1078 | break; |
d4b0aba4 | 1079 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
d557dab5 MCC |
1080 | if (configure_tda827x_fe(dev, &asus_p7131_dual_config, |
1081 | &tda827x_cfg_0) < 0) | |
1082 | goto dettach_frontend; | |
d4b0aba4 | 1083 | break; |
3d8466ec | 1084 | case SAA7134_BOARD_FLYDVBT_LR301: |
d557dab5 MCC |
1085 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1086 | &tda827x_cfg_0) < 0) | |
1087 | goto dettach_frontend; | |
3d8466ec | 1088 | break; |
92abe9ee | 1089 | case SAA7134_BOARD_FLYDVB_TRIO: |
d557dab5 MCC |
1090 | if (!use_frontend) { /* terrestrial */ |
1091 | if (configure_tda827x_fe(dev, &lifeview_trio_config, | |
1092 | &tda827x_cfg_0) < 0) | |
1093 | goto dettach_frontend; | |
7bff4b4d | 1094 | } else { /* satellite */ |
363c35fc ST |
1095 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1096 | if (fe0->dvb.frontend) { | |
1097 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63, | |
1f683cd8 | 1098 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1099 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
d557dab5 | 1100 | goto dettach_frontend; |
1f683cd8 | 1101 | } |
363c35fc | 1102 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap, |
1f683cd8 | 1103 | 0x08, 0, 0) == NULL) { |
5823b3a6 | 1104 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
d557dab5 | 1105 | goto dettach_frontend; |
1f683cd8 NS |
1106 | } |
1107 | } | |
6b3ccab7 | 1108 | } |
420f32fe | 1109 | break; |
df42eaf2 | 1110 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1111 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
363c35fc | 1112 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1113 | &ads_tech_duo_config, |
1114 | &dev->i2c_adap); | |
363c35fc ST |
1115 | if (fe0->dvb.frontend) { |
1116 | if (dvb_attach(tda827x_attach,fe0->dvb.frontend, | |
7bff4b4d HH |
1117 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1118 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1119 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d | 1120 | ads_tech_duo_config.tuner_address); |
d557dab5 | 1121 | goto dettach_frontend; |
ede2200d | 1122 | } |
bc36ec74 MCC |
1123 | } else |
1124 | wprintk("failed to attach tda10046\n"); | |
df42eaf2 | 1125 | break; |
3dfb729f | 1126 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
d557dab5 MCC |
1127 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
1128 | &tda827x_cfg_0) < 0) | |
1129 | goto dettach_frontend; | |
d95b8942 | 1130 | break; |
5eda227f | 1131 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1132 | if (!use_frontend) { /* terrestrial */ |
d557dab5 MCC |
1133 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1134 | &tda827x_cfg_0) < 0) | |
1135 | goto dettach_frontend; | |
4b1431ca | 1136 | } else { /* satellite */ |
363c35fc | 1137 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
4b1431ca | 1138 | &flydvbs, &dev->i2c_adap); |
363c35fc ST |
1139 | if (fe0->dvb.frontend) { |
1140 | struct dvb_frontend *fe = fe0->dvb.frontend; | |
5823b3a6 HH |
1141 | u8 dev_id = dev->eedata[2]; |
1142 | u8 data = 0xc4; | |
1143 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1144 | ||
363c35fc | 1145 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, |
d557dab5 | 1146 | 0x60, &dev->i2c_adap, 0) == NULL) { |
4b1431ca | 1147 | wprintk("%s: Medion Quadro, no tda826x " |
5823b3a6 | 1148 | "found !\n", __func__); |
d557dab5 MCC |
1149 | goto dettach_frontend; |
1150 | } | |
5823b3a6 HH |
1151 | if (dev_id != 0x08) { |
1152 | /* we need to open the i2c gate (we know it exists) */ | |
1153 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1154 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1155 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 HH |
1156 | wprintk("%s: Medion Quadro, no ISL6405 " |
1157 | "found !\n", __func__); | |
d557dab5 MCC |
1158 | goto dettach_frontend; |
1159 | } | |
e9c1ac9d HH |
1160 | if (dev_id == 0x07) { |
1161 | /* fire up the 2nd section of the LNB supply since | |
1162 | we can't do this from the other section */ | |
1163 | msg.buf = &data; | |
1164 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1165 | } | |
5823b3a6 HH |
1166 | fe->ops.i2c_gate_ctrl(fe, 0); |
1167 | dev->original_set_voltage = fe->ops.set_voltage; | |
1168 | fe->ops.set_voltage = md8800_set_voltage; | |
1169 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1170 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1171 | } else { | |
1172 | fe->ops.set_voltage = md8800_set_voltage2; | |
1173 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1174 | } | |
4b1431ca HH |
1175 | } |
1176 | } | |
5eda227f | 1177 | break; |
3b64e8e2 | 1178 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
363c35fc | 1179 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
f7b54b10 | 1180 | &dev->i2c_adap); |
363c35fc ST |
1181 | if (fe0->dvb.frontend) |
1182 | dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61, | |
47a9991e | 1183 | NULL, DVB_PLL_TDHU2); |
3b64e8e2 | 1184 | break; |
f689d908 | 1185 | case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI: |
3e1410ad | 1186 | case SAA7134_BOARD_KWORLD_ATSC110: |
363c35fc | 1187 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
f7b54b10 | 1188 | &dev->i2c_adap); |
363c35fc ST |
1189 | if (fe0->dvb.frontend) |
1190 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
62ff817a MK |
1191 | &dev->i2c_adap, 0x61, |
1192 | TUNER_PHILIPS_TUV1236D); | |
3e1410ad | 1193 | break; |
e2ac28fa | 1194 | case SAA7134_BOARD_FLYDVBS_LR300: |
363c35fc | 1195 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
f7b54b10 | 1196 | &dev->i2c_adap); |
363c35fc ST |
1197 | if (fe0->dvb.frontend) { |
1198 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
f7b54b10 | 1199 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1200 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 | 1201 | goto dettach_frontend; |
e2ac28fa | 1202 | } |
363c35fc | 1203 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
f7b54b10 | 1204 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 | 1205 | wprintk("%s: No ISL6421 found!\n", __func__); |
d557dab5 | 1206 | goto dettach_frontend; |
e2ac28fa IL |
1207 | } |
1208 | } | |
1209 | break; | |
cf146ca4 | 1210 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
363c35fc | 1211 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
0e8f4cc5 MS |
1212 | &medion_cardbus, |
1213 | &dev->i2c_adap); | |
363c35fc ST |
1214 | if (fe0->dvb.frontend) { |
1215 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1216 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 | 1217 | |
363c35fc | 1218 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, |
cb89cd33 MK |
1219 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1220 | TUNER_PHILIPS_FMD1216ME_MK3); | |
cf146ca4 HH |
1221 | } |
1222 | break; | |
cbb94521 | 1223 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
363c35fc | 1224 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
cbb94521 HH |
1225 | &philips_europa_config, |
1226 | &dev->i2c_adap); | |
363c35fc ST |
1227 | if (fe0->dvb.frontend) { |
1228 | fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1229 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
cbb94521 HH |
1230 | } |
1231 | break; | |
550a9a5e | 1232 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
d557dab5 MCC |
1233 | if (configure_tda827x_fe(dev, &cinergy_ht_config, |
1234 | &tda827x_cfg_0) < 0) | |
1235 | goto dettach_frontend; | |
9de271e6 MK |
1236 | break; |
1237 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
d557dab5 MCC |
1238 | if (configure_tda827x_fe(dev, &cinergy_ht_pci_config, |
1239 | &tda827x_cfg_0) < 0) | |
1240 | goto dettach_frontend; | |
58ef4f92 HH |
1241 | break; |
1242 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
d557dab5 MCC |
1243 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1244 | &tda827x_cfg_2) < 0) | |
1245 | goto dettach_frontend; | |
550a9a5e | 1246 | break; |
e06cea4c | 1247 | case SAA7134_BOARD_ASUS_P7131_4871: |
d557dab5 MCC |
1248 | if (configure_tda827x_fe(dev, &asus_p7131_4871_config, |
1249 | &tda827x_cfg_2) < 0) | |
1250 | goto dettach_frontend; | |
e06cea4c | 1251 | break; |
f3eec0c0 | 1252 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
d557dab5 MCC |
1253 | if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, |
1254 | &tda827x_cfg_2) < 0) | |
1255 | goto dettach_frontend; | |
e06cea4c | 1256 | break; |
d90d9f5a | 1257 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
d557dab5 MCC |
1258 | if (configure_tda827x_fe(dev, &avermedia_super_007_config, |
1259 | &tda827x_cfg_0) < 0) | |
1260 | goto dettach_frontend; | |
d90d9f5a | 1261 | break; |
4ba24373 | 1262 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
d557dab5 MCC |
1263 | if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, |
1264 | &tda827x_cfg_2_sw42) < 0) | |
1265 | goto dettach_frontend; | |
4ba24373 | 1266 | break; |
6ab465a8 | 1267 | case SAA7134_BOARD_PHILIPS_SNAKE: |
363c35fc | 1268 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
6ab465a8 | 1269 | &dev->i2c_adap); |
363c35fc ST |
1270 | if (fe0->dvb.frontend) { |
1271 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
d557dab5 | 1272 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1273 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 MCC |
1274 | goto dettach_frontend; |
1275 | } | |
363c35fc | 1276 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
d557dab5 | 1277 | &dev->i2c_adap, 0, 0) == NULL) { |
5823b3a6 | 1278 | wprintk("%s: No lnbp21 found!\n", __func__); |
d557dab5 MCC |
1279 | goto dettach_frontend; |
1280 | } | |
6ab465a8 HH |
1281 | } |
1282 | break; | |
7b5b3f17 | 1283 | case SAA7134_BOARD_CREATIX_CTX953: |
d557dab5 MCC |
1284 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1285 | &tda827x_cfg_0) < 0) | |
1286 | goto dettach_frontend; | |
7b5b3f17 | 1287 | break; |
6a6179b6 | 1288 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
d557dab5 MCC |
1289 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1290 | &tda827x_cfg_2) < 0) | |
1291 | goto dettach_frontend; | |
6a6179b6 | 1292 | break; |
bc36a686 | 1293 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
6e501a3f TF |
1294 | dprintk("AverMedia E506R dvb setup\n"); |
1295 | saa7134_set_gpio(dev, 25, 0); | |
1296 | msleep(10); | |
1297 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1298 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1299 | &avermedia_xc3028_mt352_dev, |
1300 | &dev->i2c_adap); | |
bc36a686 | 1301 | attach_xc3028 = 1; |
e2fc00c2 | 1302 | break; |
637afdb5 | 1303 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
363c35fc | 1304 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
9a1b04e4 | 1305 | &sd1878_4m, &dev->i2c_adap); |
363c35fc | 1306 | if (fe0->dvb.frontend) { |
637afdb5 | 1307 | struct dvb_frontend *fe; |
363c35fc | 1308 | if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, |
d557dab5 | 1309 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) { |
637afdb5 | 1310 | wprintk("%s: MD7134 DVB-S, no SD1878 " |
5823b3a6 | 1311 | "found !\n", __func__); |
d557dab5 MCC |
1312 | goto dettach_frontend; |
1313 | } | |
637afdb5 | 1314 | /* we need to open the i2c gate (we know it exists) */ |
363c35fc | 1315 | fe = fe0->dvb.frontend; |
637afdb5 HH |
1316 | fe->ops.i2c_gate_ctrl(fe, 1); |
1317 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1318 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
637afdb5 | 1319 | wprintk("%s: MD7134 DVB-S, no ISL6405 " |
5823b3a6 | 1320 | "found !\n", __func__); |
d557dab5 MCC |
1321 | goto dettach_frontend; |
1322 | } | |
637afdb5 HH |
1323 | fe->ops.i2c_gate_ctrl(fe, 0); |
1324 | dev->original_set_voltage = fe->ops.set_voltage; | |
1325 | fe->ops.set_voltage = md8800_set_voltage; | |
1326 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1327 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1328 | } | |
1329 | break; | |
e2fc00c2 MP |
1330 | case SAA7134_BOARD_AVERMEDIA_M103: |
1331 | saa7134_set_gpio(dev, 25, 0); | |
1332 | msleep(10); | |
1333 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1334 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
e2fc00c2 MP |
1335 | &avermedia_xc3028_mt352_dev, |
1336 | &dev->i2c_adap); | |
1337 | attach_xc3028 = 1; | |
1338 | break; | |
301e9d64 | 1339 | case SAA7134_BOARD_ASUSTeK_TIGER_3IN1: |
1340 | if (!use_frontend) { /* terrestrial */ | |
1341 | if (configure_tda827x_fe(dev, &asus_tiger_3in1_config, | |
1342 | &tda827x_cfg_2) < 0) | |
1343 | goto dettach_frontend; | |
1344 | } else { /* satellite */ | |
363c35fc | 1345 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
301e9d64 | 1346 | &flydvbs, &dev->i2c_adap); |
363c35fc | 1347 | if (fe0->dvb.frontend) { |
301e9d64 | 1348 | if (dvb_attach(tda826x_attach, |
363c35fc | 1349 | fe0->dvb.frontend, 0x60, |
301e9d64 | 1350 | &dev->i2c_adap, 0) == NULL) { |
1351 | wprintk("%s: Asus Tiger 3in1, no " | |
1352 | "tda826x found!\n", __func__); | |
1353 | goto dettach_frontend; | |
1354 | } | |
363c35fc | 1355 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
301e9d64 | 1356 | &dev->i2c_adap, 0, 0) == NULL) { |
1357 | wprintk("%s: Asus Tiger 3in1, no lnbp21" | |
1358 | " found!\n", __func__); | |
1359 | goto dettach_frontend; | |
1360 | } | |
1361 | } | |
1362 | } | |
1363 | break; | |
028165a3 HP |
1364 | case SAA7134_BOARD_ASUSTeK_TIGER: |
1365 | if (configure_tda827x_fe(dev, &philips_tiger_config, | |
1366 | &tda827x_cfg_0) < 0) | |
1367 | goto dettach_frontend; | |
1368 | break; | |
47aeba5a | 1369 | case SAA7134_BOARD_BEHOLD_H6: |
b0c4be8c | 1370 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
47aeba5a DB |
1371 | &behold_h6_config, |
1372 | &dev->i2c_adap); | |
b0c4be8c MCC |
1373 | if (fe0->dvb.frontend) { |
1374 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
47aeba5a DB |
1375 | &dev->i2c_adap, 0x61, |
1376 | TUNER_PHILIPS_FMD1216ME_MK3); | |
1377 | } | |
1378 | break; | |
1da177e4 | 1379 | default: |
cf3c34c8 | 1380 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1381 | break; |
1382 | } | |
1383 | ||
bc36a686 MCC |
1384 | if (attach_xc3028) { |
1385 | struct dvb_frontend *fe; | |
1386 | struct xc2028_config cfg = { | |
1387 | .i2c_adap = &dev->i2c_adap, | |
1388 | .i2c_addr = 0x61, | |
bc36a686 | 1389 | }; |
95a2fdb6 | 1390 | |
363c35fc | 1391 | if (!fe0->dvb.frontend) |
f3f741e7 | 1392 | goto dettach_frontend; |
95a2fdb6 | 1393 | |
363c35fc | 1394 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
bc36a686 MCC |
1395 | if (!fe) { |
1396 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1397 | dev->name); | |
d557dab5 | 1398 | goto dettach_frontend; |
bc36a686 MCC |
1399 | } |
1400 | } | |
1401 | ||
363c35fc | 1402 | if (NULL == fe0->dvb.frontend) { |
cf3c34c8 | 1403 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
f3f741e7 | 1404 | goto dettach_frontend; |
1da177e4 | 1405 | } |
d7cba043 | 1406 | /* define general-purpose callback pointer */ |
363c35fc | 1407 | fe0->dvb.frontend->callback = saa7134_tuner_callback; |
1da177e4 LT |
1408 | |
1409 | /* register everything else */ | |
363c35fc | 1410 | ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
59b1842d | 1411 | &dev->pci->dev, adapter_nr, 0); |
1c4f76ab HH |
1412 | |
1413 | /* this sequence is necessary to make the tda1004x load its firmware | |
1414 | * and to enter analog mode of hybrid boards | |
1415 | */ | |
1416 | if (!ret) { | |
363c35fc ST |
1417 | if (fe0->dvb.frontend->ops.init) |
1418 | fe0->dvb.frontend->ops.init(fe0->dvb.frontend); | |
1419 | if (fe0->dvb.frontend->ops.sleep) | |
1420 | fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend); | |
1421 | if (fe0->dvb.frontend->ops.tuner_ops.sleep) | |
1422 | fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend); | |
1c4f76ab HH |
1423 | } |
1424 | return ret; | |
d557dab5 MCC |
1425 | |
1426 | dettach_frontend: | |
f3f741e7 DB |
1427 | videobuf_dvb_dealloc_frontends(&dev->frontends); |
1428 | return -EINVAL; | |
1da177e4 LT |
1429 | } |
1430 | ||
1431 | static int dvb_fini(struct saa7134_dev *dev) | |
1432 | { | |
363c35fc ST |
1433 | struct videobuf_dvb_frontend *fe0; |
1434 | ||
1435 | /* Get the first frontend */ | |
1436 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
1437 | if (!fe0) | |
1438 | return -EINVAL; | |
1439 | ||
7f171123 MCC |
1440 | /* FIXME: I suspect that this code is bogus, since the entry for |
1441 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1442 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1443 | */ | |
1444 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1445 | struct v4l2_priv_tun_config tda9887_cfg; | |
1446 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1447 | ||
1448 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1449 | tda9887_cfg.priv = &on; | |
1da177e4 | 1450 | |
1da177e4 | 1451 | /* otherwise we don't detect the tuner on next insmod */ |
fac6986c | 1452 | saa_call_all(dev, tuner, s_config, &tda9887_cfg); |
5823b3a6 | 1453 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
e9c1ac9d | 1454 | if ((dev->eedata[2] == 0x07) && use_frontend) { |
5823b3a6 HH |
1455 | /* turn off the 2nd lnb supply */ |
1456 | u8 data = 0x80; | |
1457 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1458 | struct dvb_frontend *fe; | |
363c35fc | 1459 | fe = fe0->dvb.frontend; |
5823b3a6 HH |
1460 | if (fe->ops.i2c_gate_ctrl) { |
1461 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1462 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1463 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1464 | } | |
1465 | } | |
7f171123 | 1466 | } |
f3f741e7 | 1467 | videobuf_dvb_unregister_bus(&dev->frontends); |
1da177e4 LT |
1468 | return 0; |
1469 | } | |
1470 | ||
1471 | static struct saa7134_mpeg_ops dvb_ops = { | |
1472 | .type = SAA7134_MPEG_DVB, | |
1473 | .init = dvb_init, | |
1474 | .fini = dvb_fini, | |
1475 | }; | |
1476 | ||
1477 | static int __init dvb_register(void) | |
1478 | { | |
1479 | return saa7134_ts_register(&dvb_ops); | |
1480 | } | |
1481 | ||
1482 | static void __exit dvb_unregister(void) | |
1483 | { | |
1484 | saa7134_ts_unregister(&dvb_ops); | |
1485 | } | |
1486 | ||
1487 | module_init(dvb_register); | |
1488 | module_exit(dvb_unregister); | |
1489 | ||
1490 | /* ------------------------------------------------------------------ */ | |
1491 | /* | |
1492 | * Local variables: | |
1493 | * c-basic-offset: 8 | |
1494 | * End: | |
1495 | */ |