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[media] au0828: Move the Kconfig knob under V4L_USB_DRIVERS
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
1da177e4
LT		 27#include <linux/delay.h>
28#include <linux/kthread.h>
29#include <linux/suspend.h>
30
31#include "saa7134-reg.h"
32#include "saa7134.h"
5e453dc7 33#include <media/v4l2-common.h>
a78d0bfa 34#include "dvb-pll.h"
5823b3a6 35#include <dvb_frontend.h>
1da177e4 36
1f10c7af
AQ		 37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
bc36a686 41#include "tuner-xc2028.h"
2930992c 42#include "xc5000.h"
1da177e4 43
e2ac28fa
IL		 44#include "tda10086.h"
45#include "tda826x.h"
8ce47dad 46#include "tda827x.h"
e2ac28fa 47#include "isl6421.h"
4b1431ca 48#include "isl6405.h"
6ab465a8 49#include "lnbp21.h"
cb89cd33 50#include "tuner-simple.h"
1bc7f51c 51#include "tda10048.h"
3abdedd8
MK		 52#include "tda18271.h"
53#include "lgdt3305.h"
54#include "tda8290.h"
f0551efc 55#include "mb86a20s.h"
ce02704d 56#include "lgs8gxx.h"
8ce47dad 57
47aeba5a 58#include "zl10353.h"
dbe8740d 59#include "qt1010.h"
47aeba5a 60
04574185 61#include "zl10036.h"
ecfcfec8 62#include "zl10039.h"
04574185 63#include "mt312.h"
25fa2071 64#include "s5h1411.h"
04574185 65
1da177e4
LT		 66MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
67MODULE_LICENSE("GPL");
68
ff699e6b 69static unsigned int antenna_pwr;
86ddd96f 70
1da177e4
LT		 71module_param(antenna_pwr, int, 0444);
72MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
73
ff699e6b 74static int use_frontend;
b331daa0
SB		 75module_param(use_frontend, int, 0644);
76MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 77
ff699e6b 78static int debug;
58ef4f92
HH		 79module_param(debug, int, 0644);
80MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
81
78e92006
JG		 82DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
83
cf3c34c8
TP		 84#define dprintk(fmt, arg...) do { if (debug) \
85 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
86
87/* Print a warning */
88#define wprintk(fmt, arg...) \
89 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH		 90
91/* ------------------------------------------------------------------
92 * mt352 based DVB-T cards
93 */
94
1da177e4
LT		 95static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
96{
97 u32 ok;
98
99 if (!on) {
100 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
101 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
102 return 0;
103 }
104
105 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
106 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
107 udelay(10);
108
109 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
110 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
111 udelay(10);
112 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
113 udelay(10);
114 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 115 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT		 116
117 if (!ok)
118 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
119 return ok;
120}
121
122static int mt352_pinnacle_init(struct dvb_frontend* fe)
123{
124 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
125 static u8 reset [] = { RESET, 0x80 };
126 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
127 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
128 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
129 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
130 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
131 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
132 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
133 struct saa7134_dev *dev= fe->dvb->priv;
134
5823b3a6 135 dprintk("%s called\n", __func__);
1da177e4
LT		 136
137 mt352_write(fe, clock_config, sizeof(clock_config));
138 udelay(200);
139 mt352_write(fe, reset, sizeof(reset));
140 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
141 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
142 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
143 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
144
145 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
146 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
147 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 148
1da177e4
LT		 149 return 0;
150}
151
a78d0bfa
JAR		 152static int mt352_aver777_init(struct dvb_frontend* fe)
153{
154 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
155 static u8 reset [] = { RESET, 0x80 };
156 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
157 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
158 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
159
160 mt352_write(fe, clock_config, sizeof(clock_config));
161 udelay(200);
162 mt352_write(fe, reset, sizeof(reset));
163 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
164 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
165 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
166
167 return 0;
168}
169
6e501a3f 170static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 171{
6e501a3f
TF		 172 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
173 static u8 reset [] = { RESET, 0x80 };
174 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
175 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC		 176 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
177
178 mt352_write(fe, clock_config, sizeof(clock_config));
179 udelay(200);
180 mt352_write(fe, reset, sizeof(reset));
181 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
182 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
183 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC		 184 return 0;
185}
186
14d24d14 187static int mt352_pinnacle_tuner_set_params(struct dvb_frontend *fe)
1da177e4 188{
b09cf61d 189 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
df8cf706
HH		 190 u8 off[] = { 0x00, 0xf1};
191 u8 on[] = { 0x00, 0x71};
192 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
193
1da177e4
LT		 194 struct saa7134_dev *dev = fe->dvb->priv;
195 struct v4l2_frequency f;
196
197 /* set frequency (mt2050) */
198 f.tuner = 0;
199 f.type = V4L2_TUNER_DIGITAL_TV;
b09cf61d 200 f.frequency = c->frequency / 1000 * 16 / 1000;
dea74869
PB		 201 if (fe->ops.i2c_gate_ctrl)
202 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 203 i2c_transfer(&dev->i2c_adap, &msg, 1);
fac6986c 204 saa_call_all(dev, tuner, s_frequency, &f);
df8cf706 205 msg.buf = on;
dea74869
PB		 206 if (fe->ops.i2c_gate_ctrl)
207 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 208 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT		 209
210 pinnacle_antenna_pwr(dev, antenna_pwr);
211
212 /* mt352 setup */
0463f12c 213 return mt352_pinnacle_init(fe);
1da177e4
LT		 214}
215
216static struct mt352_config pinnacle_300i = {
217 .demod_address = 0x3c >> 1,
218 .adc_clock = 20333,
219 .if2 = 36150,
220 .no_tuner = 1,
221 .demod_init = mt352_pinnacle_init,
1da177e4 222};
a78d0bfa
JAR		 223
224static struct mt352_config avermedia_777 = {
225 .demod_address = 0xf,
226 .demod_init = mt352_aver777_init,
a78d0bfa 227};
1da177e4 228
6e501a3f 229static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC		 230 .demod_address = (0x1e >> 1),
231 .no_tuner = 1,
6e501a3f 232 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC		 233};
234
f0551efc
MCC		 235static struct tda18271_std_map mb86a20s_tda18271_std_map = {
236 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
237 .if_lvl = 7, .rfagc_top = 0x37, },
238};
239
240static struct tda18271_config kworld_tda18271_config = {
241 .std_map = &mb86a20s_tda18271_std_map,
6a58bc0f 242 .gate = TDA18271_GATE_DIGITAL,
ecb71d26
MCC		 243 .config = 3, /* Use tuner callback for AGC */
244
f0551efc
MCC		 245};
246
247static const struct mb86a20s_config kworld_mb86a20s_config = {
248 .demod_address = 0x10,
249};
250
6a58bc0f
MCC		 251static int kworld_sbtvd_gate_ctrl(struct dvb_frontend* fe, int enable)
252{
253 struct saa7134_dev *dev = fe->dvb->priv;
254
255 unsigned char initmsg[] = {0x45, 0x97};
256 unsigned char msg_enable[] = {0x45, 0xc1};
257 unsigned char msg_disable[] = {0x45, 0x81};
258 struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2};
259
260 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
261 wprintk("could not access the I2C gate\n");
262 return -EIO;
263 }
264 if (enable)
265 msg.buf = msg_enable;
266 else
267 msg.buf = msg_disable;
268 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
269 wprintk("could not access the I2C gate\n");
270 return -EIO;
271 }
272 msleep(20);
273 return 0;
274}
275
58ef4f92
HH		 276/* ==================================================================
277 * tda1004x based DVB-T cards, helper functions
278 */
279
280static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
281 const struct firmware **fw, char *name)
1da177e4
LT		 282{
283 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 284 return request_firmware(fw, name, &dev->pci->dev);
285}
286
58ef4f92
HH		 287/* ------------------------------------------------------------------
288 * these tuners are tu1216, td1316(a)
289 */
290
14d24d14 291static int philips_tda6651_pll_set(struct dvb_frontend *fe)
58ef4f92 292{
b09cf61d 293 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
58ef4f92
HH		 294 struct saa7134_dev *dev = fe->dvb->priv;
295 struct tda1004x_state *state = fe->demodulator_priv;
296 u8 addr = state->config->tuner_address;
86ddd96f 297 u8 tuner_buf[4];
2cf36ac4 298 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 299 sizeof(tuner_buf) };
300 int tuner_frequency = 0;
301 u8 band, cp, filter;
302
303 /* determine charge pump */
b09cf61d 304 tuner_frequency = c->frequency + 36166000;
86ddd96f
MCC		 305 if (tuner_frequency < 87000000)
306 return -EINVAL;
307 else if (tuner_frequency < 130000000)
308 cp = 3;
309 else if (tuner_frequency < 160000000)
310 cp = 5;
311 else if (tuner_frequency < 200000000)
312 cp = 6;
313 else if (tuner_frequency < 290000000)
314 cp = 3;
315 else if (tuner_frequency < 420000000)
316 cp = 5;
317 else if (tuner_frequency < 480000000)
318 cp = 6;
319 else if (tuner_frequency < 620000000)
320 cp = 3;
321 else if (tuner_frequency < 830000000)
322 cp = 5;
323 else if (tuner_frequency < 895000000)
324 cp = 7;
325 else
326 return -EINVAL;
327
328 /* determine band */
b09cf61d 329 if (c->frequency < 49000000)
86ddd96f 330 return -EINVAL;
b09cf61d 331 else if (c->frequency < 161000000)
86ddd96f 332 band = 1;
b09cf61d 333 else if (c->frequency < 444000000)
86ddd96f 334 band = 2;
b09cf61d 335 else if (c->frequency < 861000000)
86ddd96f
MCC		 336 band = 4;
337 else
338 return -EINVAL;
339
340 /* setup PLL filter */
b09cf61d
MCC		 341 switch (c->bandwidth_hz) {
342 case 6000000:
86ddd96f
MCC		 343 filter = 0;
344 break;
345
b09cf61d 346 case 7000000:
86ddd96f
MCC		 347 filter = 0;
348 break;
349
b09cf61d 350 case 8000000:
86ddd96f
MCC		 351 filter = 1;
352 break;
1da177e4 353
86ddd96f
MCC		 354 default:
355 return -EINVAL;
356 }
357
358 /* calculate divisor
359 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 360 */
b09cf61d 361 tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000;
86ddd96f
MCC		 362
363 /* setup tuner buffer */
364 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
365 tuner_buf[1] = tuner_frequency & 0xff;
366 tuner_buf[2] = 0xca;
367 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
368
dea74869
PB		 369 if (fe->ops.i2c_gate_ctrl)
370 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 371 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP		 372 wprintk("could not write to tuner at addr: 0x%02x\n",
373 addr << 1);
86ddd96f 374 return -EIO;
58ef4f92 375 }
2cf36ac4
HH		 376 msleep(1);
377 return 0;
378}
379
58ef4f92 380static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH		 381{
382 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 383 struct tda1004x_state *state = fe->demodulator_priv;
384 u8 addr = state->config->tuner_address;
2cf36ac4
HH		 385 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
386 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 387
2cf36ac4 388 /* setup PLL configuration */
dea74869
PB		 389 if (fe->ops.i2c_gate_ctrl)
390 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 391 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
392 return -EIO;
86ddd96f 393 msleep(1);
2cf36ac4 394
1da177e4
LT		 395 return 0;
396}
397
2cf36ac4
HH		 398/* ------------------------------------------------------------------ */
399
2cf36ac4 400static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 401 .demod_address = 0x8,
402 .invert = 1,
2cf36ac4 403 .invert_oclk = 0,
86ddd96f
MCC		 404 .xtal_freq = TDA10046_XTAL_4M,
405 .agc_config = TDA10046_AGC_DEFAULT,
406 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 407 .tuner_address = 0x60,
408 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 409};
410
2cf36ac4
HH		 411static struct tda1004x_config philips_tu1216_61_config = {
412
413 .demod_address = 0x8,
414 .invert = 1,
415 .invert_oclk = 0,
416 .xtal_freq = TDA10046_XTAL_4M,
417 .agc_config = TDA10046_AGC_DEFAULT,
418 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 419 .tuner_address = 0x61,
420 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 421};
422
423/* ------------------------------------------------------------------ */
424
cbb94521 425static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH		 426{
427 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 428 struct tda1004x_state *state = fe->demodulator_priv;
429 u8 addr = state->config->tuner_address;
2cf36ac4 430 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 431 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH		 432
433 /* setup PLL configuration */
dea74869
PB		 434 if (fe->ops.i2c_gate_ctrl)
435 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 436 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
437 return -EIO;
2cf36ac4
HH		 438 return 0;
439}
440
14d24d14 441static int philips_td1316_tuner_set_params(struct dvb_frontend *fe)
2cf36ac4 442{
14d24d14 443 return philips_tda6651_pll_set(fe);
58ef4f92
HH		 444}
445
446static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
447{
448 struct saa7134_dev *dev = fe->dvb->priv;
449 struct tda1004x_state *state = fe->demodulator_priv;
450 u8 addr = state->config->tuner_address;
451 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
452 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
453
454 /* switch the tuner to analog mode */
455 if (fe->ops.i2c_gate_ctrl)
456 fe->ops.i2c_gate_ctrl(fe, 1);
457 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
458 return -EIO;
459 return 0;
2cf36ac4
HH		 460}
461
58ef4f92
HH		 462/* ------------------------------------------------------------------ */
463
cbb94521
HH		 464static int philips_europa_tuner_init(struct dvb_frontend *fe)
465{
466 struct saa7134_dev *dev = fe->dvb->priv;
467 static u8 msg[] = { 0x00, 0x40};
468 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
469
470
471 if (philips_td1316_tuner_init(fe))
472 return -EIO;
473 msleep(1);
474 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
475 return -EIO;
476
477 return 0;
478}
479
a79ddae9 480static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH		 481{
482 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 483
58ef4f92
HH		 484 static u8 msg[] = { 0x00, 0x14 };
485 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
486
487 if (philips_td1316_tuner_sleep(fe))
488 return -EIO;
2cf36ac4
HH		 489
490 /* switch the board to analog mode */
dea74869
PB		 491 if (fe->ops.i2c_gate_ctrl)
492 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 493 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ		 494 return 0;
495}
496
497static int philips_europa_demod_sleep(struct dvb_frontend *fe)
498{
499 struct saa7134_dev *dev = fe->dvb->priv;
500
501 if (dev->original_demod_sleep)
502 dev->original_demod_sleep(fe);
dea74869 503 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 504 return 0;
2cf36ac4
HH		 505}
506
507static struct tda1004x_config philips_europa_config = {
508
509 .demod_address = 0x8,
510 .invert = 0,
511 .invert_oclk = 0,
512 .xtal_freq = TDA10046_XTAL_4M,
513 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
514 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH		 515 .tuner_address = 0x61,
516 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 517};
518
408b664a 519static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 520 .demod_address = 0x08,
521 .invert = 1,
522 .invert_oclk = 0,
523 .xtal_freq = TDA10046_XTAL_16M,
524 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
525 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH		 526 .tuner_address = 0x61,
527 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 528};
529
128fe95d
VC		 530static struct tda1004x_config technotrend_budget_t3000_config = {
531 .demod_address = 0x8,
532 .invert = 1,
533 .invert_oclk = 0,
534 .xtal_freq = TDA10046_XTAL_4M,
535 .agc_config = TDA10046_AGC_DEFAULT,
536 .if_freq = TDA10046_FREQ_3617,
537 .tuner_address = 0x63,
538 .request_firmware = philips_tda1004x_request_firmware
539};
540
58ef4f92
HH		 541/* ------------------------------------------------------------------
542 * tda 1004x based cards with philips silicon tuner
543 */
544
58ef4f92
HH		 545static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
546{
58ef4f92
HH		 547 struct tda1004x_state *state = fe->demodulator_priv;
548
549 u8 addr = state->config->i2c_gate;
550 static u8 tda8290_close[] = { 0x21, 0xc0};
551 static u8 tda8290_open[] = { 0x21, 0x80};
552 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
553 if (enable) {
554 tda8290_msg.buf = tda8290_close;
555 } else {
556 tda8290_msg.buf = tda8290_open;
557 }
06be3035 558 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP		 559 struct saa7134_dev *dev = fe->dvb->priv;
560 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH		 561 return -EIO;
562 }
563 msleep(20);
564 return 0;
565}
566
58ef4f92 567static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 568{
90e9df7f 569 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 570 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 571
58ef4f92
HH		 572 switch (state->config->antenna_switch) {
573 case 0: break;
574 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
575 saa7134_set_gpio(dev, 21, 0);
576 break;
577 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
578 saa7134_set_gpio(dev, 21, 1);
579 break;
587d2fd7 580 }
587d2fd7
HH		 581 return 0;
582}
583
58ef4f92 584static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 585{
58ef4f92
HH		 586 struct saa7134_dev *dev = fe->dvb->priv;
587 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 588
58ef4f92
HH		 589 switch (state->config->antenna_switch) {
590 case 0: break;
591 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
592 saa7134_set_gpio(dev, 21, 1);
593 break;
594 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
595 saa7134_set_gpio(dev, 21, 0);
596 break;
597 }
587d2fd7 598 return 0;
2d6b5f62 599}
90e9df7f 600
d557dab5
MCC		 601static int configure_tda827x_fe(struct saa7134_dev *dev,
602 struct tda1004x_config *cdec_conf,
603 struct tda827x_config *tuner_conf)
90e9df7f 604{
363c35fc
ST		 605 struct videobuf_dvb_frontend *fe0;
606
92abe9ee
DB		 607 /* Get the first frontend */
608 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST		 609
610 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
611 if (fe0->dvb.frontend) {
7bff4b4d 612 if (cdec_conf->i2c_gate)
363c35fc
ST		 613 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
614 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC		 615 cdec_conf->tuner_address,
616 &dev->i2c_adap, tuner_conf))
617 return 0;
618
619 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 620 cdec_conf->tuner_address);
58ef4f92 621 }
d557dab5 622 return -EINVAL;
90e9df7f
HH		 623}
624
58ef4f92 625/* ------------------------------------------------------------------ */
261f5081 626
7bff4b4d 627static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH		 628 .init = philips_tda827x_tuner_init,
629 .sleep = philips_tda827x_tuner_sleep,
630 .config = 0,
631 .switch_addr = 0
632};
633
634static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH		 635 .init = philips_tda827x_tuner_init,
636 .sleep = philips_tda827x_tuner_sleep,
637 .config = 1,
638 .switch_addr = 0x4b
639};
640
641static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH		 642 .init = philips_tda827x_tuner_init,
643 .sleep = philips_tda827x_tuner_sleep,
644 .config = 2,
645 .switch_addr = 0x4b
646};
647
648static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH		 649 .init = philips_tda827x_tuner_init,
650 .sleep = philips_tda827x_tuner_sleep,
651 .config = 2,
652 .switch_addr = 0x42
653};
654
655/* ------------------------------------------------------------------ */
656
58ef4f92 657static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH		 658 .demod_address = 0x08,
659 .invert = 1,
660 .invert_oclk = 0,
661 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 662 .agc_config = TDA10046_AGC_TDA827X,
663 .gpio_config = TDA10046_GP11_I,
550a9a5e 664 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 665 .tuner_address = 0x60,
666 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 667};
550a9a5e 668
58ef4f92
HH		 669static struct tda1004x_config philips_tiger_config = {
670 .demod_address = 0x08,
671 .invert = 1,
672 .invert_oclk = 0,
673 .xtal_freq = TDA10046_XTAL_16M,
674 .agc_config = TDA10046_AGC_TDA827X,
675 .gpio_config = TDA10046_GP11_I,
676 .if_freq = TDA10046_FREQ_045,
677 .i2c_gate = 0x4b,
678 .tuner_address = 0x61,
58ef4f92
HH		 679 .antenna_switch= 1,
680 .request_firmware = philips_tda1004x_request_firmware
681};
550a9a5e
HH		 682
683static struct tda1004x_config cinergy_ht_config = {
684 .demod_address = 0x08,
685 .invert = 1,
686 .invert_oclk = 0,
687 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 688 .agc_config = TDA10046_AGC_TDA827X,
689 .gpio_config = TDA10046_GP01_I,
90e9df7f 690 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 691 .i2c_gate = 0x4b,
692 .tuner_address = 0x61,
58ef4f92 693 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH		 694};
695
58ef4f92
HH		 696static struct tda1004x_config cinergy_ht_pci_config = {
697 .demod_address = 0x08,
698 .invert = 1,
699 .invert_oclk = 0,
700 .xtal_freq = TDA10046_XTAL_16M,
701 .agc_config = TDA10046_AGC_TDA827X,
702 .gpio_config = TDA10046_GP01_I,
703 .if_freq = TDA10046_FREQ_045,
704 .i2c_gate = 0x4b,
705 .tuner_address = 0x60,
58ef4f92
HH		 706 .request_firmware = philips_tda1004x_request_firmware
707};
708
709static struct tda1004x_config philips_tiger_s_config = {
710 .demod_address = 0x08,
711 .invert = 1,
712 .invert_oclk = 0,
713 .xtal_freq = TDA10046_XTAL_16M,
714 .agc_config = TDA10046_AGC_TDA827X,
715 .gpio_config = TDA10046_GP01_I,
716 .if_freq = TDA10046_FREQ_045,
717 .i2c_gate = 0x4b,
718 .tuner_address = 0x61,
58ef4f92
HH		 719 .antenna_switch= 1,
720 .request_firmware = philips_tda1004x_request_firmware
721};
df42eaf2 722
587d2fd7
HH		 723static struct tda1004x_config pinnacle_pctv_310i_config = {
724 .demod_address = 0x08,
725 .invert = 1,
726 .invert_oclk = 0,
727 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 728 .agc_config = TDA10046_AGC_TDA827X,
729 .gpio_config = TDA10046_GP11_I,
587d2fd7 730 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 731 .i2c_gate = 0x4b,
732 .tuner_address = 0x61,
58ef4f92 733 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH		 734};
735
c6e53daf
TG		 736static struct tda1004x_config hauppauge_hvr_1110_config = {
737 .demod_address = 0x08,
738 .invert = 1,
739 .invert_oclk = 0,
740 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 741 .agc_config = TDA10046_AGC_TDA827X,
742 .gpio_config = TDA10046_GP11_I,
c6e53daf 743 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 744 .i2c_gate = 0x4b,
745 .tuner_address = 0x61,
746 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG		 747};
748
83646817
HH		 749static struct tda1004x_config asus_p7131_dual_config = {
750 .demod_address = 0x08,
751 .invert = 1,
752 .invert_oclk = 0,
753 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 754 .agc_config = TDA10046_AGC_TDA827X,
755 .gpio_config = TDA10046_GP11_I,
83646817 756 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 757 .i2c_gate = 0x4b,
758 .tuner_address = 0x61,
58ef4f92
HH		 759 .antenna_switch= 2,
760 .request_firmware = philips_tda1004x_request_firmware
83646817
HH		 761};
762
420f32fe
NS		 763static struct tda1004x_config lifeview_trio_config = {
764 .demod_address = 0x09,
765 .invert = 1,
766 .invert_oclk = 0,
767 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 768 .agc_config = TDA10046_AGC_TDA827X,
769 .gpio_config = TDA10046_GP00_I,
420f32fe 770 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 771 .tuner_address = 0x60,
772 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS		 773};
774
58ef4f92 775static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH		 776 .demod_address = 0x08,
777 .invert = 1,
778 .invert_oclk = 0,
779 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 780 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 781 .gpio_config = TDA10046_GP11_I,
df42eaf2 782 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 783 .tuner_address = 0x60,
784 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH		 785};
786
58ef4f92 787static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH		 788 .demod_address = 0x08,
789 .invert = 1,
790 .invert_oclk = 0,
791 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 792 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 793 .gpio_config = TDA10046_GP01_I,
3dfb729f 794 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 795 .i2c_gate = 0x4b,
796 .tuner_address = 0x60,
58ef4f92 797 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH		 798};
799
e06cea4c
HH		 800static struct tda1004x_config asus_p7131_4871_config = {
801 .demod_address = 0x08,
802 .invert = 1,
803 .invert_oclk = 0,
804 .xtal_freq = TDA10046_XTAL_16M,
805 .agc_config = TDA10046_AGC_TDA827X,
806 .gpio_config = TDA10046_GP01_I,
807 .if_freq = TDA10046_FREQ_045,
808 .i2c_gate = 0x4b,
809 .tuner_address = 0x61,
e06cea4c
HH		 810 .antenna_switch= 2,
811 .request_firmware = philips_tda1004x_request_firmware
812};
813
f3eec0c0 814static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH		 815 .demod_address = 0x08,
816 .invert = 1,
817 .invert_oclk = 0,
818 .xtal_freq = TDA10046_XTAL_16M,
819 .agc_config = TDA10046_AGC_TDA827X,
820 .gpio_config = TDA10046_GP11_I,
821 .if_freq = TDA10046_FREQ_045,
822 .i2c_gate = 0x4b,
823 .tuner_address = 0x61,
e06cea4c
HH		 824 .antenna_switch= 2,
825 .request_firmware = philips_tda1004x_request_firmware
826};
261f5081 827
b39423a9
SF		 828static struct tda1004x_config kworld_dvb_t_210_config = {
829 .demod_address = 0x08,
830 .invert = 1,
831 .invert_oclk = 0,
832 .xtal_freq = TDA10046_XTAL_16M,
833 .agc_config = TDA10046_AGC_TDA827X,
834 .gpio_config = TDA10046_GP11_I,
835 .if_freq = TDA10046_FREQ_045,
836 .i2c_gate = 0x4b,
837 .tuner_address = 0x61,
b39423a9
SF		 838 .antenna_switch= 1,
839 .request_firmware = philips_tda1004x_request_firmware
840};
261f5081 841
d90d9f5a
ES		 842static struct tda1004x_config avermedia_super_007_config = {
843 .demod_address = 0x08,
844 .invert = 1,
845 .invert_oclk = 0,
846 .xtal_freq = TDA10046_XTAL_16M,
847 .agc_config = TDA10046_AGC_TDA827X,
848 .gpio_config = TDA10046_GP01_I,
849 .if_freq = TDA10046_FREQ_045,
850 .i2c_gate = 0x4b,
851 .tuner_address = 0x60,
d90d9f5a
ES		 852 .antenna_switch= 1,
853 .request_firmware = philips_tda1004x_request_firmware
854};
855
4ba24373
HP		 856static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
857 .demod_address = 0x08,
858 .invert = 1,
859 .invert_oclk = 0,
860 .xtal_freq = TDA10046_XTAL_16M,
861 .agc_config = TDA10046_AGC_TDA827X,
862 .gpio_config = TDA10046_GP01_I,
863 .if_freq = TDA10046_FREQ_045,
864 .i2c_gate = 0x42,
865 .tuner_address = 0x61,
4ba24373
HP		 866 .antenna_switch = 1,
867 .request_firmware = philips_tda1004x_request_firmware
868};
869
301e9d64 870static struct tda1004x_config asus_tiger_3in1_config = {
871 .demod_address = 0x0b,
872 .invert = 1,
873 .invert_oclk = 0,
874 .xtal_freq = TDA10046_XTAL_16M,
875 .agc_config = TDA10046_AGC_TDA827X,
876 .gpio_config = TDA10046_GP11_I,
877 .if_freq = TDA10046_FREQ_045,
878 .i2c_gate = 0x4b,
879 .tuner_address = 0x61,
880 .antenna_switch = 1,
881 .request_firmware = philips_tda1004x_request_firmware
882};
883
58ef4f92
HH		 884/* ------------------------------------------------------------------
885 * special case: this card uses saa713x GPIO22 for the mode switch
886 */
5eda227f 887
58ef4f92 888static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH		 889{
890 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 891 philips_tda827x_tuner_init(fe);
892 /* route TDA8275a AGC input to the channel decoder */
06be3035 893 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH		 894 return 0;
895}
896
58ef4f92 897static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 898{
5eda227f 899 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 900 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 901 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH		 902 philips_tda827x_tuner_sleep(fe);
903 return 0;
5eda227f
HH		 904}
905
8ce47dad 906static struct tda827x_config ads_duo_cfg = {
8ce47dad 907 .init = ads_duo_tuner_init,
7bff4b4d
HH		 908 .sleep = ads_duo_tuner_sleep,
909 .config = 0
8ce47dad
MK		 910};
911
58ef4f92 912static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH		 913 .demod_address = 0x08,
914 .invert = 1,
915 .invert_oclk = 0,
916 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 917 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 918 .gpio_config = TDA10046_GP00_I,
5eda227f 919 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 920 .tuner_address = 0x61,
921 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH		 922};
923
47aeba5a
DB		 924static struct zl10353_config behold_h6_config = {
925 .demod_address = 0x1e>>1,
926 .no_tuner = 1,
927 .parallel_ts = 1,
5f77af93 928 .disable_i2c_gate_ctrl = 1,
47aeba5a
DB		 929};
930
2930992c
BILDB		 931static struct xc5000_config behold_x7_tunerconfig = {
932 .i2c_address = 0xc2>>1,
933 .if_khz = 4560,
2a0d0560 934 .radio_input = XC5000_RADIO_FM1,
2930992c
BILDB		 935};
936
937static struct zl10353_config behold_x7_config = {
938 .demod_address = 0x1e>>1,
939 .if2 = 45600,
940 .no_tuner = 1,
941 .parallel_ts = 1,
942 .disable_i2c_gate_ctrl = 1,
943};
944
dbe8740d
CC		 945static struct zl10353_config videomate_t750_zl10353_config = {
946 .demod_address = 0x0f,
947 .no_tuner = 1,
948 .parallel_ts = 1,
949 .disable_i2c_gate_ctrl = 1,
950};
951
952static struct qt1010_config videomate_t750_qt1010_config = {
953 .i2c_address = 0x62
954};
955
956
58ef4f92
HH		 957/* ==================================================================
958 * tda10086 based DVB-S cards, helper functions
959 */
960
e2ac28fa
IL		 961static struct tda10086_config flydvbs = {
962 .demod_address = 0x0e,
963 .invert = 0,
ea75baf4 964 .diseqc_tone = 0,
9a1b04e4
HH		 965 .xtal_freq = TDA10086_XTAL_16M,
966};
967
968static struct tda10086_config sd1878_4m = {
969 .demod_address = 0x0e,
970 .invert = 0,
971 .diseqc_tone = 0,
972 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL		 973};
974
1b1cee35
HH		 975/* ------------------------------------------------------------------
976 * special case: lnb supply is connected to the gated i2c
977 */
978
979static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
980{
981 int res = -EIO;
982 struct saa7134_dev *dev = fe->dvb->priv;
983 if (fe->ops.i2c_gate_ctrl) {
984 fe->ops.i2c_gate_ctrl(fe, 1);
985 if (dev->original_set_voltage)
986 res = dev->original_set_voltage(fe, voltage);
987 fe->ops.i2c_gate_ctrl(fe, 0);
988 }
989 return res;
990};
991
992static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
993{
994 int res = -EIO;
995 struct saa7134_dev *dev = fe->dvb->priv;
996 if (fe->ops.i2c_gate_ctrl) {
997 fe->ops.i2c_gate_ctrl(fe, 1);
998 if (dev->original_set_high_voltage)
999 res = dev->original_set_high_voltage(fe, arg);
1000 fe->ops.i2c_gate_ctrl(fe, 0);
1001 }
1002 return res;
1003};
1004
5823b3a6
HH		 1005static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
1006{
1007 struct saa7134_dev *dev = fe->dvb->priv;
1008 u8 wbuf[2] = { 0x1f, 00 };
1009 u8 rbuf;
1010 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
1011 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
1012
1013 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
1014 return -EIO;
1015 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
1016 if (voltage == SEC_VOLTAGE_18)
1017 wbuf[1] = rbuf | 0x10;
1018 else
1019 wbuf[1] = rbuf & 0xef;
1020 msg[0].len = 2;
1021 i2c_transfer(&dev->i2c_adap, msg, 1);
1022 return 0;
1023}
1024
1025static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
1026{
1027 struct saa7134_dev *dev = fe->dvb->priv;
1028 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
1029 return -EIO;
1030}
1031
58ef4f92
HH		 1032/* ==================================================================
1033 * nxt200x based ATSC cards, helper functions
1034 */
90e9df7f 1035
3b64e8e2
MK		 1036static struct nxt200x_config avertvhda180 = {
1037 .demod_address = 0x0a,
3b64e8e2 1038};
3e1410ad
AB		 1039
1040static struct nxt200x_config kworldatsc110 = {
1041 .demod_address = 0x0a,
3e1410ad 1042};
3b64e8e2 1043
04574185
MS		 1044/* ------------------------------------------------------------------ */
1045
1046static struct mt312_config avertv_a700_mt312 = {
1047 .demod_address = 0x0e,
1048 .voltage_inverted = 1,
1049};
1050
1051static struct zl10036_config avertv_a700_tuner = {
1052 .tuner_address = 0x60,
1053};
1054
ecfcfec8
IL		 1055static struct mt312_config zl10313_compro_s350_config = {
1056 .demod_address = 0x0e,
1057};
1058
3abdedd8
MK		 1059static struct lgdt3305_config hcw_lgdt3305_config = {
1060 .i2c_addr = 0x0e,
1061 .mpeg_mode = LGDT3305_MPEG_SERIAL,
1062 .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE,
1063 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
1064 .deny_i2c_rptr = 1,
1065 .spectral_inversion = 1,
1066 .qam_if_khz = 4000,
1067 .vsb_if_khz = 3250,
1068};
1069
1bc7f51c
MK		 1070static struct tda10048_config hcw_tda10048_config = {
1071 .demod_address = 0x10 >> 1,
1072 .output_mode = TDA10048_SERIAL_OUTPUT,
1073 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1074 .inversion = TDA10048_INVERSION_ON,
1075 .dtv6_if_freq_khz = TDA10048_IF_3300,
1076 .dtv7_if_freq_khz = TDA10048_IF_3500,
1077 .dtv8_if_freq_khz = TDA10048_IF_4000,
1078 .clk_freq_khz = TDA10048_CLK_16000,
1079 .disable_gate_access = 1,
1080};
1081
3abdedd8
MK		 1082static struct tda18271_std_map hauppauge_tda18271_std_map = {
1083 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
1084 .if_lvl = 1, .rfagc_top = 0x58, },
1085 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
1086 .if_lvl = 1, .rfagc_top = 0x58, },
1087};
1088
1089static struct tda18271_config hcw_tda18271_config = {
1090 .std_map = &hauppauge_tda18271_std_map,
1091 .gate = TDA18271_GATE_ANALOG,
1092 .config = 3,
542cb057 1093 .output_opt = TDA18271_OUTPUT_LT_OFF,
3abdedd8
MK		 1094};
1095
1096static struct tda829x_config tda829x_no_probe = {
1097 .probe_tuner = TDA829X_DONT_PROBE,
1098};
1099
6c119ff4
HV		 1100static struct tda10048_config zolid_tda10048_config = {
1101 .demod_address = 0x10 >> 1,
1102 .output_mode = TDA10048_PARALLEL_OUTPUT,
1103 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1104 .inversion = TDA10048_INVERSION_ON,
1105 .dtv6_if_freq_khz = TDA10048_IF_3300,
1106 .dtv7_if_freq_khz = TDA10048_IF_3500,
1107 .dtv8_if_freq_khz = TDA10048_IF_4000,
1108 .clk_freq_khz = TDA10048_CLK_16000,
1109 .disable_gate_access = 1,
1110};
1111
1112static struct tda18271_config zolid_tda18271_config = {
1113 .gate = TDA18271_GATE_ANALOG,
1114};
1115
184e769f
MK		 1116static struct tda10048_config dtv1000s_tda10048_config = {
1117 .demod_address = 0x10 >> 1,
1118 .output_mode = TDA10048_PARALLEL_OUTPUT,
1119 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1120 .inversion = TDA10048_INVERSION_ON,
1121 .dtv6_if_freq_khz = TDA10048_IF_3300,
1122 .dtv7_if_freq_khz = TDA10048_IF_3800,
1123 .dtv8_if_freq_khz = TDA10048_IF_4300,
1124 .clk_freq_khz = TDA10048_CLK_16000,
1125 .disable_gate_access = 1,
1126};
1127
1128static struct tda18271_std_map dtv1000s_tda18271_std_map = {
1129 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
1130 .if_lvl = 1, .rfagc_top = 0x37, },
1131 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
1132 .if_lvl = 1, .rfagc_top = 0x37, },
1133 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
1134 .if_lvl = 1, .rfagc_top = 0x37, },
1135};
1136
1137static struct tda18271_config dtv1000s_tda18271_config = {
1138 .std_map = &dtv1000s_tda18271_std_map,
1139 .gate = TDA18271_GATE_ANALOG,
1140};
1141
ce02704d
TL		 1142static struct lgs8gxx_config prohdtv_pro2_lgs8g75_config = {
1143 .prod = LGS8GXX_PROD_LGS8G75,
1144 .demod_address = 0x1d,
1145 .serial_ts = 0,
1146 .ts_clk_pol = 1,
1147 .ts_clk_gated = 0,
1148 .if_clk_freq = 30400, /* 30.4 MHz */
1149 .if_freq = 4000, /* 4.00 MHz */
1150 .if_neg_center = 0,
1151 .ext_adc = 0,
1152 .adc_signed = 1,
1153 .adc_vpp = 3, /* 2.0 Vpp */
1154 .if_neg_edge = 1,
1155};
1156
1157static struct tda18271_config prohdtv_pro2_tda18271_config = {
1158 .gate = TDA18271_GATE_ANALOG,
1159 .output_opt = TDA18271_OUTPUT_LT_OFF,
1160};
1161
25fa2071
KS		 1162static struct tda18271_std_map kworld_tda18271_std_map = {
1163 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 3,
1164 .if_lvl = 6, .rfagc_top = 0x37 },
1165 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
1166 .if_lvl = 6, .rfagc_top = 0x37 },
1167};
1168
1169static struct tda18271_config kworld_pc150u_tda18271_config = {
1170 .std_map = &kworld_tda18271_std_map,
1171 .gate = TDA18271_GATE_ANALOG,
1172 .output_opt = TDA18271_OUTPUT_LT_OFF,
1173 .config = 3, /* Use tuner callback for AGC */
1174 .rf_cal_on_startup = 1
1175};
1176
1177static struct s5h1411_config kworld_s5h1411_config = {
1178 .output_mode = S5H1411_PARALLEL_OUTPUT,
1179 .gpio = S5H1411_GPIO_OFF,
1180 .qam_if = S5H1411_IF_4000,
1181 .vsb_if = S5H1411_IF_3250,
1182 .inversion = S5H1411_INVERSION_ON,
1183 .status_mode = S5H1411_DEMODLOCKING,
1184 .mpeg_timing =
1185 S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
1186};
1187
1188
58ef4f92
HH		 1189/* ==================================================================
1190 * Core code
1191 */
1da177e4
LT		 1192
1193static int dvb_init(struct saa7134_dev *dev)
1194{
1c4f76ab 1195 int ret;
bc36a686 1196 int attach_xc3028 = 0;
363c35fc
ST		 1197 struct videobuf_dvb_frontend *fe0;
1198
f972e0bd
DB		 1199 /* FIXME: add support for multi-frontend */
1200 mutex_init(&dev->frontends.lock);
7bdf84fc 1201 INIT_LIST_HEAD(&dev->frontends.felist);
f972e0bd
DB		 1202
1203 printk(KERN_INFO "%s() allocating 1 frontend\n", __func__);
f3f741e7
DB		 1204 fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1);
1205 if (!fe0) {
f972e0bd
DB		 1206 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1207 return -ENOMEM;
1208 }
1209
1da177e4
LT		 1210 /* init struct videobuf_dvb */
1211 dev->ts.nr_bufs = 32;
1212 dev->ts.nr_packets = 32*4;
363c35fc
ST		 1213 fe0->dvb.name = dev->name;
1214 videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops,
0705135e 1215 &dev->pci->dev, &dev->slock,
1da177e4
LT		 1216 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1217 V4L2_FIELD_ALTERNATE,
1218 sizeof(struct saa7134_buf),
08bff03e 1219 dev, NULL);
1da177e4
LT		 1220
1221 switch (dev->board) {
1222 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 1223 dprintk("pinnacle 300i dvb setup\n");
363c35fc 1224 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1225 &dev->i2c_adap);
363c35fc
ST		 1226 if (fe0->dvb.frontend) {
1227 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1228 }
1da177e4 1229 break;
a78d0bfa 1230 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1231 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 1232 dprintk("avertv 777 dvb setup\n");
363c35fc 1233 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1234 &dev->i2c_adap);
363c35fc
ST		 1235 if (fe0->dvb.frontend) {
1236 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK		 1237 &dev->i2c_adap, 0x61,
1238 TUNER_PHILIPS_TD1316);
6b3ccab7 1239 }
a78d0bfa 1240 break;
95a2fdb6 1241 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f 1242 dprintk("AverMedia A16D dvb setup\n");
363c35fc 1243 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF		 1244 &avermedia_xc3028_mt352_dev,
1245 &dev->i2c_adap);
95a2fdb6
MCC		 1246 attach_xc3028 = 1;
1247 break;
1da177e4 1248 case SAA7134_BOARD_MD7134:
363c35fc 1249 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1250 &medion_cardbus,
1251 &dev->i2c_adap);
363c35fc
ST		 1252 if (fe0->dvb.frontend) {
1253 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK		 1254 &dev->i2c_adap, medion_cardbus.tuner_address,
1255 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1256 }
1da177e4 1257 break;
86ddd96f 1258 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1259 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1260 &philips_tu1216_60_config,
1261 &dev->i2c_adap);
363c35fc
ST		 1262 if (fe0->dvb.frontend) {
1263 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1264 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1265 }
86ddd96f
MCC		 1266 break;
1267 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1268 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC		 1269 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1270 &tda827x_cfg_0) < 0)
1271 goto dettach_frontend;
86ddd96f 1272 break;
2cf36ac4 1273 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1274 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
e3c6e1aa 1275 case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
363c35fc 1276 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1277 &philips_europa_config,
1278 &dev->i2c_adap);
363c35fc
ST		 1279 if (fe0->dvb.frontend) {
1280 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1281 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1282 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1283 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1284 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1285 }
2cf36ac4 1286 break;
128fe95d
VC		 1287 case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000:
1288 fe0->dvb.frontend = dvb_attach(tda10046_attach,
1289 &technotrend_budget_t3000_config,
1290 &dev->i2c_adap);
1291 if (fe0->dvb.frontend) {
1292 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1293 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1294 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1295 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1296 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1297 }
1298 break;
2cf36ac4 1299 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1300 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1301 &philips_tu1216_61_config,
1302 &dev->i2c_adap);
363c35fc
ST		 1303 if (fe0->dvb.frontend) {
1304 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1305 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1306 }
2cf36ac4 1307 break;
b39423a9 1308 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC		 1309 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1310 &tda827x_cfg_2) < 0)
1311 goto dettach_frontend;
b39423a9 1312 break;
0e316ecf 1313 case SAA7134_BOARD_HAUPPAUGE_HVR1120:
1bc7f51c
MK		 1314 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1315 &hcw_tda10048_config,
1316 &dev->i2c_adap);
1317 if (fe0->dvb.frontend != NULL) {
1318 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1319 &dev->i2c_adap, 0x4b,
1320 &tda829x_no_probe);
1321 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1322 0x60, &dev->i2c_adap,
1323 &hcw_tda18271_config);
1324 }
1325 break;
90e9df7f 1326 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC		 1327 if (configure_tda827x_fe(dev, &philips_tiger_config,
1328 &tda827x_cfg_0) < 0)
1329 goto dettach_frontend;
587d2fd7
HH		 1330 break;
1331 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC		 1332 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1333 &tda827x_cfg_1) < 0)
1334 goto dettach_frontend;
90e9df7f 1335 break;
c6e53daf 1336 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC		 1337 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1338 &tda827x_cfg_1) < 0)
1339 goto dettach_frontend;
c6e53daf 1340 break;
b5f05064 1341 case SAA7134_BOARD_HAUPPAUGE_HVR1150:
3abdedd8
MK		 1342 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1343 &hcw_lgdt3305_config,
1344 &dev->i2c_adap);
1345 if (fe0->dvb.frontend) {
1346 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1347 &dev->i2c_adap, 0x4b,
1348 &tda829x_no_probe);
1349 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1350 0x60, &dev->i2c_adap,
1351 &hcw_tda18271_config);
1352 }
1353 break;
d4b0aba4 1354 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC		 1355 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1356 &tda827x_cfg_0) < 0)
1357 goto dettach_frontend;
d4b0aba4 1358 break;
3d8466ec 1359 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC		 1360 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1361 &tda827x_cfg_0) < 0)
1362 goto dettach_frontend;
3d8466ec 1363 break;
92abe9ee 1364 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC		 1365 if (!use_frontend) { /* terrestrial */
1366 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1367 &tda827x_cfg_0) < 0)
1368 goto dettach_frontend;
7bff4b4d 1369 } else { /* satellite */
363c35fc
ST		 1370 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1371 if (fe0->dvb.frontend) {
1372 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1373 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1374 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
d557dab5 1375 goto dettach_frontend;
1f683cd8 1376 }
363c35fc 1377 if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap,
1f683cd8 1378 0x08, 0, 0) == NULL) {
5823b3a6 1379 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
d557dab5 1380 goto dettach_frontend;
1f683cd8
NS		 1381 }
1382 }
6b3ccab7 1383 }
420f32fe 1384 break;
df42eaf2 1385 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1386 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1387 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1388 &ads_tech_duo_config,
1389 &dev->i2c_adap);
363c35fc
ST		 1390 if (fe0->dvb.frontend) {
1391 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH		 1392 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1393 &ads_duo_cfg) == NULL) {
cf3c34c8 1394 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1395 ads_tech_duo_config.tuner_address);
d557dab5 1396 goto dettach_frontend;
ede2200d 1397 }
bc36ec74
MCC		 1398 } else
1399 wprintk("failed to attach tda10046\n");
df42eaf2 1400 break;
3dfb729f 1401 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC		 1402 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1403 &tda827x_cfg_0) < 0)
1404 goto dettach_frontend;
d95b8942 1405 break;
5eda227f 1406 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1407 if (!use_frontend) { /* terrestrial */
d557dab5
MCC		 1408 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1409 &tda827x_cfg_0) < 0)
1410 goto dettach_frontend;
4b1431ca 1411 } else { /* satellite */
363c35fc 1412 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1413 &flydvbs, &dev->i2c_adap);
363c35fc
ST		 1414 if (fe0->dvb.frontend) {
1415 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH		 1416 u8 dev_id = dev->eedata[2];
1417 u8 data = 0xc4;
1418 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1419
363c35fc 1420 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1421 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1422 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1423 "found !\n", __func__);
d557dab5
MCC		 1424 goto dettach_frontend;
1425 }
5823b3a6
HH		 1426 if (dev_id != 0x08) {
1427 /* we need to open the i2c gate (we know it exists) */
1428 fe->ops.i2c_gate_ctrl(fe, 1);
1429 if (dvb_attach(isl6405_attach, fe,
d557dab5 1430 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH		 1431 wprintk("%s: Medion Quadro, no ISL6405 "
1432 "found !\n", __func__);
d557dab5
MCC		 1433 goto dettach_frontend;
1434 }
e9c1ac9d
HH		 1435 if (dev_id == 0x07) {
1436 /* fire up the 2nd section of the LNB supply since
1437 we can't do this from the other section */
1438 msg.buf = &data;
1439 i2c_transfer(&dev->i2c_adap, &msg, 1);
1440 }
5823b3a6
HH		 1441 fe->ops.i2c_gate_ctrl(fe, 0);
1442 dev->original_set_voltage = fe->ops.set_voltage;
1443 fe->ops.set_voltage = md8800_set_voltage;
1444 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1445 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1446 } else {
1447 fe->ops.set_voltage = md8800_set_voltage2;
1448 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1449 }
4b1431ca
HH		 1450 }
1451 }
5eda227f 1452 break;
3b64e8e2 1453 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1454 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1455 &dev->i2c_adap);
363c35fc
ST		 1456 if (fe0->dvb.frontend)
1457 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1458 NULL, DVB_PLL_TDHU2);
3b64e8e2 1459 break;
f689d908 1460 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1461 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1462 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1463 &dev->i2c_adap);
363c35fc
ST		 1464 if (fe0->dvb.frontend)
1465 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK		 1466 &dev->i2c_adap, 0x61,
1467 TUNER_PHILIPS_TUV1236D);
3e1410ad 1468 break;
25fa2071
KS		 1469 case SAA7134_BOARD_KWORLD_PC150U:
1470 saa7134_set_gpio(dev, 18, 1); /* Switch to digital mode */
1471 saa7134_tuner_callback(dev, 0,
1472 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
1473 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1474 &kworld_s5h1411_config,
1475 &dev->i2c_adap);
1476 if (fe0->dvb.frontend != NULL) {
1477 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1478 &dev->i2c_adap, 0x4b,
1479 &tda829x_no_probe);
1480 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1481 0x60, &dev->i2c_adap,
1482 &kworld_pc150u_tda18271_config);
1483 }
1484 break;
e2ac28fa 1485 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1486 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1487 &dev->i2c_adap);
363c35fc
ST		 1488 if (fe0->dvb.frontend) {
1489 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1490 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1491 wprintk("%s: No tda826x found!\n", __func__);
d557dab5 1492 goto dettach_frontend;
e2ac28fa 1493 }
363c35fc 1494 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
f7b54b10 1495 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1496 wprintk("%s: No ISL6421 found!\n", __func__);
d557dab5 1497 goto dettach_frontend;
e2ac28fa
IL		 1498 }
1499 }
1500 break;
cf146ca4 1501 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1502 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS		 1503 &medion_cardbus,
1504 &dev->i2c_adap);
363c35fc
ST		 1505 if (fe0->dvb.frontend) {
1506 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1507 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1508
363c35fc 1509 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK		 1510 &dev->i2c_adap, medion_cardbus.tuner_address,
1511 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH		 1512 }
1513 break;
cbb94521 1514 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1515 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH		 1516 &philips_europa_config,
1517 &dev->i2c_adap);
363c35fc
ST		 1518 if (fe0->dvb.frontend) {
1519 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1520 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH		 1521 }
1522 break;
550a9a5e 1523 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC		 1524 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1525 &tda827x_cfg_0) < 0)
1526 goto dettach_frontend;
9de271e6
MK		 1527 break;
1528 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC		 1529 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1530 &tda827x_cfg_0) < 0)
1531 goto dettach_frontend;
58ef4f92
HH		 1532 break;
1533 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC		 1534 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1535 &tda827x_cfg_2) < 0)
1536 goto dettach_frontend;
550a9a5e 1537 break;
e06cea4c 1538 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC		 1539 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1540 &tda827x_cfg_2) < 0)
1541 goto dettach_frontend;
e06cea4c 1542 break;
f3eec0c0 1543 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC		 1544 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1545 &tda827x_cfg_2) < 0)
1546 goto dettach_frontend;
e06cea4c 1547 break;
d90d9f5a 1548 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC		 1549 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1550 &tda827x_cfg_0) < 0)
1551 goto dettach_frontend;
d90d9f5a 1552 break;
4ba24373 1553 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC		 1554 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1555 &tda827x_cfg_2_sw42) < 0)
1556 goto dettach_frontend;
4ba24373 1557 break;
6ab465a8 1558 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1559 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1560 &dev->i2c_adap);
363c35fc
ST		 1561 if (fe0->dvb.frontend) {
1562 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1563 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1564 wprintk("%s: No tda826x found!\n", __func__);
d557dab5
MCC		 1565 goto dettach_frontend;
1566 }
363c35fc 1567 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1568 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1569 wprintk("%s: No lnbp21 found!\n", __func__);
d557dab5
MCC		 1570 goto dettach_frontend;
1571 }
6ab465a8
HH		 1572 }
1573 break;
7b5b3f17 1574 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC		 1575 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1576 &tda827x_cfg_0) < 0)
1577 goto dettach_frontend;
7b5b3f17 1578 break;
6a6179b6 1579 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC		 1580 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1581 &tda827x_cfg_2) < 0)
1582 goto dettach_frontend;
6a6179b6 1583 break;
bc36a686 1584 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF		 1585 dprintk("AverMedia E506R dvb setup\n");
1586 saa7134_set_gpio(dev, 25, 0);
1587 msleep(10);
1588 saa7134_set_gpio(dev, 25, 1);
363c35fc 1589 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF		 1590 &avermedia_xc3028_mt352_dev,
1591 &dev->i2c_adap);
bc36a686 1592 attach_xc3028 = 1;
e2fc00c2 1593 break;
637afdb5 1594 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1595 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1596 &sd1878_4m, &dev->i2c_adap);
363c35fc 1597 if (fe0->dvb.frontend) {
637afdb5 1598 struct dvb_frontend *fe;
363c35fc 1599 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1600 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1601 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1602 "found !\n", __func__);
d557dab5
MCC		 1603 goto dettach_frontend;
1604 }
637afdb5 1605 /* we need to open the i2c gate (we know it exists) */
363c35fc 1606 fe = fe0->dvb.frontend;
637afdb5
HH		 1607 fe->ops.i2c_gate_ctrl(fe, 1);
1608 if (dvb_attach(isl6405_attach, fe,
d557dab5 1609 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1610 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1611 "found !\n", __func__);
d557dab5
MCC		 1612 goto dettach_frontend;
1613 }
637afdb5
HH		 1614 fe->ops.i2c_gate_ctrl(fe, 0);
1615 dev->original_set_voltage = fe->ops.set_voltage;
1616 fe->ops.set_voltage = md8800_set_voltage;
1617 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1618 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1619 }
1620 break;
e2fc00c2
MP		 1621 case SAA7134_BOARD_AVERMEDIA_M103:
1622 saa7134_set_gpio(dev, 25, 0);
1623 msleep(10);
1624 saa7134_set_gpio(dev, 25, 1);
363c35fc 1625 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP		 1626 &avermedia_xc3028_mt352_dev,
1627 &dev->i2c_adap);
1628 attach_xc3028 = 1;
1629 break;
301e9d64 1630 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1631 if (!use_frontend) { /* terrestrial */
1632 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1633 &tda827x_cfg_2) < 0)
1634 goto dettach_frontend;
1635 } else { /* satellite */
363c35fc 1636 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1637 &flydvbs, &dev->i2c_adap);
363c35fc 1638 if (fe0->dvb.frontend) {
301e9d64 1639 if (dvb_attach(tda826x_attach,
363c35fc 1640 fe0->dvb.frontend, 0x60,
301e9d64 1641 &dev->i2c_adap, 0) == NULL) {
1642 wprintk("%s: Asus Tiger 3in1, no "
1643 "tda826x found!\n", __func__);
1644 goto dettach_frontend;
1645 }
363c35fc 1646 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1647 &dev->i2c_adap, 0, 0) == NULL) {
1648 wprintk("%s: Asus Tiger 3in1, no lnbp21"
1649 " found!\n", __func__);
1650 goto dettach_frontend;
1651 }
1652 }
1653 }
1654 break;
028165a3
HP		 1655 case SAA7134_BOARD_ASUSTeK_TIGER:
1656 if (configure_tda827x_fe(dev, &philips_tiger_config,
1657 &tda827x_cfg_0) < 0)
1658 goto dettach_frontend;
1659 break;
47aeba5a 1660 case SAA7134_BOARD_BEHOLD_H6:
b0c4be8c 1661 fe0->dvb.frontend = dvb_attach(zl10353_attach,
47aeba5a
DB		 1662 &behold_h6_config,
1663 &dev->i2c_adap);
b0c4be8c
MCC		 1664 if (fe0->dvb.frontend) {
1665 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
47aeba5a 1666 &dev->i2c_adap, 0x61,
4786dd65 1667 TUNER_PHILIPS_FMD1216MEX_MK3);
47aeba5a 1668 }
04574185 1669 break;
2930992c
BILDB		 1670 case SAA7134_BOARD_BEHOLD_X7:
1671 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1672 &behold_x7_config,
1673 &dev->i2c_adap);
1674 if (fe0->dvb.frontend) {
1675 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1676 &dev->i2c_adap, &behold_x7_tunerconfig);
1677 }
1678 break;
0faa2ed5
DB		 1679 case SAA7134_BOARD_BEHOLD_H7:
1680 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1681 &behold_x7_config,
1682 &dev->i2c_adap);
1683 if (fe0->dvb.frontend) {
1684 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1685 &dev->i2c_adap, &behold_x7_tunerconfig);
1686 }
1687 break;
04574185
MS		 1688 case SAA7134_BOARD_AVERMEDIA_A700_PRO:
1689 case SAA7134_BOARD_AVERMEDIA_A700_HYBRID:
1690 /* Zarlink ZL10313 */
1691 fe0->dvb.frontend = dvb_attach(mt312_attach,
1692 &avertv_a700_mt312, &dev->i2c_adap);
1693 if (fe0->dvb.frontend) {
1694 if (dvb_attach(zl10036_attach, fe0->dvb.frontend,
1695 &avertv_a700_tuner, &dev->i2c_adap) == NULL) {
1696 wprintk("%s: No zl10036 found!\n",
1697 __func__);
1698 }
1699 }
ecfcfec8
IL		 1700 break;
1701 case SAA7134_BOARD_VIDEOMATE_S350:
1702 fe0->dvb.frontend = dvb_attach(mt312_attach,
1703 &zl10313_compro_s350_config, &dev->i2c_adap);
1704 if (fe0->dvb.frontend)
1705 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1706 0x60, &dev->i2c_adap) == NULL)
1707 wprintk("%s: No zl10039 found!\n",
1708 __func__);
1709
dbe8740d
CC		 1710 break;
1711 case SAA7134_BOARD_VIDEOMATE_T750:
1712 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1713 &videomate_t750_zl10353_config,
1714 &dev->i2c_adap);
1715 if (fe0->dvb.frontend != NULL) {
1716 if (dvb_attach(qt1010_attach,
1717 fe0->dvb.frontend,
1718 &dev->i2c_adap,
1719 &videomate_t750_qt1010_config) == NULL)
1720 wprintk("error attaching QT1010\n");
1721 }
6c119ff4
HV		 1722 break;
1723 case SAA7134_BOARD_ZOLID_HYBRID_PCI:
1724 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1725 &zolid_tda10048_config,
1726 &dev->i2c_adap);
1727 if (fe0->dvb.frontend != NULL) {
1728 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1729 &dev->i2c_adap, 0x4b,
1730 &tda829x_no_probe);
1731 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1732 0x60, &dev->i2c_adap,
1733 &zolid_tda18271_config);
1734 }
47aeba5a 1735 break;
184e769f
MK		 1736 case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S:
1737 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1738 &dtv1000s_tda10048_config,
1739 &dev->i2c_adap);
1740 if (fe0->dvb.frontend != NULL) {
1741 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1742 &dev->i2c_adap, 0x4b,
1743 &tda829x_no_probe);
1744 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1745 0x60, &dev->i2c_adap,
1746 &dtv1000s_tda18271_config);
1747 }
1748 break;
f0551efc 1749 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG:
ecb71d26
MCC		 1750 /* Switch to digital mode */
1751 saa7134_tuner_callback(dev, 0,
1752 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
f0551efc
MCC		 1753 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1754 &kworld_mb86a20s_config,
1755 &dev->i2c_adap);
f0551efc 1756 if (fe0->dvb.frontend != NULL) {
6a58bc0f
MCC		 1757 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1758 &dev->i2c_adap, 0x4b,
1759 &tda829x_no_probe);
f0551efc
MCC		 1760 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1761 0x60, &dev->i2c_adap,
1762 &kworld_tda18271_config);
6a58bc0f 1763 fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_gate_ctrl;
f0551efc 1764 }
6a58bc0f
MCC		 1765
1766 /* mb86a20s need to use the I2C gateway */
f0551efc 1767 break;
ce02704d
TL		 1768 case SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2:
1769 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1770 &prohdtv_pro2_lgs8g75_config,
1771 &dev->i2c_adap);
1772 if (fe0->dvb.frontend != NULL) {
1773 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1774 &dev->i2c_adap, 0x4b,
1775 &tda829x_no_probe);
1776 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1777 0x60, &dev->i2c_adap,
1778 &prohdtv_pro2_tda18271_config);
1779 }
1780 break;
1da177e4 1781 default:
cf3c34c8 1782 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT		 1783 break;
1784 }
1785
bc36a686
MCC		 1786 if (attach_xc3028) {
1787 struct dvb_frontend *fe;
1788 struct xc2028_config cfg = {
1789 .i2c_adap = &dev->i2c_adap,
1790 .i2c_addr = 0x61,
bc36a686 1791 };
95a2fdb6 1792
363c35fc 1793 if (!fe0->dvb.frontend)
f3f741e7 1794 goto dettach_frontend;
95a2fdb6 1795
363c35fc 1796 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686
MCC		 1797 if (!fe) {
1798 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1799 dev->name);
d557dab5 1800 goto dettach_frontend;
bc36a686
MCC		 1801 }
1802 }
1803
363c35fc 1804 if (NULL == fe0->dvb.frontend) {
cf3c34c8 1805 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
f3f741e7 1806 goto dettach_frontend;
1da177e4 1807 }
d7cba043 1808 /* define general-purpose callback pointer */
363c35fc 1809 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT		 1810
1811 /* register everything else */
363c35fc 1812 ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
9133aee0 1813 &dev->pci->dev, adapter_nr, 0, NULL);
1c4f76ab
HH		 1814
1815 /* this sequence is necessary to make the tda1004x load its firmware
1816 * and to enter analog mode of hybrid boards
1817 */
1818 if (!ret) {
363c35fc
ST		 1819 if (fe0->dvb.frontend->ops.init)
1820 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1821 if (fe0->dvb.frontend->ops.sleep)
1822 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1823 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1824 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH		 1825 }
1826 return ret;
d557dab5
MCC		 1827
1828dettach_frontend:
f3f741e7
DB		 1829 videobuf_dvb_dealloc_frontends(&dev->frontends);
1830 return -EINVAL;
1da177e4
LT		 1831}
1832
1833static int dvb_fini(struct saa7134_dev *dev)
1834{
363c35fc
ST		 1835 struct videobuf_dvb_frontend *fe0;
1836
1837 /* Get the first frontend */
1838 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
1839 if (!fe0)
1840 return -EINVAL;
1841
7f171123
MCC		 1842 /* FIXME: I suspect that this code is bogus, since the entry for
1843 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1844 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1845 */
1846 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1847 struct v4l2_priv_tun_config tda9887_cfg;
1848 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1849
1850 tda9887_cfg.tuner = TUNER_TDA9887;
1851 tda9887_cfg.priv = &on;
1da177e4 1852
1da177e4 1853 /* otherwise we don't detect the tuner on next insmod */
fac6986c 1854 saa_call_all(dev, tuner, s_config, &tda9887_cfg);
5823b3a6 1855 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1856 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH		 1857 /* turn off the 2nd lnb supply */
1858 u8 data = 0x80;
1859 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1860 struct dvb_frontend *fe;
363c35fc 1861 fe = fe0->dvb.frontend;
5823b3a6
HH		 1862 if (fe->ops.i2c_gate_ctrl) {
1863 fe->ops.i2c_gate_ctrl(fe, 1);
1864 i2c_transfer(&dev->i2c_adap, &msg, 1);
1865 fe->ops.i2c_gate_ctrl(fe, 0);
1866 }
1867 }
7f171123 1868 }
f3f741e7 1869 videobuf_dvb_unregister_bus(&dev->frontends);
1da177e4
LT		 1870 return 0;
1871}
1872
1873static struct saa7134_mpeg_ops dvb_ops = {
1874 .type = SAA7134_MPEG_DVB,
1875 .init = dvb_init,
1876 .fini = dvb_fini,
1877};
1878
1879static int __init dvb_register(void)
1880{
1881 return saa7134_ts_register(&dvb_ops);
1882}
1883
1884static void __exit dvb_unregister(void)
1885{
1886 saa7134_ts_unregister(&dvb_ops);
1887}
1888
1889module_init(dvb_register);
1890module_exit(dvb_unregister);
1891
1892/* ------------------------------------------------------------------ */
1893/*
1894 * Local variables:
1895 * c-basic-offset: 8
1896 * End:
1897 */
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