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V4L/DVB (4723): Bugfix: Select the correct cx8802_dev when enumerating by CX88_MPEG_type
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
1da177e4 36
1f10c7af
AQ		 37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
1da177e4 41
e2ac28fa
IL		 42#include "tda10086.h"
43#include "tda826x.h"
44#include "isl6421.h"
1da177e4
LT		 45MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
46MODULE_LICENSE("GPL");
47
48static unsigned int antenna_pwr = 0;
86ddd96f 49
1da177e4
LT		 50module_param(antenna_pwr, int, 0444);
51MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
52
53/* ------------------------------------------------------------------ */
1da177e4
LT		 54static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
55{
56 u32 ok;
57
58 if (!on) {
59 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
60 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
61 return 0;
62 }
63
64 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
65 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
66 udelay(10);
67
68 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
69 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
70 udelay(10);
71 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
72 udelay(10);
73 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
74 printk("%s: %s %s\n", dev->name, __FUNCTION__,
75 ok ? "on" : "off");
76
77 if (!ok)
78 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
79 return ok;
80}
81
82static int mt352_pinnacle_init(struct dvb_frontend* fe)
83{
84 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
85 static u8 reset [] = { RESET, 0x80 };
86 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
87 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
88 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
89 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
90 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
91 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
92 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
93 struct saa7134_dev *dev= fe->dvb->priv;
94
95 printk("%s: %s called\n",dev->name,__FUNCTION__);
96
97 mt352_write(fe, clock_config, sizeof(clock_config));
98 udelay(200);
99 mt352_write(fe, reset, sizeof(reset));
100 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
101 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
102 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
103 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
104
105 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
106 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
107 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 108
1da177e4
LT		 109 return 0;
110}
111
a78d0bfa
JAR		 112static int mt352_aver777_init(struct dvb_frontend* fe)
113{
114 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
115 static u8 reset [] = { RESET, 0x80 };
116 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
117 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
118 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
119
120 mt352_write(fe, clock_config, sizeof(clock_config));
121 udelay(200);
122 mt352_write(fe, reset, sizeof(reset));
123 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
124 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
125 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
126
127 return 0;
128}
129
0463f12c
AQ		 130static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
131 struct dvb_frontend_parameters* params)
1da177e4 132{
df8cf706
HH		 133 u8 off[] = { 0x00, 0xf1};
134 u8 on[] = { 0x00, 0x71};
135 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
136
1da177e4
LT		 137 struct saa7134_dev *dev = fe->dvb->priv;
138 struct v4l2_frequency f;
139
140 /* set frequency (mt2050) */
141 f.tuner = 0;
142 f.type = V4L2_TUNER_DIGITAL_TV;
143 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB		 144 if (fe->ops.i2c_gate_ctrl)
145 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 146 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 147 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 148 msg.buf = on;
dea74869
PB		 149 if (fe->ops.i2c_gate_ctrl)
150 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 151 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT		 152
153 pinnacle_antenna_pwr(dev, antenna_pwr);
154
155 /* mt352 setup */
0463f12c 156 return mt352_pinnacle_init(fe);
1da177e4
LT		 157}
158
bd4956b8 159static int mt352_aver777_tuner_calc_regs(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf, int buf_len)
a78d0bfa 160{
a79ddae9
AQ		 161 if (buf_len < 5)
162 return -EINVAL;
163
164 pllbuf[0] = 0x61;
a78d0bfa
JAR		 165 dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1,
166 params->frequency,
167 params->u.ofdm.bandwidth);
a79ddae9 168 return 5;
a78d0bfa
JAR		 169}
170
1da177e4
LT		 171static struct mt352_config pinnacle_300i = {
172 .demod_address = 0x3c >> 1,
173 .adc_clock = 20333,
174 .if2 = 36150,
175 .no_tuner = 1,
176 .demod_init = mt352_pinnacle_init,
1da177e4 177};
a78d0bfa
JAR		 178
179static struct mt352_config avermedia_777 = {
180 .demod_address = 0xf,
181 .demod_init = mt352_aver777_init,
a78d0bfa 182};
1da177e4
LT		 183
184/* ------------------------------------------------------------------ */
2cf36ac4 185static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
1da177e4
LT		 186{
187 struct saa7134_dev *dev = fe->dvb->priv;
86ddd96f 188 u8 tuner_buf[4];
2cf36ac4 189 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 190 sizeof(tuner_buf) };
191 int tuner_frequency = 0;
192 u8 band, cp, filter;
193
194 /* determine charge pump */
195 tuner_frequency = params->frequency + 36166000;
196 if (tuner_frequency < 87000000)
197 return -EINVAL;
198 else if (tuner_frequency < 130000000)
199 cp = 3;
200 else if (tuner_frequency < 160000000)
201 cp = 5;
202 else if (tuner_frequency < 200000000)
203 cp = 6;
204 else if (tuner_frequency < 290000000)
205 cp = 3;
206 else if (tuner_frequency < 420000000)
207 cp = 5;
208 else if (tuner_frequency < 480000000)
209 cp = 6;
210 else if (tuner_frequency < 620000000)
211 cp = 3;
212 else if (tuner_frequency < 830000000)
213 cp = 5;
214 else if (tuner_frequency < 895000000)
215 cp = 7;
216 else
217 return -EINVAL;
218
219 /* determine band */
220 if (params->frequency < 49000000)
221 return -EINVAL;
222 else if (params->frequency < 161000000)
223 band = 1;
224 else if (params->frequency < 444000000)
225 band = 2;
226 else if (params->frequency < 861000000)
227 band = 4;
228 else
229 return -EINVAL;
230
231 /* setup PLL filter */
232 switch (params->u.ofdm.bandwidth) {
233 case BANDWIDTH_6_MHZ:
234 filter = 0;
235 break;
236
237 case BANDWIDTH_7_MHZ:
238 filter = 0;
239 break;
240
241 case BANDWIDTH_8_MHZ:
242 filter = 1;
243 break;
1da177e4 244
86ddd96f
MCC		 245 default:
246 return -EINVAL;
247 }
248
249 /* calculate divisor
250 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 251 */
86ddd96f
MCC		 252 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
253
254 /* setup tuner buffer */
255 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
256 tuner_buf[1] = tuner_frequency & 0xff;
257 tuner_buf[2] = 0xca;
258 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
259
dea74869
PB		 260 if (fe->ops.i2c_gate_ctrl)
261 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 262 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
263 return -EIO;
2cf36ac4
HH		 264 msleep(1);
265 return 0;
266}
267
268static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
269{
270 struct saa7134_dev *dev = fe->dvb->priv;
271 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
272 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 273
2cf36ac4 274 /* setup PLL configuration */
dea74869
PB		 275 if (fe->ops.i2c_gate_ctrl)
276 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 277 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
278 return -EIO;
86ddd96f 279 msleep(1);
2cf36ac4 280
1da177e4
LT		 281 return 0;
282}
283
2cf36ac4
HH		 284/* ------------------------------------------------------------------ */
285
a79ddae9 286static int philips_tu1216_tuner_60_init(struct dvb_frontend *fe)
2cf36ac4
HH		 287{
288 return philips_tda6651_pll_init(0x60, fe);
289}
290
a79ddae9 291static int philips_tu1216_tuner_60_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH		 292{
293 return philips_tda6651_pll_set(0x60, fe, params);
294}
295
86ddd96f
MCC		 296static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
297 const struct firmware **fw, char *name)
1da177e4
LT		 298{
299 struct saa7134_dev *dev = fe->dvb->priv;
300 return request_firmware(fw, name, &dev->pci->dev);
301}
302
2cf36ac4 303static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 304
305 .demod_address = 0x8,
306 .invert = 1,
2cf36ac4 307 .invert_oclk = 0,
86ddd96f
MCC		 308 .xtal_freq = TDA10046_XTAL_4M,
309 .agc_config = TDA10046_AGC_DEFAULT,
310 .if_freq = TDA10046_FREQ_3617,
86ddd96f
MCC		 311 .request_firmware = philips_tu1216_request_firmware,
312};
313
314/* ------------------------------------------------------------------ */
315
a79ddae9 316static int philips_tu1216_tuner_61_init(struct dvb_frontend *fe)
2cf36ac4
HH		 317{
318 return philips_tda6651_pll_init(0x61, fe);
319}
320
a79ddae9 321static int philips_tu1216_tuner_61_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH		 322{
323 return philips_tda6651_pll_set(0x61, fe, params);
324}
325
326static struct tda1004x_config philips_tu1216_61_config = {
327
328 .demod_address = 0x8,
329 .invert = 1,
330 .invert_oclk = 0,
331 .xtal_freq = TDA10046_XTAL_4M,
332 .agc_config = TDA10046_AGC_DEFAULT,
333 .if_freq = TDA10046_FREQ_3617,
2cf36ac4
HH		 334 .request_firmware = philips_tu1216_request_firmware,
335};
336
337/* ------------------------------------------------------------------ */
338
a79ddae9 339static int philips_europa_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH		 340{
341 struct saa7134_dev *dev = fe->dvb->priv;
342 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
343 struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
344
345 /* setup PLL configuration */
dea74869
PB		 346 if (fe->ops.i2c_gate_ctrl)
347 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 348 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
349 return -EIO;
350 msleep(1);
351
352 /* switch the board to dvb mode */
353 init_msg.addr = 0x43;
354 init_msg.len = 0x02;
355 msg[0] = 0x00;
356 msg[1] = 0x40;
dea74869
PB		 357 if (fe->ops.i2c_gate_ctrl)
358 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 359 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
360 return -EIO;
361
362 return 0;
363}
364
a79ddae9 365static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH		 366{
367 return philips_tda6651_pll_set(0x61, fe, params);
368}
369
a79ddae9 370static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH		 371{
372 struct saa7134_dev *dev = fe->dvb->priv;
373 /* this message actually turns the tuner back to analog mode */
374 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
375 struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
376
377 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
378 msleep(1);
379
380 /* switch the board to analog mode */
381 analog_msg.addr = 0x43;
382 analog_msg.len = 0x02;
383 msg[0] = 0x00;
384 msg[1] = 0x14;
dea74869
PB		 385 if (fe->ops.i2c_gate_ctrl)
386 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 387 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ		 388 return 0;
389}
390
391static int philips_europa_demod_sleep(struct dvb_frontend *fe)
392{
393 struct saa7134_dev *dev = fe->dvb->priv;
394
395 if (dev->original_demod_sleep)
396 dev->original_demod_sleep(fe);
dea74869 397 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 398 return 0;
2cf36ac4
HH		 399}
400
401static struct tda1004x_config philips_europa_config = {
402
403 .demod_address = 0x8,
404 .invert = 0,
405 .invert_oclk = 0,
406 .xtal_freq = TDA10046_XTAL_4M,
407 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
408 .if_freq = TDA10046_FREQ_052,
2cf36ac4
HH		 409 .request_firmware = NULL,
410};
411
412/* ------------------------------------------------------------------ */
86ddd96f 413
a79ddae9 414static int philips_fmd1216_tuner_init(struct dvb_frontend *fe)
86ddd96f
MCC		 415{
416 struct saa7134_dev *dev = fe->dvb->priv;
417 /* this message is to set up ATC and ALC */
418 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
419 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
420
dea74869
PB		 421 if (fe->ops.i2c_gate_ctrl)
422 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 423 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
424 return -EIO;
425 msleep(1);
426
427 return 0;
428}
429
a79ddae9 430static int philips_fmd1216_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC		 431{
432 struct saa7134_dev *dev = fe->dvb->priv;
433 /* this message actually turns the tuner back to analog mode */
434 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
435 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
436
dea74869
PB		 437 if (fe->ops.i2c_gate_ctrl)
438 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 439 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
440 msleep(1);
441 fmd1216_init[2] = 0x86;
442 fmd1216_init[3] = 0x54;
dea74869
PB		 443 if (fe->ops.i2c_gate_ctrl)
444 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 445 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
446 msleep(1);
a79ddae9 447 return 0;
86ddd96f
MCC		 448}
449
a79ddae9 450static int philips_fmd1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC		 451{
452 struct saa7134_dev *dev = fe->dvb->priv;
453 u8 tuner_buf[4];
454 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
455 sizeof(tuner_buf) };
456 int tuner_frequency = 0;
457 int divider = 0;
458 u8 band, mode, cp;
459
460 /* determine charge pump */
461 tuner_frequency = params->frequency + 36130000;
462 if (tuner_frequency < 87000000)
463 return -EINVAL;
464 /* low band */
465 else if (tuner_frequency < 180000000) {
466 band = 1;
467 mode = 7;
468 cp = 0;
469 } else if (tuner_frequency < 195000000) {
470 band = 1;
471 mode = 6;
472 cp = 1;
473 /* mid band */
474 } else if (tuner_frequency < 366000000) {
475 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
476 band = 10;
477 } else {
478 band = 2;
479 }
480 mode = 7;
481 cp = 0;
482 } else if (tuner_frequency < 478000000) {
483 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
484 band = 10;
485 } else {
486 band = 2;
487 }
488 mode = 6;
489 cp = 1;
490 /* high band */
491 } else if (tuner_frequency < 662000000) {
492 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
493 band = 12;
494 } else {
495 band = 4;
496 }
497 mode = 7;
498 cp = 0;
499 } else if (tuner_frequency < 840000000) {
500 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
501 band = 12;
502 } else {
503 band = 4;
504 }
505 mode = 6;
506 cp = 1;
507 } else {
508 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
509 band = 12;
510 } else {
511 band = 4;
512 }
513 mode = 7;
514 cp = 1;
515
516 }
517 /* calculate divisor */
518 /* ((36166000 + Finput) / 166666) rounded! */
519 divider = (tuner_frequency + 83333) / 166667;
520
521 /* setup tuner buffer */
522 tuner_buf[0] = (divider >> 8) & 0x7f;
523 tuner_buf[1] = divider & 0xff;
524 tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
525 tuner_buf[3] = 0x40 | band;
526
dea74869
PB		 527 if (fe->ops.i2c_gate_ctrl)
528 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 529 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
530 return -EIO;
531 return 0;
532}
533
408b664a 534static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 535 .demod_address = 0x08,
536 .invert = 1,
537 .invert_oclk = 0,
538 .xtal_freq = TDA10046_XTAL_16M,
539 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
540 .if_freq = TDA10046_FREQ_3613,
86ddd96f
MCC		 541 .request_firmware = NULL,
542};
543
544/* ------------------------------------------------------------------ */
545
546struct tda827x_data {
547 u32 lomax;
548 u8 spd;
549 u8 bs;
550 u8 bp;
551 u8 cp;
552 u8 gc3;
553 u8 div1p5;
554};
555
556static struct tda827x_data tda827x_dvbt[] = {
557 { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
558 { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
559 { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
560 { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
561 { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
562 { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
563 { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
564 { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
565 { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
566 { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
567 { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
568 { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
569 { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
570 { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
571 { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
572 { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
573 { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
574 { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
575 { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
576 { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
577 { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
578 { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
579 { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
580 { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
581 { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
582 { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
583 { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
584 { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
585 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
586};
587
a79ddae9 588static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
86ddd96f
MCC		 589{
590 return 0;
591}
592
a79ddae9 593static int philips_tda827x_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC		 594{
595 struct saa7134_dev *dev = fe->dvb->priv;
596 u8 tuner_buf[14];
597
598 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
f2421ca3 599 .len = sizeof(tuner_buf) };
86ddd96f
MCC		 600 int i, tuner_freq, if_freq;
601 u32 N;
602 switch (params->u.ofdm.bandwidth) {
603 case BANDWIDTH_6_MHZ:
604 if_freq = 4000000;
605 break;
606 case BANDWIDTH_7_MHZ:
607 if_freq = 4500000;
608 break;
609 default: /* 8 MHz or Auto */
610 if_freq = 5000000;
611 break;
612 }
613 tuner_freq = params->frequency + if_freq;
614
615 i = 0;
616 while (tda827x_dvbt[i].lomax < tuner_freq) {
617 if(tda827x_dvbt[i + 1].lomax == 0)
618 break;
619 i++;
620 }
621
622 N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
623 tuner_buf[0] = 0;
624 tuner_buf[1] = (N>>8) | 0x40;
625 tuner_buf[2] = N & 0xff;
626 tuner_buf[3] = 0;
627 tuner_buf[4] = 0x52;
628 tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
629 (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
630 tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
631 tuner_buf[7] = 0xbf;
632 tuner_buf[8] = 0x2a;
633 tuner_buf[9] = 0x05;
634 tuner_buf[10] = 0xff;
635 tuner_buf[11] = 0x00;
636 tuner_buf[12] = 0x00;
637 tuner_buf[13] = 0x40;
638
639 tuner_msg.len = 14;
dea74869
PB		 640 if (fe->ops.i2c_gate_ctrl)
641 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 642 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
643 return -EIO;
644
645 msleep(500);
646 /* correct CP value */
647 tuner_buf[0] = 0x30;
648 tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
649 tuner_msg.len = 2;
dea74869
PB		 650 if (fe->ops.i2c_gate_ctrl)
651 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 652 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
653
654 return 0;
655}
656
a79ddae9 657static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC		 658{
659 struct saa7134_dev *dev = fe->dvb->priv;
660 static u8 tda827x_sleep[] = { 0x30, 0xd0};
661 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
f2421ca3 662 .len = sizeof(tda827x_sleep) };
dea74869
PB		 663 if (fe->ops.i2c_gate_ctrl)
664 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f 665 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
a79ddae9 666 return 0;
86ddd96f
MCC		 667}
668
669static struct tda1004x_config tda827x_lifeview_config = {
670 .demod_address = 0x08,
671 .invert = 1,
672 .invert_oclk = 0,
673 .xtal_freq = TDA10046_XTAL_16M,
674 .agc_config = TDA10046_AGC_TDA827X,
675 .if_freq = TDA10046_FREQ_045,
86ddd96f 676 .request_firmware = NULL,
1da177e4 677};
90e9df7f
HH		 678
679/* ------------------------------------------------------------------ */
680
681struct tda827xa_data {
682 u32 lomax;
683 u8 svco;
684 u8 spd;
685 u8 scr;
686 u8 sbs;
687 u8 gc3;
688};
689
690static struct tda827xa_data tda827xa_dvbt[] = {
691 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
692 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
693 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
694 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
695 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
696 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
697 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
698 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
699 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
700 { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
701 { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
702 { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
703 { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
704 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
705 { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
706 { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
707 { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
708 { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
709 { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
710 { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
711 { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
712 { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
713 { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
714 { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
715 { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
716 { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
717 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
718
719
720static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
721{
722 struct saa7134_dev *dev = fe->dvb->priv;
723 u8 tuner_buf[14];
724 unsigned char reg2[2];
725
726 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
727 int i, tuner_freq, if_freq;
728 u32 N;
729
730 switch (params->u.ofdm.bandwidth) {
731 case BANDWIDTH_6_MHZ:
732 if_freq = 4000000;
733 break;
734 case BANDWIDTH_7_MHZ:
735 if_freq = 4500000;
736 break;
737 default: /* 8 MHz or Auto */
738 if_freq = 5000000;
739 break;
740 }
741 tuner_freq = params->frequency + if_freq;
742
743 i = 0;
744 while (tda827xa_dvbt[i].lomax < tuner_freq) {
745 if(tda827xa_dvbt[i + 1].lomax == 0)
746 break;
747 i++;
748 }
749
750 N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
751 tuner_buf[0] = 0; // subaddress
752 tuner_buf[1] = N >> 8;
753 tuner_buf[2] = N & 0xff;
754 tuner_buf[3] = 0;
755 tuner_buf[4] = 0x16;
756 tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
757 tda827xa_dvbt[i].sbs;
758 tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
759 tuner_buf[7] = 0x0c;
760 tuner_buf[8] = 0x06;
761 tuner_buf[9] = 0x24;
762 tuner_buf[10] = 0xff;
763 tuner_buf[11] = 0x60;
764 tuner_buf[12] = 0x00;
765 tuner_buf[13] = 0x39; // lpsel
766 msg.len = 14;
dea74869
PB		 767 if (fe->ops.i2c_gate_ctrl)
768 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 769 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
770 return -EIO;
771
772 msg.buf= reg2;
773 msg.len = 2;
774 reg2[0] = 0x60;
775 reg2[1] = 0x3c;
dea74869
PB		 776 if (fe->ops.i2c_gate_ctrl)
777 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 778 i2c_transfer(&dev->i2c_adap, &msg, 1);
779
780 reg2[0] = 0xa0;
781 reg2[1] = 0x40;
dea74869
PB		 782 if (fe->ops.i2c_gate_ctrl)
783 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 784 i2c_transfer(&dev->i2c_adap, &msg, 1);
785
786 msleep(2);
787 /* correct CP value */
788 reg2[0] = 0x30;
789 reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
790 msg.len = 2;
dea74869
PB		 791 if (fe->ops.i2c_gate_ctrl)
792 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 793 i2c_transfer(&dev->i2c_adap, &msg, 1);
794
795 msleep(550);
796 reg2[0] = 0x50;
797 reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
dea74869
PB		 798 if (fe->ops.i2c_gate_ctrl)
799 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 800 i2c_transfer(&dev->i2c_adap, &msg, 1);
801
802 return 0;
803
804}
805
a79ddae9 806static int philips_tda827xa_tuner_sleep(u8 addr, struct dvb_frontend *fe)
90e9df7f
HH		 807{
808 struct saa7134_dev *dev = fe->dvb->priv;
809 static u8 tda827xa_sleep[] = { 0x30, 0x90};
810 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
f1bcef88 811 .len = sizeof(tda827xa_sleep) };
dea74869
PB		 812 if (fe->ops.i2c_gate_ctrl)
813 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f 814 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
a79ddae9 815 return 0;
90e9df7f
HH		 816}
817
818/* ------------------------------------------------------------------ */
819
a79ddae9 820static int philips_tiger_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
90e9df7f
HH		 821{
822 int ret;
823 struct saa7134_dev *dev = fe->dvb->priv;
824 static u8 tda8290_close[] = { 0x21, 0xc0};
825 static u8 tda8290_open[] = { 0x21, 0x80};
826 struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
a79ddae9 827
90e9df7f
HH		 828 /* close tda8290 i2c bridge */
829 tda8290_msg.buf = tda8290_close;
830 ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
831 if (ret != 1)
832 return -EIO;
833 msleep(20);
834 ret = philips_tda827xa_pll_set(0x61, fe, params);
835 if (ret != 0)
836 return ret;
837 /* open tda8290 i2c bridge */
838 tda8290_msg.buf = tda8290_open;
839 i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
840 return ret;
2d6b5f62 841}
90e9df7f 842
a79ddae9 843static int philips_tiger_tuner_init(struct dvb_frontend *fe)
90e9df7f
HH		 844{
845 struct saa7134_dev *dev = fe->dvb->priv;
846 static u8 data[] = { 0x3c, 0x33, 0x6a};
847 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
848
849 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
850 return -EIO;
851 return 0;
852}
853
a79ddae9 854static int philips_tiger_tuner_sleep(struct dvb_frontend *fe)
90e9df7f
HH		 855{
856 struct saa7134_dev *dev = fe->dvb->priv;
857 static u8 data[] = { 0x3c, 0x33, 0x68};
858 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
859
860 i2c_transfer(&dev->i2c_adap, &msg, 1);
a79ddae9
AQ		 861 philips_tda827xa_tuner_sleep( 0x61, fe);
862 return 0;
90e9df7f
HH		 863}
864
865static struct tda1004x_config philips_tiger_config = {
866 .demod_address = 0x08,
867 .invert = 1,
868 .invert_oclk = 0,
869 .xtal_freq = TDA10046_XTAL_16M,
870 .agc_config = TDA10046_AGC_TDA827X,
871 .if_freq = TDA10046_FREQ_045,
90e9df7f
HH		 872 .request_firmware = NULL,
873};
874
df42eaf2
HH		 875/* ------------------------------------------------------------------ */
876
6b14ff9e
HP		 877static int asus_p7131_dual_tuner_init(struct dvb_frontend *fe)
878{
879 struct saa7134_dev *dev = fe->dvb->priv;
880 static u8 data[] = { 0x3c, 0x33, 0x6a};
881 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
882
883 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
884 return -EIO;
885 /* make sure the DVB-T antenna input is set */
886 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0200000);
887 return 0;
888}
889
890static int asus_p7131_dual_tuner_sleep(struct dvb_frontend *fe)
891{
892 struct saa7134_dev *dev = fe->dvb->priv;
893 static u8 data[] = { 0x3c, 0x33, 0x68};
894 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
895
896 i2c_transfer(&dev->i2c_adap, &msg, 1);
897 philips_tda827xa_tuner_sleep( 0x61, fe);
898 /* reset antenna inputs for analog usage */
899 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0200000);
900 return 0;
901}
902
903/* ------------------------------------------------------------------ */
904
a79ddae9 905static int lifeview_trio_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
420f32fe
NS		 906{
907 int ret;
908
909 ret = philips_tda827xa_pll_set(0x60, fe, params);
910 return ret;
911}
912
a79ddae9 913static int lifeview_trio_tuner_sleep(struct dvb_frontend *fe)
420f32fe 914{
a79ddae9 915 philips_tda827xa_tuner_sleep(0x60, fe);
420f32fe
NS		 916 return 0;
917}
918
420f32fe
NS		 919static struct tda1004x_config lifeview_trio_config = {
920 .demod_address = 0x09,
921 .invert = 1,
922 .invert_oclk = 0,
923 .xtal_freq = TDA10046_XTAL_16M,
924 .agc_config = TDA10046_AGC_TDA827X_GPL,
925 .if_freq = TDA10046_FREQ_045,
420f32fe
NS		 926 .request_firmware = NULL,
927};
928
929/* ------------------------------------------------------------------ */
930
a79ddae9 931static int ads_duo_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
df42eaf2
HH		 932{
933 int ret;
934
935 ret = philips_tda827xa_pll_set(0x61, fe, params);
936 return ret;
2d6b5f62 937}
df42eaf2 938
a79ddae9 939static int ads_duo_tuner_init(struct dvb_frontend *fe)
df42eaf2
HH		 940{
941 struct saa7134_dev *dev = fe->dvb->priv;
942 /* route TDA8275a AGC input to the channel decoder */
943 saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x60);
944 return 0;
945}
946
a79ddae9 947static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
df42eaf2
HH		 948{
949 struct saa7134_dev *dev = fe->dvb->priv;
950 /* route TDA8275a AGC input to the analog IF chip*/
951 saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x20);
a79ddae9
AQ		 952 philips_tda827xa_tuner_sleep( 0x61, fe);
953 return 0;
df42eaf2
HH		 954}
955
956static struct tda1004x_config ads_tech_duo_config = {
957 .demod_address = 0x08,
958 .invert = 1,
959 .invert_oclk = 0,
960 .xtal_freq = TDA10046_XTAL_16M,
961 .agc_config = TDA10046_AGC_TDA827X_GPL,
962 .if_freq = TDA10046_FREQ_045,
df42eaf2
HH		 963 .request_firmware = NULL,
964};
965
3dfb729f
PH		 966/* ------------------------------------------------------------------ */
967
a79ddae9 968static int tevion_dvb220rf_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
3dfb729f
PH		 969{
970 int ret;
971 ret = philips_tda827xa_pll_set(0x60, fe, params);
972 return ret;
973}
974
a79ddae9 975static int tevion_dvb220rf_tuner_sleep(struct dvb_frontend *fe)
3dfb729f 976{
a79ddae9 977 philips_tda827xa_tuner_sleep( 0x61, fe);
3dfb729f
PH		 978 return 0;
979}
980
3dfb729f
PH		 981static struct tda1004x_config tevion_dvbt220rf_config = {
982 .demod_address = 0x08,
983 .invert = 1,
984 .invert_oclk = 0,
985 .xtal_freq = TDA10046_XTAL_16M,
986 .agc_config = TDA10046_AGC_TDA827X,
987 .if_freq = TDA10046_FREQ_045,
3dfb729f
PH		 988 .request_firmware = NULL,
989};
990
5eda227f
HH		 991/* ------------------------------------------------------------------ */
992
993static int md8800_dvbt_analog_mode(struct dvb_frontend *fe)
994{
995 struct saa7134_dev *dev = fe->dvb->priv;
996 static u8 data[] = { 0x3c, 0x33, 0x68};
997 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
998
999 i2c_transfer(&dev->i2c_adap, &msg, 1);
1000 philips_tda827xa_tuner_sleep( 0x61, fe);
1001 return 0;
1002}
1003
1004static int md8800_dvbt_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
1005{
1006 int ret;
1007 struct saa7134_dev *dev = fe->dvb->priv;
1008 static u8 tda8290_close[] = { 0x21, 0xc0};
1009 static u8 tda8290_open[] = { 0x21, 0x80};
1010 struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
1011 /* close tda8290 i2c bridge */
1012 tda8290_msg.buf = tda8290_close;
1013 ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
1014 if (ret != 1)
1015 return -EIO;
1016 msleep(20);
1017 ret = philips_tda827xa_pll_set(0x60, fe, params);
1018 if (ret != 0)
1019 return ret;
1020 /* open tda8290 i2c bridge */
1021 tda8290_msg.buf = tda8290_open;
1022 i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
1023 return ret;
1024}
1025
1026static struct tda1004x_config md8800_dvbt_config = {
1027 .demod_address = 0x08,
1028 .invert = 1,
1029 .invert_oclk = 0,
1030 .xtal_freq = TDA10046_XTAL_16M,
1031 .agc_config = TDA10046_AGC_TDA827X,
1032 .if_freq = TDA10046_FREQ_045,
1033 .request_firmware = NULL,
1034};
1035
e2ac28fa
IL		 1036static struct tda10086_config flydvbs = {
1037 .demod_address = 0x0e,
1038 .invert = 0,
1039};
1040
90e9df7f
HH		 1041/* ------------------------------------------------------------------ */
1042
3b64e8e2
MK		 1043static struct nxt200x_config avertvhda180 = {
1044 .demod_address = 0x0a,
3b64e8e2 1045};
3e1410ad 1046
fbc81c07
CM		 1047static int nxt200x_set_pll_input(u8 *buf, int input)
1048{
1049 if (input)
1050 buf[3] |= 0x08;
1051 else
1052 buf[3] &= ~0x08;
1053 return 0;
1054}
1055
3e1410ad
AB		 1056static struct nxt200x_config kworldatsc110 = {
1057 .demod_address = 0x0a,
fbc81c07 1058 .set_pll_input = nxt200x_set_pll_input,
3e1410ad 1059};
3b64e8e2 1060
1da177e4
LT		 1061/* ------------------------------------------------------------------ */
1062
1063static int dvb_init(struct saa7134_dev *dev)
1064{
1065 /* init struct videobuf_dvb */
1066 dev->ts.nr_bufs = 32;
1067 dev->ts.nr_packets = 32*4;
1068 dev->dvb.name = dev->name;
1069 videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
1070 dev->pci, &dev->slock,
1071 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1072 V4L2_FIELD_ALTERNATE,
1073 sizeof(struct saa7134_buf),
1074 dev);
1075
1076 switch (dev->board) {
1077 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1078 printk("%s: pinnacle 300i dvb setup\n",dev->name);
2bfe031d 1079 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1080 &dev->i2c_adap);
6b3ccab7 1081 if (dev->dvb.frontend) {
dea74869 1082 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1083 }
1da177e4 1084 break;
a78d0bfa 1085 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1086 case SAA7134_BOARD_AVERMEDIA_A16AR:
a78d0bfa 1087 printk("%s: avertv 777 dvb setup\n",dev->name);
2bfe031d 1088 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1089 &dev->i2c_adap);
6b3ccab7 1090 if (dev->dvb.frontend) {
dea74869 1091 dev->dvb.frontend->ops.tuner_ops.calc_regs = mt352_aver777_tuner_calc_regs;
6b3ccab7 1092 }
a78d0bfa 1093 break;
1da177e4 1094 case SAA7134_BOARD_MD7134:
f7b54b10
MK		 1095 dev->dvb.frontend = dvb_attach(tda10046_attach,
1096 &medion_cardbus,
1097 &dev->i2c_adap);
6b3ccab7 1098 if (dev->dvb.frontend) {
dea74869
PB		 1099 dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init;
1100 dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep;
1101 dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params;
6b3ccab7 1102 }
1da177e4 1103 break;
86ddd96f 1104 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK		 1105 dev->dvb.frontend = dvb_attach(tda10046_attach,
1106 &philips_tu1216_60_config,
1107 &dev->i2c_adap);
6b3ccab7 1108 if (dev->dvb.frontend) {
dea74869
PB		 1109 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_tuner_60_init;
1110 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tu1216_tuner_60_set_params;
6b3ccab7 1111 }
86ddd96f
MCC		 1112 break;
1113 case SAA7134_BOARD_FLYDVBTDUO:
f7b54b10
MK		 1114 dev->dvb.frontend = dvb_attach(tda10046_attach,
1115 &tda827x_lifeview_config,
1116 &dev->i2c_adap);
6b3ccab7 1117 if (dev->dvb.frontend) {
dea74869
PB		 1118 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1119 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1120 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1121 }
86ddd96f 1122 break;
10b7a903 1123 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
f7b54b10
MK		 1124 dev->dvb.frontend = dvb_attach(tda10046_attach,
1125 &tda827x_lifeview_config,
1126 &dev->i2c_adap);
6b3ccab7 1127 if (dev->dvb.frontend) {
dea74869
PB		 1128 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1129 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1130 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1131 }
86ddd96f 1132 break;
2cf36ac4 1133 case SAA7134_BOARD_PHILIPS_EUROPA:
f7b54b10
MK		 1134 dev->dvb.frontend = dvb_attach(tda10046_attach,
1135 &philips_europa_config,
1136 &dev->i2c_adap);
6b3ccab7 1137 if (dev->dvb.frontend) {
dea74869
PB		 1138 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1139 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1140 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1141 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1142 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1143 }
2cf36ac4
HH		 1144 break;
1145 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK		 1146 dev->dvb.frontend = dvb_attach(tda10046_attach,
1147 &philips_europa_config,
1148 &dev->i2c_adap);
6b3ccab7 1149 if (dev->dvb.frontend) {
588f9831
HH		 1150 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1151 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB		 1152 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1153 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1154 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1155 }
2cf36ac4
HH		 1156 break;
1157 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK		 1158 dev->dvb.frontend = dvb_attach(tda10046_attach,
1159 &philips_tu1216_61_config,
1160 &dev->i2c_adap);
6b3ccab7 1161 if (dev->dvb.frontend) {
dea74869
PB		 1162 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_tuner_61_init;
1163 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tu1216_tuner_61_set_params;
6b3ccab7 1164 }
2cf36ac4 1165 break;
90e9df7f 1166 case SAA7134_BOARD_PHILIPS_TIGER:
f7b54b10
MK		 1167 dev->dvb.frontend = dvb_attach(tda10046_attach,
1168 &philips_tiger_config,
1169 &dev->i2c_adap);
6b3ccab7 1170 if (dev->dvb.frontend) {
dea74869
PB		 1171 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1172 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tiger_tuner_sleep;
1173 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
6b3ccab7 1174 }
90e9df7f 1175 break;
d4b0aba4 1176 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
f7b54b10
MK		 1177 dev->dvb.frontend = dvb_attach(tda10046_attach,
1178 &philips_tiger_config,
1179 &dev->i2c_adap);
6b3ccab7 1180 if (dev->dvb.frontend) {
6b14ff9e
HP		 1181 dev->dvb.frontend->ops.tuner_ops.init = asus_p7131_dual_tuner_init;
1182 dev->dvb.frontend->ops.tuner_ops.sleep = asus_p7131_dual_tuner_sleep;
dea74869 1183 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
6b3ccab7 1184 }
d4b0aba4 1185 break;
3d8466ec 1186 case SAA7134_BOARD_FLYDVBT_LR301:
f7b54b10
MK		 1187 dev->dvb.frontend = dvb_attach(tda10046_attach,
1188 &tda827x_lifeview_config,
1189 &dev->i2c_adap);
6b3ccab7 1190 if (dev->dvb.frontend) {
dea74869
PB		 1191 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1192 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1193 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1194 }
3d8466ec 1195 break;
420f32fe 1196 case SAA7134_BOARD_FLYDVB_TRIO:
f7b54b10
MK		 1197 dev->dvb.frontend = dvb_attach(tda10046_attach,
1198 &lifeview_trio_config,
1199 &dev->i2c_adap);
6b3ccab7 1200 if (dev->dvb.frontend) {
dea74869
PB		 1201 dev->dvb.frontend->ops.tuner_ops.sleep = lifeview_trio_tuner_sleep;
1202 dev->dvb.frontend->ops.tuner_ops.set_params = lifeview_trio_tuner_set_params;
6b3ccab7 1203 }
420f32fe 1204 break;
df42eaf2 1205 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
f7b54b10
MK		 1206 dev->dvb.frontend = dvb_attach(tda10046_attach,
1207 &ads_tech_duo_config,
1208 &dev->i2c_adap);
6b3ccab7 1209 if (dev->dvb.frontend) {
dea74869
PB		 1210 dev->dvb.frontend->ops.tuner_ops.init = ads_duo_tuner_init;
1211 dev->dvb.frontend->ops.tuner_ops.sleep = ads_duo_tuner_sleep;
1212 dev->dvb.frontend->ops.tuner_ops.set_params = ads_duo_tuner_set_params;
6b3ccab7 1213 }
df42eaf2 1214 break;
3dfb729f 1215 case SAA7134_BOARD_TEVION_DVBT_220RF:
f7b54b10
MK		 1216 dev->dvb.frontend = dvb_attach(tda10046_attach,
1217 &tevion_dvbt220rf_config,
1218 &dev->i2c_adap);
6b3ccab7 1219 if (dev->dvb.frontend) {
dea74869
PB		 1220 dev->dvb.frontend->ops.tuner_ops.sleep = tevion_dvb220rf_tuner_sleep;
1221 dev->dvb.frontend->ops.tuner_ops.set_params = tevion_dvb220rf_tuner_set_params;
6b3ccab7 1222 }
3dfb729f 1223 break;
d95b8942 1224 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK		 1225 dev->dvb.frontend = dvb_attach(tda10046_attach,
1226 &ads_tech_duo_config,
1227 &dev->i2c_adap);
6b3ccab7 1228 if (dev->dvb.frontend) {
dea74869
PB		 1229 dev->dvb.frontend->ops.tuner_ops.init = ads_duo_tuner_init;
1230 dev->dvb.frontend->ops.tuner_ops.sleep = ads_duo_tuner_sleep;
1231 dev->dvb.frontend->ops.tuner_ops.set_params = ads_duo_tuner_set_params;
6b3ccab7 1232 }
d95b8942 1233 break;
5eda227f
HH		 1234 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
1235 dev->dvb.frontend = tda10046_attach(&md8800_dvbt_config,
1236 &dev->i2c_adap);
1237 if (dev->dvb.frontend) {
1238 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1239 dev->dvb.frontend->ops.tuner_ops.sleep = md8800_dvbt_analog_mode;
1240 dev->dvb.frontend->ops.tuner_ops.set_params = md8800_dvbt_pll_set;
1241 }
1242 break;
3b64e8e2 1243 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK		 1244 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
1245 &dev->i2c_adap);
a79ddae9 1246 if (dev->dvb.frontend) {
4ad8eee5
MK		 1247 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
1248 NULL, &dvb_pll_tdhu2);
a79ddae9 1249 }
3b64e8e2 1250 break;
3e1410ad 1251 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK		 1252 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
1253 &dev->i2c_adap);
a79ddae9 1254 if (dev->dvb.frontend) {
4ad8eee5
MK		 1255 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
1256 NULL, &dvb_pll_tuv1236d);
a79ddae9 1257 }
3e1410ad 1258 break;
e2ac28fa 1259 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK		 1260 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1261 &dev->i2c_adap);
e2ac28fa 1262 if (dev->dvb.frontend) {
f7b54b10
MK		 1263 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1264 &dev->i2c_adap, 0) == NULL) {
e2ac28fa
IL		 1265 printk("%s: No tda826x found!\n", __FUNCTION__);
1266 }
f7b54b10
MK		 1267 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1268 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
e2ac28fa
IL		 1269 printk("%s: No ISL6421 found!\n", __FUNCTION__);
1270 }
1271 }
1272 break;
cf146ca4
HH		 1273 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
1274 dev->dvb.frontend = tda10046_attach(&medion_cardbus,
1275 &dev->i2c_adap);
1276 if (dev->dvb.frontend) {
1277 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1278 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1279 dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init;
1280 dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep;
1281 dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params;
1282 }
1283 break;
1284
1da177e4
LT		 1285 default:
1286 printk("%s: Huh? unknown DVB card?\n",dev->name);
1287 break;
1288 }
1289
1290 if (NULL == dev->dvb.frontend) {
1291 printk("%s: frontend initialization failed\n",dev->name);
1292 return -1;
1293 }
1294
1295 /* register everything else */
d09dbf92 1296 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
1da177e4
LT		 1297}
1298
1299static int dvb_fini(struct saa7134_dev *dev)
1300{
1301 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1302
1da177e4
LT		 1303 switch (dev->board) {
1304 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1305 /* otherwise we don't detect the tuner on next insmod */
1306 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
1307 break;
1308 };
1309 videobuf_dvb_unregister(&dev->dvb);
1310 return 0;
1311}
1312
1313static struct saa7134_mpeg_ops dvb_ops = {
1314 .type = SAA7134_MPEG_DVB,
1315 .init = dvb_init,
1316 .fini = dvb_fini,
1317};
1318
1319static int __init dvb_register(void)
1320{
1321 return saa7134_ts_register(&dvb_ops);
1322}
1323
1324static void __exit dvb_unregister(void)
1325{
1326 saa7134_ts_unregister(&dvb_ops);
1327}
1328
1329module_init(dvb_register);
1330module_exit(dvb_unregister);
1331
1332/* ------------------------------------------------------------------ */
1333/*
1334 * Local variables:
1335 * c-basic-offset: 8
1336 * End:
1337 */
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