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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
1da177e4 LT |
27 | #include <linux/delay.h> |
28 | #include <linux/kthread.h> | |
29 | #include <linux/suspend.h> | |
30 | ||
31 | #include "saa7134-reg.h" | |
32 | #include "saa7134.h" | |
5e453dc7 | 33 | #include <media/v4l2-common.h> |
a78d0bfa | 34 | #include "dvb-pll.h" |
5823b3a6 | 35 | #include <dvb_frontend.h> |
1da177e4 | 36 | |
1f10c7af AQ |
37 | #include "mt352.h" |
38 | #include "mt352_priv.h" /* FIXME */ | |
39 | #include "tda1004x.h" | |
40 | #include "nxt200x.h" | |
bc36a686 | 41 | #include "tuner-xc2028.h" |
2930992c | 42 | #include "xc5000.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
cb89cd33 | 50 | #include "tuner-simple.h" |
1bc7f51c | 51 | #include "tda10048.h" |
3abdedd8 MK |
52 | #include "tda18271.h" |
53 | #include "lgdt3305.h" | |
54 | #include "tda8290.h" | |
f0551efc | 55 | #include "mb86a20s.h" |
ce02704d | 56 | #include "lgs8gxx.h" |
8ce47dad | 57 | |
47aeba5a | 58 | #include "zl10353.h" |
dbe8740d | 59 | #include "qt1010.h" |
47aeba5a | 60 | |
04574185 | 61 | #include "zl10036.h" |
ecfcfec8 | 62 | #include "zl10039.h" |
04574185 MS |
63 | #include "mt312.h" |
64 | ||
1da177e4 LT |
65 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
66 | MODULE_LICENSE("GPL"); | |
67 | ||
ff699e6b | 68 | static unsigned int antenna_pwr; |
86ddd96f | 69 | |
1da177e4 LT |
70 | module_param(antenna_pwr, int, 0444); |
71 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
72 | ||
ff699e6b | 73 | static int use_frontend; |
b331daa0 SB |
74 | module_param(use_frontend, int, 0644); |
75 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 76 | |
ff699e6b | 77 | static int debug; |
58ef4f92 HH |
78 | module_param(debug, int, 0644); |
79 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
80 | ||
78e92006 JG |
81 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
82 | ||
cf3c34c8 TP |
83 | #define dprintk(fmt, arg...) do { if (debug) \ |
84 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
85 | ||
86 | /* Print a warning */ | |
87 | #define wprintk(fmt, arg...) \ | |
88 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
89 | |
90 | /* ------------------------------------------------------------------ | |
91 | * mt352 based DVB-T cards | |
92 | */ | |
93 | ||
1da177e4 LT |
94 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
95 | { | |
96 | u32 ok; | |
97 | ||
98 | if (!on) { | |
99 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
100 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
101 | return 0; | |
102 | } | |
103 | ||
104 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
105 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
106 | udelay(10); | |
107 | ||
108 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
109 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
110 | udelay(10); | |
111 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
112 | udelay(10); | |
113 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 114 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
115 | |
116 | if (!ok) | |
117 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
118 | return ok; | |
119 | } | |
120 | ||
121 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
122 | { | |
123 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
124 | static u8 reset [] = { RESET, 0x80 }; | |
125 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
126 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
127 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
128 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
129 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
130 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
131 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
132 | struct saa7134_dev *dev= fe->dvb->priv; | |
133 | ||
5823b3a6 | 134 | dprintk("%s called\n", __func__); |
1da177e4 LT |
135 | |
136 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
137 | udelay(200); | |
138 | mt352_write(fe, reset, sizeof(reset)); | |
139 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
140 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
141 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
142 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
143 | ||
144 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
145 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
146 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 147 | |
1da177e4 LT |
148 | return 0; |
149 | } | |
150 | ||
a78d0bfa JAR |
151 | static int mt352_aver777_init(struct dvb_frontend* fe) |
152 | { | |
153 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
154 | static u8 reset [] = { RESET, 0x80 }; | |
155 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
156 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
157 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
158 | ||
159 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
160 | udelay(200); | |
161 | mt352_write(fe, reset, sizeof(reset)); | |
162 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
163 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
164 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
165 | ||
166 | return 0; | |
167 | } | |
168 | ||
6e501a3f | 169 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
95a2fdb6 | 170 | { |
6e501a3f TF |
171 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
172 | static u8 reset [] = { RESET, 0x80 }; | |
173 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
174 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; | |
95a2fdb6 MCC |
175 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
176 | ||
177 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
178 | udelay(200); | |
179 | mt352_write(fe, reset, sizeof(reset)); | |
180 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
181 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
182 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
95a2fdb6 MCC |
183 | return 0; |
184 | } | |
185 | ||
14d24d14 | 186 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 187 | { |
b09cf61d | 188 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
df8cf706 HH |
189 | u8 off[] = { 0x00, 0xf1}; |
190 | u8 on[] = { 0x00, 0x71}; | |
191 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
192 | ||
1da177e4 LT |
193 | struct saa7134_dev *dev = fe->dvb->priv; |
194 | struct v4l2_frequency f; | |
195 | ||
196 | /* set frequency (mt2050) */ | |
197 | f.tuner = 0; | |
198 | f.type = V4L2_TUNER_DIGITAL_TV; | |
b09cf61d | 199 | f.frequency = c->frequency / 1000 * 16 / 1000; |
dea74869 PB |
200 | if (fe->ops.i2c_gate_ctrl) |
201 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 202 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
fac6986c | 203 | saa_call_all(dev, tuner, s_frequency, &f); |
df8cf706 | 204 | msg.buf = on; |
dea74869 PB |
205 | if (fe->ops.i2c_gate_ctrl) |
206 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 207 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
208 | |
209 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
210 | ||
211 | /* mt352 setup */ | |
0463f12c | 212 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
213 | } |
214 | ||
215 | static struct mt352_config pinnacle_300i = { | |
216 | .demod_address = 0x3c >> 1, | |
217 | .adc_clock = 20333, | |
218 | .if2 = 36150, | |
219 | .no_tuner = 1, | |
220 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 221 | }; |
a78d0bfa JAR |
222 | |
223 | static struct mt352_config avermedia_777 = { | |
224 | .demod_address = 0xf, | |
225 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 226 | }; |
1da177e4 | 227 | |
6e501a3f | 228 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
bc36a686 MCC |
229 | .demod_address = (0x1e >> 1), |
230 | .no_tuner = 1, | |
6e501a3f | 231 | .demod_init = mt352_avermedia_xc3028_init, |
bc36a686 MCC |
232 | }; |
233 | ||
f0551efc MCC |
234 | static struct tda18271_std_map mb86a20s_tda18271_std_map = { |
235 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
236 | .if_lvl = 7, .rfagc_top = 0x37, }, | |
237 | }; | |
238 | ||
239 | static struct tda18271_config kworld_tda18271_config = { | |
240 | .std_map = &mb86a20s_tda18271_std_map, | |
6a58bc0f | 241 | .gate = TDA18271_GATE_DIGITAL, |
ecb71d26 MCC |
242 | .config = 3, /* Use tuner callback for AGC */ |
243 | ||
f0551efc MCC |
244 | }; |
245 | ||
246 | static const struct mb86a20s_config kworld_mb86a20s_config = { | |
247 | .demod_address = 0x10, | |
248 | }; | |
249 | ||
6a58bc0f MCC |
250 | static int kworld_sbtvd_gate_ctrl(struct dvb_frontend* fe, int enable) |
251 | { | |
252 | struct saa7134_dev *dev = fe->dvb->priv; | |
253 | ||
254 | unsigned char initmsg[] = {0x45, 0x97}; | |
255 | unsigned char msg_enable[] = {0x45, 0xc1}; | |
256 | unsigned char msg_disable[] = {0x45, 0x81}; | |
257 | struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2}; | |
258 | ||
259 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) { | |
260 | wprintk("could not access the I2C gate\n"); | |
261 | return -EIO; | |
262 | } | |
263 | if (enable) | |
264 | msg.buf = msg_enable; | |
265 | else | |
266 | msg.buf = msg_disable; | |
267 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) { | |
268 | wprintk("could not access the I2C gate\n"); | |
269 | return -EIO; | |
270 | } | |
271 | msleep(20); | |
272 | return 0; | |
273 | } | |
274 | ||
58ef4f92 HH |
275 | /* ================================================================== |
276 | * tda1004x based DVB-T cards, helper functions | |
277 | */ | |
278 | ||
279 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
280 | const struct firmware **fw, char *name) | |
1da177e4 LT |
281 | { |
282 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
283 | return request_firmware(fw, name, &dev->pci->dev); |
284 | } | |
285 | ||
58ef4f92 HH |
286 | /* ------------------------------------------------------------------ |
287 | * these tuners are tu1216, td1316(a) | |
288 | */ | |
289 | ||
14d24d14 | 290 | static int philips_tda6651_pll_set(struct dvb_frontend *fe) |
58ef4f92 | 291 | { |
b09cf61d | 292 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
58ef4f92 HH |
293 | struct saa7134_dev *dev = fe->dvb->priv; |
294 | struct tda1004x_state *state = fe->demodulator_priv; | |
295 | u8 addr = state->config->tuner_address; | |
86ddd96f | 296 | u8 tuner_buf[4]; |
2cf36ac4 | 297 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
298 | sizeof(tuner_buf) }; |
299 | int tuner_frequency = 0; | |
300 | u8 band, cp, filter; | |
301 | ||
302 | /* determine charge pump */ | |
b09cf61d | 303 | tuner_frequency = c->frequency + 36166000; |
86ddd96f MCC |
304 | if (tuner_frequency < 87000000) |
305 | return -EINVAL; | |
306 | else if (tuner_frequency < 130000000) | |
307 | cp = 3; | |
308 | else if (tuner_frequency < 160000000) | |
309 | cp = 5; | |
310 | else if (tuner_frequency < 200000000) | |
311 | cp = 6; | |
312 | else if (tuner_frequency < 290000000) | |
313 | cp = 3; | |
314 | else if (tuner_frequency < 420000000) | |
315 | cp = 5; | |
316 | else if (tuner_frequency < 480000000) | |
317 | cp = 6; | |
318 | else if (tuner_frequency < 620000000) | |
319 | cp = 3; | |
320 | else if (tuner_frequency < 830000000) | |
321 | cp = 5; | |
322 | else if (tuner_frequency < 895000000) | |
323 | cp = 7; | |
324 | else | |
325 | return -EINVAL; | |
326 | ||
327 | /* determine band */ | |
b09cf61d | 328 | if (c->frequency < 49000000) |
86ddd96f | 329 | return -EINVAL; |
b09cf61d | 330 | else if (c->frequency < 161000000) |
86ddd96f | 331 | band = 1; |
b09cf61d | 332 | else if (c->frequency < 444000000) |
86ddd96f | 333 | band = 2; |
b09cf61d | 334 | else if (c->frequency < 861000000) |
86ddd96f MCC |
335 | band = 4; |
336 | else | |
337 | return -EINVAL; | |
338 | ||
339 | /* setup PLL filter */ | |
b09cf61d MCC |
340 | switch (c->bandwidth_hz) { |
341 | case 6000000: | |
86ddd96f MCC |
342 | filter = 0; |
343 | break; | |
344 | ||
b09cf61d | 345 | case 7000000: |
86ddd96f MCC |
346 | filter = 0; |
347 | break; | |
348 | ||
b09cf61d | 349 | case 8000000: |
86ddd96f MCC |
350 | filter = 1; |
351 | break; | |
1da177e4 | 352 | |
86ddd96f MCC |
353 | default: |
354 | return -EINVAL; | |
355 | } | |
356 | ||
357 | /* calculate divisor | |
358 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 359 | */ |
b09cf61d | 360 | tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000; |
86ddd96f MCC |
361 | |
362 | /* setup tuner buffer */ | |
363 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
364 | tuner_buf[1] = tuner_frequency & 0xff; | |
365 | tuner_buf[2] = 0xca; | |
366 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
367 | ||
dea74869 PB |
368 | if (fe->ops.i2c_gate_ctrl) |
369 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 370 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
371 | wprintk("could not write to tuner at addr: 0x%02x\n", |
372 | addr << 1); | |
86ddd96f | 373 | return -EIO; |
58ef4f92 | 374 | } |
2cf36ac4 HH |
375 | msleep(1); |
376 | return 0; | |
377 | } | |
378 | ||
58ef4f92 | 379 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
380 | { |
381 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
382 | struct tda1004x_state *state = fe->demodulator_priv; |
383 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
384 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
385 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 386 | |
2cf36ac4 | 387 | /* setup PLL configuration */ |
dea74869 PB |
388 | if (fe->ops.i2c_gate_ctrl) |
389 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
390 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
391 | return -EIO; | |
86ddd96f | 392 | msleep(1); |
2cf36ac4 | 393 | |
1da177e4 LT |
394 | return 0; |
395 | } | |
396 | ||
2cf36ac4 HH |
397 | /* ------------------------------------------------------------------ */ |
398 | ||
2cf36ac4 | 399 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
400 | .demod_address = 0x8, |
401 | .invert = 1, | |
2cf36ac4 | 402 | .invert_oclk = 0, |
86ddd96f MCC |
403 | .xtal_freq = TDA10046_XTAL_4M, |
404 | .agc_config = TDA10046_AGC_DEFAULT, | |
405 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
406 | .tuner_address = 0x60, |
407 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
408 | }; |
409 | ||
2cf36ac4 HH |
410 | static struct tda1004x_config philips_tu1216_61_config = { |
411 | ||
412 | .demod_address = 0x8, | |
413 | .invert = 1, | |
414 | .invert_oclk = 0, | |
415 | .xtal_freq = TDA10046_XTAL_4M, | |
416 | .agc_config = TDA10046_AGC_DEFAULT, | |
417 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
418 | .tuner_address = 0x61, |
419 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
420 | }; |
421 | ||
422 | /* ------------------------------------------------------------------ */ | |
423 | ||
cbb94521 | 424 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
425 | { |
426 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
427 | struct tda1004x_state *state = fe->demodulator_priv; |
428 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 429 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 430 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
431 | |
432 | /* setup PLL configuration */ | |
dea74869 PB |
433 | if (fe->ops.i2c_gate_ctrl) |
434 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
435 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
436 | return -EIO; | |
2cf36ac4 HH |
437 | return 0; |
438 | } | |
439 | ||
14d24d14 | 440 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe) |
2cf36ac4 | 441 | { |
14d24d14 | 442 | return philips_tda6651_pll_set(fe); |
58ef4f92 HH |
443 | } |
444 | ||
445 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
446 | { | |
447 | struct saa7134_dev *dev = fe->dvb->priv; | |
448 | struct tda1004x_state *state = fe->demodulator_priv; | |
449 | u8 addr = state->config->tuner_address; | |
450 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
451 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
452 | ||
453 | /* switch the tuner to analog mode */ | |
454 | if (fe->ops.i2c_gate_ctrl) | |
455 | fe->ops.i2c_gate_ctrl(fe, 1); | |
456 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
457 | return -EIO; | |
458 | return 0; | |
2cf36ac4 HH |
459 | } |
460 | ||
58ef4f92 HH |
461 | /* ------------------------------------------------------------------ */ |
462 | ||
cbb94521 HH |
463 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
464 | { | |
465 | struct saa7134_dev *dev = fe->dvb->priv; | |
466 | static u8 msg[] = { 0x00, 0x40}; | |
467 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
468 | ||
469 | ||
470 | if (philips_td1316_tuner_init(fe)) | |
471 | return -EIO; | |
472 | msleep(1); | |
473 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
474 | return -EIO; | |
475 | ||
476 | return 0; | |
477 | } | |
478 | ||
a79ddae9 | 479 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
480 | { |
481 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 482 | |
58ef4f92 HH |
483 | static u8 msg[] = { 0x00, 0x14 }; |
484 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
485 | ||
486 | if (philips_td1316_tuner_sleep(fe)) | |
487 | return -EIO; | |
2cf36ac4 HH |
488 | |
489 | /* switch the board to analog mode */ | |
dea74869 PB |
490 | if (fe->ops.i2c_gate_ctrl) |
491 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 492 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
493 | return 0; |
494 | } | |
495 | ||
496 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
497 | { | |
498 | struct saa7134_dev *dev = fe->dvb->priv; | |
499 | ||
500 | if (dev->original_demod_sleep) | |
501 | dev->original_demod_sleep(fe); | |
dea74869 | 502 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 503 | return 0; |
2cf36ac4 HH |
504 | } |
505 | ||
506 | static struct tda1004x_config philips_europa_config = { | |
507 | ||
508 | .demod_address = 0x8, | |
509 | .invert = 0, | |
510 | .invert_oclk = 0, | |
511 | .xtal_freq = TDA10046_XTAL_4M, | |
512 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
513 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
514 | .tuner_address = 0x61, |
515 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
516 | }; |
517 | ||
408b664a | 518 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
519 | .demod_address = 0x08, |
520 | .invert = 1, | |
521 | .invert_oclk = 0, | |
522 | .xtal_freq = TDA10046_XTAL_16M, | |
523 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
524 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
525 | .tuner_address = 0x61, |
526 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
527 | }; |
528 | ||
128fe95d VC |
529 | static struct tda1004x_config technotrend_budget_t3000_config = { |
530 | .demod_address = 0x8, | |
531 | .invert = 1, | |
532 | .invert_oclk = 0, | |
533 | .xtal_freq = TDA10046_XTAL_4M, | |
534 | .agc_config = TDA10046_AGC_DEFAULT, | |
535 | .if_freq = TDA10046_FREQ_3617, | |
536 | .tuner_address = 0x63, | |
537 | .request_firmware = philips_tda1004x_request_firmware | |
538 | }; | |
539 | ||
58ef4f92 HH |
540 | /* ------------------------------------------------------------------ |
541 | * tda 1004x based cards with philips silicon tuner | |
542 | */ | |
543 | ||
58ef4f92 HH |
544 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
545 | { | |
58ef4f92 HH |
546 | struct tda1004x_state *state = fe->demodulator_priv; |
547 | ||
548 | u8 addr = state->config->i2c_gate; | |
549 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
550 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
551 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
552 | if (enable) { | |
553 | tda8290_msg.buf = tda8290_close; | |
554 | } else { | |
555 | tda8290_msg.buf = tda8290_open; | |
556 | } | |
06be3035 | 557 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
558 | struct saa7134_dev *dev = fe->dvb->priv; |
559 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
560 | return -EIO; |
561 | } | |
562 | msleep(20); | |
563 | return 0; | |
564 | } | |
565 | ||
58ef4f92 | 566 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 567 | { |
90e9df7f | 568 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 569 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 570 | |
58ef4f92 HH |
571 | switch (state->config->antenna_switch) { |
572 | case 0: break; | |
573 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
574 | saa7134_set_gpio(dev, 21, 0); | |
575 | break; | |
576 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
577 | saa7134_set_gpio(dev, 21, 1); | |
578 | break; | |
587d2fd7 | 579 | } |
587d2fd7 HH |
580 | return 0; |
581 | } | |
582 | ||
58ef4f92 | 583 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 584 | { |
58ef4f92 HH |
585 | struct saa7134_dev *dev = fe->dvb->priv; |
586 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 587 | |
58ef4f92 HH |
588 | switch (state->config->antenna_switch) { |
589 | case 0: break; | |
590 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
591 | saa7134_set_gpio(dev, 21, 1); | |
592 | break; | |
593 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
594 | saa7134_set_gpio(dev, 21, 0); | |
595 | break; | |
596 | } | |
587d2fd7 | 597 | return 0; |
2d6b5f62 | 598 | } |
90e9df7f | 599 | |
d557dab5 MCC |
600 | static int configure_tda827x_fe(struct saa7134_dev *dev, |
601 | struct tda1004x_config *cdec_conf, | |
602 | struct tda827x_config *tuner_conf) | |
90e9df7f | 603 | { |
363c35fc ST |
604 | struct videobuf_dvb_frontend *fe0; |
605 | ||
92abe9ee DB |
606 | /* Get the first frontend */ |
607 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
363c35fc ST |
608 | |
609 | fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); | |
610 | if (fe0->dvb.frontend) { | |
7bff4b4d | 611 | if (cdec_conf->i2c_gate) |
363c35fc ST |
612 | fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
613 | if (dvb_attach(tda827x_attach, fe0->dvb.frontend, | |
d557dab5 MCC |
614 | cdec_conf->tuner_address, |
615 | &dev->i2c_adap, tuner_conf)) | |
616 | return 0; | |
617 | ||
618 | wprintk("no tda827x tuner found at addr: %02x\n", | |
7bff4b4d | 619 | cdec_conf->tuner_address); |
58ef4f92 | 620 | } |
d557dab5 | 621 | return -EINVAL; |
90e9df7f HH |
622 | } |
623 | ||
58ef4f92 | 624 | /* ------------------------------------------------------------------ */ |
261f5081 | 625 | |
7bff4b4d | 626 | static struct tda827x_config tda827x_cfg_0 = { |
7bff4b4d HH |
627 | .init = philips_tda827x_tuner_init, |
628 | .sleep = philips_tda827x_tuner_sleep, | |
629 | .config = 0, | |
630 | .switch_addr = 0 | |
631 | }; | |
632 | ||
633 | static struct tda827x_config tda827x_cfg_1 = { | |
7bff4b4d HH |
634 | .init = philips_tda827x_tuner_init, |
635 | .sleep = philips_tda827x_tuner_sleep, | |
636 | .config = 1, | |
637 | .switch_addr = 0x4b | |
638 | }; | |
639 | ||
640 | static struct tda827x_config tda827x_cfg_2 = { | |
7bff4b4d HH |
641 | .init = philips_tda827x_tuner_init, |
642 | .sleep = philips_tda827x_tuner_sleep, | |
643 | .config = 2, | |
644 | .switch_addr = 0x4b | |
645 | }; | |
646 | ||
647 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
7bff4b4d HH |
648 | .init = philips_tda827x_tuner_init, |
649 | .sleep = philips_tda827x_tuner_sleep, | |
650 | .config = 2, | |
651 | .switch_addr = 0x42 | |
652 | }; | |
653 | ||
654 | /* ------------------------------------------------------------------ */ | |
655 | ||
58ef4f92 | 656 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
657 | .demod_address = 0x08, |
658 | .invert = 1, | |
659 | .invert_oclk = 0, | |
660 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
661 | .agc_config = TDA10046_AGC_TDA827X, |
662 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 663 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
664 | .tuner_address = 0x60, |
665 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 666 | }; |
550a9a5e | 667 | |
58ef4f92 HH |
668 | static struct tda1004x_config philips_tiger_config = { |
669 | .demod_address = 0x08, | |
670 | .invert = 1, | |
671 | .invert_oclk = 0, | |
672 | .xtal_freq = TDA10046_XTAL_16M, | |
673 | .agc_config = TDA10046_AGC_TDA827X, | |
674 | .gpio_config = TDA10046_GP11_I, | |
675 | .if_freq = TDA10046_FREQ_045, | |
676 | .i2c_gate = 0x4b, | |
677 | .tuner_address = 0x61, | |
58ef4f92 HH |
678 | .antenna_switch= 1, |
679 | .request_firmware = philips_tda1004x_request_firmware | |
680 | }; | |
550a9a5e HH |
681 | |
682 | static struct tda1004x_config cinergy_ht_config = { | |
683 | .demod_address = 0x08, | |
684 | .invert = 1, | |
685 | .invert_oclk = 0, | |
686 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
687 | .agc_config = TDA10046_AGC_TDA827X, |
688 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 689 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
690 | .i2c_gate = 0x4b, |
691 | .tuner_address = 0x61, | |
58ef4f92 | 692 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
693 | }; |
694 | ||
58ef4f92 HH |
695 | static struct tda1004x_config cinergy_ht_pci_config = { |
696 | .demod_address = 0x08, | |
697 | .invert = 1, | |
698 | .invert_oclk = 0, | |
699 | .xtal_freq = TDA10046_XTAL_16M, | |
700 | .agc_config = TDA10046_AGC_TDA827X, | |
701 | .gpio_config = TDA10046_GP01_I, | |
702 | .if_freq = TDA10046_FREQ_045, | |
703 | .i2c_gate = 0x4b, | |
704 | .tuner_address = 0x60, | |
58ef4f92 HH |
705 | .request_firmware = philips_tda1004x_request_firmware |
706 | }; | |
707 | ||
708 | static struct tda1004x_config philips_tiger_s_config = { | |
709 | .demod_address = 0x08, | |
710 | .invert = 1, | |
711 | .invert_oclk = 0, | |
712 | .xtal_freq = TDA10046_XTAL_16M, | |
713 | .agc_config = TDA10046_AGC_TDA827X, | |
714 | .gpio_config = TDA10046_GP01_I, | |
715 | .if_freq = TDA10046_FREQ_045, | |
716 | .i2c_gate = 0x4b, | |
717 | .tuner_address = 0x61, | |
58ef4f92 HH |
718 | .antenna_switch= 1, |
719 | .request_firmware = philips_tda1004x_request_firmware | |
720 | }; | |
df42eaf2 | 721 | |
587d2fd7 HH |
722 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
723 | .demod_address = 0x08, | |
724 | .invert = 1, | |
725 | .invert_oclk = 0, | |
726 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
727 | .agc_config = TDA10046_AGC_TDA827X, |
728 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 729 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
730 | .i2c_gate = 0x4b, |
731 | .tuner_address = 0x61, | |
58ef4f92 | 732 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
733 | }; |
734 | ||
c6e53daf TG |
735 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
736 | .demod_address = 0x08, | |
737 | .invert = 1, | |
738 | .invert_oclk = 0, | |
739 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
740 | .agc_config = TDA10046_AGC_TDA827X, |
741 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 742 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
743 | .i2c_gate = 0x4b, |
744 | .tuner_address = 0x61, | |
745 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
746 | }; |
747 | ||
83646817 HH |
748 | static struct tda1004x_config asus_p7131_dual_config = { |
749 | .demod_address = 0x08, | |
750 | .invert = 1, | |
751 | .invert_oclk = 0, | |
752 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
753 | .agc_config = TDA10046_AGC_TDA827X, |
754 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 755 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
756 | .i2c_gate = 0x4b, |
757 | .tuner_address = 0x61, | |
58ef4f92 HH |
758 | .antenna_switch= 2, |
759 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
760 | }; |
761 | ||
420f32fe NS |
762 | static struct tda1004x_config lifeview_trio_config = { |
763 | .demod_address = 0x09, | |
764 | .invert = 1, | |
765 | .invert_oclk = 0, | |
766 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
767 | .agc_config = TDA10046_AGC_TDA827X, |
768 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 769 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
770 | .tuner_address = 0x60, |
771 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
772 | }; |
773 | ||
58ef4f92 | 774 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
775 | .demod_address = 0x08, |
776 | .invert = 1, | |
777 | .invert_oclk = 0, | |
778 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 779 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 780 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 781 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
782 | .tuner_address = 0x60, |
783 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
784 | }; |
785 | ||
58ef4f92 | 786 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
787 | .demod_address = 0x08, |
788 | .invert = 1, | |
789 | .invert_oclk = 0, | |
790 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 791 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 792 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 793 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
794 | .i2c_gate = 0x4b, |
795 | .tuner_address = 0x60, | |
58ef4f92 | 796 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
797 | }; |
798 | ||
e06cea4c HH |
799 | static struct tda1004x_config asus_p7131_4871_config = { |
800 | .demod_address = 0x08, | |
801 | .invert = 1, | |
802 | .invert_oclk = 0, | |
803 | .xtal_freq = TDA10046_XTAL_16M, | |
804 | .agc_config = TDA10046_AGC_TDA827X, | |
805 | .gpio_config = TDA10046_GP01_I, | |
806 | .if_freq = TDA10046_FREQ_045, | |
807 | .i2c_gate = 0x4b, | |
808 | .tuner_address = 0x61, | |
e06cea4c HH |
809 | .antenna_switch= 2, |
810 | .request_firmware = philips_tda1004x_request_firmware | |
811 | }; | |
812 | ||
f3eec0c0 | 813 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
814 | .demod_address = 0x08, |
815 | .invert = 1, | |
816 | .invert_oclk = 0, | |
817 | .xtal_freq = TDA10046_XTAL_16M, | |
818 | .agc_config = TDA10046_AGC_TDA827X, | |
819 | .gpio_config = TDA10046_GP11_I, | |
820 | .if_freq = TDA10046_FREQ_045, | |
821 | .i2c_gate = 0x4b, | |
822 | .tuner_address = 0x61, | |
e06cea4c HH |
823 | .antenna_switch= 2, |
824 | .request_firmware = philips_tda1004x_request_firmware | |
825 | }; | |
261f5081 | 826 | |
b39423a9 SF |
827 | static struct tda1004x_config kworld_dvb_t_210_config = { |
828 | .demod_address = 0x08, | |
829 | .invert = 1, | |
830 | .invert_oclk = 0, | |
831 | .xtal_freq = TDA10046_XTAL_16M, | |
832 | .agc_config = TDA10046_AGC_TDA827X, | |
833 | .gpio_config = TDA10046_GP11_I, | |
834 | .if_freq = TDA10046_FREQ_045, | |
835 | .i2c_gate = 0x4b, | |
836 | .tuner_address = 0x61, | |
b39423a9 SF |
837 | .antenna_switch= 1, |
838 | .request_firmware = philips_tda1004x_request_firmware | |
839 | }; | |
261f5081 | 840 | |
d90d9f5a ES |
841 | static struct tda1004x_config avermedia_super_007_config = { |
842 | .demod_address = 0x08, | |
843 | .invert = 1, | |
844 | .invert_oclk = 0, | |
845 | .xtal_freq = TDA10046_XTAL_16M, | |
846 | .agc_config = TDA10046_AGC_TDA827X, | |
847 | .gpio_config = TDA10046_GP01_I, | |
848 | .if_freq = TDA10046_FREQ_045, | |
849 | .i2c_gate = 0x4b, | |
850 | .tuner_address = 0x60, | |
d90d9f5a ES |
851 | .antenna_switch= 1, |
852 | .request_firmware = philips_tda1004x_request_firmware | |
853 | }; | |
854 | ||
4ba24373 HP |
855 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
856 | .demod_address = 0x08, | |
857 | .invert = 1, | |
858 | .invert_oclk = 0, | |
859 | .xtal_freq = TDA10046_XTAL_16M, | |
860 | .agc_config = TDA10046_AGC_TDA827X, | |
861 | .gpio_config = TDA10046_GP01_I, | |
862 | .if_freq = TDA10046_FREQ_045, | |
863 | .i2c_gate = 0x42, | |
864 | .tuner_address = 0x61, | |
4ba24373 HP |
865 | .antenna_switch = 1, |
866 | .request_firmware = philips_tda1004x_request_firmware | |
867 | }; | |
868 | ||
301e9d64 | 869 | static struct tda1004x_config asus_tiger_3in1_config = { |
870 | .demod_address = 0x0b, | |
871 | .invert = 1, | |
872 | .invert_oclk = 0, | |
873 | .xtal_freq = TDA10046_XTAL_16M, | |
874 | .agc_config = TDA10046_AGC_TDA827X, | |
875 | .gpio_config = TDA10046_GP11_I, | |
876 | .if_freq = TDA10046_FREQ_045, | |
877 | .i2c_gate = 0x4b, | |
878 | .tuner_address = 0x61, | |
879 | .antenna_switch = 1, | |
880 | .request_firmware = philips_tda1004x_request_firmware | |
881 | }; | |
882 | ||
58ef4f92 HH |
883 | /* ------------------------------------------------------------------ |
884 | * special case: this card uses saa713x GPIO22 for the mode switch | |
885 | */ | |
5eda227f | 886 | |
58ef4f92 | 887 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
888 | { |
889 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
890 | philips_tda827x_tuner_init(fe); |
891 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 892 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
893 | return 0; |
894 | } | |
895 | ||
58ef4f92 | 896 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 897 | { |
5eda227f | 898 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 899 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 900 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
901 | philips_tda827x_tuner_sleep(fe); |
902 | return 0; | |
5eda227f HH |
903 | } |
904 | ||
8ce47dad | 905 | static struct tda827x_config ads_duo_cfg = { |
8ce47dad | 906 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
907 | .sleep = ads_duo_tuner_sleep, |
908 | .config = 0 | |
8ce47dad MK |
909 | }; |
910 | ||
58ef4f92 | 911 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
912 | .demod_address = 0x08, |
913 | .invert = 1, | |
914 | .invert_oclk = 0, | |
915 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 916 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 917 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 918 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
919 | .tuner_address = 0x61, |
920 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
921 | }; |
922 | ||
47aeba5a DB |
923 | static struct zl10353_config behold_h6_config = { |
924 | .demod_address = 0x1e>>1, | |
925 | .no_tuner = 1, | |
926 | .parallel_ts = 1, | |
5f77af93 | 927 | .disable_i2c_gate_ctrl = 1, |
47aeba5a DB |
928 | }; |
929 | ||
2930992c BILDB |
930 | static struct xc5000_config behold_x7_tunerconfig = { |
931 | .i2c_address = 0xc2>>1, | |
932 | .if_khz = 4560, | |
2a0d0560 | 933 | .radio_input = XC5000_RADIO_FM1, |
2930992c BILDB |
934 | }; |
935 | ||
936 | static struct zl10353_config behold_x7_config = { | |
937 | .demod_address = 0x1e>>1, | |
938 | .if2 = 45600, | |
939 | .no_tuner = 1, | |
940 | .parallel_ts = 1, | |
941 | .disable_i2c_gate_ctrl = 1, | |
942 | }; | |
943 | ||
dbe8740d CC |
944 | static struct zl10353_config videomate_t750_zl10353_config = { |
945 | .demod_address = 0x0f, | |
946 | .no_tuner = 1, | |
947 | .parallel_ts = 1, | |
948 | .disable_i2c_gate_ctrl = 1, | |
949 | }; | |
950 | ||
951 | static struct qt1010_config videomate_t750_qt1010_config = { | |
952 | .i2c_address = 0x62 | |
953 | }; | |
954 | ||
955 | ||
58ef4f92 HH |
956 | /* ================================================================== |
957 | * tda10086 based DVB-S cards, helper functions | |
958 | */ | |
959 | ||
e2ac28fa IL |
960 | static struct tda10086_config flydvbs = { |
961 | .demod_address = 0x0e, | |
962 | .invert = 0, | |
ea75baf4 | 963 | .diseqc_tone = 0, |
9a1b04e4 HH |
964 | .xtal_freq = TDA10086_XTAL_16M, |
965 | }; | |
966 | ||
967 | static struct tda10086_config sd1878_4m = { | |
968 | .demod_address = 0x0e, | |
969 | .invert = 0, | |
970 | .diseqc_tone = 0, | |
971 | .xtal_freq = TDA10086_XTAL_4M, | |
e2ac28fa IL |
972 | }; |
973 | ||
1b1cee35 HH |
974 | /* ------------------------------------------------------------------ |
975 | * special case: lnb supply is connected to the gated i2c | |
976 | */ | |
977 | ||
978 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
979 | { | |
980 | int res = -EIO; | |
981 | struct saa7134_dev *dev = fe->dvb->priv; | |
982 | if (fe->ops.i2c_gate_ctrl) { | |
983 | fe->ops.i2c_gate_ctrl(fe, 1); | |
984 | if (dev->original_set_voltage) | |
985 | res = dev->original_set_voltage(fe, voltage); | |
986 | fe->ops.i2c_gate_ctrl(fe, 0); | |
987 | } | |
988 | return res; | |
989 | }; | |
990 | ||
991 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
992 | { | |
993 | int res = -EIO; | |
994 | struct saa7134_dev *dev = fe->dvb->priv; | |
995 | if (fe->ops.i2c_gate_ctrl) { | |
996 | fe->ops.i2c_gate_ctrl(fe, 1); | |
997 | if (dev->original_set_high_voltage) | |
998 | res = dev->original_set_high_voltage(fe, arg); | |
999 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1000 | } | |
1001 | return res; | |
1002 | }; | |
1003 | ||
5823b3a6 HH |
1004 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
1005 | { | |
1006 | struct saa7134_dev *dev = fe->dvb->priv; | |
1007 | u8 wbuf[2] = { 0x1f, 00 }; | |
1008 | u8 rbuf; | |
1009 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
1010 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
1011 | ||
1012 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
1013 | return -EIO; | |
1014 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
1015 | if (voltage == SEC_VOLTAGE_18) | |
1016 | wbuf[1] = rbuf | 0x10; | |
1017 | else | |
1018 | wbuf[1] = rbuf & 0xef; | |
1019 | msg[0].len = 2; | |
1020 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
1025 | { | |
1026 | struct saa7134_dev *dev = fe->dvb->priv; | |
1027 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
1028 | return -EIO; | |
1029 | } | |
1030 | ||
58ef4f92 HH |
1031 | /* ================================================================== |
1032 | * nxt200x based ATSC cards, helper functions | |
1033 | */ | |
90e9df7f | 1034 | |
3b64e8e2 MK |
1035 | static struct nxt200x_config avertvhda180 = { |
1036 | .demod_address = 0x0a, | |
3b64e8e2 | 1037 | }; |
3e1410ad AB |
1038 | |
1039 | static struct nxt200x_config kworldatsc110 = { | |
1040 | .demod_address = 0x0a, | |
3e1410ad | 1041 | }; |
3b64e8e2 | 1042 | |
04574185 MS |
1043 | /* ------------------------------------------------------------------ */ |
1044 | ||
1045 | static struct mt312_config avertv_a700_mt312 = { | |
1046 | .demod_address = 0x0e, | |
1047 | .voltage_inverted = 1, | |
1048 | }; | |
1049 | ||
1050 | static struct zl10036_config avertv_a700_tuner = { | |
1051 | .tuner_address = 0x60, | |
1052 | }; | |
1053 | ||
ecfcfec8 IL |
1054 | static struct mt312_config zl10313_compro_s350_config = { |
1055 | .demod_address = 0x0e, | |
1056 | }; | |
1057 | ||
3abdedd8 MK |
1058 | static struct lgdt3305_config hcw_lgdt3305_config = { |
1059 | .i2c_addr = 0x0e, | |
1060 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
1061 | .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE, | |
1062 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
1063 | .deny_i2c_rptr = 1, | |
1064 | .spectral_inversion = 1, | |
1065 | .qam_if_khz = 4000, | |
1066 | .vsb_if_khz = 3250, | |
1067 | }; | |
1068 | ||
1bc7f51c MK |
1069 | static struct tda10048_config hcw_tda10048_config = { |
1070 | .demod_address = 0x10 >> 1, | |
1071 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
1072 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1073 | .inversion = TDA10048_INVERSION_ON, | |
1074 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1075 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
1076 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
1077 | .clk_freq_khz = TDA10048_CLK_16000, | |
1078 | .disable_gate_access = 1, | |
1079 | }; | |
1080 | ||
3abdedd8 MK |
1081 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
1082 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, | |
1083 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
1084 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
1085 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
1086 | }; | |
1087 | ||
1088 | static struct tda18271_config hcw_tda18271_config = { | |
1089 | .std_map = &hauppauge_tda18271_std_map, | |
1090 | .gate = TDA18271_GATE_ANALOG, | |
1091 | .config = 3, | |
542cb057 | 1092 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
3abdedd8 MK |
1093 | }; |
1094 | ||
1095 | static struct tda829x_config tda829x_no_probe = { | |
1096 | .probe_tuner = TDA829X_DONT_PROBE, | |
1097 | }; | |
1098 | ||
6c119ff4 HV |
1099 | static struct tda10048_config zolid_tda10048_config = { |
1100 | .demod_address = 0x10 >> 1, | |
1101 | .output_mode = TDA10048_PARALLEL_OUTPUT, | |
1102 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1103 | .inversion = TDA10048_INVERSION_ON, | |
1104 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1105 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
1106 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
1107 | .clk_freq_khz = TDA10048_CLK_16000, | |
1108 | .disable_gate_access = 1, | |
1109 | }; | |
1110 | ||
1111 | static struct tda18271_config zolid_tda18271_config = { | |
1112 | .gate = TDA18271_GATE_ANALOG, | |
1113 | }; | |
1114 | ||
184e769f MK |
1115 | static struct tda10048_config dtv1000s_tda10048_config = { |
1116 | .demod_address = 0x10 >> 1, | |
1117 | .output_mode = TDA10048_PARALLEL_OUTPUT, | |
1118 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1119 | .inversion = TDA10048_INVERSION_ON, | |
1120 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1121 | .dtv7_if_freq_khz = TDA10048_IF_3800, | |
1122 | .dtv8_if_freq_khz = TDA10048_IF_4300, | |
1123 | .clk_freq_khz = TDA10048_CLK_16000, | |
1124 | .disable_gate_access = 1, | |
1125 | }; | |
1126 | ||
1127 | static struct tda18271_std_map dtv1000s_tda18271_std_map = { | |
1128 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
1129 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1130 | .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, | |
1131 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1132 | .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, | |
1133 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1134 | }; | |
1135 | ||
1136 | static struct tda18271_config dtv1000s_tda18271_config = { | |
1137 | .std_map = &dtv1000s_tda18271_std_map, | |
1138 | .gate = TDA18271_GATE_ANALOG, | |
1139 | }; | |
1140 | ||
ce02704d TL |
1141 | static struct lgs8gxx_config prohdtv_pro2_lgs8g75_config = { |
1142 | .prod = LGS8GXX_PROD_LGS8G75, | |
1143 | .demod_address = 0x1d, | |
1144 | .serial_ts = 0, | |
1145 | .ts_clk_pol = 1, | |
1146 | .ts_clk_gated = 0, | |
1147 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
1148 | .if_freq = 4000, /* 4.00 MHz */ | |
1149 | .if_neg_center = 0, | |
1150 | .ext_adc = 0, | |
1151 | .adc_signed = 1, | |
1152 | .adc_vpp = 3, /* 2.0 Vpp */ | |
1153 | .if_neg_edge = 1, | |
1154 | }; | |
1155 | ||
1156 | static struct tda18271_config prohdtv_pro2_tda18271_config = { | |
1157 | .gate = TDA18271_GATE_ANALOG, | |
1158 | .output_opt = TDA18271_OUTPUT_LT_OFF, | |
1159 | }; | |
1160 | ||
58ef4f92 HH |
1161 | /* ================================================================== |
1162 | * Core code | |
1163 | */ | |
1da177e4 LT |
1164 | |
1165 | static int dvb_init(struct saa7134_dev *dev) | |
1166 | { | |
1c4f76ab | 1167 | int ret; |
bc36a686 | 1168 | int attach_xc3028 = 0; |
363c35fc ST |
1169 | struct videobuf_dvb_frontend *fe0; |
1170 | ||
f972e0bd DB |
1171 | /* FIXME: add support for multi-frontend */ |
1172 | mutex_init(&dev->frontends.lock); | |
7bdf84fc | 1173 | INIT_LIST_HEAD(&dev->frontends.felist); |
f972e0bd DB |
1174 | |
1175 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); | |
f3f741e7 DB |
1176 | fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1); |
1177 | if (!fe0) { | |
f972e0bd DB |
1178 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1179 | return -ENOMEM; | |
1180 | } | |
1181 | ||
1da177e4 LT |
1182 | /* init struct videobuf_dvb */ |
1183 | dev->ts.nr_bufs = 32; | |
1184 | dev->ts.nr_packets = 32*4; | |
363c35fc ST |
1185 | fe0->dvb.name = dev->name; |
1186 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops, | |
0705135e | 1187 | &dev->pci->dev, &dev->slock, |
1da177e4 LT |
1188 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
1189 | V4L2_FIELD_ALTERNATE, | |
1190 | sizeof(struct saa7134_buf), | |
08bff03e | 1191 | dev, NULL); |
1da177e4 LT |
1192 | |
1193 | switch (dev->board) { | |
1194 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 1195 | dprintk("pinnacle 300i dvb setup\n"); |
363c35fc | 1196 | fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 1197 | &dev->i2c_adap); |
363c35fc ST |
1198 | if (fe0->dvb.frontend) { |
1199 | fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; | |
6b3ccab7 | 1200 | } |
1da177e4 | 1201 | break; |
a78d0bfa | 1202 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 1203 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 1204 | dprintk("avertv 777 dvb setup\n"); |
363c35fc | 1205 | fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 1206 | &dev->i2c_adap); |
363c35fc ST |
1207 | if (fe0->dvb.frontend) { |
1208 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
fb147e97 MK |
1209 | &dev->i2c_adap, 0x61, |
1210 | TUNER_PHILIPS_TD1316); | |
6b3ccab7 | 1211 | } |
a78d0bfa | 1212 | break; |
95a2fdb6 | 1213 | case SAA7134_BOARD_AVERMEDIA_A16D: |
6e501a3f | 1214 | dprintk("AverMedia A16D dvb setup\n"); |
363c35fc | 1215 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1216 | &avermedia_xc3028_mt352_dev, |
1217 | &dev->i2c_adap); | |
95a2fdb6 MCC |
1218 | attach_xc3028 = 1; |
1219 | break; | |
1da177e4 | 1220 | case SAA7134_BOARD_MD7134: |
363c35fc | 1221 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1222 | &medion_cardbus, |
1223 | &dev->i2c_adap); | |
363c35fc ST |
1224 | if (fe0->dvb.frontend) { |
1225 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
cb89cd33 MK |
1226 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1227 | TUNER_PHILIPS_FMD1216ME_MK3); | |
6b3ccab7 | 1228 | } |
1da177e4 | 1229 | break; |
86ddd96f | 1230 | case SAA7134_BOARD_PHILIPS_TOUGH: |
363c35fc | 1231 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1232 | &philips_tu1216_60_config, |
1233 | &dev->i2c_adap); | |
363c35fc ST |
1234 | if (fe0->dvb.frontend) { |
1235 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1236 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1237 | } |
86ddd96f MCC |
1238 | break; |
1239 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1240 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
d557dab5 MCC |
1241 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1242 | &tda827x_cfg_0) < 0) | |
1243 | goto dettach_frontend; | |
86ddd96f | 1244 | break; |
2cf36ac4 | 1245 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1246 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
e3c6e1aa | 1247 | case SAA7134_BOARD_ASUS_EUROPA_HYBRID: |
363c35fc | 1248 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1249 | &philips_europa_config, |
1250 | &dev->i2c_adap); | |
363c35fc ST |
1251 | if (fe0->dvb.frontend) { |
1252 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1253 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1254 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1255 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1256 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1257 | } |
2cf36ac4 | 1258 | break; |
128fe95d VC |
1259 | case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000: |
1260 | fe0->dvb.frontend = dvb_attach(tda10046_attach, | |
1261 | &technotrend_budget_t3000_config, | |
1262 | &dev->i2c_adap); | |
1263 | if (fe0->dvb.frontend) { | |
1264 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1265 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1266 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1267 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1268 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
1269 | } | |
1270 | break; | |
2cf36ac4 | 1271 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: |
363c35fc | 1272 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1273 | &philips_tu1216_61_config, |
1274 | &dev->i2c_adap); | |
363c35fc ST |
1275 | if (fe0->dvb.frontend) { |
1276 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1277 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1278 | } |
2cf36ac4 | 1279 | break; |
b39423a9 | 1280 | case SAA7134_BOARD_KWORLD_DVBT_210: |
d557dab5 MCC |
1281 | if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config, |
1282 | &tda827x_cfg_2) < 0) | |
1283 | goto dettach_frontend; | |
b39423a9 | 1284 | break; |
0e316ecf | 1285 | case SAA7134_BOARD_HAUPPAUGE_HVR1120: |
1bc7f51c MK |
1286 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
1287 | &hcw_tda10048_config, | |
1288 | &dev->i2c_adap); | |
1289 | if (fe0->dvb.frontend != NULL) { | |
1290 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1291 | &dev->i2c_adap, 0x4b, | |
1292 | &tda829x_no_probe); | |
1293 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1294 | 0x60, &dev->i2c_adap, | |
1295 | &hcw_tda18271_config); | |
1296 | } | |
1297 | break; | |
90e9df7f | 1298 | case SAA7134_BOARD_PHILIPS_TIGER: |
d557dab5 MCC |
1299 | if (configure_tda827x_fe(dev, &philips_tiger_config, |
1300 | &tda827x_cfg_0) < 0) | |
1301 | goto dettach_frontend; | |
587d2fd7 HH |
1302 | break; |
1303 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
d557dab5 MCC |
1304 | if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, |
1305 | &tda827x_cfg_1) < 0) | |
1306 | goto dettach_frontend; | |
90e9df7f | 1307 | break; |
c6e53daf | 1308 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
d557dab5 MCC |
1309 | if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, |
1310 | &tda827x_cfg_1) < 0) | |
1311 | goto dettach_frontend; | |
c6e53daf | 1312 | break; |
b5f05064 | 1313 | case SAA7134_BOARD_HAUPPAUGE_HVR1150: |
3abdedd8 MK |
1314 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, |
1315 | &hcw_lgdt3305_config, | |
1316 | &dev->i2c_adap); | |
1317 | if (fe0->dvb.frontend) { | |
1318 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1319 | &dev->i2c_adap, 0x4b, | |
1320 | &tda829x_no_probe); | |
1321 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1322 | 0x60, &dev->i2c_adap, | |
1323 | &hcw_tda18271_config); | |
1324 | } | |
1325 | break; | |
d4b0aba4 | 1326 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
d557dab5 MCC |
1327 | if (configure_tda827x_fe(dev, &asus_p7131_dual_config, |
1328 | &tda827x_cfg_0) < 0) | |
1329 | goto dettach_frontend; | |
d4b0aba4 | 1330 | break; |
3d8466ec | 1331 | case SAA7134_BOARD_FLYDVBT_LR301: |
d557dab5 MCC |
1332 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1333 | &tda827x_cfg_0) < 0) | |
1334 | goto dettach_frontend; | |
3d8466ec | 1335 | break; |
92abe9ee | 1336 | case SAA7134_BOARD_FLYDVB_TRIO: |
d557dab5 MCC |
1337 | if (!use_frontend) { /* terrestrial */ |
1338 | if (configure_tda827x_fe(dev, &lifeview_trio_config, | |
1339 | &tda827x_cfg_0) < 0) | |
1340 | goto dettach_frontend; | |
7bff4b4d | 1341 | } else { /* satellite */ |
363c35fc ST |
1342 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1343 | if (fe0->dvb.frontend) { | |
1344 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63, | |
1f683cd8 | 1345 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1346 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
d557dab5 | 1347 | goto dettach_frontend; |
1f683cd8 | 1348 | } |
363c35fc | 1349 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap, |
1f683cd8 | 1350 | 0x08, 0, 0) == NULL) { |
5823b3a6 | 1351 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
d557dab5 | 1352 | goto dettach_frontend; |
1f683cd8 NS |
1353 | } |
1354 | } | |
6b3ccab7 | 1355 | } |
420f32fe | 1356 | break; |
df42eaf2 | 1357 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1358 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
363c35fc | 1359 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1360 | &ads_tech_duo_config, |
1361 | &dev->i2c_adap); | |
363c35fc ST |
1362 | if (fe0->dvb.frontend) { |
1363 | if (dvb_attach(tda827x_attach,fe0->dvb.frontend, | |
7bff4b4d HH |
1364 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1365 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1366 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d | 1367 | ads_tech_duo_config.tuner_address); |
d557dab5 | 1368 | goto dettach_frontend; |
ede2200d | 1369 | } |
bc36ec74 MCC |
1370 | } else |
1371 | wprintk("failed to attach tda10046\n"); | |
df42eaf2 | 1372 | break; |
3dfb729f | 1373 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
d557dab5 MCC |
1374 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
1375 | &tda827x_cfg_0) < 0) | |
1376 | goto dettach_frontend; | |
d95b8942 | 1377 | break; |
5eda227f | 1378 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1379 | if (!use_frontend) { /* terrestrial */ |
d557dab5 MCC |
1380 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1381 | &tda827x_cfg_0) < 0) | |
1382 | goto dettach_frontend; | |
4b1431ca | 1383 | } else { /* satellite */ |
363c35fc | 1384 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
4b1431ca | 1385 | &flydvbs, &dev->i2c_adap); |
363c35fc ST |
1386 | if (fe0->dvb.frontend) { |
1387 | struct dvb_frontend *fe = fe0->dvb.frontend; | |
5823b3a6 HH |
1388 | u8 dev_id = dev->eedata[2]; |
1389 | u8 data = 0xc4; | |
1390 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1391 | ||
363c35fc | 1392 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, |
d557dab5 | 1393 | 0x60, &dev->i2c_adap, 0) == NULL) { |
4b1431ca | 1394 | wprintk("%s: Medion Quadro, no tda826x " |
5823b3a6 | 1395 | "found !\n", __func__); |
d557dab5 MCC |
1396 | goto dettach_frontend; |
1397 | } | |
5823b3a6 HH |
1398 | if (dev_id != 0x08) { |
1399 | /* we need to open the i2c gate (we know it exists) */ | |
1400 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1401 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1402 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 HH |
1403 | wprintk("%s: Medion Quadro, no ISL6405 " |
1404 | "found !\n", __func__); | |
d557dab5 MCC |
1405 | goto dettach_frontend; |
1406 | } | |
e9c1ac9d HH |
1407 | if (dev_id == 0x07) { |
1408 | /* fire up the 2nd section of the LNB supply since | |
1409 | we can't do this from the other section */ | |
1410 | msg.buf = &data; | |
1411 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1412 | } | |
5823b3a6 HH |
1413 | fe->ops.i2c_gate_ctrl(fe, 0); |
1414 | dev->original_set_voltage = fe->ops.set_voltage; | |
1415 | fe->ops.set_voltage = md8800_set_voltage; | |
1416 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1417 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1418 | } else { | |
1419 | fe->ops.set_voltage = md8800_set_voltage2; | |
1420 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1421 | } | |
4b1431ca HH |
1422 | } |
1423 | } | |
5eda227f | 1424 | break; |
3b64e8e2 | 1425 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
363c35fc | 1426 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
f7b54b10 | 1427 | &dev->i2c_adap); |
363c35fc ST |
1428 | if (fe0->dvb.frontend) |
1429 | dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61, | |
47a9991e | 1430 | NULL, DVB_PLL_TDHU2); |
3b64e8e2 | 1431 | break; |
f689d908 | 1432 | case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI: |
3e1410ad | 1433 | case SAA7134_BOARD_KWORLD_ATSC110: |
363c35fc | 1434 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
f7b54b10 | 1435 | &dev->i2c_adap); |
363c35fc ST |
1436 | if (fe0->dvb.frontend) |
1437 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
62ff817a MK |
1438 | &dev->i2c_adap, 0x61, |
1439 | TUNER_PHILIPS_TUV1236D); | |
3e1410ad | 1440 | break; |
e2ac28fa | 1441 | case SAA7134_BOARD_FLYDVBS_LR300: |
363c35fc | 1442 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
f7b54b10 | 1443 | &dev->i2c_adap); |
363c35fc ST |
1444 | if (fe0->dvb.frontend) { |
1445 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
f7b54b10 | 1446 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1447 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 | 1448 | goto dettach_frontend; |
e2ac28fa | 1449 | } |
363c35fc | 1450 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
f7b54b10 | 1451 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 | 1452 | wprintk("%s: No ISL6421 found!\n", __func__); |
d557dab5 | 1453 | goto dettach_frontend; |
e2ac28fa IL |
1454 | } |
1455 | } | |
1456 | break; | |
cf146ca4 | 1457 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
363c35fc | 1458 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
0e8f4cc5 MS |
1459 | &medion_cardbus, |
1460 | &dev->i2c_adap); | |
363c35fc ST |
1461 | if (fe0->dvb.frontend) { |
1462 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1463 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 | 1464 | |
363c35fc | 1465 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, |
cb89cd33 MK |
1466 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1467 | TUNER_PHILIPS_FMD1216ME_MK3); | |
cf146ca4 HH |
1468 | } |
1469 | break; | |
cbb94521 | 1470 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
363c35fc | 1471 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
cbb94521 HH |
1472 | &philips_europa_config, |
1473 | &dev->i2c_adap); | |
363c35fc ST |
1474 | if (fe0->dvb.frontend) { |
1475 | fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1476 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
cbb94521 HH |
1477 | } |
1478 | break; | |
550a9a5e | 1479 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
d557dab5 MCC |
1480 | if (configure_tda827x_fe(dev, &cinergy_ht_config, |
1481 | &tda827x_cfg_0) < 0) | |
1482 | goto dettach_frontend; | |
9de271e6 MK |
1483 | break; |
1484 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
d557dab5 MCC |
1485 | if (configure_tda827x_fe(dev, &cinergy_ht_pci_config, |
1486 | &tda827x_cfg_0) < 0) | |
1487 | goto dettach_frontend; | |
58ef4f92 HH |
1488 | break; |
1489 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
d557dab5 MCC |
1490 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1491 | &tda827x_cfg_2) < 0) | |
1492 | goto dettach_frontend; | |
550a9a5e | 1493 | break; |
e06cea4c | 1494 | case SAA7134_BOARD_ASUS_P7131_4871: |
d557dab5 MCC |
1495 | if (configure_tda827x_fe(dev, &asus_p7131_4871_config, |
1496 | &tda827x_cfg_2) < 0) | |
1497 | goto dettach_frontend; | |
e06cea4c | 1498 | break; |
f3eec0c0 | 1499 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
d557dab5 MCC |
1500 | if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, |
1501 | &tda827x_cfg_2) < 0) | |
1502 | goto dettach_frontend; | |
e06cea4c | 1503 | break; |
d90d9f5a | 1504 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
d557dab5 MCC |
1505 | if (configure_tda827x_fe(dev, &avermedia_super_007_config, |
1506 | &tda827x_cfg_0) < 0) | |
1507 | goto dettach_frontend; | |
d90d9f5a | 1508 | break; |
4ba24373 | 1509 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
d557dab5 MCC |
1510 | if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, |
1511 | &tda827x_cfg_2_sw42) < 0) | |
1512 | goto dettach_frontend; | |
4ba24373 | 1513 | break; |
6ab465a8 | 1514 | case SAA7134_BOARD_PHILIPS_SNAKE: |
363c35fc | 1515 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
6ab465a8 | 1516 | &dev->i2c_adap); |
363c35fc ST |
1517 | if (fe0->dvb.frontend) { |
1518 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
d557dab5 | 1519 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1520 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 MCC |
1521 | goto dettach_frontend; |
1522 | } | |
363c35fc | 1523 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
d557dab5 | 1524 | &dev->i2c_adap, 0, 0) == NULL) { |
5823b3a6 | 1525 | wprintk("%s: No lnbp21 found!\n", __func__); |
d557dab5 MCC |
1526 | goto dettach_frontend; |
1527 | } | |
6ab465a8 HH |
1528 | } |
1529 | break; | |
7b5b3f17 | 1530 | case SAA7134_BOARD_CREATIX_CTX953: |
d557dab5 MCC |
1531 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1532 | &tda827x_cfg_0) < 0) | |
1533 | goto dettach_frontend; | |
7b5b3f17 | 1534 | break; |
6a6179b6 | 1535 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
d557dab5 MCC |
1536 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1537 | &tda827x_cfg_2) < 0) | |
1538 | goto dettach_frontend; | |
6a6179b6 | 1539 | break; |
bc36a686 | 1540 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
6e501a3f TF |
1541 | dprintk("AverMedia E506R dvb setup\n"); |
1542 | saa7134_set_gpio(dev, 25, 0); | |
1543 | msleep(10); | |
1544 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1545 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1546 | &avermedia_xc3028_mt352_dev, |
1547 | &dev->i2c_adap); | |
bc36a686 | 1548 | attach_xc3028 = 1; |
e2fc00c2 | 1549 | break; |
637afdb5 | 1550 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
363c35fc | 1551 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
9a1b04e4 | 1552 | &sd1878_4m, &dev->i2c_adap); |
363c35fc | 1553 | if (fe0->dvb.frontend) { |
637afdb5 | 1554 | struct dvb_frontend *fe; |
363c35fc | 1555 | if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, |
d557dab5 | 1556 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) { |
637afdb5 | 1557 | wprintk("%s: MD7134 DVB-S, no SD1878 " |
5823b3a6 | 1558 | "found !\n", __func__); |
d557dab5 MCC |
1559 | goto dettach_frontend; |
1560 | } | |
637afdb5 | 1561 | /* we need to open the i2c gate (we know it exists) */ |
363c35fc | 1562 | fe = fe0->dvb.frontend; |
637afdb5 HH |
1563 | fe->ops.i2c_gate_ctrl(fe, 1); |
1564 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1565 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
637afdb5 | 1566 | wprintk("%s: MD7134 DVB-S, no ISL6405 " |
5823b3a6 | 1567 | "found !\n", __func__); |
d557dab5 MCC |
1568 | goto dettach_frontend; |
1569 | } | |
637afdb5 HH |
1570 | fe->ops.i2c_gate_ctrl(fe, 0); |
1571 | dev->original_set_voltage = fe->ops.set_voltage; | |
1572 | fe->ops.set_voltage = md8800_set_voltage; | |
1573 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1574 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1575 | } | |
1576 | break; | |
e2fc00c2 MP |
1577 | case SAA7134_BOARD_AVERMEDIA_M103: |
1578 | saa7134_set_gpio(dev, 25, 0); | |
1579 | msleep(10); | |
1580 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1581 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
e2fc00c2 MP |
1582 | &avermedia_xc3028_mt352_dev, |
1583 | &dev->i2c_adap); | |
1584 | attach_xc3028 = 1; | |
1585 | break; | |
301e9d64 | 1586 | case SAA7134_BOARD_ASUSTeK_TIGER_3IN1: |
1587 | if (!use_frontend) { /* terrestrial */ | |
1588 | if (configure_tda827x_fe(dev, &asus_tiger_3in1_config, | |
1589 | &tda827x_cfg_2) < 0) | |
1590 | goto dettach_frontend; | |
1591 | } else { /* satellite */ | |
363c35fc | 1592 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
301e9d64 | 1593 | &flydvbs, &dev->i2c_adap); |
363c35fc | 1594 | if (fe0->dvb.frontend) { |
301e9d64 | 1595 | if (dvb_attach(tda826x_attach, |
363c35fc | 1596 | fe0->dvb.frontend, 0x60, |
301e9d64 | 1597 | &dev->i2c_adap, 0) == NULL) { |
1598 | wprintk("%s: Asus Tiger 3in1, no " | |
1599 | "tda826x found!\n", __func__); | |
1600 | goto dettach_frontend; | |
1601 | } | |
363c35fc | 1602 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
301e9d64 | 1603 | &dev->i2c_adap, 0, 0) == NULL) { |
1604 | wprintk("%s: Asus Tiger 3in1, no lnbp21" | |
1605 | " found!\n", __func__); | |
1606 | goto dettach_frontend; | |
1607 | } | |
1608 | } | |
1609 | } | |
1610 | break; | |
028165a3 HP |
1611 | case SAA7134_BOARD_ASUSTeK_TIGER: |
1612 | if (configure_tda827x_fe(dev, &philips_tiger_config, | |
1613 | &tda827x_cfg_0) < 0) | |
1614 | goto dettach_frontend; | |
1615 | break; | |
47aeba5a | 1616 | case SAA7134_BOARD_BEHOLD_H6: |
b0c4be8c | 1617 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
47aeba5a DB |
1618 | &behold_h6_config, |
1619 | &dev->i2c_adap); | |
b0c4be8c MCC |
1620 | if (fe0->dvb.frontend) { |
1621 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
47aeba5a | 1622 | &dev->i2c_adap, 0x61, |
4786dd65 | 1623 | TUNER_PHILIPS_FMD1216MEX_MK3); |
47aeba5a | 1624 | } |
04574185 | 1625 | break; |
2930992c BILDB |
1626 | case SAA7134_BOARD_BEHOLD_X7: |
1627 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1628 | &behold_x7_config, | |
1629 | &dev->i2c_adap); | |
1630 | if (fe0->dvb.frontend) { | |
1631 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
1632 | &dev->i2c_adap, &behold_x7_tunerconfig); | |
1633 | } | |
1634 | break; | |
0faa2ed5 DB |
1635 | case SAA7134_BOARD_BEHOLD_H7: |
1636 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1637 | &behold_x7_config, | |
1638 | &dev->i2c_adap); | |
1639 | if (fe0->dvb.frontend) { | |
1640 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
1641 | &dev->i2c_adap, &behold_x7_tunerconfig); | |
1642 | } | |
1643 | break; | |
04574185 MS |
1644 | case SAA7134_BOARD_AVERMEDIA_A700_PRO: |
1645 | case SAA7134_BOARD_AVERMEDIA_A700_HYBRID: | |
1646 | /* Zarlink ZL10313 */ | |
1647 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1648 | &avertv_a700_mt312, &dev->i2c_adap); | |
1649 | if (fe0->dvb.frontend) { | |
1650 | if (dvb_attach(zl10036_attach, fe0->dvb.frontend, | |
1651 | &avertv_a700_tuner, &dev->i2c_adap) == NULL) { | |
1652 | wprintk("%s: No zl10036 found!\n", | |
1653 | __func__); | |
1654 | } | |
1655 | } | |
ecfcfec8 IL |
1656 | break; |
1657 | case SAA7134_BOARD_VIDEOMATE_S350: | |
1658 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1659 | &zl10313_compro_s350_config, &dev->i2c_adap); | |
1660 | if (fe0->dvb.frontend) | |
1661 | if (dvb_attach(zl10039_attach, fe0->dvb.frontend, | |
1662 | 0x60, &dev->i2c_adap) == NULL) | |
1663 | wprintk("%s: No zl10039 found!\n", | |
1664 | __func__); | |
1665 | ||
dbe8740d CC |
1666 | break; |
1667 | case SAA7134_BOARD_VIDEOMATE_T750: | |
1668 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1669 | &videomate_t750_zl10353_config, | |
1670 | &dev->i2c_adap); | |
1671 | if (fe0->dvb.frontend != NULL) { | |
1672 | if (dvb_attach(qt1010_attach, | |
1673 | fe0->dvb.frontend, | |
1674 | &dev->i2c_adap, | |
1675 | &videomate_t750_qt1010_config) == NULL) | |
1676 | wprintk("error attaching QT1010\n"); | |
1677 | } | |
6c119ff4 HV |
1678 | break; |
1679 | case SAA7134_BOARD_ZOLID_HYBRID_PCI: | |
1680 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1681 | &zolid_tda10048_config, | |
1682 | &dev->i2c_adap); | |
1683 | if (fe0->dvb.frontend != NULL) { | |
1684 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1685 | &dev->i2c_adap, 0x4b, | |
1686 | &tda829x_no_probe); | |
1687 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1688 | 0x60, &dev->i2c_adap, | |
1689 | &zolid_tda18271_config); | |
1690 | } | |
47aeba5a | 1691 | break; |
184e769f MK |
1692 | case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S: |
1693 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1694 | &dtv1000s_tda10048_config, | |
1695 | &dev->i2c_adap); | |
1696 | if (fe0->dvb.frontend != NULL) { | |
1697 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1698 | &dev->i2c_adap, 0x4b, | |
1699 | &tda829x_no_probe); | |
1700 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1701 | 0x60, &dev->i2c_adap, | |
1702 | &dtv1000s_tda18271_config); | |
1703 | } | |
1704 | break; | |
f0551efc | 1705 | case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG: |
ecb71d26 MCC |
1706 | /* Switch to digital mode */ |
1707 | saa7134_tuner_callback(dev, 0, | |
1708 | TDA18271_CALLBACK_CMD_AGC_ENABLE, 1); | |
f0551efc MCC |
1709 | fe0->dvb.frontend = dvb_attach(mb86a20s_attach, |
1710 | &kworld_mb86a20s_config, | |
1711 | &dev->i2c_adap); | |
f0551efc | 1712 | if (fe0->dvb.frontend != NULL) { |
6a58bc0f MCC |
1713 | dvb_attach(tda829x_attach, fe0->dvb.frontend, |
1714 | &dev->i2c_adap, 0x4b, | |
1715 | &tda829x_no_probe); | |
f0551efc MCC |
1716 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
1717 | 0x60, &dev->i2c_adap, | |
1718 | &kworld_tda18271_config); | |
6a58bc0f | 1719 | fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_gate_ctrl; |
f0551efc | 1720 | } |
6a58bc0f MCC |
1721 | |
1722 | /* mb86a20s need to use the I2C gateway */ | |
f0551efc | 1723 | break; |
ce02704d TL |
1724 | case SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2: |
1725 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
1726 | &prohdtv_pro2_lgs8g75_config, | |
1727 | &dev->i2c_adap); | |
1728 | if (fe0->dvb.frontend != NULL) { | |
1729 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1730 | &dev->i2c_adap, 0x4b, | |
1731 | &tda829x_no_probe); | |
1732 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1733 | 0x60, &dev->i2c_adap, | |
1734 | &prohdtv_pro2_tda18271_config); | |
1735 | } | |
1736 | break; | |
1da177e4 | 1737 | default: |
cf3c34c8 | 1738 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1739 | break; |
1740 | } | |
1741 | ||
bc36a686 MCC |
1742 | if (attach_xc3028) { |
1743 | struct dvb_frontend *fe; | |
1744 | struct xc2028_config cfg = { | |
1745 | .i2c_adap = &dev->i2c_adap, | |
1746 | .i2c_addr = 0x61, | |
bc36a686 | 1747 | }; |
95a2fdb6 | 1748 | |
363c35fc | 1749 | if (!fe0->dvb.frontend) |
f3f741e7 | 1750 | goto dettach_frontend; |
95a2fdb6 | 1751 | |
363c35fc | 1752 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
bc36a686 MCC |
1753 | if (!fe) { |
1754 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1755 | dev->name); | |
d557dab5 | 1756 | goto dettach_frontend; |
bc36a686 MCC |
1757 | } |
1758 | } | |
1759 | ||
363c35fc | 1760 | if (NULL == fe0->dvb.frontend) { |
cf3c34c8 | 1761 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
f3f741e7 | 1762 | goto dettach_frontend; |
1da177e4 | 1763 | } |
d7cba043 | 1764 | /* define general-purpose callback pointer */ |
363c35fc | 1765 | fe0->dvb.frontend->callback = saa7134_tuner_callback; |
1da177e4 LT |
1766 | |
1767 | /* register everything else */ | |
363c35fc | 1768 | ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
9133aee0 | 1769 | &dev->pci->dev, adapter_nr, 0, NULL); |
1c4f76ab HH |
1770 | |
1771 | /* this sequence is necessary to make the tda1004x load its firmware | |
1772 | * and to enter analog mode of hybrid boards | |
1773 | */ | |
1774 | if (!ret) { | |
363c35fc ST |
1775 | if (fe0->dvb.frontend->ops.init) |
1776 | fe0->dvb.frontend->ops.init(fe0->dvb.frontend); | |
1777 | if (fe0->dvb.frontend->ops.sleep) | |
1778 | fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend); | |
1779 | if (fe0->dvb.frontend->ops.tuner_ops.sleep) | |
1780 | fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend); | |
1c4f76ab HH |
1781 | } |
1782 | return ret; | |
d557dab5 MCC |
1783 | |
1784 | dettach_frontend: | |
f3f741e7 DB |
1785 | videobuf_dvb_dealloc_frontends(&dev->frontends); |
1786 | return -EINVAL; | |
1da177e4 LT |
1787 | } |
1788 | ||
1789 | static int dvb_fini(struct saa7134_dev *dev) | |
1790 | { | |
363c35fc ST |
1791 | struct videobuf_dvb_frontend *fe0; |
1792 | ||
1793 | /* Get the first frontend */ | |
1794 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
1795 | if (!fe0) | |
1796 | return -EINVAL; | |
1797 | ||
7f171123 MCC |
1798 | /* FIXME: I suspect that this code is bogus, since the entry for |
1799 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1800 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1801 | */ | |
1802 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1803 | struct v4l2_priv_tun_config tda9887_cfg; | |
1804 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1805 | ||
1806 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1807 | tda9887_cfg.priv = &on; | |
1da177e4 | 1808 | |
1da177e4 | 1809 | /* otherwise we don't detect the tuner on next insmod */ |
fac6986c | 1810 | saa_call_all(dev, tuner, s_config, &tda9887_cfg); |
5823b3a6 | 1811 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
e9c1ac9d | 1812 | if ((dev->eedata[2] == 0x07) && use_frontend) { |
5823b3a6 HH |
1813 | /* turn off the 2nd lnb supply */ |
1814 | u8 data = 0x80; | |
1815 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1816 | struct dvb_frontend *fe; | |
363c35fc | 1817 | fe = fe0->dvb.frontend; |
5823b3a6 HH |
1818 | if (fe->ops.i2c_gate_ctrl) { |
1819 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1820 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1821 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1822 | } | |
1823 | } | |
7f171123 | 1824 | } |
f3f741e7 | 1825 | videobuf_dvb_unregister_bus(&dev->frontends); |
1da177e4 LT |
1826 | return 0; |
1827 | } | |
1828 | ||
1829 | static struct saa7134_mpeg_ops dvb_ops = { | |
1830 | .type = SAA7134_MPEG_DVB, | |
1831 | .init = dvb_init, | |
1832 | .fini = dvb_fini, | |
1833 | }; | |
1834 | ||
1835 | static int __init dvb_register(void) | |
1836 | { | |
1837 | return saa7134_ts_register(&dvb_ops); | |
1838 | } | |
1839 | ||
1840 | static void __exit dvb_unregister(void) | |
1841 | { | |
1842 | saa7134_ts_unregister(&dvb_ops); | |
1843 | } | |
1844 | ||
1845 | module_init(dvb_register); | |
1846 | module_exit(dvb_unregister); | |
1847 | ||
1848 | /* ------------------------------------------------------------------ */ | |
1849 | /* | |
1850 | * Local variables: | |
1851 | * c-basic-offset: 8 | |
1852 | * End: | |
1853 | */ |