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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
5823b3a6 | 36 | #include <dvb_frontend.h> |
1da177e4 | 37 | |
1f10c7af AQ |
38 | #include "mt352.h" |
39 | #include "mt352_priv.h" /* FIXME */ | |
40 | #include "tda1004x.h" | |
41 | #include "nxt200x.h" | |
bc36a686 | 42 | #include "tuner-xc2028.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
cb89cd33 | 50 | #include "tuner-simple.h" |
1bc7f51c | 51 | #include "tda10048.h" |
3abdedd8 MK |
52 | #include "tda18271.h" |
53 | #include "lgdt3305.h" | |
54 | #include "tda8290.h" | |
8ce47dad | 55 | |
47aeba5a DB |
56 | #include "zl10353.h" |
57 | ||
04574185 MS |
58 | #include "zl10036.h" |
59 | #include "mt312.h" | |
60 | ||
1da177e4 LT |
61 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
62 | MODULE_LICENSE("GPL"); | |
63 | ||
ff699e6b | 64 | static unsigned int antenna_pwr; |
86ddd96f | 65 | |
1da177e4 LT |
66 | module_param(antenna_pwr, int, 0444); |
67 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
68 | ||
ff699e6b | 69 | static int use_frontend; |
b331daa0 SB |
70 | module_param(use_frontend, int, 0644); |
71 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 72 | |
ff699e6b | 73 | static int debug; |
58ef4f92 HH |
74 | module_param(debug, int, 0644); |
75 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
76 | ||
78e92006 JG |
77 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
78 | ||
cf3c34c8 TP |
79 | #define dprintk(fmt, arg...) do { if (debug) \ |
80 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
81 | ||
82 | /* Print a warning */ | |
83 | #define wprintk(fmt, arg...) \ | |
84 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
85 | |
86 | /* ------------------------------------------------------------------ | |
87 | * mt352 based DVB-T cards | |
88 | */ | |
89 | ||
1da177e4 LT |
90 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
91 | { | |
92 | u32 ok; | |
93 | ||
94 | if (!on) { | |
95 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
96 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
97 | return 0; | |
98 | } | |
99 | ||
100 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
101 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
102 | udelay(10); | |
103 | ||
104 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
105 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
106 | udelay(10); | |
107 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
108 | udelay(10); | |
109 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 110 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
111 | |
112 | if (!ok) | |
113 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
114 | return ok; | |
115 | } | |
116 | ||
117 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
118 | { | |
119 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
120 | static u8 reset [] = { RESET, 0x80 }; | |
121 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
122 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
123 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
124 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
125 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
126 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
127 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
128 | struct saa7134_dev *dev= fe->dvb->priv; | |
129 | ||
5823b3a6 | 130 | dprintk("%s called\n", __func__); |
1da177e4 LT |
131 | |
132 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
133 | udelay(200); | |
134 | mt352_write(fe, reset, sizeof(reset)); | |
135 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
136 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
137 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
138 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
139 | ||
140 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
141 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
142 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 143 | |
1da177e4 LT |
144 | return 0; |
145 | } | |
146 | ||
a78d0bfa JAR |
147 | static int mt352_aver777_init(struct dvb_frontend* fe) |
148 | { | |
149 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
150 | static u8 reset [] = { RESET, 0x80 }; | |
151 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
152 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
153 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
154 | ||
155 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
156 | udelay(200); | |
157 | mt352_write(fe, reset, sizeof(reset)); | |
158 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
159 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
160 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
161 | ||
162 | return 0; | |
163 | } | |
164 | ||
6e501a3f | 165 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
95a2fdb6 | 166 | { |
6e501a3f TF |
167 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
168 | static u8 reset [] = { RESET, 0x80 }; | |
169 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
170 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; | |
95a2fdb6 MCC |
171 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
172 | ||
173 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
174 | udelay(200); | |
175 | mt352_write(fe, reset, sizeof(reset)); | |
176 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
177 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
178 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
95a2fdb6 MCC |
179 | return 0; |
180 | } | |
181 | ||
0463f12c AQ |
182 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
183 | struct dvb_frontend_parameters* params) | |
1da177e4 | 184 | { |
df8cf706 HH |
185 | u8 off[] = { 0x00, 0xf1}; |
186 | u8 on[] = { 0x00, 0x71}; | |
187 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
188 | ||
1da177e4 LT |
189 | struct saa7134_dev *dev = fe->dvb->priv; |
190 | struct v4l2_frequency f; | |
191 | ||
192 | /* set frequency (mt2050) */ | |
193 | f.tuner = 0; | |
194 | f.type = V4L2_TUNER_DIGITAL_TV; | |
195 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
196 | if (fe->ops.i2c_gate_ctrl) |
197 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 198 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
fac6986c | 199 | saa_call_all(dev, tuner, s_frequency, &f); |
df8cf706 | 200 | msg.buf = on; |
dea74869 PB |
201 | if (fe->ops.i2c_gate_ctrl) |
202 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 203 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
204 | |
205 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
206 | ||
207 | /* mt352 setup */ | |
0463f12c | 208 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
209 | } |
210 | ||
211 | static struct mt352_config pinnacle_300i = { | |
212 | .demod_address = 0x3c >> 1, | |
213 | .adc_clock = 20333, | |
214 | .if2 = 36150, | |
215 | .no_tuner = 1, | |
216 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 217 | }; |
a78d0bfa JAR |
218 | |
219 | static struct mt352_config avermedia_777 = { | |
220 | .demod_address = 0xf, | |
221 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 222 | }; |
1da177e4 | 223 | |
6e501a3f | 224 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
bc36a686 MCC |
225 | .demod_address = (0x1e >> 1), |
226 | .no_tuner = 1, | |
6e501a3f | 227 | .demod_init = mt352_avermedia_xc3028_init, |
bc36a686 MCC |
228 | }; |
229 | ||
58ef4f92 HH |
230 | /* ================================================================== |
231 | * tda1004x based DVB-T cards, helper functions | |
232 | */ | |
233 | ||
234 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
235 | const struct firmware **fw, char *name) | |
1da177e4 LT |
236 | { |
237 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
238 | return request_firmware(fw, name, &dev->pci->dev); |
239 | } | |
240 | ||
58ef4f92 HH |
241 | /* ------------------------------------------------------------------ |
242 | * these tuners are tu1216, td1316(a) | |
243 | */ | |
244 | ||
245 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
246 | { | |
247 | struct saa7134_dev *dev = fe->dvb->priv; | |
248 | struct tda1004x_state *state = fe->demodulator_priv; | |
249 | u8 addr = state->config->tuner_address; | |
86ddd96f | 250 | u8 tuner_buf[4]; |
2cf36ac4 | 251 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
252 | sizeof(tuner_buf) }; |
253 | int tuner_frequency = 0; | |
254 | u8 band, cp, filter; | |
255 | ||
256 | /* determine charge pump */ | |
257 | tuner_frequency = params->frequency + 36166000; | |
258 | if (tuner_frequency < 87000000) | |
259 | return -EINVAL; | |
260 | else if (tuner_frequency < 130000000) | |
261 | cp = 3; | |
262 | else if (tuner_frequency < 160000000) | |
263 | cp = 5; | |
264 | else if (tuner_frequency < 200000000) | |
265 | cp = 6; | |
266 | else if (tuner_frequency < 290000000) | |
267 | cp = 3; | |
268 | else if (tuner_frequency < 420000000) | |
269 | cp = 5; | |
270 | else if (tuner_frequency < 480000000) | |
271 | cp = 6; | |
272 | else if (tuner_frequency < 620000000) | |
273 | cp = 3; | |
274 | else if (tuner_frequency < 830000000) | |
275 | cp = 5; | |
276 | else if (tuner_frequency < 895000000) | |
277 | cp = 7; | |
278 | else | |
279 | return -EINVAL; | |
280 | ||
281 | /* determine band */ | |
282 | if (params->frequency < 49000000) | |
283 | return -EINVAL; | |
284 | else if (params->frequency < 161000000) | |
285 | band = 1; | |
286 | else if (params->frequency < 444000000) | |
287 | band = 2; | |
288 | else if (params->frequency < 861000000) | |
289 | band = 4; | |
290 | else | |
291 | return -EINVAL; | |
292 | ||
293 | /* setup PLL filter */ | |
294 | switch (params->u.ofdm.bandwidth) { | |
295 | case BANDWIDTH_6_MHZ: | |
296 | filter = 0; | |
297 | break; | |
298 | ||
299 | case BANDWIDTH_7_MHZ: | |
300 | filter = 0; | |
301 | break; | |
302 | ||
303 | case BANDWIDTH_8_MHZ: | |
304 | filter = 1; | |
305 | break; | |
1da177e4 | 306 | |
86ddd96f MCC |
307 | default: |
308 | return -EINVAL; | |
309 | } | |
310 | ||
311 | /* calculate divisor | |
312 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 313 | */ |
86ddd96f MCC |
314 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
315 | ||
316 | /* setup tuner buffer */ | |
317 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
318 | tuner_buf[1] = tuner_frequency & 0xff; | |
319 | tuner_buf[2] = 0xca; | |
320 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
321 | ||
dea74869 PB |
322 | if (fe->ops.i2c_gate_ctrl) |
323 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 324 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
325 | wprintk("could not write to tuner at addr: 0x%02x\n", |
326 | addr << 1); | |
86ddd96f | 327 | return -EIO; |
58ef4f92 | 328 | } |
2cf36ac4 HH |
329 | msleep(1); |
330 | return 0; | |
331 | } | |
332 | ||
58ef4f92 | 333 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
334 | { |
335 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
336 | struct tda1004x_state *state = fe->demodulator_priv; |
337 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
338 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
339 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 340 | |
2cf36ac4 | 341 | /* setup PLL configuration */ |
dea74869 PB |
342 | if (fe->ops.i2c_gate_ctrl) |
343 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
344 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
345 | return -EIO; | |
86ddd96f | 346 | msleep(1); |
2cf36ac4 | 347 | |
1da177e4 LT |
348 | return 0; |
349 | } | |
350 | ||
2cf36ac4 HH |
351 | /* ------------------------------------------------------------------ */ |
352 | ||
2cf36ac4 | 353 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
354 | .demod_address = 0x8, |
355 | .invert = 1, | |
2cf36ac4 | 356 | .invert_oclk = 0, |
86ddd96f MCC |
357 | .xtal_freq = TDA10046_XTAL_4M, |
358 | .agc_config = TDA10046_AGC_DEFAULT, | |
359 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
360 | .tuner_address = 0x60, |
361 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
362 | }; |
363 | ||
2cf36ac4 HH |
364 | static struct tda1004x_config philips_tu1216_61_config = { |
365 | ||
366 | .demod_address = 0x8, | |
367 | .invert = 1, | |
368 | .invert_oclk = 0, | |
369 | .xtal_freq = TDA10046_XTAL_4M, | |
370 | .agc_config = TDA10046_AGC_DEFAULT, | |
371 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
372 | .tuner_address = 0x61, |
373 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
374 | }; |
375 | ||
376 | /* ------------------------------------------------------------------ */ | |
377 | ||
cbb94521 | 378 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
379 | { |
380 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
381 | struct tda1004x_state *state = fe->demodulator_priv; |
382 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 383 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 384 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
385 | |
386 | /* setup PLL configuration */ | |
dea74869 PB |
387 | if (fe->ops.i2c_gate_ctrl) |
388 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
389 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
390 | return -EIO; | |
2cf36ac4 HH |
391 | return 0; |
392 | } | |
393 | ||
a79ddae9 | 394 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 395 | { |
58ef4f92 HH |
396 | return philips_tda6651_pll_set(fe, params); |
397 | } | |
398 | ||
399 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
400 | { | |
401 | struct saa7134_dev *dev = fe->dvb->priv; | |
402 | struct tda1004x_state *state = fe->demodulator_priv; | |
403 | u8 addr = state->config->tuner_address; | |
404 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
405 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
406 | ||
407 | /* switch the tuner to analog mode */ | |
408 | if (fe->ops.i2c_gate_ctrl) | |
409 | fe->ops.i2c_gate_ctrl(fe, 1); | |
410 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
411 | return -EIO; | |
412 | return 0; | |
2cf36ac4 HH |
413 | } |
414 | ||
58ef4f92 HH |
415 | /* ------------------------------------------------------------------ */ |
416 | ||
cbb94521 HH |
417 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
418 | { | |
419 | struct saa7134_dev *dev = fe->dvb->priv; | |
420 | static u8 msg[] = { 0x00, 0x40}; | |
421 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
422 | ||
423 | ||
424 | if (philips_td1316_tuner_init(fe)) | |
425 | return -EIO; | |
426 | msleep(1); | |
427 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
428 | return -EIO; | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
a79ddae9 | 433 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
434 | { |
435 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 436 | |
58ef4f92 HH |
437 | static u8 msg[] = { 0x00, 0x14 }; |
438 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
439 | ||
440 | if (philips_td1316_tuner_sleep(fe)) | |
441 | return -EIO; | |
2cf36ac4 HH |
442 | |
443 | /* switch the board to analog mode */ | |
dea74869 PB |
444 | if (fe->ops.i2c_gate_ctrl) |
445 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 446 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
447 | return 0; |
448 | } | |
449 | ||
450 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
451 | { | |
452 | struct saa7134_dev *dev = fe->dvb->priv; | |
453 | ||
454 | if (dev->original_demod_sleep) | |
455 | dev->original_demod_sleep(fe); | |
dea74869 | 456 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 457 | return 0; |
2cf36ac4 HH |
458 | } |
459 | ||
460 | static struct tda1004x_config philips_europa_config = { | |
461 | ||
462 | .demod_address = 0x8, | |
463 | .invert = 0, | |
464 | .invert_oclk = 0, | |
465 | .xtal_freq = TDA10046_XTAL_4M, | |
466 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
467 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
468 | .tuner_address = 0x61, |
469 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
470 | }; |
471 | ||
408b664a | 472 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
473 | .demod_address = 0x08, |
474 | .invert = 1, | |
475 | .invert_oclk = 0, | |
476 | .xtal_freq = TDA10046_XTAL_16M, | |
477 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
478 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
479 | .tuner_address = 0x61, |
480 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
481 | }; |
482 | ||
58ef4f92 HH |
483 | /* ------------------------------------------------------------------ |
484 | * tda 1004x based cards with philips silicon tuner | |
485 | */ | |
486 | ||
58ef4f92 HH |
487 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
488 | { | |
58ef4f92 HH |
489 | struct tda1004x_state *state = fe->demodulator_priv; |
490 | ||
491 | u8 addr = state->config->i2c_gate; | |
492 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
493 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
494 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
495 | if (enable) { | |
496 | tda8290_msg.buf = tda8290_close; | |
497 | } else { | |
498 | tda8290_msg.buf = tda8290_open; | |
499 | } | |
06be3035 | 500 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
501 | struct saa7134_dev *dev = fe->dvb->priv; |
502 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
503 | return -EIO; |
504 | } | |
505 | msleep(20); | |
506 | return 0; | |
507 | } | |
508 | ||
58ef4f92 | 509 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 510 | { |
90e9df7f | 511 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 512 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 513 | |
58ef4f92 HH |
514 | switch (state->config->antenna_switch) { |
515 | case 0: break; | |
516 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
517 | saa7134_set_gpio(dev, 21, 0); | |
518 | break; | |
519 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
520 | saa7134_set_gpio(dev, 21, 1); | |
521 | break; | |
587d2fd7 | 522 | } |
587d2fd7 HH |
523 | return 0; |
524 | } | |
525 | ||
58ef4f92 | 526 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 527 | { |
58ef4f92 HH |
528 | struct saa7134_dev *dev = fe->dvb->priv; |
529 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 530 | |
58ef4f92 HH |
531 | switch (state->config->antenna_switch) { |
532 | case 0: break; | |
533 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
534 | saa7134_set_gpio(dev, 21, 1); | |
535 | break; | |
536 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
537 | saa7134_set_gpio(dev, 21, 0); | |
538 | break; | |
539 | } | |
587d2fd7 | 540 | return 0; |
2d6b5f62 | 541 | } |
90e9df7f | 542 | |
d557dab5 MCC |
543 | static int configure_tda827x_fe(struct saa7134_dev *dev, |
544 | struct tda1004x_config *cdec_conf, | |
545 | struct tda827x_config *tuner_conf) | |
90e9df7f | 546 | { |
363c35fc ST |
547 | struct videobuf_dvb_frontend *fe0; |
548 | ||
92abe9ee DB |
549 | /* Get the first frontend */ |
550 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
363c35fc ST |
551 | |
552 | fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); | |
553 | if (fe0->dvb.frontend) { | |
7bff4b4d | 554 | if (cdec_conf->i2c_gate) |
363c35fc ST |
555 | fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
556 | if (dvb_attach(tda827x_attach, fe0->dvb.frontend, | |
d557dab5 MCC |
557 | cdec_conf->tuner_address, |
558 | &dev->i2c_adap, tuner_conf)) | |
559 | return 0; | |
560 | ||
561 | wprintk("no tda827x tuner found at addr: %02x\n", | |
7bff4b4d | 562 | cdec_conf->tuner_address); |
58ef4f92 | 563 | } |
d557dab5 | 564 | return -EINVAL; |
90e9df7f HH |
565 | } |
566 | ||
58ef4f92 | 567 | /* ------------------------------------------------------------------ */ |
261f5081 | 568 | |
7bff4b4d | 569 | static struct tda827x_config tda827x_cfg_0 = { |
7bff4b4d HH |
570 | .init = philips_tda827x_tuner_init, |
571 | .sleep = philips_tda827x_tuner_sleep, | |
572 | .config = 0, | |
573 | .switch_addr = 0 | |
574 | }; | |
575 | ||
576 | static struct tda827x_config tda827x_cfg_1 = { | |
7bff4b4d HH |
577 | .init = philips_tda827x_tuner_init, |
578 | .sleep = philips_tda827x_tuner_sleep, | |
579 | .config = 1, | |
580 | .switch_addr = 0x4b | |
581 | }; | |
582 | ||
583 | static struct tda827x_config tda827x_cfg_2 = { | |
7bff4b4d HH |
584 | .init = philips_tda827x_tuner_init, |
585 | .sleep = philips_tda827x_tuner_sleep, | |
586 | .config = 2, | |
587 | .switch_addr = 0x4b | |
588 | }; | |
589 | ||
590 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
7bff4b4d HH |
591 | .init = philips_tda827x_tuner_init, |
592 | .sleep = philips_tda827x_tuner_sleep, | |
593 | .config = 2, | |
594 | .switch_addr = 0x42 | |
595 | }; | |
596 | ||
597 | /* ------------------------------------------------------------------ */ | |
598 | ||
58ef4f92 | 599 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
600 | .demod_address = 0x08, |
601 | .invert = 1, | |
602 | .invert_oclk = 0, | |
603 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
604 | .agc_config = TDA10046_AGC_TDA827X, |
605 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 606 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
607 | .tuner_address = 0x60, |
608 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 609 | }; |
550a9a5e | 610 | |
58ef4f92 HH |
611 | static struct tda1004x_config philips_tiger_config = { |
612 | .demod_address = 0x08, | |
613 | .invert = 1, | |
614 | .invert_oclk = 0, | |
615 | .xtal_freq = TDA10046_XTAL_16M, | |
616 | .agc_config = TDA10046_AGC_TDA827X, | |
617 | .gpio_config = TDA10046_GP11_I, | |
618 | .if_freq = TDA10046_FREQ_045, | |
619 | .i2c_gate = 0x4b, | |
620 | .tuner_address = 0x61, | |
58ef4f92 HH |
621 | .antenna_switch= 1, |
622 | .request_firmware = philips_tda1004x_request_firmware | |
623 | }; | |
550a9a5e HH |
624 | |
625 | static struct tda1004x_config cinergy_ht_config = { | |
626 | .demod_address = 0x08, | |
627 | .invert = 1, | |
628 | .invert_oclk = 0, | |
629 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
630 | .agc_config = TDA10046_AGC_TDA827X, |
631 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 632 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
633 | .i2c_gate = 0x4b, |
634 | .tuner_address = 0x61, | |
58ef4f92 | 635 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
636 | }; |
637 | ||
58ef4f92 HH |
638 | static struct tda1004x_config cinergy_ht_pci_config = { |
639 | .demod_address = 0x08, | |
640 | .invert = 1, | |
641 | .invert_oclk = 0, | |
642 | .xtal_freq = TDA10046_XTAL_16M, | |
643 | .agc_config = TDA10046_AGC_TDA827X, | |
644 | .gpio_config = TDA10046_GP01_I, | |
645 | .if_freq = TDA10046_FREQ_045, | |
646 | .i2c_gate = 0x4b, | |
647 | .tuner_address = 0x60, | |
58ef4f92 HH |
648 | .request_firmware = philips_tda1004x_request_firmware |
649 | }; | |
650 | ||
651 | static struct tda1004x_config philips_tiger_s_config = { | |
652 | .demod_address = 0x08, | |
653 | .invert = 1, | |
654 | .invert_oclk = 0, | |
655 | .xtal_freq = TDA10046_XTAL_16M, | |
656 | .agc_config = TDA10046_AGC_TDA827X, | |
657 | .gpio_config = TDA10046_GP01_I, | |
658 | .if_freq = TDA10046_FREQ_045, | |
659 | .i2c_gate = 0x4b, | |
660 | .tuner_address = 0x61, | |
58ef4f92 HH |
661 | .antenna_switch= 1, |
662 | .request_firmware = philips_tda1004x_request_firmware | |
663 | }; | |
df42eaf2 | 664 | |
587d2fd7 HH |
665 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
666 | .demod_address = 0x08, | |
667 | .invert = 1, | |
668 | .invert_oclk = 0, | |
669 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
670 | .agc_config = TDA10046_AGC_TDA827X, |
671 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 672 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
673 | .i2c_gate = 0x4b, |
674 | .tuner_address = 0x61, | |
58ef4f92 | 675 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
676 | }; |
677 | ||
c6e53daf TG |
678 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
679 | .demod_address = 0x08, | |
680 | .invert = 1, | |
681 | .invert_oclk = 0, | |
682 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
683 | .agc_config = TDA10046_AGC_TDA827X, |
684 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 685 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
686 | .i2c_gate = 0x4b, |
687 | .tuner_address = 0x61, | |
688 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
689 | }; |
690 | ||
83646817 HH |
691 | static struct tda1004x_config asus_p7131_dual_config = { |
692 | .demod_address = 0x08, | |
693 | .invert = 1, | |
694 | .invert_oclk = 0, | |
695 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
696 | .agc_config = TDA10046_AGC_TDA827X, |
697 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 698 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
699 | .i2c_gate = 0x4b, |
700 | .tuner_address = 0x61, | |
58ef4f92 HH |
701 | .antenna_switch= 2, |
702 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
703 | }; |
704 | ||
420f32fe NS |
705 | static struct tda1004x_config lifeview_trio_config = { |
706 | .demod_address = 0x09, | |
707 | .invert = 1, | |
708 | .invert_oclk = 0, | |
709 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
710 | .agc_config = TDA10046_AGC_TDA827X, |
711 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 712 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
713 | .tuner_address = 0x60, |
714 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
715 | }; |
716 | ||
58ef4f92 | 717 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
718 | .demod_address = 0x08, |
719 | .invert = 1, | |
720 | .invert_oclk = 0, | |
721 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 722 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 723 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 724 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
725 | .tuner_address = 0x60, |
726 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
727 | }; |
728 | ||
58ef4f92 | 729 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
730 | .demod_address = 0x08, |
731 | .invert = 1, | |
732 | .invert_oclk = 0, | |
733 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 734 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 735 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 736 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
737 | .i2c_gate = 0x4b, |
738 | .tuner_address = 0x60, | |
58ef4f92 | 739 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
740 | }; |
741 | ||
e06cea4c HH |
742 | static struct tda1004x_config asus_p7131_4871_config = { |
743 | .demod_address = 0x08, | |
744 | .invert = 1, | |
745 | .invert_oclk = 0, | |
746 | .xtal_freq = TDA10046_XTAL_16M, | |
747 | .agc_config = TDA10046_AGC_TDA827X, | |
748 | .gpio_config = TDA10046_GP01_I, | |
749 | .if_freq = TDA10046_FREQ_045, | |
750 | .i2c_gate = 0x4b, | |
751 | .tuner_address = 0x61, | |
e06cea4c HH |
752 | .antenna_switch= 2, |
753 | .request_firmware = philips_tda1004x_request_firmware | |
754 | }; | |
755 | ||
f3eec0c0 | 756 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
757 | .demod_address = 0x08, |
758 | .invert = 1, | |
759 | .invert_oclk = 0, | |
760 | .xtal_freq = TDA10046_XTAL_16M, | |
761 | .agc_config = TDA10046_AGC_TDA827X, | |
762 | .gpio_config = TDA10046_GP11_I, | |
763 | .if_freq = TDA10046_FREQ_045, | |
764 | .i2c_gate = 0x4b, | |
765 | .tuner_address = 0x61, | |
e06cea4c HH |
766 | .antenna_switch= 2, |
767 | .request_firmware = philips_tda1004x_request_firmware | |
768 | }; | |
261f5081 | 769 | |
b39423a9 SF |
770 | static struct tda1004x_config kworld_dvb_t_210_config = { |
771 | .demod_address = 0x08, | |
772 | .invert = 1, | |
773 | .invert_oclk = 0, | |
774 | .xtal_freq = TDA10046_XTAL_16M, | |
775 | .agc_config = TDA10046_AGC_TDA827X, | |
776 | .gpio_config = TDA10046_GP11_I, | |
777 | .if_freq = TDA10046_FREQ_045, | |
778 | .i2c_gate = 0x4b, | |
779 | .tuner_address = 0x61, | |
b39423a9 SF |
780 | .antenna_switch= 1, |
781 | .request_firmware = philips_tda1004x_request_firmware | |
782 | }; | |
261f5081 | 783 | |
d90d9f5a ES |
784 | static struct tda1004x_config avermedia_super_007_config = { |
785 | .demod_address = 0x08, | |
786 | .invert = 1, | |
787 | .invert_oclk = 0, | |
788 | .xtal_freq = TDA10046_XTAL_16M, | |
789 | .agc_config = TDA10046_AGC_TDA827X, | |
790 | .gpio_config = TDA10046_GP01_I, | |
791 | .if_freq = TDA10046_FREQ_045, | |
792 | .i2c_gate = 0x4b, | |
793 | .tuner_address = 0x60, | |
d90d9f5a ES |
794 | .antenna_switch= 1, |
795 | .request_firmware = philips_tda1004x_request_firmware | |
796 | }; | |
797 | ||
4ba24373 HP |
798 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
799 | .demod_address = 0x08, | |
800 | .invert = 1, | |
801 | .invert_oclk = 0, | |
802 | .xtal_freq = TDA10046_XTAL_16M, | |
803 | .agc_config = TDA10046_AGC_TDA827X, | |
804 | .gpio_config = TDA10046_GP01_I, | |
805 | .if_freq = TDA10046_FREQ_045, | |
806 | .i2c_gate = 0x42, | |
807 | .tuner_address = 0x61, | |
4ba24373 HP |
808 | .antenna_switch = 1, |
809 | .request_firmware = philips_tda1004x_request_firmware | |
810 | }; | |
811 | ||
301e9d64 | 812 | static struct tda1004x_config asus_tiger_3in1_config = { |
813 | .demod_address = 0x0b, | |
814 | .invert = 1, | |
815 | .invert_oclk = 0, | |
816 | .xtal_freq = TDA10046_XTAL_16M, | |
817 | .agc_config = TDA10046_AGC_TDA827X, | |
818 | .gpio_config = TDA10046_GP11_I, | |
819 | .if_freq = TDA10046_FREQ_045, | |
820 | .i2c_gate = 0x4b, | |
821 | .tuner_address = 0x61, | |
822 | .antenna_switch = 1, | |
823 | .request_firmware = philips_tda1004x_request_firmware | |
824 | }; | |
825 | ||
58ef4f92 HH |
826 | /* ------------------------------------------------------------------ |
827 | * special case: this card uses saa713x GPIO22 for the mode switch | |
828 | */ | |
5eda227f | 829 | |
58ef4f92 | 830 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
831 | { |
832 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
833 | philips_tda827x_tuner_init(fe); |
834 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 835 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
836 | return 0; |
837 | } | |
838 | ||
58ef4f92 | 839 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 840 | { |
5eda227f | 841 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 842 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 843 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
844 | philips_tda827x_tuner_sleep(fe); |
845 | return 0; | |
5eda227f HH |
846 | } |
847 | ||
8ce47dad | 848 | static struct tda827x_config ads_duo_cfg = { |
8ce47dad | 849 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
850 | .sleep = ads_duo_tuner_sleep, |
851 | .config = 0 | |
8ce47dad MK |
852 | }; |
853 | ||
58ef4f92 | 854 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
855 | .demod_address = 0x08, |
856 | .invert = 1, | |
857 | .invert_oclk = 0, | |
858 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 859 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 860 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 861 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
862 | .tuner_address = 0x61, |
863 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
864 | }; |
865 | ||
47aeba5a DB |
866 | static struct zl10353_config behold_h6_config = { |
867 | .demod_address = 0x1e>>1, | |
868 | .no_tuner = 1, | |
869 | .parallel_ts = 1, | |
5f77af93 | 870 | .disable_i2c_gate_ctrl = 1, |
47aeba5a DB |
871 | }; |
872 | ||
58ef4f92 HH |
873 | /* ================================================================== |
874 | * tda10086 based DVB-S cards, helper functions | |
875 | */ | |
876 | ||
e2ac28fa IL |
877 | static struct tda10086_config flydvbs = { |
878 | .demod_address = 0x0e, | |
879 | .invert = 0, | |
ea75baf4 | 880 | .diseqc_tone = 0, |
9a1b04e4 HH |
881 | .xtal_freq = TDA10086_XTAL_16M, |
882 | }; | |
883 | ||
884 | static struct tda10086_config sd1878_4m = { | |
885 | .demod_address = 0x0e, | |
886 | .invert = 0, | |
887 | .diseqc_tone = 0, | |
888 | .xtal_freq = TDA10086_XTAL_4M, | |
e2ac28fa IL |
889 | }; |
890 | ||
1b1cee35 HH |
891 | /* ------------------------------------------------------------------ |
892 | * special case: lnb supply is connected to the gated i2c | |
893 | */ | |
894 | ||
895 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
896 | { | |
897 | int res = -EIO; | |
898 | struct saa7134_dev *dev = fe->dvb->priv; | |
899 | if (fe->ops.i2c_gate_ctrl) { | |
900 | fe->ops.i2c_gate_ctrl(fe, 1); | |
901 | if (dev->original_set_voltage) | |
902 | res = dev->original_set_voltage(fe, voltage); | |
903 | fe->ops.i2c_gate_ctrl(fe, 0); | |
904 | } | |
905 | return res; | |
906 | }; | |
907 | ||
908 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
909 | { | |
910 | int res = -EIO; | |
911 | struct saa7134_dev *dev = fe->dvb->priv; | |
912 | if (fe->ops.i2c_gate_ctrl) { | |
913 | fe->ops.i2c_gate_ctrl(fe, 1); | |
914 | if (dev->original_set_high_voltage) | |
915 | res = dev->original_set_high_voltage(fe, arg); | |
916 | fe->ops.i2c_gate_ctrl(fe, 0); | |
917 | } | |
918 | return res; | |
919 | }; | |
920 | ||
5823b3a6 HH |
921 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
922 | { | |
923 | struct saa7134_dev *dev = fe->dvb->priv; | |
924 | u8 wbuf[2] = { 0x1f, 00 }; | |
925 | u8 rbuf; | |
926 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
927 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
928 | ||
929 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
930 | return -EIO; | |
931 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
932 | if (voltage == SEC_VOLTAGE_18) | |
933 | wbuf[1] = rbuf | 0x10; | |
934 | else | |
935 | wbuf[1] = rbuf & 0xef; | |
936 | msg[0].len = 2; | |
937 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
938 | return 0; | |
939 | } | |
940 | ||
941 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
942 | { | |
943 | struct saa7134_dev *dev = fe->dvb->priv; | |
944 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
945 | return -EIO; | |
946 | } | |
947 | ||
58ef4f92 HH |
948 | /* ================================================================== |
949 | * nxt200x based ATSC cards, helper functions | |
950 | */ | |
90e9df7f | 951 | |
3b64e8e2 MK |
952 | static struct nxt200x_config avertvhda180 = { |
953 | .demod_address = 0x0a, | |
3b64e8e2 | 954 | }; |
3e1410ad AB |
955 | |
956 | static struct nxt200x_config kworldatsc110 = { | |
957 | .demod_address = 0x0a, | |
3e1410ad | 958 | }; |
3b64e8e2 | 959 | |
04574185 MS |
960 | /* ------------------------------------------------------------------ */ |
961 | ||
962 | static struct mt312_config avertv_a700_mt312 = { | |
963 | .demod_address = 0x0e, | |
964 | .voltage_inverted = 1, | |
965 | }; | |
966 | ||
967 | static struct zl10036_config avertv_a700_tuner = { | |
968 | .tuner_address = 0x60, | |
969 | }; | |
970 | ||
3abdedd8 MK |
971 | static struct lgdt3305_config hcw_lgdt3305_config = { |
972 | .i2c_addr = 0x0e, | |
973 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
974 | .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE, | |
975 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
976 | .deny_i2c_rptr = 1, | |
977 | .spectral_inversion = 1, | |
978 | .qam_if_khz = 4000, | |
979 | .vsb_if_khz = 3250, | |
980 | }; | |
981 | ||
1bc7f51c MK |
982 | static struct tda10048_config hcw_tda10048_config = { |
983 | .demod_address = 0x10 >> 1, | |
984 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
985 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
986 | .inversion = TDA10048_INVERSION_ON, | |
987 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
988 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
989 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
990 | .clk_freq_khz = TDA10048_CLK_16000, | |
991 | .disable_gate_access = 1, | |
992 | }; | |
993 | ||
3abdedd8 MK |
994 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
995 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, | |
996 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
997 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
998 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
999 | }; | |
1000 | ||
1001 | static struct tda18271_config hcw_tda18271_config = { | |
1002 | .std_map = &hauppauge_tda18271_std_map, | |
1003 | .gate = TDA18271_GATE_ANALOG, | |
1004 | .config = 3, | |
1005 | }; | |
1006 | ||
1007 | static struct tda829x_config tda829x_no_probe = { | |
1008 | .probe_tuner = TDA829X_DONT_PROBE, | |
1009 | }; | |
1010 | ||
58ef4f92 HH |
1011 | /* ================================================================== |
1012 | * Core code | |
1013 | */ | |
1da177e4 LT |
1014 | |
1015 | static int dvb_init(struct saa7134_dev *dev) | |
1016 | { | |
1c4f76ab | 1017 | int ret; |
bc36a686 | 1018 | int attach_xc3028 = 0; |
363c35fc ST |
1019 | struct videobuf_dvb_frontend *fe0; |
1020 | ||
f972e0bd DB |
1021 | /* FIXME: add support for multi-frontend */ |
1022 | mutex_init(&dev->frontends.lock); | |
7bdf84fc | 1023 | INIT_LIST_HEAD(&dev->frontends.felist); |
f972e0bd DB |
1024 | |
1025 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); | |
f3f741e7 DB |
1026 | fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1); |
1027 | if (!fe0) { | |
f972e0bd DB |
1028 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1029 | return -ENOMEM; | |
1030 | } | |
1031 | ||
1da177e4 LT |
1032 | /* init struct videobuf_dvb */ |
1033 | dev->ts.nr_bufs = 32; | |
1034 | dev->ts.nr_packets = 32*4; | |
363c35fc ST |
1035 | fe0->dvb.name = dev->name; |
1036 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops, | |
0705135e | 1037 | &dev->pci->dev, &dev->slock, |
1da177e4 LT |
1038 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
1039 | V4L2_FIELD_ALTERNATE, | |
1040 | sizeof(struct saa7134_buf), | |
1041 | dev); | |
1042 | ||
1043 | switch (dev->board) { | |
1044 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 1045 | dprintk("pinnacle 300i dvb setup\n"); |
363c35fc | 1046 | fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 1047 | &dev->i2c_adap); |
363c35fc ST |
1048 | if (fe0->dvb.frontend) { |
1049 | fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; | |
6b3ccab7 | 1050 | } |
1da177e4 | 1051 | break; |
a78d0bfa | 1052 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 1053 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 1054 | dprintk("avertv 777 dvb setup\n"); |
363c35fc | 1055 | fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 1056 | &dev->i2c_adap); |
363c35fc ST |
1057 | if (fe0->dvb.frontend) { |
1058 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
fb147e97 MK |
1059 | &dev->i2c_adap, 0x61, |
1060 | TUNER_PHILIPS_TD1316); | |
6b3ccab7 | 1061 | } |
a78d0bfa | 1062 | break; |
95a2fdb6 | 1063 | case SAA7134_BOARD_AVERMEDIA_A16D: |
6e501a3f | 1064 | dprintk("AverMedia A16D dvb setup\n"); |
363c35fc | 1065 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1066 | &avermedia_xc3028_mt352_dev, |
1067 | &dev->i2c_adap); | |
95a2fdb6 MCC |
1068 | attach_xc3028 = 1; |
1069 | break; | |
1da177e4 | 1070 | case SAA7134_BOARD_MD7134: |
363c35fc | 1071 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1072 | &medion_cardbus, |
1073 | &dev->i2c_adap); | |
363c35fc ST |
1074 | if (fe0->dvb.frontend) { |
1075 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
cb89cd33 MK |
1076 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1077 | TUNER_PHILIPS_FMD1216ME_MK3); | |
6b3ccab7 | 1078 | } |
1da177e4 | 1079 | break; |
86ddd96f | 1080 | case SAA7134_BOARD_PHILIPS_TOUGH: |
363c35fc | 1081 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1082 | &philips_tu1216_60_config, |
1083 | &dev->i2c_adap); | |
363c35fc ST |
1084 | if (fe0->dvb.frontend) { |
1085 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1086 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1087 | } |
86ddd96f MCC |
1088 | break; |
1089 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1090 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
d557dab5 MCC |
1091 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1092 | &tda827x_cfg_0) < 0) | |
1093 | goto dettach_frontend; | |
86ddd96f | 1094 | break; |
2cf36ac4 | 1095 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1096 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
363c35fc | 1097 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1098 | &philips_europa_config, |
1099 | &dev->i2c_adap); | |
363c35fc ST |
1100 | if (fe0->dvb.frontend) { |
1101 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1102 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1103 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1104 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1105 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1106 | } |
2cf36ac4 HH |
1107 | break; |
1108 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
363c35fc | 1109 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1110 | &philips_tu1216_61_config, |
1111 | &dev->i2c_adap); | |
363c35fc ST |
1112 | if (fe0->dvb.frontend) { |
1113 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1114 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1115 | } |
2cf36ac4 | 1116 | break; |
b39423a9 | 1117 | case SAA7134_BOARD_KWORLD_DVBT_210: |
d557dab5 MCC |
1118 | if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config, |
1119 | &tda827x_cfg_2) < 0) | |
1120 | goto dettach_frontend; | |
b39423a9 | 1121 | break; |
0e316ecf | 1122 | case SAA7134_BOARD_HAUPPAUGE_HVR1120: |
1bc7f51c MK |
1123 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
1124 | &hcw_tda10048_config, | |
1125 | &dev->i2c_adap); | |
1126 | if (fe0->dvb.frontend != NULL) { | |
1127 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1128 | &dev->i2c_adap, 0x4b, | |
1129 | &tda829x_no_probe); | |
1130 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1131 | 0x60, &dev->i2c_adap, | |
1132 | &hcw_tda18271_config); | |
1133 | } | |
1134 | break; | |
90e9df7f | 1135 | case SAA7134_BOARD_PHILIPS_TIGER: |
d557dab5 MCC |
1136 | if (configure_tda827x_fe(dev, &philips_tiger_config, |
1137 | &tda827x_cfg_0) < 0) | |
1138 | goto dettach_frontend; | |
587d2fd7 HH |
1139 | break; |
1140 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
d557dab5 MCC |
1141 | if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, |
1142 | &tda827x_cfg_1) < 0) | |
1143 | goto dettach_frontend; | |
90e9df7f | 1144 | break; |
c6e53daf | 1145 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
d557dab5 MCC |
1146 | if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, |
1147 | &tda827x_cfg_1) < 0) | |
1148 | goto dettach_frontend; | |
c6e53daf | 1149 | break; |
b5f05064 | 1150 | case SAA7134_BOARD_HAUPPAUGE_HVR1150: |
3abdedd8 MK |
1151 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, |
1152 | &hcw_lgdt3305_config, | |
1153 | &dev->i2c_adap); | |
1154 | if (fe0->dvb.frontend) { | |
1155 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1156 | &dev->i2c_adap, 0x4b, | |
1157 | &tda829x_no_probe); | |
1158 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1159 | 0x60, &dev->i2c_adap, | |
1160 | &hcw_tda18271_config); | |
1161 | } | |
1162 | break; | |
d4b0aba4 | 1163 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
d557dab5 MCC |
1164 | if (configure_tda827x_fe(dev, &asus_p7131_dual_config, |
1165 | &tda827x_cfg_0) < 0) | |
1166 | goto dettach_frontend; | |
d4b0aba4 | 1167 | break; |
3d8466ec | 1168 | case SAA7134_BOARD_FLYDVBT_LR301: |
d557dab5 MCC |
1169 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1170 | &tda827x_cfg_0) < 0) | |
1171 | goto dettach_frontend; | |
3d8466ec | 1172 | break; |
92abe9ee | 1173 | case SAA7134_BOARD_FLYDVB_TRIO: |
d557dab5 MCC |
1174 | if (!use_frontend) { /* terrestrial */ |
1175 | if (configure_tda827x_fe(dev, &lifeview_trio_config, | |
1176 | &tda827x_cfg_0) < 0) | |
1177 | goto dettach_frontend; | |
7bff4b4d | 1178 | } else { /* satellite */ |
363c35fc ST |
1179 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1180 | if (fe0->dvb.frontend) { | |
1181 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63, | |
1f683cd8 | 1182 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1183 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
d557dab5 | 1184 | goto dettach_frontend; |
1f683cd8 | 1185 | } |
363c35fc | 1186 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap, |
1f683cd8 | 1187 | 0x08, 0, 0) == NULL) { |
5823b3a6 | 1188 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
d557dab5 | 1189 | goto dettach_frontend; |
1f683cd8 NS |
1190 | } |
1191 | } | |
6b3ccab7 | 1192 | } |
420f32fe | 1193 | break; |
df42eaf2 | 1194 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1195 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
363c35fc | 1196 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1197 | &ads_tech_duo_config, |
1198 | &dev->i2c_adap); | |
363c35fc ST |
1199 | if (fe0->dvb.frontend) { |
1200 | if (dvb_attach(tda827x_attach,fe0->dvb.frontend, | |
7bff4b4d HH |
1201 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1202 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1203 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d | 1204 | ads_tech_duo_config.tuner_address); |
d557dab5 | 1205 | goto dettach_frontend; |
ede2200d | 1206 | } |
bc36ec74 MCC |
1207 | } else |
1208 | wprintk("failed to attach tda10046\n"); | |
df42eaf2 | 1209 | break; |
3dfb729f | 1210 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
d557dab5 MCC |
1211 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
1212 | &tda827x_cfg_0) < 0) | |
1213 | goto dettach_frontend; | |
d95b8942 | 1214 | break; |
5eda227f | 1215 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1216 | if (!use_frontend) { /* terrestrial */ |
d557dab5 MCC |
1217 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1218 | &tda827x_cfg_0) < 0) | |
1219 | goto dettach_frontend; | |
4b1431ca | 1220 | } else { /* satellite */ |
363c35fc | 1221 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
4b1431ca | 1222 | &flydvbs, &dev->i2c_adap); |
363c35fc ST |
1223 | if (fe0->dvb.frontend) { |
1224 | struct dvb_frontend *fe = fe0->dvb.frontend; | |
5823b3a6 HH |
1225 | u8 dev_id = dev->eedata[2]; |
1226 | u8 data = 0xc4; | |
1227 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1228 | ||
363c35fc | 1229 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, |
d557dab5 | 1230 | 0x60, &dev->i2c_adap, 0) == NULL) { |
4b1431ca | 1231 | wprintk("%s: Medion Quadro, no tda826x " |
5823b3a6 | 1232 | "found !\n", __func__); |
d557dab5 MCC |
1233 | goto dettach_frontend; |
1234 | } | |
5823b3a6 HH |
1235 | if (dev_id != 0x08) { |
1236 | /* we need to open the i2c gate (we know it exists) */ | |
1237 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1238 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1239 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 HH |
1240 | wprintk("%s: Medion Quadro, no ISL6405 " |
1241 | "found !\n", __func__); | |
d557dab5 MCC |
1242 | goto dettach_frontend; |
1243 | } | |
e9c1ac9d HH |
1244 | if (dev_id == 0x07) { |
1245 | /* fire up the 2nd section of the LNB supply since | |
1246 | we can't do this from the other section */ | |
1247 | msg.buf = &data; | |
1248 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1249 | } | |
5823b3a6 HH |
1250 | fe->ops.i2c_gate_ctrl(fe, 0); |
1251 | dev->original_set_voltage = fe->ops.set_voltage; | |
1252 | fe->ops.set_voltage = md8800_set_voltage; | |
1253 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1254 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1255 | } else { | |
1256 | fe->ops.set_voltage = md8800_set_voltage2; | |
1257 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1258 | } | |
4b1431ca HH |
1259 | } |
1260 | } | |
5eda227f | 1261 | break; |
3b64e8e2 | 1262 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
363c35fc | 1263 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
f7b54b10 | 1264 | &dev->i2c_adap); |
363c35fc ST |
1265 | if (fe0->dvb.frontend) |
1266 | dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61, | |
47a9991e | 1267 | NULL, DVB_PLL_TDHU2); |
3b64e8e2 | 1268 | break; |
f689d908 | 1269 | case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI: |
3e1410ad | 1270 | case SAA7134_BOARD_KWORLD_ATSC110: |
363c35fc | 1271 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
f7b54b10 | 1272 | &dev->i2c_adap); |
363c35fc ST |
1273 | if (fe0->dvb.frontend) |
1274 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
62ff817a MK |
1275 | &dev->i2c_adap, 0x61, |
1276 | TUNER_PHILIPS_TUV1236D); | |
3e1410ad | 1277 | break; |
e2ac28fa | 1278 | case SAA7134_BOARD_FLYDVBS_LR300: |
363c35fc | 1279 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
f7b54b10 | 1280 | &dev->i2c_adap); |
363c35fc ST |
1281 | if (fe0->dvb.frontend) { |
1282 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
f7b54b10 | 1283 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1284 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 | 1285 | goto dettach_frontend; |
e2ac28fa | 1286 | } |
363c35fc | 1287 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
f7b54b10 | 1288 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 | 1289 | wprintk("%s: No ISL6421 found!\n", __func__); |
d557dab5 | 1290 | goto dettach_frontend; |
e2ac28fa IL |
1291 | } |
1292 | } | |
1293 | break; | |
cf146ca4 | 1294 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
363c35fc | 1295 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
0e8f4cc5 MS |
1296 | &medion_cardbus, |
1297 | &dev->i2c_adap); | |
363c35fc ST |
1298 | if (fe0->dvb.frontend) { |
1299 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1300 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 | 1301 | |
363c35fc | 1302 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, |
cb89cd33 MK |
1303 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1304 | TUNER_PHILIPS_FMD1216ME_MK3); | |
cf146ca4 HH |
1305 | } |
1306 | break; | |
cbb94521 | 1307 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
363c35fc | 1308 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
cbb94521 HH |
1309 | &philips_europa_config, |
1310 | &dev->i2c_adap); | |
363c35fc ST |
1311 | if (fe0->dvb.frontend) { |
1312 | fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1313 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
cbb94521 HH |
1314 | } |
1315 | break; | |
550a9a5e | 1316 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
d557dab5 MCC |
1317 | if (configure_tda827x_fe(dev, &cinergy_ht_config, |
1318 | &tda827x_cfg_0) < 0) | |
1319 | goto dettach_frontend; | |
9de271e6 MK |
1320 | break; |
1321 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
d557dab5 MCC |
1322 | if (configure_tda827x_fe(dev, &cinergy_ht_pci_config, |
1323 | &tda827x_cfg_0) < 0) | |
1324 | goto dettach_frontend; | |
58ef4f92 HH |
1325 | break; |
1326 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
d557dab5 MCC |
1327 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1328 | &tda827x_cfg_2) < 0) | |
1329 | goto dettach_frontend; | |
550a9a5e | 1330 | break; |
e06cea4c | 1331 | case SAA7134_BOARD_ASUS_P7131_4871: |
d557dab5 MCC |
1332 | if (configure_tda827x_fe(dev, &asus_p7131_4871_config, |
1333 | &tda827x_cfg_2) < 0) | |
1334 | goto dettach_frontend; | |
e06cea4c | 1335 | break; |
f3eec0c0 | 1336 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
d557dab5 MCC |
1337 | if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, |
1338 | &tda827x_cfg_2) < 0) | |
1339 | goto dettach_frontend; | |
e06cea4c | 1340 | break; |
d90d9f5a | 1341 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
d557dab5 MCC |
1342 | if (configure_tda827x_fe(dev, &avermedia_super_007_config, |
1343 | &tda827x_cfg_0) < 0) | |
1344 | goto dettach_frontend; | |
d90d9f5a | 1345 | break; |
4ba24373 | 1346 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
d557dab5 MCC |
1347 | if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, |
1348 | &tda827x_cfg_2_sw42) < 0) | |
1349 | goto dettach_frontend; | |
4ba24373 | 1350 | break; |
6ab465a8 | 1351 | case SAA7134_BOARD_PHILIPS_SNAKE: |
363c35fc | 1352 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
6ab465a8 | 1353 | &dev->i2c_adap); |
363c35fc ST |
1354 | if (fe0->dvb.frontend) { |
1355 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
d557dab5 | 1356 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1357 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 MCC |
1358 | goto dettach_frontend; |
1359 | } | |
363c35fc | 1360 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
d557dab5 | 1361 | &dev->i2c_adap, 0, 0) == NULL) { |
5823b3a6 | 1362 | wprintk("%s: No lnbp21 found!\n", __func__); |
d557dab5 MCC |
1363 | goto dettach_frontend; |
1364 | } | |
6ab465a8 HH |
1365 | } |
1366 | break; | |
7b5b3f17 | 1367 | case SAA7134_BOARD_CREATIX_CTX953: |
d557dab5 MCC |
1368 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1369 | &tda827x_cfg_0) < 0) | |
1370 | goto dettach_frontend; | |
7b5b3f17 | 1371 | break; |
6a6179b6 | 1372 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
d557dab5 MCC |
1373 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1374 | &tda827x_cfg_2) < 0) | |
1375 | goto dettach_frontend; | |
6a6179b6 | 1376 | break; |
bc36a686 | 1377 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
6e501a3f TF |
1378 | dprintk("AverMedia E506R dvb setup\n"); |
1379 | saa7134_set_gpio(dev, 25, 0); | |
1380 | msleep(10); | |
1381 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1382 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1383 | &avermedia_xc3028_mt352_dev, |
1384 | &dev->i2c_adap); | |
bc36a686 | 1385 | attach_xc3028 = 1; |
e2fc00c2 | 1386 | break; |
637afdb5 | 1387 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
363c35fc | 1388 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
9a1b04e4 | 1389 | &sd1878_4m, &dev->i2c_adap); |
363c35fc | 1390 | if (fe0->dvb.frontend) { |
637afdb5 | 1391 | struct dvb_frontend *fe; |
363c35fc | 1392 | if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, |
d557dab5 | 1393 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) { |
637afdb5 | 1394 | wprintk("%s: MD7134 DVB-S, no SD1878 " |
5823b3a6 | 1395 | "found !\n", __func__); |
d557dab5 MCC |
1396 | goto dettach_frontend; |
1397 | } | |
637afdb5 | 1398 | /* we need to open the i2c gate (we know it exists) */ |
363c35fc | 1399 | fe = fe0->dvb.frontend; |
637afdb5 HH |
1400 | fe->ops.i2c_gate_ctrl(fe, 1); |
1401 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1402 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
637afdb5 | 1403 | wprintk("%s: MD7134 DVB-S, no ISL6405 " |
5823b3a6 | 1404 | "found !\n", __func__); |
d557dab5 MCC |
1405 | goto dettach_frontend; |
1406 | } | |
637afdb5 HH |
1407 | fe->ops.i2c_gate_ctrl(fe, 0); |
1408 | dev->original_set_voltage = fe->ops.set_voltage; | |
1409 | fe->ops.set_voltage = md8800_set_voltage; | |
1410 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1411 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1412 | } | |
1413 | break; | |
e2fc00c2 MP |
1414 | case SAA7134_BOARD_AVERMEDIA_M103: |
1415 | saa7134_set_gpio(dev, 25, 0); | |
1416 | msleep(10); | |
1417 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1418 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
e2fc00c2 MP |
1419 | &avermedia_xc3028_mt352_dev, |
1420 | &dev->i2c_adap); | |
1421 | attach_xc3028 = 1; | |
1422 | break; | |
301e9d64 | 1423 | case SAA7134_BOARD_ASUSTeK_TIGER_3IN1: |
1424 | if (!use_frontend) { /* terrestrial */ | |
1425 | if (configure_tda827x_fe(dev, &asus_tiger_3in1_config, | |
1426 | &tda827x_cfg_2) < 0) | |
1427 | goto dettach_frontend; | |
1428 | } else { /* satellite */ | |
363c35fc | 1429 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
301e9d64 | 1430 | &flydvbs, &dev->i2c_adap); |
363c35fc | 1431 | if (fe0->dvb.frontend) { |
301e9d64 | 1432 | if (dvb_attach(tda826x_attach, |
363c35fc | 1433 | fe0->dvb.frontend, 0x60, |
301e9d64 | 1434 | &dev->i2c_adap, 0) == NULL) { |
1435 | wprintk("%s: Asus Tiger 3in1, no " | |
1436 | "tda826x found!\n", __func__); | |
1437 | goto dettach_frontend; | |
1438 | } | |
363c35fc | 1439 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
301e9d64 | 1440 | &dev->i2c_adap, 0, 0) == NULL) { |
1441 | wprintk("%s: Asus Tiger 3in1, no lnbp21" | |
1442 | " found!\n", __func__); | |
1443 | goto dettach_frontend; | |
1444 | } | |
1445 | } | |
1446 | } | |
1447 | break; | |
028165a3 HP |
1448 | case SAA7134_BOARD_ASUSTeK_TIGER: |
1449 | if (configure_tda827x_fe(dev, &philips_tiger_config, | |
1450 | &tda827x_cfg_0) < 0) | |
1451 | goto dettach_frontend; | |
1452 | break; | |
47aeba5a | 1453 | case SAA7134_BOARD_BEHOLD_H6: |
b0c4be8c | 1454 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
47aeba5a DB |
1455 | &behold_h6_config, |
1456 | &dev->i2c_adap); | |
b0c4be8c MCC |
1457 | if (fe0->dvb.frontend) { |
1458 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
47aeba5a DB |
1459 | &dev->i2c_adap, 0x61, |
1460 | TUNER_PHILIPS_FMD1216ME_MK3); | |
1461 | } | |
04574185 MS |
1462 | break; |
1463 | case SAA7134_BOARD_AVERMEDIA_A700_PRO: | |
1464 | case SAA7134_BOARD_AVERMEDIA_A700_HYBRID: | |
1465 | /* Zarlink ZL10313 */ | |
1466 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1467 | &avertv_a700_mt312, &dev->i2c_adap); | |
1468 | if (fe0->dvb.frontend) { | |
1469 | if (dvb_attach(zl10036_attach, fe0->dvb.frontend, | |
1470 | &avertv_a700_tuner, &dev->i2c_adap) == NULL) { | |
1471 | wprintk("%s: No zl10036 found!\n", | |
1472 | __func__); | |
1473 | } | |
1474 | } | |
47aeba5a | 1475 | break; |
1da177e4 | 1476 | default: |
cf3c34c8 | 1477 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1478 | break; |
1479 | } | |
1480 | ||
bc36a686 MCC |
1481 | if (attach_xc3028) { |
1482 | struct dvb_frontend *fe; | |
1483 | struct xc2028_config cfg = { | |
1484 | .i2c_adap = &dev->i2c_adap, | |
1485 | .i2c_addr = 0x61, | |
bc36a686 | 1486 | }; |
95a2fdb6 | 1487 | |
363c35fc | 1488 | if (!fe0->dvb.frontend) |
f3f741e7 | 1489 | goto dettach_frontend; |
95a2fdb6 | 1490 | |
363c35fc | 1491 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
bc36a686 MCC |
1492 | if (!fe) { |
1493 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1494 | dev->name); | |
d557dab5 | 1495 | goto dettach_frontend; |
bc36a686 MCC |
1496 | } |
1497 | } | |
1498 | ||
363c35fc | 1499 | if (NULL == fe0->dvb.frontend) { |
cf3c34c8 | 1500 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
f3f741e7 | 1501 | goto dettach_frontend; |
1da177e4 | 1502 | } |
d7cba043 | 1503 | /* define general-purpose callback pointer */ |
363c35fc | 1504 | fe0->dvb.frontend->callback = saa7134_tuner_callback; |
1da177e4 LT |
1505 | |
1506 | /* register everything else */ | |
363c35fc | 1507 | ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
59b1842d | 1508 | &dev->pci->dev, adapter_nr, 0); |
1c4f76ab HH |
1509 | |
1510 | /* this sequence is necessary to make the tda1004x load its firmware | |
1511 | * and to enter analog mode of hybrid boards | |
1512 | */ | |
1513 | if (!ret) { | |
363c35fc ST |
1514 | if (fe0->dvb.frontend->ops.init) |
1515 | fe0->dvb.frontend->ops.init(fe0->dvb.frontend); | |
1516 | if (fe0->dvb.frontend->ops.sleep) | |
1517 | fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend); | |
1518 | if (fe0->dvb.frontend->ops.tuner_ops.sleep) | |
1519 | fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend); | |
1c4f76ab HH |
1520 | } |
1521 | return ret; | |
d557dab5 MCC |
1522 | |
1523 | dettach_frontend: | |
f3f741e7 DB |
1524 | videobuf_dvb_dealloc_frontends(&dev->frontends); |
1525 | return -EINVAL; | |
1da177e4 LT |
1526 | } |
1527 | ||
1528 | static int dvb_fini(struct saa7134_dev *dev) | |
1529 | { | |
363c35fc ST |
1530 | struct videobuf_dvb_frontend *fe0; |
1531 | ||
1532 | /* Get the first frontend */ | |
1533 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
1534 | if (!fe0) | |
1535 | return -EINVAL; | |
1536 | ||
7f171123 MCC |
1537 | /* FIXME: I suspect that this code is bogus, since the entry for |
1538 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1539 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1540 | */ | |
1541 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1542 | struct v4l2_priv_tun_config tda9887_cfg; | |
1543 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1544 | ||
1545 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1546 | tda9887_cfg.priv = &on; | |
1da177e4 | 1547 | |
1da177e4 | 1548 | /* otherwise we don't detect the tuner on next insmod */ |
fac6986c | 1549 | saa_call_all(dev, tuner, s_config, &tda9887_cfg); |
5823b3a6 | 1550 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
e9c1ac9d | 1551 | if ((dev->eedata[2] == 0x07) && use_frontend) { |
5823b3a6 HH |
1552 | /* turn off the 2nd lnb supply */ |
1553 | u8 data = 0x80; | |
1554 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1555 | struct dvb_frontend *fe; | |
363c35fc | 1556 | fe = fe0->dvb.frontend; |
5823b3a6 HH |
1557 | if (fe->ops.i2c_gate_ctrl) { |
1558 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1559 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1560 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1561 | } | |
1562 | } | |
7f171123 | 1563 | } |
f3f741e7 | 1564 | videobuf_dvb_unregister_bus(&dev->frontends); |
1da177e4 LT |
1565 | return 0; |
1566 | } | |
1567 | ||
1568 | static struct saa7134_mpeg_ops dvb_ops = { | |
1569 | .type = SAA7134_MPEG_DVB, | |
1570 | .init = dvb_init, | |
1571 | .fini = dvb_fini, | |
1572 | }; | |
1573 | ||
1574 | static int __init dvb_register(void) | |
1575 | { | |
1576 | return saa7134_ts_register(&dvb_ops); | |
1577 | } | |
1578 | ||
1579 | static void __exit dvb_unregister(void) | |
1580 | { | |
1581 | saa7134_ts_unregister(&dvb_ops); | |
1582 | } | |
1583 | ||
1584 | module_init(dvb_register); | |
1585 | module_exit(dvb_unregister); | |
1586 | ||
1587 | /* ------------------------------------------------------------------ */ | |
1588 | /* | |
1589 | * Local variables: | |
1590 | * c-basic-offset: 8 | |
1591 | * End: | |
1592 | */ |