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V4L/DVB (9062): Add support for Prolink Pixelview Global Extreme
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
5823b3a6 36#include <dvb_frontend.h>
1da177e4 37
1f10c7af
AQ
38#include "mt352.h"
39#include "mt352_priv.h" /* FIXME */
40#include "tda1004x.h"
41#include "nxt200x.h"
bc36a686 42#include "tuner-xc2028.h"
1da177e4 43
e2ac28fa
IL
44#include "tda10086.h"
45#include "tda826x.h"
8ce47dad 46#include "tda827x.h"
e2ac28fa 47#include "isl6421.h"
4b1431ca 48#include "isl6405.h"
6ab465a8 49#include "lnbp21.h"
cb89cd33 50#include "tuner-simple.h"
8ce47dad 51
1da177e4
LT
52MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
53MODULE_LICENSE("GPL");
54
ff699e6b 55static unsigned int antenna_pwr;
86ddd96f 56
1da177e4
LT
57module_param(antenna_pwr, int, 0444);
58MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
59
ff699e6b 60static int use_frontend;
b331daa0
SB
61module_param(use_frontend, int, 0644);
62MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 63
ff699e6b 64static int debug;
58ef4f92
HH
65module_param(debug, int, 0644);
66MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
67
78e92006
JG
68DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
69
cf3c34c8
TP
70#define dprintk(fmt, arg...) do { if (debug) \
71 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
72
73/* Print a warning */
74#define wprintk(fmt, arg...) \
75 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
76
77/* ------------------------------------------------------------------
78 * mt352 based DVB-T cards
79 */
80
1da177e4
LT
81static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
82{
83 u32 ok;
84
85 if (!on) {
86 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
87 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
88 return 0;
89 }
90
91 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
92 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
93 udelay(10);
94
95 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
96 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
97 udelay(10);
98 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
99 udelay(10);
100 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 101 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT
102
103 if (!ok)
104 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
105 return ok;
106}
107
108static int mt352_pinnacle_init(struct dvb_frontend* fe)
109{
110 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
111 static u8 reset [] = { RESET, 0x80 };
112 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
113 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
114 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
115 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
116 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
117 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
118 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
119 struct saa7134_dev *dev= fe->dvb->priv;
120
5823b3a6 121 dprintk("%s called\n", __func__);
1da177e4
LT
122
123 mt352_write(fe, clock_config, sizeof(clock_config));
124 udelay(200);
125 mt352_write(fe, reset, sizeof(reset));
126 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
127 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
128 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
129 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
130
131 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
132 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
133 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 134
1da177e4
LT
135 return 0;
136}
137
a78d0bfa
JAR
138static int mt352_aver777_init(struct dvb_frontend* fe)
139{
140 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
141 static u8 reset [] = { RESET, 0x80 };
142 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
143 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
144 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
145
146 mt352_write(fe, clock_config, sizeof(clock_config));
147 udelay(200);
148 mt352_write(fe, reset, sizeof(reset));
149 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
150 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
151 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
152
153 return 0;
154}
155
6e501a3f 156static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 157{
6e501a3f
TF
158 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
159 static u8 reset [] = { RESET, 0x80 };
160 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
161 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC
162 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
163
164 mt352_write(fe, clock_config, sizeof(clock_config));
165 udelay(200);
166 mt352_write(fe, reset, sizeof(reset));
167 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
168 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
169 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC
170 return 0;
171}
172
0463f12c
AQ
173static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
174 struct dvb_frontend_parameters* params)
1da177e4 175{
df8cf706
HH
176 u8 off[] = { 0x00, 0xf1};
177 u8 on[] = { 0x00, 0x71};
178 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
179
1da177e4
LT
180 struct saa7134_dev *dev = fe->dvb->priv;
181 struct v4l2_frequency f;
182
183 /* set frequency (mt2050) */
184 f.tuner = 0;
185 f.type = V4L2_TUNER_DIGITAL_TV;
186 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB
187 if (fe->ops.i2c_gate_ctrl)
188 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 189 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 190 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 191 msg.buf = on;
dea74869
PB
192 if (fe->ops.i2c_gate_ctrl)
193 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 194 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
195
196 pinnacle_antenna_pwr(dev, antenna_pwr);
197
198 /* mt352 setup */
0463f12c 199 return mt352_pinnacle_init(fe);
1da177e4
LT
200}
201
202static struct mt352_config pinnacle_300i = {
203 .demod_address = 0x3c >> 1,
204 .adc_clock = 20333,
205 .if2 = 36150,
206 .no_tuner = 1,
207 .demod_init = mt352_pinnacle_init,
1da177e4 208};
a78d0bfa
JAR
209
210static struct mt352_config avermedia_777 = {
211 .demod_address = 0xf,
212 .demod_init = mt352_aver777_init,
a78d0bfa 213};
1da177e4 214
6e501a3f 215static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC
216 .demod_address = (0x1e >> 1),
217 .no_tuner = 1,
6e501a3f 218 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC
219};
220
58ef4f92
HH
221/* ==================================================================
222 * tda1004x based DVB-T cards, helper functions
223 */
224
225static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
226 const struct firmware **fw, char *name)
1da177e4
LT
227{
228 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
229 return request_firmware(fw, name, &dev->pci->dev);
230}
231
58ef4f92
HH
232/* ------------------------------------------------------------------
233 * these tuners are tu1216, td1316(a)
234 */
235
236static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
237{
238 struct saa7134_dev *dev = fe->dvb->priv;
239 struct tda1004x_state *state = fe->demodulator_priv;
240 u8 addr = state->config->tuner_address;
86ddd96f 241 u8 tuner_buf[4];
2cf36ac4 242 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
243 sizeof(tuner_buf) };
244 int tuner_frequency = 0;
245 u8 band, cp, filter;
246
247 /* determine charge pump */
248 tuner_frequency = params->frequency + 36166000;
249 if (tuner_frequency < 87000000)
250 return -EINVAL;
251 else if (tuner_frequency < 130000000)
252 cp = 3;
253 else if (tuner_frequency < 160000000)
254 cp = 5;
255 else if (tuner_frequency < 200000000)
256 cp = 6;
257 else if (tuner_frequency < 290000000)
258 cp = 3;
259 else if (tuner_frequency < 420000000)
260 cp = 5;
261 else if (tuner_frequency < 480000000)
262 cp = 6;
263 else if (tuner_frequency < 620000000)
264 cp = 3;
265 else if (tuner_frequency < 830000000)
266 cp = 5;
267 else if (tuner_frequency < 895000000)
268 cp = 7;
269 else
270 return -EINVAL;
271
272 /* determine band */
273 if (params->frequency < 49000000)
274 return -EINVAL;
275 else if (params->frequency < 161000000)
276 band = 1;
277 else if (params->frequency < 444000000)
278 band = 2;
279 else if (params->frequency < 861000000)
280 band = 4;
281 else
282 return -EINVAL;
283
284 /* setup PLL filter */
285 switch (params->u.ofdm.bandwidth) {
286 case BANDWIDTH_6_MHZ:
287 filter = 0;
288 break;
289
290 case BANDWIDTH_7_MHZ:
291 filter = 0;
292 break;
293
294 case BANDWIDTH_8_MHZ:
295 filter = 1;
296 break;
1da177e4 297
86ddd96f
MCC
298 default:
299 return -EINVAL;
300 }
301
302 /* calculate divisor
303 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 304 */
86ddd96f
MCC
305 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
306
307 /* setup tuner buffer */
308 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
309 tuner_buf[1] = tuner_frequency & 0xff;
310 tuner_buf[2] = 0xca;
311 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
312
dea74869
PB
313 if (fe->ops.i2c_gate_ctrl)
314 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 315 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
316 wprintk("could not write to tuner at addr: 0x%02x\n",
317 addr << 1);
86ddd96f 318 return -EIO;
58ef4f92 319 }
2cf36ac4
HH
320 msleep(1);
321 return 0;
322}
323
58ef4f92 324static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
325{
326 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
327 struct tda1004x_state *state = fe->demodulator_priv;
328 u8 addr = state->config->tuner_address;
2cf36ac4
HH
329 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
330 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 331
2cf36ac4 332 /* setup PLL configuration */
dea74869
PB
333 if (fe->ops.i2c_gate_ctrl)
334 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
335 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
336 return -EIO;
86ddd96f 337 msleep(1);
2cf36ac4 338
1da177e4
LT
339 return 0;
340}
341
2cf36ac4
HH
342/* ------------------------------------------------------------------ */
343
2cf36ac4 344static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
345 .demod_address = 0x8,
346 .invert = 1,
2cf36ac4 347 .invert_oclk = 0,
86ddd96f
MCC
348 .xtal_freq = TDA10046_XTAL_4M,
349 .agc_config = TDA10046_AGC_DEFAULT,
350 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
351 .tuner_address = 0x60,
352 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
353};
354
2cf36ac4
HH
355static struct tda1004x_config philips_tu1216_61_config = {
356
357 .demod_address = 0x8,
358 .invert = 1,
359 .invert_oclk = 0,
360 .xtal_freq = TDA10046_XTAL_4M,
361 .agc_config = TDA10046_AGC_DEFAULT,
362 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
363 .tuner_address = 0x61,
364 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
365};
366
367/* ------------------------------------------------------------------ */
368
cbb94521 369static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
370{
371 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
372 struct tda1004x_state *state = fe->demodulator_priv;
373 u8 addr = state->config->tuner_address;
2cf36ac4 374 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 375 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
376
377 /* setup PLL configuration */
dea74869
PB
378 if (fe->ops.i2c_gate_ctrl)
379 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
380 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
381 return -EIO;
2cf36ac4
HH
382 return 0;
383}
384
a79ddae9 385static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4 386{
58ef4f92
HH
387 return philips_tda6651_pll_set(fe, params);
388}
389
390static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
391{
392 struct saa7134_dev *dev = fe->dvb->priv;
393 struct tda1004x_state *state = fe->demodulator_priv;
394 u8 addr = state->config->tuner_address;
395 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
396 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
397
398 /* switch the tuner to analog mode */
399 if (fe->ops.i2c_gate_ctrl)
400 fe->ops.i2c_gate_ctrl(fe, 1);
401 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
402 return -EIO;
403 return 0;
2cf36ac4
HH
404}
405
58ef4f92
HH
406/* ------------------------------------------------------------------ */
407
cbb94521
HH
408static int philips_europa_tuner_init(struct dvb_frontend *fe)
409{
410 struct saa7134_dev *dev = fe->dvb->priv;
411 static u8 msg[] = { 0x00, 0x40};
412 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
413
414
415 if (philips_td1316_tuner_init(fe))
416 return -EIO;
417 msleep(1);
418 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
419 return -EIO;
420
421 return 0;
422}
423
a79ddae9 424static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
425{
426 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 427
58ef4f92
HH
428 static u8 msg[] = { 0x00, 0x14 };
429 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
430
431 if (philips_td1316_tuner_sleep(fe))
432 return -EIO;
2cf36ac4
HH
433
434 /* switch the board to analog mode */
dea74869
PB
435 if (fe->ops.i2c_gate_ctrl)
436 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 437 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
438 return 0;
439}
440
441static int philips_europa_demod_sleep(struct dvb_frontend *fe)
442{
443 struct saa7134_dev *dev = fe->dvb->priv;
444
445 if (dev->original_demod_sleep)
446 dev->original_demod_sleep(fe);
dea74869 447 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 448 return 0;
2cf36ac4
HH
449}
450
451static struct tda1004x_config philips_europa_config = {
452
453 .demod_address = 0x8,
454 .invert = 0,
455 .invert_oclk = 0,
456 .xtal_freq = TDA10046_XTAL_4M,
457 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
458 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
459 .tuner_address = 0x61,
460 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
461};
462
408b664a 463static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
464 .demod_address = 0x08,
465 .invert = 1,
466 .invert_oclk = 0,
467 .xtal_freq = TDA10046_XTAL_16M,
468 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
469 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
470 .tuner_address = 0x61,
471 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
472};
473
58ef4f92
HH
474/* ------------------------------------------------------------------
475 * tda 1004x based cards with philips silicon tuner
476 */
477
58ef4f92
HH
478static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
479{
58ef4f92
HH
480 struct tda1004x_state *state = fe->demodulator_priv;
481
482 u8 addr = state->config->i2c_gate;
483 static u8 tda8290_close[] = { 0x21, 0xc0};
484 static u8 tda8290_open[] = { 0x21, 0x80};
485 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
486 if (enable) {
487 tda8290_msg.buf = tda8290_close;
488 } else {
489 tda8290_msg.buf = tda8290_open;
490 }
06be3035 491 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
492 struct saa7134_dev *dev = fe->dvb->priv;
493 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
494 return -EIO;
495 }
496 msleep(20);
497 return 0;
498}
499
58ef4f92 500static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 501{
90e9df7f 502 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 503 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 504
58ef4f92
HH
505 switch (state->config->antenna_switch) {
506 case 0: break;
507 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
508 saa7134_set_gpio(dev, 21, 0);
509 break;
510 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
511 saa7134_set_gpio(dev, 21, 1);
512 break;
587d2fd7 513 }
587d2fd7
HH
514 return 0;
515}
516
58ef4f92 517static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 518{
58ef4f92
HH
519 struct saa7134_dev *dev = fe->dvb->priv;
520 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 521
58ef4f92
HH
522 switch (state->config->antenna_switch) {
523 case 0: break;
524 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
525 saa7134_set_gpio(dev, 21, 1);
526 break;
527 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
528 saa7134_set_gpio(dev, 21, 0);
529 break;
530 }
587d2fd7 531 return 0;
2d6b5f62 532}
90e9df7f 533
d557dab5
MCC
534static int configure_tda827x_fe(struct saa7134_dev *dev,
535 struct tda1004x_config *cdec_conf,
536 struct tda827x_config *tuner_conf)
90e9df7f 537{
7bff4b4d 538 dev->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
58ef4f92 539 if (dev->dvb.frontend) {
7bff4b4d 540 if (cdec_conf->i2c_gate)
58ef4f92 541 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
d557dab5
MCC
542 if (dvb_attach(tda827x_attach, dev->dvb.frontend,
543 cdec_conf->tuner_address,
544 &dev->i2c_adap, tuner_conf))
545 return 0;
546
547 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 548 cdec_conf->tuner_address);
58ef4f92 549 }
d557dab5 550 return -EINVAL;
90e9df7f
HH
551}
552
58ef4f92 553/* ------------------------------------------------------------------ */
261f5081 554
7bff4b4d 555static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH
556 .init = philips_tda827x_tuner_init,
557 .sleep = philips_tda827x_tuner_sleep,
558 .config = 0,
559 .switch_addr = 0
560};
561
562static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH
563 .init = philips_tda827x_tuner_init,
564 .sleep = philips_tda827x_tuner_sleep,
565 .config = 1,
566 .switch_addr = 0x4b
567};
568
569static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH
570 .init = philips_tda827x_tuner_init,
571 .sleep = philips_tda827x_tuner_sleep,
572 .config = 2,
573 .switch_addr = 0x4b
574};
575
576static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH
577 .init = philips_tda827x_tuner_init,
578 .sleep = philips_tda827x_tuner_sleep,
579 .config = 2,
580 .switch_addr = 0x42
581};
582
583/* ------------------------------------------------------------------ */
584
58ef4f92 585static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
586 .demod_address = 0x08,
587 .invert = 1,
588 .invert_oclk = 0,
589 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
590 .agc_config = TDA10046_AGC_TDA827X,
591 .gpio_config = TDA10046_GP11_I,
550a9a5e 592 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
593 .tuner_address = 0x60,
594 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 595};
550a9a5e 596
58ef4f92
HH
597static struct tda1004x_config philips_tiger_config = {
598 .demod_address = 0x08,
599 .invert = 1,
600 .invert_oclk = 0,
601 .xtal_freq = TDA10046_XTAL_16M,
602 .agc_config = TDA10046_AGC_TDA827X,
603 .gpio_config = TDA10046_GP11_I,
604 .if_freq = TDA10046_FREQ_045,
605 .i2c_gate = 0x4b,
606 .tuner_address = 0x61,
58ef4f92
HH
607 .antenna_switch= 1,
608 .request_firmware = philips_tda1004x_request_firmware
609};
550a9a5e
HH
610
611static struct tda1004x_config cinergy_ht_config = {
612 .demod_address = 0x08,
613 .invert = 1,
614 .invert_oclk = 0,
615 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
616 .agc_config = TDA10046_AGC_TDA827X,
617 .gpio_config = TDA10046_GP01_I,
90e9df7f 618 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
619 .i2c_gate = 0x4b,
620 .tuner_address = 0x61,
58ef4f92 621 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
622};
623
58ef4f92
HH
624static struct tda1004x_config cinergy_ht_pci_config = {
625 .demod_address = 0x08,
626 .invert = 1,
627 .invert_oclk = 0,
628 .xtal_freq = TDA10046_XTAL_16M,
629 .agc_config = TDA10046_AGC_TDA827X,
630 .gpio_config = TDA10046_GP01_I,
631 .if_freq = TDA10046_FREQ_045,
632 .i2c_gate = 0x4b,
633 .tuner_address = 0x60,
58ef4f92
HH
634 .request_firmware = philips_tda1004x_request_firmware
635};
636
637static struct tda1004x_config philips_tiger_s_config = {
638 .demod_address = 0x08,
639 .invert = 1,
640 .invert_oclk = 0,
641 .xtal_freq = TDA10046_XTAL_16M,
642 .agc_config = TDA10046_AGC_TDA827X,
643 .gpio_config = TDA10046_GP01_I,
644 .if_freq = TDA10046_FREQ_045,
645 .i2c_gate = 0x4b,
646 .tuner_address = 0x61,
58ef4f92
HH
647 .antenna_switch= 1,
648 .request_firmware = philips_tda1004x_request_firmware
649};
df42eaf2 650
587d2fd7
HH
651static struct tda1004x_config pinnacle_pctv_310i_config = {
652 .demod_address = 0x08,
653 .invert = 1,
654 .invert_oclk = 0,
655 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
656 .agc_config = TDA10046_AGC_TDA827X,
657 .gpio_config = TDA10046_GP11_I,
587d2fd7 658 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
659 .i2c_gate = 0x4b,
660 .tuner_address = 0x61,
58ef4f92 661 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
662};
663
c6e53daf
TG
664static struct tda1004x_config hauppauge_hvr_1110_config = {
665 .demod_address = 0x08,
666 .invert = 1,
667 .invert_oclk = 0,
668 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
669 .agc_config = TDA10046_AGC_TDA827X,
670 .gpio_config = TDA10046_GP11_I,
c6e53daf 671 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
672 .i2c_gate = 0x4b,
673 .tuner_address = 0x61,
674 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
675};
676
83646817
HH
677static struct tda1004x_config asus_p7131_dual_config = {
678 .demod_address = 0x08,
679 .invert = 1,
680 .invert_oclk = 0,
681 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
682 .agc_config = TDA10046_AGC_TDA827X,
683 .gpio_config = TDA10046_GP11_I,
83646817 684 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
685 .i2c_gate = 0x4b,
686 .tuner_address = 0x61,
58ef4f92
HH
687 .antenna_switch= 2,
688 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
689};
690
420f32fe
NS
691static struct tda1004x_config lifeview_trio_config = {
692 .demod_address = 0x09,
693 .invert = 1,
694 .invert_oclk = 0,
695 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
696 .agc_config = TDA10046_AGC_TDA827X,
697 .gpio_config = TDA10046_GP00_I,
420f32fe 698 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
699 .tuner_address = 0x60,
700 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
701};
702
58ef4f92 703static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
704 .demod_address = 0x08,
705 .invert = 1,
706 .invert_oclk = 0,
707 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 708 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 709 .gpio_config = TDA10046_GP11_I,
df42eaf2 710 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
711 .tuner_address = 0x60,
712 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
713};
714
58ef4f92 715static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
716 .demod_address = 0x08,
717 .invert = 1,
718 .invert_oclk = 0,
719 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 720 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 721 .gpio_config = TDA10046_GP01_I,
3dfb729f 722 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
723 .i2c_gate = 0x4b,
724 .tuner_address = 0x60,
58ef4f92 725 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
726};
727
e06cea4c
HH
728static struct tda1004x_config asus_p7131_4871_config = {
729 .demod_address = 0x08,
730 .invert = 1,
731 .invert_oclk = 0,
732 .xtal_freq = TDA10046_XTAL_16M,
733 .agc_config = TDA10046_AGC_TDA827X,
734 .gpio_config = TDA10046_GP01_I,
735 .if_freq = TDA10046_FREQ_045,
736 .i2c_gate = 0x4b,
737 .tuner_address = 0x61,
e06cea4c
HH
738 .antenna_switch= 2,
739 .request_firmware = philips_tda1004x_request_firmware
740};
741
f3eec0c0 742static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
743 .demod_address = 0x08,
744 .invert = 1,
745 .invert_oclk = 0,
746 .xtal_freq = TDA10046_XTAL_16M,
747 .agc_config = TDA10046_AGC_TDA827X,
748 .gpio_config = TDA10046_GP11_I,
749 .if_freq = TDA10046_FREQ_045,
750 .i2c_gate = 0x4b,
751 .tuner_address = 0x61,
e06cea4c
HH
752 .antenna_switch= 2,
753 .request_firmware = philips_tda1004x_request_firmware
754};
261f5081 755
b39423a9
SF
756static struct tda1004x_config kworld_dvb_t_210_config = {
757 .demod_address = 0x08,
758 .invert = 1,
759 .invert_oclk = 0,
760 .xtal_freq = TDA10046_XTAL_16M,
761 .agc_config = TDA10046_AGC_TDA827X,
762 .gpio_config = TDA10046_GP11_I,
763 .if_freq = TDA10046_FREQ_045,
764 .i2c_gate = 0x4b,
765 .tuner_address = 0x61,
b39423a9
SF
766 .antenna_switch= 1,
767 .request_firmware = philips_tda1004x_request_firmware
768};
261f5081 769
d90d9f5a
ES
770static struct tda1004x_config avermedia_super_007_config = {
771 .demod_address = 0x08,
772 .invert = 1,
773 .invert_oclk = 0,
774 .xtal_freq = TDA10046_XTAL_16M,
775 .agc_config = TDA10046_AGC_TDA827X,
776 .gpio_config = TDA10046_GP01_I,
777 .if_freq = TDA10046_FREQ_045,
778 .i2c_gate = 0x4b,
779 .tuner_address = 0x60,
d90d9f5a
ES
780 .antenna_switch= 1,
781 .request_firmware = philips_tda1004x_request_firmware
782};
783
4ba24373
HP
784static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
785 .demod_address = 0x08,
786 .invert = 1,
787 .invert_oclk = 0,
788 .xtal_freq = TDA10046_XTAL_16M,
789 .agc_config = TDA10046_AGC_TDA827X,
790 .gpio_config = TDA10046_GP01_I,
791 .if_freq = TDA10046_FREQ_045,
792 .i2c_gate = 0x42,
793 .tuner_address = 0x61,
4ba24373
HP
794 .antenna_switch = 1,
795 .request_firmware = philips_tda1004x_request_firmware
796};
797
301e9d64 798static struct tda1004x_config asus_tiger_3in1_config = {
799 .demod_address = 0x0b,
800 .invert = 1,
801 .invert_oclk = 0,
802 .xtal_freq = TDA10046_XTAL_16M,
803 .agc_config = TDA10046_AGC_TDA827X,
804 .gpio_config = TDA10046_GP11_I,
805 .if_freq = TDA10046_FREQ_045,
806 .i2c_gate = 0x4b,
807 .tuner_address = 0x61,
808 .antenna_switch = 1,
809 .request_firmware = philips_tda1004x_request_firmware
810};
811
58ef4f92
HH
812/* ------------------------------------------------------------------
813 * special case: this card uses saa713x GPIO22 for the mode switch
814 */
5eda227f 815
58ef4f92 816static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
817{
818 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
819 philips_tda827x_tuner_init(fe);
820 /* route TDA8275a AGC input to the channel decoder */
06be3035 821 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
822 return 0;
823}
824
58ef4f92 825static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 826{
5eda227f 827 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 828 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 829 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
830 philips_tda827x_tuner_sleep(fe);
831 return 0;
5eda227f
HH
832}
833
8ce47dad 834static struct tda827x_config ads_duo_cfg = {
8ce47dad 835 .init = ads_duo_tuner_init,
7bff4b4d
HH
836 .sleep = ads_duo_tuner_sleep,
837 .config = 0
8ce47dad
MK
838};
839
58ef4f92 840static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
841 .demod_address = 0x08,
842 .invert = 1,
843 .invert_oclk = 0,
844 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 845 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 846 .gpio_config = TDA10046_GP00_I,
5eda227f 847 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
848 .tuner_address = 0x61,
849 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
850};
851
58ef4f92
HH
852/* ==================================================================
853 * tda10086 based DVB-S cards, helper functions
854 */
855
e2ac28fa
IL
856static struct tda10086_config flydvbs = {
857 .demod_address = 0x0e,
858 .invert = 0,
ea75baf4 859 .diseqc_tone = 0,
9a1b04e4
HH
860 .xtal_freq = TDA10086_XTAL_16M,
861};
862
863static struct tda10086_config sd1878_4m = {
864 .demod_address = 0x0e,
865 .invert = 0,
866 .diseqc_tone = 0,
867 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL
868};
869
1b1cee35
HH
870/* ------------------------------------------------------------------
871 * special case: lnb supply is connected to the gated i2c
872 */
873
874static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
875{
876 int res = -EIO;
877 struct saa7134_dev *dev = fe->dvb->priv;
878 if (fe->ops.i2c_gate_ctrl) {
879 fe->ops.i2c_gate_ctrl(fe, 1);
880 if (dev->original_set_voltage)
881 res = dev->original_set_voltage(fe, voltage);
882 fe->ops.i2c_gate_ctrl(fe, 0);
883 }
884 return res;
885};
886
887static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
888{
889 int res = -EIO;
890 struct saa7134_dev *dev = fe->dvb->priv;
891 if (fe->ops.i2c_gate_ctrl) {
892 fe->ops.i2c_gate_ctrl(fe, 1);
893 if (dev->original_set_high_voltage)
894 res = dev->original_set_high_voltage(fe, arg);
895 fe->ops.i2c_gate_ctrl(fe, 0);
896 }
897 return res;
898};
899
5823b3a6
HH
900static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
901{
902 struct saa7134_dev *dev = fe->dvb->priv;
903 u8 wbuf[2] = { 0x1f, 00 };
904 u8 rbuf;
905 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
906 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
907
908 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
909 return -EIO;
910 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
911 if (voltage == SEC_VOLTAGE_18)
912 wbuf[1] = rbuf | 0x10;
913 else
914 wbuf[1] = rbuf & 0xef;
915 msg[0].len = 2;
916 i2c_transfer(&dev->i2c_adap, msg, 1);
917 return 0;
918}
919
920static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
921{
922 struct saa7134_dev *dev = fe->dvb->priv;
923 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
924 return -EIO;
925}
926
58ef4f92
HH
927/* ==================================================================
928 * nxt200x based ATSC cards, helper functions
929 */
90e9df7f 930
3b64e8e2
MK
931static struct nxt200x_config avertvhda180 = {
932 .demod_address = 0x0a,
3b64e8e2 933};
3e1410ad
AB
934
935static struct nxt200x_config kworldatsc110 = {
936 .demod_address = 0x0a,
3e1410ad 937};
3b64e8e2 938
58ef4f92
HH
939/* ==================================================================
940 * Core code
941 */
1da177e4
LT
942
943static int dvb_init(struct saa7134_dev *dev)
944{
1c4f76ab 945 int ret;
bc36a686
MCC
946 int attach_xc3028 = 0;
947
1da177e4
LT
948 /* init struct videobuf_dvb */
949 dev->ts.nr_bufs = 32;
950 dev->ts.nr_packets = 32*4;
951 dev->dvb.name = dev->name;
0705135e
GL
952 videobuf_queue_sg_init(&dev->dvb.dvbq, &saa7134_ts_qops,
953 &dev->pci->dev, &dev->slock,
1da177e4
LT
954 V4L2_BUF_TYPE_VIDEO_CAPTURE,
955 V4L2_FIELD_ALTERNATE,
956 sizeof(struct saa7134_buf),
957 dev);
958
959 switch (dev->board) {
960 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 961 dprintk("pinnacle 300i dvb setup\n");
2bfe031d 962 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 963 &dev->i2c_adap);
6b3ccab7 964 if (dev->dvb.frontend) {
dea74869 965 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 966 }
1da177e4 967 break;
a78d0bfa 968 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 969 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 970 dprintk("avertv 777 dvb setup\n");
2bfe031d 971 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 972 &dev->i2c_adap);
6b3ccab7 973 if (dev->dvb.frontend) {
fb147e97
MK
974 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
975 &dev->i2c_adap, 0x61,
976 TUNER_PHILIPS_TD1316);
6b3ccab7 977 }
a78d0bfa 978 break;
95a2fdb6 979 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f
TF
980 dprintk("AverMedia A16D dvb setup\n");
981 dev->dvb.frontend = dvb_attach(mt352_attach,
982 &avermedia_xc3028_mt352_dev,
983 &dev->i2c_adap);
95a2fdb6
MCC
984 attach_xc3028 = 1;
985 break;
1da177e4 986 case SAA7134_BOARD_MD7134:
f7b54b10
MK
987 dev->dvb.frontend = dvb_attach(tda10046_attach,
988 &medion_cardbus,
989 &dev->i2c_adap);
6b3ccab7 990 if (dev->dvb.frontend) {
cb89cd33
MK
991 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
992 &dev->i2c_adap, medion_cardbus.tuner_address,
993 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 994 }
1da177e4 995 break;
86ddd96f 996 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK
997 dev->dvb.frontend = dvb_attach(tda10046_attach,
998 &philips_tu1216_60_config,
999 &dev->i2c_adap);
6b3ccab7 1000 if (dev->dvb.frontend) {
58ef4f92
HH
1001 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1002 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1003 }
86ddd96f
MCC
1004 break;
1005 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1006 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC
1007 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1008 &tda827x_cfg_0) < 0)
1009 goto dettach_frontend;
86ddd96f 1010 break;
2cf36ac4 1011 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1012 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK
1013 dev->dvb.frontend = dvb_attach(tda10046_attach,
1014 &philips_europa_config,
1015 &dev->i2c_adap);
6b3ccab7 1016 if (dev->dvb.frontend) {
588f9831
HH
1017 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1018 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB
1019 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1020 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1021 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1022 }
2cf36ac4
HH
1023 break;
1024 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK
1025 dev->dvb.frontend = dvb_attach(tda10046_attach,
1026 &philips_tu1216_61_config,
1027 &dev->i2c_adap);
6b3ccab7 1028 if (dev->dvb.frontend) {
58ef4f92
HH
1029 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1030 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1031 }
2cf36ac4 1032 break;
b39423a9 1033 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC
1034 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1035 &tda827x_cfg_2) < 0)
1036 goto dettach_frontend;
b39423a9 1037 break;
90e9df7f 1038 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC
1039 if (configure_tda827x_fe(dev, &philips_tiger_config,
1040 &tda827x_cfg_0) < 0)
1041 goto dettach_frontend;
587d2fd7
HH
1042 break;
1043 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC
1044 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1045 &tda827x_cfg_1) < 0)
1046 goto dettach_frontend;
90e9df7f 1047 break;
c6e53daf 1048 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC
1049 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1050 &tda827x_cfg_1) < 0)
1051 goto dettach_frontend;
c6e53daf 1052 break;
d4b0aba4 1053 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC
1054 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1055 &tda827x_cfg_0) < 0)
1056 goto dettach_frontend;
d4b0aba4 1057 break;
3d8466ec 1058 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC
1059 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1060 &tda827x_cfg_0) < 0)
1061 goto dettach_frontend;
3d8466ec 1062 break;
420f32fe 1063 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC
1064 if (!use_frontend) { /* terrestrial */
1065 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1066 &tda827x_cfg_0) < 0)
1067 goto dettach_frontend;
7bff4b4d 1068 } else { /* satellite */
1f683cd8
NS
1069 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1070 if (dev->dvb.frontend) {
1071 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63,
1072 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1073 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
d557dab5 1074 goto dettach_frontend;
1f683cd8
NS
1075 }
1076 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap,
1077 0x08, 0, 0) == NULL) {
5823b3a6 1078 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
d557dab5 1079 goto dettach_frontend;
1f683cd8
NS
1080 }
1081 }
6b3ccab7 1082 }
420f32fe 1083 break;
df42eaf2 1084 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1085 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK
1086 dev->dvb.frontend = dvb_attach(tda10046_attach,
1087 &ads_tech_duo_config,
1088 &dev->i2c_adap);
6b3ccab7 1089 if (dev->dvb.frontend) {
ede2200d 1090 if (dvb_attach(tda827x_attach,dev->dvb.frontend,
7bff4b4d
HH
1091 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1092 &ads_duo_cfg) == NULL) {
cf3c34c8 1093 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1094 ads_tech_duo_config.tuner_address);
d557dab5 1095 goto dettach_frontend;
ede2200d 1096 }
bc36ec74
MCC
1097 } else
1098 wprintk("failed to attach tda10046\n");
df42eaf2 1099 break;
3dfb729f 1100 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC
1101 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1102 &tda827x_cfg_0) < 0)
1103 goto dettach_frontend;
d95b8942 1104 break;
5eda227f 1105 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1106 if (!use_frontend) { /* terrestrial */
d557dab5
MCC
1107 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1108 &tda827x_cfg_0) < 0)
1109 goto dettach_frontend;
4b1431ca
HH
1110 } else { /* satellite */
1111 dev->dvb.frontend = dvb_attach(tda10086_attach,
1112 &flydvbs, &dev->i2c_adap);
1113 if (dev->dvb.frontend) {
5823b3a6
HH
1114 struct dvb_frontend *fe = dev->dvb.frontend;
1115 u8 dev_id = dev->eedata[2];
1116 u8 data = 0xc4;
1117 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1118
4b1431ca 1119 if (dvb_attach(tda826x_attach, dev->dvb.frontend,
d557dab5 1120 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1121 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1122 "found !\n", __func__);
d557dab5
MCC
1123 goto dettach_frontend;
1124 }
5823b3a6
HH
1125 if (dev_id != 0x08) {
1126 /* we need to open the i2c gate (we know it exists) */
1127 fe->ops.i2c_gate_ctrl(fe, 1);
1128 if (dvb_attach(isl6405_attach, fe,
d557dab5 1129 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH
1130 wprintk("%s: Medion Quadro, no ISL6405 "
1131 "found !\n", __func__);
d557dab5
MCC
1132 goto dettach_frontend;
1133 }
e9c1ac9d
HH
1134 if (dev_id == 0x07) {
1135 /* fire up the 2nd section of the LNB supply since
1136 we can't do this from the other section */
1137 msg.buf = &data;
1138 i2c_transfer(&dev->i2c_adap, &msg, 1);
1139 }
5823b3a6
HH
1140 fe->ops.i2c_gate_ctrl(fe, 0);
1141 dev->original_set_voltage = fe->ops.set_voltage;
1142 fe->ops.set_voltage = md8800_set_voltage;
1143 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1144 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1145 } else {
1146 fe->ops.set_voltage = md8800_set_voltage2;
1147 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1148 }
4b1431ca
HH
1149 }
1150 }
5eda227f 1151 break;
3b64e8e2 1152 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK
1153 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
1154 &dev->i2c_adap);
d557dab5 1155 if (dev->dvb.frontend)
4ad8eee5 1156 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
47a9991e 1157 NULL, DVB_PLL_TDHU2);
3b64e8e2 1158 break;
3e1410ad 1159 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK
1160 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
1161 &dev->i2c_adap);
d557dab5 1162 if (dev->dvb.frontend)
62ff817a
MK
1163 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
1164 &dev->i2c_adap, 0x61,
1165 TUNER_PHILIPS_TUV1236D);
3e1410ad 1166 break;
e2ac28fa 1167 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK
1168 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1169 &dev->i2c_adap);
e2ac28fa 1170 if (dev->dvb.frontend) {
f7b54b10
MK
1171 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1172 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1173 wprintk("%s: No tda826x found!\n", __func__);
d557dab5 1174 goto dettach_frontend;
e2ac28fa 1175 }
f7b54b10
MK
1176 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1177 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6 1178 wprintk("%s: No ISL6421 found!\n", __func__);
d557dab5 1179 goto dettach_frontend;
e2ac28fa
IL
1180 }
1181 }
1182 break;
cf146ca4 1183 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
0e8f4cc5
MS
1184 dev->dvb.frontend = dvb_attach(tda10046_attach,
1185 &medion_cardbus,
1186 &dev->i2c_adap);
cf146ca4
HH
1187 if (dev->dvb.frontend) {
1188 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1189 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1190
cb89cd33
MK
1191 dvb_attach(simple_tuner_attach, dev->dvb.frontend,
1192 &dev->i2c_adap, medion_cardbus.tuner_address,
1193 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH
1194 }
1195 break;
cbb94521
HH
1196 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
1197 dev->dvb.frontend = dvb_attach(tda10046_attach,
1198 &philips_europa_config,
1199 &dev->i2c_adap);
1200 if (dev->dvb.frontend) {
1201 dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1202 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1203 }
1204 break;
550a9a5e 1205 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC
1206 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1207 &tda827x_cfg_0) < 0)
1208 goto dettach_frontend;
9de271e6
MK
1209 break;
1210 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC
1211 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1212 &tda827x_cfg_0) < 0)
1213 goto dettach_frontend;
58ef4f92
HH
1214 break;
1215 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC
1216 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1217 &tda827x_cfg_2) < 0)
1218 goto dettach_frontend;
550a9a5e 1219 break;
e06cea4c 1220 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC
1221 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1222 &tda827x_cfg_2) < 0)
1223 goto dettach_frontend;
e06cea4c 1224 break;
f3eec0c0 1225 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC
1226 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1227 &tda827x_cfg_2) < 0)
1228 goto dettach_frontend;
e06cea4c 1229 break;
d90d9f5a 1230 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC
1231 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1232 &tda827x_cfg_0) < 0)
1233 goto dettach_frontend;
d90d9f5a 1234 break;
4ba24373 1235 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC
1236 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1237 &tda827x_cfg_2_sw42) < 0)
1238 goto dettach_frontend;
4ba24373 1239 break;
6ab465a8
HH
1240 case SAA7134_BOARD_PHILIPS_SNAKE:
1241 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1242 &dev->i2c_adap);
1243 if (dev->dvb.frontend) {
1244 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
d557dab5 1245 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1246 wprintk("%s: No tda826x found!\n", __func__);
d557dab5
MCC
1247 goto dettach_frontend;
1248 }
6ab465a8 1249 if (dvb_attach(lnbp21_attach, dev->dvb.frontend,
d557dab5 1250 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1251 wprintk("%s: No lnbp21 found!\n", __func__);
d557dab5
MCC
1252 goto dettach_frontend;
1253 }
6ab465a8
HH
1254 }
1255 break;
7b5b3f17 1256 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC
1257 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1258 &tda827x_cfg_0) < 0)
1259 goto dettach_frontend;
7b5b3f17 1260 break;
6a6179b6 1261 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC
1262 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1263 &tda827x_cfg_2) < 0)
1264 goto dettach_frontend;
6a6179b6 1265 break;
bc36a686 1266 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF
1267 dprintk("AverMedia E506R dvb setup\n");
1268 saa7134_set_gpio(dev, 25, 0);
1269 msleep(10);
1270 saa7134_set_gpio(dev, 25, 1);
bc36a686 1271 dev->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1272 &avermedia_xc3028_mt352_dev,
1273 &dev->i2c_adap);
bc36a686 1274 attach_xc3028 = 1;
e2fc00c2 1275 break;
637afdb5
HH
1276 case SAA7134_BOARD_MD7134_BRIDGE_2:
1277 dev->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1278 &sd1878_4m, &dev->i2c_adap);
637afdb5
HH
1279 if (dev->dvb.frontend) {
1280 struct dvb_frontend *fe;
1281 if (dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
d557dab5 1282 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1283 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1284 "found !\n", __func__);
d557dab5
MCC
1285 goto dettach_frontend;
1286 }
637afdb5
HH
1287 /* we need to open the i2c gate (we know it exists) */
1288 fe = dev->dvb.frontend;
1289 fe->ops.i2c_gate_ctrl(fe, 1);
1290 if (dvb_attach(isl6405_attach, fe,
d557dab5 1291 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1292 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1293 "found !\n", __func__);
d557dab5
MCC
1294 goto dettach_frontend;
1295 }
637afdb5
HH
1296 fe->ops.i2c_gate_ctrl(fe, 0);
1297 dev->original_set_voltage = fe->ops.set_voltage;
1298 fe->ops.set_voltage = md8800_set_voltage;
1299 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1300 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1301 }
1302 break;
e2fc00c2
MP
1303 case SAA7134_BOARD_AVERMEDIA_M103:
1304 saa7134_set_gpio(dev, 25, 0);
1305 msleep(10);
1306 saa7134_set_gpio(dev, 25, 1);
1307 dev->dvb.frontend = dvb_attach(mt352_attach,
1308 &avermedia_xc3028_mt352_dev,
1309 &dev->i2c_adap);
1310 attach_xc3028 = 1;
1311 break;
301e9d64 1312 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1313 if (!use_frontend) { /* terrestrial */
1314 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1315 &tda827x_cfg_2) < 0)
1316 goto dettach_frontend;
1317 } else { /* satellite */
1318 dev->dvb.frontend = dvb_attach(tda10086_attach,
1319 &flydvbs, &dev->i2c_adap);
1320 if (dev->dvb.frontend) {
1321 if (dvb_attach(tda826x_attach,
1322 dev->dvb.frontend, 0x60,
1323 &dev->i2c_adap, 0) == NULL) {
1324 wprintk("%s: Asus Tiger 3in1, no "
1325 "tda826x found!\n", __func__);
1326 goto dettach_frontend;
1327 }
1328 if (dvb_attach(lnbp21_attach, dev->dvb.frontend,
1329 &dev->i2c_adap, 0, 0) == NULL) {
1330 wprintk("%s: Asus Tiger 3in1, no lnbp21"
1331 " found!\n", __func__);
1332 goto dettach_frontend;
1333 }
1334 }
1335 }
1336 break;
1da177e4 1337 default:
cf3c34c8 1338 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1339 break;
1340 }
1341
bc36a686
MCC
1342 if (attach_xc3028) {
1343 struct dvb_frontend *fe;
1344 struct xc2028_config cfg = {
1345 .i2c_adap = &dev->i2c_adap,
1346 .i2c_addr = 0x61,
bc36a686 1347 };
95a2fdb6
MCC
1348
1349 if (!dev->dvb.frontend)
1350 return -1;
1351
bc36a686
MCC
1352 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
1353 if (!fe) {
1354 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1355 dev->name);
d557dab5 1356 goto dettach_frontend;
bc36a686
MCC
1357 }
1358 }
1359
1da177e4 1360 if (NULL == dev->dvb.frontend) {
cf3c34c8 1361 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
1da177e4
LT
1362 return -1;
1363 }
d7cba043
MK
1364 /* define general-purpose callback pointer */
1365 dev->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT
1366
1367 /* register everything else */
78e92006
JG
1368 ret = videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev,
1369 adapter_nr);
1c4f76ab
HH
1370
1371 /* this sequence is necessary to make the tda1004x load its firmware
1372 * and to enter analog mode of hybrid boards
1373 */
1374 if (!ret) {
1375 if (dev->dvb.frontend->ops.init)
1376 dev->dvb.frontend->ops.init(dev->dvb.frontend);
1377 if (dev->dvb.frontend->ops.sleep)
1378 dev->dvb.frontend->ops.sleep(dev->dvb.frontend);
9971f4f1
HH
1379 if (dev->dvb.frontend->ops.tuner_ops.sleep)
1380 dev->dvb.frontend->ops.tuner_ops.sleep(dev->dvb.frontend);
1c4f76ab
HH
1381 }
1382 return ret;
d557dab5
MCC
1383
1384dettach_frontend:
bf67cac1
MCC
1385 if (dev->dvb.frontend)
1386 dvb_frontend_detach(dev->dvb.frontend);
d557dab5
MCC
1387 dev->dvb.frontend = NULL;
1388
1389 return -1;
1da177e4
LT
1390}
1391
1392static int dvb_fini(struct saa7134_dev *dev)
1393{
7f171123
MCC
1394 /* FIXME: I suspect that this code is bogus, since the entry for
1395 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1396 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1397 */
1398 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1399 struct v4l2_priv_tun_config tda9887_cfg;
1400 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1401
1402 tda9887_cfg.tuner = TUNER_TDA9887;
1403 tda9887_cfg.priv = &on;
1da177e4 1404
1da177e4 1405 /* otherwise we don't detect the tuner on next insmod */
7f171123 1406 saa7134_i2c_call_clients(dev, TUNER_SET_CONFIG, &tda9887_cfg);
5823b3a6 1407 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1408 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH
1409 /* turn off the 2nd lnb supply */
1410 u8 data = 0x80;
1411 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1412 struct dvb_frontend *fe;
1413 fe = dev->dvb.frontend;
1414 if (fe->ops.i2c_gate_ctrl) {
1415 fe->ops.i2c_gate_ctrl(fe, 1);
1416 i2c_transfer(&dev->i2c_adap, &msg, 1);
1417 fe->ops.i2c_gate_ctrl(fe, 0);
1418 }
1419 }
7f171123 1420 }
9950c1b5
MCC
1421 if (dev->dvb.frontend)
1422 videobuf_dvb_unregister(&dev->dvb);
1da177e4
LT
1423 return 0;
1424}
1425
1426static struct saa7134_mpeg_ops dvb_ops = {
1427 .type = SAA7134_MPEG_DVB,
1428 .init = dvb_init,
1429 .fini = dvb_fini,
1430};
1431
1432static int __init dvb_register(void)
1433{
1434 return saa7134_ts_register(&dvb_ops);
1435}
1436
1437static void __exit dvb_unregister(void)
1438{
1439 saa7134_ts_unregister(&dvb_ops);
1440}
1441
1442module_init(dvb_register);
1443module_exit(dvb_unregister);
1444
1445/* ------------------------------------------------------------------ */
1446/*
1447 * Local variables:
1448 * c-basic-offset: 8
1449 * End:
1450 */