]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/media/video/saa7134/saa7134-dvb.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (5110): Keep the previous tvnorm default for cx88 and cx88-blackbird
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
1da177e4 36
1f10c7af
AQ		 37#include "mt352.h"
38#include "mt352_priv.h" /* FIXME */
39#include "tda1004x.h"
40#include "nxt200x.h"
1da177e4 41
e2ac28fa
IL		 42#include "tda10086.h"
43#include "tda826x.h"
44#include "isl6421.h"
1da177e4
LT		 45MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
46MODULE_LICENSE("GPL");
47
48static unsigned int antenna_pwr = 0;
86ddd96f 49
1da177e4
LT		 50module_param(antenna_pwr, int, 0444);
51MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
52
b331daa0
SB		 53static int use_frontend = 0;
54module_param(use_frontend, int, 0644);
55MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 56
1da177e4 57/* ------------------------------------------------------------------ */
1da177e4
LT		 58static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
59{
60 u32 ok;
61
62 if (!on) {
63 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
64 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
65 return 0;
66 }
67
68 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
69 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
70 udelay(10);
71
72 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
73 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
74 udelay(10);
75 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
76 udelay(10);
77 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
78 printk("%s: %s %s\n", dev->name, __FUNCTION__,
79 ok ? "on" : "off");
80
81 if (!ok)
82 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
83 return ok;
84}
85
86static int mt352_pinnacle_init(struct dvb_frontend* fe)
87{
88 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
89 static u8 reset [] = { RESET, 0x80 };
90 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
91 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
92 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
93 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
94 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
95 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
96 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
97 struct saa7134_dev *dev= fe->dvb->priv;
98
99 printk("%s: %s called\n",dev->name,__FUNCTION__);
100
101 mt352_write(fe, clock_config, sizeof(clock_config));
102 udelay(200);
103 mt352_write(fe, reset, sizeof(reset));
104 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
105 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
106 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
107 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
108
109 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
110 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
111 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 112
1da177e4
LT		 113 return 0;
114}
115
a78d0bfa
JAR		 116static int mt352_aver777_init(struct dvb_frontend* fe)
117{
118 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
119 static u8 reset [] = { RESET, 0x80 };
120 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
121 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
122 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
123
124 mt352_write(fe, clock_config, sizeof(clock_config));
125 udelay(200);
126 mt352_write(fe, reset, sizeof(reset));
127 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
128 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
129 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
130
131 return 0;
132}
133
0463f12c
AQ		 134static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe,
135 struct dvb_frontend_parameters* params)
1da177e4 136{
df8cf706
HH		 137 u8 off[] = { 0x00, 0xf1};
138 u8 on[] = { 0x00, 0x71};
139 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
140
1da177e4
LT		 141 struct saa7134_dev *dev = fe->dvb->priv;
142 struct v4l2_frequency f;
143
144 /* set frequency (mt2050) */
145 f.tuner = 0;
146 f.type = V4L2_TUNER_DIGITAL_TV;
147 f.frequency = params->frequency / 1000 * 16 / 1000;
dea74869
PB		 148 if (fe->ops.i2c_gate_ctrl)
149 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 150 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4 151 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
df8cf706 152 msg.buf = on;
dea74869
PB		 153 if (fe->ops.i2c_gate_ctrl)
154 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 155 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT		 156
157 pinnacle_antenna_pwr(dev, antenna_pwr);
158
159 /* mt352 setup */
0463f12c 160 return mt352_pinnacle_init(fe);
1da177e4
LT		 161}
162
bd4956b8 163static int mt352_aver777_tuner_calc_regs(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf, int buf_len)
a78d0bfa 164{
a79ddae9
AQ		 165 if (buf_len < 5)
166 return -EINVAL;
167
168 pllbuf[0] = 0x61;
a78d0bfa
JAR		 169 dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1,
170 params->frequency,
171 params->u.ofdm.bandwidth);
a79ddae9 172 return 5;
a78d0bfa
JAR		 173}
174
1da177e4
LT		 175static struct mt352_config pinnacle_300i = {
176 .demod_address = 0x3c >> 1,
177 .adc_clock = 20333,
178 .if2 = 36150,
179 .no_tuner = 1,
180 .demod_init = mt352_pinnacle_init,
1da177e4 181};
a78d0bfa
JAR		 182
183static struct mt352_config avermedia_777 = {
184 .demod_address = 0xf,
185 .demod_init = mt352_aver777_init,
a78d0bfa 186};
1da177e4
LT		 187
188/* ------------------------------------------------------------------ */
2cf36ac4 189static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
1da177e4
LT		 190{
191 struct saa7134_dev *dev = fe->dvb->priv;
86ddd96f 192 u8 tuner_buf[4];
2cf36ac4 193 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 194 sizeof(tuner_buf) };
195 int tuner_frequency = 0;
196 u8 band, cp, filter;
197
198 /* determine charge pump */
199 tuner_frequency = params->frequency + 36166000;
200 if (tuner_frequency < 87000000)
201 return -EINVAL;
202 else if (tuner_frequency < 130000000)
203 cp = 3;
204 else if (tuner_frequency < 160000000)
205 cp = 5;
206 else if (tuner_frequency < 200000000)
207 cp = 6;
208 else if (tuner_frequency < 290000000)
209 cp = 3;
210 else if (tuner_frequency < 420000000)
211 cp = 5;
212 else if (tuner_frequency < 480000000)
213 cp = 6;
214 else if (tuner_frequency < 620000000)
215 cp = 3;
216 else if (tuner_frequency < 830000000)
217 cp = 5;
218 else if (tuner_frequency < 895000000)
219 cp = 7;
220 else
221 return -EINVAL;
222
223 /* determine band */
224 if (params->frequency < 49000000)
225 return -EINVAL;
226 else if (params->frequency < 161000000)
227 band = 1;
228 else if (params->frequency < 444000000)
229 band = 2;
230 else if (params->frequency < 861000000)
231 band = 4;
232 else
233 return -EINVAL;
234
235 /* setup PLL filter */
236 switch (params->u.ofdm.bandwidth) {
237 case BANDWIDTH_6_MHZ:
238 filter = 0;
239 break;
240
241 case BANDWIDTH_7_MHZ:
242 filter = 0;
243 break;
244
245 case BANDWIDTH_8_MHZ:
246 filter = 1;
247 break;
1da177e4 248
86ddd96f
MCC		 249 default:
250 return -EINVAL;
251 }
252
253 /* calculate divisor
254 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 255 */
86ddd96f
MCC		 256 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
257
258 /* setup tuner buffer */
259 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
260 tuner_buf[1] = tuner_frequency & 0xff;
261 tuner_buf[2] = 0xca;
262 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
263
dea74869
PB		 264 if (fe->ops.i2c_gate_ctrl)
265 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 266 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
267 return -EIO;
2cf36ac4
HH		 268 msleep(1);
269 return 0;
270}
271
272static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
273{
274 struct saa7134_dev *dev = fe->dvb->priv;
275 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
276 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 277
2cf36ac4 278 /* setup PLL configuration */
dea74869
PB		 279 if (fe->ops.i2c_gate_ctrl)
280 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 281 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
282 return -EIO;
86ddd96f 283 msleep(1);
2cf36ac4 284
1da177e4
LT		 285 return 0;
286}
287
2cf36ac4
HH		 288/* ------------------------------------------------------------------ */
289
a79ddae9 290static int philips_tu1216_tuner_60_init(struct dvb_frontend *fe)
2cf36ac4
HH		 291{
292 return philips_tda6651_pll_init(0x60, fe);
293}
294
a79ddae9 295static int philips_tu1216_tuner_60_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH		 296{
297 return philips_tda6651_pll_set(0x60, fe, params);
298}
299
587d2fd7 300static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
86ddd96f 301 const struct firmware **fw, char *name)
1da177e4
LT		 302{
303 struct saa7134_dev *dev = fe->dvb->priv;
304 return request_firmware(fw, name, &dev->pci->dev);
305}
306
2cf36ac4 307static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 308
309 .demod_address = 0x8,
310 .invert = 1,
2cf36ac4 311 .invert_oclk = 0,
86ddd96f
MCC		 312 .xtal_freq = TDA10046_XTAL_4M,
313 .agc_config = TDA10046_AGC_DEFAULT,
314 .if_freq = TDA10046_FREQ_3617,
587d2fd7 315 .request_firmware = philips_tda1004x_request_firmware,
86ddd96f
MCC		 316};
317
318/* ------------------------------------------------------------------ */
319
a79ddae9 320static int philips_tu1216_tuner_61_init(struct dvb_frontend *fe)
2cf36ac4
HH		 321{
322 return philips_tda6651_pll_init(0x61, fe);
323}
324
a79ddae9 325static int philips_tu1216_tuner_61_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH		 326{
327 return philips_tda6651_pll_set(0x61, fe, params);
328}
329
330static struct tda1004x_config philips_tu1216_61_config = {
331
332 .demod_address = 0x8,
333 .invert = 1,
334 .invert_oclk = 0,
335 .xtal_freq = TDA10046_XTAL_4M,
336 .agc_config = TDA10046_AGC_DEFAULT,
337 .if_freq = TDA10046_FREQ_3617,
587d2fd7 338 .request_firmware = philips_tda1004x_request_firmware,
2cf36ac4
HH		 339};
340
341/* ------------------------------------------------------------------ */
342
cbb94521 343static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH		 344{
345 struct saa7134_dev *dev = fe->dvb->priv;
346 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
347 struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
348
349 /* setup PLL configuration */
dea74869
PB		 350 if (fe->ops.i2c_gate_ctrl)
351 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 352 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
353 return -EIO;
dea74869 354 if (fe->ops.i2c_gate_ctrl)
cbb94521 355 fe->ops.i2c_gate_ctrl(fe, 0);
2cf36ac4
HH		 356 return 0;
357}
358
a79ddae9 359static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
2cf36ac4
HH		 360{
361 return philips_tda6651_pll_set(0x61, fe, params);
362}
363
cbb94521
HH		 364static int philips_europa_tuner_init(struct dvb_frontend *fe)
365{
366 struct saa7134_dev *dev = fe->dvb->priv;
367 static u8 msg[] = { 0x00, 0x40};
368 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
369
370
371 if (philips_td1316_tuner_init(fe))
372 return -EIO;
373 msleep(1);
374 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
375 return -EIO;
376
377 return 0;
378}
379
a79ddae9 380static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH		 381{
382 struct saa7134_dev *dev = fe->dvb->priv;
383 /* this message actually turns the tuner back to analog mode */
384 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
385 struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
386
387 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
388 msleep(1);
389
390 /* switch the board to analog mode */
391 analog_msg.addr = 0x43;
392 analog_msg.len = 0x02;
393 msg[0] = 0x00;
394 msg[1] = 0x14;
dea74869
PB		 395 if (fe->ops.i2c_gate_ctrl)
396 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 397 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ		 398 return 0;
399}
400
401static int philips_europa_demod_sleep(struct dvb_frontend *fe)
402{
403 struct saa7134_dev *dev = fe->dvb->priv;
404
405 if (dev->original_demod_sleep)
406 dev->original_demod_sleep(fe);
dea74869 407 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 408 return 0;
2cf36ac4
HH		 409}
410
411static struct tda1004x_config philips_europa_config = {
412
413 .demod_address = 0x8,
414 .invert = 0,
415 .invert_oclk = 0,
416 .xtal_freq = TDA10046_XTAL_4M,
417 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
418 .if_freq = TDA10046_FREQ_052,
2cf36ac4
HH		 419 .request_firmware = NULL,
420};
421
422/* ------------------------------------------------------------------ */
86ddd96f 423
a79ddae9 424static int philips_fmd1216_tuner_init(struct dvb_frontend *fe)
86ddd96f
MCC		 425{
426 struct saa7134_dev *dev = fe->dvb->priv;
427 /* this message is to set up ATC and ALC */
428 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
429 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
430
dea74869
PB		 431 if (fe->ops.i2c_gate_ctrl)
432 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 433 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
434 return -EIO;
435 msleep(1);
436
437 return 0;
438}
439
a79ddae9 440static int philips_fmd1216_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC		 441{
442 struct saa7134_dev *dev = fe->dvb->priv;
443 /* this message actually turns the tuner back to analog mode */
444 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
445 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
446
dea74869
PB		 447 if (fe->ops.i2c_gate_ctrl)
448 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 449 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
450 msleep(1);
451 fmd1216_init[2] = 0x86;
452 fmd1216_init[3] = 0x54;
dea74869
PB		 453 if (fe->ops.i2c_gate_ctrl)
454 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 455 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
456 msleep(1);
a79ddae9 457 return 0;
86ddd96f
MCC		 458}
459
a79ddae9 460static int philips_fmd1216_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC		 461{
462 struct saa7134_dev *dev = fe->dvb->priv;
463 u8 tuner_buf[4];
464 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
465 sizeof(tuner_buf) };
466 int tuner_frequency = 0;
467 int divider = 0;
468 u8 band, mode, cp;
469
470 /* determine charge pump */
471 tuner_frequency = params->frequency + 36130000;
472 if (tuner_frequency < 87000000)
473 return -EINVAL;
474 /* low band */
475 else if (tuner_frequency < 180000000) {
476 band = 1;
477 mode = 7;
478 cp = 0;
479 } else if (tuner_frequency < 195000000) {
480 band = 1;
481 mode = 6;
482 cp = 1;
483 /* mid band */
484 } else if (tuner_frequency < 366000000) {
485 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
486 band = 10;
487 } else {
488 band = 2;
489 }
490 mode = 7;
491 cp = 0;
492 } else if (tuner_frequency < 478000000) {
493 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
494 band = 10;
495 } else {
496 band = 2;
497 }
498 mode = 6;
499 cp = 1;
500 /* high band */
501 } else if (tuner_frequency < 662000000) {
502 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
503 band = 12;
504 } else {
505 band = 4;
506 }
507 mode = 7;
508 cp = 0;
509 } else if (tuner_frequency < 840000000) {
510 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
511 band = 12;
512 } else {
513 band = 4;
514 }
515 mode = 6;
516 cp = 1;
517 } else {
518 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
519 band = 12;
520 } else {
521 band = 4;
522 }
523 mode = 7;
524 cp = 1;
525
526 }
527 /* calculate divisor */
528 /* ((36166000 + Finput) / 166666) rounded! */
529 divider = (tuner_frequency + 83333) / 166667;
530
531 /* setup tuner buffer */
532 tuner_buf[0] = (divider >> 8) & 0x7f;
533 tuner_buf[1] = divider & 0xff;
534 tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
535 tuner_buf[3] = 0x40 | band;
536
dea74869
PB		 537 if (fe->ops.i2c_gate_ctrl)
538 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 539 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
540 return -EIO;
541 return 0;
542}
543
408b664a 544static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 545 .demod_address = 0x08,
546 .invert = 1,
547 .invert_oclk = 0,
548 .xtal_freq = TDA10046_XTAL_16M,
549 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
550 .if_freq = TDA10046_FREQ_3613,
86ddd96f
MCC		 551 .request_firmware = NULL,
552};
553
554/* ------------------------------------------------------------------ */
555
556struct tda827x_data {
557 u32 lomax;
558 u8 spd;
559 u8 bs;
560 u8 bp;
561 u8 cp;
562 u8 gc3;
563 u8 div1p5;
564};
565
566static struct tda827x_data tda827x_dvbt[] = {
567 { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
568 { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
569 { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
570 { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
571 { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
572 { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
573 { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
574 { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
575 { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
576 { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
577 { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
578 { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
579 { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
580 { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
581 { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
582 { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
583 { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
584 { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
585 { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
586 { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
587 { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
588 { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
589 { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
590 { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
591 { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
592 { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
593 { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
594 { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
595 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
596};
597
a79ddae9 598static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
86ddd96f
MCC		 599{
600 return 0;
601}
602
a79ddae9 603static int philips_tda827x_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
86ddd96f
MCC		 604{
605 struct saa7134_dev *dev = fe->dvb->priv;
606 u8 tuner_buf[14];
607
608 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
f2421ca3 609 .len = sizeof(tuner_buf) };
86ddd96f
MCC		 610 int i, tuner_freq, if_freq;
611 u32 N;
612 switch (params->u.ofdm.bandwidth) {
613 case BANDWIDTH_6_MHZ:
614 if_freq = 4000000;
615 break;
616 case BANDWIDTH_7_MHZ:
617 if_freq = 4500000;
618 break;
619 default: /* 8 MHz or Auto */
620 if_freq = 5000000;
621 break;
622 }
623 tuner_freq = params->frequency + if_freq;
624
625 i = 0;
626 while (tda827x_dvbt[i].lomax < tuner_freq) {
627 if(tda827x_dvbt[i + 1].lomax == 0)
628 break;
629 i++;
630 }
631
632 N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
633 tuner_buf[0] = 0;
634 tuner_buf[1] = (N>>8) | 0x40;
635 tuner_buf[2] = N & 0xff;
636 tuner_buf[3] = 0;
637 tuner_buf[4] = 0x52;
638 tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
639 (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
640 tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
641 tuner_buf[7] = 0xbf;
642 tuner_buf[8] = 0x2a;
643 tuner_buf[9] = 0x05;
644 tuner_buf[10] = 0xff;
645 tuner_buf[11] = 0x00;
646 tuner_buf[12] = 0x00;
647 tuner_buf[13] = 0x40;
648
649 tuner_msg.len = 14;
dea74869
PB		 650 if (fe->ops.i2c_gate_ctrl)
651 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 652 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
653 return -EIO;
654
655 msleep(500);
656 /* correct CP value */
657 tuner_buf[0] = 0x30;
658 tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
659 tuner_msg.len = 2;
dea74869
PB		 660 if (fe->ops.i2c_gate_ctrl)
661 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f
MCC		 662 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
663
664 return 0;
665}
666
a79ddae9 667static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
86ddd96f
MCC		 668{
669 struct saa7134_dev *dev = fe->dvb->priv;
670 static u8 tda827x_sleep[] = { 0x30, 0xd0};
671 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
f2421ca3 672 .len = sizeof(tda827x_sleep) };
dea74869
PB		 673 if (fe->ops.i2c_gate_ctrl)
674 fe->ops.i2c_gate_ctrl(fe, 1);
86ddd96f 675 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
a79ddae9 676 return 0;
86ddd96f
MCC		 677}
678
679static struct tda1004x_config tda827x_lifeview_config = {
680 .demod_address = 0x08,
681 .invert = 1,
682 .invert_oclk = 0,
683 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 684 .agc_config = TDA10046_AGC_TDA827X_GP11,
86ddd96f 685 .if_freq = TDA10046_FREQ_045,
86ddd96f 686 .request_firmware = NULL,
1da177e4 687};
90e9df7f
HH		 688
689/* ------------------------------------------------------------------ */
690
691struct tda827xa_data {
692 u32 lomax;
693 u8 svco;
694 u8 spd;
695 u8 scr;
696 u8 sbs;
697 u8 gc3;
698};
699
700static struct tda827xa_data tda827xa_dvbt[] = {
701 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
702 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
703 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
704 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
705 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
706 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
707 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
708 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
709 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
710 { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
711 { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
712 { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
713 { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
714 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
715 { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
716 { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
717 { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
718 { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
719 { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
720 { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
721 { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
722 { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
723 { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
724 { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
725 { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
726 { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
727 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
728
729
730static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
731{
732 struct saa7134_dev *dev = fe->dvb->priv;
733 u8 tuner_buf[14];
734 unsigned char reg2[2];
735
736 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
737 int i, tuner_freq, if_freq;
738 u32 N;
739
740 switch (params->u.ofdm.bandwidth) {
741 case BANDWIDTH_6_MHZ:
742 if_freq = 4000000;
743 break;
744 case BANDWIDTH_7_MHZ:
745 if_freq = 4500000;
746 break;
747 default: /* 8 MHz or Auto */
748 if_freq = 5000000;
749 break;
750 }
751 tuner_freq = params->frequency + if_freq;
752
753 i = 0;
754 while (tda827xa_dvbt[i].lomax < tuner_freq) {
755 if(tda827xa_dvbt[i + 1].lomax == 0)
756 break;
757 i++;
758 }
759
760 N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
761 tuner_buf[0] = 0; // subaddress
762 tuner_buf[1] = N >> 8;
763 tuner_buf[2] = N & 0xff;
764 tuner_buf[3] = 0;
765 tuner_buf[4] = 0x16;
766 tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
767 tda827xa_dvbt[i].sbs;
768 tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
769 tuner_buf[7] = 0x0c;
770 tuner_buf[8] = 0x06;
771 tuner_buf[9] = 0x24;
772 tuner_buf[10] = 0xff;
773 tuner_buf[11] = 0x60;
774 tuner_buf[12] = 0x00;
775 tuner_buf[13] = 0x39; // lpsel
776 msg.len = 14;
dea74869
PB		 777 if (fe->ops.i2c_gate_ctrl)
778 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 779 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
780 return -EIO;
781
782 msg.buf= reg2;
783 msg.len = 2;
784 reg2[0] = 0x60;
785 reg2[1] = 0x3c;
dea74869
PB		 786 if (fe->ops.i2c_gate_ctrl)
787 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 788 i2c_transfer(&dev->i2c_adap, &msg, 1);
789
790 reg2[0] = 0xa0;
791 reg2[1] = 0x40;
dea74869
PB		 792 if (fe->ops.i2c_gate_ctrl)
793 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 794 i2c_transfer(&dev->i2c_adap, &msg, 1);
795
796 msleep(2);
797 /* correct CP value */
798 reg2[0] = 0x30;
799 reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
800 msg.len = 2;
dea74869
PB		 801 if (fe->ops.i2c_gate_ctrl)
802 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 803 i2c_transfer(&dev->i2c_adap, &msg, 1);
804
805 msleep(550);
806 reg2[0] = 0x50;
807 reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
dea74869
PB		 808 if (fe->ops.i2c_gate_ctrl)
809 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f
HH		 810 i2c_transfer(&dev->i2c_adap, &msg, 1);
811
812 return 0;
813
814}
815
a79ddae9 816static int philips_tda827xa_tuner_sleep(u8 addr, struct dvb_frontend *fe)
90e9df7f
HH		 817{
818 struct saa7134_dev *dev = fe->dvb->priv;
819 static u8 tda827xa_sleep[] = { 0x30, 0x90};
820 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
f1bcef88 821 .len = sizeof(tda827xa_sleep) };
dea74869
PB		 822 if (fe->ops.i2c_gate_ctrl)
823 fe->ops.i2c_gate_ctrl(fe, 1);
90e9df7f 824 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
587d2fd7
HH		 825 if (fe->ops.i2c_gate_ctrl)
826 fe->ops.i2c_gate_ctrl(fe, 0);
a79ddae9 827 return 0;
90e9df7f
HH		 828}
829
830/* ------------------------------------------------------------------ */
831
587d2fd7 832static int tda8290_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
90e9df7f 833{
90e9df7f
HH		 834 struct saa7134_dev *dev = fe->dvb->priv;
835 static u8 tda8290_close[] = { 0x21, 0xc0};
836 static u8 tda8290_open[] = { 0x21, 0x80};
837 struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
587d2fd7
HH		 838 if (enable) {
839 tda8290_msg.buf = tda8290_close;
840 } else {
841 tda8290_msg.buf = tda8290_open;
842 }
843 if (i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1) != 1)
90e9df7f
HH		 844 return -EIO;
845 msleep(20);
587d2fd7
HH		 846 return 0;
847}
848
849/* ------------------------------------------------------------------ */
850
851static int philips_tiger_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
852{
853 int ret;
854
90e9df7f
HH		 855 ret = philips_tda827xa_pll_set(0x61, fe, params);
856 if (ret != 0)
857 return ret;
587d2fd7 858 return 0;
2d6b5f62 859}
90e9df7f 860
a79ddae9 861static int philips_tiger_tuner_init(struct dvb_frontend *fe)
90e9df7f
HH		 862{
863 struct saa7134_dev *dev = fe->dvb->priv;
864 static u8 data[] = { 0x3c, 0x33, 0x6a};
865 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
866
867 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
868 return -EIO;
869 return 0;
870}
871
a79ddae9 872static int philips_tiger_tuner_sleep(struct dvb_frontend *fe)
90e9df7f
HH		 873{
874 struct saa7134_dev *dev = fe->dvb->priv;
875 static u8 data[] = { 0x3c, 0x33, 0x68};
876 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
877
878 i2c_transfer(&dev->i2c_adap, &msg, 1);
a79ddae9
AQ		 879 philips_tda827xa_tuner_sleep( 0x61, fe);
880 return 0;
90e9df7f
HH		 881}
882
883static struct tda1004x_config philips_tiger_config = {
884 .demod_address = 0x08,
885 .invert = 1,
886 .invert_oclk = 0,
887 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e
HH		 888 .agc_config = TDA10046_AGC_TDA827X_GP11,
889 .if_freq = TDA10046_FREQ_045,
890 .request_firmware = NULL,
891};
892/* ------------------------------------------------------------------ */
893
894static int cinergy_ht_tuner_init(struct dvb_frontend *fe)
895{
896 struct saa7134_dev *dev = fe->dvb->priv;
897 static u8 data[] = { 0x3c, 0x33, 0x62};
898 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
899
900 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
901 return -EIO;
902 return 0;
903}
904
905static int cinergy_ht_tuner_sleep(struct dvb_frontend *fe)
906{
907 struct saa7134_dev *dev = fe->dvb->priv;
908 static u8 data[] = { 0x3c, 0x33, 0x60};
909 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
910
911 i2c_transfer(&dev->i2c_adap, &msg, 1);
912 philips_tda827xa_tuner_sleep( 0x61, fe);
913 return 0;
914}
915
916static struct tda1004x_config cinergy_ht_config = {
917 .demod_address = 0x08,
918 .invert = 1,
919 .invert_oclk = 0,
920 .xtal_freq = TDA10046_XTAL_16M,
921 .agc_config = TDA10046_AGC_TDA827X_GP01,
90e9df7f 922 .if_freq = TDA10046_FREQ_045,
90e9df7f
HH		 923 .request_firmware = NULL,
924};
925
df42eaf2
HH		 926/* ------------------------------------------------------------------ */
927
587d2fd7
HH		 928static struct tda1004x_config pinnacle_pctv_310i_config = {
929 .demod_address = 0x08,
930 .invert = 1,
931 .invert_oclk = 0,
932 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 933 .agc_config = TDA10046_AGC_TDA827X_GP11,
587d2fd7
HH		 934 .if_freq = TDA10046_FREQ_045,
935 .request_firmware = philips_tda1004x_request_firmware,
936};
937
938/* ------------------------------------------------------------------ */
939
c6e53daf
TG		 940static struct tda1004x_config hauppauge_hvr_1110_config = {
941 .demod_address = 0x08,
942 .invert = 1,
943 .invert_oclk = 0,
944 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 945 .agc_config = TDA10046_AGC_TDA827X_GP11,
c6e53daf
TG		 946 .if_freq = TDA10046_FREQ_045,
947 .request_firmware = philips_tda1004x_request_firmware,
948};
949
950/* ------------------------------------------------------------------ */
951
83646817
HH		 952static struct tda1004x_config asus_p7131_dual_config = {
953 .demod_address = 0x08,
954 .invert = 1,
955 .invert_oclk = 0,
956 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 957 .agc_config = TDA10046_AGC_TDA827X_GP11,
83646817
HH		 958 .if_freq = TDA10046_FREQ_045,
959 .request_firmware = philips_tda1004x_request_firmware,
960};
961
6b14ff9e
HP		 962static int asus_p7131_dual_tuner_init(struct dvb_frontend *fe)
963{
964 struct saa7134_dev *dev = fe->dvb->priv;
965 static u8 data[] = { 0x3c, 0x33, 0x6a};
966 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
967
968 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
969 return -EIO;
970 /* make sure the DVB-T antenna input is set */
971 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0200000);
972 return 0;
973}
974
975static int asus_p7131_dual_tuner_sleep(struct dvb_frontend *fe)
976{
977 struct saa7134_dev *dev = fe->dvb->priv;
978 static u8 data[] = { 0x3c, 0x33, 0x68};
979 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
980
981 i2c_transfer(&dev->i2c_adap, &msg, 1);
982 philips_tda827xa_tuner_sleep( 0x61, fe);
983 /* reset antenna inputs for analog usage */
984 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0200000);
985 return 0;
986}
987
988/* ------------------------------------------------------------------ */
989
a79ddae9 990static int lifeview_trio_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
420f32fe
NS		 991{
992 int ret;
993
994 ret = philips_tda827xa_pll_set(0x60, fe, params);
995 return ret;
996}
997
a79ddae9 998static int lifeview_trio_tuner_sleep(struct dvb_frontend *fe)
420f32fe 999{
a79ddae9 1000 philips_tda827xa_tuner_sleep(0x60, fe);
420f32fe
NS		 1001 return 0;
1002}
1003
420f32fe
NS		 1004static struct tda1004x_config lifeview_trio_config = {
1005 .demod_address = 0x09,
1006 .invert = 1,
1007 .invert_oclk = 0,
1008 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 1009 .agc_config = TDA10046_AGC_TDA827X_GP00,
420f32fe 1010 .if_freq = TDA10046_FREQ_045,
420f32fe
NS		 1011 .request_firmware = NULL,
1012};
1013
1014/* ------------------------------------------------------------------ */
1015
a79ddae9 1016static int ads_duo_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
df42eaf2
HH		 1017{
1018 int ret;
1019
1020 ret = philips_tda827xa_pll_set(0x61, fe, params);
1021 return ret;
2d6b5f62 1022}
df42eaf2 1023
a79ddae9 1024static int ads_duo_tuner_init(struct dvb_frontend *fe)
df42eaf2
HH		 1025{
1026 struct saa7134_dev *dev = fe->dvb->priv;
1027 /* route TDA8275a AGC input to the channel decoder */
1028 saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x60);
1029 return 0;
1030}
1031
a79ddae9 1032static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
df42eaf2
HH		 1033{
1034 struct saa7134_dev *dev = fe->dvb->priv;
1035 /* route TDA8275a AGC input to the analog IF chip*/
1036 saa_writeb(SAA7134_GPIO_GPSTATUS2, 0x20);
a79ddae9
AQ		 1037 philips_tda827xa_tuner_sleep( 0x61, fe);
1038 return 0;
df42eaf2
HH		 1039}
1040
1041static struct tda1004x_config ads_tech_duo_config = {
1042 .demod_address = 0x08,
1043 .invert = 1,
1044 .invert_oclk = 0,
1045 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 1046 .agc_config = TDA10046_AGC_TDA827X_GP00,
df42eaf2 1047 .if_freq = TDA10046_FREQ_045,
df42eaf2
HH		 1048 .request_firmware = NULL,
1049};
1050
3dfb729f
PH		 1051/* ------------------------------------------------------------------ */
1052
a79ddae9 1053static int tevion_dvb220rf_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
3dfb729f
PH		 1054{
1055 int ret;
1056 ret = philips_tda827xa_pll_set(0x60, fe, params);
1057 return ret;
1058}
1059
a79ddae9 1060static int tevion_dvb220rf_tuner_sleep(struct dvb_frontend *fe)
3dfb729f 1061{
a79ddae9 1062 philips_tda827xa_tuner_sleep( 0x61, fe);
3dfb729f
PH		 1063 return 0;
1064}
1065
3dfb729f
PH		 1066static struct tda1004x_config tevion_dvbt220rf_config = {
1067 .demod_address = 0x08,
1068 .invert = 1,
1069 .invert_oclk = 0,
1070 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 1071 .agc_config = TDA10046_AGC_TDA827X_GP11,
3dfb729f 1072 .if_freq = TDA10046_FREQ_045,
3dfb729f
PH		 1073 .request_firmware = NULL,
1074};
1075
5eda227f
HH		 1076/* ------------------------------------------------------------------ */
1077
1078static int md8800_dvbt_analog_mode(struct dvb_frontend *fe)
1079{
1080 struct saa7134_dev *dev = fe->dvb->priv;
1081 static u8 data[] = { 0x3c, 0x33, 0x68};
1082 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
1083
1084 i2c_transfer(&dev->i2c_adap, &msg, 1);
1085 philips_tda827xa_tuner_sleep( 0x61, fe);
1086 return 0;
1087}
1088
1089static int md8800_dvbt_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
1090{
1091 int ret;
1092 struct saa7134_dev *dev = fe->dvb->priv;
1093 static u8 tda8290_close[] = { 0x21, 0xc0};
1094 static u8 tda8290_open[] = { 0x21, 0x80};
1095 struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
1096 /* close tda8290 i2c bridge */
1097 tda8290_msg.buf = tda8290_close;
1098 ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
1099 if (ret != 1)
1100 return -EIO;
1101 msleep(20);
1102 ret = philips_tda827xa_pll_set(0x60, fe, params);
1103 if (ret != 0)
1104 return ret;
1105 /* open tda8290 i2c bridge */
1106 tda8290_msg.buf = tda8290_open;
1107 i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
1108 return ret;
1109}
1110
1111static struct tda1004x_config md8800_dvbt_config = {
1112 .demod_address = 0x08,
1113 .invert = 1,
1114 .invert_oclk = 0,
1115 .xtal_freq = TDA10046_XTAL_16M,
550a9a5e 1116 .agc_config = TDA10046_AGC_TDA827X_GP11,
5eda227f
HH		 1117 .if_freq = TDA10046_FREQ_045,
1118 .request_firmware = NULL,
1119};
1120
e2ac28fa
IL		 1121static struct tda10086_config flydvbs = {
1122 .demod_address = 0x0e,
1123 .invert = 0,
1124};
1125
90e9df7f
HH		 1126/* ------------------------------------------------------------------ */
1127
3b64e8e2
MK		 1128static struct nxt200x_config avertvhda180 = {
1129 .demod_address = 0x0a,
3b64e8e2 1130};
3e1410ad 1131
fbc81c07
CM		 1132static int nxt200x_set_pll_input(u8 *buf, int input)
1133{
1134 if (input)
1135 buf[3] |= 0x08;
1136 else
1137 buf[3] &= ~0x08;
1138 return 0;
1139}
1140
3e1410ad
AB		 1141static struct nxt200x_config kworldatsc110 = {
1142 .demod_address = 0x0a,
fbc81c07 1143 .set_pll_input = nxt200x_set_pll_input,
3e1410ad 1144};
3b64e8e2 1145
1da177e4
LT		 1146/* ------------------------------------------------------------------ */
1147
1148static int dvb_init(struct saa7134_dev *dev)
1149{
1150 /* init struct videobuf_dvb */
1151 dev->ts.nr_bufs = 32;
1152 dev->ts.nr_packets = 32*4;
1153 dev->dvb.name = dev->name;
1154 videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
1155 dev->pci, &dev->slock,
1156 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1157 V4L2_FIELD_ALTERNATE,
1158 sizeof(struct saa7134_buf),
1159 dev);
1160
1161 switch (dev->board) {
1162 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1163 printk("%s: pinnacle 300i dvb setup\n",dev->name);
2bfe031d 1164 dev->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1165 &dev->i2c_adap);
6b3ccab7 1166 if (dev->dvb.frontend) {
dea74869 1167 dev->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1168 }
1da177e4 1169 break;
a78d0bfa 1170 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1171 case SAA7134_BOARD_AVERMEDIA_A16AR:
a78d0bfa 1172 printk("%s: avertv 777 dvb setup\n",dev->name);
2bfe031d 1173 dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1174 &dev->i2c_adap);
6b3ccab7 1175 if (dev->dvb.frontend) {
dea74869 1176 dev->dvb.frontend->ops.tuner_ops.calc_regs = mt352_aver777_tuner_calc_regs;
6b3ccab7 1177 }
a78d0bfa 1178 break;
1da177e4 1179 case SAA7134_BOARD_MD7134:
f7b54b10
MK		 1180 dev->dvb.frontend = dvb_attach(tda10046_attach,
1181 &medion_cardbus,
1182 &dev->i2c_adap);
6b3ccab7 1183 if (dev->dvb.frontend) {
dea74869
PB		 1184 dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init;
1185 dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep;
1186 dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params;
6b3ccab7 1187 }
1da177e4 1188 break;
86ddd96f 1189 case SAA7134_BOARD_PHILIPS_TOUGH:
f7b54b10
MK		 1190 dev->dvb.frontend = dvb_attach(tda10046_attach,
1191 &philips_tu1216_60_config,
1192 &dev->i2c_adap);
6b3ccab7 1193 if (dev->dvb.frontend) {
dea74869
PB		 1194 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_tuner_60_init;
1195 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tu1216_tuner_60_set_params;
6b3ccab7 1196 }
86ddd96f
MCC		 1197 break;
1198 case SAA7134_BOARD_FLYDVBTDUO:
f7b54b10
MK		 1199 dev->dvb.frontend = dvb_attach(tda10046_attach,
1200 &tda827x_lifeview_config,
1201 &dev->i2c_adap);
6b3ccab7 1202 if (dev->dvb.frontend) {
dea74869
PB		 1203 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1204 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1205 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1206 }
86ddd96f 1207 break;
10b7a903 1208 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
f7b54b10
MK		 1209 dev->dvb.frontend = dvb_attach(tda10046_attach,
1210 &tda827x_lifeview_config,
1211 &dev->i2c_adap);
6b3ccab7 1212 if (dev->dvb.frontend) {
dea74869
PB		 1213 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1214 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1215 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1216 }
86ddd96f 1217 break;
2cf36ac4 1218 case SAA7134_BOARD_PHILIPS_EUROPA:
f7b54b10
MK		 1219 dev->dvb.frontend = dvb_attach(tda10046_attach,
1220 &philips_europa_config,
1221 &dev->i2c_adap);
6b3ccab7 1222 if (dev->dvb.frontend) {
dea74869
PB		 1223 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1224 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1225 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1226 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1227 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1228 }
2cf36ac4
HH		 1229 break;
1230 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
f7b54b10
MK		 1231 dev->dvb.frontend = dvb_attach(tda10046_attach,
1232 &philips_europa_config,
1233 &dev->i2c_adap);
6b3ccab7 1234 if (dev->dvb.frontend) {
588f9831
HH		 1235 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1236 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
dea74869
PB		 1237 dev->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1238 dev->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1239 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1240 }
2cf36ac4
HH		 1241 break;
1242 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
f7b54b10
MK		 1243 dev->dvb.frontend = dvb_attach(tda10046_attach,
1244 &philips_tu1216_61_config,
1245 &dev->i2c_adap);
6b3ccab7 1246 if (dev->dvb.frontend) {
dea74869
PB		 1247 dev->dvb.frontend->ops.tuner_ops.init = philips_tu1216_tuner_61_init;
1248 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tu1216_tuner_61_set_params;
6b3ccab7 1249 }
2cf36ac4 1250 break;
90e9df7f 1251 case SAA7134_BOARD_PHILIPS_TIGER:
f7b54b10
MK		 1252 dev->dvb.frontend = dvb_attach(tda10046_attach,
1253 &philips_tiger_config,
1254 &dev->i2c_adap);
6b3ccab7 1255 if (dev->dvb.frontend) {
587d2fd7
HH		 1256 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
1257 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1258 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tiger_tuner_sleep;
1259 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
1260 }
1261 break;
1262 case SAA7134_BOARD_PINNACLE_PCTV_310i:
1263 dev->dvb.frontend = dvb_attach(tda10046_attach,
1264 &pinnacle_pctv_310i_config,
1265 &dev->i2c_adap);
1266 if (dev->dvb.frontend) {
1267 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
dea74869
PB		 1268 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1269 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tiger_tuner_sleep;
1270 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
6b3ccab7 1271 }
90e9df7f 1272 break;
c6e53daf
TG		 1273 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
1274 dev->dvb.frontend = dvb_attach(tda10046_attach,
1275 &hauppauge_hvr_1110_config,
1276 &dev->i2c_adap);
1277 if (dev->dvb.frontend) {
1278 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
1279 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1280 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tiger_tuner_sleep;
1281 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
1282 }
1283 break;
d4b0aba4 1284 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
f7b54b10 1285 dev->dvb.frontend = dvb_attach(tda10046_attach,
83646817 1286 &asus_p7131_dual_config,
f7b54b10 1287 &dev->i2c_adap);
6b3ccab7 1288 if (dev->dvb.frontend) {
7da6894a 1289 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
6b14ff9e
HP		 1290 dev->dvb.frontend->ops.tuner_ops.init = asus_p7131_dual_tuner_init;
1291 dev->dvb.frontend->ops.tuner_ops.sleep = asus_p7131_dual_tuner_sleep;
dea74869 1292 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
6b3ccab7 1293 }
d4b0aba4 1294 break;
3d8466ec 1295 case SAA7134_BOARD_FLYDVBT_LR301:
f7b54b10
MK		 1296 dev->dvb.frontend = dvb_attach(tda10046_attach,
1297 &tda827x_lifeview_config,
1298 &dev->i2c_adap);
6b3ccab7 1299 if (dev->dvb.frontend) {
dea74869
PB		 1300 dev->dvb.frontend->ops.tuner_ops.init = philips_tda827x_tuner_init;
1301 dev->dvb.frontend->ops.tuner_ops.sleep = philips_tda827x_tuner_sleep;
1302 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tda827x_tuner_set_params;
6b3ccab7 1303 }
3d8466ec 1304 break;
420f32fe 1305 case SAA7134_BOARD_FLYDVB_TRIO:
b331daa0 1306 if(! use_frontend) { //terrestrial
1f683cd8
NS		 1307 dev->dvb.frontend = dvb_attach(tda10046_attach,
1308 &lifeview_trio_config,
1309 &dev->i2c_adap);
1310 if (dev->dvb.frontend) {
1311 dev->dvb.frontend->ops.tuner_ops.sleep = lifeview_trio_tuner_sleep;
1312 dev->dvb.frontend->ops.tuner_ops.set_params =
1313 lifeview_trio_tuner_set_params;
1314 }
1315 } else { //satellite
1316 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1317 if (dev->dvb.frontend) {
1318 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x63,
1319 &dev->i2c_adap, 0) == NULL) {
1320 printk("%s: Lifeview Trio, No tda826x found!\n", __FUNCTION__);
1321 }
1322 if (dvb_attach(isl6421_attach, dev->dvb.frontend, &dev->i2c_adap,
1323 0x08, 0, 0) == NULL) {
1324 printk("%s: Lifeview Trio, No ISL6421 found!\n", __FUNCTION__);
1325 }
1326 }
6b3ccab7 1327 }
420f32fe 1328 break;
df42eaf2 1329 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
f7b54b10
MK		 1330 dev->dvb.frontend = dvb_attach(tda10046_attach,
1331 &ads_tech_duo_config,
1332 &dev->i2c_adap);
6b3ccab7 1333 if (dev->dvb.frontend) {
dea74869
PB		 1334 dev->dvb.frontend->ops.tuner_ops.init = ads_duo_tuner_init;
1335 dev->dvb.frontend->ops.tuner_ops.sleep = ads_duo_tuner_sleep;
1336 dev->dvb.frontend->ops.tuner_ops.set_params = ads_duo_tuner_set_params;
6b3ccab7 1337 }
df42eaf2 1338 break;
3dfb729f 1339 case SAA7134_BOARD_TEVION_DVBT_220RF:
f7b54b10
MK		 1340 dev->dvb.frontend = dvb_attach(tda10046_attach,
1341 &tevion_dvbt220rf_config,
1342 &dev->i2c_adap);
6b3ccab7 1343 if (dev->dvb.frontend) {
dea74869
PB		 1344 dev->dvb.frontend->ops.tuner_ops.sleep = tevion_dvb220rf_tuner_sleep;
1345 dev->dvb.frontend->ops.tuner_ops.set_params = tevion_dvb220rf_tuner_set_params;
6b3ccab7 1346 }
3dfb729f 1347 break;
d95b8942 1348 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
f7b54b10
MK		 1349 dev->dvb.frontend = dvb_attach(tda10046_attach,
1350 &ads_tech_duo_config,
1351 &dev->i2c_adap);
6b3ccab7 1352 if (dev->dvb.frontend) {
dea74869
PB		 1353 dev->dvb.frontend->ops.tuner_ops.init = ads_duo_tuner_init;
1354 dev->dvb.frontend->ops.tuner_ops.sleep = ads_duo_tuner_sleep;
1355 dev->dvb.frontend->ops.tuner_ops.set_params = ads_duo_tuner_set_params;
6b3ccab7 1356 }
d95b8942 1357 break;
5eda227f
HH		 1358 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
1359 dev->dvb.frontend = tda10046_attach(&md8800_dvbt_config,
1360 &dev->i2c_adap);
1361 if (dev->dvb.frontend) {
1362 dev->dvb.frontend->ops.tuner_ops.init = philips_tiger_tuner_init;
1363 dev->dvb.frontend->ops.tuner_ops.sleep = md8800_dvbt_analog_mode;
1364 dev->dvb.frontend->ops.tuner_ops.set_params = md8800_dvbt_pll_set;
1365 }
1366 break;
3b64e8e2 1367 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
f7b54b10
MK		 1368 dev->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
1369 &dev->i2c_adap);
a79ddae9 1370 if (dev->dvb.frontend) {
4ad8eee5
MK		 1371 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
1372 NULL, &dvb_pll_tdhu2);
a79ddae9 1373 }
3b64e8e2 1374 break;
3e1410ad 1375 case SAA7134_BOARD_KWORLD_ATSC110:
f7b54b10
MK		 1376 dev->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
1377 &dev->i2c_adap);
a79ddae9 1378 if (dev->dvb.frontend) {
4ad8eee5
MK		 1379 dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
1380 NULL, &dvb_pll_tuv1236d);
a79ddae9 1381 }
3e1410ad 1382 break;
e2ac28fa 1383 case SAA7134_BOARD_FLYDVBS_LR300:
f7b54b10
MK		 1384 dev->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
1385 &dev->i2c_adap);
e2ac28fa 1386 if (dev->dvb.frontend) {
f7b54b10
MK		 1387 if (dvb_attach(tda826x_attach, dev->dvb.frontend, 0x60,
1388 &dev->i2c_adap, 0) == NULL) {
e2ac28fa
IL		 1389 printk("%s: No tda826x found!\n", __FUNCTION__);
1390 }
f7b54b10
MK		 1391 if (dvb_attach(isl6421_attach, dev->dvb.frontend,
1392 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
e2ac28fa
IL		 1393 printk("%s: No ISL6421 found!\n", __FUNCTION__);
1394 }
1395 }
1396 break;
cf146ca4
HH		 1397 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
1398 dev->dvb.frontend = tda10046_attach(&medion_cardbus,
1399 &dev->i2c_adap);
1400 if (dev->dvb.frontend) {
1401 dev->original_demod_sleep = dev->dvb.frontend->ops.sleep;
1402 dev->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1403 dev->dvb.frontend->ops.tuner_ops.init = philips_fmd1216_tuner_init;
1404 dev->dvb.frontend->ops.tuner_ops.sleep = philips_fmd1216_tuner_sleep;
1405 dev->dvb.frontend->ops.tuner_ops.set_params = philips_fmd1216_tuner_set_params;
1406 }
1407 break;
cbb94521
HH		 1408 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
1409 dev->dvb.frontend = dvb_attach(tda10046_attach,
1410 &philips_europa_config,
1411 &dev->i2c_adap);
1412 if (dev->dvb.frontend) {
1413 dev->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1414 dev->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1415 }
1416 break;
550a9a5e
HH		 1417 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
1418 dev->dvb.frontend = dvb_attach(tda10046_attach,
1419 &cinergy_ht_config,
1420 &dev->i2c_adap);
1421 if (dev->dvb.frontend) {
1422 dev->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
1423 dev->dvb.frontend->ops.tuner_ops.init = cinergy_ht_tuner_init;
1424 dev->dvb.frontend->ops.tuner_ops.sleep = cinergy_ht_tuner_sleep;
1425 dev->dvb.frontend->ops.tuner_ops.set_params = philips_tiger_tuner_set_params;
1426
1427 }
1428 break;
1da177e4
LT		 1429 default:
1430 printk("%s: Huh? unknown DVB card?\n",dev->name);
1431 break;
1432 }
1433
1434 if (NULL == dev->dvb.frontend) {
1435 printk("%s: frontend initialization failed\n",dev->name);
1436 return -1;
1437 }
1438
1439 /* register everything else */
d09dbf92 1440 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
1da177e4
LT		 1441}
1442
1443static int dvb_fini(struct saa7134_dev *dev)
1444{
1445 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1446
1da177e4
LT		 1447 switch (dev->board) {
1448 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
1449 /* otherwise we don't detect the tuner on next insmod */
1450 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
1451 break;
1452 };
1453 videobuf_dvb_unregister(&dev->dvb);
1454 return 0;
1455}
1456
1457static struct saa7134_mpeg_ops dvb_ops = {
1458 .type = SAA7134_MPEG_DVB,
1459 .init = dvb_init,
1460 .fini = dvb_fini,
1461};
1462
1463static int __init dvb_register(void)
1464{
1465 return saa7134_ts_register(&dvb_ops);
1466}
1467
1468static void __exit dvb_unregister(void)
1469{
1470 saa7134_ts_unregister(&dvb_ops);
1471}
1472
1473module_init(dvb_register);
1474module_exit(dvb_unregister);
1475
1476/* ------------------------------------------------------------------ */
1477/*
1478 * Local variables:
1479 * c-basic-offset: 8
1480 * End:
1481 */
Ubuntu Artful kernel mirror