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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
5823b3a6 | 36 | #include <dvb_frontend.h> |
1da177e4 | 37 | |
1f10c7af AQ |
38 | #include "mt352.h" |
39 | #include "mt352_priv.h" /* FIXME */ | |
40 | #include "tda1004x.h" | |
41 | #include "nxt200x.h" | |
bc36a686 | 42 | #include "tuner-xc2028.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
cb89cd33 | 50 | #include "tuner-simple.h" |
3abdedd8 MK |
51 | #include "tda18271.h" |
52 | #include "lgdt3305.h" | |
53 | #include "tda8290.h" | |
8ce47dad | 54 | |
47aeba5a DB |
55 | #include "zl10353.h" |
56 | ||
04574185 MS |
57 | #include "zl10036.h" |
58 | #include "mt312.h" | |
59 | ||
1da177e4 LT |
60 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
61 | MODULE_LICENSE("GPL"); | |
62 | ||
ff699e6b | 63 | static unsigned int antenna_pwr; |
86ddd96f | 64 | |
1da177e4 LT |
65 | module_param(antenna_pwr, int, 0444); |
66 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
67 | ||
ff699e6b | 68 | static int use_frontend; |
b331daa0 SB |
69 | module_param(use_frontend, int, 0644); |
70 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 71 | |
ff699e6b | 72 | static int debug; |
58ef4f92 HH |
73 | module_param(debug, int, 0644); |
74 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
75 | ||
78e92006 JG |
76 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
77 | ||
cf3c34c8 TP |
78 | #define dprintk(fmt, arg...) do { if (debug) \ |
79 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
80 | ||
81 | /* Print a warning */ | |
82 | #define wprintk(fmt, arg...) \ | |
83 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
84 | |
85 | /* ------------------------------------------------------------------ | |
86 | * mt352 based DVB-T cards | |
87 | */ | |
88 | ||
1da177e4 LT |
89 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
90 | { | |
91 | u32 ok; | |
92 | ||
93 | if (!on) { | |
94 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
95 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
96 | return 0; | |
97 | } | |
98 | ||
99 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
100 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
101 | udelay(10); | |
102 | ||
103 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
104 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
105 | udelay(10); | |
106 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
107 | udelay(10); | |
108 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 109 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
110 | |
111 | if (!ok) | |
112 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
113 | return ok; | |
114 | } | |
115 | ||
116 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
117 | { | |
118 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
119 | static u8 reset [] = { RESET, 0x80 }; | |
120 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
121 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
122 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
123 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
124 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
125 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
126 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
127 | struct saa7134_dev *dev= fe->dvb->priv; | |
128 | ||
5823b3a6 | 129 | dprintk("%s called\n", __func__); |
1da177e4 LT |
130 | |
131 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
132 | udelay(200); | |
133 | mt352_write(fe, reset, sizeof(reset)); | |
134 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
135 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
136 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
137 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
138 | ||
139 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
140 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
141 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 142 | |
1da177e4 LT |
143 | return 0; |
144 | } | |
145 | ||
a78d0bfa JAR |
146 | static int mt352_aver777_init(struct dvb_frontend* fe) |
147 | { | |
148 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
149 | static u8 reset [] = { RESET, 0x80 }; | |
150 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
151 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
152 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
153 | ||
154 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
155 | udelay(200); | |
156 | mt352_write(fe, reset, sizeof(reset)); | |
157 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
158 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
159 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
160 | ||
161 | return 0; | |
162 | } | |
163 | ||
6e501a3f | 164 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
95a2fdb6 | 165 | { |
6e501a3f TF |
166 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
167 | static u8 reset [] = { RESET, 0x80 }; | |
168 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
169 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; | |
95a2fdb6 MCC |
170 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
171 | ||
172 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
173 | udelay(200); | |
174 | mt352_write(fe, reset, sizeof(reset)); | |
175 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
176 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
177 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
95a2fdb6 MCC |
178 | return 0; |
179 | } | |
180 | ||
0463f12c AQ |
181 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
182 | struct dvb_frontend_parameters* params) | |
1da177e4 | 183 | { |
df8cf706 HH |
184 | u8 off[] = { 0x00, 0xf1}; |
185 | u8 on[] = { 0x00, 0x71}; | |
186 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
187 | ||
1da177e4 LT |
188 | struct saa7134_dev *dev = fe->dvb->priv; |
189 | struct v4l2_frequency f; | |
190 | ||
191 | /* set frequency (mt2050) */ | |
192 | f.tuner = 0; | |
193 | f.type = V4L2_TUNER_DIGITAL_TV; | |
194 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
195 | if (fe->ops.i2c_gate_ctrl) |
196 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 197 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
fac6986c | 198 | saa_call_all(dev, tuner, s_frequency, &f); |
df8cf706 | 199 | msg.buf = on; |
dea74869 PB |
200 | if (fe->ops.i2c_gate_ctrl) |
201 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 202 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
203 | |
204 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
205 | ||
206 | /* mt352 setup */ | |
0463f12c | 207 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
208 | } |
209 | ||
210 | static struct mt352_config pinnacle_300i = { | |
211 | .demod_address = 0x3c >> 1, | |
212 | .adc_clock = 20333, | |
213 | .if2 = 36150, | |
214 | .no_tuner = 1, | |
215 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 216 | }; |
a78d0bfa JAR |
217 | |
218 | static struct mt352_config avermedia_777 = { | |
219 | .demod_address = 0xf, | |
220 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 221 | }; |
1da177e4 | 222 | |
6e501a3f | 223 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
bc36a686 MCC |
224 | .demod_address = (0x1e >> 1), |
225 | .no_tuner = 1, | |
6e501a3f | 226 | .demod_init = mt352_avermedia_xc3028_init, |
bc36a686 MCC |
227 | }; |
228 | ||
58ef4f92 HH |
229 | /* ================================================================== |
230 | * tda1004x based DVB-T cards, helper functions | |
231 | */ | |
232 | ||
233 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
234 | const struct firmware **fw, char *name) | |
1da177e4 LT |
235 | { |
236 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
237 | return request_firmware(fw, name, &dev->pci->dev); |
238 | } | |
239 | ||
58ef4f92 HH |
240 | /* ------------------------------------------------------------------ |
241 | * these tuners are tu1216, td1316(a) | |
242 | */ | |
243 | ||
244 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
245 | { | |
246 | struct saa7134_dev *dev = fe->dvb->priv; | |
247 | struct tda1004x_state *state = fe->demodulator_priv; | |
248 | u8 addr = state->config->tuner_address; | |
86ddd96f | 249 | u8 tuner_buf[4]; |
2cf36ac4 | 250 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
251 | sizeof(tuner_buf) }; |
252 | int tuner_frequency = 0; | |
253 | u8 band, cp, filter; | |
254 | ||
255 | /* determine charge pump */ | |
256 | tuner_frequency = params->frequency + 36166000; | |
257 | if (tuner_frequency < 87000000) | |
258 | return -EINVAL; | |
259 | else if (tuner_frequency < 130000000) | |
260 | cp = 3; | |
261 | else if (tuner_frequency < 160000000) | |
262 | cp = 5; | |
263 | else if (tuner_frequency < 200000000) | |
264 | cp = 6; | |
265 | else if (tuner_frequency < 290000000) | |
266 | cp = 3; | |
267 | else if (tuner_frequency < 420000000) | |
268 | cp = 5; | |
269 | else if (tuner_frequency < 480000000) | |
270 | cp = 6; | |
271 | else if (tuner_frequency < 620000000) | |
272 | cp = 3; | |
273 | else if (tuner_frequency < 830000000) | |
274 | cp = 5; | |
275 | else if (tuner_frequency < 895000000) | |
276 | cp = 7; | |
277 | else | |
278 | return -EINVAL; | |
279 | ||
280 | /* determine band */ | |
281 | if (params->frequency < 49000000) | |
282 | return -EINVAL; | |
283 | else if (params->frequency < 161000000) | |
284 | band = 1; | |
285 | else if (params->frequency < 444000000) | |
286 | band = 2; | |
287 | else if (params->frequency < 861000000) | |
288 | band = 4; | |
289 | else | |
290 | return -EINVAL; | |
291 | ||
292 | /* setup PLL filter */ | |
293 | switch (params->u.ofdm.bandwidth) { | |
294 | case BANDWIDTH_6_MHZ: | |
295 | filter = 0; | |
296 | break; | |
297 | ||
298 | case BANDWIDTH_7_MHZ: | |
299 | filter = 0; | |
300 | break; | |
301 | ||
302 | case BANDWIDTH_8_MHZ: | |
303 | filter = 1; | |
304 | break; | |
1da177e4 | 305 | |
86ddd96f MCC |
306 | default: |
307 | return -EINVAL; | |
308 | } | |
309 | ||
310 | /* calculate divisor | |
311 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 312 | */ |
86ddd96f MCC |
313 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
314 | ||
315 | /* setup tuner buffer */ | |
316 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
317 | tuner_buf[1] = tuner_frequency & 0xff; | |
318 | tuner_buf[2] = 0xca; | |
319 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
320 | ||
dea74869 PB |
321 | if (fe->ops.i2c_gate_ctrl) |
322 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 323 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
324 | wprintk("could not write to tuner at addr: 0x%02x\n", |
325 | addr << 1); | |
86ddd96f | 326 | return -EIO; |
58ef4f92 | 327 | } |
2cf36ac4 HH |
328 | msleep(1); |
329 | return 0; | |
330 | } | |
331 | ||
58ef4f92 | 332 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
333 | { |
334 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
335 | struct tda1004x_state *state = fe->demodulator_priv; |
336 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
337 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
338 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 339 | |
2cf36ac4 | 340 | /* setup PLL configuration */ |
dea74869 PB |
341 | if (fe->ops.i2c_gate_ctrl) |
342 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
343 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
344 | return -EIO; | |
86ddd96f | 345 | msleep(1); |
2cf36ac4 | 346 | |
1da177e4 LT |
347 | return 0; |
348 | } | |
349 | ||
2cf36ac4 HH |
350 | /* ------------------------------------------------------------------ */ |
351 | ||
2cf36ac4 | 352 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
353 | .demod_address = 0x8, |
354 | .invert = 1, | |
2cf36ac4 | 355 | .invert_oclk = 0, |
86ddd96f MCC |
356 | .xtal_freq = TDA10046_XTAL_4M, |
357 | .agc_config = TDA10046_AGC_DEFAULT, | |
358 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
359 | .tuner_address = 0x60, |
360 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
361 | }; |
362 | ||
2cf36ac4 HH |
363 | static struct tda1004x_config philips_tu1216_61_config = { |
364 | ||
365 | .demod_address = 0x8, | |
366 | .invert = 1, | |
367 | .invert_oclk = 0, | |
368 | .xtal_freq = TDA10046_XTAL_4M, | |
369 | .agc_config = TDA10046_AGC_DEFAULT, | |
370 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
371 | .tuner_address = 0x61, |
372 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
373 | }; |
374 | ||
375 | /* ------------------------------------------------------------------ */ | |
376 | ||
cbb94521 | 377 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
378 | { |
379 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
380 | struct tda1004x_state *state = fe->demodulator_priv; |
381 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 382 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 383 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
384 | |
385 | /* setup PLL configuration */ | |
dea74869 PB |
386 | if (fe->ops.i2c_gate_ctrl) |
387 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
388 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
389 | return -EIO; | |
2cf36ac4 HH |
390 | return 0; |
391 | } | |
392 | ||
a79ddae9 | 393 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 394 | { |
58ef4f92 HH |
395 | return philips_tda6651_pll_set(fe, params); |
396 | } | |
397 | ||
398 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
399 | { | |
400 | struct saa7134_dev *dev = fe->dvb->priv; | |
401 | struct tda1004x_state *state = fe->demodulator_priv; | |
402 | u8 addr = state->config->tuner_address; | |
403 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
404 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
405 | ||
406 | /* switch the tuner to analog mode */ | |
407 | if (fe->ops.i2c_gate_ctrl) | |
408 | fe->ops.i2c_gate_ctrl(fe, 1); | |
409 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
410 | return -EIO; | |
411 | return 0; | |
2cf36ac4 HH |
412 | } |
413 | ||
58ef4f92 HH |
414 | /* ------------------------------------------------------------------ */ |
415 | ||
cbb94521 HH |
416 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
417 | { | |
418 | struct saa7134_dev *dev = fe->dvb->priv; | |
419 | static u8 msg[] = { 0x00, 0x40}; | |
420 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
421 | ||
422 | ||
423 | if (philips_td1316_tuner_init(fe)) | |
424 | return -EIO; | |
425 | msleep(1); | |
426 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
427 | return -EIO; | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
a79ddae9 | 432 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
433 | { |
434 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 435 | |
58ef4f92 HH |
436 | static u8 msg[] = { 0x00, 0x14 }; |
437 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
438 | ||
439 | if (philips_td1316_tuner_sleep(fe)) | |
440 | return -EIO; | |
2cf36ac4 HH |
441 | |
442 | /* switch the board to analog mode */ | |
dea74869 PB |
443 | if (fe->ops.i2c_gate_ctrl) |
444 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 445 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
446 | return 0; |
447 | } | |
448 | ||
449 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
450 | { | |
451 | struct saa7134_dev *dev = fe->dvb->priv; | |
452 | ||
453 | if (dev->original_demod_sleep) | |
454 | dev->original_demod_sleep(fe); | |
dea74869 | 455 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 456 | return 0; |
2cf36ac4 HH |
457 | } |
458 | ||
459 | static struct tda1004x_config philips_europa_config = { | |
460 | ||
461 | .demod_address = 0x8, | |
462 | .invert = 0, | |
463 | .invert_oclk = 0, | |
464 | .xtal_freq = TDA10046_XTAL_4M, | |
465 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
466 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
467 | .tuner_address = 0x61, |
468 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
469 | }; |
470 | ||
408b664a | 471 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
472 | .demod_address = 0x08, |
473 | .invert = 1, | |
474 | .invert_oclk = 0, | |
475 | .xtal_freq = TDA10046_XTAL_16M, | |
476 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
477 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
478 | .tuner_address = 0x61, |
479 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
480 | }; |
481 | ||
58ef4f92 HH |
482 | /* ------------------------------------------------------------------ |
483 | * tda 1004x based cards with philips silicon tuner | |
484 | */ | |
485 | ||
58ef4f92 HH |
486 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
487 | { | |
58ef4f92 HH |
488 | struct tda1004x_state *state = fe->demodulator_priv; |
489 | ||
490 | u8 addr = state->config->i2c_gate; | |
491 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
492 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
493 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
494 | if (enable) { | |
495 | tda8290_msg.buf = tda8290_close; | |
496 | } else { | |
497 | tda8290_msg.buf = tda8290_open; | |
498 | } | |
06be3035 | 499 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
500 | struct saa7134_dev *dev = fe->dvb->priv; |
501 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
502 | return -EIO; |
503 | } | |
504 | msleep(20); | |
505 | return 0; | |
506 | } | |
507 | ||
58ef4f92 | 508 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 509 | { |
90e9df7f | 510 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 511 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 512 | |
58ef4f92 HH |
513 | switch (state->config->antenna_switch) { |
514 | case 0: break; | |
515 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
516 | saa7134_set_gpio(dev, 21, 0); | |
517 | break; | |
518 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
519 | saa7134_set_gpio(dev, 21, 1); | |
520 | break; | |
587d2fd7 | 521 | } |
587d2fd7 HH |
522 | return 0; |
523 | } | |
524 | ||
58ef4f92 | 525 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 526 | { |
58ef4f92 HH |
527 | struct saa7134_dev *dev = fe->dvb->priv; |
528 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 529 | |
58ef4f92 HH |
530 | switch (state->config->antenna_switch) { |
531 | case 0: break; | |
532 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
533 | saa7134_set_gpio(dev, 21, 1); | |
534 | break; | |
535 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
536 | saa7134_set_gpio(dev, 21, 0); | |
537 | break; | |
538 | } | |
587d2fd7 | 539 | return 0; |
2d6b5f62 | 540 | } |
90e9df7f | 541 | |
d557dab5 MCC |
542 | static int configure_tda827x_fe(struct saa7134_dev *dev, |
543 | struct tda1004x_config *cdec_conf, | |
544 | struct tda827x_config *tuner_conf) | |
90e9df7f | 545 | { |
363c35fc ST |
546 | struct videobuf_dvb_frontend *fe0; |
547 | ||
92abe9ee DB |
548 | /* Get the first frontend */ |
549 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
363c35fc ST |
550 | |
551 | fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); | |
552 | if (fe0->dvb.frontend) { | |
7bff4b4d | 553 | if (cdec_conf->i2c_gate) |
363c35fc ST |
554 | fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
555 | if (dvb_attach(tda827x_attach, fe0->dvb.frontend, | |
d557dab5 MCC |
556 | cdec_conf->tuner_address, |
557 | &dev->i2c_adap, tuner_conf)) | |
558 | return 0; | |
559 | ||
560 | wprintk("no tda827x tuner found at addr: %02x\n", | |
7bff4b4d | 561 | cdec_conf->tuner_address); |
58ef4f92 | 562 | } |
d557dab5 | 563 | return -EINVAL; |
90e9df7f HH |
564 | } |
565 | ||
58ef4f92 | 566 | /* ------------------------------------------------------------------ */ |
261f5081 | 567 | |
7bff4b4d | 568 | static struct tda827x_config tda827x_cfg_0 = { |
7bff4b4d HH |
569 | .init = philips_tda827x_tuner_init, |
570 | .sleep = philips_tda827x_tuner_sleep, | |
571 | .config = 0, | |
572 | .switch_addr = 0 | |
573 | }; | |
574 | ||
575 | static struct tda827x_config tda827x_cfg_1 = { | |
7bff4b4d HH |
576 | .init = philips_tda827x_tuner_init, |
577 | .sleep = philips_tda827x_tuner_sleep, | |
578 | .config = 1, | |
579 | .switch_addr = 0x4b | |
580 | }; | |
581 | ||
582 | static struct tda827x_config tda827x_cfg_2 = { | |
7bff4b4d HH |
583 | .init = philips_tda827x_tuner_init, |
584 | .sleep = philips_tda827x_tuner_sleep, | |
585 | .config = 2, | |
586 | .switch_addr = 0x4b | |
587 | }; | |
588 | ||
589 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
7bff4b4d HH |
590 | .init = philips_tda827x_tuner_init, |
591 | .sleep = philips_tda827x_tuner_sleep, | |
592 | .config = 2, | |
593 | .switch_addr = 0x42 | |
594 | }; | |
595 | ||
596 | /* ------------------------------------------------------------------ */ | |
597 | ||
58ef4f92 | 598 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
599 | .demod_address = 0x08, |
600 | .invert = 1, | |
601 | .invert_oclk = 0, | |
602 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
603 | .agc_config = TDA10046_AGC_TDA827X, |
604 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 605 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
606 | .tuner_address = 0x60, |
607 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 608 | }; |
550a9a5e | 609 | |
58ef4f92 HH |
610 | static struct tda1004x_config philips_tiger_config = { |
611 | .demod_address = 0x08, | |
612 | .invert = 1, | |
613 | .invert_oclk = 0, | |
614 | .xtal_freq = TDA10046_XTAL_16M, | |
615 | .agc_config = TDA10046_AGC_TDA827X, | |
616 | .gpio_config = TDA10046_GP11_I, | |
617 | .if_freq = TDA10046_FREQ_045, | |
618 | .i2c_gate = 0x4b, | |
619 | .tuner_address = 0x61, | |
58ef4f92 HH |
620 | .antenna_switch= 1, |
621 | .request_firmware = philips_tda1004x_request_firmware | |
622 | }; | |
550a9a5e HH |
623 | |
624 | static struct tda1004x_config cinergy_ht_config = { | |
625 | .demod_address = 0x08, | |
626 | .invert = 1, | |
627 | .invert_oclk = 0, | |
628 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
629 | .agc_config = TDA10046_AGC_TDA827X, |
630 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 631 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
632 | .i2c_gate = 0x4b, |
633 | .tuner_address = 0x61, | |
58ef4f92 | 634 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
635 | }; |
636 | ||
58ef4f92 HH |
637 | static struct tda1004x_config cinergy_ht_pci_config = { |
638 | .demod_address = 0x08, | |
639 | .invert = 1, | |
640 | .invert_oclk = 0, | |
641 | .xtal_freq = TDA10046_XTAL_16M, | |
642 | .agc_config = TDA10046_AGC_TDA827X, | |
643 | .gpio_config = TDA10046_GP01_I, | |
644 | .if_freq = TDA10046_FREQ_045, | |
645 | .i2c_gate = 0x4b, | |
646 | .tuner_address = 0x60, | |
58ef4f92 HH |
647 | .request_firmware = philips_tda1004x_request_firmware |
648 | }; | |
649 | ||
650 | static struct tda1004x_config philips_tiger_s_config = { | |
651 | .demod_address = 0x08, | |
652 | .invert = 1, | |
653 | .invert_oclk = 0, | |
654 | .xtal_freq = TDA10046_XTAL_16M, | |
655 | .agc_config = TDA10046_AGC_TDA827X, | |
656 | .gpio_config = TDA10046_GP01_I, | |
657 | .if_freq = TDA10046_FREQ_045, | |
658 | .i2c_gate = 0x4b, | |
659 | .tuner_address = 0x61, | |
58ef4f92 HH |
660 | .antenna_switch= 1, |
661 | .request_firmware = philips_tda1004x_request_firmware | |
662 | }; | |
df42eaf2 | 663 | |
587d2fd7 HH |
664 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
665 | .demod_address = 0x08, | |
666 | .invert = 1, | |
667 | .invert_oclk = 0, | |
668 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
669 | .agc_config = TDA10046_AGC_TDA827X, |
670 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 671 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
672 | .i2c_gate = 0x4b, |
673 | .tuner_address = 0x61, | |
58ef4f92 | 674 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
675 | }; |
676 | ||
c6e53daf TG |
677 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
678 | .demod_address = 0x08, | |
679 | .invert = 1, | |
680 | .invert_oclk = 0, | |
681 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
682 | .agc_config = TDA10046_AGC_TDA827X, |
683 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 684 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
685 | .i2c_gate = 0x4b, |
686 | .tuner_address = 0x61, | |
687 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
688 | }; |
689 | ||
83646817 HH |
690 | static struct tda1004x_config asus_p7131_dual_config = { |
691 | .demod_address = 0x08, | |
692 | .invert = 1, | |
693 | .invert_oclk = 0, | |
694 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
695 | .agc_config = TDA10046_AGC_TDA827X, |
696 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 697 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
698 | .i2c_gate = 0x4b, |
699 | .tuner_address = 0x61, | |
58ef4f92 HH |
700 | .antenna_switch= 2, |
701 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
702 | }; |
703 | ||
420f32fe NS |
704 | static struct tda1004x_config lifeview_trio_config = { |
705 | .demod_address = 0x09, | |
706 | .invert = 1, | |
707 | .invert_oclk = 0, | |
708 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
709 | .agc_config = TDA10046_AGC_TDA827X, |
710 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 711 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
712 | .tuner_address = 0x60, |
713 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
714 | }; |
715 | ||
58ef4f92 | 716 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
717 | .demod_address = 0x08, |
718 | .invert = 1, | |
719 | .invert_oclk = 0, | |
720 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 721 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 722 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 723 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
724 | .tuner_address = 0x60, |
725 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
726 | }; |
727 | ||
58ef4f92 | 728 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
729 | .demod_address = 0x08, |
730 | .invert = 1, | |
731 | .invert_oclk = 0, | |
732 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 733 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 734 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 735 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
736 | .i2c_gate = 0x4b, |
737 | .tuner_address = 0x60, | |
58ef4f92 | 738 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
739 | }; |
740 | ||
e06cea4c HH |
741 | static struct tda1004x_config asus_p7131_4871_config = { |
742 | .demod_address = 0x08, | |
743 | .invert = 1, | |
744 | .invert_oclk = 0, | |
745 | .xtal_freq = TDA10046_XTAL_16M, | |
746 | .agc_config = TDA10046_AGC_TDA827X, | |
747 | .gpio_config = TDA10046_GP01_I, | |
748 | .if_freq = TDA10046_FREQ_045, | |
749 | .i2c_gate = 0x4b, | |
750 | .tuner_address = 0x61, | |
e06cea4c HH |
751 | .antenna_switch= 2, |
752 | .request_firmware = philips_tda1004x_request_firmware | |
753 | }; | |
754 | ||
f3eec0c0 | 755 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
756 | .demod_address = 0x08, |
757 | .invert = 1, | |
758 | .invert_oclk = 0, | |
759 | .xtal_freq = TDA10046_XTAL_16M, | |
760 | .agc_config = TDA10046_AGC_TDA827X, | |
761 | .gpio_config = TDA10046_GP11_I, | |
762 | .if_freq = TDA10046_FREQ_045, | |
763 | .i2c_gate = 0x4b, | |
764 | .tuner_address = 0x61, | |
e06cea4c HH |
765 | .antenna_switch= 2, |
766 | .request_firmware = philips_tda1004x_request_firmware | |
767 | }; | |
261f5081 | 768 | |
b39423a9 SF |
769 | static struct tda1004x_config kworld_dvb_t_210_config = { |
770 | .demod_address = 0x08, | |
771 | .invert = 1, | |
772 | .invert_oclk = 0, | |
773 | .xtal_freq = TDA10046_XTAL_16M, | |
774 | .agc_config = TDA10046_AGC_TDA827X, | |
775 | .gpio_config = TDA10046_GP11_I, | |
776 | .if_freq = TDA10046_FREQ_045, | |
777 | .i2c_gate = 0x4b, | |
778 | .tuner_address = 0x61, | |
b39423a9 SF |
779 | .antenna_switch= 1, |
780 | .request_firmware = philips_tda1004x_request_firmware | |
781 | }; | |
261f5081 | 782 | |
d90d9f5a ES |
783 | static struct tda1004x_config avermedia_super_007_config = { |
784 | .demod_address = 0x08, | |
785 | .invert = 1, | |
786 | .invert_oclk = 0, | |
787 | .xtal_freq = TDA10046_XTAL_16M, | |
788 | .agc_config = TDA10046_AGC_TDA827X, | |
789 | .gpio_config = TDA10046_GP01_I, | |
790 | .if_freq = TDA10046_FREQ_045, | |
791 | .i2c_gate = 0x4b, | |
792 | .tuner_address = 0x60, | |
d90d9f5a ES |
793 | .antenna_switch= 1, |
794 | .request_firmware = philips_tda1004x_request_firmware | |
795 | }; | |
796 | ||
4ba24373 HP |
797 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
798 | .demod_address = 0x08, | |
799 | .invert = 1, | |
800 | .invert_oclk = 0, | |
801 | .xtal_freq = TDA10046_XTAL_16M, | |
802 | .agc_config = TDA10046_AGC_TDA827X, | |
803 | .gpio_config = TDA10046_GP01_I, | |
804 | .if_freq = TDA10046_FREQ_045, | |
805 | .i2c_gate = 0x42, | |
806 | .tuner_address = 0x61, | |
4ba24373 HP |
807 | .antenna_switch = 1, |
808 | .request_firmware = philips_tda1004x_request_firmware | |
809 | }; | |
810 | ||
301e9d64 | 811 | static struct tda1004x_config asus_tiger_3in1_config = { |
812 | .demod_address = 0x0b, | |
813 | .invert = 1, | |
814 | .invert_oclk = 0, | |
815 | .xtal_freq = TDA10046_XTAL_16M, | |
816 | .agc_config = TDA10046_AGC_TDA827X, | |
817 | .gpio_config = TDA10046_GP11_I, | |
818 | .if_freq = TDA10046_FREQ_045, | |
819 | .i2c_gate = 0x4b, | |
820 | .tuner_address = 0x61, | |
821 | .antenna_switch = 1, | |
822 | .request_firmware = philips_tda1004x_request_firmware | |
823 | }; | |
824 | ||
58ef4f92 HH |
825 | /* ------------------------------------------------------------------ |
826 | * special case: this card uses saa713x GPIO22 for the mode switch | |
827 | */ | |
5eda227f | 828 | |
58ef4f92 | 829 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
830 | { |
831 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
832 | philips_tda827x_tuner_init(fe); |
833 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 834 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
835 | return 0; |
836 | } | |
837 | ||
58ef4f92 | 838 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 839 | { |
5eda227f | 840 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 841 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 842 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
843 | philips_tda827x_tuner_sleep(fe); |
844 | return 0; | |
5eda227f HH |
845 | } |
846 | ||
8ce47dad | 847 | static struct tda827x_config ads_duo_cfg = { |
8ce47dad | 848 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
849 | .sleep = ads_duo_tuner_sleep, |
850 | .config = 0 | |
8ce47dad MK |
851 | }; |
852 | ||
58ef4f92 | 853 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
854 | .demod_address = 0x08, |
855 | .invert = 1, | |
856 | .invert_oclk = 0, | |
857 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 858 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 859 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 860 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
861 | .tuner_address = 0x61, |
862 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
863 | }; |
864 | ||
47aeba5a DB |
865 | static struct zl10353_config behold_h6_config = { |
866 | .demod_address = 0x1e>>1, | |
867 | .no_tuner = 1, | |
868 | .parallel_ts = 1, | |
5f77af93 | 869 | .disable_i2c_gate_ctrl = 1, |
47aeba5a DB |
870 | }; |
871 | ||
58ef4f92 HH |
872 | /* ================================================================== |
873 | * tda10086 based DVB-S cards, helper functions | |
874 | */ | |
875 | ||
e2ac28fa IL |
876 | static struct tda10086_config flydvbs = { |
877 | .demod_address = 0x0e, | |
878 | .invert = 0, | |
ea75baf4 | 879 | .diseqc_tone = 0, |
9a1b04e4 HH |
880 | .xtal_freq = TDA10086_XTAL_16M, |
881 | }; | |
882 | ||
883 | static struct tda10086_config sd1878_4m = { | |
884 | .demod_address = 0x0e, | |
885 | .invert = 0, | |
886 | .diseqc_tone = 0, | |
887 | .xtal_freq = TDA10086_XTAL_4M, | |
e2ac28fa IL |
888 | }; |
889 | ||
1b1cee35 HH |
890 | /* ------------------------------------------------------------------ |
891 | * special case: lnb supply is connected to the gated i2c | |
892 | */ | |
893 | ||
894 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
895 | { | |
896 | int res = -EIO; | |
897 | struct saa7134_dev *dev = fe->dvb->priv; | |
898 | if (fe->ops.i2c_gate_ctrl) { | |
899 | fe->ops.i2c_gate_ctrl(fe, 1); | |
900 | if (dev->original_set_voltage) | |
901 | res = dev->original_set_voltage(fe, voltage); | |
902 | fe->ops.i2c_gate_ctrl(fe, 0); | |
903 | } | |
904 | return res; | |
905 | }; | |
906 | ||
907 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
908 | { | |
909 | int res = -EIO; | |
910 | struct saa7134_dev *dev = fe->dvb->priv; | |
911 | if (fe->ops.i2c_gate_ctrl) { | |
912 | fe->ops.i2c_gate_ctrl(fe, 1); | |
913 | if (dev->original_set_high_voltage) | |
914 | res = dev->original_set_high_voltage(fe, arg); | |
915 | fe->ops.i2c_gate_ctrl(fe, 0); | |
916 | } | |
917 | return res; | |
918 | }; | |
919 | ||
5823b3a6 HH |
920 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
921 | { | |
922 | struct saa7134_dev *dev = fe->dvb->priv; | |
923 | u8 wbuf[2] = { 0x1f, 00 }; | |
924 | u8 rbuf; | |
925 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
926 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
927 | ||
928 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
929 | return -EIO; | |
930 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
931 | if (voltage == SEC_VOLTAGE_18) | |
932 | wbuf[1] = rbuf | 0x10; | |
933 | else | |
934 | wbuf[1] = rbuf & 0xef; | |
935 | msg[0].len = 2; | |
936 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
937 | return 0; | |
938 | } | |
939 | ||
940 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
941 | { | |
942 | struct saa7134_dev *dev = fe->dvb->priv; | |
943 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
944 | return -EIO; | |
945 | } | |
946 | ||
58ef4f92 HH |
947 | /* ================================================================== |
948 | * nxt200x based ATSC cards, helper functions | |
949 | */ | |
90e9df7f | 950 | |
3b64e8e2 MK |
951 | static struct nxt200x_config avertvhda180 = { |
952 | .demod_address = 0x0a, | |
3b64e8e2 | 953 | }; |
3e1410ad AB |
954 | |
955 | static struct nxt200x_config kworldatsc110 = { | |
956 | .demod_address = 0x0a, | |
3e1410ad | 957 | }; |
3b64e8e2 | 958 | |
04574185 MS |
959 | /* ------------------------------------------------------------------ */ |
960 | ||
961 | static struct mt312_config avertv_a700_mt312 = { | |
962 | .demod_address = 0x0e, | |
963 | .voltage_inverted = 1, | |
964 | }; | |
965 | ||
966 | static struct zl10036_config avertv_a700_tuner = { | |
967 | .tuner_address = 0x60, | |
968 | }; | |
969 | ||
3abdedd8 MK |
970 | static struct lgdt3305_config hcw_lgdt3305_config = { |
971 | .i2c_addr = 0x0e, | |
972 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
973 | .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE, | |
974 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
975 | .deny_i2c_rptr = 1, | |
976 | .spectral_inversion = 1, | |
977 | .qam_if_khz = 4000, | |
978 | .vsb_if_khz = 3250, | |
979 | }; | |
980 | ||
981 | static struct tda18271_std_map hauppauge_tda18271_std_map = { | |
982 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, | |
983 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
984 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
985 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
986 | }; | |
987 | ||
988 | static struct tda18271_config hcw_tda18271_config = { | |
989 | .std_map = &hauppauge_tda18271_std_map, | |
990 | .gate = TDA18271_GATE_ANALOG, | |
991 | .config = 3, | |
992 | }; | |
993 | ||
994 | static struct tda829x_config tda829x_no_probe = { | |
995 | .probe_tuner = TDA829X_DONT_PROBE, | |
996 | }; | |
997 | ||
58ef4f92 HH |
998 | /* ================================================================== |
999 | * Core code | |
1000 | */ | |
1da177e4 LT |
1001 | |
1002 | static int dvb_init(struct saa7134_dev *dev) | |
1003 | { | |
1c4f76ab | 1004 | int ret; |
bc36a686 | 1005 | int attach_xc3028 = 0; |
363c35fc ST |
1006 | struct videobuf_dvb_frontend *fe0; |
1007 | ||
f972e0bd DB |
1008 | /* FIXME: add support for multi-frontend */ |
1009 | mutex_init(&dev->frontends.lock); | |
7bdf84fc | 1010 | INIT_LIST_HEAD(&dev->frontends.felist); |
f972e0bd DB |
1011 | |
1012 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); | |
f3f741e7 DB |
1013 | fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1); |
1014 | if (!fe0) { | |
f972e0bd DB |
1015 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1016 | return -ENOMEM; | |
1017 | } | |
1018 | ||
1da177e4 LT |
1019 | /* init struct videobuf_dvb */ |
1020 | dev->ts.nr_bufs = 32; | |
1021 | dev->ts.nr_packets = 32*4; | |
363c35fc ST |
1022 | fe0->dvb.name = dev->name; |
1023 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops, | |
0705135e | 1024 | &dev->pci->dev, &dev->slock, |
1da177e4 LT |
1025 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
1026 | V4L2_FIELD_ALTERNATE, | |
1027 | sizeof(struct saa7134_buf), | |
1028 | dev); | |
1029 | ||
1030 | switch (dev->board) { | |
1031 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 1032 | dprintk("pinnacle 300i dvb setup\n"); |
363c35fc | 1033 | fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 1034 | &dev->i2c_adap); |
363c35fc ST |
1035 | if (fe0->dvb.frontend) { |
1036 | fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; | |
6b3ccab7 | 1037 | } |
1da177e4 | 1038 | break; |
a78d0bfa | 1039 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 1040 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 1041 | dprintk("avertv 777 dvb setup\n"); |
363c35fc | 1042 | fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 1043 | &dev->i2c_adap); |
363c35fc ST |
1044 | if (fe0->dvb.frontend) { |
1045 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
fb147e97 MK |
1046 | &dev->i2c_adap, 0x61, |
1047 | TUNER_PHILIPS_TD1316); | |
6b3ccab7 | 1048 | } |
a78d0bfa | 1049 | break; |
95a2fdb6 | 1050 | case SAA7134_BOARD_AVERMEDIA_A16D: |
6e501a3f | 1051 | dprintk("AverMedia A16D dvb setup\n"); |
363c35fc | 1052 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1053 | &avermedia_xc3028_mt352_dev, |
1054 | &dev->i2c_adap); | |
95a2fdb6 MCC |
1055 | attach_xc3028 = 1; |
1056 | break; | |
1da177e4 | 1057 | case SAA7134_BOARD_MD7134: |
363c35fc | 1058 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1059 | &medion_cardbus, |
1060 | &dev->i2c_adap); | |
363c35fc ST |
1061 | if (fe0->dvb.frontend) { |
1062 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
cb89cd33 MK |
1063 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1064 | TUNER_PHILIPS_FMD1216ME_MK3); | |
6b3ccab7 | 1065 | } |
1da177e4 | 1066 | break; |
86ddd96f | 1067 | case SAA7134_BOARD_PHILIPS_TOUGH: |
363c35fc | 1068 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1069 | &philips_tu1216_60_config, |
1070 | &dev->i2c_adap); | |
363c35fc ST |
1071 | if (fe0->dvb.frontend) { |
1072 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1073 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1074 | } |
86ddd96f MCC |
1075 | break; |
1076 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1077 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
d557dab5 MCC |
1078 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1079 | &tda827x_cfg_0) < 0) | |
1080 | goto dettach_frontend; | |
86ddd96f | 1081 | break; |
2cf36ac4 | 1082 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1083 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
363c35fc | 1084 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1085 | &philips_europa_config, |
1086 | &dev->i2c_adap); | |
363c35fc ST |
1087 | if (fe0->dvb.frontend) { |
1088 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1089 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1090 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1091 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1092 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1093 | } |
2cf36ac4 HH |
1094 | break; |
1095 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
363c35fc | 1096 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1097 | &philips_tu1216_61_config, |
1098 | &dev->i2c_adap); | |
363c35fc ST |
1099 | if (fe0->dvb.frontend) { |
1100 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1101 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1102 | } |
2cf36ac4 | 1103 | break; |
b39423a9 | 1104 | case SAA7134_BOARD_KWORLD_DVBT_210: |
d557dab5 MCC |
1105 | if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config, |
1106 | &tda827x_cfg_2) < 0) | |
1107 | goto dettach_frontend; | |
b39423a9 | 1108 | break; |
90e9df7f | 1109 | case SAA7134_BOARD_PHILIPS_TIGER: |
d557dab5 MCC |
1110 | if (configure_tda827x_fe(dev, &philips_tiger_config, |
1111 | &tda827x_cfg_0) < 0) | |
1112 | goto dettach_frontend; | |
587d2fd7 HH |
1113 | break; |
1114 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
d557dab5 MCC |
1115 | if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, |
1116 | &tda827x_cfg_1) < 0) | |
1117 | goto dettach_frontend; | |
90e9df7f | 1118 | break; |
c6e53daf | 1119 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
d557dab5 MCC |
1120 | if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, |
1121 | &tda827x_cfg_1) < 0) | |
1122 | goto dettach_frontend; | |
c6e53daf | 1123 | break; |
3abdedd8 MK |
1124 | case SAA7134_BOARD_HAUPPAUGE_HVR1120: |
1125 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, | |
1126 | &hcw_lgdt3305_config, | |
1127 | &dev->i2c_adap); | |
1128 | if (fe0->dvb.frontend) { | |
1129 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1130 | &dev->i2c_adap, 0x4b, | |
1131 | &tda829x_no_probe); | |
1132 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1133 | 0x60, &dev->i2c_adap, | |
1134 | &hcw_tda18271_config); | |
1135 | } | |
1136 | break; | |
d4b0aba4 | 1137 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
d557dab5 MCC |
1138 | if (configure_tda827x_fe(dev, &asus_p7131_dual_config, |
1139 | &tda827x_cfg_0) < 0) | |
1140 | goto dettach_frontend; | |
d4b0aba4 | 1141 | break; |
3d8466ec | 1142 | case SAA7134_BOARD_FLYDVBT_LR301: |
d557dab5 MCC |
1143 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1144 | &tda827x_cfg_0) < 0) | |
1145 | goto dettach_frontend; | |
3d8466ec | 1146 | break; |
92abe9ee | 1147 | case SAA7134_BOARD_FLYDVB_TRIO: |
d557dab5 MCC |
1148 | if (!use_frontend) { /* terrestrial */ |
1149 | if (configure_tda827x_fe(dev, &lifeview_trio_config, | |
1150 | &tda827x_cfg_0) < 0) | |
1151 | goto dettach_frontend; | |
7bff4b4d | 1152 | } else { /* satellite */ |
363c35fc ST |
1153 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1154 | if (fe0->dvb.frontend) { | |
1155 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63, | |
1f683cd8 | 1156 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1157 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
d557dab5 | 1158 | goto dettach_frontend; |
1f683cd8 | 1159 | } |
363c35fc | 1160 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap, |
1f683cd8 | 1161 | 0x08, 0, 0) == NULL) { |
5823b3a6 | 1162 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
d557dab5 | 1163 | goto dettach_frontend; |
1f683cd8 NS |
1164 | } |
1165 | } | |
6b3ccab7 | 1166 | } |
420f32fe | 1167 | break; |
df42eaf2 | 1168 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1169 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
363c35fc | 1170 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1171 | &ads_tech_duo_config, |
1172 | &dev->i2c_adap); | |
363c35fc ST |
1173 | if (fe0->dvb.frontend) { |
1174 | if (dvb_attach(tda827x_attach,fe0->dvb.frontend, | |
7bff4b4d HH |
1175 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1176 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1177 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d | 1178 | ads_tech_duo_config.tuner_address); |
d557dab5 | 1179 | goto dettach_frontend; |
ede2200d | 1180 | } |
bc36ec74 MCC |
1181 | } else |
1182 | wprintk("failed to attach tda10046\n"); | |
df42eaf2 | 1183 | break; |
3dfb729f | 1184 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
d557dab5 MCC |
1185 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
1186 | &tda827x_cfg_0) < 0) | |
1187 | goto dettach_frontend; | |
d95b8942 | 1188 | break; |
5eda227f | 1189 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1190 | if (!use_frontend) { /* terrestrial */ |
d557dab5 MCC |
1191 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1192 | &tda827x_cfg_0) < 0) | |
1193 | goto dettach_frontend; | |
4b1431ca | 1194 | } else { /* satellite */ |
363c35fc | 1195 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
4b1431ca | 1196 | &flydvbs, &dev->i2c_adap); |
363c35fc ST |
1197 | if (fe0->dvb.frontend) { |
1198 | struct dvb_frontend *fe = fe0->dvb.frontend; | |
5823b3a6 HH |
1199 | u8 dev_id = dev->eedata[2]; |
1200 | u8 data = 0xc4; | |
1201 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1202 | ||
363c35fc | 1203 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, |
d557dab5 | 1204 | 0x60, &dev->i2c_adap, 0) == NULL) { |
4b1431ca | 1205 | wprintk("%s: Medion Quadro, no tda826x " |
5823b3a6 | 1206 | "found !\n", __func__); |
d557dab5 MCC |
1207 | goto dettach_frontend; |
1208 | } | |
5823b3a6 HH |
1209 | if (dev_id != 0x08) { |
1210 | /* we need to open the i2c gate (we know it exists) */ | |
1211 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1212 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1213 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 HH |
1214 | wprintk("%s: Medion Quadro, no ISL6405 " |
1215 | "found !\n", __func__); | |
d557dab5 MCC |
1216 | goto dettach_frontend; |
1217 | } | |
e9c1ac9d HH |
1218 | if (dev_id == 0x07) { |
1219 | /* fire up the 2nd section of the LNB supply since | |
1220 | we can't do this from the other section */ | |
1221 | msg.buf = &data; | |
1222 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1223 | } | |
5823b3a6 HH |
1224 | fe->ops.i2c_gate_ctrl(fe, 0); |
1225 | dev->original_set_voltage = fe->ops.set_voltage; | |
1226 | fe->ops.set_voltage = md8800_set_voltage; | |
1227 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1228 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1229 | } else { | |
1230 | fe->ops.set_voltage = md8800_set_voltage2; | |
1231 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1232 | } | |
4b1431ca HH |
1233 | } |
1234 | } | |
5eda227f | 1235 | break; |
3b64e8e2 | 1236 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
363c35fc | 1237 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
f7b54b10 | 1238 | &dev->i2c_adap); |
363c35fc ST |
1239 | if (fe0->dvb.frontend) |
1240 | dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61, | |
47a9991e | 1241 | NULL, DVB_PLL_TDHU2); |
3b64e8e2 | 1242 | break; |
f689d908 | 1243 | case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI: |
3e1410ad | 1244 | case SAA7134_BOARD_KWORLD_ATSC110: |
363c35fc | 1245 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
f7b54b10 | 1246 | &dev->i2c_adap); |
363c35fc ST |
1247 | if (fe0->dvb.frontend) |
1248 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
62ff817a MK |
1249 | &dev->i2c_adap, 0x61, |
1250 | TUNER_PHILIPS_TUV1236D); | |
3e1410ad | 1251 | break; |
e2ac28fa | 1252 | case SAA7134_BOARD_FLYDVBS_LR300: |
363c35fc | 1253 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
f7b54b10 | 1254 | &dev->i2c_adap); |
363c35fc ST |
1255 | if (fe0->dvb.frontend) { |
1256 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
f7b54b10 | 1257 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1258 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 | 1259 | goto dettach_frontend; |
e2ac28fa | 1260 | } |
363c35fc | 1261 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
f7b54b10 | 1262 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 | 1263 | wprintk("%s: No ISL6421 found!\n", __func__); |
d557dab5 | 1264 | goto dettach_frontend; |
e2ac28fa IL |
1265 | } |
1266 | } | |
1267 | break; | |
cf146ca4 | 1268 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
363c35fc | 1269 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
0e8f4cc5 MS |
1270 | &medion_cardbus, |
1271 | &dev->i2c_adap); | |
363c35fc ST |
1272 | if (fe0->dvb.frontend) { |
1273 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1274 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 | 1275 | |
363c35fc | 1276 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, |
cb89cd33 MK |
1277 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1278 | TUNER_PHILIPS_FMD1216ME_MK3); | |
cf146ca4 HH |
1279 | } |
1280 | break; | |
cbb94521 | 1281 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
363c35fc | 1282 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
cbb94521 HH |
1283 | &philips_europa_config, |
1284 | &dev->i2c_adap); | |
363c35fc ST |
1285 | if (fe0->dvb.frontend) { |
1286 | fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1287 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
cbb94521 HH |
1288 | } |
1289 | break; | |
550a9a5e | 1290 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
d557dab5 MCC |
1291 | if (configure_tda827x_fe(dev, &cinergy_ht_config, |
1292 | &tda827x_cfg_0) < 0) | |
1293 | goto dettach_frontend; | |
9de271e6 MK |
1294 | break; |
1295 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
d557dab5 MCC |
1296 | if (configure_tda827x_fe(dev, &cinergy_ht_pci_config, |
1297 | &tda827x_cfg_0) < 0) | |
1298 | goto dettach_frontend; | |
58ef4f92 HH |
1299 | break; |
1300 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
d557dab5 MCC |
1301 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1302 | &tda827x_cfg_2) < 0) | |
1303 | goto dettach_frontend; | |
550a9a5e | 1304 | break; |
e06cea4c | 1305 | case SAA7134_BOARD_ASUS_P7131_4871: |
d557dab5 MCC |
1306 | if (configure_tda827x_fe(dev, &asus_p7131_4871_config, |
1307 | &tda827x_cfg_2) < 0) | |
1308 | goto dettach_frontend; | |
e06cea4c | 1309 | break; |
f3eec0c0 | 1310 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
d557dab5 MCC |
1311 | if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, |
1312 | &tda827x_cfg_2) < 0) | |
1313 | goto dettach_frontend; | |
e06cea4c | 1314 | break; |
d90d9f5a | 1315 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
d557dab5 MCC |
1316 | if (configure_tda827x_fe(dev, &avermedia_super_007_config, |
1317 | &tda827x_cfg_0) < 0) | |
1318 | goto dettach_frontend; | |
d90d9f5a | 1319 | break; |
4ba24373 | 1320 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
d557dab5 MCC |
1321 | if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, |
1322 | &tda827x_cfg_2_sw42) < 0) | |
1323 | goto dettach_frontend; | |
4ba24373 | 1324 | break; |
6ab465a8 | 1325 | case SAA7134_BOARD_PHILIPS_SNAKE: |
363c35fc | 1326 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
6ab465a8 | 1327 | &dev->i2c_adap); |
363c35fc ST |
1328 | if (fe0->dvb.frontend) { |
1329 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
d557dab5 | 1330 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1331 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 MCC |
1332 | goto dettach_frontend; |
1333 | } | |
363c35fc | 1334 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
d557dab5 | 1335 | &dev->i2c_adap, 0, 0) == NULL) { |
5823b3a6 | 1336 | wprintk("%s: No lnbp21 found!\n", __func__); |
d557dab5 MCC |
1337 | goto dettach_frontend; |
1338 | } | |
6ab465a8 HH |
1339 | } |
1340 | break; | |
7b5b3f17 | 1341 | case SAA7134_BOARD_CREATIX_CTX953: |
d557dab5 MCC |
1342 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1343 | &tda827x_cfg_0) < 0) | |
1344 | goto dettach_frontend; | |
7b5b3f17 | 1345 | break; |
6a6179b6 | 1346 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
d557dab5 MCC |
1347 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1348 | &tda827x_cfg_2) < 0) | |
1349 | goto dettach_frontend; | |
6a6179b6 | 1350 | break; |
bc36a686 | 1351 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
6e501a3f TF |
1352 | dprintk("AverMedia E506R dvb setup\n"); |
1353 | saa7134_set_gpio(dev, 25, 0); | |
1354 | msleep(10); | |
1355 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1356 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1357 | &avermedia_xc3028_mt352_dev, |
1358 | &dev->i2c_adap); | |
bc36a686 | 1359 | attach_xc3028 = 1; |
e2fc00c2 | 1360 | break; |
637afdb5 | 1361 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
363c35fc | 1362 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
9a1b04e4 | 1363 | &sd1878_4m, &dev->i2c_adap); |
363c35fc | 1364 | if (fe0->dvb.frontend) { |
637afdb5 | 1365 | struct dvb_frontend *fe; |
363c35fc | 1366 | if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, |
d557dab5 | 1367 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) { |
637afdb5 | 1368 | wprintk("%s: MD7134 DVB-S, no SD1878 " |
5823b3a6 | 1369 | "found !\n", __func__); |
d557dab5 MCC |
1370 | goto dettach_frontend; |
1371 | } | |
637afdb5 | 1372 | /* we need to open the i2c gate (we know it exists) */ |
363c35fc | 1373 | fe = fe0->dvb.frontend; |
637afdb5 HH |
1374 | fe->ops.i2c_gate_ctrl(fe, 1); |
1375 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1376 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
637afdb5 | 1377 | wprintk("%s: MD7134 DVB-S, no ISL6405 " |
5823b3a6 | 1378 | "found !\n", __func__); |
d557dab5 MCC |
1379 | goto dettach_frontend; |
1380 | } | |
637afdb5 HH |
1381 | fe->ops.i2c_gate_ctrl(fe, 0); |
1382 | dev->original_set_voltage = fe->ops.set_voltage; | |
1383 | fe->ops.set_voltage = md8800_set_voltage; | |
1384 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1385 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1386 | } | |
1387 | break; | |
e2fc00c2 MP |
1388 | case SAA7134_BOARD_AVERMEDIA_M103: |
1389 | saa7134_set_gpio(dev, 25, 0); | |
1390 | msleep(10); | |
1391 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1392 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
e2fc00c2 MP |
1393 | &avermedia_xc3028_mt352_dev, |
1394 | &dev->i2c_adap); | |
1395 | attach_xc3028 = 1; | |
1396 | break; | |
301e9d64 | 1397 | case SAA7134_BOARD_ASUSTeK_TIGER_3IN1: |
1398 | if (!use_frontend) { /* terrestrial */ | |
1399 | if (configure_tda827x_fe(dev, &asus_tiger_3in1_config, | |
1400 | &tda827x_cfg_2) < 0) | |
1401 | goto dettach_frontend; | |
1402 | } else { /* satellite */ | |
363c35fc | 1403 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
301e9d64 | 1404 | &flydvbs, &dev->i2c_adap); |
363c35fc | 1405 | if (fe0->dvb.frontend) { |
301e9d64 | 1406 | if (dvb_attach(tda826x_attach, |
363c35fc | 1407 | fe0->dvb.frontend, 0x60, |
301e9d64 | 1408 | &dev->i2c_adap, 0) == NULL) { |
1409 | wprintk("%s: Asus Tiger 3in1, no " | |
1410 | "tda826x found!\n", __func__); | |
1411 | goto dettach_frontend; | |
1412 | } | |
363c35fc | 1413 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
301e9d64 | 1414 | &dev->i2c_adap, 0, 0) == NULL) { |
1415 | wprintk("%s: Asus Tiger 3in1, no lnbp21" | |
1416 | " found!\n", __func__); | |
1417 | goto dettach_frontend; | |
1418 | } | |
1419 | } | |
1420 | } | |
1421 | break; | |
028165a3 HP |
1422 | case SAA7134_BOARD_ASUSTeK_TIGER: |
1423 | if (configure_tda827x_fe(dev, &philips_tiger_config, | |
1424 | &tda827x_cfg_0) < 0) | |
1425 | goto dettach_frontend; | |
1426 | break; | |
47aeba5a | 1427 | case SAA7134_BOARD_BEHOLD_H6: |
b0c4be8c | 1428 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
47aeba5a DB |
1429 | &behold_h6_config, |
1430 | &dev->i2c_adap); | |
b0c4be8c MCC |
1431 | if (fe0->dvb.frontend) { |
1432 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
47aeba5a DB |
1433 | &dev->i2c_adap, 0x61, |
1434 | TUNER_PHILIPS_FMD1216ME_MK3); | |
1435 | } | |
04574185 MS |
1436 | break; |
1437 | case SAA7134_BOARD_AVERMEDIA_A700_PRO: | |
1438 | case SAA7134_BOARD_AVERMEDIA_A700_HYBRID: | |
1439 | /* Zarlink ZL10313 */ | |
1440 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1441 | &avertv_a700_mt312, &dev->i2c_adap); | |
1442 | if (fe0->dvb.frontend) { | |
1443 | if (dvb_attach(zl10036_attach, fe0->dvb.frontend, | |
1444 | &avertv_a700_tuner, &dev->i2c_adap) == NULL) { | |
1445 | wprintk("%s: No zl10036 found!\n", | |
1446 | __func__); | |
1447 | } | |
1448 | } | |
47aeba5a | 1449 | break; |
1da177e4 | 1450 | default: |
cf3c34c8 | 1451 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1452 | break; |
1453 | } | |
1454 | ||
bc36a686 MCC |
1455 | if (attach_xc3028) { |
1456 | struct dvb_frontend *fe; | |
1457 | struct xc2028_config cfg = { | |
1458 | .i2c_adap = &dev->i2c_adap, | |
1459 | .i2c_addr = 0x61, | |
bc36a686 | 1460 | }; |
95a2fdb6 | 1461 | |
363c35fc | 1462 | if (!fe0->dvb.frontend) |
f3f741e7 | 1463 | goto dettach_frontend; |
95a2fdb6 | 1464 | |
363c35fc | 1465 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
bc36a686 MCC |
1466 | if (!fe) { |
1467 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1468 | dev->name); | |
d557dab5 | 1469 | goto dettach_frontend; |
bc36a686 MCC |
1470 | } |
1471 | } | |
1472 | ||
363c35fc | 1473 | if (NULL == fe0->dvb.frontend) { |
cf3c34c8 | 1474 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
f3f741e7 | 1475 | goto dettach_frontend; |
1da177e4 | 1476 | } |
d7cba043 | 1477 | /* define general-purpose callback pointer */ |
363c35fc | 1478 | fe0->dvb.frontend->callback = saa7134_tuner_callback; |
1da177e4 LT |
1479 | |
1480 | /* register everything else */ | |
363c35fc | 1481 | ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
59b1842d | 1482 | &dev->pci->dev, adapter_nr, 0); |
1c4f76ab HH |
1483 | |
1484 | /* this sequence is necessary to make the tda1004x load its firmware | |
1485 | * and to enter analog mode of hybrid boards | |
1486 | */ | |
1487 | if (!ret) { | |
363c35fc ST |
1488 | if (fe0->dvb.frontend->ops.init) |
1489 | fe0->dvb.frontend->ops.init(fe0->dvb.frontend); | |
1490 | if (fe0->dvb.frontend->ops.sleep) | |
1491 | fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend); | |
1492 | if (fe0->dvb.frontend->ops.tuner_ops.sleep) | |
1493 | fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend); | |
1c4f76ab HH |
1494 | } |
1495 | return ret; | |
d557dab5 MCC |
1496 | |
1497 | dettach_frontend: | |
f3f741e7 DB |
1498 | videobuf_dvb_dealloc_frontends(&dev->frontends); |
1499 | return -EINVAL; | |
1da177e4 LT |
1500 | } |
1501 | ||
1502 | static int dvb_fini(struct saa7134_dev *dev) | |
1503 | { | |
363c35fc ST |
1504 | struct videobuf_dvb_frontend *fe0; |
1505 | ||
1506 | /* Get the first frontend */ | |
1507 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
1508 | if (!fe0) | |
1509 | return -EINVAL; | |
1510 | ||
7f171123 MCC |
1511 | /* FIXME: I suspect that this code is bogus, since the entry for |
1512 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1513 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1514 | */ | |
1515 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1516 | struct v4l2_priv_tun_config tda9887_cfg; | |
1517 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1518 | ||
1519 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1520 | tda9887_cfg.priv = &on; | |
1da177e4 | 1521 | |
1da177e4 | 1522 | /* otherwise we don't detect the tuner on next insmod */ |
fac6986c | 1523 | saa_call_all(dev, tuner, s_config, &tda9887_cfg); |
5823b3a6 | 1524 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
e9c1ac9d | 1525 | if ((dev->eedata[2] == 0x07) && use_frontend) { |
5823b3a6 HH |
1526 | /* turn off the 2nd lnb supply */ |
1527 | u8 data = 0x80; | |
1528 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1529 | struct dvb_frontend *fe; | |
363c35fc | 1530 | fe = fe0->dvb.frontend; |
5823b3a6 HH |
1531 | if (fe->ops.i2c_gate_ctrl) { |
1532 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1533 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1534 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1535 | } | |
1536 | } | |
7f171123 | 1537 | } |
f3f741e7 | 1538 | videobuf_dvb_unregister_bus(&dev->frontends); |
1da177e4 LT |
1539 | return 0; |
1540 | } | |
1541 | ||
1542 | static struct saa7134_mpeg_ops dvb_ops = { | |
1543 | .type = SAA7134_MPEG_DVB, | |
1544 | .init = dvb_init, | |
1545 | .fini = dvb_fini, | |
1546 | }; | |
1547 | ||
1548 | static int __init dvb_register(void) | |
1549 | { | |
1550 | return saa7134_ts_register(&dvb_ops); | |
1551 | } | |
1552 | ||
1553 | static void __exit dvb_unregister(void) | |
1554 | { | |
1555 | saa7134_ts_unregister(&dvb_ops); | |
1556 | } | |
1557 | ||
1558 | module_init(dvb_register); | |
1559 | module_exit(dvb_unregister); | |
1560 | ||
1561 | /* ------------------------------------------------------------------ */ | |
1562 | /* | |
1563 | * Local variables: | |
1564 | * c-basic-offset: 8 | |
1565 | * End: | |
1566 | */ |