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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
1da177e4 | 36 | |
29780bb7 | 37 | #ifdef HAVE_MT352 |
86ddd96f MCC |
38 | # include "mt352.h" |
39 | # include "mt352_priv.h" /* FIXME */ | |
40 | #endif | |
29780bb7 | 41 | #ifdef HAVE_TDA1004X |
86ddd96f MCC |
42 | # include "tda1004x.h" |
43 | #endif | |
3b64e8e2 MK |
44 | #ifdef HAVE_NXT200X |
45 | # include "nxt200x.h" | |
3b64e8e2 | 46 | #endif |
1da177e4 LT |
47 | |
48 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
49 | MODULE_LICENSE("GPL"); | |
50 | ||
51 | static unsigned int antenna_pwr = 0; | |
86ddd96f | 52 | |
1da177e4 LT |
53 | module_param(antenna_pwr, int, 0444); |
54 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
55 | ||
56 | /* ------------------------------------------------------------------ */ | |
57 | ||
29780bb7 | 58 | #ifdef HAVE_MT352 |
1da177e4 LT |
59 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
60 | { | |
61 | u32 ok; | |
62 | ||
63 | if (!on) { | |
64 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
65 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
66 | return 0; | |
67 | } | |
68 | ||
69 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
70 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
71 | udelay(10); | |
72 | ||
73 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
74 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
75 | udelay(10); | |
76 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
77 | udelay(10); | |
78 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
79 | printk("%s: %s %s\n", dev->name, __FUNCTION__, | |
80 | ok ? "on" : "off"); | |
81 | ||
82 | if (!ok) | |
83 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
84 | return ok; | |
85 | } | |
86 | ||
87 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
88 | { | |
89 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
90 | static u8 reset [] = { RESET, 0x80 }; | |
91 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
92 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
93 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
94 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
95 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
96 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
97 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
98 | struct saa7134_dev *dev= fe->dvb->priv; | |
99 | ||
100 | printk("%s: %s called\n",dev->name,__FUNCTION__); | |
101 | ||
102 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
103 | udelay(200); | |
104 | mt352_write(fe, reset, sizeof(reset)); | |
105 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
106 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
107 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
108 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
109 | ||
110 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
111 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
112 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
113 | return 0; | |
114 | } | |
115 | ||
a78d0bfa JAR |
116 | static int mt352_aver777_init(struct dvb_frontend* fe) |
117 | { | |
118 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
119 | static u8 reset [] = { RESET, 0x80 }; | |
120 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
121 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
122 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
123 | ||
124 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
125 | udelay(200); | |
126 | mt352_write(fe, reset, sizeof(reset)); | |
127 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
128 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
129 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
130 | ||
131 | return 0; | |
132 | } | |
133 | ||
1da177e4 LT |
134 | static int mt352_pinnacle_pll_set(struct dvb_frontend* fe, |
135 | struct dvb_frontend_parameters* params, | |
136 | u8* pllbuf) | |
137 | { | |
138 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
139 | static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE; | |
140 | struct saa7134_dev *dev = fe->dvb->priv; | |
141 | struct v4l2_frequency f; | |
142 | ||
143 | /* set frequency (mt2050) */ | |
144 | f.tuner = 0; | |
145 | f.type = V4L2_TUNER_DIGITAL_TV; | |
146 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
147 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
148 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); | |
149 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off); | |
150 | ||
151 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
152 | ||
153 | /* mt352 setup */ | |
154 | mt352_pinnacle_init(fe); | |
155 | pllbuf[0] = 0xc2; | |
156 | pllbuf[1] = 0x00; | |
157 | pllbuf[2] = 0x00; | |
158 | pllbuf[3] = 0x80; | |
159 | pllbuf[4] = 0x00; | |
160 | return 0; | |
161 | } | |
162 | ||
a78d0bfa JAR |
163 | static int mt352_aver777_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, u8* pllbuf) |
164 | { | |
165 | pllbuf[0] = 0xc2; | |
166 | dvb_pll_configure(&dvb_pll_philips_td1316, pllbuf+1, | |
167 | params->frequency, | |
168 | params->u.ofdm.bandwidth); | |
169 | return 0; | |
170 | } | |
171 | ||
1da177e4 LT |
172 | static struct mt352_config pinnacle_300i = { |
173 | .demod_address = 0x3c >> 1, | |
174 | .adc_clock = 20333, | |
175 | .if2 = 36150, | |
176 | .no_tuner = 1, | |
177 | .demod_init = mt352_pinnacle_init, | |
178 | .pll_set = mt352_pinnacle_pll_set, | |
179 | }; | |
a78d0bfa JAR |
180 | |
181 | static struct mt352_config avermedia_777 = { | |
182 | .demod_address = 0xf, | |
183 | .demod_init = mt352_aver777_init, | |
184 | .pll_set = mt352_aver777_pll_set, | |
185 | }; | |
86ddd96f | 186 | #endif |
1da177e4 LT |
187 | |
188 | /* ------------------------------------------------------------------ */ | |
189 | ||
29780bb7 | 190 | #ifdef HAVE_TDA1004X |
1da177e4 | 191 | |
2cf36ac4 | 192 | static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
1da177e4 LT |
193 | { |
194 | struct saa7134_dev *dev = fe->dvb->priv; | |
86ddd96f | 195 | u8 tuner_buf[4]; |
2cf36ac4 | 196 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
197 | sizeof(tuner_buf) }; |
198 | int tuner_frequency = 0; | |
199 | u8 band, cp, filter; | |
200 | ||
201 | /* determine charge pump */ | |
202 | tuner_frequency = params->frequency + 36166000; | |
203 | if (tuner_frequency < 87000000) | |
204 | return -EINVAL; | |
205 | else if (tuner_frequency < 130000000) | |
206 | cp = 3; | |
207 | else if (tuner_frequency < 160000000) | |
208 | cp = 5; | |
209 | else if (tuner_frequency < 200000000) | |
210 | cp = 6; | |
211 | else if (tuner_frequency < 290000000) | |
212 | cp = 3; | |
213 | else if (tuner_frequency < 420000000) | |
214 | cp = 5; | |
215 | else if (tuner_frequency < 480000000) | |
216 | cp = 6; | |
217 | else if (tuner_frequency < 620000000) | |
218 | cp = 3; | |
219 | else if (tuner_frequency < 830000000) | |
220 | cp = 5; | |
221 | else if (tuner_frequency < 895000000) | |
222 | cp = 7; | |
223 | else | |
224 | return -EINVAL; | |
225 | ||
226 | /* determine band */ | |
227 | if (params->frequency < 49000000) | |
228 | return -EINVAL; | |
229 | else if (params->frequency < 161000000) | |
230 | band = 1; | |
231 | else if (params->frequency < 444000000) | |
232 | band = 2; | |
233 | else if (params->frequency < 861000000) | |
234 | band = 4; | |
235 | else | |
236 | return -EINVAL; | |
237 | ||
238 | /* setup PLL filter */ | |
239 | switch (params->u.ofdm.bandwidth) { | |
240 | case BANDWIDTH_6_MHZ: | |
241 | filter = 0; | |
242 | break; | |
243 | ||
244 | case BANDWIDTH_7_MHZ: | |
245 | filter = 0; | |
246 | break; | |
247 | ||
248 | case BANDWIDTH_8_MHZ: | |
249 | filter = 1; | |
250 | break; | |
1da177e4 | 251 | |
86ddd96f MCC |
252 | default: |
253 | return -EINVAL; | |
254 | } | |
255 | ||
256 | /* calculate divisor | |
257 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 258 | */ |
86ddd96f MCC |
259 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
260 | ||
261 | /* setup tuner buffer */ | |
262 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
263 | tuner_buf[1] = tuner_frequency & 0xff; | |
264 | tuner_buf[2] = 0xca; | |
265 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
266 | ||
267 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
268 | return -EIO; | |
2cf36ac4 HH |
269 | msleep(1); |
270 | return 0; | |
271 | } | |
272 | ||
273 | static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe) | |
274 | { | |
275 | struct saa7134_dev *dev = fe->dvb->priv; | |
276 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; | |
277 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 278 | |
2cf36ac4 HH |
279 | /* setup PLL configuration */ |
280 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
281 | return -EIO; | |
86ddd96f | 282 | msleep(1); |
2cf36ac4 | 283 | |
1da177e4 LT |
284 | return 0; |
285 | } | |
286 | ||
2cf36ac4 HH |
287 | /* ------------------------------------------------------------------ */ |
288 | ||
289 | static int philips_tu1216_pll_60_init(struct dvb_frontend *fe) | |
290 | { | |
291 | return philips_tda6651_pll_init(0x60, fe); | |
292 | } | |
293 | ||
294 | static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
295 | { | |
296 | return philips_tda6651_pll_set(0x60, fe, params); | |
297 | } | |
298 | ||
86ddd96f MCC |
299 | static int philips_tu1216_request_firmware(struct dvb_frontend *fe, |
300 | const struct firmware **fw, char *name) | |
1da177e4 LT |
301 | { |
302 | struct saa7134_dev *dev = fe->dvb->priv; | |
303 | return request_firmware(fw, name, &dev->pci->dev); | |
304 | } | |
305 | ||
2cf36ac4 | 306 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
307 | |
308 | .demod_address = 0x8, | |
309 | .invert = 1, | |
2cf36ac4 | 310 | .invert_oclk = 0, |
86ddd96f MCC |
311 | .xtal_freq = TDA10046_XTAL_4M, |
312 | .agc_config = TDA10046_AGC_DEFAULT, | |
313 | .if_freq = TDA10046_FREQ_3617, | |
2cf36ac4 HH |
314 | .pll_init = philips_tu1216_pll_60_init, |
315 | .pll_set = philips_tu1216_pll_60_set, | |
86ddd96f MCC |
316 | .pll_sleep = NULL, |
317 | .request_firmware = philips_tu1216_request_firmware, | |
318 | }; | |
319 | ||
320 | /* ------------------------------------------------------------------ */ | |
321 | ||
2cf36ac4 HH |
322 | static int philips_tu1216_pll_61_init(struct dvb_frontend *fe) |
323 | { | |
324 | return philips_tda6651_pll_init(0x61, fe); | |
325 | } | |
326 | ||
327 | static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
328 | { | |
329 | return philips_tda6651_pll_set(0x61, fe, params); | |
330 | } | |
331 | ||
332 | static struct tda1004x_config philips_tu1216_61_config = { | |
333 | ||
334 | .demod_address = 0x8, | |
335 | .invert = 1, | |
336 | .invert_oclk = 0, | |
337 | .xtal_freq = TDA10046_XTAL_4M, | |
338 | .agc_config = TDA10046_AGC_DEFAULT, | |
339 | .if_freq = TDA10046_FREQ_3617, | |
340 | .pll_init = philips_tu1216_pll_61_init, | |
341 | .pll_set = philips_tu1216_pll_61_set, | |
342 | .pll_sleep = NULL, | |
343 | .request_firmware = philips_tu1216_request_firmware, | |
344 | }; | |
345 | ||
346 | /* ------------------------------------------------------------------ */ | |
347 | ||
348 | static int philips_europa_pll_init(struct dvb_frontend *fe) | |
349 | { | |
350 | struct saa7134_dev *dev = fe->dvb->priv; | |
351 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; | |
352 | struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
353 | ||
354 | /* setup PLL configuration */ | |
355 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
356 | return -EIO; | |
357 | msleep(1); | |
358 | ||
359 | /* switch the board to dvb mode */ | |
360 | init_msg.addr = 0x43; | |
361 | init_msg.len = 0x02; | |
362 | msg[0] = 0x00; | |
363 | msg[1] = 0x40; | |
364 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
365 | return -EIO; | |
366 | ||
367 | return 0; | |
368 | } | |
369 | ||
370 | static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
371 | { | |
372 | return philips_tda6651_pll_set(0x61, fe, params); | |
373 | } | |
374 | ||
375 | static void philips_europa_analog(struct dvb_frontend *fe) | |
376 | { | |
377 | struct saa7134_dev *dev = fe->dvb->priv; | |
378 | /* this message actually turns the tuner back to analog mode */ | |
379 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
380 | struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
381 | ||
382 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); | |
383 | msleep(1); | |
384 | ||
385 | /* switch the board to analog mode */ | |
386 | analog_msg.addr = 0x43; | |
387 | analog_msg.len = 0x02; | |
388 | msg[0] = 0x00; | |
389 | msg[1] = 0x14; | |
390 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); | |
391 | } | |
392 | ||
393 | static struct tda1004x_config philips_europa_config = { | |
394 | ||
395 | .demod_address = 0x8, | |
396 | .invert = 0, | |
397 | .invert_oclk = 0, | |
398 | .xtal_freq = TDA10046_XTAL_4M, | |
399 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
400 | .if_freq = TDA10046_FREQ_052, | |
401 | .pll_init = philips_europa_pll_init, | |
402 | .pll_set = philips_td1316_pll_set, | |
403 | .pll_sleep = philips_europa_analog, | |
404 | .request_firmware = NULL, | |
405 | }; | |
406 | ||
407 | /* ------------------------------------------------------------------ */ | |
86ddd96f MCC |
408 | |
409 | static int philips_fmd1216_pll_init(struct dvb_frontend *fe) | |
410 | { | |
411 | struct saa7134_dev *dev = fe->dvb->priv; | |
412 | /* this message is to set up ATC and ALC */ | |
413 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 }; | |
414 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; | |
415 | ||
416 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
417 | return -EIO; | |
418 | msleep(1); | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
423 | static void philips_fmd1216_analog(struct dvb_frontend *fe) | |
424 | { | |
425 | struct saa7134_dev *dev = fe->dvb->priv; | |
426 | /* this message actually turns the tuner back to analog mode */ | |
427 | static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 }; | |
428 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) }; | |
429 | ||
430 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
431 | msleep(1); | |
432 | fmd1216_init[2] = 0x86; | |
433 | fmd1216_init[3] = 0x54; | |
434 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
435 | msleep(1); | |
436 | } | |
437 | ||
438 | static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
439 | { | |
440 | struct saa7134_dev *dev = fe->dvb->priv; | |
441 | u8 tuner_buf[4]; | |
442 | struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len = | |
443 | sizeof(tuner_buf) }; | |
444 | int tuner_frequency = 0; | |
445 | int divider = 0; | |
446 | u8 band, mode, cp; | |
447 | ||
448 | /* determine charge pump */ | |
449 | tuner_frequency = params->frequency + 36130000; | |
450 | if (tuner_frequency < 87000000) | |
451 | return -EINVAL; | |
452 | /* low band */ | |
453 | else if (tuner_frequency < 180000000) { | |
454 | band = 1; | |
455 | mode = 7; | |
456 | cp = 0; | |
457 | } else if (tuner_frequency < 195000000) { | |
458 | band = 1; | |
459 | mode = 6; | |
460 | cp = 1; | |
461 | /* mid band */ | |
462 | } else if (tuner_frequency < 366000000) { | |
463 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
464 | band = 10; | |
465 | } else { | |
466 | band = 2; | |
467 | } | |
468 | mode = 7; | |
469 | cp = 0; | |
470 | } else if (tuner_frequency < 478000000) { | |
471 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
472 | band = 10; | |
473 | } else { | |
474 | band = 2; | |
475 | } | |
476 | mode = 6; | |
477 | cp = 1; | |
478 | /* high band */ | |
479 | } else if (tuner_frequency < 662000000) { | |
480 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
481 | band = 12; | |
482 | } else { | |
483 | band = 4; | |
484 | } | |
485 | mode = 7; | |
486 | cp = 0; | |
487 | } else if (tuner_frequency < 840000000) { | |
488 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
489 | band = 12; | |
490 | } else { | |
491 | band = 4; | |
492 | } | |
493 | mode = 6; | |
494 | cp = 1; | |
495 | } else { | |
496 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { | |
497 | band = 12; | |
498 | } else { | |
499 | band = 4; | |
500 | } | |
501 | mode = 7; | |
502 | cp = 1; | |
503 | ||
504 | } | |
505 | /* calculate divisor */ | |
506 | /* ((36166000 + Finput) / 166666) rounded! */ | |
507 | divider = (tuner_frequency + 83333) / 166667; | |
508 | ||
509 | /* setup tuner buffer */ | |
510 | tuner_buf[0] = (divider >> 8) & 0x7f; | |
511 | tuner_buf[1] = divider & 0xff; | |
512 | tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4; | |
513 | tuner_buf[3] = 0x40 | band; | |
514 | ||
515 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
516 | return -EIO; | |
517 | return 0; | |
518 | } | |
519 | ||
408b664a | 520 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
521 | .demod_address = 0x08, |
522 | .invert = 1, | |
523 | .invert_oclk = 0, | |
524 | .xtal_freq = TDA10046_XTAL_16M, | |
525 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
526 | .if_freq = TDA10046_FREQ_3613, | |
527 | .pll_init = philips_fmd1216_pll_init, | |
528 | .pll_set = philips_fmd1216_pll_set, | |
529 | .pll_sleep = philips_fmd1216_analog, | |
530 | .request_firmware = NULL, | |
531 | }; | |
532 | ||
533 | /* ------------------------------------------------------------------ */ | |
534 | ||
535 | struct tda827x_data { | |
536 | u32 lomax; | |
537 | u8 spd; | |
538 | u8 bs; | |
539 | u8 bp; | |
540 | u8 cp; | |
541 | u8 gc3; | |
542 | u8 div1p5; | |
543 | }; | |
544 | ||
545 | static struct tda827x_data tda827x_dvbt[] = { | |
546 | { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, | |
547 | { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1}, | |
548 | { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, | |
549 | { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0}, | |
550 | { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
551 | { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
552 | { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
553 | { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
554 | { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
555 | { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
556 | { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
557 | { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
558 | { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
559 | { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
560 | { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
561 | { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
562 | { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
563 | { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
564 | { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
565 | { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
566 | { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
567 | { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1}, | |
568 | { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0}, | |
569 | { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
570 | { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
571 | { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, | |
572 | { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0}, | |
573 | { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0}, | |
574 | { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0} | |
575 | }; | |
576 | ||
577 | static int philips_tda827x_pll_init(struct dvb_frontend *fe) | |
578 | { | |
579 | return 0; | |
580 | } | |
581 | ||
582 | static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
583 | { | |
584 | struct saa7134_dev *dev = fe->dvb->priv; | |
585 | u8 tuner_buf[14]; | |
586 | ||
587 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf, | |
f2421ca3 | 588 | .len = sizeof(tuner_buf) }; |
86ddd96f MCC |
589 | int i, tuner_freq, if_freq; |
590 | u32 N; | |
591 | switch (params->u.ofdm.bandwidth) { | |
592 | case BANDWIDTH_6_MHZ: | |
593 | if_freq = 4000000; | |
594 | break; | |
595 | case BANDWIDTH_7_MHZ: | |
596 | if_freq = 4500000; | |
597 | break; | |
598 | default: /* 8 MHz or Auto */ | |
599 | if_freq = 5000000; | |
600 | break; | |
601 | } | |
602 | tuner_freq = params->frequency + if_freq; | |
603 | ||
604 | i = 0; | |
605 | while (tda827x_dvbt[i].lomax < tuner_freq) { | |
606 | if(tda827x_dvbt[i + 1].lomax == 0) | |
607 | break; | |
608 | i++; | |
609 | } | |
610 | ||
611 | N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2); | |
612 | tuner_buf[0] = 0; | |
613 | tuner_buf[1] = (N>>8) | 0x40; | |
614 | tuner_buf[2] = N & 0xff; | |
615 | tuner_buf[3] = 0; | |
616 | tuner_buf[4] = 0x52; | |
617 | tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) + | |
618 | (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp; | |
619 | tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f; | |
620 | tuner_buf[7] = 0xbf; | |
621 | tuner_buf[8] = 0x2a; | |
622 | tuner_buf[9] = 0x05; | |
623 | tuner_buf[10] = 0xff; | |
624 | tuner_buf[11] = 0x00; | |
625 | tuner_buf[12] = 0x00; | |
626 | tuner_buf[13] = 0x40; | |
627 | ||
628 | tuner_msg.len = 14; | |
629 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) | |
630 | return -EIO; | |
631 | ||
632 | msleep(500); | |
633 | /* correct CP value */ | |
634 | tuner_buf[0] = 0x30; | |
635 | tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp; | |
636 | tuner_msg.len = 2; | |
637 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); | |
638 | ||
639 | return 0; | |
640 | } | |
641 | ||
642 | static void philips_tda827x_pll_sleep(struct dvb_frontend *fe) | |
643 | { | |
644 | struct saa7134_dev *dev = fe->dvb->priv; | |
645 | static u8 tda827x_sleep[] = { 0x30, 0xd0}; | |
646 | struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep, | |
f2421ca3 | 647 | .len = sizeof(tda827x_sleep) }; |
86ddd96f MCC |
648 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
649 | } | |
650 | ||
651 | static struct tda1004x_config tda827x_lifeview_config = { | |
652 | .demod_address = 0x08, | |
653 | .invert = 1, | |
654 | .invert_oclk = 0, | |
655 | .xtal_freq = TDA10046_XTAL_16M, | |
656 | .agc_config = TDA10046_AGC_TDA827X, | |
657 | .if_freq = TDA10046_FREQ_045, | |
658 | .pll_init = philips_tda827x_pll_init, | |
659 | .pll_set = philips_tda827x_pll_set, | |
660 | .pll_sleep = philips_tda827x_pll_sleep, | |
661 | .request_firmware = NULL, | |
1da177e4 | 662 | }; |
90e9df7f HH |
663 | |
664 | /* ------------------------------------------------------------------ */ | |
665 | ||
666 | struct tda827xa_data { | |
667 | u32 lomax; | |
668 | u8 svco; | |
669 | u8 spd; | |
670 | u8 scr; | |
671 | u8 sbs; | |
672 | u8 gc3; | |
673 | }; | |
674 | ||
675 | static struct tda827xa_data tda827xa_dvbt[] = { | |
676 | { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1}, | |
677 | { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1}, | |
678 | { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1}, | |
679 | { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1}, | |
680 | { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1}, | |
681 | { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, | |
682 | { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, | |
683 | { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, | |
684 | { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1}, | |
685 | { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1}, | |
686 | { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1}, | |
687 | { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1}, | |
688 | { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1}, | |
689 | { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1}, | |
690 | { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1}, | |
691 | { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1}, | |
692 | { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1}, | |
693 | { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1}, | |
694 | { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1}, | |
695 | { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0}, | |
696 | { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0}, | |
697 | { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0}, | |
698 | { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0}, | |
699 | { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0}, | |
700 | { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0}, | |
701 | { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0}, | |
702 | { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}}; | |
703 | ||
704 | ||
705 | static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
706 | { | |
707 | struct saa7134_dev *dev = fe->dvb->priv; | |
708 | u8 tuner_buf[14]; | |
709 | unsigned char reg2[2]; | |
710 | ||
711 | struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf}; | |
712 | int i, tuner_freq, if_freq; | |
713 | u32 N; | |
714 | ||
715 | switch (params->u.ofdm.bandwidth) { | |
716 | case BANDWIDTH_6_MHZ: | |
717 | if_freq = 4000000; | |
718 | break; | |
719 | case BANDWIDTH_7_MHZ: | |
720 | if_freq = 4500000; | |
721 | break; | |
722 | default: /* 8 MHz or Auto */ | |
723 | if_freq = 5000000; | |
724 | break; | |
725 | } | |
726 | tuner_freq = params->frequency + if_freq; | |
727 | ||
728 | i = 0; | |
729 | while (tda827xa_dvbt[i].lomax < tuner_freq) { | |
730 | if(tda827xa_dvbt[i + 1].lomax == 0) | |
731 | break; | |
732 | i++; | |
733 | } | |
734 | ||
735 | N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd; | |
736 | tuner_buf[0] = 0; // subaddress | |
737 | tuner_buf[1] = N >> 8; | |
738 | tuner_buf[2] = N & 0xff; | |
739 | tuner_buf[3] = 0; | |
740 | tuner_buf[4] = 0x16; | |
741 | tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) + | |
742 | tda827xa_dvbt[i].sbs; | |
743 | tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4); | |
744 | tuner_buf[7] = 0x0c; | |
745 | tuner_buf[8] = 0x06; | |
746 | tuner_buf[9] = 0x24; | |
747 | tuner_buf[10] = 0xff; | |
748 | tuner_buf[11] = 0x60; | |
749 | tuner_buf[12] = 0x00; | |
750 | tuner_buf[13] = 0x39; // lpsel | |
751 | msg.len = 14; | |
752 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) | |
753 | return -EIO; | |
754 | ||
755 | msg.buf= reg2; | |
756 | msg.len = 2; | |
757 | reg2[0] = 0x60; | |
758 | reg2[1] = 0x3c; | |
759 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
760 | ||
761 | reg2[0] = 0xa0; | |
762 | reg2[1] = 0x40; | |
763 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
764 | ||
765 | msleep(2); | |
766 | /* correct CP value */ | |
767 | reg2[0] = 0x30; | |
768 | reg2[1] = 0x10 + tda827xa_dvbt[i].scr; | |
769 | msg.len = 2; | |
770 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
771 | ||
772 | msleep(550); | |
773 | reg2[0] = 0x50; | |
774 | reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4); | |
775 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
776 | ||
777 | return 0; | |
778 | ||
779 | } | |
780 | ||
781 | static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe) | |
782 | { | |
783 | struct saa7134_dev *dev = fe->dvb->priv; | |
784 | static u8 tda827xa_sleep[] = { 0x30, 0x90}; | |
785 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep, | |
f1bcef88 | 786 | .len = sizeof(tda827xa_sleep) }; |
90e9df7f HH |
787 | i2c_transfer(&dev->i2c_adap, &tuner_msg, 1); |
788 | ||
789 | } | |
790 | ||
791 | /* ------------------------------------------------------------------ */ | |
792 | ||
793 | static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
794 | { | |
795 | int ret; | |
796 | struct saa7134_dev *dev = fe->dvb->priv; | |
797 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
798 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
799 | struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2}; | |
800 | /* close tda8290 i2c bridge */ | |
801 | tda8290_msg.buf = tda8290_close; | |
802 | ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1); | |
803 | if (ret != 1) | |
804 | return -EIO; | |
805 | msleep(20); | |
806 | ret = philips_tda827xa_pll_set(0x61, fe, params); | |
807 | if (ret != 0) | |
808 | return ret; | |
809 | /* open tda8290 i2c bridge */ | |
810 | tda8290_msg.buf = tda8290_open; | |
811 | i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1); | |
812 | return ret; | |
813 | }; | |
814 | ||
815 | static int philips_tiger_dvb_mode(struct dvb_frontend *fe) | |
816 | { | |
817 | struct saa7134_dev *dev = fe->dvb->priv; | |
818 | static u8 data[] = { 0x3c, 0x33, 0x6a}; | |
819 | struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)}; | |
820 | ||
821 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) | |
822 | return -EIO; | |
823 | return 0; | |
824 | } | |
825 | ||
826 | static void philips_tiger_analog_mode(struct dvb_frontend *fe) | |
827 | { | |
828 | struct saa7134_dev *dev = fe->dvb->priv; | |
829 | static u8 data[] = { 0x3c, 0x33, 0x68}; | |
830 | struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)}; | |
831 | ||
832 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
833 | philips_tda827xa_pll_sleep( 0x61, fe); | |
834 | } | |
835 | ||
836 | static struct tda1004x_config philips_tiger_config = { | |
837 | .demod_address = 0x08, | |
838 | .invert = 1, | |
839 | .invert_oclk = 0, | |
840 | .xtal_freq = TDA10046_XTAL_16M, | |
841 | .agc_config = TDA10046_AGC_TDA827X, | |
842 | .if_freq = TDA10046_FREQ_045, | |
843 | .pll_init = philips_tiger_dvb_mode, | |
844 | .pll_set = philips_tiger_pll_set, | |
845 | .pll_sleep = philips_tiger_analog_mode, | |
846 | .request_firmware = NULL, | |
847 | }; | |
848 | ||
86ddd96f | 849 | #endif |
1da177e4 | 850 | |
90e9df7f HH |
851 | /* ------------------------------------------------------------------ */ |
852 | ||
3b64e8e2 MK |
853 | #ifdef HAVE_NXT200X |
854 | static struct nxt200x_config avertvhda180 = { | |
855 | .demod_address = 0x0a, | |
856 | .pll_address = 0x61, | |
857 | .pll_desc = &dvb_pll_tdhu2, | |
858 | }; | |
859 | #endif | |
860 | ||
1da177e4 LT |
861 | /* ------------------------------------------------------------------ */ |
862 | ||
863 | static int dvb_init(struct saa7134_dev *dev) | |
864 | { | |
865 | /* init struct videobuf_dvb */ | |
866 | dev->ts.nr_bufs = 32; | |
867 | dev->ts.nr_packets = 32*4; | |
868 | dev->dvb.name = dev->name; | |
869 | videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops, | |
870 | dev->pci, &dev->slock, | |
871 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
872 | V4L2_FIELD_ALTERNATE, | |
873 | sizeof(struct saa7134_buf), | |
874 | dev); | |
875 | ||
876 | switch (dev->board) { | |
29780bb7 | 877 | #ifdef HAVE_MT352 |
1da177e4 LT |
878 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: |
879 | printk("%s: pinnacle 300i dvb setup\n",dev->name); | |
880 | dev->dvb.frontend = mt352_attach(&pinnacle_300i, | |
881 | &dev->i2c_adap); | |
882 | break; | |
a78d0bfa JAR |
883 | |
884 | case SAA7134_BOARD_AVERMEDIA_777: | |
885 | printk("%s: avertv 777 dvb setup\n",dev->name); | |
886 | dev->dvb.frontend = mt352_attach(&avermedia_777, | |
887 | &dev->i2c_adap); | |
888 | break; | |
86ddd96f | 889 | #endif |
29780bb7 | 890 | #ifdef HAVE_TDA1004X |
1da177e4 LT |
891 | case SAA7134_BOARD_MD7134: |
892 | dev->dvb.frontend = tda10046_attach(&medion_cardbus, | |
893 | &dev->i2c_adap); | |
1da177e4 | 894 | break; |
86ddd96f | 895 | case SAA7134_BOARD_PHILIPS_TOUGH: |
2cf36ac4 | 896 | dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config, |
86ddd96f MCC |
897 | &dev->i2c_adap); |
898 | break; | |
899 | case SAA7134_BOARD_FLYDVBTDUO: | |
900 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, | |
901 | &dev->i2c_adap); | |
902 | break; | |
10b7a903 | 903 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
86ddd96f MCC |
904 | dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, |
905 | &dev->i2c_adap); | |
906 | break; | |
2cf36ac4 HH |
907 | case SAA7134_BOARD_PHILIPS_EUROPA: |
908 | dev->dvb.frontend = tda10046_attach(&philips_europa_config, | |
909 | &dev->i2c_adap); | |
910 | break; | |
911 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: | |
912 | dev->dvb.frontend = tda10046_attach(&philips_europa_config, | |
913 | &dev->i2c_adap); | |
914 | break; | |
915 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
916 | dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config, | |
917 | &dev->i2c_adap); | |
918 | break; | |
90e9df7f HH |
919 | case SAA7134_BOARD_PHILIPS_TIGER: |
920 | dev->dvb.frontend = tda10046_attach(&philips_tiger_config, | |
921 | &dev->i2c_adap); | |
922 | break; | |
d4b0aba4 HH |
923 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
924 | dev->dvb.frontend = tda10046_attach(&philips_tiger_config, | |
925 | &dev->i2c_adap); | |
926 | break; | |
3b64e8e2 MK |
927 | #endif |
928 | #ifdef HAVE_NXT200X | |
929 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: | |
930 | dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap); | |
931 | break; | |
86ddd96f | 932 | #endif |
1da177e4 LT |
933 | default: |
934 | printk("%s: Huh? unknown DVB card?\n",dev->name); | |
935 | break; | |
936 | } | |
937 | ||
938 | if (NULL == dev->dvb.frontend) { | |
939 | printk("%s: frontend initialization failed\n",dev->name); | |
940 | return -1; | |
941 | } | |
942 | ||
943 | /* register everything else */ | |
944 | return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev); | |
945 | } | |
946 | ||
947 | static int dvb_fini(struct saa7134_dev *dev) | |
948 | { | |
949 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
950 | ||
1da177e4 LT |
951 | switch (dev->board) { |
952 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
953 | /* otherwise we don't detect the tuner on next insmod */ | |
954 | saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on); | |
955 | break; | |
956 | }; | |
957 | videobuf_dvb_unregister(&dev->dvb); | |
958 | return 0; | |
959 | } | |
960 | ||
961 | static struct saa7134_mpeg_ops dvb_ops = { | |
962 | .type = SAA7134_MPEG_DVB, | |
963 | .init = dvb_init, | |
964 | .fini = dvb_fini, | |
965 | }; | |
966 | ||
967 | static int __init dvb_register(void) | |
968 | { | |
969 | return saa7134_ts_register(&dvb_ops); | |
970 | } | |
971 | ||
972 | static void __exit dvb_unregister(void) | |
973 | { | |
974 | saa7134_ts_unregister(&dvb_ops); | |
975 | } | |
976 | ||
977 | module_init(dvb_register); | |
978 | module_exit(dvb_unregister); | |
979 | ||
980 | /* ------------------------------------------------------------------ */ | |
981 | /* | |
982 | * Local variables: | |
983 | * c-basic-offset: 8 | |
984 | * End: | |
985 | */ |