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[PATCH] V4L: 907: em28xx cleanups and fixes
[mirror_ubuntu-jammy-kernel.git] / drivers / media / video / saa7134 / saa7134-dvb.c
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1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/kthread.h>
30#include <linux/suspend.h>
31
32#include "saa7134-reg.h"
33#include "saa7134.h"
34
29780bb7 35#ifdef HAVE_MT352
86ddd96f
MCC		 36# include "mt352.h"
37# include "mt352_priv.h" /* FIXME */
38#endif
29780bb7 39#ifdef HAVE_TDA1004X
86ddd96f
MCC		 40# include "tda1004x.h"
41#endif
3b64e8e2
MK		 42#ifdef HAVE_NXT200X
43# include "nxt200x.h"
44# include "dvb-pll.h"
45#endif
1da177e4
LT		 46
47MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
48MODULE_LICENSE("GPL");
49
50static unsigned int antenna_pwr = 0;
86ddd96f 51
1da177e4
LT		 52module_param(antenna_pwr, int, 0444);
53MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
54
55/* ------------------------------------------------------------------ */
56
29780bb7 57#ifdef HAVE_MT352
1da177e4
LT		 58static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
59{
60 u32 ok;
61
62 if (!on) {
63 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
64 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
65 return 0;
66 }
67
68 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
69 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
70 udelay(10);
71
72 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
73 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
74 udelay(10);
75 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
76 udelay(10);
77 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
78 printk("%s: %s %s\n", dev->name, __FUNCTION__,
79 ok ? "on" : "off");
80
81 if (!ok)
82 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
83 return ok;
84}
85
86static int mt352_pinnacle_init(struct dvb_frontend* fe)
87{
88 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
89 static u8 reset [] = { RESET, 0x80 };
90 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
91 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
92 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
93 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
94 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
95 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
96 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
97 struct saa7134_dev *dev= fe->dvb->priv;
98
99 printk("%s: %s called\n",dev->name,__FUNCTION__);
100
101 mt352_write(fe, clock_config, sizeof(clock_config));
102 udelay(200);
103 mt352_write(fe, reset, sizeof(reset));
104 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
105 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
106 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
107 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
108
109 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
110 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
111 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
112 return 0;
113}
114
115static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
116 struct dvb_frontend_parameters* params,
117 u8* pllbuf)
118{
119 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
120 static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE;
121 struct saa7134_dev *dev = fe->dvb->priv;
122 struct v4l2_frequency f;
123
124 /* set frequency (mt2050) */
125 f.tuner = 0;
126 f.type = V4L2_TUNER_DIGITAL_TV;
127 f.frequency = params->frequency / 1000 * 16 / 1000;
128 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
129 saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
130 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off);
131
132 pinnacle_antenna_pwr(dev, antenna_pwr);
133
134 /* mt352 setup */
135 mt352_pinnacle_init(fe);
136 pllbuf[0] = 0xc2;
137 pllbuf[1] = 0x00;
138 pllbuf[2] = 0x00;
139 pllbuf[3] = 0x80;
140 pllbuf[4] = 0x00;
141 return 0;
142}
143
144static struct mt352_config pinnacle_300i = {
145 .demod_address = 0x3c >> 1,
146 .adc_clock = 20333,
147 .if2 = 36150,
148 .no_tuner = 1,
149 .demod_init = mt352_pinnacle_init,
150 .pll_set = mt352_pinnacle_pll_set,
151};
86ddd96f 152#endif
1da177e4
LT		 153
154/* ------------------------------------------------------------------ */
155
29780bb7 156#ifdef HAVE_TDA1004X
1da177e4 157
2cf36ac4 158static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
1da177e4
LT		 159{
160 struct saa7134_dev *dev = fe->dvb->priv;
86ddd96f 161 u8 tuner_buf[4];
2cf36ac4 162 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 163 sizeof(tuner_buf) };
164 int tuner_frequency = 0;
165 u8 band, cp, filter;
166
167 /* determine charge pump */
168 tuner_frequency = params->frequency + 36166000;
169 if (tuner_frequency < 87000000)
170 return -EINVAL;
171 else if (tuner_frequency < 130000000)
172 cp = 3;
173 else if (tuner_frequency < 160000000)
174 cp = 5;
175 else if (tuner_frequency < 200000000)
176 cp = 6;
177 else if (tuner_frequency < 290000000)
178 cp = 3;
179 else if (tuner_frequency < 420000000)
180 cp = 5;
181 else if (tuner_frequency < 480000000)
182 cp = 6;
183 else if (tuner_frequency < 620000000)
184 cp = 3;
185 else if (tuner_frequency < 830000000)
186 cp = 5;
187 else if (tuner_frequency < 895000000)
188 cp = 7;
189 else
190 return -EINVAL;
191
192 /* determine band */
193 if (params->frequency < 49000000)
194 return -EINVAL;
195 else if (params->frequency < 161000000)
196 band = 1;
197 else if (params->frequency < 444000000)
198 band = 2;
199 else if (params->frequency < 861000000)
200 band = 4;
201 else
202 return -EINVAL;
203
204 /* setup PLL filter */
205 switch (params->u.ofdm.bandwidth) {
206 case BANDWIDTH_6_MHZ:
207 filter = 0;
208 break;
209
210 case BANDWIDTH_7_MHZ:
211 filter = 0;
212 break;
213
214 case BANDWIDTH_8_MHZ:
215 filter = 1;
216 break;
1da177e4 217
86ddd96f
MCC		 218 default:
219 return -EINVAL;
220 }
221
222 /* calculate divisor
223 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 224 */
86ddd96f
MCC		 225 tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
226
227 /* setup tuner buffer */
228 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
229 tuner_buf[1] = tuner_frequency & 0xff;
230 tuner_buf[2] = 0xca;
231 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
232
233 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
234 return -EIO;
2cf36ac4
HH		 235 msleep(1);
236 return 0;
237}
238
239static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
240{
241 struct saa7134_dev *dev = fe->dvb->priv;
242 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
243 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 244
2cf36ac4
HH		 245 /* setup PLL configuration */
246 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
247 return -EIO;
86ddd96f 248 msleep(1);
2cf36ac4 249
1da177e4
LT		 250 return 0;
251}
252
2cf36ac4
HH		 253/* ------------------------------------------------------------------ */
254
255static int philips_tu1216_pll_60_init(struct dvb_frontend *fe)
256{
257 return philips_tda6651_pll_init(0x60, fe);
258}
259
260static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
261{
262 return philips_tda6651_pll_set(0x60, fe, params);
263}
264
86ddd96f
MCC		 265static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
266 const struct firmware **fw, char *name)
1da177e4
LT		 267{
268 struct saa7134_dev *dev = fe->dvb->priv;
269 return request_firmware(fw, name, &dev->pci->dev);
270}
271
2cf36ac4 272static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 273
274 .demod_address = 0x8,
275 .invert = 1,
2cf36ac4 276 .invert_oclk = 0,
86ddd96f
MCC		 277 .xtal_freq = TDA10046_XTAL_4M,
278 .agc_config = TDA10046_AGC_DEFAULT,
279 .if_freq = TDA10046_FREQ_3617,
2cf36ac4
HH		 280 .pll_init = philips_tu1216_pll_60_init,
281 .pll_set = philips_tu1216_pll_60_set,
86ddd96f
MCC		 282 .pll_sleep = NULL,
283 .request_firmware = philips_tu1216_request_firmware,
284};
285
286/* ------------------------------------------------------------------ */
287
2cf36ac4
HH		 288static int philips_tu1216_pll_61_init(struct dvb_frontend *fe)
289{
290 return philips_tda6651_pll_init(0x61, fe);
291}
292
293static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
294{
295 return philips_tda6651_pll_set(0x61, fe, params);
296}
297
298static struct tda1004x_config philips_tu1216_61_config = {
299
300 .demod_address = 0x8,
301 .invert = 1,
302 .invert_oclk = 0,
303 .xtal_freq = TDA10046_XTAL_4M,
304 .agc_config = TDA10046_AGC_DEFAULT,
305 .if_freq = TDA10046_FREQ_3617,
306 .pll_init = philips_tu1216_pll_61_init,
307 .pll_set = philips_tu1216_pll_61_set,
308 .pll_sleep = NULL,
309 .request_firmware = philips_tu1216_request_firmware,
310};
311
312/* ------------------------------------------------------------------ */
313
314static int philips_europa_pll_init(struct dvb_frontend *fe)
315{
316 struct saa7134_dev *dev = fe->dvb->priv;
317 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
318 struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
319
320 /* setup PLL configuration */
321 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
322 return -EIO;
323 msleep(1);
324
325 /* switch the board to dvb mode */
326 init_msg.addr = 0x43;
327 init_msg.len = 0x02;
328 msg[0] = 0x00;
329 msg[1] = 0x40;
330 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
331 return -EIO;
332
333 return 0;
334}
335
336static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
337{
338 return philips_tda6651_pll_set(0x61, fe, params);
339}
340
341static void philips_europa_analog(struct dvb_frontend *fe)
342{
343 struct saa7134_dev *dev = fe->dvb->priv;
344 /* this message actually turns the tuner back to analog mode */
345 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
346 struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
347
348 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
349 msleep(1);
350
351 /* switch the board to analog mode */
352 analog_msg.addr = 0x43;
353 analog_msg.len = 0x02;
354 msg[0] = 0x00;
355 msg[1] = 0x14;
356 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
357}
358
359static struct tda1004x_config philips_europa_config = {
360
361 .demod_address = 0x8,
362 .invert = 0,
363 .invert_oclk = 0,
364 .xtal_freq = TDA10046_XTAL_4M,
365 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
366 .if_freq = TDA10046_FREQ_052,
367 .pll_init = philips_europa_pll_init,
368 .pll_set = philips_td1316_pll_set,
369 .pll_sleep = philips_europa_analog,
370 .request_firmware = NULL,
371};
372
373/* ------------------------------------------------------------------ */
86ddd96f
MCC		 374
375static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
376{
377 struct saa7134_dev *dev = fe->dvb->priv;
378 /* this message is to set up ATC and ALC */
379 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
380 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
381
382 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
383 return -EIO;
384 msleep(1);
385
386 return 0;
387}
388
389static void philips_fmd1216_analog(struct dvb_frontend *fe)
390{
391 struct saa7134_dev *dev = fe->dvb->priv;
392 /* this message actually turns the tuner back to analog mode */
393 static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
394 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
395
396 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
397 msleep(1);
398 fmd1216_init[2] = 0x86;
399 fmd1216_init[3] = 0x54;
400 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
401 msleep(1);
402}
403
404static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
405{
406 struct saa7134_dev *dev = fe->dvb->priv;
407 u8 tuner_buf[4];
408 struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
409 sizeof(tuner_buf) };
410 int tuner_frequency = 0;
411 int divider = 0;
412 u8 band, mode, cp;
413
414 /* determine charge pump */
415 tuner_frequency = params->frequency + 36130000;
416 if (tuner_frequency < 87000000)
417 return -EINVAL;
418 /* low band */
419 else if (tuner_frequency < 180000000) {
420 band = 1;
421 mode = 7;
422 cp = 0;
423 } else if (tuner_frequency < 195000000) {
424 band = 1;
425 mode = 6;
426 cp = 1;
427 /* mid band */
428 } else if (tuner_frequency < 366000000) {
429 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
430 band = 10;
431 } else {
432 band = 2;
433 }
434 mode = 7;
435 cp = 0;
436 } else if (tuner_frequency < 478000000) {
437 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
438 band = 10;
439 } else {
440 band = 2;
441 }
442 mode = 6;
443 cp = 1;
444 /* high band */
445 } else if (tuner_frequency < 662000000) {
446 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
447 band = 12;
448 } else {
449 band = 4;
450 }
451 mode = 7;
452 cp = 0;
453 } else if (tuner_frequency < 840000000) {
454 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
455 band = 12;
456 } else {
457 band = 4;
458 }
459 mode = 6;
460 cp = 1;
461 } else {
462 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
463 band = 12;
464 } else {
465 band = 4;
466 }
467 mode = 7;
468 cp = 1;
469
470 }
471 /* calculate divisor */
472 /* ((36166000 + Finput) / 166666) rounded! */
473 divider = (tuner_frequency + 83333) / 166667;
474
475 /* setup tuner buffer */
476 tuner_buf[0] = (divider >> 8) & 0x7f;
477 tuner_buf[1] = divider & 0xff;
478 tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
479 tuner_buf[3] = 0x40 | band;
480
481 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
482 return -EIO;
483 return 0;
484}
485
408b664a 486static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 487 .demod_address = 0x08,
488 .invert = 1,
489 .invert_oclk = 0,
490 .xtal_freq = TDA10046_XTAL_16M,
491 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
492 .if_freq = TDA10046_FREQ_3613,
493 .pll_init = philips_fmd1216_pll_init,
494 .pll_set = philips_fmd1216_pll_set,
495 .pll_sleep = philips_fmd1216_analog,
496 .request_firmware = NULL,
497};
498
499/* ------------------------------------------------------------------ */
500
501struct tda827x_data {
502 u32 lomax;
503 u8 spd;
504 u8 bs;
505 u8 bp;
506 u8 cp;
507 u8 gc3;
508 u8 div1p5;
509};
510
511static struct tda827x_data tda827x_dvbt[] = {
512 { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
513 { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
514 { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
515 { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
516 { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
517 { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
518 { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
519 { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
520 { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
521 { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
522 { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
523 { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
524 { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
525 { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
526 { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
527 { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
528 { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
529 { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
530 { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
531 { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
532 { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
533 { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
534 { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
535 { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
536 { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
537 { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
538 { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
539 { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
540 { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
541};
542
543static int philips_tda827x_pll_init(struct dvb_frontend *fe)
544{
545 return 0;
546}
547
548static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
549{
550 struct saa7134_dev *dev = fe->dvb->priv;
551 u8 tuner_buf[14];
552
553 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
f2421ca3 554 .len = sizeof(tuner_buf) };
86ddd96f
MCC		 555 int i, tuner_freq, if_freq;
556 u32 N;
557 switch (params->u.ofdm.bandwidth) {
558 case BANDWIDTH_6_MHZ:
559 if_freq = 4000000;
560 break;
561 case BANDWIDTH_7_MHZ:
562 if_freq = 4500000;
563 break;
564 default: /* 8 MHz or Auto */
565 if_freq = 5000000;
566 break;
567 }
568 tuner_freq = params->frequency + if_freq;
569
570 i = 0;
571 while (tda827x_dvbt[i].lomax < tuner_freq) {
572 if(tda827x_dvbt[i + 1].lomax == 0)
573 break;
574 i++;
575 }
576
577 N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
578 tuner_buf[0] = 0;
579 tuner_buf[1] = (N>>8) | 0x40;
580 tuner_buf[2] = N & 0xff;
581 tuner_buf[3] = 0;
582 tuner_buf[4] = 0x52;
583 tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
584 (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
585 tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
586 tuner_buf[7] = 0xbf;
587 tuner_buf[8] = 0x2a;
588 tuner_buf[9] = 0x05;
589 tuner_buf[10] = 0xff;
590 tuner_buf[11] = 0x00;
591 tuner_buf[12] = 0x00;
592 tuner_buf[13] = 0x40;
593
594 tuner_msg.len = 14;
595 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
596 return -EIO;
597
598 msleep(500);
599 /* correct CP value */
600 tuner_buf[0] = 0x30;
601 tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
602 tuner_msg.len = 2;
603 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
604
605 return 0;
606}
607
608static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
609{
610 struct saa7134_dev *dev = fe->dvb->priv;
611 static u8 tda827x_sleep[] = { 0x30, 0xd0};
612 struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
f2421ca3 613 .len = sizeof(tda827x_sleep) };
86ddd96f
MCC		 614 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
615}
616
617static struct tda1004x_config tda827x_lifeview_config = {
618 .demod_address = 0x08,
619 .invert = 1,
620 .invert_oclk = 0,
621 .xtal_freq = TDA10046_XTAL_16M,
622 .agc_config = TDA10046_AGC_TDA827X,
623 .if_freq = TDA10046_FREQ_045,
624 .pll_init = philips_tda827x_pll_init,
625 .pll_set = philips_tda827x_pll_set,
626 .pll_sleep = philips_tda827x_pll_sleep,
627 .request_firmware = NULL,
1da177e4 628};
90e9df7f
HH		 629
630/* ------------------------------------------------------------------ */
631
632struct tda827xa_data {
633 u32 lomax;
634 u8 svco;
635 u8 spd;
636 u8 scr;
637 u8 sbs;
638 u8 gc3;
639};
640
641static struct tda827xa_data tda827xa_dvbt[] = {
642 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
643 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
644 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
645 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
646 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
647 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
648 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
649 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
650 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
651 { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
652 { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
653 { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
654 { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
655 { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
656 { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
657 { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
658 { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
659 { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
660 { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
661 { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
662 { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
663 { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
664 { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
665 { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
666 { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
667 { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
668 { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
669
670
671static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
672{
673 struct saa7134_dev *dev = fe->dvb->priv;
674 u8 tuner_buf[14];
675 unsigned char reg2[2];
676
677 struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
678 int i, tuner_freq, if_freq;
679 u32 N;
680
681 switch (params->u.ofdm.bandwidth) {
682 case BANDWIDTH_6_MHZ:
683 if_freq = 4000000;
684 break;
685 case BANDWIDTH_7_MHZ:
686 if_freq = 4500000;
687 break;
688 default: /* 8 MHz or Auto */
689 if_freq = 5000000;
690 break;
691 }
692 tuner_freq = params->frequency + if_freq;
693
694 i = 0;
695 while (tda827xa_dvbt[i].lomax < tuner_freq) {
696 if(tda827xa_dvbt[i + 1].lomax == 0)
697 break;
698 i++;
699 }
700
701 N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
702 tuner_buf[0] = 0; // subaddress
703 tuner_buf[1] = N >> 8;
704 tuner_buf[2] = N & 0xff;
705 tuner_buf[3] = 0;
706 tuner_buf[4] = 0x16;
707 tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
708 tda827xa_dvbt[i].sbs;
709 tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
710 tuner_buf[7] = 0x0c;
711 tuner_buf[8] = 0x06;
712 tuner_buf[9] = 0x24;
713 tuner_buf[10] = 0xff;
714 tuner_buf[11] = 0x60;
715 tuner_buf[12] = 0x00;
716 tuner_buf[13] = 0x39; // lpsel
717 msg.len = 14;
718 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
719 return -EIO;
720
721 msg.buf= reg2;
722 msg.len = 2;
723 reg2[0] = 0x60;
724 reg2[1] = 0x3c;
725 i2c_transfer(&dev->i2c_adap, &msg, 1);
726
727 reg2[0] = 0xa0;
728 reg2[1] = 0x40;
729 i2c_transfer(&dev->i2c_adap, &msg, 1);
730
731 msleep(2);
732 /* correct CP value */
733 reg2[0] = 0x30;
734 reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
735 msg.len = 2;
736 i2c_transfer(&dev->i2c_adap, &msg, 1);
737
738 msleep(550);
739 reg2[0] = 0x50;
740 reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
741 i2c_transfer(&dev->i2c_adap, &msg, 1);
742
743 return 0;
744
745}
746
747static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe)
748{
749 struct saa7134_dev *dev = fe->dvb->priv;
750 static u8 tda827xa_sleep[] = { 0x30, 0x90};
751 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
c3d93192 752 .len = sizeof(tda827xa_sleep) };
90e9df7f
HH		 753 i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
754
755}
756
757/* ------------------------------------------------------------------ */
758
759static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
760{
761 int ret;
762 struct saa7134_dev *dev = fe->dvb->priv;
763 static u8 tda8290_close[] = { 0x21, 0xc0};
764 static u8 tda8290_open[] = { 0x21, 0x80};
765 struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
766 /* close tda8290 i2c bridge */
767 tda8290_msg.buf = tda8290_close;
768 ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
769 if (ret != 1)
770 return -EIO;
771 msleep(20);
772 ret = philips_tda827xa_pll_set(0x61, fe, params);
773 if (ret != 0)
774 return ret;
775 /* open tda8290 i2c bridge */
776 tda8290_msg.buf = tda8290_open;
777 i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
778 return ret;
779};
780
781static int philips_tiger_dvb_mode(struct dvb_frontend *fe)
782{
783 struct saa7134_dev *dev = fe->dvb->priv;
784 static u8 data[] = { 0x3c, 0x33, 0x6a};
785 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
786
787 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
788 return -EIO;
789 return 0;
790}
791
792static void philips_tiger_analog_mode(struct dvb_frontend *fe)
793{
794 struct saa7134_dev *dev = fe->dvb->priv;
795 static u8 data[] = { 0x3c, 0x33, 0x68};
796 struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
797
798 i2c_transfer(&dev->i2c_adap, &msg, 1);
799 philips_tda827xa_pll_sleep( 0x61, fe);
800}
801
802static struct tda1004x_config philips_tiger_config = {
803 .demod_address = 0x08,
804 .invert = 1,
805 .invert_oclk = 0,
806 .xtal_freq = TDA10046_XTAL_16M,
807 .agc_config = TDA10046_AGC_TDA827X,
808 .if_freq = TDA10046_FREQ_045,
809 .pll_init = philips_tiger_dvb_mode,
810 .pll_set = philips_tiger_pll_set,
811 .pll_sleep = philips_tiger_analog_mode,
812 .request_firmware = NULL,
813};
814
86ddd96f 815#endif
1da177e4 816
90e9df7f
HH		 817/* ------------------------------------------------------------------ */
818
3b64e8e2
MK		 819#ifdef HAVE_NXT200X
820static struct nxt200x_config avertvhda180 = {
821 .demod_address = 0x0a,
822 .pll_address = 0x61,
823 .pll_desc = &dvb_pll_tdhu2,
824};
825#endif
826
1da177e4
LT		 827/* ------------------------------------------------------------------ */
828
829static int dvb_init(struct saa7134_dev *dev)
830{
831 /* init struct videobuf_dvb */
832 dev->ts.nr_bufs = 32;
833 dev->ts.nr_packets = 32*4;
834 dev->dvb.name = dev->name;
835 videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
836 dev->pci, &dev->slock,
837 V4L2_BUF_TYPE_VIDEO_CAPTURE,
838 V4L2_FIELD_ALTERNATE,
839 sizeof(struct saa7134_buf),
840 dev);
841
842 switch (dev->board) {
29780bb7 843#ifdef HAVE_MT352
1da177e4
LT		 844 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
845 printk("%s: pinnacle 300i dvb setup\n",dev->name);
846 dev->dvb.frontend = mt352_attach(&pinnacle_300i,
847 &dev->i2c_adap);
848 break;
86ddd96f 849#endif
29780bb7 850#ifdef HAVE_TDA1004X
1da177e4
LT		 851 case SAA7134_BOARD_MD7134:
852 dev->dvb.frontend = tda10046_attach(&medion_cardbus,
853 &dev->i2c_adap);
1da177e4 854 break;
86ddd96f 855 case SAA7134_BOARD_PHILIPS_TOUGH:
2cf36ac4 856 dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config,
86ddd96f
MCC		 857 &dev->i2c_adap);
858 break;
859 case SAA7134_BOARD_FLYDVBTDUO:
860 dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
861 &dev->i2c_adap);
862 break;
863 case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS:
864 dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
865 &dev->i2c_adap);
866 break;
2cf36ac4
HH		 867 case SAA7134_BOARD_PHILIPS_EUROPA:
868 dev->dvb.frontend = tda10046_attach(&philips_europa_config,
869 &dev->i2c_adap);
870 break;
871 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
872 dev->dvb.frontend = tda10046_attach(&philips_europa_config,
873 &dev->i2c_adap);
874 break;
875 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
876 dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config,
877 &dev->i2c_adap);
878 break;
90e9df7f
HH		 879 case SAA7134_BOARD_PHILIPS_TIGER:
880 dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
881 &dev->i2c_adap);
882 break;
3b64e8e2
MK		 883#endif
884#ifdef HAVE_NXT200X
885 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
886 dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap);
887 break;
86ddd96f 888#endif
1da177e4
LT		 889 default:
890 printk("%s: Huh? unknown DVB card?\n",dev->name);
891 break;
892 }
893
894 if (NULL == dev->dvb.frontend) {
895 printk("%s: frontend initialization failed\n",dev->name);
896 return -1;
897 }
898
899 /* register everything else */
900 return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
901}
902
903static int dvb_fini(struct saa7134_dev *dev)
904{
905 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
906
1da177e4
LT		 907 switch (dev->board) {
908 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
909 /* otherwise we don't detect the tuner on next insmod */
910 saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
911 break;
912 };
913 videobuf_dvb_unregister(&dev->dvb);
914 return 0;
915}
916
917static struct saa7134_mpeg_ops dvb_ops = {
918 .type = SAA7134_MPEG_DVB,
919 .init = dvb_init,
920 .fini = dvb_fini,
921};
922
923static int __init dvb_register(void)
924{
925 return saa7134_ts_register(&dvb_ops);
926}
927
928static void __exit dvb_unregister(void)
929{
930 saa7134_ts_unregister(&dvb_ops);
931}
932
933module_init(dvb_register);
934module_exit(dvb_unregister);
935
936/* ------------------------------------------------------------------ */
937/*
938 * Local variables:
939 * c-basic-offset: 8
940 * End:
941 */
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