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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/kthread.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
32 | #include "saa7134-reg.h" | |
33 | #include "saa7134.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
a78d0bfa | 35 | #include "dvb-pll.h" |
5823b3a6 | 36 | #include <dvb_frontend.h> |
1da177e4 | 37 | |
1f10c7af AQ |
38 | #include "mt352.h" |
39 | #include "mt352_priv.h" /* FIXME */ | |
40 | #include "tda1004x.h" | |
41 | #include "nxt200x.h" | |
bc36a686 | 42 | #include "tuner-xc2028.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
cb89cd33 | 50 | #include "tuner-simple.h" |
8ce47dad | 51 | |
1da177e4 LT |
52 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
53 | MODULE_LICENSE("GPL"); | |
54 | ||
ff699e6b | 55 | static unsigned int antenna_pwr; |
86ddd96f | 56 | |
1da177e4 LT |
57 | module_param(antenna_pwr, int, 0444); |
58 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
59 | ||
ff699e6b | 60 | static int use_frontend; |
b331daa0 SB |
61 | module_param(use_frontend, int, 0644); |
62 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 63 | |
ff699e6b | 64 | static int debug; |
58ef4f92 HH |
65 | module_param(debug, int, 0644); |
66 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
67 | ||
78e92006 JG |
68 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
69 | ||
cf3c34c8 TP |
70 | #define dprintk(fmt, arg...) do { if (debug) \ |
71 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
72 | ||
73 | /* Print a warning */ | |
74 | #define wprintk(fmt, arg...) \ | |
75 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
76 | |
77 | /* ------------------------------------------------------------------ | |
78 | * mt352 based DVB-T cards | |
79 | */ | |
80 | ||
1da177e4 LT |
81 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
82 | { | |
83 | u32 ok; | |
84 | ||
85 | if (!on) { | |
86 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
87 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
88 | return 0; | |
89 | } | |
90 | ||
91 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
92 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
93 | udelay(10); | |
94 | ||
95 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
96 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
97 | udelay(10); | |
98 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
99 | udelay(10); | |
100 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 101 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
102 | |
103 | if (!ok) | |
104 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
105 | return ok; | |
106 | } | |
107 | ||
108 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
109 | { | |
110 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
111 | static u8 reset [] = { RESET, 0x80 }; | |
112 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
113 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
114 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
115 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
116 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
117 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
118 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
119 | struct saa7134_dev *dev= fe->dvb->priv; | |
120 | ||
5823b3a6 | 121 | dprintk("%s called\n", __func__); |
1da177e4 LT |
122 | |
123 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
124 | udelay(200); | |
125 | mt352_write(fe, reset, sizeof(reset)); | |
126 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
127 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
128 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
129 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
130 | ||
131 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
132 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
133 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 134 | |
1da177e4 LT |
135 | return 0; |
136 | } | |
137 | ||
a78d0bfa JAR |
138 | static int mt352_aver777_init(struct dvb_frontend* fe) |
139 | { | |
140 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
141 | static u8 reset [] = { RESET, 0x80 }; | |
142 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
143 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
144 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
145 | ||
146 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
147 | udelay(200); | |
148 | mt352_write(fe, reset, sizeof(reset)); | |
149 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
150 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
151 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
152 | ||
153 | return 0; | |
154 | } | |
155 | ||
6e501a3f | 156 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
95a2fdb6 | 157 | { |
6e501a3f TF |
158 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
159 | static u8 reset [] = { RESET, 0x80 }; | |
160 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
161 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; | |
95a2fdb6 MCC |
162 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
163 | ||
164 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
165 | udelay(200); | |
166 | mt352_write(fe, reset, sizeof(reset)); | |
167 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
168 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
169 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
95a2fdb6 MCC |
170 | return 0; |
171 | } | |
172 | ||
0463f12c AQ |
173 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
174 | struct dvb_frontend_parameters* params) | |
1da177e4 | 175 | { |
df8cf706 HH |
176 | u8 off[] = { 0x00, 0xf1}; |
177 | u8 on[] = { 0x00, 0x71}; | |
178 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
179 | ||
1da177e4 LT |
180 | struct saa7134_dev *dev = fe->dvb->priv; |
181 | struct v4l2_frequency f; | |
182 | ||
183 | /* set frequency (mt2050) */ | |
184 | f.tuner = 0; | |
185 | f.type = V4L2_TUNER_DIGITAL_TV; | |
186 | f.frequency = params->frequency / 1000 * 16 / 1000; | |
dea74869 PB |
187 | if (fe->ops.i2c_gate_ctrl) |
188 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 189 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 | 190 | saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f); |
df8cf706 | 191 | msg.buf = on; |
dea74869 PB |
192 | if (fe->ops.i2c_gate_ctrl) |
193 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 194 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
195 | |
196 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
197 | ||
198 | /* mt352 setup */ | |
0463f12c | 199 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
200 | } |
201 | ||
202 | static struct mt352_config pinnacle_300i = { | |
203 | .demod_address = 0x3c >> 1, | |
204 | .adc_clock = 20333, | |
205 | .if2 = 36150, | |
206 | .no_tuner = 1, | |
207 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 208 | }; |
a78d0bfa JAR |
209 | |
210 | static struct mt352_config avermedia_777 = { | |
211 | .demod_address = 0xf, | |
212 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 213 | }; |
1da177e4 | 214 | |
6e501a3f | 215 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
bc36a686 MCC |
216 | .demod_address = (0x1e >> 1), |
217 | .no_tuner = 1, | |
6e501a3f | 218 | .demod_init = mt352_avermedia_xc3028_init, |
bc36a686 MCC |
219 | }; |
220 | ||
58ef4f92 HH |
221 | /* ================================================================== |
222 | * tda1004x based DVB-T cards, helper functions | |
223 | */ | |
224 | ||
225 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
226 | const struct firmware **fw, char *name) | |
1da177e4 LT |
227 | { |
228 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
229 | return request_firmware(fw, name, &dev->pci->dev); |
230 | } | |
231 | ||
58ef4f92 HH |
232 | /* ------------------------------------------------------------------ |
233 | * these tuners are tu1216, td1316(a) | |
234 | */ | |
235 | ||
236 | static int philips_tda6651_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
237 | { | |
238 | struct saa7134_dev *dev = fe->dvb->priv; | |
239 | struct tda1004x_state *state = fe->demodulator_priv; | |
240 | u8 addr = state->config->tuner_address; | |
86ddd96f | 241 | u8 tuner_buf[4]; |
2cf36ac4 | 242 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
243 | sizeof(tuner_buf) }; |
244 | int tuner_frequency = 0; | |
245 | u8 band, cp, filter; | |
246 | ||
247 | /* determine charge pump */ | |
248 | tuner_frequency = params->frequency + 36166000; | |
249 | if (tuner_frequency < 87000000) | |
250 | return -EINVAL; | |
251 | else if (tuner_frequency < 130000000) | |
252 | cp = 3; | |
253 | else if (tuner_frequency < 160000000) | |
254 | cp = 5; | |
255 | else if (tuner_frequency < 200000000) | |
256 | cp = 6; | |
257 | else if (tuner_frequency < 290000000) | |
258 | cp = 3; | |
259 | else if (tuner_frequency < 420000000) | |
260 | cp = 5; | |
261 | else if (tuner_frequency < 480000000) | |
262 | cp = 6; | |
263 | else if (tuner_frequency < 620000000) | |
264 | cp = 3; | |
265 | else if (tuner_frequency < 830000000) | |
266 | cp = 5; | |
267 | else if (tuner_frequency < 895000000) | |
268 | cp = 7; | |
269 | else | |
270 | return -EINVAL; | |
271 | ||
272 | /* determine band */ | |
273 | if (params->frequency < 49000000) | |
274 | return -EINVAL; | |
275 | else if (params->frequency < 161000000) | |
276 | band = 1; | |
277 | else if (params->frequency < 444000000) | |
278 | band = 2; | |
279 | else if (params->frequency < 861000000) | |
280 | band = 4; | |
281 | else | |
282 | return -EINVAL; | |
283 | ||
284 | /* setup PLL filter */ | |
285 | switch (params->u.ofdm.bandwidth) { | |
286 | case BANDWIDTH_6_MHZ: | |
287 | filter = 0; | |
288 | break; | |
289 | ||
290 | case BANDWIDTH_7_MHZ: | |
291 | filter = 0; | |
292 | break; | |
293 | ||
294 | case BANDWIDTH_8_MHZ: | |
295 | filter = 1; | |
296 | break; | |
1da177e4 | 297 | |
86ddd96f MCC |
298 | default: |
299 | return -EINVAL; | |
300 | } | |
301 | ||
302 | /* calculate divisor | |
303 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 304 | */ |
86ddd96f MCC |
305 | tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000; |
306 | ||
307 | /* setup tuner buffer */ | |
308 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
309 | tuner_buf[1] = tuner_frequency & 0xff; | |
310 | tuner_buf[2] = 0xca; | |
311 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
312 | ||
dea74869 PB |
313 | if (fe->ops.i2c_gate_ctrl) |
314 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 315 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
316 | wprintk("could not write to tuner at addr: 0x%02x\n", |
317 | addr << 1); | |
86ddd96f | 318 | return -EIO; |
58ef4f92 | 319 | } |
2cf36ac4 HH |
320 | msleep(1); |
321 | return 0; | |
322 | } | |
323 | ||
58ef4f92 | 324 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
325 | { |
326 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
327 | struct tda1004x_state *state = fe->demodulator_priv; |
328 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
329 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
330 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 331 | |
2cf36ac4 | 332 | /* setup PLL configuration */ |
dea74869 PB |
333 | if (fe->ops.i2c_gate_ctrl) |
334 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
335 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
336 | return -EIO; | |
86ddd96f | 337 | msleep(1); |
2cf36ac4 | 338 | |
1da177e4 LT |
339 | return 0; |
340 | } | |
341 | ||
2cf36ac4 HH |
342 | /* ------------------------------------------------------------------ */ |
343 | ||
2cf36ac4 | 344 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
345 | .demod_address = 0x8, |
346 | .invert = 1, | |
2cf36ac4 | 347 | .invert_oclk = 0, |
86ddd96f MCC |
348 | .xtal_freq = TDA10046_XTAL_4M, |
349 | .agc_config = TDA10046_AGC_DEFAULT, | |
350 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
351 | .tuner_address = 0x60, |
352 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
353 | }; |
354 | ||
2cf36ac4 HH |
355 | static struct tda1004x_config philips_tu1216_61_config = { |
356 | ||
357 | .demod_address = 0x8, | |
358 | .invert = 1, | |
359 | .invert_oclk = 0, | |
360 | .xtal_freq = TDA10046_XTAL_4M, | |
361 | .agc_config = TDA10046_AGC_DEFAULT, | |
362 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
363 | .tuner_address = 0x61, |
364 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
365 | }; |
366 | ||
367 | /* ------------------------------------------------------------------ */ | |
368 | ||
cbb94521 | 369 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
370 | { |
371 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
372 | struct tda1004x_state *state = fe->demodulator_priv; |
373 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 374 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 375 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
376 | |
377 | /* setup PLL configuration */ | |
dea74869 PB |
378 | if (fe->ops.i2c_gate_ctrl) |
379 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
380 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
381 | return -EIO; | |
2cf36ac4 HH |
382 | return 0; |
383 | } | |
384 | ||
a79ddae9 | 385 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
2cf36ac4 | 386 | { |
58ef4f92 HH |
387 | return philips_tda6651_pll_set(fe, params); |
388 | } | |
389 | ||
390 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
391 | { | |
392 | struct saa7134_dev *dev = fe->dvb->priv; | |
393 | struct tda1004x_state *state = fe->demodulator_priv; | |
394 | u8 addr = state->config->tuner_address; | |
395 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
396 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
397 | ||
398 | /* switch the tuner to analog mode */ | |
399 | if (fe->ops.i2c_gate_ctrl) | |
400 | fe->ops.i2c_gate_ctrl(fe, 1); | |
401 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
402 | return -EIO; | |
403 | return 0; | |
2cf36ac4 HH |
404 | } |
405 | ||
58ef4f92 HH |
406 | /* ------------------------------------------------------------------ */ |
407 | ||
cbb94521 HH |
408 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
409 | { | |
410 | struct saa7134_dev *dev = fe->dvb->priv; | |
411 | static u8 msg[] = { 0x00, 0x40}; | |
412 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
413 | ||
414 | ||
415 | if (philips_td1316_tuner_init(fe)) | |
416 | return -EIO; | |
417 | msleep(1); | |
418 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
419 | return -EIO; | |
420 | ||
421 | return 0; | |
422 | } | |
423 | ||
a79ddae9 | 424 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
425 | { |
426 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 427 | |
58ef4f92 HH |
428 | static u8 msg[] = { 0x00, 0x14 }; |
429 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
430 | ||
431 | if (philips_td1316_tuner_sleep(fe)) | |
432 | return -EIO; | |
2cf36ac4 HH |
433 | |
434 | /* switch the board to analog mode */ | |
dea74869 PB |
435 | if (fe->ops.i2c_gate_ctrl) |
436 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 437 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
438 | return 0; |
439 | } | |
440 | ||
441 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
442 | { | |
443 | struct saa7134_dev *dev = fe->dvb->priv; | |
444 | ||
445 | if (dev->original_demod_sleep) | |
446 | dev->original_demod_sleep(fe); | |
dea74869 | 447 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 448 | return 0; |
2cf36ac4 HH |
449 | } |
450 | ||
451 | static struct tda1004x_config philips_europa_config = { | |
452 | ||
453 | .demod_address = 0x8, | |
454 | .invert = 0, | |
455 | .invert_oclk = 0, | |
456 | .xtal_freq = TDA10046_XTAL_4M, | |
457 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
458 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
459 | .tuner_address = 0x61, |
460 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
461 | }; |
462 | ||
408b664a | 463 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
464 | .demod_address = 0x08, |
465 | .invert = 1, | |
466 | .invert_oclk = 0, | |
467 | .xtal_freq = TDA10046_XTAL_16M, | |
468 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
469 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
470 | .tuner_address = 0x61, |
471 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
472 | }; |
473 | ||
58ef4f92 HH |
474 | /* ------------------------------------------------------------------ |
475 | * tda 1004x based cards with philips silicon tuner | |
476 | */ | |
477 | ||
58ef4f92 HH |
478 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
479 | { | |
58ef4f92 HH |
480 | struct tda1004x_state *state = fe->demodulator_priv; |
481 | ||
482 | u8 addr = state->config->i2c_gate; | |
483 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
484 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
485 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
486 | if (enable) { | |
487 | tda8290_msg.buf = tda8290_close; | |
488 | } else { | |
489 | tda8290_msg.buf = tda8290_open; | |
490 | } | |
06be3035 | 491 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
492 | struct saa7134_dev *dev = fe->dvb->priv; |
493 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
494 | return -EIO; |
495 | } | |
496 | msleep(20); | |
497 | return 0; | |
498 | } | |
499 | ||
58ef4f92 | 500 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 501 | { |
90e9df7f | 502 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 503 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 504 | |
58ef4f92 HH |
505 | switch (state->config->antenna_switch) { |
506 | case 0: break; | |
507 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
508 | saa7134_set_gpio(dev, 21, 0); | |
509 | break; | |
510 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
511 | saa7134_set_gpio(dev, 21, 1); | |
512 | break; | |
587d2fd7 | 513 | } |
587d2fd7 HH |
514 | return 0; |
515 | } | |
516 | ||
58ef4f92 | 517 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 518 | { |
58ef4f92 HH |
519 | struct saa7134_dev *dev = fe->dvb->priv; |
520 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 521 | |
58ef4f92 HH |
522 | switch (state->config->antenna_switch) { |
523 | case 0: break; | |
524 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
525 | saa7134_set_gpio(dev, 21, 1); | |
526 | break; | |
527 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
528 | saa7134_set_gpio(dev, 21, 0); | |
529 | break; | |
530 | } | |
587d2fd7 | 531 | return 0; |
2d6b5f62 | 532 | } |
90e9df7f | 533 | |
d557dab5 MCC |
534 | static int configure_tda827x_fe(struct saa7134_dev *dev, |
535 | struct tda1004x_config *cdec_conf, | |
536 | struct tda827x_config *tuner_conf) | |
90e9df7f | 537 | { |
363c35fc ST |
538 | struct videobuf_dvb_frontend *fe0; |
539 | ||
92abe9ee DB |
540 | /* Get the first frontend */ |
541 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
363c35fc ST |
542 | |
543 | fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); | |
544 | if (fe0->dvb.frontend) { | |
7bff4b4d | 545 | if (cdec_conf->i2c_gate) |
363c35fc ST |
546 | fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
547 | if (dvb_attach(tda827x_attach, fe0->dvb.frontend, | |
d557dab5 MCC |
548 | cdec_conf->tuner_address, |
549 | &dev->i2c_adap, tuner_conf)) | |
550 | return 0; | |
551 | ||
552 | wprintk("no tda827x tuner found at addr: %02x\n", | |
7bff4b4d | 553 | cdec_conf->tuner_address); |
58ef4f92 | 554 | } |
d557dab5 | 555 | return -EINVAL; |
90e9df7f HH |
556 | } |
557 | ||
58ef4f92 | 558 | /* ------------------------------------------------------------------ */ |
261f5081 | 559 | |
7bff4b4d | 560 | static struct tda827x_config tda827x_cfg_0 = { |
7bff4b4d HH |
561 | .init = philips_tda827x_tuner_init, |
562 | .sleep = philips_tda827x_tuner_sleep, | |
563 | .config = 0, | |
564 | .switch_addr = 0 | |
565 | }; | |
566 | ||
567 | static struct tda827x_config tda827x_cfg_1 = { | |
7bff4b4d HH |
568 | .init = philips_tda827x_tuner_init, |
569 | .sleep = philips_tda827x_tuner_sleep, | |
570 | .config = 1, | |
571 | .switch_addr = 0x4b | |
572 | }; | |
573 | ||
574 | static struct tda827x_config tda827x_cfg_2 = { | |
7bff4b4d HH |
575 | .init = philips_tda827x_tuner_init, |
576 | .sleep = philips_tda827x_tuner_sleep, | |
577 | .config = 2, | |
578 | .switch_addr = 0x4b | |
579 | }; | |
580 | ||
581 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
7bff4b4d HH |
582 | .init = philips_tda827x_tuner_init, |
583 | .sleep = philips_tda827x_tuner_sleep, | |
584 | .config = 2, | |
585 | .switch_addr = 0x42 | |
586 | }; | |
587 | ||
588 | /* ------------------------------------------------------------------ */ | |
589 | ||
58ef4f92 | 590 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
591 | .demod_address = 0x08, |
592 | .invert = 1, | |
593 | .invert_oclk = 0, | |
594 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
595 | .agc_config = TDA10046_AGC_TDA827X, |
596 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 597 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
598 | .tuner_address = 0x60, |
599 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 600 | }; |
550a9a5e | 601 | |
58ef4f92 HH |
602 | static struct tda1004x_config philips_tiger_config = { |
603 | .demod_address = 0x08, | |
604 | .invert = 1, | |
605 | .invert_oclk = 0, | |
606 | .xtal_freq = TDA10046_XTAL_16M, | |
607 | .agc_config = TDA10046_AGC_TDA827X, | |
608 | .gpio_config = TDA10046_GP11_I, | |
609 | .if_freq = TDA10046_FREQ_045, | |
610 | .i2c_gate = 0x4b, | |
611 | .tuner_address = 0x61, | |
58ef4f92 HH |
612 | .antenna_switch= 1, |
613 | .request_firmware = philips_tda1004x_request_firmware | |
614 | }; | |
550a9a5e HH |
615 | |
616 | static struct tda1004x_config cinergy_ht_config = { | |
617 | .demod_address = 0x08, | |
618 | .invert = 1, | |
619 | .invert_oclk = 0, | |
620 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
621 | .agc_config = TDA10046_AGC_TDA827X, |
622 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 623 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
624 | .i2c_gate = 0x4b, |
625 | .tuner_address = 0x61, | |
58ef4f92 | 626 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
627 | }; |
628 | ||
58ef4f92 HH |
629 | static struct tda1004x_config cinergy_ht_pci_config = { |
630 | .demod_address = 0x08, | |
631 | .invert = 1, | |
632 | .invert_oclk = 0, | |
633 | .xtal_freq = TDA10046_XTAL_16M, | |
634 | .agc_config = TDA10046_AGC_TDA827X, | |
635 | .gpio_config = TDA10046_GP01_I, | |
636 | .if_freq = TDA10046_FREQ_045, | |
637 | .i2c_gate = 0x4b, | |
638 | .tuner_address = 0x60, | |
58ef4f92 HH |
639 | .request_firmware = philips_tda1004x_request_firmware |
640 | }; | |
641 | ||
642 | static struct tda1004x_config philips_tiger_s_config = { | |
643 | .demod_address = 0x08, | |
644 | .invert = 1, | |
645 | .invert_oclk = 0, | |
646 | .xtal_freq = TDA10046_XTAL_16M, | |
647 | .agc_config = TDA10046_AGC_TDA827X, | |
648 | .gpio_config = TDA10046_GP01_I, | |
649 | .if_freq = TDA10046_FREQ_045, | |
650 | .i2c_gate = 0x4b, | |
651 | .tuner_address = 0x61, | |
58ef4f92 HH |
652 | .antenna_switch= 1, |
653 | .request_firmware = philips_tda1004x_request_firmware | |
654 | }; | |
df42eaf2 | 655 | |
587d2fd7 HH |
656 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
657 | .demod_address = 0x08, | |
658 | .invert = 1, | |
659 | .invert_oclk = 0, | |
660 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
661 | .agc_config = TDA10046_AGC_TDA827X, |
662 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 663 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
664 | .i2c_gate = 0x4b, |
665 | .tuner_address = 0x61, | |
58ef4f92 | 666 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
667 | }; |
668 | ||
c6e53daf TG |
669 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
670 | .demod_address = 0x08, | |
671 | .invert = 1, | |
672 | .invert_oclk = 0, | |
673 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
674 | .agc_config = TDA10046_AGC_TDA827X, |
675 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 676 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
677 | .i2c_gate = 0x4b, |
678 | .tuner_address = 0x61, | |
679 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
680 | }; |
681 | ||
83646817 HH |
682 | static struct tda1004x_config asus_p7131_dual_config = { |
683 | .demod_address = 0x08, | |
684 | .invert = 1, | |
685 | .invert_oclk = 0, | |
686 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
687 | .agc_config = TDA10046_AGC_TDA827X, |
688 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 689 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
690 | .i2c_gate = 0x4b, |
691 | .tuner_address = 0x61, | |
58ef4f92 HH |
692 | .antenna_switch= 2, |
693 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
694 | }; |
695 | ||
420f32fe NS |
696 | static struct tda1004x_config lifeview_trio_config = { |
697 | .demod_address = 0x09, | |
698 | .invert = 1, | |
699 | .invert_oclk = 0, | |
700 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
701 | .agc_config = TDA10046_AGC_TDA827X, |
702 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 703 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
704 | .tuner_address = 0x60, |
705 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
706 | }; |
707 | ||
58ef4f92 | 708 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
709 | .demod_address = 0x08, |
710 | .invert = 1, | |
711 | .invert_oclk = 0, | |
712 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 713 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 714 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 715 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
716 | .tuner_address = 0x60, |
717 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
718 | }; |
719 | ||
58ef4f92 | 720 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
721 | .demod_address = 0x08, |
722 | .invert = 1, | |
723 | .invert_oclk = 0, | |
724 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 725 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 726 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 727 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
728 | .i2c_gate = 0x4b, |
729 | .tuner_address = 0x60, | |
58ef4f92 | 730 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
731 | }; |
732 | ||
e06cea4c HH |
733 | static struct tda1004x_config asus_p7131_4871_config = { |
734 | .demod_address = 0x08, | |
735 | .invert = 1, | |
736 | .invert_oclk = 0, | |
737 | .xtal_freq = TDA10046_XTAL_16M, | |
738 | .agc_config = TDA10046_AGC_TDA827X, | |
739 | .gpio_config = TDA10046_GP01_I, | |
740 | .if_freq = TDA10046_FREQ_045, | |
741 | .i2c_gate = 0x4b, | |
742 | .tuner_address = 0x61, | |
e06cea4c HH |
743 | .antenna_switch= 2, |
744 | .request_firmware = philips_tda1004x_request_firmware | |
745 | }; | |
746 | ||
f3eec0c0 | 747 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
748 | .demod_address = 0x08, |
749 | .invert = 1, | |
750 | .invert_oclk = 0, | |
751 | .xtal_freq = TDA10046_XTAL_16M, | |
752 | .agc_config = TDA10046_AGC_TDA827X, | |
753 | .gpio_config = TDA10046_GP11_I, | |
754 | .if_freq = TDA10046_FREQ_045, | |
755 | .i2c_gate = 0x4b, | |
756 | .tuner_address = 0x61, | |
e06cea4c HH |
757 | .antenna_switch= 2, |
758 | .request_firmware = philips_tda1004x_request_firmware | |
759 | }; | |
261f5081 | 760 | |
b39423a9 SF |
761 | static struct tda1004x_config kworld_dvb_t_210_config = { |
762 | .demod_address = 0x08, | |
763 | .invert = 1, | |
764 | .invert_oclk = 0, | |
765 | .xtal_freq = TDA10046_XTAL_16M, | |
766 | .agc_config = TDA10046_AGC_TDA827X, | |
767 | .gpio_config = TDA10046_GP11_I, | |
768 | .if_freq = TDA10046_FREQ_045, | |
769 | .i2c_gate = 0x4b, | |
770 | .tuner_address = 0x61, | |
b39423a9 SF |
771 | .antenna_switch= 1, |
772 | .request_firmware = philips_tda1004x_request_firmware | |
773 | }; | |
261f5081 | 774 | |
d90d9f5a ES |
775 | static struct tda1004x_config avermedia_super_007_config = { |
776 | .demod_address = 0x08, | |
777 | .invert = 1, | |
778 | .invert_oclk = 0, | |
779 | .xtal_freq = TDA10046_XTAL_16M, | |
780 | .agc_config = TDA10046_AGC_TDA827X, | |
781 | .gpio_config = TDA10046_GP01_I, | |
782 | .if_freq = TDA10046_FREQ_045, | |
783 | .i2c_gate = 0x4b, | |
784 | .tuner_address = 0x60, | |
d90d9f5a ES |
785 | .antenna_switch= 1, |
786 | .request_firmware = philips_tda1004x_request_firmware | |
787 | }; | |
788 | ||
4ba24373 HP |
789 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
790 | .demod_address = 0x08, | |
791 | .invert = 1, | |
792 | .invert_oclk = 0, | |
793 | .xtal_freq = TDA10046_XTAL_16M, | |
794 | .agc_config = TDA10046_AGC_TDA827X, | |
795 | .gpio_config = TDA10046_GP01_I, | |
796 | .if_freq = TDA10046_FREQ_045, | |
797 | .i2c_gate = 0x42, | |
798 | .tuner_address = 0x61, | |
4ba24373 HP |
799 | .antenna_switch = 1, |
800 | .request_firmware = philips_tda1004x_request_firmware | |
801 | }; | |
802 | ||
301e9d64 | 803 | static struct tda1004x_config asus_tiger_3in1_config = { |
804 | .demod_address = 0x0b, | |
805 | .invert = 1, | |
806 | .invert_oclk = 0, | |
807 | .xtal_freq = TDA10046_XTAL_16M, | |
808 | .agc_config = TDA10046_AGC_TDA827X, | |
809 | .gpio_config = TDA10046_GP11_I, | |
810 | .if_freq = TDA10046_FREQ_045, | |
811 | .i2c_gate = 0x4b, | |
812 | .tuner_address = 0x61, | |
813 | .antenna_switch = 1, | |
814 | .request_firmware = philips_tda1004x_request_firmware | |
815 | }; | |
816 | ||
58ef4f92 HH |
817 | /* ------------------------------------------------------------------ |
818 | * special case: this card uses saa713x GPIO22 for the mode switch | |
819 | */ | |
5eda227f | 820 | |
58ef4f92 | 821 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
822 | { |
823 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
824 | philips_tda827x_tuner_init(fe); |
825 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 826 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
827 | return 0; |
828 | } | |
829 | ||
58ef4f92 | 830 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 831 | { |
5eda227f | 832 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 833 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 834 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
835 | philips_tda827x_tuner_sleep(fe); |
836 | return 0; | |
5eda227f HH |
837 | } |
838 | ||
8ce47dad | 839 | static struct tda827x_config ads_duo_cfg = { |
8ce47dad | 840 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
841 | .sleep = ads_duo_tuner_sleep, |
842 | .config = 0 | |
8ce47dad MK |
843 | }; |
844 | ||
58ef4f92 | 845 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
846 | .demod_address = 0x08, |
847 | .invert = 1, | |
848 | .invert_oclk = 0, | |
849 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 850 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 851 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 852 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
853 | .tuner_address = 0x61, |
854 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
855 | }; |
856 | ||
58ef4f92 HH |
857 | /* ================================================================== |
858 | * tda10086 based DVB-S cards, helper functions | |
859 | */ | |
860 | ||
e2ac28fa IL |
861 | static struct tda10086_config flydvbs = { |
862 | .demod_address = 0x0e, | |
863 | .invert = 0, | |
ea75baf4 | 864 | .diseqc_tone = 0, |
9a1b04e4 HH |
865 | .xtal_freq = TDA10086_XTAL_16M, |
866 | }; | |
867 | ||
868 | static struct tda10086_config sd1878_4m = { | |
869 | .demod_address = 0x0e, | |
870 | .invert = 0, | |
871 | .diseqc_tone = 0, | |
872 | .xtal_freq = TDA10086_XTAL_4M, | |
e2ac28fa IL |
873 | }; |
874 | ||
1b1cee35 HH |
875 | /* ------------------------------------------------------------------ |
876 | * special case: lnb supply is connected to the gated i2c | |
877 | */ | |
878 | ||
879 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
880 | { | |
881 | int res = -EIO; | |
882 | struct saa7134_dev *dev = fe->dvb->priv; | |
883 | if (fe->ops.i2c_gate_ctrl) { | |
884 | fe->ops.i2c_gate_ctrl(fe, 1); | |
885 | if (dev->original_set_voltage) | |
886 | res = dev->original_set_voltage(fe, voltage); | |
887 | fe->ops.i2c_gate_ctrl(fe, 0); | |
888 | } | |
889 | return res; | |
890 | }; | |
891 | ||
892 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
893 | { | |
894 | int res = -EIO; | |
895 | struct saa7134_dev *dev = fe->dvb->priv; | |
896 | if (fe->ops.i2c_gate_ctrl) { | |
897 | fe->ops.i2c_gate_ctrl(fe, 1); | |
898 | if (dev->original_set_high_voltage) | |
899 | res = dev->original_set_high_voltage(fe, arg); | |
900 | fe->ops.i2c_gate_ctrl(fe, 0); | |
901 | } | |
902 | return res; | |
903 | }; | |
904 | ||
5823b3a6 HH |
905 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
906 | { | |
907 | struct saa7134_dev *dev = fe->dvb->priv; | |
908 | u8 wbuf[2] = { 0x1f, 00 }; | |
909 | u8 rbuf; | |
910 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
911 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
912 | ||
913 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
914 | return -EIO; | |
915 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
916 | if (voltage == SEC_VOLTAGE_18) | |
917 | wbuf[1] = rbuf | 0x10; | |
918 | else | |
919 | wbuf[1] = rbuf & 0xef; | |
920 | msg[0].len = 2; | |
921 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
922 | return 0; | |
923 | } | |
924 | ||
925 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
926 | { | |
927 | struct saa7134_dev *dev = fe->dvb->priv; | |
928 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
929 | return -EIO; | |
930 | } | |
931 | ||
58ef4f92 HH |
932 | /* ================================================================== |
933 | * nxt200x based ATSC cards, helper functions | |
934 | */ | |
90e9df7f | 935 | |
3b64e8e2 MK |
936 | static struct nxt200x_config avertvhda180 = { |
937 | .demod_address = 0x0a, | |
3b64e8e2 | 938 | }; |
3e1410ad AB |
939 | |
940 | static struct nxt200x_config kworldatsc110 = { | |
941 | .demod_address = 0x0a, | |
3e1410ad | 942 | }; |
3b64e8e2 | 943 | |
58ef4f92 HH |
944 | /* ================================================================== |
945 | * Core code | |
946 | */ | |
1da177e4 LT |
947 | |
948 | static int dvb_init(struct saa7134_dev *dev) | |
949 | { | |
1c4f76ab | 950 | int ret; |
bc36a686 | 951 | int attach_xc3028 = 0; |
363c35fc ST |
952 | struct videobuf_dvb_frontend *fe0; |
953 | ||
f972e0bd DB |
954 | /* FIXME: add support for multi-frontend */ |
955 | mutex_init(&dev->frontends.lock); | |
7bdf84fc | 956 | INIT_LIST_HEAD(&dev->frontends.felist); |
f972e0bd DB |
957 | |
958 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); | |
f3f741e7 DB |
959 | fe0 = videobuf_dvb_alloc_frontend(&dev->frontends, 1); |
960 | if (!fe0) { | |
f972e0bd DB |
961 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
962 | return -ENOMEM; | |
963 | } | |
964 | ||
1da177e4 LT |
965 | /* init struct videobuf_dvb */ |
966 | dev->ts.nr_bufs = 32; | |
967 | dev->ts.nr_packets = 32*4; | |
363c35fc ST |
968 | fe0->dvb.name = dev->name; |
969 | videobuf_queue_sg_init(&fe0->dvb.dvbq, &saa7134_ts_qops, | |
0705135e | 970 | &dev->pci->dev, &dev->slock, |
1da177e4 LT |
971 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
972 | V4L2_FIELD_ALTERNATE, | |
973 | sizeof(struct saa7134_buf), | |
974 | dev); | |
975 | ||
976 | switch (dev->board) { | |
977 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 978 | dprintk("pinnacle 300i dvb setup\n"); |
363c35fc | 979 | fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 980 | &dev->i2c_adap); |
363c35fc ST |
981 | if (fe0->dvb.frontend) { |
982 | fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; | |
6b3ccab7 | 983 | } |
1da177e4 | 984 | break; |
a78d0bfa | 985 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 986 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 987 | dprintk("avertv 777 dvb setup\n"); |
363c35fc | 988 | fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 989 | &dev->i2c_adap); |
363c35fc ST |
990 | if (fe0->dvb.frontend) { |
991 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
fb147e97 MK |
992 | &dev->i2c_adap, 0x61, |
993 | TUNER_PHILIPS_TD1316); | |
6b3ccab7 | 994 | } |
a78d0bfa | 995 | break; |
95a2fdb6 | 996 | case SAA7134_BOARD_AVERMEDIA_A16D: |
6e501a3f | 997 | dprintk("AverMedia A16D dvb setup\n"); |
363c35fc | 998 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
999 | &avermedia_xc3028_mt352_dev, |
1000 | &dev->i2c_adap); | |
95a2fdb6 MCC |
1001 | attach_xc3028 = 1; |
1002 | break; | |
1da177e4 | 1003 | case SAA7134_BOARD_MD7134: |
363c35fc | 1004 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1005 | &medion_cardbus, |
1006 | &dev->i2c_adap); | |
363c35fc ST |
1007 | if (fe0->dvb.frontend) { |
1008 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
cb89cd33 MK |
1009 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1010 | TUNER_PHILIPS_FMD1216ME_MK3); | |
6b3ccab7 | 1011 | } |
1da177e4 | 1012 | break; |
86ddd96f | 1013 | case SAA7134_BOARD_PHILIPS_TOUGH: |
363c35fc | 1014 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1015 | &philips_tu1216_60_config, |
1016 | &dev->i2c_adap); | |
363c35fc ST |
1017 | if (fe0->dvb.frontend) { |
1018 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1019 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1020 | } |
86ddd96f MCC |
1021 | break; |
1022 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1023 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
d557dab5 MCC |
1024 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1025 | &tda827x_cfg_0) < 0) | |
1026 | goto dettach_frontend; | |
86ddd96f | 1027 | break; |
2cf36ac4 | 1028 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1029 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
363c35fc | 1030 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1031 | &philips_europa_config, |
1032 | &dev->i2c_adap); | |
363c35fc ST |
1033 | if (fe0->dvb.frontend) { |
1034 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1035 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1036 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1037 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1038 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1039 | } |
2cf36ac4 HH |
1040 | break; |
1041 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: | |
363c35fc | 1042 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1043 | &philips_tu1216_61_config, |
1044 | &dev->i2c_adap); | |
363c35fc ST |
1045 | if (fe0->dvb.frontend) { |
1046 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1047 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1048 | } |
2cf36ac4 | 1049 | break; |
b39423a9 | 1050 | case SAA7134_BOARD_KWORLD_DVBT_210: |
d557dab5 MCC |
1051 | if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config, |
1052 | &tda827x_cfg_2) < 0) | |
1053 | goto dettach_frontend; | |
b39423a9 | 1054 | break; |
90e9df7f | 1055 | case SAA7134_BOARD_PHILIPS_TIGER: |
d557dab5 MCC |
1056 | if (configure_tda827x_fe(dev, &philips_tiger_config, |
1057 | &tda827x_cfg_0) < 0) | |
1058 | goto dettach_frontend; | |
587d2fd7 HH |
1059 | break; |
1060 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
d557dab5 MCC |
1061 | if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, |
1062 | &tda827x_cfg_1) < 0) | |
1063 | goto dettach_frontend; | |
90e9df7f | 1064 | break; |
c6e53daf | 1065 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
d557dab5 MCC |
1066 | if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, |
1067 | &tda827x_cfg_1) < 0) | |
1068 | goto dettach_frontend; | |
c6e53daf | 1069 | break; |
d4b0aba4 | 1070 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
d557dab5 MCC |
1071 | if (configure_tda827x_fe(dev, &asus_p7131_dual_config, |
1072 | &tda827x_cfg_0) < 0) | |
1073 | goto dettach_frontend; | |
d4b0aba4 | 1074 | break; |
3d8466ec | 1075 | case SAA7134_BOARD_FLYDVBT_LR301: |
d557dab5 MCC |
1076 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1077 | &tda827x_cfg_0) < 0) | |
1078 | goto dettach_frontend; | |
3d8466ec | 1079 | break; |
92abe9ee | 1080 | case SAA7134_BOARD_FLYDVB_TRIO: |
d557dab5 MCC |
1081 | if (!use_frontend) { /* terrestrial */ |
1082 | if (configure_tda827x_fe(dev, &lifeview_trio_config, | |
1083 | &tda827x_cfg_0) < 0) | |
1084 | goto dettach_frontend; | |
7bff4b4d | 1085 | } else { /* satellite */ |
363c35fc ST |
1086 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1087 | if (fe0->dvb.frontend) { | |
1088 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63, | |
1f683cd8 | 1089 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1090 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
d557dab5 | 1091 | goto dettach_frontend; |
1f683cd8 | 1092 | } |
363c35fc | 1093 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, &dev->i2c_adap, |
1f683cd8 | 1094 | 0x08, 0, 0) == NULL) { |
5823b3a6 | 1095 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
d557dab5 | 1096 | goto dettach_frontend; |
1f683cd8 NS |
1097 | } |
1098 | } | |
6b3ccab7 | 1099 | } |
420f32fe | 1100 | break; |
df42eaf2 | 1101 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1102 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
363c35fc | 1103 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1104 | &ads_tech_duo_config, |
1105 | &dev->i2c_adap); | |
363c35fc ST |
1106 | if (fe0->dvb.frontend) { |
1107 | if (dvb_attach(tda827x_attach,fe0->dvb.frontend, | |
7bff4b4d HH |
1108 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1109 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1110 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d | 1111 | ads_tech_duo_config.tuner_address); |
d557dab5 | 1112 | goto dettach_frontend; |
ede2200d | 1113 | } |
bc36ec74 MCC |
1114 | } else |
1115 | wprintk("failed to attach tda10046\n"); | |
df42eaf2 | 1116 | break; |
3dfb729f | 1117 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
d557dab5 MCC |
1118 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
1119 | &tda827x_cfg_0) < 0) | |
1120 | goto dettach_frontend; | |
d95b8942 | 1121 | break; |
5eda227f | 1122 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1123 | if (!use_frontend) { /* terrestrial */ |
d557dab5 MCC |
1124 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1125 | &tda827x_cfg_0) < 0) | |
1126 | goto dettach_frontend; | |
4b1431ca | 1127 | } else { /* satellite */ |
363c35fc | 1128 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
4b1431ca | 1129 | &flydvbs, &dev->i2c_adap); |
363c35fc ST |
1130 | if (fe0->dvb.frontend) { |
1131 | struct dvb_frontend *fe = fe0->dvb.frontend; | |
5823b3a6 HH |
1132 | u8 dev_id = dev->eedata[2]; |
1133 | u8 data = 0xc4; | |
1134 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1135 | ||
363c35fc | 1136 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, |
d557dab5 | 1137 | 0x60, &dev->i2c_adap, 0) == NULL) { |
4b1431ca | 1138 | wprintk("%s: Medion Quadro, no tda826x " |
5823b3a6 | 1139 | "found !\n", __func__); |
d557dab5 MCC |
1140 | goto dettach_frontend; |
1141 | } | |
5823b3a6 HH |
1142 | if (dev_id != 0x08) { |
1143 | /* we need to open the i2c gate (we know it exists) */ | |
1144 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1145 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1146 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 HH |
1147 | wprintk("%s: Medion Quadro, no ISL6405 " |
1148 | "found !\n", __func__); | |
d557dab5 MCC |
1149 | goto dettach_frontend; |
1150 | } | |
e9c1ac9d HH |
1151 | if (dev_id == 0x07) { |
1152 | /* fire up the 2nd section of the LNB supply since | |
1153 | we can't do this from the other section */ | |
1154 | msg.buf = &data; | |
1155 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1156 | } | |
5823b3a6 HH |
1157 | fe->ops.i2c_gate_ctrl(fe, 0); |
1158 | dev->original_set_voltage = fe->ops.set_voltage; | |
1159 | fe->ops.set_voltage = md8800_set_voltage; | |
1160 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1161 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1162 | } else { | |
1163 | fe->ops.set_voltage = md8800_set_voltage2; | |
1164 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1165 | } | |
4b1431ca HH |
1166 | } |
1167 | } | |
5eda227f | 1168 | break; |
3b64e8e2 | 1169 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
363c35fc | 1170 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
f7b54b10 | 1171 | &dev->i2c_adap); |
363c35fc ST |
1172 | if (fe0->dvb.frontend) |
1173 | dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61, | |
47a9991e | 1174 | NULL, DVB_PLL_TDHU2); |
3b64e8e2 | 1175 | break; |
f689d908 | 1176 | case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI: |
3e1410ad | 1177 | case SAA7134_BOARD_KWORLD_ATSC110: |
363c35fc | 1178 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
f7b54b10 | 1179 | &dev->i2c_adap); |
363c35fc ST |
1180 | if (fe0->dvb.frontend) |
1181 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
62ff817a MK |
1182 | &dev->i2c_adap, 0x61, |
1183 | TUNER_PHILIPS_TUV1236D); | |
3e1410ad | 1184 | break; |
e2ac28fa | 1185 | case SAA7134_BOARD_FLYDVBS_LR300: |
363c35fc | 1186 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
f7b54b10 | 1187 | &dev->i2c_adap); |
363c35fc ST |
1188 | if (fe0->dvb.frontend) { |
1189 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
f7b54b10 | 1190 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1191 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 | 1192 | goto dettach_frontend; |
e2ac28fa | 1193 | } |
363c35fc | 1194 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
f7b54b10 | 1195 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 | 1196 | wprintk("%s: No ISL6421 found!\n", __func__); |
d557dab5 | 1197 | goto dettach_frontend; |
e2ac28fa IL |
1198 | } |
1199 | } | |
1200 | break; | |
cf146ca4 | 1201 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
363c35fc | 1202 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
0e8f4cc5 MS |
1203 | &medion_cardbus, |
1204 | &dev->i2c_adap); | |
363c35fc ST |
1205 | if (fe0->dvb.frontend) { |
1206 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1207 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 | 1208 | |
363c35fc | 1209 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, |
cb89cd33 MK |
1210 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1211 | TUNER_PHILIPS_FMD1216ME_MK3); | |
cf146ca4 HH |
1212 | } |
1213 | break; | |
cbb94521 | 1214 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
363c35fc | 1215 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
cbb94521 HH |
1216 | &philips_europa_config, |
1217 | &dev->i2c_adap); | |
363c35fc ST |
1218 | if (fe0->dvb.frontend) { |
1219 | fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1220 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
cbb94521 HH |
1221 | } |
1222 | break; | |
550a9a5e | 1223 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
d557dab5 MCC |
1224 | if (configure_tda827x_fe(dev, &cinergy_ht_config, |
1225 | &tda827x_cfg_0) < 0) | |
1226 | goto dettach_frontend; | |
9de271e6 MK |
1227 | break; |
1228 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
d557dab5 MCC |
1229 | if (configure_tda827x_fe(dev, &cinergy_ht_pci_config, |
1230 | &tda827x_cfg_0) < 0) | |
1231 | goto dettach_frontend; | |
58ef4f92 HH |
1232 | break; |
1233 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
d557dab5 MCC |
1234 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1235 | &tda827x_cfg_2) < 0) | |
1236 | goto dettach_frontend; | |
550a9a5e | 1237 | break; |
e06cea4c | 1238 | case SAA7134_BOARD_ASUS_P7131_4871: |
d557dab5 MCC |
1239 | if (configure_tda827x_fe(dev, &asus_p7131_4871_config, |
1240 | &tda827x_cfg_2) < 0) | |
1241 | goto dettach_frontend; | |
e06cea4c | 1242 | break; |
f3eec0c0 | 1243 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
d557dab5 MCC |
1244 | if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, |
1245 | &tda827x_cfg_2) < 0) | |
1246 | goto dettach_frontend; | |
e06cea4c | 1247 | break; |
d90d9f5a | 1248 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
d557dab5 MCC |
1249 | if (configure_tda827x_fe(dev, &avermedia_super_007_config, |
1250 | &tda827x_cfg_0) < 0) | |
1251 | goto dettach_frontend; | |
d90d9f5a | 1252 | break; |
4ba24373 | 1253 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
d557dab5 MCC |
1254 | if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, |
1255 | &tda827x_cfg_2_sw42) < 0) | |
1256 | goto dettach_frontend; | |
4ba24373 | 1257 | break; |
6ab465a8 | 1258 | case SAA7134_BOARD_PHILIPS_SNAKE: |
363c35fc | 1259 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
6ab465a8 | 1260 | &dev->i2c_adap); |
363c35fc ST |
1261 | if (fe0->dvb.frontend) { |
1262 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
d557dab5 | 1263 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1264 | wprintk("%s: No tda826x found!\n", __func__); |
d557dab5 MCC |
1265 | goto dettach_frontend; |
1266 | } | |
363c35fc | 1267 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
d557dab5 | 1268 | &dev->i2c_adap, 0, 0) == NULL) { |
5823b3a6 | 1269 | wprintk("%s: No lnbp21 found!\n", __func__); |
d557dab5 MCC |
1270 | goto dettach_frontend; |
1271 | } | |
6ab465a8 HH |
1272 | } |
1273 | break; | |
7b5b3f17 | 1274 | case SAA7134_BOARD_CREATIX_CTX953: |
d557dab5 MCC |
1275 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1276 | &tda827x_cfg_0) < 0) | |
1277 | goto dettach_frontend; | |
7b5b3f17 | 1278 | break; |
6a6179b6 | 1279 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
d557dab5 MCC |
1280 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1281 | &tda827x_cfg_2) < 0) | |
1282 | goto dettach_frontend; | |
6a6179b6 | 1283 | break; |
bc36a686 | 1284 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
6e501a3f TF |
1285 | dprintk("AverMedia E506R dvb setup\n"); |
1286 | saa7134_set_gpio(dev, 25, 0); | |
1287 | msleep(10); | |
1288 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1289 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1290 | &avermedia_xc3028_mt352_dev, |
1291 | &dev->i2c_adap); | |
bc36a686 | 1292 | attach_xc3028 = 1; |
e2fc00c2 | 1293 | break; |
637afdb5 | 1294 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
363c35fc | 1295 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
9a1b04e4 | 1296 | &sd1878_4m, &dev->i2c_adap); |
363c35fc | 1297 | if (fe0->dvb.frontend) { |
637afdb5 | 1298 | struct dvb_frontend *fe; |
363c35fc | 1299 | if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, |
d557dab5 | 1300 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) { |
637afdb5 | 1301 | wprintk("%s: MD7134 DVB-S, no SD1878 " |
5823b3a6 | 1302 | "found !\n", __func__); |
d557dab5 MCC |
1303 | goto dettach_frontend; |
1304 | } | |
637afdb5 | 1305 | /* we need to open the i2c gate (we know it exists) */ |
363c35fc | 1306 | fe = fe0->dvb.frontend; |
637afdb5 HH |
1307 | fe->ops.i2c_gate_ctrl(fe, 1); |
1308 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1309 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
637afdb5 | 1310 | wprintk("%s: MD7134 DVB-S, no ISL6405 " |
5823b3a6 | 1311 | "found !\n", __func__); |
d557dab5 MCC |
1312 | goto dettach_frontend; |
1313 | } | |
637afdb5 HH |
1314 | fe->ops.i2c_gate_ctrl(fe, 0); |
1315 | dev->original_set_voltage = fe->ops.set_voltage; | |
1316 | fe->ops.set_voltage = md8800_set_voltage; | |
1317 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1318 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1319 | } | |
1320 | break; | |
e2fc00c2 MP |
1321 | case SAA7134_BOARD_AVERMEDIA_M103: |
1322 | saa7134_set_gpio(dev, 25, 0); | |
1323 | msleep(10); | |
1324 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1325 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
e2fc00c2 MP |
1326 | &avermedia_xc3028_mt352_dev, |
1327 | &dev->i2c_adap); | |
1328 | attach_xc3028 = 1; | |
1329 | break; | |
301e9d64 | 1330 | case SAA7134_BOARD_ASUSTeK_TIGER_3IN1: |
1331 | if (!use_frontend) { /* terrestrial */ | |
1332 | if (configure_tda827x_fe(dev, &asus_tiger_3in1_config, | |
1333 | &tda827x_cfg_2) < 0) | |
1334 | goto dettach_frontend; | |
1335 | } else { /* satellite */ | |
363c35fc | 1336 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
301e9d64 | 1337 | &flydvbs, &dev->i2c_adap); |
363c35fc | 1338 | if (fe0->dvb.frontend) { |
301e9d64 | 1339 | if (dvb_attach(tda826x_attach, |
363c35fc | 1340 | fe0->dvb.frontend, 0x60, |
301e9d64 | 1341 | &dev->i2c_adap, 0) == NULL) { |
1342 | wprintk("%s: Asus Tiger 3in1, no " | |
1343 | "tda826x found!\n", __func__); | |
1344 | goto dettach_frontend; | |
1345 | } | |
363c35fc | 1346 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
301e9d64 | 1347 | &dev->i2c_adap, 0, 0) == NULL) { |
1348 | wprintk("%s: Asus Tiger 3in1, no lnbp21" | |
1349 | " found!\n", __func__); | |
1350 | goto dettach_frontend; | |
1351 | } | |
1352 | } | |
1353 | } | |
1354 | break; | |
028165a3 HP |
1355 | case SAA7134_BOARD_ASUSTeK_TIGER: |
1356 | if (configure_tda827x_fe(dev, &philips_tiger_config, | |
1357 | &tda827x_cfg_0) < 0) | |
1358 | goto dettach_frontend; | |
1359 | break; | |
1da177e4 | 1360 | default: |
cf3c34c8 | 1361 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1362 | break; |
1363 | } | |
1364 | ||
bc36a686 MCC |
1365 | if (attach_xc3028) { |
1366 | struct dvb_frontend *fe; | |
1367 | struct xc2028_config cfg = { | |
1368 | .i2c_adap = &dev->i2c_adap, | |
1369 | .i2c_addr = 0x61, | |
bc36a686 | 1370 | }; |
95a2fdb6 | 1371 | |
363c35fc | 1372 | if (!fe0->dvb.frontend) |
f3f741e7 | 1373 | goto dettach_frontend; |
95a2fdb6 | 1374 | |
363c35fc | 1375 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
bc36a686 MCC |
1376 | if (!fe) { |
1377 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1378 | dev->name); | |
d557dab5 | 1379 | goto dettach_frontend; |
bc36a686 MCC |
1380 | } |
1381 | } | |
1382 | ||
363c35fc | 1383 | if (NULL == fe0->dvb.frontend) { |
cf3c34c8 | 1384 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
f3f741e7 | 1385 | goto dettach_frontend; |
1da177e4 | 1386 | } |
d7cba043 | 1387 | /* define general-purpose callback pointer */ |
363c35fc | 1388 | fe0->dvb.frontend->callback = saa7134_tuner_callback; |
1da177e4 LT |
1389 | |
1390 | /* register everything else */ | |
363c35fc | 1391 | ret = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
59b1842d | 1392 | &dev->pci->dev, adapter_nr, 0); |
1c4f76ab HH |
1393 | |
1394 | /* this sequence is necessary to make the tda1004x load its firmware | |
1395 | * and to enter analog mode of hybrid boards | |
1396 | */ | |
1397 | if (!ret) { | |
363c35fc ST |
1398 | if (fe0->dvb.frontend->ops.init) |
1399 | fe0->dvb.frontend->ops.init(fe0->dvb.frontend); | |
1400 | if (fe0->dvb.frontend->ops.sleep) | |
1401 | fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend); | |
1402 | if (fe0->dvb.frontend->ops.tuner_ops.sleep) | |
1403 | fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend); | |
1c4f76ab HH |
1404 | } |
1405 | return ret; | |
d557dab5 MCC |
1406 | |
1407 | dettach_frontend: | |
f3f741e7 DB |
1408 | videobuf_dvb_dealloc_frontends(&dev->frontends); |
1409 | return -EINVAL; | |
1da177e4 LT |
1410 | } |
1411 | ||
1412 | static int dvb_fini(struct saa7134_dev *dev) | |
1413 | { | |
363c35fc ST |
1414 | struct videobuf_dvb_frontend *fe0; |
1415 | ||
1416 | /* Get the first frontend */ | |
1417 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
1418 | if (!fe0) | |
1419 | return -EINVAL; | |
1420 | ||
7f171123 MCC |
1421 | /* FIXME: I suspect that this code is bogus, since the entry for |
1422 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1423 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1424 | */ | |
1425 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1426 | struct v4l2_priv_tun_config tda9887_cfg; | |
1427 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1428 | ||
1429 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1430 | tda9887_cfg.priv = &on; | |
1da177e4 | 1431 | |
1da177e4 | 1432 | /* otherwise we don't detect the tuner on next insmod */ |
7f171123 | 1433 | saa7134_i2c_call_clients(dev, TUNER_SET_CONFIG, &tda9887_cfg); |
5823b3a6 | 1434 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
e9c1ac9d | 1435 | if ((dev->eedata[2] == 0x07) && use_frontend) { |
5823b3a6 HH |
1436 | /* turn off the 2nd lnb supply */ |
1437 | u8 data = 0x80; | |
1438 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1439 | struct dvb_frontend *fe; | |
363c35fc | 1440 | fe = fe0->dvb.frontend; |
5823b3a6 HH |
1441 | if (fe->ops.i2c_gate_ctrl) { |
1442 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1443 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1444 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1445 | } | |
1446 | } | |
7f171123 | 1447 | } |
f3f741e7 | 1448 | videobuf_dvb_unregister_bus(&dev->frontends); |
1da177e4 LT |
1449 | return 0; |
1450 | } | |
1451 | ||
1452 | static struct saa7134_mpeg_ops dvb_ops = { | |
1453 | .type = SAA7134_MPEG_DVB, | |
1454 | .init = dvb_init, | |
1455 | .fini = dvb_fini, | |
1456 | }; | |
1457 | ||
1458 | static int __init dvb_register(void) | |
1459 | { | |
1460 | return saa7134_ts_register(&dvb_ops); | |
1461 | } | |
1462 | ||
1463 | static void __exit dvb_unregister(void) | |
1464 | { | |
1465 | saa7134_ts_unregister(&dvb_ops); | |
1466 | } | |
1467 | ||
1468 | module_init(dvb_register); | |
1469 | module_exit(dvb_unregister); | |
1470 | ||
1471 | /* ------------------------------------------------------------------ */ | |
1472 | /* | |
1473 | * Local variables: | |
1474 | * c-basic-offset: 8 | |
1475 | * End: | |
1476 | */ |