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[media] saa7164: make buffer smaller
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443c1228
ST
1/*
2 * Driver for the NXP SAA7164 PCIe bridge
3 *
9b8b0199 4 * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com>
443c1228
ST
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/list.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/kmod.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/interrupt.h>
30#include <linux/delay.h>
31#include <asm/div64.h>
32
e48836b8
ST
33#ifdef CONFIG_PROC_FS
34#include <linux/proc_fs.h>
35#endif
443c1228
ST
36#include "saa7164.h"
37
38MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
9d119c33 39MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
443c1228
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40MODULE_LICENSE("GPL");
41
42/*
43 1 Basic
44 2
45 4 i2c
46 8 api
47 16 cmd
48 32 bus
49 */
50
b1912a85
IM
51unsigned int saa_debug;
52module_param_named(debug, saa_debug, int, 0644);
443c1228
ST
53MODULE_PARM_DESC(debug, "enable debug messages");
54
841fec00 55unsigned int fw_debug;
e48836b8
ST
56module_param(fw_debug, int, 0644);
57MODULE_PARM_DESC(fw_debug, "Firware debug level def:2");
58
66e1d378
ST
59unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
60module_param(encoder_buffers, int, 0644);
61MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
62
e8ce2f21
ST
63unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
64module_param(vbi_buffers, int, 0644);
65MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
66
bbf504c3 67unsigned int waitsecs = 10;
dd1ee444 68module_param(waitsecs, int, 0644);
66e1d378 69MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
dd1ee444 70
443c1228
ST
71static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
72module_param_array(card, int, NULL, 0444);
73MODULE_PARM_DESC(card, "card type");
74
91d80189
ST
75unsigned int print_histogram = 64;
76module_param(print_histogram, int, 0644);
66e1d378 77MODULE_PARM_DESC(print_histogram, "print histogram values once");
91d80189 78
1b0e8e46
ST
79unsigned int crc_checking = 1;
80module_param(crc_checking, int, 0644);
81MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
82
83unsigned int guard_checking = 1;
84module_param(guard_checking, int, 0644);
85MODULE_PARM_DESC(guard_checking, "enable dma sanity checking for buffer overruns");
86
443c1228
ST
87static unsigned int saa7164_devcount;
88
89static DEFINE_MUTEX(devlist);
90LIST_HEAD(saa7164_devlist);
91
92#define INT_SIZE 16
93
12d3203e
ST
94void saa7164_dumphex16FF(struct saa7164_dev *dev, u8 *buf, int len)
95{
96 int i;
97 u8 tmp[16];
98 memset(&tmp[0], 0xff, sizeof(tmp));
99
100 printk(KERN_INFO "--------------------> "
101 "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
102
103 for (i = 0; i < len; i += 16) {
104 if (memcmp(&tmp, buf + i, sizeof(tmp)) != 0) {
105 printk(KERN_INFO " [0x%08x] "
106 "%02x %02x %02x %02x %02x %02x %02x %02x "
107 "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
108 *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
109 *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
110 *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
111 *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
112 }
113 }
114}
115
a97781ac
ST
116static void saa7164_pack_verifier(struct saa7164_buffer *buf)
117{
118 u8 *p = (u8 *)buf->cpu;
119 int i;
120
121 for (i = 0; i < buf->actual_size; i += 2048) {
122
c7e242ba
MCC
123 if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
124 (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
a97781ac 125 printk(KERN_ERR "No pack at 0x%x\n", i);
1b0e8e46
ST
126// saa7164_dumphex16FF(buf->port->dev, (p + i), 32);
127 }
a97781ac
ST
128 }
129}
130
1b0e8e46
ST
131#define FIXED_VIDEO_PID 0xf1
132#define FIXED_AUDIO_PID 0xf2
133
9230acaa
ST
134static void saa7164_ts_verifier(struct saa7164_buffer *buf)
135{
136 struct saa7164_port *port = buf->port;
9230acaa 137 u32 i;
1b0e8e46
ST
138 u8 cc, a;
139 u16 pid;
140 u8 __iomem *bufcpu = (u8 *)buf->cpu;
9230acaa
ST
141
142 port->sync_errors = 0;
143 port->v_cc_errors = 0;
144 port->a_cc_errors = 0;
145
146 for (i = 0; i < buf->actual_size; i += 188) {
147 if (*(bufcpu + i) != 0x47)
148 port->sync_errors++;
149
1b0e8e46
ST
150 /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
151 pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
9230acaa
ST
152 cc = *(bufcpu + i + 3) & 0x0f;
153
1b0e8e46 154 if (pid == FIXED_VIDEO_PID) {
9230acaa
ST
155 a = ((port->last_v_cc + 1) & 0x0f);
156 if (a != cc) {
1b0e8e46
ST
157 printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
158 port->last_v_cc, cc, i);
9230acaa
ST
159 port->v_cc_errors++;
160 }
161
162 port->last_v_cc = cc;
163 } else
1b0e8e46 164 if (pid == FIXED_AUDIO_PID) {
9230acaa
ST
165 a = ((port->last_a_cc + 1) & 0x0f);
166 if (a != cc) {
1b0e8e46
ST
167 printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
168 port->last_a_cc, cc, i);
9230acaa
ST
169 port->a_cc_errors++;
170 }
171
172 port->last_a_cc = cc;
173 }
174
175 }
176
32299a14
ST
177 /* Only report errors if we've been through this function atleast
178 * once already and the cached cc values are primed. First time through
179 * always generates errors.
180 */
181 if (port->v_cc_errors && (port->done_first_interrupt > 1))
9230acaa
ST
182 printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
183
32299a14 184 if (port->a_cc_errors && (port->done_first_interrupt > 1))
9230acaa
ST
185 printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
186
32299a14 187 if (port->sync_errors && (port->done_first_interrupt > 1))
9230acaa 188 printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
32299a14
ST
189
190 if (port->done_first_interrupt == 1)
191 port->done_first_interrupt++;
9230acaa
ST
192}
193
91d80189 194static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
443c1228 195{
91d80189 196 int i;
443c1228 197
91d80189
ST
198 memset(hg, 0, sizeof(struct saa7164_histogram));
199 strcpy(hg->name, name);
200
201 /* First 30ms x 1ms */
202 for (i = 0; i < 30; i++) {
203 hg->counter1[0 + i].val = i;
204 }
205
206 /* 30 - 200ms x 10ms */
207 for (i = 0; i < 18; i++) {
208 hg->counter1[30 + i].val = 30 + (i * 10);
209 }
210
211 /* 200 - 2000ms x 100ms */
212 for (i = 0; i < 15; i++) {
58acca10 213 hg->counter1[48 + i].val = 200 + (i * 200);
91d80189
ST
214 }
215
58acca10
ST
216 /* Catch all massive value (2secs) */
217 hg->counter1[55].val = 2000;
218
219 /* Catch all massive value (4secs) */
220 hg->counter1[56].val = 4000;
221
222 /* Catch all massive value (8secs) */
223 hg->counter1[57].val = 8000;
224
225 /* Catch all massive value (15secs) */
226 hg->counter1[58].val = 15000;
227
228 /* Catch all massive value (30secs) */
229 hg->counter1[59].val = 30000;
230
231 /* Catch all massive value (60secs) */
232 hg->counter1[60].val = 60000;
233
234 /* Catch all massive value (5mins) */
235 hg->counter1[61].val = 300000;
236
237 /* Catch all massive value (15mins) */
238 hg->counter1[62].val = 900000;
239
240 /* Catch all massive values (1hr) */
91d80189 241 hg->counter1[63].val = 3600000;
443c1228
ST
242}
243
58acca10 244void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
443c1228 245{
91d80189 246 int i;
c7e242ba 247 for (i = 0; i < 64; i++) {
91d80189
ST
248 if (val <= hg->counter1[i].val) {
249 hg->counter1[i].count++;
250 hg->counter1[i].update_time = jiffies;
251 break;
252 }
253 }
254}
443c1228 255
91d80189
ST
256static void saa7164_histogram_print(struct saa7164_port *port,
257 struct saa7164_histogram *hg)
258{
91d80189
ST
259 u32 entries = 0;
260 int i;
261
58acca10 262 printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
c7e242ba 263 for (i = 0; i < 64; i++) {
91d80189
ST
264 if (hg->counter1[i].count == 0)
265 continue;
443c1228 266
91d80189
ST
267 printk(KERN_ERR " %4d %12d %Ld\n",
268 hg->counter1[i].val,
269 hg->counter1[i].count,
270 hg->counter1[i].update_time);
271
272 entries++;
273 }
274 printk(KERN_ERR "Total: %d\n", entries);
443c1228
ST
275}
276
cfbaf337 277static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
7615e434
ST
278{
279 struct saa7164_dev *dev = port->dev;
cfbaf337
ST
280 struct saa7164_buffer *buf = 0;
281 struct saa7164_user_buffer *ubuf = 0;
7615e434 282 struct list_head *c, *n;
cfbaf337 283 int i = 0;
1b0e8e46 284 u8 __iomem *p;
91d80189
ST
285
286 mutex_lock(&port->dmaqueue_lock);
7615e434 287 list_for_each_safe(c, n, &port->dmaqueue.list) {
91d80189 288
7615e434 289 buf = list_entry(c, struct saa7164_buffer, list);
91d80189
ST
290 if (i++ > port->hwcfg.buffercount) {
291 printk(KERN_ERR "%s() illegal i count %d\n",
292 __func__, i);
293 break;
294 }
7615e434 295
cfbaf337 296 if (buf->idx == bufnr) {
12d3203e 297
7615e434 298 /* Found the buffer, deal with it */
1b0e8e46
ST
299 dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
300
301 if (crc_checking) {
302 /* Throw a new checksum on the dma buffer */
303 buf->crc = crc32(0, buf->cpu, buf->actual_size);
304 }
305
306 if (guard_checking) {
307 p = (u8 *)buf->cpu;
c7e242ba 308 if ((*(p + buf->actual_size + 0) != 0xff) ||
1b0e8e46
ST
309 (*(p + buf->actual_size + 1) != 0xff) ||
310 (*(p + buf->actual_size + 2) != 0xff) ||
311 (*(p + buf->actual_size + 3) != 0xff) ||
312 (*(p + buf->actual_size + 0x10) != 0xff) ||
313 (*(p + buf->actual_size + 0x11) != 0xff) ||
314 (*(p + buf->actual_size + 0x12) != 0xff) ||
c7e242ba 315 (*(p + buf->actual_size + 0x13) != 0xff)) {
1b0e8e46
ST
316 printk(KERN_ERR "%s() buf %p guard buffer breach\n",
317 __func__, buf);
318// saa7164_dumphex16FF(dev, (p + buf->actual_size) - 32 , 64);
319 }
320 }
7615e434 321
1107237e
ST
322 if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
323 /* Validate the incoming buffer content */
324 if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
325 saa7164_ts_verifier(buf);
326 else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
327 saa7164_pack_verifier(buf);
328 }
9230acaa 329
7615e434
ST
330 /* find a free user buffer and clone to it */
331 if (!list_empty(&port->list_buf_free.list)) {
332
333 /* Pull the first buffer from the used list */
334 ubuf = list_first_entry(&port->list_buf_free.list,
335 struct saa7164_user_buffer, list);
336
a97781ac
ST
337 if (buf->actual_size <= ubuf->actual_size) {
338
cfbaf337 339 memcpy_fromio(ubuf->data, buf->cpu,
f6eeece8 340 ubuf->actual_size);
12d3203e 341
1b0e8e46
ST
342 if (crc_checking) {
343 /* Throw a new checksum on the read buffer */
344 ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
345 }
12d3203e 346
a97781ac
ST
347 /* Requeue the buffer on the free list */
348 ubuf->pos = 0;
7615e434 349
a97781ac
ST
350 list_move_tail(&ubuf->list,
351 &port->list_buf_used.list);
7615e434 352
a97781ac
ST
353 /* Flag any userland waiters */
354 wake_up_interruptible(&port->wait_read);
7615e434 355
a97781ac
ST
356 } else {
357 printk(KERN_ERR "buf %p bufsize fails match\n", buf);
358 }
7615e434
ST
359
360 } else
66e1d378 361 printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
7615e434 362
9230acaa 363 /* Ensure offset into buffer remains 0, fill buffer
a97781ac
ST
364 * with known bad data. We check for this data at a later point
365 * in time. */
cfbaf337 366 saa7164_buffer_zero_offsets(port, bufnr);
12d3203e 367 memset_io(buf->cpu, 0xff, buf->pci_size);
1b0e8e46
ST
368 if (crc_checking) {
369 /* Throw yet aanother new checksum on the dma buffer */
370 buf->crc = crc32(0, buf->cpu, buf->actual_size);
371 }
12d3203e 372
a97781ac 373 break;
cfbaf337
ST
374 }
375 }
376 mutex_unlock(&port->dmaqueue_lock);
377}
378
379static void saa7164_work_enchandler(struct work_struct *w)
380{
381 struct saa7164_port *port =
382 container_of(w, struct saa7164_port, workenc);
383 struct saa7164_dev *dev = port->dev;
384
385 u32 wp, mcb, rp, cnt = 0;
386
387 port->last_svc_msecs_diff = port->last_svc_msecs;
388 port->last_svc_msecs = jiffies_to_msecs(jiffies);
389
390 port->last_svc_msecs_diff = port->last_svc_msecs -
391 port->last_svc_msecs_diff;
392
393 saa7164_histogram_update(&port->svc_interval,
394 port->last_svc_msecs_diff);
395
396 port->last_irq_svc_msecs_diff = port->last_svc_msecs -
397 port->last_irq_msecs;
398
399 saa7164_histogram_update(&port->irq_svc_interval,
400 port->last_irq_svc_msecs_diff);
9230acaa 401
cfbaf337
ST
402 dprintk(DBGLVL_IRQ,
403 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
404 __func__,
405 port->last_svc_msecs_diff,
406 port->last_irq_svc_msecs_diff,
407 port->last_svc_wp,
408 port->last_svc_rp
409 );
410
411 /* Current write position */
412 wp = saa7164_readl(port->bufcounter);
413 if (wp > (port->hwcfg.buffercount - 1)) {
414 printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
415 return;
416 }
417
418 /* Most current complete buffer */
419 if (wp == 0)
1b0e8e46 420 mcb = (port->hwcfg.buffercount - 1);
cfbaf337
ST
421 else
422 mcb = wp - 1;
423
424 while (1) {
1b0e8e46
ST
425 if (port->done_first_interrupt == 0) {
426 port->done_first_interrupt++;
427 rp = mcb;
428 } else
429 rp = (port->last_svc_rp + 1) % 8;
cfbaf337 430
1b0e8e46 431 if ((rp < 0) || (rp > (port->hwcfg.buffercount - 1))) {
cfbaf337
ST
432 printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
433 break;
7615e434 434 }
1b0e8e46 435
cfbaf337
ST
436 saa7164_work_enchandler_helper(port, rp);
437 port->last_svc_rp = rp;
438 cnt++;
439
440 if (rp == mcb)
441 break;
7615e434 442 }
cfbaf337 443
1b0e8e46 444 /* TODO: Convert this into a /proc/saa7164 style readable file */
91d80189
ST
445 if (print_histogram == port->nr) {
446 saa7164_histogram_print(port, &port->irq_interval);
447 saa7164_histogram_print(port, &port->svc_interval);
448 saa7164_histogram_print(port, &port->irq_svc_interval);
58acca10
ST
449 saa7164_histogram_print(port, &port->read_interval);
450 saa7164_histogram_print(port, &port->poll_interval);
7c161822 451 /* TODO: fix this to preserve any previous state */
91d80189
ST
452 print_histogram = 64 + port->nr;
453 }
454}
cfbaf337 455
e8ce2f21
ST
456static void saa7164_work_vbihandler(struct work_struct *w)
457{
458 struct saa7164_port *port =
459 container_of(w, struct saa7164_port, workenc);
460 struct saa7164_dev *dev = port->dev;
461
462 u32 wp, mcb, rp, cnt = 0;
463
464 port->last_svc_msecs_diff = port->last_svc_msecs;
465 port->last_svc_msecs = jiffies_to_msecs(jiffies);
466 port->last_svc_msecs_diff = port->last_svc_msecs -
467 port->last_svc_msecs_diff;
468
469 saa7164_histogram_update(&port->svc_interval,
470 port->last_svc_msecs_diff);
471
472 port->last_irq_svc_msecs_diff = port->last_svc_msecs -
473 port->last_irq_msecs;
474
475 saa7164_histogram_update(&port->irq_svc_interval,
476 port->last_irq_svc_msecs_diff);
477
478 dprintk(DBGLVL_IRQ,
479 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
480 __func__,
481 port->last_svc_msecs_diff,
482 port->last_irq_svc_msecs_diff,
483 port->last_svc_wp,
484 port->last_svc_rp
485 );
486
487 /* Current write position */
488 wp = saa7164_readl(port->bufcounter);
489 if (wp > (port->hwcfg.buffercount - 1)) {
490 printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
491 return;
492 }
493
494 /* Most current complete buffer */
495 if (wp == 0)
496 mcb = (port->hwcfg.buffercount - 1);
497 else
498 mcb = wp - 1;
1107237e
ST
499
500 while (1) {
501 if (port->done_first_interrupt == 0) {
502 port->done_first_interrupt++;
503 rp = mcb;
504 } else
505 rp = (port->last_svc_rp + 1) % 8;
506
507 if ((rp < 0) || (rp > (port->hwcfg.buffercount - 1))) {
508 printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
509 break;
510 }
511
512 saa7164_work_enchandler_helper(port, rp);
513 port->last_svc_rp = rp;
514 cnt++;
515
516 if (rp == mcb)
517 break;
518 }
519
e8ce2f21
ST
520 /* TODO: Convert this into a /proc/saa7164 style readable file */
521 if (print_histogram == port->nr) {
522 saa7164_histogram_print(port, &port->irq_interval);
523 saa7164_histogram_print(port, &port->svc_interval);
524 saa7164_histogram_print(port, &port->irq_svc_interval);
525 saa7164_histogram_print(port, &port->read_interval);
526 saa7164_histogram_print(port, &port->poll_interval);
527 /* TODO: fix this to preserve any previous state */
528 print_histogram = 64 + port->nr;
529 }
530}
531
91d80189
ST
532static void saa7164_work_cmdhandler(struct work_struct *w)
533{
534 struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
535
536 /* Wake up any complete commands */
537 saa7164_irq_dequeue(dev);
538}
539
540static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
541{
542 struct saa7164_port *port = buf->port;
543
544 /* Feed the transport payload into the kernel demux */
545 dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
546 SAA7164_TS_NUMBER_OF_LINES);
547
548}
549
e8ce2f21
ST
550static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
551{
552 struct saa7164_dev *dev = port->dev;
553
554 /* Store old time */
555 port->last_irq_msecs_diff = port->last_irq_msecs;
556
557 /* Collect new stats */
558 port->last_irq_msecs = jiffies_to_msecs(jiffies);
559
560 /* Calculate stats */
561 port->last_irq_msecs_diff = port->last_irq_msecs -
562 port->last_irq_msecs_diff;
563
564 saa7164_histogram_update(&port->irq_interval,
565 port->last_irq_msecs_diff);
566
567 dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
568 port->last_irq_msecs_diff);
569
570 /* Tis calls the vbi irq handler */
571 schedule_work(&port->workenc);
572 return 0;
573}
574
91d80189
ST
575static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
576{
577 struct saa7164_dev *dev = port->dev;
07603131
ST
578
579 /* Store old time */
91d80189
ST
580 port->last_irq_msecs_diff = port->last_irq_msecs;
581
582 /* Collect new stats */
583 port->last_irq_msecs = jiffies_to_msecs(jiffies);
91d80189
ST
584
585 /* Calculate stats */
586 port->last_irq_msecs_diff = port->last_irq_msecs -
587 port->last_irq_msecs_diff;
588
589 saa7164_histogram_update(&port->irq_interval,
590 port->last_irq_msecs_diff);
591
cfbaf337
ST
592 dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
593 port->last_irq_msecs_diff);
12d3203e 594
91d80189 595 schedule_work(&port->workenc);
7615e434
ST
596 return 0;
597}
598
add3f580 599static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
443c1228
ST
600{
601 struct saa7164_dev *dev = port->dev;
602 struct saa7164_buffer *buf;
603 struct list_head *c, *n;
604 int wp, i = 0, rp;
605
606 /* Find the current write point from the hardware */
607 wp = saa7164_readl(port->bufcounter);
608 if (wp > (port->hwcfg.buffercount - 1))
609 BUG();
610
611 /* Find the previous buffer to the current write point */
612 if (wp == 0)
1b0e8e46 613 rp = (port->hwcfg.buffercount - 1);
443c1228
ST
614 else
615 rp = wp - 1;
616
617 /* Lookup the WP in the buffer list */
618 /* TODO: turn this into a worker thread */
619 list_for_each_safe(c, n, &port->dmaqueue.list) {
620 buf = list_entry(c, struct saa7164_buffer, list);
621 if (i++ > port->hwcfg.buffercount)
622 BUG();
623
add3f580 624 if (buf->idx == rp) {
443c1228
ST
625 /* Found the buffer, deal with it */
626 dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
627 __func__, wp, rp);
628 saa7164_buffer_deliver(buf);
629 break;
630 }
631
632 }
633 return 0;
634}
635
636/* Primary IRQ handler and dispatch mechanism */
637static irqreturn_t saa7164_irq(int irq, void *dev_id)
638{
639 struct saa7164_dev *dev = dev_id;
c7e242ba
MCC
640 struct saa7164_port *porta = &dev->ports[SAA7164_PORT_TS1];
641 struct saa7164_port *portb = &dev->ports[SAA7164_PORT_TS2];
642 struct saa7164_port *portc = &dev->ports[SAA7164_PORT_ENC1];
643 struct saa7164_port *portd = &dev->ports[SAA7164_PORT_ENC2];
644 struct saa7164_port *porte = &dev->ports[SAA7164_PORT_VBI1];
645 struct saa7164_port *portf = &dev->ports[SAA7164_PORT_VBI2];
7615e434 646
50bcb4ae 647 u32 intid, intstat[INT_SIZE/4];
443c1228
ST
648 int i, handled = 0, bit;
649
d888ea03
ST
650 if (dev == 0) {
651 printk(KERN_ERR "%s() No device specified\n", __func__);
652 handled = 0;
653 goto out;
654 }
655
443c1228
ST
656 /* Check that the hardware is accessable. If the status bytes are
657 * 0xFF then the device is not accessable, the the IRQ belongs
658 * to another driver.
1a6450d4 659 * 4 x u32 interrupt registers.
443c1228
ST
660 */
661 for (i = 0; i < INT_SIZE/4; i++) {
662
663 /* TODO: Convert into saa7164_readl() */
664 /* Read the 4 hardware interrupt registers */
1a6450d4 665 intstat[i] = saa7164_readl(dev->int_status + (i * 4));
443c1228 666
50bcb4ae
ST
667 if (intstat[i])
668 handled = 1;
443c1228 669 }
50bcb4ae 670 if (handled == 0)
443c1228 671 goto out;
443c1228
ST
672
673 /* For each of the HW interrupt registers */
674 for (i = 0; i < INT_SIZE/4; i++) {
675
676 if (intstat[i]) {
677 /* Each function of the board has it's own interruptid.
678 * Find the function that triggered then call
679 * it's handler.
680 */
681 for (bit = 0; bit < 32; bit++) {
682
683 if (((intstat[i] >> bit) & 0x00000001) == 0)
684 continue;
685
686 /* Calculate the interrupt id (0x00 to 0x7f) */
687
50bcb4ae
ST
688 intid = (i * 32) + bit;
689 if (intid == dev->intfdesc.bInterruptId) {
443c1228
ST
690 /* A response to an cmd/api call */
691 schedule_work(&dev->workcmd);
7615e434 692 } else if (intid == porta->hwcfg.interruptid) {
443c1228
ST
693
694 /* Transport path 1 */
7615e434 695 saa7164_irq_ts(porta);
443c1228 696
7615e434 697 } else if (intid == portb->hwcfg.interruptid) {
443c1228
ST
698
699 /* Transport path 2 */
7615e434
ST
700 saa7164_irq_ts(portb);
701
702 } else if (intid == portc->hwcfg.interruptid) {
703
704 /* Encoder path 1 */
705 saa7164_irq_encoder(portc);
706
707 } else if (intid == portd->hwcfg.interruptid) {
708
e8ce2f21 709 /* Encoder path 2 */
7615e434 710 saa7164_irq_encoder(portd);
443c1228 711
e8ce2f21
ST
712 } else if (intid == porte->hwcfg.interruptid) {
713
714 /* VBI path 1 */
715 saa7164_irq_vbi(porte);
716
717 } else if (intid == portf->hwcfg.interruptid) {
718
719 /* VBI path 2 */
720 saa7164_irq_vbi(portf);
721
443c1228
ST
722 } else {
723 /* Find the function */
724 dprintk(DBGLVL_IRQ,
725 "%s() unhandled interrupt "
726 "reg 0x%x bit 0x%x "
727 "intid = 0x%x\n",
50bcb4ae 728 __func__, i, bit, intid);
443c1228
ST
729 }
730 }
731
443c1228 732 /* Ack it */
1a6450d4 733 saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
443c1228
ST
734
735 }
736 }
737out:
738 return IRQ_RETVAL(handled);
739}
740
741void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
742{
743 struct saa7164_fw_status *s = &dev->fw_status;
744
745 dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
746 dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
747 dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
748 dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
749 dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
750 dev->fw_status.remainheap =
751 saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
752
753 dprintk(1, "Firmware status:\n");
754 dprintk(1, " .status = 0x%08x\n", s->status);
755 dprintk(1, " .mode = 0x%08x\n", s->mode);
756 dprintk(1, " .spec = 0x%08x\n", s->spec);
757 dprintk(1, " .inst = 0x%08x\n", s->inst);
758 dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
759 dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
760}
761
762u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
763{
764 u32 reg;
765
766 reg = saa7164_readl(SAA_DEVICE_VERSION);
767 dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
768 (reg & 0x0000fc00) >> 10,
769 (reg & 0x000003e0) >> 5,
770 (reg & 0x0000001f),
771 (reg & 0xffff0000) >> 16,
772 reg);
773
774 return reg;
775}
776
777/* TODO: Debugging func, remove */
778void saa7164_dumphex16(struct saa7164_dev *dev, u8 *buf, int len)
779{
780 int i;
781
782 printk(KERN_INFO "--------------------> "
783 "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
784
785 for (i = 0; i < len; i += 16)
786 printk(KERN_INFO " [0x%08x] "
787 "%02x %02x %02x %02x %02x %02x %02x %02x "
788 "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
789 *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
790 *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
791 *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
792 *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
793}
794
795/* TODO: Debugging func, remove */
796void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
797{
798 int i;
799
800 dprintk(1, "--------------------> "
801 "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
802
803 for (i = 0; i < 0x100; i += 16)
804 dprintk(1, "region0[0x%08x] = "
805 "%02x %02x %02x %02x %02x %02x %02x %02x"
806 " %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
807 (u8)saa7164_readb(addr + i + 0),
808 (u8)saa7164_readb(addr + i + 1),
809 (u8)saa7164_readb(addr + i + 2),
810 (u8)saa7164_readb(addr + i + 3),
811 (u8)saa7164_readb(addr + i + 4),
812 (u8)saa7164_readb(addr + i + 5),
813 (u8)saa7164_readb(addr + i + 6),
814 (u8)saa7164_readb(addr + i + 7),
815 (u8)saa7164_readb(addr + i + 8),
816 (u8)saa7164_readb(addr + i + 9),
817 (u8)saa7164_readb(addr + i + 10),
818 (u8)saa7164_readb(addr + i + 11),
819 (u8)saa7164_readb(addr + i + 12),
820 (u8)saa7164_readb(addr + i + 13),
821 (u8)saa7164_readb(addr + i + 14),
822 (u8)saa7164_readb(addr + i + 15)
823 );
824}
825
826static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
827{
4d270cfb
MCC
828 dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
829 &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
443c1228
ST
830
831 dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
832 dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
833 dprintk(1, " .bDescriptorSubtype = 0x%x\n",
834 dev->hwdesc.bDescriptorSubtype);
835
836 dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
837 dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
838 dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
839 dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
840 dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
841 dev->hwdesc.dwDeviceRegistersLocation);
842
843 dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
844 dev->hwdesc.dwHostMemoryRegion);
845
846 dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
847 dev->hwdesc.dwHostMemoryRegionSize);
848
849 dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
850 dev->hwdesc.dwHostHibernatMemRegion);
851
852 dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
853 dev->hwdesc.dwHostHibernatMemRegionSize);
854}
855
856static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
857{
858 dprintk(1, "@0x%p intfdesc "
4d270cfb
MCC
859 "sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
860 &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
443c1228
ST
861
862 dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
863 dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
864 dprintk(1, " .bDescriptorSubtype = 0x%x\n",
865 dev->intfdesc.bDescriptorSubtype);
866
867 dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
868 dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
869 dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
870 dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
871 dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
872 dprintk(1, " .bDebugInterruptId = 0x%x\n",
873 dev->intfdesc.bDebugInterruptId);
874
875 dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
876}
877
878static void saa7164_dump_busdesc(struct saa7164_dev *dev)
879{
4d270cfb
MCC
880 dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
881 &dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
443c1228
ST
882
883 dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
884 dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
885 dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
886 dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
887 dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
888 dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
889}
890
891/* Much of the hardware configuration and PCI registers are configured
892 * dynamically depending on firmware. We have to cache some initial
893 * structures then use these to locate other important structures
894 * from PCI space.
895 */
896static void saa7164_get_descriptors(struct saa7164_dev *dev)
897{
4d270cfb
MCC
898 memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
899 memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
900 sizeof(struct tmComResInterfaceDescr));
12d3203e 901 memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
4d270cfb 902 sizeof(struct tmComResBusDescr));
443c1228 903
4d270cfb
MCC
904 if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
905 printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
207b42c4 906 printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
4d270cfb 907 (u32)sizeof(struct tmComResHWDescr));
443c1228
ST
908 } else
909 saa7164_dump_hwdesc(dev);
910
4d270cfb
MCC
911 if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
912 printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
207b42c4 913 printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
4d270cfb 914 (u32)sizeof(struct tmComResInterfaceDescr));
443c1228
ST
915 } else
916 saa7164_dump_intfdesc(dev);
917
918 saa7164_dump_busdesc(dev);
919}
920
921static int saa7164_pci_quirks(struct saa7164_dev *dev)
922{
923 return 0;
924}
925
926static int get_resources(struct saa7164_dev *dev)
927{
928 if (request_mem_region(pci_resource_start(dev->pci, 0),
929 pci_resource_len(dev->pci, 0), dev->name)) {
930
931 if (request_mem_region(pci_resource_start(dev->pci, 2),
932 pci_resource_len(dev->pci, 2), dev->name))
933 return 0;
934 }
935
936 printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
937 dev->name,
938 (u64)pci_resource_start(dev->pci, 0),
939 (u64)pci_resource_start(dev->pci, 2));
940
941 return -EBUSY;
942}
943
7615e434
ST
944static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
945{
946 struct saa7164_port *port = 0;
947
948 if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
949 BUG();
950
c7e242ba 951 port = &dev->ports[portnr];
7615e434
ST
952
953 port->dev = dev;
954 port->nr = portnr;
955
956 if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
957 port->type = SAA7164_MPEG_DVB;
958 else
e8ce2f21 959 if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
7615e434 960 port->type = SAA7164_MPEG_ENCODER;
e8ce2f21
ST
961
962 /* We need a deferred interrupt handler for cmd handling */
963 INIT_WORK(&port->workenc, saa7164_work_enchandler);
964 }
7615e434 965 else
e8ce2f21
ST
966 if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
967 port->type = SAA7164_MPEG_VBI;
968
969 /* We need a deferred interrupt handler for cmd handling */
970 INIT_WORK(&port->workenc, saa7164_work_vbihandler);
971 } else
7615e434
ST
972 BUG();
973
974 /* Init all the critical resources */
975 mutex_init(&port->dvb.lock);
976 INIT_LIST_HEAD(&port->dmaqueue.list);
977 mutex_init(&port->dmaqueue_lock);
978
979 INIT_LIST_HEAD(&port->list_buf_used.list);
980 INIT_LIST_HEAD(&port->list_buf_free.list);
981 init_waitqueue_head(&port->wait_read);
91d80189 982
91d80189
ST
983
984 saa7164_histogram_reset(&port->irq_interval, "irq intervals");
985 saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
986 saa7164_histogram_reset(&port->irq_svc_interval,
987 "irq to deferred intervals");
58acca10 988 saa7164_histogram_reset(&port->read_interval,
e8ce2f21 989 "encoder/vbi read() intervals");
58acca10 990 saa7164_histogram_reset(&port->poll_interval,
e8ce2f21 991 "encoder/vbi poll() intervals");
91d80189 992
7615e434
ST
993 return 0;
994}
995
443c1228
ST
996static int saa7164_dev_setup(struct saa7164_dev *dev)
997{
998 int i;
999
1000 mutex_init(&dev->lock);
1001 atomic_inc(&dev->refcount);
1002 dev->nr = saa7164_devcount++;
1003
0e72cc8b 1004 snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
443c1228
ST
1005
1006 mutex_lock(&devlist);
1007 list_add_tail(&dev->devlist, &saa7164_devlist);
1008 mutex_unlock(&devlist);
1009
1010 /* board config */
1011 dev->board = UNSET;
1012 if (card[dev->nr] < saa7164_bcount)
1013 dev->board = card[dev->nr];
1014
1015 for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
1016 if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
1017 dev->pci->subsystem_device ==
1018 saa7164_subids[i].subdevice)
1019 dev->board = saa7164_subids[i].card;
1020
1021 if (UNSET == dev->board) {
1022 dev->board = SAA7164_BOARD_UNKNOWN;
1023 saa7164_card_list(dev);
1024 }
1025
1026 dev->pci_bus = dev->pci->bus->number;
1027 dev->pci_slot = PCI_SLOT(dev->pci->devfn);
1028
1029 /* I2C Defaults / setup */
1030 dev->i2c_bus[0].dev = dev;
1031 dev->i2c_bus[0].nr = 0;
1032 dev->i2c_bus[1].dev = dev;
1033 dev->i2c_bus[1].nr = 1;
1034 dev->i2c_bus[2].dev = dev;
1035 dev->i2c_bus[2].nr = 2;
1036
7615e434
ST
1037 /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
1038 saa7164_port_init(dev, SAA7164_PORT_TS1);
1039 saa7164_port_init(dev, SAA7164_PORT_TS2);
1040 saa7164_port_init(dev, SAA7164_PORT_ENC1);
1041 saa7164_port_init(dev, SAA7164_PORT_ENC2);
e8ce2f21
ST
1042 saa7164_port_init(dev, SAA7164_PORT_VBI1);
1043 saa7164_port_init(dev, SAA7164_PORT_VBI2);
443c1228
ST
1044
1045 if (get_resources(dev) < 0) {
1046 printk(KERN_ERR "CORE %s No more PCIe resources for "
1047 "subsystem: %04x:%04x\n",
1048 dev->name, dev->pci->subsystem_vendor,
1049 dev->pci->subsystem_device);
1050
1051 saa7164_devcount--;
1052 return -ENODEV;
1053 }
1054
1055 /* PCI/e allocations */
1056 dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
1057 pci_resource_len(dev->pci, 0));
1058
1059 dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
1060 pci_resource_len(dev->pci, 2));
1061
443c1228
ST
1062 dev->bmmio = (u8 __iomem *)dev->lmmio;
1063 dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
443c1228 1064
1a6450d4
ST
1065 /* Inerrupt and ack register locations offset of bmmio */
1066 dev->int_status = 0x183000 + 0xf80;
1067 dev->int_ack = 0x183000 + 0xf90;
443c1228
ST
1068
1069 printk(KERN_INFO
1070 "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
1071 dev->name, dev->pci->subsystem_vendor,
1072 dev->pci->subsystem_device, saa7164_boards[dev->board].name,
1073 dev->board, card[dev->nr] == dev->board ?
1074 "insmod option" : "autodetected");
1075
1076 saa7164_pci_quirks(dev);
1077
1078 return 0;
1079}
1080
1081static void saa7164_dev_unregister(struct saa7164_dev *dev)
1082{
1083 dprintk(1, "%s()\n", __func__);
1084
1085 release_mem_region(pci_resource_start(dev->pci, 0),
1086 pci_resource_len(dev->pci, 0));
1087
1088 release_mem_region(pci_resource_start(dev->pci, 2),
1089 pci_resource_len(dev->pci, 2));
1090
1091 if (!atomic_dec_and_test(&dev->refcount))
1092 return;
1093
1094 iounmap(dev->lmmio);
1095 iounmap(dev->lmmio2);
1096
1097 return;
1098}
1099
e48836b8
ST
1100#ifdef CONFIG_PROC_FS
1101static int saa7164_proc_show(struct seq_file *m, void *v)
1102{
1103 struct saa7164_dev *dev;
4d270cfb 1104 struct tmComResBusInfo *b;
e48836b8
ST
1105 struct list_head *list;
1106 int i, c;
1107
1108 if (saa7164_devcount == 0)
1109 return 0;
1110
1111 list_for_each(list, &saa7164_devlist) {
1112 dev = list_entry(list, struct saa7164_dev, devlist);
1113 seq_printf(m, "%s = %p\n", dev->name, dev);
1114
e48836b8
ST
1115 /* Lock the bus from any other access */
1116 b = &dev->bus;
1117 mutex_lock(&b->lock);
0b62ceb0
ST
1118
1119 seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
1120 b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
1121
1122 seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n",
1123 b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
1124
1125 seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
1126 b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
1127
1128 seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n",
1129 b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
1130 c = 0;
1131 seq_printf(m, "\n Set Ring:\n");
1132 seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1133 for (i = 0; i < b->m_dwSizeSetRing; i++) {
1134 if (c == 0)
1135 seq_printf(m, " %04x:", i);
1136
1137 seq_printf(m, " %02x", *(b->m_pdwSetRing + i));
1138
1139 if (++c == 16) {
1140 seq_printf(m, "\n");
1141 c = 0;
1142 }
1143 }
1144
1145 c = 0;
1146 seq_printf(m, "\n Get Ring:\n");
1147 seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1148 for (i = 0; i < b->m_dwSizeGetRing; i++) {
1149 if (c == 0)
1150 seq_printf(m, " %04x:", i);
1151
1152 seq_printf(m, " %02x", *(b->m_pdwGetRing + i));
1153
1154 if (++c == 16) {
1155 seq_printf(m, "\n");
1156 c = 0;
1157 }
1158 }
1159
e48836b8
ST
1160 mutex_unlock(&b->lock);
1161
1162 }
1163
1164 return 0;
1165}
1166
1167static int saa7164_proc_open(struct inode *inode, struct file *filp)
1168{
1169 return single_open(filp, saa7164_proc_show, NULL);
1170}
1171
1172static struct file_operations saa7164_proc_fops = {
1173 .open = saa7164_proc_open,
1174 .read = seq_read,
1175 .llseek = seq_lseek,
1176 .release = single_release,
1177};
1178
1179static int saa7164_proc_create(void)
1180{
1181 struct proc_dir_entry *pe;
1182
1183 pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops);
1184 if (!pe)
1185 return -ENOMEM;
1186
1187 return 0;
1188}
1189#endif
1190
0b62ceb0
ST
1191static int saa7164_thread_function(void *data)
1192{
1193 struct saa7164_dev *dev = data;
4d270cfb 1194 struct tmFwInfoStruct fwinfo;
1247ff5c 1195 u64 last_poll_time = 0;
0b62ceb0
ST
1196
1197 dprintk(DBGLVL_THR, "thread started\n");
1198
1199 set_freezable();
1200
1201 while (1) {
1202 msleep_interruptible(100);
1203 if (kthread_should_stop())
1204 break;
1205 try_to_freeze();
1206
1207 dprintk(DBGLVL_THR, "thread running\n");
1208
1209 /* Dump the firmware debug message to console */
1247ff5c
ST
1210 /* Polling this costs us 1-2% of the arm CPU */
1211 /* convert this into a respnde to interrupt 0x7a */
0b62ceb0
ST
1212 saa7164_api_collect_debug(dev);
1213
1247ff5c
ST
1214 /* Monitor CPU load every 1 second */
1215 if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
1216 saa7164_api_get_load_info(dev, &fwinfo);
1217 last_poll_time = jiffies_to_msecs(jiffies);
1218 }
1219
0b62ceb0
ST
1220 }
1221
1222 dprintk(DBGLVL_THR, "thread exiting\n");
1223 return 0;
1224}
1225
443c1228
ST
1226static int __devinit saa7164_initdev(struct pci_dev *pci_dev,
1227 const struct pci_device_id *pci_id)
1228{
1229 struct saa7164_dev *dev;
1230 int err, i;
1231 u32 version;
1232
1233 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1234 if (NULL == dev)
1235 return -ENOMEM;
1236
1237 /* pci init */
1238 dev->pci = pci_dev;
1239 if (pci_enable_device(pci_dev)) {
1240 err = -EIO;
1241 goto fail_free;
1242 }
1243
1244 if (saa7164_dev_setup(dev) < 0) {
1245 err = -EINVAL;
1246 goto fail_free;
1247 }
1248
1249 /* print pci info */
1250 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
1251 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1252 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
1253 "latency: %d, mmio: 0x%llx\n", dev->name,
1254 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1255 dev->pci_lat,
1256 (unsigned long long)pci_resource_start(pci_dev, 0));
1257
1258 pci_set_master(pci_dev);
1259 /* TODO */
1260 if (!pci_dma_supported(pci_dev, 0xffffffff)) {
1261 printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
1262 err = -EIO;
1263 goto fail_irq;
1264 }
1265
1266 err = request_irq(pci_dev->irq, saa7164_irq,
1267 IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
1268 if (err < 0) {
1269 printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
1270 pci_dev->irq);
1271 err = -EIO;
1272 goto fail_irq;
1273 }
1274
1275 pci_set_drvdata(pci_dev, dev);
1276
443c1228
ST
1277 /* Init the internal command list */
1278 for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
1279 dev->cmds[i].seqno = i;
1280 dev->cmds[i].inuse = 0;
1281 mutex_init(&dev->cmds[i].lock);
1282 init_waitqueue_head(&dev->cmds[i].wait);
1283 }
1284
1285 /* We need a deferred interrupt handler for cmd handling */
1286 INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
1287
1288 /* Only load the firmware if we know the board */
1289 if (dev->board != SAA7164_BOARD_UNKNOWN) {
1290
1291 err = saa7164_downloadfirmware(dev);
1292 if (err < 0) {
1293 printk(KERN_ERR
50bcb4ae
ST
1294 "Failed to boot firmware, no features "
1295 "registered\n");
1296 goto fail_fw;
443c1228
ST
1297 }
1298
1299 saa7164_get_descriptors(dev);
1300 saa7164_dumpregs(dev, 0);
1301 saa7164_getcurrentfirmwareversion(dev);
1302 saa7164_getfirmwarestatus(dev);
1303 err = saa7164_bus_setup(dev);
1304 if (err < 0)
1305 printk(KERN_ERR
1306 "Failed to setup the bus, will continue\n");
1307 saa7164_bus_dump(dev);
1308
1309 /* Ping the running firmware via the command bus and get the
1310 * firmware version, this checks the bus is running OK.
1311 */
1312 version = 0;
1313 if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
1314 dprintk(1, "Bus is operating correctly using "
1315 "version %d.%d.%d.%d (0x%x)\n",
1316 (version & 0x0000fc00) >> 10,
1317 (version & 0x000003e0) >> 5,
1318 (version & 0x0000001f),
1319 (version & 0xffff0000) >> 16,
1320 version);
1321 else
1322 printk(KERN_ERR
1323 "Failed to communicate with the firmware\n");
1324
1325 /* Bring up the I2C buses */
1326 saa7164_i2c_register(&dev->i2c_bus[0]);
1327 saa7164_i2c_register(&dev->i2c_bus[1]);
1328 saa7164_i2c_register(&dev->i2c_bus[2]);
1329 saa7164_gpio_setup(dev);
1330 saa7164_card_setup(dev);
1331
443c1228
ST
1332 /* Parse the dynamic device configuration, find various
1333 * media endpoints (MPEG, WMV, PS, TS) and cache their
1334 * configuration details into the driver, so we can
1335 * reference them later during simething_register() func,
1336 * interrupt handlers, deferred work handlers etc.
1337 */
1338 saa7164_api_enum_subdevs(dev);
1339
443c1228
ST
1340 /* Begin to create the video sub-systems and register funcs */
1341 if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
c7e242ba 1342 if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
443c1228
ST
1343 printk(KERN_ERR "%s() Failed to register "
1344 "dvb adapters on porta\n",
1345 __func__);
1346 }
1347 }
1348
1349 if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
c7e242ba 1350 if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
443c1228
ST
1351 printk(KERN_ERR"%s() Failed to register "
1352 "dvb adapters on portb\n",
1353 __func__);
1354 }
1355 }
1356
7615e434 1357 if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
c7e242ba 1358 if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
7615e434
ST
1359 printk(KERN_ERR"%s() Failed to register "
1360 "mpeg encoder\n", __func__);
1361 }
1362 }
1363
1364 if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
c7e242ba 1365 if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
7615e434
ST
1366 printk(KERN_ERR"%s() Failed to register "
1367 "mpeg encoder\n", __func__);
1368 }
1369 }
1370
e8ce2f21 1371 if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
c7e242ba 1372 if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
e8ce2f21
ST
1373 printk(KERN_ERR"%s() Failed to register "
1374 "vbi device\n", __func__);
1375 }
1376 }
1377
1378 if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
c7e242ba 1379 if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
e8ce2f21
ST
1380 printk(KERN_ERR"%s() Failed to register "
1381 "vbi device\n", __func__);
1382 }
1383 }
e48836b8 1384 saa7164_api_set_debug(dev, fw_debug);
e8ce2f21 1385
0b62ceb0
ST
1386 if (fw_debug) {
1387 dev->kthread = kthread_run(saa7164_thread_function, dev,
1388 "saa7164 debug");
1389 if (!dev->kthread)
1390 printk(KERN_ERR "%s() Failed to create "
1391 "debug kernel thread\n", __func__);
1392 }
1393
443c1228
ST
1394 } /* != BOARD_UNKNOWN */
1395 else
1396 printk(KERN_ERR "%s() Unsupported board detected, "
1397 "registering without firmware\n", __func__);
1398
b1912a85 1399 dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
2ceae8fd
ST
1400 dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
1401
50bcb4ae 1402fail_fw:
443c1228
ST
1403 return 0;
1404
1405fail_irq:
1406 saa7164_dev_unregister(dev);
1407fail_free:
1408 kfree(dev);
1409 return err;
1410}
1411
1412static void saa7164_shutdown(struct saa7164_dev *dev)
1413{
1414 dprintk(1, "%s()\n", __func__);
1415}
1416
1417static void __devexit saa7164_finidev(struct pci_dev *pci_dev)
1418{
1419 struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
1420
0b62ceb0
ST
1421 if (dev->board != SAA7164_BOARD_UNKNOWN) {
1422 if (fw_debug && dev->kthread) {
1423 kthread_stop(dev->kthread);
1424 dev->kthread = NULL;
1425 }
22760ed3
ST
1426 if (dev->firmwareloaded)
1427 saa7164_api_set_debug(dev, 0x00);
0b62ceb0 1428 }
e48836b8 1429
c7e242ba
MCC
1430 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1431 &dev->ports[SAA7164_PORT_ENC1].irq_interval);
1432 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1433 &dev->ports[SAA7164_PORT_ENC1].svc_interval);
1434 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1435 &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
1436 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1437 &dev->ports[SAA7164_PORT_ENC1].read_interval);
1438 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1439 &dev->ports[SAA7164_PORT_ENC1].poll_interval);
1440 saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
1441 &dev->ports[SAA7164_PORT_VBI1].read_interval);
1442 saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
1443 &dev->ports[SAA7164_PORT_VBI2].poll_interval);
91d80189 1444
443c1228
ST
1445 saa7164_shutdown(dev);
1446
1447 if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
c7e242ba 1448 saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
443c1228
ST
1449
1450 if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
c7e242ba 1451 saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
7615e434
ST
1452
1453 if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
c7e242ba 1454 saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
7615e434
ST
1455
1456 if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
c7e242ba 1457 saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
443c1228 1458
e8ce2f21 1459 if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
c7e242ba 1460 saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
e8ce2f21
ST
1461
1462 if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
c7e242ba 1463 saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
e8ce2f21 1464
443c1228
ST
1465 saa7164_i2c_unregister(&dev->i2c_bus[0]);
1466 saa7164_i2c_unregister(&dev->i2c_bus[1]);
1467 saa7164_i2c_unregister(&dev->i2c_bus[2]);
1468
1469 pci_disable_device(pci_dev);
1470
1471 /* unregister stuff */
1472 free_irq(pci_dev->irq, dev);
1473 pci_set_drvdata(pci_dev, NULL);
1474
1475 mutex_lock(&devlist);
1476 list_del(&dev->devlist);
1477 mutex_unlock(&devlist);
1478
1479 saa7164_dev_unregister(dev);
1480 kfree(dev);
1481}
1482
1483static struct pci_device_id saa7164_pci_tbl[] = {
1484 {
1485 /* SAA7164 */
1486 .vendor = 0x1131,
1487 .device = 0x7164,
1488 .subvendor = PCI_ANY_ID,
1489 .subdevice = PCI_ANY_ID,
1490 }, {
1491 /* --- end of list --- */
1492 }
1493};
1494MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
1495
1496static struct pci_driver saa7164_pci_driver = {
1497 .name = "saa7164",
1498 .id_table = saa7164_pci_tbl,
1499 .probe = saa7164_initdev,
1500 .remove = __devexit_p(saa7164_finidev),
1501 /* TODO */
1502 .suspend = NULL,
1503 .resume = NULL,
1504};
1505
9d440a08 1506static int __init saa7164_init(void)
443c1228
ST
1507{
1508 printk(KERN_INFO "saa7164 driver loaded\n");
e48836b8
ST
1509
1510#ifdef CONFIG_PROC_FS
1511 saa7164_proc_create();
1512#endif
443c1228
ST
1513 return pci_register_driver(&saa7164_pci_driver);
1514}
1515
9d440a08 1516static void __exit saa7164_fini(void)
443c1228 1517{
e48836b8
ST
1518#ifdef CONFIG_PROC_FS
1519 remove_proc_entry("saa7164", NULL);
1520#endif
443c1228
ST
1521 pci_unregister_driver(&saa7164_pci_driver);
1522}
1523
1524module_init(saa7164_init);
1525module_exit(saa7164_fini);
1526