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Freezer: make kernel threads nonfreezable by default
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / tvaudio.c
CommitLineData
1da177e4
LT		 1/*
2 * experimental driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * This code is placed under the terms of the GNU General Public License
11 *
12 * OPTIONS:
13 * debug - set to 1 if you'd like to see debug messages
14 *
15 */
16
1da177e4
LT		 17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/string.h>
22#include <linux/timer.h>
23#include <linux/delay.h>
24#include <linux/errno.h>
25#include <linux/slab.h>
26#include <linux/videodev.h>
27#include <linux/i2c.h>
1da177e4 28#include <linux/init.h>
bc282879 29#include <linux/kthread.h>
7dfb7103 30#include <linux/freezer.h>
1da177e4 31
8bf2f8e7 32#include <media/tvaudio.h>
5e453dc7 33#include <media/v4l2-common.h>
74cab31c 34#include <media/v4l2-chip-ident.h>
1da177e4 35
7c9b5048 36#include <media/i2c-addr.h>
1da177e4
LT		 37
38/* ---------------------------------------------------------------------- */
39/* insmod args */
40
41static int debug = 0; /* insmod parameter */
42module_param(debug, int, 0644);
43
44MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46MODULE_LICENSE("GPL");
47
48#define UNSET (-1U)
18fc59e2 49
1da177e4
LT		 50/* ---------------------------------------------------------------------- */
51/* our structs */
52
53#define MAXREGS 64
54
55struct CHIPSTATE;
56typedef int (*getvalue)(int);
57typedef int (*checkit)(struct CHIPSTATE*);
58typedef int (*initialize)(struct CHIPSTATE*);
59typedef int (*getmode)(struct CHIPSTATE*);
60typedef void (*setmode)(struct CHIPSTATE*, int mode);
61typedef void (*checkmode)(struct CHIPSTATE*);
62
63/* i2c command */
64typedef struct AUDIOCMD {
65 int count; /* # of bytes to send */
66 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
67} audiocmd;
68
69/* chip description */
70struct CHIPDESC {
71 char *name; /* chip name */
72 int id; /* ID */
73 int addr_lo, addr_hi; /* i2c address range */
74 int registers; /* # of registers */
75
76 int *insmodopt;
77 checkit checkit;
78 initialize initialize;
79 int flags;
80#define CHIP_HAS_VOLUME 1
81#define CHIP_HAS_BASSTREBLE 2
82#define CHIP_HAS_INPUTSEL 4
83
84 /* various i2c command sequences */
85 audiocmd init;
86
87 /* which register has which value */
88 int leftreg,rightreg,treblereg,bassreg;
89
90 /* initialize with (defaults to 65535/65535/32768/32768 */
91 int leftinit,rightinit,trebleinit,bassinit;
92
93 /* functions to convert the values (v4l -> chip) */
94 getvalue volfunc,treblefunc,bassfunc;
95
96 /* get/set mode */
97 getmode getmode;
98 setmode setmode;
99
100 /* check / autoswitch audio after channel switches */
101 checkmode checkmode;
102
103 /* input switch register + values for v4l inputs */
104 int inputreg;
8bf2f8e7 105 int inputmap[4];
1da177e4
LT		 106 int inputmute;
107 int inputmask;
108};
109static struct CHIPDESC chiplist[];
110
111/* current state of the chip */
112struct CHIPSTATE {
113 struct i2c_client c;
114
115 /* index into CHIPDESC array */
116 int type;
117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
8bf2f8e7 122 __u16 left,right,treble,bass,muted,mode;
1da177e4 123 int prevmode;
8a854284 124 int radio;
8bf2f8e7 125 int input;
1da177e4
LT		 126
127 /* thread */
bc282879 128 struct task_struct *thread;
1da177e4 129 struct timer_list wt;
1da177e4 130 int watch_stereo;
8a4b275f 131 int audmode;
1da177e4
LT		 132};
133
1da177e4
LT		 134/* ---------------------------------------------------------------------- */
135/* i2c addresses */
136
137static unsigned short normal_i2c[] = {
09df1c16
MCC		 138 I2C_ADDR_TDA8425 >> 1,
139 I2C_ADDR_TEA6300 >> 1,
140 I2C_ADDR_TEA6420 >> 1,
141 I2C_ADDR_TDA9840 >> 1,
142 I2C_ADDR_TDA985x_L >> 1,
143 I2C_ADDR_TDA985x_H >> 1,
144 I2C_ADDR_TDA9874 >> 1,
145 I2C_ADDR_PIC16C54 >> 1,
1da177e4 146 I2C_CLIENT_END };
1da177e4
LT		 147I2C_CLIENT_INSMOD;
148
149static struct i2c_driver driver;
150static struct i2c_client client_template;
151
152
153/* ---------------------------------------------------------------------- */
154/* i2c I/O functions */
155
156static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
157{
158 unsigned char buffer[2];
159
160 if (-1 == subaddr) {
f167cb4e 161 v4l_dbg(1, debug, &chip->c, "%s: chip_write: 0x%x\n",
18fc59e2 162 chip->c.name, val);
1da177e4
LT		 163 chip->shadow.bytes[1] = val;
164 buffer[0] = val;
165 if (1 != i2c_master_send(&chip->c,buffer,1)) {
fac9e899 166 v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
18fc59e2 167 chip->c.name, val);
1da177e4
LT		 168 return -1;
169 }
170 } else {
f167cb4e 171 v4l_dbg(1, debug, &chip->c, "%s: chip_write: reg%d=0x%x\n",
fae91e72 172 chip->c.name, subaddr, val);
1da177e4
LT		 173 chip->shadow.bytes[subaddr+1] = val;
174 buffer[0] = subaddr;
175 buffer[1] = val;
176 if (2 != i2c_master_send(&chip->c,buffer,2)) {
fac9e899 177 v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
674434c6 178 chip->c.name, subaddr, val);
1da177e4
LT		 179 return -1;
180 }
181 }
182 return 0;
183}
184
185static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
186{
187 if (mask != 0) {
188 if (-1 == subaddr) {
189 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
190 } else {
191 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
192 }
193 }
194 return chip_write(chip, subaddr, val);
195}
196
197static int chip_read(struct CHIPSTATE *chip)
198{
199 unsigned char buffer;
200
201 if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
fac9e899 202 v4l_warn(&chip->c, "%s: I/O error (read)\n",
18fc59e2 203 chip->c.name);
1da177e4
LT		 204 return -1;
205 }
f167cb4e 206 v4l_dbg(1, debug, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
1da177e4
LT		 207 return buffer;
208}
209
210static int chip_read2(struct CHIPSTATE *chip, int subaddr)
211{
18fc59e2
MCC		 212 unsigned char write[1];
213 unsigned char read[1];
214 struct i2c_msg msgs[2] = {
215 { chip->c.addr, 0, 1, write },
216 { chip->c.addr, I2C_M_RD, 1, read }
217 };
218 write[0] = subaddr;
1da177e4
LT		 219
220 if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
fac9e899 221 v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
1da177e4
LT		 222 return -1;
223 }
f167cb4e 224 v4l_dbg(1, debug, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
674434c6 225 chip->c.name, subaddr,read[0]);
1da177e4
LT		 226 return read[0];
227}
228
229static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
230{
231 int i;
232
233 if (0 == cmd->count)
234 return 0;
235
236 /* update our shadow register set; print bytes if (debug > 0) */
f167cb4e 237 v4l_dbg(1, debug, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
674434c6 238 chip->c.name, name,cmd->bytes[0]);
1da177e4 239 for (i = 1; i < cmd->count; i++) {
18fc59e2
MCC		 240 if (debug)
241 printk(" 0x%x",cmd->bytes[i]);
1da177e4
LT		 242 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
243 }
18fc59e2
MCC		 244 if (debug)
245 printk("\n");
1da177e4
LT		 246
247 /* send data to the chip */
248 if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
fac9e899 249 v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
1da177e4
LT		 250 return -1;
251 }
252 return 0;
253}
254
255/* ---------------------------------------------------------------------- */
256/* kernel thread for doing i2c stuff asyncronly
257 * right now it is used only to check the audio mode (mono/stereo/whatever)
258 * some time after switching to another TV channel, then turn on stereo
259 * if available, ...
260 */
261
262static void chip_thread_wake(unsigned long data)
263{
18fc59e2 264 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
bc282879 265 wake_up_process(chip->thread);
1da177e4
LT		 266}
267
268static int chip_thread(void *data)
269{
18fc59e2 270 struct CHIPSTATE *chip = data;
1da177e4
LT		 271 struct CHIPDESC *desc = chiplist + chip->type;
272
f167cb4e 273 v4l_dbg(1, debug, &chip->c, "%s: thread started\n", chip->c.name);
83144186 274 set_freezable();
1da177e4 275 for (;;) {
bc282879
CLG		 276 set_current_state(TASK_INTERRUPTIBLE);
277 if (!kthread_should_stop())
1da177e4 278 schedule();
bc282879 279 set_current_state(TASK_RUNNING);
5e50e7a9 280 try_to_freeze();
bc282879 281 if (kthread_should_stop())
1da177e4 282 break;
f167cb4e 283 v4l_dbg(1, debug, &chip->c, "%s: thread wakeup\n", chip->c.name);
1da177e4
LT		 284
285 /* don't do anything for radio or if mode != auto */
8a854284 286 if (chip->radio || chip->mode != 0)
1da177e4
LT		 287 continue;
288
289 /* have a look what's going on */
290 desc->checkmode(chip);
291
292 /* schedule next check */
293 mod_timer(&chip->wt, jiffies+2*HZ);
294 }
295
f167cb4e 296 v4l_dbg(1, debug, &chip->c, "%s: thread exiting\n", chip->c.name);
1da177e4
LT		 297 return 0;
298}
299
300static void generic_checkmode(struct CHIPSTATE *chip)
301{
302 struct CHIPDESC *desc = chiplist + chip->type;
303 int mode = desc->getmode(chip);
304
305 if (mode == chip->prevmode)
674434c6 306 return;
1da177e4 307
f167cb4e 308 v4l_dbg(1, debug, &chip->c, "%s: thread checkmode\n", chip->c.name);
1da177e4
LT		 309 chip->prevmode = mode;
310
311 if (mode & VIDEO_SOUND_STEREO)
312 desc->setmode(chip,VIDEO_SOUND_STEREO);
313 else if (mode & VIDEO_SOUND_LANG1)
314 desc->setmode(chip,VIDEO_SOUND_LANG1);
315 else if (mode & VIDEO_SOUND_LANG2)
316 desc->setmode(chip,VIDEO_SOUND_LANG2);
317 else
318 desc->setmode(chip,VIDEO_SOUND_MONO);
319}
320
321/* ---------------------------------------------------------------------- */
322/* audio chip descriptions - defines+functions for tda9840 */
323
324#define TDA9840_SW 0x00
325#define TDA9840_LVADJ 0x02
326#define TDA9840_STADJ 0x03
327#define TDA9840_TEST 0x04
328
329#define TDA9840_MONO 0x10
330#define TDA9840_STEREO 0x2a
331#define TDA9840_DUALA 0x12
332#define TDA9840_DUALB 0x1e
333#define TDA9840_DUALAB 0x1a
334#define TDA9840_DUALBA 0x16
335#define TDA9840_EXTERNAL 0x7a
336
337#define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
338#define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
339#define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
340
341#define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
342#define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
343
344static int tda9840_getmode(struct CHIPSTATE *chip)
345{
346 int val, mode;
347
348 val = chip_read(chip);
349 mode = VIDEO_SOUND_MONO;
350 if (val & TDA9840_DS_DUAL)
351 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
352 if (val & TDA9840_ST_STEREO)
353 mode |= VIDEO_SOUND_STEREO;
354
f167cb4e 355 v4l_dbg(1, debug, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 356 val, mode);
1da177e4
LT		 357 return mode;
358}
359
360static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
361{
362 int update = 1;
363 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
364
365 switch (mode) {
366 case VIDEO_SOUND_MONO:
367 t |= TDA9840_MONO;
368 break;
369 case VIDEO_SOUND_STEREO:
370 t |= TDA9840_STEREO;
371 break;
372 case VIDEO_SOUND_LANG1:
373 t |= TDA9840_DUALA;
374 break;
375 case VIDEO_SOUND_LANG2:
376 t |= TDA9840_DUALB;
377 break;
378 default:
379 update = 0;
380 }
381
382 if (update)
383 chip_write(chip, TDA9840_SW, t);
384}
385
94f9e56e
HV		 386static int tda9840_checkit(struct CHIPSTATE *chip)
387{
388 int rc;
389 rc = chip_read(chip);
390 /* lower 5 bits should be 0 */
391 return ((rc & 0x1f) == 0) ? 1 : 0;
392}
393
1da177e4
LT		 394/* ---------------------------------------------------------------------- */
395/* audio chip descriptions - defines+functions for tda985x */
396
397/* subaddresses for TDA9855 */
398#define TDA9855_VR 0x00 /* Volume, right */
399#define TDA9855_VL 0x01 /* Volume, left */
400#define TDA9855_BA 0x02 /* Bass */
401#define TDA9855_TR 0x03 /* Treble */
402#define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
403
404/* subaddresses for TDA9850 */
405#define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
406
407/* subaddesses for both chips */
408#define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
409#define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
410#define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
411#define TDA985x_A1 0x08 /* Alignment 1 for both chips */
412#define TDA985x_A2 0x09 /* Alignment 2 for both chips */
413#define TDA985x_A3 0x0a /* Alignment 3 for both chips */
414
415/* Masks for bits in TDA9855 subaddresses */
416/* 0x00 - VR in TDA9855 */
417/* 0x01 - VL in TDA9855 */
418/* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
419 * in 1dB steps - mute is 0x27 */
420
421
422/* 0x02 - BA in TDA9855 */
423/* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
424 * in .5dB steps - 0 is 0x0E */
425
426
427/* 0x03 - TR in TDA9855 */
428/* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
429 * in 3dB steps - 0 is 0x7 */
430
431/* Masks for bits in both chips' subaddresses */
432/* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
433/* Unique to TDA9855: */
434/* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
435 * in 3dB steps - mute is 0x0 */
436
437/* Unique to TDA9850: */
438/* lower 4 bits control stereo noise threshold, over which stereo turns off
439 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
440
441
442/* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
443/* Unique to TDA9855: */
444#define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
445#define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
446#define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
447#define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
448 /* Bits 0 to 3 select various combinations
4ac97914
MCC		 449 * of line in and line out, only the
450 * interesting ones are defined */
1da177e4
LT		 451#define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
452#define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
453
454/* Unique to TDA9850: */
455/* lower 4 bits contol SAP noise threshold, over which SAP turns off
456 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
457
458
459/* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
460/* Common to TDA9855 and TDA9850: */
461#define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
462#define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
463#define TDA985x_MONO 0 /* Forces Mono output */
464#define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
465
466/* Unique to TDA9855: */
467#define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
468#define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
469#define TDA9855_LINEAR 0 /* Linear Stereo */
470#define TDA9855_PSEUDO 1 /* Pseudo Stereo */
471#define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
472#define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
473#define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
474
475/* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
476/* Common to both TDA9855 and TDA9850: */
477/* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
478 * in .5dB steps - 0dB is 0x7 */
479
480/* 0x08, 0x09 - A1 and A2 (read/write) */
481/* Common to both TDA9855 and TDA9850: */
482/* lower 5 bites are wideband and spectral expander alignment
483 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
484#define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
485#define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
486#define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
487
488/* 0x0a - A3 */
489/* Common to both TDA9855 and TDA9850: */
490/* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
491 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
492#define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
493
494static int tda9855_volume(int val) { return val/0x2e8+0x27; }
495static int tda9855_bass(int val) { return val/0xccc+0x06; }
496static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
497
498static int tda985x_getmode(struct CHIPSTATE *chip)
499{
500 int mode;
501
502 mode = ((TDA985x_STP | TDA985x_SAPP) &
503 chip_read(chip)) >> 4;
504 /* Add mono mode regardless of SAP and stereo */
505 /* Allows forced mono */
506 return mode | VIDEO_SOUND_MONO;
507}
508
509static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
510{
511 int update = 1;
512 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
513
514 switch (mode) {
515 case VIDEO_SOUND_MONO:
516 c6 |= TDA985x_MONO;
517 break;
518 case VIDEO_SOUND_STEREO:
519 c6 |= TDA985x_STEREO;
520 break;
521 case VIDEO_SOUND_LANG1:
522 c6 |= TDA985x_SAP;
523 break;
524 default:
525 update = 0;
526 }
527 if (update)
528 chip_write(chip,TDA985x_C6,c6);
529}
530
531
532/* ---------------------------------------------------------------------- */
533/* audio chip descriptions - defines+functions for tda9873h */
534
535/* Subaddresses for TDA9873H */
536
537#define TDA9873_SW 0x00 /* Switching */
538#define TDA9873_AD 0x01 /* Adjust */
539#define TDA9873_PT 0x02 /* Port */
540
541/* Subaddress 0x00: Switching Data
542 * B7..B0:
543 *
544 * B1, B0: Input source selection
545 * 0, 0 internal
546 * 1, 0 external stereo
547 * 0, 1 external mono
548 */
549#define TDA9873_INP_MASK 3
550#define TDA9873_INTERNAL 0
551#define TDA9873_EXT_STEREO 2
552#define TDA9873_EXT_MONO 1
553
554/* B3, B2: output signal select
555 * B4 : transmission mode
556 * 0, 0, 1 Mono
557 * 1, 0, 0 Stereo
558 * 1, 1, 1 Stereo (reversed channel)
559 * 0, 0, 0 Dual AB
560 * 0, 0, 1 Dual AA
561 * 0, 1, 0 Dual BB
562 * 0, 1, 1 Dual BA
563 */
564
565#define TDA9873_TR_MASK (7 << 2)
566#define TDA9873_TR_MONO 4
567#define TDA9873_TR_STEREO 1 << 4
568#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
569#define TDA9873_TR_DUALA 1 << 2
570#define TDA9873_TR_DUALB 1 << 3
571
572/* output level controls
573 * B5: output level switch (0 = reduced gain, 1 = normal gain)
574 * B6: mute (1 = muted)
575 * B7: auto-mute (1 = auto-mute enabled)
576 */
577
578#define TDA9873_GAIN_NORMAL 1 << 5
579#define TDA9873_MUTE 1 << 6
580#define TDA9873_AUTOMUTE 1 << 7
581
582/* Subaddress 0x01: Adjust/standard */
583
584/* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
585 * Recommended value is +0 dB
586 */
587
588#define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
589
590/* Bits C6..C4 control FM stantard
591 * C6, C5, C4
592 * 0, 0, 0 B/G (PAL FM)
593 * 0, 0, 1 M
594 * 0, 1, 0 D/K(1)
595 * 0, 1, 1 D/K(2)
596 * 1, 0, 0 D/K(3)
597 * 1, 0, 1 I
598 */
599#define TDA9873_BG 0
600#define TDA9873_M 1
601#define TDA9873_DK1 2
602#define TDA9873_DK2 3
603#define TDA9873_DK3 4
604#define TDA9873_I 5
605
606/* C7 controls identification response time (1=fast/0=normal)
607 */
608#define TDA9873_IDR_NORM 0
609#define TDA9873_IDR_FAST 1 << 7
610
611
612/* Subaddress 0x02: Port data */
613
614/* E1, E0 free programmable ports P1/P2
615 0, 0 both ports low
616 0, 1 P1 high
617 1, 0 P2 high
618 1, 1 both ports high
619*/
620
621#define TDA9873_PORTS 3
622
623/* E2: test port */
624#define TDA9873_TST_PORT 1 << 2
625
626/* E5..E3 control mono output channel (together with transmission mode bit B4)
627 *
628 * E5 E4 E3 B4 OUTM
629 * 0 0 0 0 mono
630 * 0 0 1 0 DUAL B
631 * 0 1 0 1 mono (from stereo decoder)
632 */
633#define TDA9873_MOUT_MONO 0
634#define TDA9873_MOUT_FMONO 0
635#define TDA9873_MOUT_DUALA 0
636#define TDA9873_MOUT_DUALB 1 << 3
637#define TDA9873_MOUT_ST 1 << 4
638#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
639#define TDA9873_MOUT_EXTL 1 << 5
640#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
641#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
642#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
643
644/* Status bits: (chip read) */
645#define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
646#define TDA9873_STEREO 2 /* Stereo sound is identified */
647#define TDA9873_DUAL 4 /* Dual sound is identified */
648
649static int tda9873_getmode(struct CHIPSTATE *chip)
650{
651 int val,mode;
652
653 val = chip_read(chip);
654 mode = VIDEO_SOUND_MONO;
655 if (val & TDA9873_STEREO)
656 mode |= VIDEO_SOUND_STEREO;
657 if (val & TDA9873_DUAL)
658 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
f167cb4e 659 v4l_dbg(1, debug, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
18fc59e2 660 val, mode);
1da177e4
LT		 661 return mode;
662}
663
664static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
665{
666 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
667 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
668
669 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
f167cb4e 670 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): external input\n");
1da177e4
LT		 671 return;
672 }
673
f167cb4e
MCC		 674 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
675 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
1da177e4
LT		 676
677 switch (mode) {
678 case VIDEO_SOUND_MONO:
679 sw_data |= TDA9873_TR_MONO;
680 break;
681 case VIDEO_SOUND_STEREO:
682 sw_data |= TDA9873_TR_STEREO;
683 break;
684 case VIDEO_SOUND_LANG1:
685 sw_data |= TDA9873_TR_DUALA;
686 break;
687 case VIDEO_SOUND_LANG2:
688 sw_data |= TDA9873_TR_DUALB;
689 break;
690 default:
691 chip->mode = 0;
692 return;
693 }
694
695 chip_write(chip, TDA9873_SW, sw_data);
f167cb4e 696 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
1da177e4
LT		 697 mode, sw_data);
698}
699
700static int tda9873_checkit(struct CHIPSTATE *chip)
701{
702 int rc;
703
704 if (-1 == (rc = chip_read2(chip,254)))
705 return 0;
706 return (rc & ~0x1f) == 0x80;
707}
708
709
710/* ---------------------------------------------------------------------- */
711/* audio chip description - defines+functions for tda9874h and tda9874a */
712/* Dariusz Kowalewski <darekk@automex.pl> */
713
714/* Subaddresses for TDA9874H and TDA9874A (slave rx) */
715#define TDA9874A_AGCGR 0x00 /* AGC gain */
716#define TDA9874A_GCONR 0x01 /* general config */
717#define TDA9874A_MSR 0x02 /* monitor select */
718#define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
719#define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
720#define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
721#define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
722#define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
723#define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
724#define TDA9874A_DCR 0x09 /* demodulator config */
725#define TDA9874A_FMER 0x0a /* FM de-emphasis */
726#define TDA9874A_FMMR 0x0b /* FM dematrix */
727#define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
728#define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
729#define TDA9874A_NCONR 0x0e /* NICAM config */
730#define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
731#define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
732#define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
733#define TDA9874A_AMCONR 0x12 /* audio mute control */
734#define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
735#define TDA9874A_AOSR 0x14 /* analog output select */
736#define TDA9874A_DAICONR 0x15 /* digital audio interface config */
737#define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
738#define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
739#define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
740#define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
741
742/* Subaddresses for TDA9874H and TDA9874A (slave tx) */
743#define TDA9874A_DSR 0x00 /* device status */
744#define TDA9874A_NSR 0x01 /* NICAM status */
745#define TDA9874A_NECR 0x02 /* NICAM error count */
746#define TDA9874A_DR1 0x03 /* add. data LSB */
747#define TDA9874A_DR2 0x04 /* add. data MSB */
748#define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
749#define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
750#define TDA9874A_SIFLR 0x07 /* SIF level */
751#define TDA9874A_TR2 252 /* test reg. 2 */
752#define TDA9874A_TR1 253 /* test reg. 1 */
753#define TDA9874A_DIC 254 /* device id. code */
754#define TDA9874A_SIC 255 /* software id. code */
755
756
757static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
758static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
759static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
760static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
761static int tda9874a_dic = -1; /* device id. code */
762
763/* insmod options for tda9874a */
764static unsigned int tda9874a_SIF = UNSET;
765static unsigned int tda9874a_AMSEL = UNSET;
766static unsigned int tda9874a_STD = UNSET;
767module_param(tda9874a_SIF, int, 0444);
768module_param(tda9874a_AMSEL, int, 0444);
769module_param(tda9874a_STD, int, 0444);
770
771/*
772 * initialization table for tda9874 decoder:
773 * - carrier 1 freq. registers (3 bytes)
774 * - carrier 2 freq. registers (3 bytes)
775 * - demudulator config register
776 * - FM de-emphasis register (slow identification mode)
777 * Note: frequency registers must be written in single i2c transfer.
778 */
779static struct tda9874a_MODES {
780 char *name;
781 audiocmd cmd;
782} tda9874a_modelist[9] = {
783 { "A2, B/G",
784 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
785 { "A2, M (Korea)",
786 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
787 { "A2, D/K (1)",
788 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
789 { "A2, D/K (2)",
790 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
791 { "A2, D/K (3)",
792 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
793 { "NICAM, I",
794 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
795 { "NICAM, B/G",
796 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
797 { "NICAM, D/K", /* default */
798 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
799 { "NICAM, L",
800 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
801};
802
803static int tda9874a_setup(struct CHIPSTATE *chip)
804{
805 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
806 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
807 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
808 if(tda9874a_dic == 0x11) {
809 chip_write(chip, TDA9874A_FMMR, 0x80);
810 } else { /* dic == 0x07 */
811 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
812 chip_write(chip, TDA9874A_FMMR, 0x00);
813 }
814 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
815 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
816 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
817 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
818 /* Note: If signal quality is poor you may want to change NICAM */
819 /* error limit registers (NLELR and NUELR) to some greater values. */
820 /* Then the sound would remain stereo, but won't be so clear. */
821 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
822 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
823
824 if(tda9874a_dic == 0x11) {
825 chip_write(chip, TDA9874A_AMCONR, 0xf9);
826 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
827 chip_write(chip, TDA9874A_AOSR, 0x80);
828 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
829 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
830 } else { /* dic == 0x07 */
831 chip_write(chip, TDA9874A_AMCONR, 0xfb);
832 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
18fc59e2 833 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1da177e4 834 }
f167cb4e 835 v4l_dbg(1, debug, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
1da177e4
LT		 836 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
837 return 1;
838}
839
840static int tda9874a_getmode(struct CHIPSTATE *chip)
841{
842 int dsr,nsr,mode;
843 int necr; /* just for debugging */
844
845 mode = VIDEO_SOUND_MONO;
846
847 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
848 return mode;
849 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
850 return mode;
851 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
852 return mode;
853
854 /* need to store dsr/nsr somewhere */
855 chip->shadow.bytes[MAXREGS-2] = dsr;
856 chip->shadow.bytes[MAXREGS-1] = nsr;
857
858 if(tda9874a_mode) {
859 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
860 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
861 * that sound has (temporarily) switched from NICAM to
862 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
863 * error count. So in fact there is no stereo in this case :-(
864 * But changing the mode to VIDEO_SOUND_MONO would switch
865 * external 4052 multiplexer in audio_hook().
866 */
1da177e4
LT		 867 if(nsr & 0x02) /* NSR.S/MB=1 */
868 mode |= VIDEO_SOUND_STEREO;
1da177e4
LT		 869 if(nsr & 0x01) /* NSR.D/SB=1 */
870 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
871 } else {
872 if(dsr & 0x02) /* DSR.IDSTE=1 */
873 mode |= VIDEO_SOUND_STEREO;
874 if(dsr & 0x04) /* DSR.IDDUA=1 */
875 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
876 }
877
f167cb4e 878 v4l_dbg(1, debug, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
1da177e4
LT		 879 dsr, nsr, necr, mode);
880 return mode;
881}
882
883static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
884{
885 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
886 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
887 if(tda9874a_mode) {
888 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
889 tda9874a_NCONR &= 0xfe; /* enable */
890 else
891 tda9874a_NCONR |= 0x01; /* disable */
892 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
893 }
894
895 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
896 * and has auto-select function for audio output (AOSR register).
897 * Old TDA9874H doesn't support these features.
898 * TDA9874A also has additional mono output pin (OUTM), which
899 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
900 */
901 if(tda9874a_dic == 0x11) {
902 int aosr = 0x80;
903 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
904
905 switch(mode) {
906 case VIDEO_SOUND_MONO:
907 case VIDEO_SOUND_STEREO:
908 break;
909 case VIDEO_SOUND_LANG1:
910 aosr = 0x80; /* auto-select, dual A/A */
911 mdacosr = (tda9874a_mode) ? 0x82:0x80;
912 break;
913 case VIDEO_SOUND_LANG2:
914 aosr = 0xa0; /* auto-select, dual B/B */
915 mdacosr = (tda9874a_mode) ? 0x83:0x81;
916 break;
917 default:
918 chip->mode = 0;
919 return;
920 }
921 chip_write(chip, TDA9874A_AOSR, aosr);
922 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
923
f167cb4e 924 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1da177e4
LT		 925 mode, aosr, mdacosr);
926
927 } else { /* dic == 0x07 */
928 int fmmr,aosr;
929
930 switch(mode) {
931 case VIDEO_SOUND_MONO:
932 fmmr = 0x00; /* mono */
933 aosr = 0x10; /* A/A */
934 break;
935 case VIDEO_SOUND_STEREO:
936 if(tda9874a_mode) {
937 fmmr = 0x00;
938 aosr = 0x00; /* handled by NICAM auto-mute */
939 } else {
940 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
941 aosr = 0x00;
942 }
943 break;
944 case VIDEO_SOUND_LANG1:
945 fmmr = 0x02; /* dual */
946 aosr = 0x10; /* dual A/A */
947 break;
948 case VIDEO_SOUND_LANG2:
949 fmmr = 0x02; /* dual */
950 aosr = 0x20; /* dual B/B */
951 break;
952 default:
953 chip->mode = 0;
954 return;
955 }
956 chip_write(chip, TDA9874A_FMMR, fmmr);
957 chip_write(chip, TDA9874A_AOSR, aosr);
958
f167cb4e 959 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1da177e4
LT		 960 mode, fmmr, aosr);
961 }
962}
963
964static int tda9874a_checkit(struct CHIPSTATE *chip)
965{
966 int dic,sic; /* device id. and software id. codes */
967
968 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
969 return 0;
970 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
971 return 0;
972
f167cb4e 973 v4l_dbg(1, debug, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1da177e4
LT		 974
975 if((dic == 0x11)||(dic == 0x07)) {
fac9e899 976 v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
1da177e4
LT		 977 tda9874a_dic = dic; /* remember device id. */
978 return 1;
979 }
980 return 0; /* not found */
981}
982
983static int tda9874a_initialize(struct CHIPSTATE *chip)
984{
985 if (tda9874a_SIF > 2)
986 tda9874a_SIF = 1;
faf8b249 987 if (tda9874a_STD > 8)
1da177e4
LT		 988 tda9874a_STD = 0;
989 if(tda9874a_AMSEL > 1)
990 tda9874a_AMSEL = 0;
991
992 if(tda9874a_SIF == 1)
993 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
994 else
995 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
996
997 tda9874a_ESP = tda9874a_STD;
998 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
999
1000 if(tda9874a_AMSEL == 0)
1001 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1002 else
1003 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1004
1005 tda9874a_setup(chip);
1006 return 0;
1007}
1008
1009
1010/* ---------------------------------------------------------------------- */
1011/* audio chip descriptions - defines+functions for tea6420 */
1012
1013#define TEA6300_VL 0x00 /* volume left */
1014#define TEA6300_VR 0x01 /* volume right */
1015#define TEA6300_BA 0x02 /* bass */
1016#define TEA6300_TR 0x03 /* treble */
1017#define TEA6300_FA 0x04 /* fader control */
1018#define TEA6300_S 0x05 /* switch register */
f2421ca3 1019 /* values for those registers: */
1da177e4
LT		 1020#define TEA6300_S_SA 0x01 /* stereo A input */
1021#define TEA6300_S_SB 0x02 /* stereo B */
1022#define TEA6300_S_SC 0x04 /* stereo C */
1023#define TEA6300_S_GMU 0x80 /* general mute */
1024
1025#define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1026#define TEA6320_FFR 0x01 /* fader front right (0-5) */
1027#define TEA6320_FFL 0x02 /* fader front left (0-5) */
1028#define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1029#define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1030#define TEA6320_BA 0x05 /* bass (0-4) */
1031#define TEA6320_TR 0x06 /* treble (0-4) */
1032#define TEA6320_S 0x07 /* switch register */
f2421ca3 1033 /* values for those registers: */
1da177e4
LT		 1034#define TEA6320_S_SA 0x07 /* stereo A input */
1035#define TEA6320_S_SB 0x06 /* stereo B */
1036#define TEA6320_S_SC 0x05 /* stereo C */
1037#define TEA6320_S_SD 0x04 /* stereo D */
1038#define TEA6320_S_GMU 0x80 /* general mute */
1039
1040#define TEA6420_S_SA 0x00 /* stereo A input */
1041#define TEA6420_S_SB 0x01 /* stereo B */
1042#define TEA6420_S_SC 0x02 /* stereo C */
1043#define TEA6420_S_SD 0x03 /* stereo D */
1044#define TEA6420_S_SE 0x04 /* stereo E */
1045#define TEA6420_S_GMU 0x05 /* general mute */
1046
1047static int tea6300_shift10(int val) { return val >> 10; }
1048static int tea6300_shift12(int val) { return val >> 12; }
1049
1050/* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1051/* 0x0c mirror those immediately higher) */
1052static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1053static int tea6320_shift11(int val) { return val >> 11; }
1054static int tea6320_initialize(struct CHIPSTATE * chip)
1055{
1056 chip_write(chip, TEA6320_FFR, 0x3f);
1057 chip_write(chip, TEA6320_FFL, 0x3f);
1058 chip_write(chip, TEA6320_FRR, 0x3f);
1059 chip_write(chip, TEA6320_FRL, 0x3f);
1060
1061 return 0;
1062}
1063
1064
1065/* ---------------------------------------------------------------------- */
1066/* audio chip descriptions - defines+functions for tda8425 */
1067
1068#define TDA8425_VL 0x00 /* volume left */
1069#define TDA8425_VR 0x01 /* volume right */
1070#define TDA8425_BA 0x02 /* bass */
1071#define TDA8425_TR 0x03 /* treble */
1072#define TDA8425_S1 0x08 /* switch functions */
f2421ca3 1073 /* values for those registers: */
1da177e4
LT		 1074#define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1075#define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1076#define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1077#define TDA8425_S1_MU 0x20 /* mute bit */
1078#define TDA8425_S1_STEREO 0x18 /* stereo bits */
1079#define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1080#define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1081#define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1082#define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1083#define TDA8425_S1_ML 0x06 /* language selector */
1084#define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1085#define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1086#define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1087#define TDA8425_S1_IS 0x01 /* channel selector */
1088
1089
1090static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1091static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1092
1093static int tda8425_initialize(struct CHIPSTATE *chip)
1094{
1095 struct CHIPDESC *desc = chiplist + chip->type;
8bf2f8e7
HV		 1096 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1097 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1da177e4 1098
c7a46533 1099 if (chip->c.adapter->id == I2C_HW_B_RIVA) {
1da177e4
LT		 1100 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1101 }
1102 return 0;
1103}
1104
1105static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1106{
1107 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1108
1109 if (mode & VIDEO_SOUND_LANG1) {
1110 s1 |= TDA8425_S1_ML_SOUND_A;
1111 s1 |= TDA8425_S1_STEREO_PSEUDO;
1112
1113 } else if (mode & VIDEO_SOUND_LANG2) {
1114 s1 |= TDA8425_S1_ML_SOUND_B;
1115 s1 |= TDA8425_S1_STEREO_PSEUDO;
1116
1117 } else {
1118 s1 |= TDA8425_S1_ML_STEREO;
1119
1120 if (mode & VIDEO_SOUND_MONO)
1121 s1 |= TDA8425_S1_STEREO_MONO;
1122 if (mode & VIDEO_SOUND_STEREO)
1123 s1 |= TDA8425_S1_STEREO_SPATIAL;
1124 }
1125 chip_write(chip,TDA8425_S1,s1);
1126}
1127
1128
1129/* ---------------------------------------------------------------------- */
1130/* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1131
1132/* the registers of 16C54, I2C sub address. */
1133#define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1134#define PIC16C54_REG_MISC 0x02
1135
1136/* bit definition of the RESET register, I2C data. */
1137#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
f2421ca3 1138 /* code of remote controller */
1da177e4
LT		 1139#define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1140#define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1141#define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1142#define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1143#define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1144#define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1145#define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1146
1147/* ---------------------------------------------------------------------- */
1148/* audio chip descriptions - defines+functions for TA8874Z */
1149
18fc59e2 1150/* write 1st byte */
1da177e4
LT		 1151#define TA8874Z_LED_STE 0x80
1152#define TA8874Z_LED_BIL 0x40
1153#define TA8874Z_LED_EXT 0x20
1154#define TA8874Z_MONO_SET 0x10
1155#define TA8874Z_MUTE 0x08
1156#define TA8874Z_F_MONO 0x04
1157#define TA8874Z_MODE_SUB 0x02
1158#define TA8874Z_MODE_MAIN 0x01
1159
18fc59e2
MCC		 1160/* write 2nd byte */
1161/*#define TA8874Z_TI 0x80 */ /* test mode */
1da177e4
LT		 1162#define TA8874Z_SEPARATION 0x3f
1163#define TA8874Z_SEPARATION_DEFAULT 0x10
1164
18fc59e2 1165/* read */
1da177e4
LT		 1166#define TA8874Z_B1 0x80
1167#define TA8874Z_B0 0x40
1168#define TA8874Z_CHAG_FLAG 0x20
1169
18fc59e2
MCC		 1170/*
1171 * B1 B0
1172 * mono L H
1173 * stereo L L
1174 * BIL H L
1175 */
1da177e4
LT		 1176static int ta8874z_getmode(struct CHIPSTATE *chip)
1177{
1178 int val, mode;
1179
1180 val = chip_read(chip);
1181 mode = VIDEO_SOUND_MONO;
1182 if (val & TA8874Z_B1){
1183 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
1184 }else if (!(val & TA8874Z_B0)){
1185 mode |= VIDEO_SOUND_STEREO;
1186 }
f167cb4e 1187 /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1da177e4
LT		 1188 return mode;
1189}
1190
1191static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1192static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1193static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1194static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1195
1196static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1197{
1198 int update = 1;
1199 audiocmd *t = NULL;
f167cb4e 1200 v4l_dbg(1, debug, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1da177e4
LT		 1201
1202 switch(mode){
1203 case VIDEO_SOUND_MONO:
1204 t = &ta8874z_mono;
1205 break;
1206 case VIDEO_SOUND_STEREO:
1207 t = &ta8874z_stereo;
1208 break;
1209 case VIDEO_SOUND_LANG1:
1210 t = &ta8874z_main;
1211 break;
1212 case VIDEO_SOUND_LANG2:
1213 t = &ta8874z_sub;
1214 break;
1215 default:
1216 update = 0;
1217 }
1218
1219 if(update)
1220 chip_cmd(chip, "TA8874Z", t);
1221}
1222
1223static int ta8874z_checkit(struct CHIPSTATE *chip)
1224{
1225 int rc;
1226 rc = chip_read(chip);
1227 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1228}
1229
1230/* ---------------------------------------------------------------------- */
1231/* audio chip descriptions - struct CHIPDESC */
1232
1233/* insmod options to enable/disable individual audio chips */
52c1da39
AB		 1234static int tda8425 = 1;
1235static int tda9840 = 1;
1236static int tda9850 = 1;
1237static int tda9855 = 1;
1238static int tda9873 = 1;
1239static int tda9874a = 1;
18fc59e2
MCC		 1240static int tea6300 = 0; /* address clash with msp34xx */
1241static int tea6320 = 0; /* address clash with msp34xx */
52c1da39
AB		 1242static int tea6420 = 1;
1243static int pic16c54 = 1;
18fc59e2 1244static int ta8874z = 0; /* address clash with tda9840 */
1da177e4
LT		 1245
1246module_param(tda8425, int, 0444);
1247module_param(tda9840, int, 0444);
1248module_param(tda9850, int, 0444);
1249module_param(tda9855, int, 0444);
1250module_param(tda9873, int, 0444);
1251module_param(tda9874a, int, 0444);
1252module_param(tea6300, int, 0444);
1253module_param(tea6320, int, 0444);
1254module_param(tea6420, int, 0444);
1255module_param(pic16c54, int, 0444);
1256module_param(ta8874z, int, 0444);
1257
1258static struct CHIPDESC chiplist[] = {
1259 {
1260 .name = "tda9840",
1261 .id = I2C_DRIVERID_TDA9840,
1262 .insmodopt = &tda9840,
09df1c16
MCC		 1263 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1264 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4
LT		 1265 .registers = 5,
1266
94f9e56e 1267 .checkit = tda9840_checkit,
1da177e4
LT		 1268 .getmode = tda9840_getmode,
1269 .setmode = tda9840_setmode,
1270 .checkmode = generic_checkmode,
1271
4ac97914 1272 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1da177e4
LT		 1273 /* ,TDA9840_SW, TDA9840_MONO */} }
1274 },
1275 {
1276 .name = "tda9873h",
1277 .id = I2C_DRIVERID_TDA9873,
1278 .checkit = tda9873_checkit,
1279 .insmodopt = &tda9873,
09df1c16
MCC		 1280 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1281 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1282 .registers = 3,
1283 .flags = CHIP_HAS_INPUTSEL,
1284
1285 .getmode = tda9873_getmode,
1286 .setmode = tda9873_setmode,
1287 .checkmode = generic_checkmode,
1288
1289 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1290 .inputreg = TDA9873_SW,
1291 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
8bf2f8e7 1292 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1da177e4
LT		 1293 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1294
1295 },
1296 {
1297 .name = "tda9874h/a",
1298 .id = I2C_DRIVERID_TDA9874,
1299 .checkit = tda9874a_checkit,
1300 .initialize = tda9874a_initialize,
1301 .insmodopt = &tda9874a,
09df1c16
MCC		 1302 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1303 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1da177e4
LT		 1304
1305 .getmode = tda9874a_getmode,
1306 .setmode = tda9874a_setmode,
1307 .checkmode = generic_checkmode,
1308 },
1309 {
1310 .name = "tda9850",
1311 .id = I2C_DRIVERID_TDA9850,
1312 .insmodopt = &tda9850,
09df1c16
MCC		 1313 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1314 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1315 .registers = 11,
1316
1317 .getmode = tda985x_getmode,
1318 .setmode = tda985x_setmode,
1319
1320 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1321 },
1322 {
1323 .name = "tda9855",
1324 .id = I2C_DRIVERID_TDA9855,
1325 .insmodopt = &tda9855,
09df1c16
MCC		 1326 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1327 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1da177e4
LT		 1328 .registers = 11,
1329 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1330
1331 .leftreg = TDA9855_VL,
1332 .rightreg = TDA9855_VR,
1333 .bassreg = TDA9855_BA,
1334 .treblereg = TDA9855_TR,
1335 .volfunc = tda9855_volume,
1336 .bassfunc = tda9855_bass,
1337 .treblefunc = tda9855_treble,
1338
1339 .getmode = tda985x_getmode,
1340 .setmode = tda985x_setmode,
1341
1342 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1343 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1344 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1345 0x07, 0x10, 0x10, 0x03 }}
1346 },
1347 {
1348 .name = "tea6300",
1349 .id = I2C_DRIVERID_TEA6300,
1350 .insmodopt = &tea6300,
09df1c16
MCC		 1351 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1352 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1353 .registers = 6,
1354 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1355
1356 .leftreg = TEA6300_VR,
1357 .rightreg = TEA6300_VL,
1358 .bassreg = TEA6300_BA,
1359 .treblereg = TEA6300_TR,
1360 .volfunc = tea6300_shift10,
1361 .bassfunc = tea6300_shift12,
1362 .treblefunc = tea6300_shift12,
1363
1364 .inputreg = TEA6300_S,
1365 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1366 .inputmute = TEA6300_S_GMU,
1367 },
1368 {
1369 .name = "tea6320",
1370 .id = I2C_DRIVERID_TEA6300,
1371 .initialize = tea6320_initialize,
1372 .insmodopt = &tea6320,
09df1c16
MCC		 1373 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1374 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1da177e4
LT		 1375 .registers = 8,
1376 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1377
1378 .leftreg = TEA6320_V,
1379 .rightreg = TEA6320_V,
1380 .bassreg = TEA6320_BA,
1381 .treblereg = TEA6320_TR,
1382 .volfunc = tea6320_volume,
1383 .bassfunc = tea6320_shift11,
1384 .treblefunc = tea6320_shift11,
1385
1386 .inputreg = TEA6320_S,
1387 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1388 .inputmute = TEA6300_S_GMU,
1389 },
1390 {
1391 .name = "tea6420",
1392 .id = I2C_DRIVERID_TEA6420,
1393 .insmodopt = &tea6420,
09df1c16
MCC		 1394 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1395 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1da177e4
LT		 1396 .registers = 1,
1397 .flags = CHIP_HAS_INPUTSEL,
1398
1399 .inputreg = -1,
1400 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1401 .inputmute = TEA6300_S_GMU,
1402 },
1403 {
1404 .name = "tda8425",
1405 .id = I2C_DRIVERID_TDA8425,
1406 .insmodopt = &tda8425,
09df1c16
MCC		 1407 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1408 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1da177e4
LT		 1409 .registers = 9,
1410 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1411
1412 .leftreg = TDA8425_VL,
1413 .rightreg = TDA8425_VR,
1414 .bassreg = TDA8425_BA,
1415 .treblereg = TDA8425_TR,
1416 .volfunc = tda8425_shift10,
1417 .bassfunc = tda8425_shift12,
1418 .treblefunc = tda8425_shift12,
1419
1420 .inputreg = TDA8425_S1,
1421 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1422 .inputmute = TDA8425_S1_OFF,
1423
1424 .setmode = tda8425_setmode,
1425 .initialize = tda8425_initialize,
1426 },
1427 {
1428 .name = "pic16c54 (PV951)",
e0ec29b7 1429 .id = I2C_DRIVERID_PIC16C54_PV9,
1da177e4 1430 .insmodopt = &pic16c54,
09df1c16
MCC		 1431 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1432 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1da177e4
LT		 1433 .registers = 2,
1434 .flags = CHIP_HAS_INPUTSEL,
1435
1436 .inputreg = PIC16C54_REG_MISC,
1437 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1438 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1439 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
8bf2f8e7 1440 PIC16C54_MISC_SND_MUTE},
1da177e4
LT		 1441 .inputmute = PIC16C54_MISC_SND_MUTE,
1442 },
1443 {
1444 .name = "ta8874z",
1445 .id = -1,
18fc59e2 1446 /*.id = I2C_DRIVERID_TA8874Z, */
1da177e4
LT		 1447 .checkit = ta8874z_checkit,
1448 .insmodopt = &ta8874z,
09df1c16
MCC		 1449 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1450 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1da177e4
LT		 1451 .registers = 2,
1452
1453 .getmode = ta8874z_getmode,
1454 .setmode = ta8874z_setmode,
1455 .checkmode = generic_checkmode,
1456
4ac97914 1457 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1da177e4
LT		 1458 },
1459 { .name = NULL } /* EOF */
1460};
1461
1462
1463/* ---------------------------------------------------------------------- */
1464/* i2c registration */
1465
1466static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
1467{
1468 struct CHIPSTATE *chip;
1469 struct CHIPDESC *desc;
1470
7408187d 1471 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1da177e4
LT		 1472 if (!chip)
1473 return -ENOMEM;
1da177e4 1474 memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
4ac97914
MCC		 1475 chip->c.adapter = adap;
1476 chip->c.addr = addr;
1da177e4
LT		 1477 i2c_set_clientdata(&chip->c, chip);
1478
1479 /* find description for the chip */
f167cb4e 1480 v4l_dbg(1, debug, &chip->c, "chip found @ 0x%x\n", addr<<1);
1da177e4
LT		 1481 for (desc = chiplist; desc->name != NULL; desc++) {
1482 if (0 == *(desc->insmodopt))
1483 continue;
1484 if (addr < desc->addr_lo ||
1485 addr > desc->addr_hi)
1486 continue;
1487 if (desc->checkit && !desc->checkit(chip))
1488 continue;
1489 break;
1490 }
1491 if (desc->name == NULL) {
f167cb4e 1492 v4l_dbg(1, debug, &chip->c, "no matching chip description found\n");
1da177e4
LT		 1493 return -EIO;
1494 }
fac9e899 1495 v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
afd1a0c9 1496 if (desc->flags) {
f167cb4e 1497 v4l_dbg(1, debug, &chip->c, "matches:%s%s%s.\n",
674434c6
MCC		 1498 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1499 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1500 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
afd1a0c9 1501 }
1da177e4
LT		 1502
1503 /* fill required data structures */
674434c6 1504 strcpy(chip->c.name, desc->name);
1da177e4
LT		 1505 chip->type = desc-chiplist;
1506 chip->shadow.count = desc->registers+1;
afd1a0c9 1507 chip->prevmode = -1;
8a4b275f 1508 chip->audmode = V4L2_TUNER_MODE_LANG1;
1da177e4
LT		 1509 /* register */
1510 i2c_attach_client(&chip->c);
1511
1512 /* initialization */
1513 if (desc->initialize != NULL)
1514 desc->initialize(chip);
1515 else
1516 chip_cmd(chip,"init",&desc->init);
1517
1518 if (desc->flags & CHIP_HAS_VOLUME) {
1519 chip->left = desc->leftinit ? desc->leftinit : 65535;
1520 chip->right = desc->rightinit ? desc->rightinit : 65535;
1521 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1522 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1523 }
1524 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1525 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1526 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1527 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1528 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1529 }
1530
bc282879 1531 chip->thread = NULL;
1da177e4
LT		 1532 if (desc->checkmode) {
1533 /* start async thread */
1534 init_timer(&chip->wt);
1535 chip->wt.function = chip_thread_wake;
1536 chip->wt.data = (unsigned long)chip;
bc282879
CLG		 1537 chip->thread = kthread_run(chip_thread, chip, chip->c.name);
1538 if (IS_ERR(chip->thread)) {
1539 v4l_warn(&chip->c, "%s: failed to create kthread\n",
fae91e72 1540 chip->c.name);
bc282879
CLG		 1541 chip->thread = NULL;
1542 }
1da177e4
LT		 1543 }
1544 return 0;
1545}
1546
1547static int chip_probe(struct i2c_adapter *adap)
1548{
1549 /* don't attach on saa7146 based cards,
1550 because dedicated drivers are used */
18fc59e2 1551 if ((adap->id == I2C_HW_SAA7146))
1da177e4 1552 return 0;
1da177e4
LT		 1553 if (adap->class & I2C_CLASS_TV_ANALOG)
1554 return i2c_probe(adap, &addr_data, chip_attach);
1da177e4
LT		 1555 return 0;
1556}
1557
1558static int chip_detach(struct i2c_client *client)
1559{
1560 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1561
1562 del_timer_sync(&chip->wt);
bc282879 1563 if (chip->thread) {
1da177e4 1564 /* shutdown async thread */
bc282879
CLG		 1565 kthread_stop(chip->thread);
1566 chip->thread = NULL;
1da177e4
LT		 1567 }
1568
1569 i2c_detach_client(&chip->c);
1570 kfree(chip);
1571 return 0;
1572}
1573
8bf2f8e7
HV		 1574static int tvaudio_set_ctrl(struct CHIPSTATE *chip, struct v4l2_control *ctrl)
1575{
1576 struct CHIPDESC *desc = chiplist + chip->type;
1577
1578 switch (ctrl->id) {
1579 case V4L2_CID_AUDIO_MUTE:
1580 if (ctrl->value < 0 || ctrl->value >= 2)
1581 return -ERANGE;
1582 chip->muted = ctrl->value;
1583 if (chip->muted)
1584 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1585 else
1586 chip_write_masked(chip,desc->inputreg,
1587 desc->inputmap[chip->input],desc->inputmask);
1588 break;
1589 default:
1590 return -EINVAL;
1591 }
1592 return 0;
1593}
1594
1595
1da177e4
LT		 1596/* ---------------------------------------------------------------------- */
1597/* video4linux interface */
1598
1599static int chip_command(struct i2c_client *client,
1600 unsigned int cmd, void *arg)
1601{
1da177e4
LT		 1602 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1603 struct CHIPDESC *desc = chiplist + chip->type;
1604
f167cb4e 1605 v4l_dbg(1, debug, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
1da177e4
LT		 1606
1607 switch (cmd) {
1da177e4 1608 case AUDC_SET_RADIO:
8a854284 1609 chip->radio = 1;
1da177e4
LT		 1610 chip->watch_stereo = 0;
1611 /* del_timer(&chip->wt); */
1612 break;
1613
1614 /* --- v4l ioctls --- */
1615 /* take care: bttv does userspace copying, we'll get a
674434c6 1616 kernel pointer here... */
1da177e4
LT		 1617 case VIDIOCGAUDIO:
1618 {
1619 struct video_audio *va = arg;
1620
1621 if (desc->flags & CHIP_HAS_VOLUME) {
1622 va->flags |= VIDEO_AUDIO_VOLUME;
1623 va->volume = max(chip->left,chip->right);
1624 if (va->volume)
1625 va->balance = (32768*min(chip->left,chip->right))/
1626 va->volume;
1627 else
1628 va->balance = 32768;
1629 }
1630 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1631 va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
1632 va->bass = chip->bass;
1633 va->treble = chip->treble;
1634 }
8a854284 1635 if (!chip->radio) {
1da177e4
LT		 1636 if (desc->getmode)
1637 va->mode = desc->getmode(chip);
1638 else
1639 va->mode = VIDEO_SOUND_MONO;
1640 }
1641 break;
1642 }
1643
1644 case VIDIOCSAUDIO:
1645 {
1646 struct video_audio *va = arg;
1647
1648 if (desc->flags & CHIP_HAS_VOLUME) {
1649 chip->left = (min(65536 - va->balance,32768) *
18fc59e2 1650 va->volume) / 32768;
1da177e4 1651 chip->right = (min(va->balance,(__u16)32768) *
18fc59e2 1652 va->volume) / 32768;
1da177e4
LT		 1653 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1654 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1655 }
1656 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1657 chip->bass = va->bass;
1658 chip->treble = va->treble;
1659 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1660 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1661 }
1662 if (desc->setmode && va->mode) {
1663 chip->watch_stereo = 0;
1664 /* del_timer(&chip->wt); */
1665 chip->mode = va->mode;
1666 desc->setmode(chip,va->mode);
1667 }
1668 break;
1669 }
8a854284 1670
8bf2f8e7
HV		 1671 case VIDIOC_S_CTRL:
1672 return tvaudio_set_ctrl(chip, arg);
1673
2474ed44
HV		 1674 case VIDIOC_INT_G_AUDIO_ROUTING:
1675 {
1676 struct v4l2_routing *rt = arg;
1677
1678 rt->input = chip->input;
1679 rt->output = 0;
1680 break;
1681 }
1682
1683 case VIDIOC_INT_S_AUDIO_ROUTING:
1684 {
1685 struct v4l2_routing *rt = arg;
1686
1687 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1688 return -EINVAL;
1689 /* There are four inputs: tuner, radio, extern and intern. */
1690 chip->input = rt->input;
1691 if (chip->muted)
1692 break;
1693 chip_write_masked(chip, desc->inputreg,
1694 desc->inputmap[chip->input], desc->inputmask);
1695 break;
1696 }
1697
8a854284 1698 case VIDIOC_S_TUNER:
1da177e4 1699 {
8a854284
HV		 1700 struct v4l2_tuner *vt = arg;
1701 int mode = 0;
1da177e4 1702
8a4b275f
HV		 1703 if (chip->radio)
1704 break;
8a854284
HV		 1705 switch (vt->audmode) {
1706 case V4L2_TUNER_MODE_MONO:
1707 mode = VIDEO_SOUND_MONO;
1708 break;
1709 case V4L2_TUNER_MODE_STEREO:
301e22d6 1710 case V4L2_TUNER_MODE_LANG1_LANG2:
8a854284
HV		 1711 mode = VIDEO_SOUND_STEREO;
1712 break;
1713 case V4L2_TUNER_MODE_LANG1:
1714 mode = VIDEO_SOUND_LANG1;
1715 break;
1716 case V4L2_TUNER_MODE_LANG2:
1717 mode = VIDEO_SOUND_LANG2;
1718 break;
1719 default:
8a4b275f 1720 return -EINVAL;
8a854284 1721 }
8a4b275f 1722 chip->audmode = vt->audmode;
8a854284
HV		 1723
1724 if (desc->setmode && mode) {
1725 chip->watch_stereo = 0;
1726 /* del_timer(&chip->wt); */
1727 chip->mode = mode;
1728 desc->setmode(chip, mode);
1729 }
1da177e4
LT		 1730 break;
1731 }
8a854284
HV		 1732
1733 case VIDIOC_G_TUNER:
1da177e4 1734 {
8a854284
HV		 1735 struct v4l2_tuner *vt = arg;
1736 int mode = VIDEO_SOUND_MONO;
1737
d3900bc4
HV		 1738 if (chip->radio)
1739 break;
8a4b275f 1740 vt->audmode = chip->audmode;
8a854284
HV		 1741 vt->rxsubchans = 0;
1742 vt->capability = V4L2_TUNER_CAP_STEREO |
1743 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
8a854284
HV		 1744
1745 if (desc->getmode)
1746 mode = desc->getmode(chip);
1747
1748 if (mode & VIDEO_SOUND_MONO)
1749 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1750 if (mode & VIDEO_SOUND_STEREO)
1751 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
8a4b275f
HV		 1752 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1753 When this module is converted fully to v4l2, then this
1754 should change for those chips that can detect SAP. */
8a854284 1755 if (mode & VIDEO_SOUND_LANG1)
8a4b275f
HV		 1756 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1757 V4L2_TUNER_SUB_LANG2;
8a854284
HV		 1758 break;
1759 }
1760
1761 case VIDIOCSCHAN:
1762 case VIDIOC_S_STD:
1763 chip->radio = 0;
1764 break;
1765
1766 case VIDIOCSFREQ:
1767 case VIDIOC_S_FREQUENCY:
18fc59e2 1768 chip->mode = 0; /* automatic */
1da177e4
LT		 1769 if (desc->checkmode) {
1770 desc->setmode(chip,VIDEO_SOUND_MONO);
18fc59e2
MCC		 1771 if (chip->prevmode != VIDEO_SOUND_MONO)
1772 chip->prevmode = -1; /* reset previous mode */
1da177e4
LT		 1773 mod_timer(&chip->wt, jiffies+2*HZ);
1774 /* the thread will call checkmode() later */
1775 }
8a854284 1776 break;
74cab31c
HV		 1777
1778 case VIDIOC_G_CHIP_IDENT:
1779 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1da177e4
LT		 1780 }
1781 return 0;
1782}
1783
1da177e4 1784static struct i2c_driver driver = {
604f28e2 1785 .driver = {
cab462f7 1786 .name = "tvaudio",
604f28e2 1787 },
18fc59e2 1788 .id = I2C_DRIVERID_TVAUDIO,
18fc59e2
MCC		 1789 .attach_adapter = chip_probe,
1790 .detach_client = chip_detach,
1791 .command = chip_command,
1da177e4
LT		 1792};
1793
1794static struct i2c_client client_template =
1795{
fae91e72 1796 .name = "(unset)",
18fc59e2 1797 .driver = &driver,
1da177e4
LT		 1798};
1799
1800static int __init audiochip_init_module(void)
1801{
1802 struct CHIPDESC *desc;
18fc59e2
MCC		 1803
1804 if (debug) {
1805 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1806 printk(KERN_INFO "tvaudio: known chips: ");
1807 for (desc = chiplist; desc->name != NULL; desc++)
1808 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1809 printk("\n");
1810 }
1da177e4
LT		 1811
1812 return i2c_add_driver(&driver);
1813}
1814
1815static void __exit audiochip_cleanup_module(void)
1816{
1817 i2c_del_driver(&driver);
1818}
1819
1820module_init(audiochip_init_module);
1821module_exit(audiochip_cleanup_module);
1822
1823/*
1824 * Local variables:
1825 * c-basic-offset: 8
1826 * End:
1827 */
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