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Commit | Line | Data |
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cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
33b687cf | 9 | #include <linux/videodev2.h> |
cd4665c5 | 10 | #include <linux/delay.h> |
84486d53 | 11 | #include <linux/video_decoder.h> |
6b8fe025 | 12 | #include <media/v4l2-device.h> |
c7c0b34c | 13 | #include <media/tvp5150.h> |
6b8fe025 | 14 | #include <media/v4l2-i2c-drv-legacy.h> |
bc974305 | 15 | #include <media/v4l2-chip-ident.h> |
cd4665c5 MCC |
16 | |
17 | #include "tvp5150_reg.h" | |
18 | ||
6ac48b45 | 19 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
20 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
21 | MODULE_LICENSE("GPL"); | |
22 | ||
6ac48b45 | 23 | /* standard i2c insmod options */ |
cd4665c5 | 24 | static unsigned short normal_i2c[] = { |
84486d53 MCC |
25 | 0xb8 >> 1, |
26 | 0xba >> 1, | |
cd4665c5 MCC |
27 | I2C_CLIENT_END |
28 | }; | |
29 | ||
30 | I2C_CLIENT_INSMOD; | |
31 | ||
ff699e6b | 32 | static int debug; |
cd4665c5 | 33 | module_param(debug, int, 0); |
6b8fe025 | 34 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 | 35 | |
a6c2ba28 | 36 | /* supported controls */ |
37 | static struct v4l2_queryctrl tvp5150_qctrl[] = { | |
38 | { | |
c0477ad9 MCC |
39 | .id = V4L2_CID_BRIGHTNESS, |
40 | .type = V4L2_CTRL_TYPE_INTEGER, | |
41 | .name = "Brightness", | |
42 | .minimum = 0, | |
43 | .maximum = 255, | |
44 | .step = 1, | |
75bc8019 | 45 | .default_value = 128, |
c0477ad9 MCC |
46 | .flags = 0, |
47 | }, { | |
48 | .id = V4L2_CID_CONTRAST, | |
49 | .type = V4L2_CTRL_TYPE_INTEGER, | |
50 | .name = "Contrast", | |
51 | .minimum = 0, | |
52 | .maximum = 255, | |
53 | .step = 0x1, | |
75bc8019 | 54 | .default_value = 128, |
c0477ad9 MCC |
55 | .flags = 0, |
56 | }, { | |
a6c2ba28 | 57 | .id = V4L2_CID_SATURATION, |
58 | .type = V4L2_CTRL_TYPE_INTEGER, | |
59 | .name = "Saturation", | |
60 | .minimum = 0, | |
61 | .maximum = 255, | |
62 | .step = 0x1, | |
75bc8019 | 63 | .default_value = 128, |
a6c2ba28 | 64 | .flags = 0, |
c0477ad9 MCC |
65 | }, { |
66 | .id = V4L2_CID_HUE, | |
67 | .type = V4L2_CTRL_TYPE_INTEGER, | |
68 | .name = "Hue", | |
69 | .minimum = -128, | |
70 | .maximum = 127, | |
71 | .step = 0x1, | |
75bc8019 | 72 | .default_value = 0, |
c0477ad9 MCC |
73 | .flags = 0, |
74 | } | |
a6c2ba28 | 75 | }; |
76 | ||
cd4665c5 | 77 | struct tvp5150 { |
6b8fe025 | 78 | struct v4l2_subdev sd; |
84486d53 | 79 | |
3ad96835 | 80 | v4l2_std_id norm; /* Current set standard */ |
c7c0b34c | 81 | struct v4l2_routing route; |
84486d53 MCC |
82 | int enable; |
83 | int bright; | |
84 | int contrast; | |
85 | int hue; | |
86 | int sat; | |
cd4665c5 MCC |
87 | }; |
88 | ||
6b8fe025 | 89 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 90 | { |
6b8fe025 HV |
91 | return container_of(sd, struct tvp5150, sd); |
92 | } | |
93 | ||
94 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) | |
95 | { | |
96 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 MCC |
97 | unsigned char buffer[1]; |
98 | int rc; | |
cd4665c5 MCC |
99 | |
100 | buffer[0] = addr; | |
101 | if (1 != (rc = i2c_master_send(c, buffer, 1))) | |
6b8fe025 | 102 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc); |
cd4665c5 MCC |
103 | |
104 | msleep(10); | |
105 | ||
106 | if (1 != (rc = i2c_master_recv(c, buffer, 1))) | |
6b8fe025 | 107 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 1)\n", rc); |
e1bc80ad | 108 | |
6b8fe025 | 109 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]); |
cd4665c5 MCC |
110 | |
111 | return (buffer[0]); | |
112 | } | |
113 | ||
6b8fe025 | 114 | static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 115 | unsigned char value) |
cd4665c5 | 116 | { |
6b8fe025 | 117 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 MCC |
118 | unsigned char buffer[2]; |
119 | int rc; | |
cd4665c5 MCC |
120 | |
121 | buffer[0] = addr; | |
84486d53 | 122 | buffer[1] = value; |
6b8fe025 | 123 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]); |
cd4665c5 | 124 | if (2 != (rc = i2c_master_send(c, buffer, 2))) |
6b8fe025 | 125 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 2)\n", rc); |
cd4665c5 MCC |
126 | } |
127 | ||
6b8fe025 HV |
128 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
129 | const u8 end, int max_line) | |
3ad96835 | 130 | { |
6b8fe025 | 131 | int i = 0; |
3ad96835 | 132 | |
6b8fe025 HV |
133 | while (init != (u8)(end + 1)) { |
134 | if ((i % max_line) == 0) { | |
135 | if (i > 0) | |
3ad96835 | 136 | printk("\n"); |
6b8fe025 | 137 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 138 | } |
6b8fe025 | 139 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
140 | |
141 | init++; | |
142 | i++; | |
143 | } | |
144 | printk("\n"); | |
145 | } | |
146 | ||
6b8fe025 | 147 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 148 | { |
84486d53 | 149 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 150 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 151 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 152 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 153 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 154 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 155 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 156 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 157 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 158 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 159 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 160 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 161 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
162 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
163 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
164 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 165 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 166 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 167 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 168 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 169 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 170 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 171 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 172 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 173 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 174 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 175 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 176 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 177 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
178 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
179 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 180 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
181 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
182 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 183 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 184 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 185 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 186 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 187 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 188 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 189 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 190 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 191 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
192 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
193 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 194 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 195 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 196 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 197 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 198 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 199 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 200 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 201 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 202 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
203 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
204 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 205 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 206 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 207 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 208 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 209 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 210 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 211 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
212 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
213 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 214 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
215 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
216 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 217 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
218 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
219 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 220 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 221 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 222 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 223 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 224 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
225 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
226 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
227 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
228 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
229 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 230 | |
6b8fe025 HV |
231 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
232 | TVP5150_TELETEXT_FIL1_END, 8); | |
233 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
234 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 235 | |
84486d53 | 236 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 237 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 238 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 239 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 240 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 241 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 242 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 243 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 244 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 245 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 246 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 247 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 248 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 249 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 250 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 251 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 252 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 253 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 254 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
255 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
256 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 257 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 258 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 259 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 260 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 261 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 262 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 263 | |
6b8fe025 HV |
264 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
265 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 266 | |
6b8fe025 HV |
267 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
268 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 269 | |
6b8fe025 HV |
270 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
271 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 272 | |
6b8fe025 HV |
273 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
274 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 275 | |
6b8fe025 HV |
276 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
277 | TVP5150_LINE_MODE_END, 8); | |
278 | return 0; | |
cd4665c5 MCC |
279 | } |
280 | ||
281 | /**************************************************************************** | |
282 | Basic functions | |
283 | ****************************************************************************/ | |
cd4665c5 | 284 | |
6b8fe025 | 285 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 286 | { |
c0477ad9 | 287 | int opmode=0; |
6b8fe025 | 288 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 289 | int input = 0; |
f4b8b3ae | 290 | unsigned char val; |
84486d53 | 291 | |
c7c0b34c HV |
292 | if ((decoder->route.output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
293 | input = 8; | |
4c86f973 | 294 | |
12500f07 | 295 | switch (decoder->route.input) { |
c7c0b34c HV |
296 | case TVP5150_COMPOSITE1: |
297 | input |= 2; | |
298 | /* fall through */ | |
299 | case TVP5150_COMPOSITE0: | |
c0477ad9 MCC |
300 | opmode=0x30; /* TV Mode */ |
301 | break; | |
c7c0b34c | 302 | case TVP5150_SVIDEO: |
c0477ad9 | 303 | default: |
c7c0b34c | 304 | input |= 1; |
c0477ad9 MCC |
305 | opmode=0; /* Auto Mode */ |
306 | break; | |
307 | } | |
308 | ||
6b8fe025 | 309 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 MCC |
310 | "=> tvp5150 input=%i, opmode=%i\n", |
311 | decoder->route.input,decoder->route.output, | |
312 | input, opmode ); | |
313 | ||
6b8fe025 HV |
314 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
315 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
316 | |
317 | /* Svideo should enable YCrCb output and disable GPCL output | |
318 | * For Composite and TV, it should be the reverse | |
319 | */ | |
6b8fe025 | 320 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
f4b8b3ae MCC |
321 | if (decoder->route.input == TVP5150_SVIDEO) |
322 | val = (val & ~0x40) | 0x10; | |
323 | else | |
324 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 325 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
326 | }; |
327 | ||
e1bc80ad MCC |
328 | struct i2c_reg_value { |
329 | unsigned char reg; | |
330 | unsigned char value; | |
331 | }; | |
332 | ||
333 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
334 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
335 | { /* 0x00 */ | |
336 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
337 | }, | |
338 | { /* 0x01 */ | |
339 | TVP5150_ANAL_CHL_CTL,0x15 | |
340 | }, | |
341 | { /* 0x02 */ | |
342 | TVP5150_OP_MODE_CTL,0x00 | |
343 | }, | |
344 | { /* 0x03 */ | |
345 | TVP5150_MISC_CTL,0x01 | |
346 | }, | |
347 | { /* 0x06 */ | |
348 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
349 | }, | |
350 | { /* 0x07 */ | |
351 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
352 | }, | |
353 | { /* 0x08 */ | |
354 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
355 | }, | |
356 | { /* 0x09 */ | |
357 | TVP5150_BRIGHT_CTL,0x80 | |
358 | }, | |
359 | { /* 0x0a */ | |
360 | TVP5150_SATURATION_CTL,0x80 | |
361 | }, | |
362 | { /* 0x0b */ | |
363 | TVP5150_HUE_CTL,0x00 | |
364 | }, | |
365 | { /* 0x0c */ | |
366 | TVP5150_CONTRAST_CTL,0x80 | |
367 | }, | |
368 | { /* 0x0d */ | |
369 | TVP5150_DATA_RATE_SEL,0x47 | |
370 | }, | |
371 | { /* 0x0e */ | |
372 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
373 | }, | |
374 | { /* 0x0f */ | |
375 | TVP5150_CONF_SHARED_PIN,0x08 | |
376 | }, | |
377 | { /* 0x11 */ | |
378 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
379 | }, | |
380 | { /* 0x12 */ | |
381 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
382 | }, | |
383 | { /* 0x13 */ | |
384 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
385 | }, | |
386 | { /* 0x14 */ | |
387 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
388 | }, | |
389 | { /* 0x15 */ | |
390 | TVP5150_GENLOCK,0x01 | |
391 | }, | |
392 | { /* 0x16 */ | |
393 | TVP5150_HORIZ_SYNC_START,0x80 | |
394 | }, | |
395 | { /* 0x18 */ | |
396 | TVP5150_VERT_BLANKING_START,0x00 | |
397 | }, | |
398 | { /* 0x19 */ | |
399 | TVP5150_VERT_BLANKING_STOP,0x00 | |
400 | }, | |
401 | { /* 0x1a */ | |
402 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
403 | }, | |
404 | { /* 0x1b */ | |
405 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
406 | }, | |
407 | { /* 0x1c */ | |
408 | TVP5150_INT_RESET_REG_B,0x00 | |
409 | }, | |
410 | { /* 0x1d */ | |
411 | TVP5150_INT_ENABLE_REG_B,0x00 | |
412 | }, | |
413 | { /* 0x1e */ | |
414 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
415 | }, | |
416 | { /* 0x28 */ | |
417 | TVP5150_VIDEO_STD,0x00 | |
418 | }, | |
419 | { /* 0x2e */ | |
420 | TVP5150_MACROVISION_ON_CTR,0x0f | |
421 | }, | |
422 | { /* 0x2f */ | |
423 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
424 | }, | |
425 | { /* 0xbb */ | |
426 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
427 | }, | |
428 | { /* 0xc0 */ | |
429 | TVP5150_INT_STATUS_REG_A,0x00 | |
430 | }, | |
431 | { /* 0xc1 */ | |
432 | TVP5150_INT_ENABLE_REG_A,0x00 | |
433 | }, | |
434 | { /* 0xc2 */ | |
435 | TVP5150_INT_CONF,0x04 | |
436 | }, | |
437 | { /* 0xc8 */ | |
438 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
439 | }, | |
440 | { /* 0xc9 */ | |
441 | TVP5150_FIFO_RESET,0x00 | |
442 | }, | |
443 | { /* 0xca */ | |
444 | TVP5150_LINE_NUMBER_INT,0x00 | |
445 | }, | |
446 | { /* 0xcb */ | |
447 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
448 | }, | |
449 | { /* 0xcc */ | |
450 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
451 | }, | |
452 | { /* 0xcd */ | |
453 | TVP5150_FIFO_OUT_CTRL,0x01 | |
454 | }, | |
455 | { /* 0xcf */ | |
3ad96835 | 456 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
457 | }, |
458 | { /* 0xd0 */ | |
3ad96835 | 459 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
460 | }, |
461 | { /* 0xfc */ | |
462 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
463 | }, | |
464 | { /* end of data */ | |
465 | 0xff,0xff | |
466 | } | |
467 | }; | |
468 | ||
469 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
470 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
471 | { | |
472 | TVP5150_CONF_SHARED_PIN, 2 | |
473 | },{ /* Automatic offset and AGC enabled */ | |
474 | TVP5150_ANAL_CHL_CTL, 0x15 | |
475 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
476 | TVP5150_MISC_CTL, 0x6f | |
477 | },{ /* Activates video std autodetection for all standards */ | |
478 | TVP5150_AUTOSW_MSK, 0x0 | |
479 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
480 | TVP5150_DATA_RATE_SEL, 0x47 | |
481 | },{ | |
482 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
483 | },{ | |
484 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
485 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
486 | 0x27, 0x20 | |
487 | },{ | |
488 | 0xff,0xff | |
489 | } | |
490 | }; | |
491 | ||
6ac48b45 MCC |
492 | struct tvp5150_vbi_type { |
493 | unsigned int vbi_type; | |
494 | unsigned int ini_line; | |
495 | unsigned int end_line; | |
496 | unsigned int by_field :1; | |
497 | }; | |
498 | ||
e1bc80ad MCC |
499 | struct i2c_vbi_ram_value { |
500 | u16 reg; | |
6ac48b45 MCC |
501 | struct tvp5150_vbi_type type; |
502 | unsigned char values[16]; | |
e1bc80ad MCC |
503 | }; |
504 | ||
6ac48b45 MCC |
505 | /* This struct have the values for each supported VBI Standard |
506 | * by | |
507 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
508 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
509 | * and so on. There are 16 possible locations from 0 to 15. | |
510 | */ | |
3ad96835 | 511 | |
a9cff90e | 512 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 513 | { |
9bc7400a HV |
514 | /* FIXME: Current api doesn't handle all VBI types, those not |
515 | yet supported are placed under #if 0 */ | |
516 | #if 0 | |
6ac48b45 MCC |
517 | {0x010, /* Teletext, SECAM, WST System A */ |
518 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
519 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
520 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 521 | }, |
9bc7400a | 522 | #endif |
6ac48b45 | 523 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 524 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
525 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
526 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 527 | }, |
9bc7400a | 528 | #if 0 |
6ac48b45 MCC |
529 | {0x050, /* Teletext, PAL, WST System C */ |
530 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
531 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
532 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 533 | }, |
6ac48b45 MCC |
534 | {0x070, /* Teletext, NTSC, WST System B */ |
535 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
536 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
537 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 538 | }, |
6ac48b45 MCC |
539 | {0x090, /* Tetetext, NTSC NABTS System C */ |
540 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
541 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
542 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 543 | }, |
6ac48b45 MCC |
544 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
545 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
546 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
547 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 548 | }, |
6ac48b45 MCC |
549 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
550 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
551 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
552 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 553 | }, |
9bc7400a | 554 | #endif |
6ac48b45 MCC |
555 | {0x0f0, /* Closed Caption, NTSC */ |
556 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
557 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
558 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 559 | }, |
6ac48b45 | 560 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 561 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
562 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
563 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 564 | }, |
9bc7400a | 565 | #if 0 |
6ac48b45 MCC |
566 | {0x130, /* Wide Screen Signal, NTSC C */ |
567 | {V4L2_SLICED_WSS_525,20,20,1}, | |
568 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
569 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 570 | }, |
6ac48b45 MCC |
571 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
572 | {V4l2_SLICED_VITC_625,6,22,0}, | |
573 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
574 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 575 | }, |
6ac48b45 MCC |
576 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
577 | {V4l2_SLICED_VITC_525,10,20,0}, | |
578 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
579 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 580 | }, |
9bc7400a | 581 | #endif |
6ac48b45 MCC |
582 | {0x190, /* Video Program System (VPS), PAL */ |
583 | {V4L2_SLICED_VPS,16,16,0}, | |
584 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
585 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 586 | }, |
6ac48b45 MCC |
587 | /* 0x1d0 User programmable */ |
588 | ||
589 | /* End of struct */ | |
590 | { (u16)-1 } | |
e1bc80ad | 591 | }; |
4c86f973 | 592 | |
6b8fe025 | 593 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 594 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
595 | { |
596 | while (regs->reg != 0xff) { | |
6b8fe025 | 597 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
598 | regs++; |
599 | } | |
600 | return 0; | |
601 | } | |
84486d53 | 602 | |
6b8fe025 | 603 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 604 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
605 | { |
606 | unsigned int i; | |
cd4665c5 | 607 | |
e1bc80ad | 608 | /* Disable Full Field */ |
6b8fe025 | 609 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 610 | |
e1bc80ad | 611 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
612 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
613 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 614 | |
e1bc80ad | 615 | /* Load Ram Table */ |
6b8fe025 HV |
616 | while (regs->reg != (u16)-1) { |
617 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
618 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 619 | |
6b8fe025 HV |
620 | for (i = 0; i < 16; i++) |
621 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 622 | |
e1bc80ad MCC |
623 | regs++; |
624 | } | |
625 | return 0; | |
626 | } | |
cd4665c5 | 627 | |
6ac48b45 | 628 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 629 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
630 | struct v4l2_sliced_vbi_cap *cap) |
631 | { | |
6b8fe025 | 632 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
633 | int line; |
634 | ||
6b8fe025 | 635 | v4l2_dbg(1, debug, sd, "VIDIOC_G_SLICED_VBI_CAP\n"); |
6ac48b45 MCC |
636 | memset(cap, 0, sizeof *cap); |
637 | ||
638 | while (regs->reg != (u16)-1 ) { | |
639 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
640 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
641 | } | |
642 | cap->service_set |= regs->type.vbi_type; | |
643 | ||
644 | regs++; | |
645 | } | |
6b8fe025 | 646 | return 0; |
6ac48b45 MCC |
647 | } |
648 | ||
3ad96835 MCC |
649 | /* Set vbi processing |
650 | * type - one of tvp5150_vbi_types | |
651 | * line - line to gather data | |
652 | * fields: bit 0 field1, bit 1, field2 | |
653 | * flags (default=0xf0) is a bitmask, were set means: | |
654 | * bit 7: enable filtering null bytes on CC | |
655 | * bit 6: send data also to FIFO | |
656 | * bit 5: don't allow data with errors on FIFO | |
657 | * bit 4: enable ECC when possible | |
658 | * pix_align = pix alignment: | |
659 | * LSB = field1 | |
660 | * MSB = field2 | |
661 | */ | |
6b8fe025 | 662 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
663 | const struct i2c_vbi_ram_value *regs, |
664 | unsigned int type,u8 flags, int line, | |
665 | const int fields) | |
3ad96835 | 666 | { |
6b8fe025 HV |
667 | struct tvp5150 *decoder = to_tvp5150(sd); |
668 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 669 | u8 reg; |
2701dacb | 670 | int pos=0; |
3ad96835 MCC |
671 | |
672 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 673 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 674 | return 0; |
7d5b7b98 | 675 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
676 | /* Don't follow NTSC Line number convension */ |
677 | line += 3; | |
678 | } | |
679 | ||
680 | if (line<6||line>27) | |
2701dacb MCC |
681 | return 0; |
682 | ||
683 | while (regs->reg != (u16)-1 ) { | |
684 | if ((type & regs->type.vbi_type) && | |
685 | (line>=regs->type.ini_line) && | |
686 | (line<=regs->type.end_line)) { | |
687 | type=regs->type.vbi_type; | |
688 | break; | |
689 | } | |
690 | ||
691 | regs++; | |
692 | pos++; | |
693 | } | |
694 | if (regs->reg == (u16)-1) | |
695 | return 0; | |
3ad96835 | 696 | |
2701dacb | 697 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
698 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
699 | ||
700 | if (fields&1) { | |
6b8fe025 | 701 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
702 | } |
703 | ||
704 | if (fields&2) { | |
6b8fe025 | 705 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
706 | } |
707 | ||
2701dacb | 708 | return type; |
3ad96835 MCC |
709 | } |
710 | ||
6b8fe025 | 711 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
712 | const struct i2c_vbi_ram_value *regs, int line) |
713 | { | |
6b8fe025 HV |
714 | struct tvp5150 *decoder = to_tvp5150(sd); |
715 | v4l2_std_id std = decoder->norm; | |
12db5607 | 716 | u8 reg; |
6b8fe025 | 717 | int pos, type = 0; |
12db5607 MCC |
718 | |
719 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 720 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 721 | return 0; |
7d5b7b98 | 722 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
723 | /* Don't follow NTSC Line number convension */ |
724 | line += 3; | |
725 | } | |
726 | ||
6b8fe025 | 727 | if (line < 6 || line > 27) |
12db5607 MCC |
728 | return 0; |
729 | ||
6b8fe025 | 730 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 731 | |
6b8fe025 HV |
732 | pos = tvp5150_read(sd, reg) & 0x0f; |
733 | if (pos < 0x0f) | |
734 | type = regs[pos].type.vbi_type; | |
12db5607 | 735 | |
6b8fe025 HV |
736 | pos = tvp5150_read(sd, reg + 1) & 0x0f; |
737 | if (pos < 0x0f) | |
738 | type |= regs[pos].type.vbi_type; | |
12db5607 MCC |
739 | |
740 | return type; | |
741 | } | |
6b8fe025 HV |
742 | |
743 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 744 | { |
6b8fe025 HV |
745 | struct tvp5150 *decoder = to_tvp5150(sd); |
746 | int fmt = 0; | |
e1bc80ad | 747 | |
6b8fe025 | 748 | decoder->norm = std; |
e1bc80ad MCC |
749 | |
750 | /* First tests should be against specific std */ | |
751 | ||
752 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 753 | fmt = 0; /* Autodetect mode */ |
e1bc80ad | 754 | } else if (std & V4L2_STD_NTSC_443) { |
6b8fe025 | 755 | fmt = 0xa; |
e1bc80ad | 756 | } else if (std & V4L2_STD_PAL_M) { |
6b8fe025 HV |
757 | fmt = 0x6; |
758 | } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) { | |
759 | fmt = 0x8; | |
e1bc80ad MCC |
760 | } else { |
761 | /* Then, test against generic ones */ | |
6b8fe025 HV |
762 | if (std & V4L2_STD_NTSC) |
763 | fmt = 0x2; | |
764 | else if (std & V4L2_STD_PAL) | |
765 | fmt = 0x4; | |
766 | else if (std & V4L2_STD_SECAM) | |
767 | fmt = 0xc; | |
e1bc80ad | 768 | } |
84486d53 | 769 | |
6b8fe025 HV |
770 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
771 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
772 | return 0; |
773 | } | |
774 | ||
6b8fe025 HV |
775 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
776 | { | |
777 | struct tvp5150 *decoder = to_tvp5150(sd); | |
778 | ||
779 | if (decoder->norm == std) | |
780 | return 0; | |
781 | ||
782 | return tvp5150_set_std(sd, std); | |
783 | } | |
784 | ||
785 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 786 | { |
6b8fe025 | 787 | struct tvp5150 *decoder = to_tvp5150(sd); |
e36eaa71 | 788 | u8 msb_id, lsb_id, msb_rom, lsb_rom; |
e1bc80ad | 789 | |
6b8fe025 HV |
790 | msb_id = tvp5150_read(sd, TVP5150_MSB_DEV_ID); |
791 | lsb_id = tvp5150_read(sd, TVP5150_LSB_DEV_ID); | |
792 | msb_rom = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER); | |
793 | lsb_rom = tvp5150_read(sd, TVP5150_ROM_MINOR_VER); | |
e1bc80ad | 794 | |
6b8fe025 HV |
795 | if (msb_rom == 4 && lsb_rom == 0) { /* Is TVP5150AM1 */ |
796 | v4l2_info(sd, "tvp%02x%02xam1 detected.\n", msb_id, lsb_id); | |
e36eaa71 MCC |
797 | |
798 | /* ITU-T BT.656.4 timing */ | |
6b8fe025 | 799 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); |
e1bc80ad | 800 | } else { |
6b8fe025 HV |
801 | if (msb_rom == 3 || lsb_rom == 0x21) { /* Is TVP5150A */ |
802 | v4l2_info(sd, "tvp%02x%02xa detected.\n", msb_id, lsb_id); | |
e36eaa71 | 803 | } else { |
6b8fe025 HV |
804 | v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n", |
805 | msb_id, lsb_id); | |
806 | v4l2_info(sd, "*** Rom ver is %d.%d\n", msb_rom, lsb_rom); | |
e36eaa71 | 807 | } |
e1bc80ad | 808 | } |
84486d53 | 809 | |
e1bc80ad | 810 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 811 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
812 | |
813 | /* Initializes VDP registers */ | |
6b8fe025 | 814 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
815 | |
816 | /* Selects decoder input */ | |
6b8fe025 | 817 | tvp5150_selmux(sd); |
e1bc80ad MCC |
818 | |
819 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 820 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
821 | |
822 | /* Initialize image preferences */ | |
6b8fe025 HV |
823 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, decoder->bright); |
824 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, decoder->contrast); | |
825 | tvp5150_write(sd, TVP5150_SATURATION_CTL, decoder->contrast); | |
826 | tvp5150_write(sd, TVP5150_HUE_CTL, decoder->hue); | |
e1bc80ad | 827 | |
6b8fe025 HV |
828 | tvp5150_set_std(sd, decoder->norm); |
829 | return 0; | |
cd4665c5 MCC |
830 | }; |
831 | ||
6b8fe025 | 832 | static int tvp5150_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
a6c2ba28 | 833 | { |
6b8fe025 | 834 | v4l2_dbg(1, debug, sd, "VIDIOC_G_CTRL called\n"); |
a6c2ba28 | 835 | |
836 | switch (ctrl->id) { | |
837 | case V4L2_CID_BRIGHTNESS: | |
6b8fe025 | 838 | ctrl->value = tvp5150_read(sd, TVP5150_BRIGHT_CTL); |
a6c2ba28 | 839 | return 0; |
840 | case V4L2_CID_CONTRAST: | |
6b8fe025 | 841 | ctrl->value = tvp5150_read(sd, TVP5150_CONTRAST_CTL); |
a6c2ba28 | 842 | return 0; |
843 | case V4L2_CID_SATURATION: | |
6b8fe025 | 844 | ctrl->value = tvp5150_read(sd, TVP5150_SATURATION_CTL); |
a6c2ba28 | 845 | return 0; |
846 | case V4L2_CID_HUE: | |
6b8fe025 | 847 | ctrl->value = tvp5150_read(sd, TVP5150_HUE_CTL); |
a6c2ba28 | 848 | return 0; |
a6c2ba28 | 849 | } |
c0477ad9 | 850 | return -EINVAL; |
a6c2ba28 | 851 | } |
852 | ||
6b8fe025 | 853 | static int tvp5150_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
a6c2ba28 | 854 | { |
6b8fe025 HV |
855 | u8 i, n; |
856 | n = ARRAY_SIZE(tvp5150_qctrl); | |
857 | ||
858 | for (i = 0; i < n; i++) { | |
859 | if (ctrl->id != tvp5150_qctrl[i].id) | |
860 | continue; | |
861 | if (ctrl->value < tvp5150_qctrl[i].minimum || | |
862 | ctrl->value > tvp5150_qctrl[i].maximum) | |
863 | return -ERANGE; | |
864 | v4l2_dbg(1, debug, sd, "VIDIOC_S_CTRL: id=%d, value=%d\n", | |
865 | ctrl->id, ctrl->value); | |
866 | break; | |
867 | } | |
a6c2ba28 | 868 | |
869 | switch (ctrl->id) { | |
870 | case V4L2_CID_BRIGHTNESS: | |
6b8fe025 | 871 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->value); |
a6c2ba28 | 872 | return 0; |
873 | case V4L2_CID_CONTRAST: | |
6b8fe025 | 874 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->value); |
a6c2ba28 | 875 | return 0; |
876 | case V4L2_CID_SATURATION: | |
6b8fe025 | 877 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->value); |
a6c2ba28 | 878 | return 0; |
879 | case V4L2_CID_HUE: | |
6b8fe025 | 880 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->value); |
a6c2ba28 | 881 | return 0; |
a6c2ba28 | 882 | } |
c0477ad9 | 883 | return -EINVAL; |
a6c2ba28 | 884 | } |
885 | ||
84486d53 MCC |
886 | /**************************************************************************** |
887 | I2C Command | |
888 | ****************************************************************************/ | |
c7c0b34c | 889 | |
6b8fe025 HV |
890 | static int tvp5150_s_routing(struct v4l2_subdev *sd, const struct v4l2_routing *route) |
891 | { | |
892 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 893 | |
6b8fe025 HV |
894 | decoder->route = *route; |
895 | tvp5150_selmux(sd); | |
896 | return 0; | |
897 | } | |
6ac48b45 | 898 | |
6b8fe025 HV |
899 | static int tvp5150_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) |
900 | { | |
901 | struct v4l2_sliced_vbi_format *svbi; | |
902 | int i; | |
903 | ||
904 | /* raw vbi */ | |
905 | if (fmt->type == V4L2_BUF_TYPE_VBI_CAPTURE) { | |
906 | /* this is for capturing 36 raw vbi lines | |
907 | if there's a way to cut off the beginning 2 vbi lines | |
908 | with the tvp5150 then the vbi line count could be lowered | |
909 | to 17 lines/field again, although I couldn't find a register | |
910 | which could do that cropping */ | |
911 | if (fmt->fmt.vbi.sample_format == V4L2_PIX_FMT_GREY) | |
912 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
913 | if (fmt->fmt.vbi.count[0] == 18 && fmt->fmt.vbi.count[1] == 18) { | |
914 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
915 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
916 | } | |
917 | return 0; | |
6ac48b45 | 918 | } |
6b8fe025 HV |
919 | if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) |
920 | return -EINVAL; | |
921 | svbi = &fmt->fmt.sliced; | |
922 | if (svbi->service_set != 0) { | |
923 | for (i = 0; i <= 23; i++) { | |
924 | svbi->service_lines[1][i] = 0; | |
925 | svbi->service_lines[0][i] = | |
926 | tvp5150_set_vbi(sd, vbi_ram_default, | |
927 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 928 | } |
6b8fe025 HV |
929 | /* Enables FIFO */ |
930 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
931 | } else { | |
932 | /* Disables FIFO*/ | |
933 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 934 | |
6b8fe025 HV |
935 | /* Disable Full Field */ |
936 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 937 | |
6b8fe025 HV |
938 | /* Disable Line modes */ |
939 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
940 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 941 | } |
6b8fe025 HV |
942 | return 0; |
943 | } | |
12db5607 | 944 | |
6b8fe025 HV |
945 | static int tvp5150_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) |
946 | { | |
947 | struct v4l2_sliced_vbi_format *svbi; | |
948 | int i, mask = 0; | |
12db5607 | 949 | |
6b8fe025 HV |
950 | if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) |
951 | return -EINVAL; | |
952 | svbi = &fmt->fmt.sliced; | |
953 | memset(svbi, 0, sizeof(*svbi)); | |
12db5607 | 954 | |
6b8fe025 HV |
955 | for (i = 0; i <= 23; i++) { |
956 | svbi->service_lines[0][i] = | |
957 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
958 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 959 | } |
6b8fe025 HV |
960 | svbi->service_set = mask; |
961 | return 0; | |
962 | } | |
963 | ||
12db5607 | 964 | |
bc974305 | 965 | static int tvp5150_g_chip_ident(struct v4l2_subdev *sd, |
aecde8b5 | 966 | struct v4l2_dbg_chip_ident *chip) |
bc974305 MCC |
967 | { |
968 | int rev; | |
969 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
970 | ||
971 | rev = tvp5150_read(sd, TVP5150_ROM_MAJOR_VER) << 8 | | |
972 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER); | |
973 | ||
974 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP5150, | |
975 | rev); | |
976 | } | |
977 | ||
978 | ||
21dcd8cc | 979 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 980 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 HV |
981 | { |
982 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
21dcd8cc | 983 | |
aecde8b5 | 984 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
985 | return -EINVAL; |
986 | if (!capable(CAP_SYS_ADMIN)) | |
987 | return -EPERM; | |
988 | reg->val = tvp5150_read(sd, reg->reg & 0xff); | |
aecde8b5 | 989 | reg->size = 1; |
6b8fe025 HV |
990 | return 0; |
991 | } | |
84486d53 | 992 | |
aecde8b5 | 993 | static int tvp5150_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 HV |
994 | { |
995 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
84486d53 | 996 | |
aecde8b5 | 997 | if (!v4l2_chip_match_i2c_client(client, ®->match)) |
6b8fe025 HV |
998 | return -EINVAL; |
999 | if (!capable(CAP_SYS_ADMIN)) | |
1000 | return -EPERM; | |
1001 | tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); | |
1002 | return 0; | |
1003 | } | |
1004 | #endif | |
a6c2ba28 | 1005 | |
6b8fe025 HV |
1006 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1007 | { | |
1008 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 1009 | |
6b8fe025 HV |
1010 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
1011 | return 0; | |
1012 | } | |
a6c2ba28 | 1013 | |
6b8fe025 HV |
1014 | static int tvp5150_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc) |
1015 | { | |
1016 | int i; | |
a6c2ba28 | 1017 | |
6b8fe025 HV |
1018 | v4l2_dbg(1, debug, sd, "VIDIOC_QUERYCTRL called\n"); |
1019 | ||
1020 | for (i = 0; i < ARRAY_SIZE(tvp5150_qctrl); i++) | |
1021 | if (qc->id && qc->id == tvp5150_qctrl[i].id) { | |
1022 | memcpy(qc, &(tvp5150_qctrl[i]), | |
1023 | sizeof(*qc)); | |
1024 | return 0; | |
a6c2ba28 | 1025 | } |
1026 | ||
6b8fe025 HV |
1027 | return -EINVAL; |
1028 | } | |
84486d53 | 1029 | |
6b8fe025 HV |
1030 | static int tvp5150_command(struct i2c_client *client, unsigned cmd, void *arg) |
1031 | { | |
1032 | return v4l2_subdev_command(i2c_get_clientdata(client), cmd, arg); | |
84486d53 | 1033 | } |
cd4665c5 | 1034 | |
6b8fe025 HV |
1035 | /* ----------------------------------------------------------------------- */ |
1036 | ||
1037 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { | |
1038 | .log_status = tvp5150_log_status, | |
1039 | .g_ctrl = tvp5150_g_ctrl, | |
1040 | .s_ctrl = tvp5150_s_ctrl, | |
1041 | .queryctrl = tvp5150_queryctrl, | |
1042 | .reset = tvp5150_reset, | |
bc974305 | 1043 | .g_chip_ident = tvp5150_g_chip_ident, |
6b8fe025 HV |
1044 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1045 | .g_register = tvp5150_g_register, | |
1046 | .s_register = tvp5150_s_register, | |
1047 | #endif | |
1048 | }; | |
1049 | ||
1050 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
1051 | .s_std = tvp5150_s_std, | |
1052 | .g_tuner = tvp5150_g_tuner, | |
1053 | }; | |
1054 | ||
1055 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
1056 | .s_routing = tvp5150_s_routing, | |
1057 | .g_fmt = tvp5150_g_fmt, | |
1058 | .s_fmt = tvp5150_s_fmt, | |
1059 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, | |
1060 | }; | |
1061 | ||
1062 | static const struct v4l2_subdev_ops tvp5150_ops = { | |
1063 | .core = &tvp5150_core_ops, | |
1064 | .tuner = &tvp5150_tuner_ops, | |
1065 | .video = &tvp5150_video_ops, | |
1066 | }; | |
1067 | ||
1068 | ||
cd4665c5 MCC |
1069 | /**************************************************************************** |
1070 | I2C Client & Driver | |
1071 | ****************************************************************************/ | |
cd4665c5 | 1072 | |
6b8fe025 HV |
1073 | static int tvp5150_probe(struct i2c_client *c, |
1074 | const struct i2c_device_id *id) | |
cd4665c5 | 1075 | { |
cd4665c5 | 1076 | struct tvp5150 *core; |
6b8fe025 | 1077 | struct v4l2_subdev *sd; |
cd4665c5 MCC |
1078 | |
1079 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1080 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1081 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1082 | return -EIO; |
cd4665c5 | 1083 | |
7408187d | 1084 | core = kzalloc(sizeof(struct tvp5150), GFP_KERNEL); |
5fa1247a | 1085 | if (!core) { |
cd4665c5 MCC |
1086 | return -ENOMEM; |
1087 | } | |
6b8fe025 HV |
1088 | sd = &core->sd; |
1089 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); | |
1090 | v4l_info(c, "chip found @ 0x%02x (%s)\n", | |
1091 | c->addr << 1, c->adapter->name); | |
cd4665c5 | 1092 | |
3ad96835 | 1093 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
c7c0b34c | 1094 | core->route.input = TVP5150_COMPOSITE1; |
4c86f973 | 1095 | core->enable = 1; |
032c2028 MCC |
1096 | core->bright = 128; |
1097 | core->contrast = 128; | |
1098 | core->hue = 0; | |
1099 | core->sat = 128; | |
4c86f973 | 1100 | |
f1e5ee45 | 1101 | if (debug > 1) |
6b8fe025 | 1102 | tvp5150_log_status(sd); |
cd4665c5 MCC |
1103 | return 0; |
1104 | } | |
1105 | ||
6b8fe025 | 1106 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1107 | { |
6b8fe025 | 1108 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
cd4665c5 | 1109 | |
6b8fe025 | 1110 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1111 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1112 | c->addr << 1); | |
1113 | ||
6b8fe025 HV |
1114 | v4l2_device_unregister_subdev(sd); |
1115 | kfree(to_tvp5150(sd)); | |
cd4665c5 MCC |
1116 | return 0; |
1117 | } | |
1118 | ||
1119 | /* ----------------------------------------------------------------------- */ | |
1120 | ||
6b8fe025 HV |
1121 | static const struct i2c_device_id tvp5150_id[] = { |
1122 | { "tvp5150", 0 }, | |
1123 | { } | |
1124 | }; | |
1125 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1126 | |
6b8fe025 HV |
1127 | static struct v4l2_i2c_driver_data v4l2_i2c_data = { |
1128 | .name = "tvp5150", | |
1129 | .driverid = I2C_DRIVERID_TVP5150, | |
84486d53 | 1130 | .command = tvp5150_command, |
6b8fe025 HV |
1131 | .probe = tvp5150_probe, |
1132 | .remove = tvp5150_remove, | |
1133 | .legacy_class = I2C_CLASS_TV_ANALOG | I2C_CLASS_TV_DIGITAL, | |
1134 | .id_table = tvp5150_id, | |
cd4665c5 | 1135 | }; |