]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/media/video/tvp7002.c
projects / mirror_ubuntu-bionic-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/linux-dm
[mirror_ubuntu-bionic-kernel.git] / drivers / media / video / tvp7002.c
CommitLineData
0b675536
SNC		 1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
3 *
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6 *
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#include <linux/delay.h>
28#include <linux/i2c.h>
5a0e3ad6 29#include <linux/slab.h>
0b675536
SNC		 30#include <linux/videodev2.h>
31#include <media/tvp7002.h>
32#include <media/v4l2-device.h>
33#include <media/v4l2-chip-ident.h>
34#include <media/v4l2-common.h>
0eb73de0 35#include <media/v4l2-ctrls.h>
0b675536
SNC		 36#include "tvp7002_reg.h"
37
38MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
39MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
40MODULE_LICENSE("GPL");
41
42/* Module Name */
43#define TVP7002_MODULE_NAME "tvp7002"
44
45/* I2C retry attempts */
46#define I2C_RETRY_COUNT (5)
47
48/* End of registers */
49#define TVP7002_EOR 0x5c
50
51/* Read write definition for registers */
52#define TVP7002_READ 0
53#define TVP7002_WRITE 1
54#define TVP7002_RESERVED 2
55
56/* Interlaced vs progressive mask and shift */
57#define TVP7002_IP_SHIFT 5
58#define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
59
60/* Shift for CPL and LPF registers */
61#define TVP7002_CL_SHIFT 8
62#define TVP7002_CL_MASK 0x0f
63
64/* Debug functions */
65static int debug;
66module_param(debug, bool, 0644);
67MODULE_PARM_DESC(debug, "Debug level (0-2)");
68
69/* Structure for register values */
70struct i2c_reg_value {
71 u8 reg;
72 u8 value;
73 u8 type;
74};
75
76/*
77 * Register default values (according to tvp7002 datasheet)
78 * In the case of read-only registers, the value (0xff) is
79 * never written. R/W functionality is controlled by the
80 * writable bit in the register struct definition.
81 */
82static const struct i2c_reg_value tvp7002_init_default[] = {
83 { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
84 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
85 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
86 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
87 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
88 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
89 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
90 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
91 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
92 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
93 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
94 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
95 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
96 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
97 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
98 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
99 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
100 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
101 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
102 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
103 { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
104 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
105 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
106 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
107 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
108 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
109 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
110 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
111 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
112 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
113 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
114 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
115 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
116 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
117 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
118 { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
119 { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
120 { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
121 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
122 { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
123 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
124 { 0x29, 0x08, TVP7002_RESERVED },
125 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
126 /* PWR_CTL is controlled only by the probe and reset functions */
127 { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
128 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
129 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
130 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
425b91c9 131 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE },
0b675536
SNC		 132 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
133 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
134 { 0x32, 0x18, TVP7002_RESERVED },
135 { 0x33, 0x60, TVP7002_RESERVED },
136 { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
137 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
138 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
139 { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
140 { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
141 { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
142 { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
143 { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
144 { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
145 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
146 { 0x3e, 0x60, TVP7002_RESERVED },
147 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
148 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
149 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
150 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
151 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
152 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
153 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
154 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
155 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
156 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
157 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
158 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
159 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
160 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
161 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
162 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
163 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
164 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
165 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
166 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
167 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
168 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
169 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
170 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
171 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
172 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
173 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
174 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
175 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
176 /* This signals end of register values */
177 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
178};
179
180/* Register parameters for 480P */
181static const struct i2c_reg_value tvp7002_parms_480P[] = {
182 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
560afa7d 183 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
0b675536 184 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
0b675536
SNC		 185 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
186 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
187 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
188 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
189 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
190 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
191 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
192 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
193 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
194 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
195 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
196 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
197 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
198 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
199};
200
201/* Register parameters for 576P */
202static const struct i2c_reg_value tvp7002_parms_576P[] = {
203 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
204 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
205 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
0b675536
SNC		 206 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
207 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
208 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
209 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
210 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
211 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
212 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
213 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
214 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
215 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
216 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
217 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
218 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
219 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
220};
221
222/* Register parameters for 1080I60 */
223static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
224 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
560afa7d 225 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
0b675536 226 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
0b675536
SNC		 227 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
228 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
229 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
230 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
231 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
232 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
233 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
234 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
235 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
236 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
237 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
238 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
239 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
240 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
241};
242
243/* Register parameters for 1080P60 */
244static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
245 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
560afa7d 246 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
0b675536 247 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
0b675536
SNC		 248 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
249 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
250 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
251 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
252 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
253 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
254 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
255 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
256 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
257 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
258 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
259 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
260 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
261 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
262};
263
264/* Register parameters for 1080I50 */
265static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
266 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
267 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
268 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
0b675536
SNC		 269 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
270 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
271 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
272 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
273 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
274 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
275 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
276 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
277 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
278 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
279 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
280 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
281 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
282 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
283};
284
285/* Register parameters for 720P60 */
286static const struct i2c_reg_value tvp7002_parms_720P60[] = {
287 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
560afa7d 288 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
0b675536 289 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
0b675536
SNC		 290 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
291 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
292 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
293 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
294 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
295 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
296 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
297 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
298 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
299 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
300 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
301 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
302 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
303 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
304};
305
306/* Register parameters for 720P50 */
307static const struct i2c_reg_value tvp7002_parms_720P50[] = {
308 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
560afa7d 309 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
0b675536 310 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
0b675536
SNC		 311 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
312 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
313 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
314 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
315 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
316 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
317 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
318 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
319 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
320 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
321 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
322 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
323 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
324 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
325};
326
0b675536
SNC		 327/* Preset definition for handling device operation */
328struct tvp7002_preset_definition {
329 u32 preset;
330 const struct i2c_reg_value *p_settings;
331 enum v4l2_colorspace color_space;
332 enum v4l2_field scanmode;
333 u16 progressive;
334 u16 lines_per_frame;
335 u16 cpl_min;
336 u16 cpl_max;
337};
338
339/* Struct list for digital video presets */
340static const struct tvp7002_preset_definition tvp7002_presets[] = {
341 {
342 V4L2_DV_720P60,
343 tvp7002_parms_720P60,
344 V4L2_COLORSPACE_REC709,
345 V4L2_FIELD_NONE,
346 1,
347 0x2EE,
348 135,
349 153
350 },
351 {
352 V4L2_DV_1080I60,
353 tvp7002_parms_1080I60,
354 V4L2_COLORSPACE_REC709,
355 V4L2_FIELD_INTERLACED,
356 0,
357 0x465,
358 181,
359 205
360 },
361 {
362 V4L2_DV_1080I50,
363 tvp7002_parms_1080I50,
364 V4L2_COLORSPACE_REC709,
365 V4L2_FIELD_INTERLACED,
366 0,
367 0x465,
368 217,
369 245
370 },
371 {
372 V4L2_DV_720P50,
373 tvp7002_parms_720P50,
374 V4L2_COLORSPACE_REC709,
375 V4L2_FIELD_NONE,
376 1,
377 0x2EE,
378 163,
379 183
380 },
381 {
382 V4L2_DV_1080P60,
383 tvp7002_parms_1080P60,
384 V4L2_COLORSPACE_REC709,
385 V4L2_FIELD_NONE,
386 1,
387 0x465,
388 90,
389 102
390 },
391 {
392 V4L2_DV_480P59_94,
393 tvp7002_parms_480P,
394 V4L2_COLORSPACE_SMPTE170M,
395 V4L2_FIELD_NONE,
396 1,
397 0x20D,
398 0xffff,
399 0xffff
400 },
401 {
402 V4L2_DV_576P50,
403 tvp7002_parms_576P,
404 V4L2_COLORSPACE_SMPTE170M,
405 V4L2_FIELD_NONE,
406 1,
407 0x271,
408 0xffff,
409 0xffff
410 }
411};
412
413#define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
414
415/* Device definition */
416struct tvp7002 {
417 struct v4l2_subdev sd;
0eb73de0 418 struct v4l2_ctrl_handler hdl;
0b675536
SNC		 419 const struct tvp7002_config *pdata;
420
421 int ver;
422 int streaming;
423
0b675536 424 const struct tvp7002_preset_definition *current_preset;
0b675536
SNC		 425};
426
427/*
428 * to_tvp7002 - Obtain device handler TVP7002
429 * @sd: ptr to v4l2_subdev struct
430 *
431 * Returns device handler tvp7002.
432 */
433static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
434{
435 return container_of(sd, struct tvp7002, sd);
436}
437
0eb73de0
HV		 438static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
439{
440 return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
441}
442
0b675536
SNC		 443/*
444 * tvp7002_read - Read a value from a register in an TVP7002
445 * @sd: ptr to v4l2_subdev struct
6fa7dac4 446 * @addr: TVP7002 register address
0b675536
SNC		 447 * @dst: pointer to 8-bit destination
448 *
449 * Returns value read if successful, or non-zero (-1) otherwise.
450 */
451static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
452{
453 struct i2c_client *c = v4l2_get_subdevdata(sd);
454 int retry;
455 int error;
456
457 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
458 error = i2c_smbus_read_byte_data(c, addr);
459
460 if (error >= 0) {
461 *dst = (u8)error;
462 return 0;
463 }
464
465 msleep_interruptible(10);
466 }
467 v4l2_err(sd, "TVP7002 read error %d\n", error);
468 return error;
469}
470
471/*
472 * tvp7002_read_err() - Read a register value with error code
473 * @sd: pointer to standard V4L2 sub-device structure
474 * @reg: destination register
475 * @val: value to be read
6fa7dac4 476 * @err: pointer to error value
0b675536
SNC		 477 *
478 * Read a value in a register and save error value in pointer.
479 * Also update the register table if successful
480 */
481static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
482 u8 *dst, int *err)
483{
484 if (!*err)
485 *err = tvp7002_read(sd, reg, dst);
486}
487
488/*
489 * tvp7002_write() - Write a value to a register in TVP7002
490 * @sd: ptr to v4l2_subdev struct
491 * @addr: TVP7002 register address
492 * @value: value to be written to the register
493 *
494 * Write a value to a register in an TVP7002 decoder device.
495 * Returns zero if successful, or non-zero otherwise.
496 */
497static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
498{
499 struct i2c_client *c;
500 int retry;
501 int error;
502
503 c = v4l2_get_subdevdata(sd);
504
505 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
506 error = i2c_smbus_write_byte_data(c, addr, value);
507
508 if (error >= 0)
509 return 0;
510
511 v4l2_warn(sd, "Write: retry ... %d\n", retry);
512 msleep_interruptible(10);
513 }
514 v4l2_err(sd, "TVP7002 write error %d\n", error);
515 return error;
516}
517
518/*
519 * tvp7002_write_err() - Write a register value with error code
520 * @sd: pointer to standard V4L2 sub-device structure
521 * @reg: destination register
522 * @val: value to be written
6fa7dac4 523 * @err: pointer to error value
0b675536
SNC		 524 *
525 * Write a value in a register and save error value in pointer.
526 * Also update the register table if successful
527 */
528static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
529 u8 val, int *err)
530{
531 if (!*err)
532 *err = tvp7002_write(sd, reg, val);
533}
534
535/*
536 * tvp7002_g_chip_ident() - Get chip identification number
537 * @sd: ptr to v4l2_subdev struct
538 * @chip: ptr to v4l2_dbg_chip_ident struct
539 *
540 * Obtains the chip's identification number.
541 * Returns zero or -EINVAL if read operation fails.
542 */
543static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
544 struct v4l2_dbg_chip_ident *chip)
545{
546 u8 rev;
547 int error;
548 struct i2c_client *client = v4l2_get_subdevdata(sd);
549
550 error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
551
552 if (error < 0)
553 return error;
554
555 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
556}
557
558/*
559 * tvp7002_write_inittab() - Write initialization values
560 * @sd: ptr to v4l2_subdev struct
561 * @regs: ptr to i2c_reg_value struct
562 *
563 * Write initialization values.
564 * Returns zero or -EINVAL if read operation fails.
565 */
566static int tvp7002_write_inittab(struct v4l2_subdev *sd,
567 const struct i2c_reg_value *regs)
568{
569 int error = 0;
570
571 /* Initialize the first (defined) registers */
572 while (TVP7002_EOR != regs->reg) {
573 if (TVP7002_WRITE == regs->type)
574 tvp7002_write_err(sd, regs->reg, regs->value, &error);
575 regs++;
576 }
577
578 return error;
579}
580
581/*
582 * tvp7002_s_dv_preset() - Set digital video preset
583 * @sd: ptr to v4l2_subdev struct
6fa7dac4 584 * @dv_preset: ptr to v4l2_dv_preset struct
0b675536
SNC		 585 *
586 * Set the digital video preset for a TVP7002 decoder device.
587 * Returns zero when successful or -EINVAL if register access fails.
588 */
589static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
590 struct v4l2_dv_preset *dv_preset)
591{
592 struct tvp7002 *device = to_tvp7002(sd);
593 u32 preset;
594 int i;
595
596 for (i = 0; i < NUM_PRESETS; i++) {
597 preset = tvp7002_presets[i].preset;
598 if (preset == dv_preset->preset) {
599 device->current_preset = &tvp7002_presets[i];
600 return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
601 }
602 }
603
604 return -EINVAL;
605}
606
0b675536
SNC		 607/*
608 * tvp7002_s_ctrl() - Set a control
0eb73de0 609 * @ctrl: ptr to v4l2_ctrl struct
0b675536
SNC		 610 *
611 * Set a control in TVP7002 decoder device.
612 * Returns zero when successful or -EINVAL if register access fails.
613 */
0eb73de0 614static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
0b675536 615{
0eb73de0 616 struct v4l2_subdev *sd = to_sd(ctrl);
0b675536
SNC		 617 int error = 0;
618
619 switch (ctrl->id) {
620 case V4L2_CID_GAIN:
0eb73de0
HV		 621 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
622 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
623 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
624 return error;
0b675536 625 }
0eb73de0 626 return -EINVAL;
0b675536
SNC		 627}
628
db7b5460
HV		 629/*
630 * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
631 * @sd: pointer to standard V4L2 sub-device structure
632 * @f: pointer to mediabus format structure
633 *
634 * Negotiate the image capture size and mediabus format.
635 * There is only one possible format, so this single function works for
636 * get, set and try.
637 */
638static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
639{
640 struct tvp7002 *device = to_tvp7002(sd);
641 struct v4l2_dv_enum_preset e_preset;
642 int error;
643
644 /* Calculate height and width based on current standard */
645 error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
646 if (error)
647 return error;
648
649 f->width = e_preset.width;
650 f->height = e_preset.height;
651 f->code = V4L2_MBUS_FMT_YUYV10_1X20;
652 f->field = device->current_preset->scanmode;
653 f->colorspace = device->current_preset->color_space;
654
655 v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d",
656 f->width, f->height);
657 return 0;
658}
659
0b675536
SNC		 660/*
661 * tvp7002_query_dv_preset() - query DV preset
662 * @sd: pointer to standard V4L2 sub-device structure
6fa7dac4 663 * @qpreset: standard V4L2 v4l2_dv_preset structure
0b675536
SNC		 664 *
665 * Returns the current DV preset by TVP7002. If no active input is
666 * detected, returns -EINVAL
667 */
668static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
669 struct v4l2_dv_preset *qpreset)
670{
671 const struct tvp7002_preset_definition *presets = tvp7002_presets;
0b675536
SNC		 672 struct tvp7002 *device;
673 u8 progressive;
674 u32 lpfr;
675 u32 cpln;
676 int error = 0;
677 u8 lpf_lsb;
678 u8 lpf_msb;
679 u8 cpl_lsb;
680 u8 cpl_msb;
681 int index;
682
ab0ab190
MR		 683 /* Return invalid preset if no active input is detected */
684 qpreset->preset = V4L2_DV_INVALID;
685
0b675536
SNC		 686 device = to_tvp7002(sd);
687
688 /* Read standards from device registers */
689 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
690 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
691
692 if (error < 0)
693 return error;
694
695 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
696 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
697
698 if (error < 0)
699 return error;
700
701 /* Get lines per frame, clocks per line and interlaced/progresive */
702 lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
703 cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
704 progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
705
706 /* Do checking of video modes */
707 for (index = 0; index < NUM_PRESETS; index++, presets++)
708 if (lpfr == presets->lines_per_frame &&
709 progressive == presets->progressive) {
710 if (presets->cpl_min == 0xffff)
711 break;
712 if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
713 break;
714 }
715
716 if (index == NUM_PRESETS) {
cf19cd3d 717 v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
0b675536 718 lpfr, cpln);
cf19cd3d 719 return 0;
0b675536
SNC		 720 }
721
0b675536
SNC		 722 /* Set values in found preset */
723 qpreset->preset = presets->preset;
724
725 /* Update lines per frame and clocks per line info */
cf19cd3d 726 v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets->preset);
0b675536
SNC		 727 return 0;
728}
729
730#ifdef CONFIG_VIDEO_ADV_DEBUG
731/*
732 * tvp7002_g_register() - Get the value of a register
733 * @sd: ptr to v4l2_subdev struct
6fa7dac4 734 * @reg: ptr to v4l2_dbg_register struct
0b675536
SNC		 735 *
736 * Get the value of a TVP7002 decoder device register.
737 * Returns zero when successful, -EINVAL if register read fails or
738 * access to I2C client fails, -EPERM if the call is not allowed
eb78bd7d 739 * by disabled CAP_SYS_ADMIN.
0b675536
SNC		 740 */
741static int tvp7002_g_register(struct v4l2_subdev *sd,
742 struct v4l2_dbg_register *reg)
743{
744 struct i2c_client *client = v4l2_get_subdevdata(sd);
dfbd5d4d
HV		 745 u8 val;
746 int ret;
0b675536
SNC		 747
748 if (!v4l2_chip_match_i2c_client(client, &reg->match))
749 return -EINVAL;
750 if (!capable(CAP_SYS_ADMIN))
751 return -EPERM;
752
dfbd5d4d
HV		 753 ret = tvp7002_read(sd, reg->reg & 0xff, &val);
754 reg->val = val;
755 return ret;
0b675536
SNC		 756}
757
758/*
759 * tvp7002_s_register() - set a control
760 * @sd: ptr to v4l2_subdev struct
6fa7dac4 761 * @reg: ptr to v4l2_dbg_register struct
0b675536
SNC		 762 *
763 * Get the value of a TVP7002 decoder device register.
764 * Returns zero when successful, -EINVAL if register read fails or
765 * -EPERM if call not allowed.
766 */
767static int tvp7002_s_register(struct v4l2_subdev *sd,
768 struct v4l2_dbg_register *reg)
769{
770 struct i2c_client *client = v4l2_get_subdevdata(sd);
0b675536
SNC		 771
772 if (!v4l2_chip_match_i2c_client(client, &reg->match))
773 return -EINVAL;
774 if (!capable(CAP_SYS_ADMIN))
775 return -EPERM;
776
dfbd5d4d 777 return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
0b675536
SNC		 778}
779#endif
780
db7b5460
HV		 781/*
782 * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
783 * @sd: pointer to standard V4L2 sub-device structure
784 * @index: format index
785 * @code: pointer to mediabus format
786 *
787 * Enumerate supported mediabus formats.
788 */
789
790static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
791 enum v4l2_mbus_pixelcode *code)
792{
793 /* Check requested format index is within range */
794 if (index)
795 return -EINVAL;
796 *code = V4L2_MBUS_FMT_YUYV10_1X20;
797 return 0;
798}
799
0b675536
SNC		 800/*
801 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
802 * @sd: pointer to standard V4L2 sub-device structure
803 * @enable: streaming enable or disable
804 *
805 * Sets streaming to enable or disable, if possible.
806 */
807static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
808{
809 struct tvp7002 *device = to_tvp7002(sd);
810 int error = 0;
811
812 if (device->streaming == enable)
813 return 0;
814
815 if (enable) {
816 /* Set output state on (low impedance means stream on) */
817 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
818 device->streaming = enable;
819 } else {
820 /* Set output state off (high impedance means stream off) */
821 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
822 if (error)
823 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
824
825 device->streaming = enable;
826 }
827
828 return error;
829}
830
831/*
832 * tvp7002_log_status() - Print information about register settings
833 * @sd: ptr to v4l2_subdev struct
834 *
835 * Log register values of a TVP7002 decoder device.
836 * Returns zero or -EINVAL if read operation fails.
837 */
838static int tvp7002_log_status(struct v4l2_subdev *sd)
839{
840 const struct tvp7002_preset_definition *presets = tvp7002_presets;
841 struct tvp7002 *device = to_tvp7002(sd);
842 struct v4l2_dv_enum_preset e_preset;
843 struct v4l2_dv_preset detected;
844 int i;
845
846 detected.preset = V4L2_DV_INVALID;
847 /* Find my current standard*/
848 tvp7002_query_dv_preset(sd, &detected);
849
850 /* Print standard related code values */
851 for (i = 0; i < NUM_PRESETS; i++, presets++)
852 if (presets->preset == detected.preset)
853 break;
854
855 if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
856 return -EINVAL;
857
858 v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
859 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
860 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
861 if (i == NUM_PRESETS) {
862 v4l2_info(sd, "Detected DV Preset: None\n");
863 } else {
864 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
865 return -EINVAL;
866 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
867 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
868 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
869 }
870 v4l2_info(sd, "Streaming enabled: %s\n",
871 device->streaming ? "yes" : "no");
872
873 /* Print the current value of the gain control */
0eb73de0 874 v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
0b675536
SNC		 875
876 return 0;
877}
878
37eb4464
MR		 879/*
880 * tvp7002_enum_dv_presets() - Enum supported digital video formats
881 * @sd: pointer to standard V4L2 sub-device structure
882 * @preset: pointer to format struct
883 *
884 * Enumerate supported digital video formats.
885 */
886static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,
887 struct v4l2_dv_enum_preset *preset)
888{
889 /* Check requested format index is within range */
890 if (preset->index >= NUM_PRESETS)
891 return -EINVAL;
892
893 return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset);
894}
895
0eb73de0
HV		 896static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
897 .s_ctrl = tvp7002_s_ctrl,
898};
899
0b675536
SNC		 900/* V4L2 core operation handlers */
901static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
902 .g_chip_ident = tvp7002_g_chip_ident,
903 .log_status = tvp7002_log_status,
0eb73de0
HV		 904 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
905 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
906 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
907 .g_ctrl = v4l2_subdev_g_ctrl,
908 .s_ctrl = v4l2_subdev_s_ctrl,
909 .queryctrl = v4l2_subdev_queryctrl,
910 .querymenu = v4l2_subdev_querymenu,
0b675536
SNC		 911#ifdef CONFIG_VIDEO_ADV_DEBUG
912 .g_register = tvp7002_g_register,
913 .s_register = tvp7002_s_register,
914#endif
915};
916
917/* Specific video subsystem operation handlers */
918static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
37eb4464 919 .enum_dv_presets = tvp7002_enum_dv_presets,
0b675536
SNC		 920 .s_dv_preset = tvp7002_s_dv_preset,
921 .query_dv_preset = tvp7002_query_dv_preset,
922 .s_stream = tvp7002_s_stream,
db7b5460
HV		 923 .g_mbus_fmt = tvp7002_mbus_fmt,
924 .try_mbus_fmt = tvp7002_mbus_fmt,
925 .s_mbus_fmt = tvp7002_mbus_fmt,
926 .enum_mbus_fmt = tvp7002_enum_mbus_fmt,
0b675536
SNC		 927};
928
929/* V4L2 top level operation handlers */
930static const struct v4l2_subdev_ops tvp7002_ops = {
931 .core = &tvp7002_core_ops,
932 .video = &tvp7002_video_ops,
933};
934
0b675536
SNC		 935/*
936 * tvp7002_probe - Probe a TVP7002 device
6fa7dac4
MR		 937 * @c: ptr to i2c_client struct
938 * @id: ptr to i2c_device_id struct
0b675536
SNC		 939 *
940 * Initialize the TVP7002 device
941 * Returns zero when successful, -EINVAL if register read fails or
942 * -EIO if i2c access is not available.
943 */
944static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
945{
946 struct v4l2_subdev *sd;
947 struct tvp7002 *device;
948 struct v4l2_dv_preset preset;
949 int polarity_a;
950 int polarity_b;
951 u8 revision;
952
953 int error;
954
955 /* Check if the adapter supports the needed features */
956 if (!i2c_check_functionality(c->adapter,
957 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
958 return -EIO;
959
960 if (!c->dev.platform_data) {
961 v4l_err(c, "No platform data!!\n");
962 return -ENODEV;
963 }
964
0eb73de0 965 device = kzalloc(sizeof(struct tvp7002), GFP_KERNEL);
0b675536
SNC		 966
967 if (!device)
968 return -ENOMEM;
969
0b675536
SNC		 970 sd = &device->sd;
971 device->pdata = c->dev.platform_data;
0eb73de0 972 device->current_preset = tvp7002_presets;
0b675536
SNC		 973
974 /* Tell v4l2 the device is ready */
975 v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
976 v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
977 c->addr, c->adapter->name);
978
979 error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
980 if (error < 0)
981 goto found_error;
982
983 /* Get revision number */
984 v4l2_info(sd, "Rev. %02x detected.\n", revision);
985 if (revision != 0x02)
986 v4l2_info(sd, "Unknown revision detected.\n");
987
988 /* Initializes TVP7002 to its default values */
989 error = tvp7002_write_inittab(sd, tvp7002_init_default);
990
991 if (error < 0)
992 goto found_error;
993
994 /* Set polarity information after registers have been set */
995 polarity_a = 0x20 | device->pdata->hs_polarity << 5
996 | device->pdata->vs_polarity << 2;
997 error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
998 if (error < 0)
999 goto found_error;
1000
1001 polarity_b = 0x01 | device->pdata->fid_polarity << 2
1002 | device->pdata->sog_polarity << 1
1003 | device->pdata->clk_polarity;
1004 error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1005 if (error < 0)
1006 goto found_error;
1007
1008 /* Set registers according to default video mode */
1009 preset.preset = device->current_preset->preset;
1010 error = tvp7002_s_dv_preset(sd, &preset);
1011
0eb73de0
HV		 1012 v4l2_ctrl_handler_init(&device->hdl, 1);
1013 v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
1014 V4L2_CID_GAIN, 0, 255, 1, 0);
1015 sd->ctrl_handler = &device->hdl;
1016 if (device->hdl.error) {
1017 int err = device->hdl.error;
1018
1019 v4l2_ctrl_handler_free(&device->hdl);
1020 kfree(device);
1021 return err;
1022 }
1023 v4l2_ctrl_handler_setup(&device->hdl);
1024
0b675536
SNC		 1025found_error:
1026 if (error < 0)
1027 kfree(device);
1028
1029 return error;
1030}
1031
1032/*
1033 * tvp7002_remove - Remove TVP7002 device support
1034 * @c: ptr to i2c_client struct
1035 *
1036 * Reset the TVP7002 device
1037 * Returns zero.
1038 */
1039static int tvp7002_remove(struct i2c_client *c)
1040{
1041 struct v4l2_subdev *sd = i2c_get_clientdata(c);
1042 struct tvp7002 *device = to_tvp7002(sd);
1043
1044 v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1045 "on address 0x%x\n", c->addr);
1046
1047 v4l2_device_unregister_subdev(sd);
0eb73de0 1048 v4l2_ctrl_handler_free(&device->hdl);
0b675536
SNC		 1049 kfree(device);
1050 return 0;
1051}
1052
1053/* I2C Device ID table */
1054static const struct i2c_device_id tvp7002_id[] = {
1055 { "tvp7002", 0 },
1056 { }
1057};
1058MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1059
1060/* I2C driver data */
1061static struct i2c_driver tvp7002_driver = {
1062 .driver = {
1063 .owner = THIS_MODULE,
1064 .name = TVP7002_MODULE_NAME,
1065 },
1066 .probe = tvp7002_probe,
1067 .remove = tvp7002_remove,
1068 .id_table = tvp7002_id,
1069};
1070
1071/*
1072 * tvp7002_init - Initialize driver via I2C interface
1073 *
1074 * Register the TVP7002 driver.
1075 * Return 0 on success or error code on failure.
1076 */
1077static int __init tvp7002_init(void)
1078{
1079 return i2c_add_driver(&tvp7002_driver);
1080}
1081
1082/*
1083 * tvp7002_exit - Remove driver via I2C interface
1084 *
1085 * Unregister the TVP7002 driver.
1086 * Returns nothing.
1087 */
1088static void __exit tvp7002_exit(void)
1089{
1090 i2c_del_driver(&tvp7002_driver);
1091}
1092
1093module_init(tvp7002_init);
1094module_exit(tvp7002_exit);
ubuntu-bionic-kernel mirror