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d56410e0 1/*
1da177e4
LT
2 * vpx3220a, vpx3216b & vpx3214c video decoder driver version 0.0.1
3 *
4 * Copyright (C) 2001 Laurent Pinchart <lpinchart@freegates.be>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/delay.h>
24#include <linux/types.h>
5a0e3ad6 25#include <linux/slab.h>
1da177e4 26#include <asm/uaccess.h>
1da177e4 27#include <linux/i2c.h>
107063c6 28#include <linux/videodev2.h>
7e5eaadc
HV
29#include <media/v4l2-device.h>
30#include <media/v4l2-chip-ident.h>
2d26698e 31#include <media/v4l2-i2c-drv.h>
1da177e4 32
23848b65
HV
33MODULE_DESCRIPTION("vpx3220a/vpx3216b/vpx3214c video decoder driver");
34MODULE_AUTHOR("Laurent Pinchart");
35MODULE_LICENSE("GPL");
1da177e4 36
ff699e6b 37static int debug;
1da177e4
LT
38module_param(debug, int, 0);
39MODULE_PARM_DESC(debug, "Debug level (0-1)");
40
7e5eaadc 41
1da177e4
LT
42#define VPX_TIMEOUT_COUNT 10
43
44/* ----------------------------------------------------------------------- */
45
46struct vpx3220 {
7e5eaadc 47 struct v4l2_subdev sd;
1da177e4
LT
48 unsigned char reg[255];
49
107063c6 50 v4l2_std_id norm;
7e5eaadc 51 int ident;
1da177e4
LT
52 int input;
53 int enable;
54 int bright;
55 int contrast;
56 int hue;
57 int sat;
58};
59
7e5eaadc
HV
60static inline struct vpx3220 *to_vpx3220(struct v4l2_subdev *sd)
61{
62 return container_of(sd, struct vpx3220, sd);
63}
64
1da177e4
LT
65static char *inputs[] = { "internal", "composite", "svideo" };
66
67/* ----------------------------------------------------------------------- */
23848b65 68
7e5eaadc 69static inline int vpx3220_write(struct v4l2_subdev *sd, u8 reg, u8 value)
1da177e4 70{
7e5eaadc 71 struct i2c_client *client = v4l2_get_subdevdata(sd);
1da177e4
LT
72 struct vpx3220 *decoder = i2c_get_clientdata(client);
73
74 decoder->reg[reg] = value;
75 return i2c_smbus_write_byte_data(client, reg, value);
76}
77
7e5eaadc 78static inline int vpx3220_read(struct v4l2_subdev *sd, u8 reg)
1da177e4 79{
7e5eaadc
HV
80 struct i2c_client *client = v4l2_get_subdevdata(sd);
81
1da177e4
LT
82 return i2c_smbus_read_byte_data(client, reg);
83}
84
7e5eaadc 85static int vpx3220_fp_status(struct v4l2_subdev *sd)
1da177e4
LT
86{
87 unsigned char status;
88 unsigned int i;
89
90 for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {
7e5eaadc 91 status = vpx3220_read(sd, 0x29);
1da177e4
LT
92
93 if (!(status & 4))
94 return 0;
95
96 udelay(10);
97
98 if (need_resched())
99 cond_resched();
100 }
101
102 return -1;
103}
104
7e5eaadc 105static int vpx3220_fp_write(struct v4l2_subdev *sd, u8 fpaddr, u16 data)
1da177e4 106{
7e5eaadc
HV
107 struct i2c_client *client = v4l2_get_subdevdata(sd);
108
1da177e4
LT
109 /* Write the 16-bit address to the FPWR register */
110 if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {
7e5eaadc 111 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4
LT
112 return -1;
113 }
114
7e5eaadc 115 if (vpx3220_fp_status(sd) < 0)
1da177e4
LT
116 return -1;
117
118 /* Write the 16-bit data to the FPDAT register */
119 if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {
7e5eaadc 120 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4
LT
121 return -1;
122 }
123
124 return 0;
125}
126
7e5eaadc 127static u16 vpx3220_fp_read(struct v4l2_subdev *sd, u16 fpaddr)
1da177e4 128{
7e5eaadc 129 struct i2c_client *client = v4l2_get_subdevdata(sd);
1da177e4
LT
130 s16 data;
131
132 /* Write the 16-bit address to the FPRD register */
133 if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {
7e5eaadc 134 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4
LT
135 return -1;
136 }
137
7e5eaadc 138 if (vpx3220_fp_status(sd) < 0)
1da177e4
LT
139 return -1;
140
141 /* Read the 16-bit data from the FPDAT register */
142 data = i2c_smbus_read_word_data(client, 0x28);
143 if (data == -1) {
7e5eaadc 144 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
1da177e4
LT
145 return -1;
146 }
147
148 return swab16(data);
149}
150
7e5eaadc 151static int vpx3220_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
1da177e4
LT
152{
153 u8 reg;
154 int ret = -1;
155
156 while (len >= 2) {
157 reg = *data++;
7e5eaadc 158 ret = vpx3220_write(sd, reg, *data++);
23848b65 159 if (ret < 0)
1da177e4
LT
160 break;
161 len -= 2;
162 }
163
164 return ret;
165}
166
7e5eaadc 167static int vpx3220_write_fp_block(struct v4l2_subdev *sd,
23848b65 168 const u16 *data, unsigned int len)
1da177e4
LT
169{
170 u8 reg;
171 int ret = 0;
172
173 while (len > 1) {
174 reg = *data++;
7e5eaadc 175 ret |= vpx3220_fp_write(sd, reg, *data++);
1da177e4
LT
176 len -= 2;
177 }
178
179 return ret;
180}
181
182/* ---------------------------------------------------------------------- */
183
184static const unsigned short init_ntsc[] = {
185 0x1c, 0x00, /* NTSC tint angle */
186 0x88, 17, /* Window 1 vertical */
187 0x89, 240, /* Vertical lines in */
188 0x8a, 240, /* Vertical lines out */
189 0x8b, 000, /* Horizontal begin */
190 0x8c, 640, /* Horizontal length */
191 0x8d, 640, /* Number of pixels */
192 0x8f, 0xc00, /* Disable window 2 */
9b3acc21 193 0xf0, 0x73, /* 13.5 MHz transport, Forced
1da177e4
LT
194 * mode, latch windows */
195 0xf2, 0x13, /* NTSC M, composite input */
196 0xe7, 0x1e1, /* Enable vertical standard
197 * locking @ 240 lines */
198};
199
200static const unsigned short init_pal[] = {
201 0x88, 23, /* Window 1 vertical begin */
9b3acc21 202 0x89, 288, /* Vertical lines in (16 lines
1da177e4 203 * skipped by the VFE) */
9b3acc21 204 0x8a, 288, /* Vertical lines out (16 lines
1da177e4
LT
205 * skipped by the VFE) */
206 0x8b, 16, /* Horizontal begin */
207 0x8c, 768, /* Horizontal length */
208 0x8d, 784, /* Number of pixels
209 * Must be >= Horizontal begin + Horizontal length */
210 0x8f, 0xc00, /* Disable window 2 */
9b3acc21 211 0xf0, 0x77, /* 13.5 MHz transport, Forced
1da177e4
LT
212 * mode, latch windows */
213 0xf2, 0x3d1, /* PAL B,G,H,I, composite input */
9b3acc21 214 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
1da177e4
LT
215};
216
217static const unsigned short init_secam[] = {
9b3acc21
RB
218 0x88, 23, /* Window 1 vertical begin */
219 0x89, 288, /* Vertical lines in (16 lines
1da177e4 220 * skipped by the VFE) */
9b3acc21 221 0x8a, 288, /* Vertical lines out (16 lines
1da177e4
LT
222 * skipped by the VFE) */
223 0x8b, 16, /* Horizontal begin */
224 0x8c, 768, /* Horizontal length */
225 0x8d, 784, /* Number of pixels
226 * Must be >= Horizontal begin + Horizontal length */
227 0x8f, 0xc00, /* Disable window 2 */
9b3acc21 228 0xf0, 0x77, /* 13.5 MHz transport, Forced
1da177e4
LT
229 * mode, latch windows */
230 0xf2, 0x3d5, /* SECAM, composite input */
9b3acc21 231 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
1da177e4
LT
232};
233
234static const unsigned char init_common[] = {
235 0xf2, 0x00, /* Disable all outputs */
236 0x33, 0x0d, /* Luma : VIN2, Chroma : CIN
237 * (clamp off) */
238 0xd8, 0xa8, /* HREF/VREF active high, VREF
239 * pulse = 2, Odd/Even flag */
240 0x20, 0x03, /* IF compensation 0dB/oct */
241 0xe0, 0xff, /* Open up all comparators */
242 0xe1, 0x00,
243 0xe2, 0x7f,
244 0xe3, 0x80,
245 0xe4, 0x7f,
246 0xe5, 0x80,
247 0xe6, 0x00, /* Brightness set to 0 */
248 0xe7, 0xe0, /* Contrast to 1.0, noise shaping
249 * 10 to 8 2-bit error diffusion */
250 0xe8, 0xf8, /* YUV422, CbCr binary offset,
251 * ... (p.32) */
252 0xea, 0x18, /* LLC2 connected, output FIFO
253 * reset with VACTintern */
254 0xf0, 0x8a, /* Half full level to 10, bus
255 * shuffler [7:0, 23:16, 15:8] */
256 0xf1, 0x18, /* Single clock, sync mode, no
257 * FE delay, no HLEN counter */
258 0xf8, 0x12, /* Port A, PIXCLK, HF# & FE#
259 * strength to 2 */
260 0xf9, 0x24, /* Port B, HREF, VREF, PREF &
261 * ALPHA strength to 4 */
262};
263
264static const unsigned short init_fp[] = {
265 0x59, 0,
266 0xa0, 2070, /* ACC reference */
267 0xa3, 0,
268 0xa4, 0,
269 0xa8, 30,
270 0xb2, 768,
271 0xbe, 27,
272 0x58, 0,
273 0x26, 0,
274 0x4b, 0x298, /* PLL gain */
275};
276
1da177e4 277
7e5eaadc 278static int vpx3220_init(struct v4l2_subdev *sd, u32 val)
1da177e4 279{
7e5eaadc
HV
280 struct vpx3220 *decoder = to_vpx3220(sd);
281
282 vpx3220_write_block(sd, init_common, sizeof(init_common));
283 vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
284 if (decoder->norm & V4L2_STD_NTSC)
285 vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
286 else if (decoder->norm & V4L2_STD_PAL)
287 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
288 else if (decoder->norm & V4L2_STD_SECAM)
289 vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
290 else
291 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
292 return 0;
293}
1da177e4 294
7e5eaadc
HV
295static int vpx3220_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
296{
297 int res = V4L2_IN_ST_NO_SIGNAL, status;
298 v4l2_std_id std = 0;
1da177e4 299
7e5eaadc 300 status = vpx3220_fp_read(sd, 0x0f3);
1da177e4 301
7e5eaadc 302 v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);
1da177e4 303
7e5eaadc
HV
304 if (status < 0)
305 return status;
1da177e4 306
7e5eaadc
HV
307 if ((status & 0x20) == 0) {
308 res = 0;
1da177e4 309
7e5eaadc
HV
310 switch (status & 0x18) {
311 case 0x00:
312 case 0x10:
313 case 0x14:
314 case 0x18:
315 std = V4L2_STD_PAL;
316 break;
1da177e4 317
7e5eaadc
HV
318 case 0x08:
319 std = V4L2_STD_SECAM;
320 break;
1da177e4 321
7e5eaadc
HV
322 case 0x04:
323 case 0x0c:
324 case 0x1c:
325 std = V4L2_STD_NTSC;
326 break;
1da177e4 327 }
23848b65 328 }
7e5eaadc
HV
329 if (pstd)
330 *pstd = std;
331 if (pstatus)
332 *pstatus = status;
333 return 0;
334}
1da177e4 335
7e5eaadc
HV
336static int vpx3220_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
337{
bccfa449 338 v4l2_dbg(1, debug, sd, "querystd\n");
7e5eaadc
HV
339 return vpx3220_status(sd, NULL, std);
340}
107063c6 341
7e5eaadc
HV
342static int vpx3220_g_input_status(struct v4l2_subdev *sd, u32 *status)
343{
bccfa449 344 v4l2_dbg(1, debug, sd, "g_input_status\n");
7e5eaadc
HV
345 return vpx3220_status(sd, status, NULL);
346}
de21eb63 347
7e5eaadc
HV
348static int vpx3220_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
349{
350 struct vpx3220 *decoder = to_vpx3220(sd);
351 int temp_input;
352
353 /* Here we back up the input selection because it gets
354 overwritten when we fill the registers with the
355 choosen video norm */
356 temp_input = vpx3220_fp_read(sd, 0xf2);
357
bccfa449 358 v4l2_dbg(1, debug, sd, "s_std %llx\n", (unsigned long long)std);
7e5eaadc
HV
359 if (std & V4L2_STD_NTSC) {
360 vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
361 v4l2_dbg(1, debug, sd, "norm switched to NTSC\n");
362 } else if (std & V4L2_STD_PAL) {
363 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
364 v4l2_dbg(1, debug, sd, "norm switched to PAL\n");
365 } else if (std & V4L2_STD_SECAM) {
366 vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
367 v4l2_dbg(1, debug, sd, "norm switched to SECAM\n");
368 } else {
369 return -EINVAL;
23848b65 370 }
1da177e4 371
7e5eaadc 372 decoder->norm = std;
1da177e4 373
7e5eaadc
HV
374 /* And here we set the backed up video input again */
375 vpx3220_fp_write(sd, 0xf2, temp_input | 0x0010);
376 udelay(10);
377 return 0;
378}
1da177e4 379
5325b427
HV
380static int vpx3220_s_routing(struct v4l2_subdev *sd,
381 u32 input, u32 output, u32 config)
7e5eaadc
HV
382{
383 int data;
1da177e4 384
5325b427
HV
385 /* RJ: input = 0: ST8 (PCTV) input
386 input = 1: COMPOSITE input
387 input = 2: SVHS input */
1da177e4 388
5325b427 389 const int input_vals[3][2] = {
7e5eaadc
HV
390 {0x0c, 0},
391 {0x0d, 0},
392 {0x0e, 1}
393 };
1da177e4 394
f14a2972 395 if (input > 2)
7e5eaadc 396 return -EINVAL;
1da177e4 397
5325b427 398 v4l2_dbg(1, debug, sd, "input switched to %s\n", inputs[input]);
1da177e4 399
5325b427 400 vpx3220_write(sd, 0x33, input_vals[input][0]);
1da177e4 401
7e5eaadc
HV
402 data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);
403 if (data < 0)
404 return data;
405 /* 0x0010 is required to latch the setting */
406 vpx3220_fp_write(sd, 0xf2,
5325b427 407 data | (input_vals[input][1] << 5) | 0x0010);
1da177e4 408
7e5eaadc
HV
409 udelay(10);
410 return 0;
411}
1da177e4 412
7e5eaadc
HV
413static int vpx3220_s_stream(struct v4l2_subdev *sd, int enable)
414{
bccfa449 415 v4l2_dbg(1, debug, sd, "s_stream %s\n", enable ? "on" : "off");
1da177e4 416
7e5eaadc
HV
417 vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));
418 return 0;
419}
107063c6 420
7e5eaadc
HV
421static int vpx3220_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
422{
423 switch (qc->id) {
424 case V4L2_CID_BRIGHTNESS:
425 v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
426 break;
107063c6 427
7e5eaadc
HV
428 case V4L2_CID_CONTRAST:
429 v4l2_ctrl_query_fill(qc, 0, 63, 1, 32);
430 break;
1da177e4 431
7e5eaadc
HV
432 case V4L2_CID_SATURATION:
433 v4l2_ctrl_query_fill(qc, 0, 4095, 1, 2048);
434 break;
107063c6 435
7e5eaadc
HV
436 case V4L2_CID_HUE:
437 v4l2_ctrl_query_fill(qc, -512, 511, 1, 0);
1da177e4 438 break;
7e5eaadc
HV
439
440 default:
441 return -EINVAL;
23848b65 442 }
7e5eaadc
HV
443 return 0;
444}
1da177e4 445
7e5eaadc
HV
446static int vpx3220_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
447{
448 struct vpx3220 *decoder = to_vpx3220(sd);
1da177e4 449
7e5eaadc
HV
450 switch (ctrl->id) {
451 case V4L2_CID_BRIGHTNESS:
452 ctrl->value = decoder->bright;
453 break;
454 case V4L2_CID_CONTRAST:
455 ctrl->value = decoder->contrast;
107063c6 456 break;
7e5eaadc
HV
457 case V4L2_CID_SATURATION:
458 ctrl->value = decoder->sat;
459 break;
460 case V4L2_CID_HUE:
461 ctrl->value = decoder->hue;
462 break;
463 default:
464 return -EINVAL;
107063c6 465 }
7e5eaadc
HV
466 return 0;
467}
107063c6 468
7e5eaadc
HV
469static int vpx3220_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
470{
471 struct vpx3220 *decoder = to_vpx3220(sd);
107063c6 472
7e5eaadc
HV
473 switch (ctrl->id) {
474 case V4L2_CID_BRIGHTNESS:
475 if (decoder->bright != ctrl->value) {
476 decoder->bright = ctrl->value;
477 vpx3220_write(sd, 0xe6, decoder->bright);
478 }
479 break;
480 case V4L2_CID_CONTRAST:
481 if (decoder->contrast != ctrl->value) {
482 /* Bit 7 and 8 is for noise shaping */
483 decoder->contrast = ctrl->value;
484 vpx3220_write(sd, 0xe7, decoder->contrast + 192);
485 }
486 break;
487 case V4L2_CID_SATURATION:
488 if (decoder->sat != ctrl->value) {
489 decoder->sat = ctrl->value;
490 vpx3220_fp_write(sd, 0xa0, decoder->sat);
491 }
492 break;
493 case V4L2_CID_HUE:
494 if (decoder->hue != ctrl->value) {
495 decoder->hue = ctrl->value;
496 vpx3220_fp_write(sd, 0x1c, decoder->hue);
1da177e4 497 }
1da177e4 498 break;
1da177e4
LT
499 default:
500 return -EINVAL;
501 }
1da177e4
LT
502 return 0;
503}
504
7e5eaadc 505static int vpx3220_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1da177e4 506{
7e5eaadc
HV
507 struct vpx3220 *decoder = to_vpx3220(sd);
508 struct i2c_client *client = v4l2_get_subdevdata(sd);
1da177e4 509
7e5eaadc 510 return v4l2_chip_ident_i2c_client(client, chip, decoder->ident, 0);
1da177e4
LT
511}
512
7e5eaadc
HV
513/* ----------------------------------------------------------------------- */
514
515static const struct v4l2_subdev_core_ops vpx3220_core_ops = {
516 .g_chip_ident = vpx3220_g_chip_ident,
517 .init = vpx3220_init,
518 .g_ctrl = vpx3220_g_ctrl,
519 .s_ctrl = vpx3220_s_ctrl,
520 .queryctrl = vpx3220_queryctrl,
7e5eaadc
HV
521 .s_std = vpx3220_s_std,
522};
523
524static const struct v4l2_subdev_video_ops vpx3220_video_ops = {
525 .s_routing = vpx3220_s_routing,
526 .s_stream = vpx3220_s_stream,
527 .querystd = vpx3220_querystd,
528 .g_input_status = vpx3220_g_input_status,
529};
530
531static const struct v4l2_subdev_ops vpx3220_ops = {
532 .core = &vpx3220_core_ops,
7e5eaadc
HV
533 .video = &vpx3220_video_ops,
534};
535
1da177e4 536/* -----------------------------------------------------------------------
c84e6036 537 * Client management code
1da177e4
LT
538 */
539
23848b65
HV
540static int vpx3220_probe(struct i2c_client *client,
541 const struct i2c_device_id *id)
1da177e4 542{
1da177e4 543 struct vpx3220 *decoder;
7e5eaadc 544 struct v4l2_subdev *sd;
23848b65
HV
545 const char *name = NULL;
546 u8 ver;
547 u16 pn;
1da177e4
LT
548
549 /* Check if the adapter supports the needed features */
23848b65
HV
550 if (!i2c_check_functionality(client->adapter,
551 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
552 return -ENODEV;
1da177e4 553
7408187d 554 decoder = kzalloc(sizeof(struct vpx3220), GFP_KERNEL);
23848b65 555 if (decoder == NULL)
1da177e4 556 return -ENOMEM;
7e5eaadc
HV
557 sd = &decoder->sd;
558 v4l2_i2c_subdev_init(sd, client, &vpx3220_ops);
107063c6 559 decoder->norm = V4L2_STD_PAL;
1da177e4
LT
560 decoder->input = 0;
561 decoder->enable = 1;
562 decoder->bright = 32768;
563 decoder->contrast = 32768;
564 decoder->hue = 32768;
565 decoder->sat = 32768;
1da177e4 566
23848b65
HV
567 ver = i2c_smbus_read_byte_data(client, 0x00);
568 pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +
569 i2c_smbus_read_byte_data(client, 0x01);
7e5eaadc 570 decoder->ident = V4L2_IDENT_VPX3220A;
23848b65
HV
571 if (ver == 0xec) {
572 switch (pn) {
573 case 0x4680:
574 name = "vpx3220a";
575 break;
576 case 0x4260:
577 name = "vpx3216b";
7e5eaadc 578 decoder->ident = V4L2_IDENT_VPX3216B;
23848b65
HV
579 break;
580 case 0x4280:
581 name = "vpx3214c";
7e5eaadc 582 decoder->ident = V4L2_IDENT_VPX3214C;
23848b65
HV
583 break;
584 }
1da177e4 585 }
23848b65 586 if (name)
7e5eaadc 587 v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,
23848b65
HV
588 client->addr << 1, client->adapter->name);
589 else
7e5eaadc 590 v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",
23848b65 591 ver, pn, client->addr << 1, client->adapter->name);
1da177e4 592
7e5eaadc
HV
593 vpx3220_write_block(sd, init_common, sizeof(init_common));
594 vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
595 /* Default to PAL */
596 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
1da177e4
LT
597 return 0;
598}
599
23848b65 600static int vpx3220_remove(struct i2c_client *client)
1da177e4 601{
7e5eaadc
HV
602 struct v4l2_subdev *sd = i2c_get_clientdata(client);
603
604 v4l2_device_unregister_subdev(sd);
605 kfree(to_vpx3220(sd));
23848b65 606 return 0;
1da177e4
LT
607}
608
23848b65
HV
609static const struct i2c_device_id vpx3220_id[] = {
610 { "vpx3220a", 0 },
611 { "vpx3216b", 0 },
612 { "vpx3214c", 0 },
613 { }
614};
615MODULE_DEVICE_TABLE(i2c, vpx3220_id);
1da177e4 616
23848b65
HV
617static struct v4l2_i2c_driver_data v4l2_i2c_data = {
618 .name = "vpx3220",
23848b65
HV
619 .probe = vpx3220_probe,
620 .remove = vpx3220_remove,
621 .id_table = vpx3220_id,
1da177e4 622};