]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/media/video/zoran/zoran_device.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (10713): zoran: if reqbufs is called with count == 0, do a streamoff.
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / zoran / zoran_device.c
CommitLineData
1da177e4
LT		 1/*
2 * Zoran zr36057/zr36067 PCI controller driver, for the
3 * Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
4 * Media Labs LML33/LML33R10.
5 *
6 * This part handles device access (PCI/I2C/codec/...)
d56410e0 7 *
1da177e4
LT		 8 * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
9 *
10 * Currently maintained by:
11 * Ronald Bultje <rbultje@ronald.bitfreak.net>
12 * Laurent Pinchart <laurent.pinchart@skynet.be>
13 * Mailinglist <mjpeg-users@lists.sf.net>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
1da177e4
LT		 30#include <linux/types.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/vmalloc.h>
1da177e4
LT		 34
35#include <linux/interrupt.h>
36#include <linux/proc_fs.h>
37#include <linux/i2c.h>
38#include <linux/i2c-algo-bit.h>
39#include <linux/videodev.h>
40#include <linux/spinlock.h>
41#include <linux/sem.h>
42
43#include <linux/pci.h>
44#include <linux/video_decoder.h>
45#include <linux/video_encoder.h>
46#include <linux/delay.h>
47#include <linux/wait.h>
48
9a6ab769 49#include <asm/byteorder.h>
1da177e4
LT		 50#include <asm/io.h>
51
52#include "videocodec.h"
53#include "zoran.h"
54#include "zoran_device.h"
18b548ca 55#include "zoran_card.h"
1da177e4
LT		 56
57#define IRQ_MASK ( ZR36057_ISR_GIRQ0 | \
58 ZR36057_ISR_GIRQ1 | \
59 ZR36057_ISR_JPEGRepIRQ )
60
ff699e6b
DSL		 61static int lml33dpath; /* default = 0
62 * 1 will use digital path in capture
1da177e4
LT		 63 * mode instead of analog. It can be
64 * used for picture adjustments using
65 * tool like xawtv while watching image
66 * on TV monitor connected to the output.
67 * However, due to absence of 75 Ohm
68 * load on Bt819 input, there will be
69 * some image imperfections */
70
60e3cac4 71module_param(lml33dpath, bool, 0644);
1da177e4
LT		 72MODULE_PARM_DESC(lml33dpath,
73 "Use digital path capture mode (on LML33 cards)");
74
75static void
76zr36057_init_vfe (struct zoran *zr);
77
78/*
79 * General Purpose I/O and Guest bus access
80 */
81
82/*
83 * This is a bit tricky. When a board lacks a GPIO function, the corresponding
84 * GPIO bit number in the card_info structure is set to 0.
85 */
86
87void
88GPIO (struct zoran *zr,
89 int bit,
90 unsigned int value)
91{
92 u32 reg;
93 u32 mask;
94
95 /* Make sure the bit number is legal
96 * A bit number of -1 (lacking) gives a mask of 0,
97 * making it harmless */
98 mask = (1 << (24 + bit)) & 0xff000000;
99 reg = btread(ZR36057_GPPGCR1) & ~mask;
100 if (value) {
101 reg |= mask;
102 }
103 btwrite(reg, ZR36057_GPPGCR1);
104 udelay(1);
105}
106
107/*
108 * Wait til post office is no longer busy
109 */
110
111int
112post_office_wait (struct zoran *zr)
113{
114 u32 por;
115
116// while (((por = btread(ZR36057_POR)) & (ZR36057_POR_POPen | ZR36057_POR_POTime)) == ZR36057_POR_POPen) {
117 while ((por = btread(ZR36057_POR)) & ZR36057_POR_POPen) {
118 /* wait for something to happen */
119 }
120 if ((por & ZR36057_POR_POTime) && !zr->card.gws_not_connected) {
121 /* In LML33/BUZ \GWS line is not connected, so it has always timeout set */
122 dprintk(1, KERN_INFO "%s: pop timeout %08x\n", ZR_DEVNAME(zr),
123 por);
124 return -1;
125 }
126
127 return 0;
128}
129
130int
131post_office_write (struct zoran *zr,
132 unsigned int guest,
133 unsigned int reg,
134 unsigned int value)
135{
136 u32 por;
137
138 por =
139 ZR36057_POR_PODir | ZR36057_POR_POTime | ((guest & 7) << 20) |
140 ((reg & 7) << 16) | (value & 0xFF);
141 btwrite(por, ZR36057_POR);
142
143 return post_office_wait(zr);
144}
145
146int
147post_office_read (struct zoran *zr,
148 unsigned int guest,
149 unsigned int reg)
150{
151 u32 por;
152
153 por = ZR36057_POR_POTime | ((guest & 7) << 20) | ((reg & 7) << 16);
154 btwrite(por, ZR36057_POR);
155 if (post_office_wait(zr) < 0) {
156 return -1;
157 }
158
159 return btread(ZR36057_POR) & 0xFF;
160}
161
162/*
163 * detect guests
164 */
165
166static void
167dump_guests (struct zoran *zr)
168{
18b548ca 169 if (zr36067_debug > 2) {
1da177e4
LT		 170 int i, guest[8];
171
172 for (i = 1; i < 8; i++) { // Don't read jpeg codec here
173 guest[i] = post_office_read(zr, i, 0);
174 }
175
176 printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
177
178 for (i = 1; i < 8; i++) {
179 printk(" 0x%02x", guest[i]);
180 }
181 printk("\n");
182 }
183}
184
185static inline unsigned long
186get_time (void)
187{
188 struct timeval tv;
189
190 do_gettimeofday(&tv);
191 return (1000000 * tv.tv_sec + tv.tv_usec);
192}
193
194void
195detect_guest_activity (struct zoran *zr)
196{
197 int timeout, i, j, res, guest[8], guest0[8], change[8][3];
198 unsigned long t0, t1;
199
200 dump_guests(zr);
201 printk(KERN_INFO "%s: Detecting guests activity, please wait...\n",
202 ZR_DEVNAME(zr));
203 for (i = 1; i < 8; i++) { // Don't read jpeg codec here
204 guest0[i] = guest[i] = post_office_read(zr, i, 0);
205 }
206
207 timeout = 0;
208 j = 0;
209 t0 = get_time();
210 while (timeout < 10000) {
211 udelay(10);
212 timeout++;
213 for (i = 1; (i < 8) && (j < 8); i++) {
214 res = post_office_read(zr, i, 0);
215 if (res != guest[i]) {
216 t1 = get_time();
217 change[j][0] = (t1 - t0);
218 t0 = t1;
219 change[j][1] = i;
220 change[j][2] = res;
221 j++;
222 guest[i] = res;
223 }
224 }
225 if (j >= 8)
226 break;
227 }
228 printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
229
230 for (i = 1; i < 8; i++) {
231 printk(" 0x%02x", guest0[i]);
232 }
233 printk("\n");
234 if (j == 0) {
235 printk(KERN_INFO "%s: No activity detected.\n", ZR_DEVNAME(zr));
236 return;
237 }
238 for (i = 0; i < j; i++) {
239 printk(KERN_INFO "%s: %6d: %d => 0x%02x\n", ZR_DEVNAME(zr),
240 change[i][0], change[i][1], change[i][2]);
241 }
242}
243
244/*
245 * JPEG Codec access
246 */
247
248void
249jpeg_codec_sleep (struct zoran *zr,
250 int sleep)
251{
6165894f 252 GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_SLEEP], !sleep);
1da177e4
LT		 253 if (!sleep) {
254 dprintk(3,
255 KERN_DEBUG
256 "%s: jpeg_codec_sleep() - wake GPIO=0x%08x\n",
257 ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
258 udelay(500);
259 } else {
260 dprintk(3,
261 KERN_DEBUG
262 "%s: jpeg_codec_sleep() - sleep GPIO=0x%08x\n",
263 ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
264 udelay(2);
265 }
266}
267
268int
269jpeg_codec_reset (struct zoran *zr)
270{
271 /* Take the codec out of sleep */
272 jpeg_codec_sleep(zr, 0);
273
274 if (zr->card.gpcs[GPCS_JPEG_RESET] != 0xff) {
275 post_office_write(zr, zr->card.gpcs[GPCS_JPEG_RESET], 0,
276 0);
277 udelay(2);
278 } else {
6165894f 279 GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_RESET], 0);
1da177e4 280 udelay(2);
6165894f 281 GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_RESET], 1);
1da177e4
LT		 282 udelay(2);
283 }
284
285 return 0;
286}
287
288/*
289 * Set the registers for the size we have specified. Don't bother
290 * trying to understand this without the ZR36057 manual in front of
291 * you [AC].
292 *
293 * PS: The manual is free for download in .pdf format from
294 * www.zoran.com - nicely done those folks.
295 */
296
297static void
298zr36057_adjust_vfe (struct zoran *zr,
299 enum zoran_codec_mode mode)
300{
301 u32 reg;
302
303 switch (mode) {
304 case BUZ_MODE_MOTION_DECOMPRESS:
305 btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
306 reg = btread(ZR36057_VFEHCR);
307 if ((reg & (1 << 10)) && zr->card.type != LML33R10) {
308 reg += ((1 << 10) | 1);
309 }
310 btwrite(reg, ZR36057_VFEHCR);
311 break;
312 case BUZ_MODE_MOTION_COMPRESS:
313 case BUZ_MODE_IDLE:
314 default:
315 if (zr->norm == VIDEO_MODE_NTSC ||
316 (zr->card.type == LML33R10 &&
317 zr->norm == VIDEO_MODE_PAL))
318 btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
319 else
320 btor(ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
321 reg = btread(ZR36057_VFEHCR);
322 if (!(reg & (1 << 10)) && zr->card.type != LML33R10) {
323 reg -= ((1 << 10) | 1);
324 }
325 btwrite(reg, ZR36057_VFEHCR);
326 break;
327 }
328}
329
330/*
331 * set geometry
332 */
333
334static void
335zr36057_set_vfe (struct zoran *zr,
336 int video_width,
337 int video_height,
338 const struct zoran_format *format)
339{
340 struct tvnorm *tvn;
341 unsigned HStart, HEnd, VStart, VEnd;
342 unsigned DispMode;
343 unsigned VidWinWid, VidWinHt;
344 unsigned hcrop1, hcrop2, vcrop1, vcrop2;
345 unsigned Wa, We, Ha, He;
346 unsigned X, Y, HorDcm, VerDcm;
347 u32 reg;
348 unsigned mask_line_size;
349
350 tvn = zr->timing;
351
352 Wa = tvn->Wa;
353 Ha = tvn->Ha;
354
355 dprintk(2, KERN_INFO "%s: set_vfe() - width = %d, height = %d\n",
356 ZR_DEVNAME(zr), video_width, video_height);
357
358 if (zr->norm != VIDEO_MODE_PAL &&
359 zr->norm != VIDEO_MODE_NTSC &&
360 zr->norm != VIDEO_MODE_SECAM) {
361 dprintk(1,
362 KERN_ERR "%s: set_vfe() - norm = %d not valid\n",
363 ZR_DEVNAME(zr), zr->norm);
364 return;
365 }
366 if (video_width < BUZ_MIN_WIDTH ||
367 video_height < BUZ_MIN_HEIGHT ||
368 video_width > Wa || video_height > Ha) {
369 dprintk(1, KERN_ERR "%s: set_vfe: w=%d h=%d not valid\n",
370 ZR_DEVNAME(zr), video_width, video_height);
371 return;
372 }
373
374 /**** zr36057 ****/
375
376 /* horizontal */
377 VidWinWid = video_width;
e9e24cee 378 X = DIV_ROUND_UP(VidWinWid * 64, tvn->Wa);
1da177e4
LT		 379 We = (VidWinWid * 64) / X;
380 HorDcm = 64 - X;
381 hcrop1 = 2 * ((tvn->Wa - We) / 4);
382 hcrop2 = tvn->Wa - We - hcrop1;
383 HStart = tvn->HStart ? tvn->HStart : 1;
384 /* (Ronald) Original comment:
385 * "| 1 Doesn't have any effect, tested on both a DC10 and a DC10+"
386 * this is false. It inverses chroma values on the LML33R10 (so Cr
387 * suddenly is shown as Cb and reverse, really cool effect if you
388 * want to see blue faces, not useful otherwise). So don't use |1.
389 * However, the DC10 has '0' as HStart, but does need |1, so we
390 * use a dirty check...
391 */
392 HEnd = HStart + tvn->Wa - 1;
393 HStart += hcrop1;
394 HEnd -= hcrop2;
395 reg = ((HStart & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HStart)
396 | ((HEnd & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HEnd);
397 if (zr->card.vfe_pol.hsync_pol)
398 reg |= ZR36057_VFEHCR_HSPol;
399 btwrite(reg, ZR36057_VFEHCR);
400
401 /* Vertical */
402 DispMode = !(video_height > BUZ_MAX_HEIGHT / 2);
403 VidWinHt = DispMode ? video_height : video_height / 2;
e9e24cee 404 Y = DIV_ROUND_UP(VidWinHt * 64 * 2, tvn->Ha);
1da177e4
LT		 405 He = (VidWinHt * 64) / Y;
406 VerDcm = 64 - Y;
407 vcrop1 = (tvn->Ha / 2 - He) / 2;
408 vcrop2 = tvn->Ha / 2 - He - vcrop1;
409 VStart = tvn->VStart;
410 VEnd = VStart + tvn->Ha / 2; // - 1; FIXME SnapShot times out with -1 in 768*576 on the DC10 - LP
411 VStart += vcrop1;
412 VEnd -= vcrop2;
413 reg = ((VStart & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VStart)
414 | ((VEnd & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VEnd);
415 if (zr->card.vfe_pol.vsync_pol)
416 reg |= ZR36057_VFEVCR_VSPol;
417 btwrite(reg, ZR36057_VFEVCR);
418
419 /* scaler and pixel format */
420 reg = 0;
421 reg |= (HorDcm << ZR36057_VFESPFR_HorDcm);
422 reg |= (VerDcm << ZR36057_VFESPFR_VerDcm);
423 reg |= (DispMode << ZR36057_VFESPFR_DispMode);
1da177e4
LT		 424 /* RJ: I don't know, why the following has to be the opposite
425 * of the corresponding ZR36060 setting, but only this way
426 * we get the correct colors when uncompressing to the screen */
427 //reg |= ZR36057_VFESPFR_VCLKPol; /**/
428 /* RJ: Don't know if that is needed for NTSC also */
429 if (zr->norm != VIDEO_MODE_NTSC)
430 reg |= ZR36057_VFESPFR_ExtFl; // NEEDED!!!!!!! Wolfgang
431 reg |= ZR36057_VFESPFR_TopField;
1da177e4
LT		 432 if (HorDcm >= 48) {
433 reg |= 3 << ZR36057_VFESPFR_HFilter; /* 5 tap filter */
434 } else if (HorDcm >= 32) {
435 reg |= 2 << ZR36057_VFESPFR_HFilter; /* 4 tap filter */
436 } else if (HorDcm >= 16) {
437 reg |= 1 << ZR36057_VFESPFR_HFilter; /* 3 tap filter */
438 }
603d6f2c 439 reg |= format->vfespfr;
1da177e4
LT		 440 btwrite(reg, ZR36057_VFESPFR);
441
442 /* display configuration */
443 reg = (16 << ZR36057_VDCR_MinPix)
444 | (VidWinHt << ZR36057_VDCR_VidWinHt)
445 | (VidWinWid << ZR36057_VDCR_VidWinWid);
446 if (pci_pci_problems & PCIPCI_TRITON)
447 // || zr->revision < 1) // Revision 1 has also Triton support
448 reg &= ~ZR36057_VDCR_Triton;
449 else
450 reg |= ZR36057_VDCR_Triton;
451 btwrite(reg, ZR36057_VDCR);
452
453 /* (Ronald) don't write this if overlay_mask = NULL */
454 if (zr->overlay_mask) {
455 /* Write overlay clipping mask data, but don't enable overlay clipping */
d56410e0 456 /* RJ: since this makes only sense on the screen, we use
1da177e4
LT		 457 * zr->overlay_settings.width instead of video_width */
458
459 mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
460 reg = virt_to_bus(zr->overlay_mask);
461 btwrite(reg, ZR36057_MMTR);
462 reg = virt_to_bus(zr->overlay_mask + mask_line_size);
463 btwrite(reg, ZR36057_MMBR);
464 reg =
465 mask_line_size - (zr->overlay_settings.width +
466 31) / 32;
467 if (DispMode == 0)
468 reg += mask_line_size;
469 reg <<= ZR36057_OCR_MaskStride;
470 btwrite(reg, ZR36057_OCR);
471 }
472
473 zr36057_adjust_vfe(zr, zr->codec_mode);
474}
475
476/*
477 * Switch overlay on or off
478 */
479
480void
481zr36057_overlay (struct zoran *zr,
482 int on)
483{
484 u32 reg;
485
486 if (on) {
487 /* do the necessary settings ... */
488 btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR); /* switch it off first */
489
490 zr36057_set_vfe(zr,
491 zr->overlay_settings.width,
492 zr->overlay_settings.height,
493 zr->overlay_settings.format);
494
495 /* Start and length of each line MUST be 4-byte aligned.
496 * This should be allready checked before the call to this routine.
497 * All error messages are internal driver checking only! */
498
499 /* video display top and bottom registers */
d6144028 500 reg = (long) zr->buffer.base +
1da177e4
LT		 501 zr->overlay_settings.x *
502 ((zr->overlay_settings.format->depth + 7) / 8) +
503 zr->overlay_settings.y *
504 zr->buffer.bytesperline;
505 btwrite(reg, ZR36057_VDTR);
506 if (reg & 3)
507 dprintk(1,
508 KERN_ERR
509 "%s: zr36057_overlay() - video_address not aligned\n",
510 ZR_DEVNAME(zr));
511 if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
512 reg += zr->buffer.bytesperline;
513 btwrite(reg, ZR36057_VDBR);
514
515 /* video stride, status, and frame grab register */
516 reg = zr->buffer.bytesperline -
517 zr->overlay_settings.width *
518 ((zr->overlay_settings.format->depth + 7) / 8);
519 if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
520 reg += zr->buffer.bytesperline;
521 if (reg & 3)
522 dprintk(1,
523 KERN_ERR
524 "%s: zr36057_overlay() - video_stride not aligned\n",
525 ZR_DEVNAME(zr));
526 reg = (reg << ZR36057_VSSFGR_DispStride);
527 reg |= ZR36057_VSSFGR_VidOvf; /* clear overflow status */
528 btwrite(reg, ZR36057_VSSFGR);
529
530 /* Set overlay clipping */
531 if (zr->overlay_settings.clipcount > 0)
532 btor(ZR36057_OCR_OvlEnable, ZR36057_OCR);
533
534 /* ... and switch it on */
535 btor(ZR36057_VDCR_VidEn, ZR36057_VDCR);
536 } else {
537 /* Switch it off */
538 btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
539 }
540}
541
542/*
543 * The overlay mask has one bit for each pixel on a scan line,
544 * and the maximum window size is BUZ_MAX_WIDTH * BUZ_MAX_HEIGHT pixels.
545 */
546
547void
548write_overlay_mask (struct file *file,
549 struct video_clip *vp,
550 int count)
551{
552 struct zoran_fh *fh = file->private_data;
553 struct zoran *zr = fh->zr;
554 unsigned mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
555 u32 *mask;
556 int x, y, width, height;
557 unsigned i, j, k;
558 u32 reg;
559
560 /* fill mask with one bits */
561 memset(fh->overlay_mask, ~0, mask_line_size * 4 * BUZ_MAX_HEIGHT);
562 reg = 0;
563
564 for (i = 0; i < count; ++i) {
565 /* pick up local copy of clip */
566 x = vp[i].x;
567 y = vp[i].y;
568 width = vp[i].width;
569 height = vp[i].height;
570
571 /* trim clips that extend beyond the window */
572 if (x < 0) {
573 width += x;
574 x = 0;
575 }
576 if (y < 0) {
577 height += y;
578 y = 0;
579 }
580 if (x + width > fh->overlay_settings.width) {
581 width = fh->overlay_settings.width - x;
582 }
583 if (y + height > fh->overlay_settings.height) {
584 height = fh->overlay_settings.height - y;
585 }
586
587 /* ignore degenerate clips */
588 if (height <= 0) {
589 continue;
590 }
591 if (width <= 0) {
592 continue;
593 }
594
595 /* apply clip for each scan line */
596 for (j = 0; j < height; ++j) {
597 /* reset bit for each pixel */
598 /* this can be optimized later if need be */
599 mask = fh->overlay_mask + (y + j) * mask_line_size;
600 for (k = 0; k < width; ++k) {
601 mask[(x + k) / 32] &=
602 ~((u32) 1 << (x + k) % 32);
603 }
604 }
605 }
606}
607
608/* Enable/Disable uncompressed memory grabbing of the 36057 */
609
610void
611zr36057_set_memgrab (struct zoran *zr,
612 int mode)
613{
614 if (mode) {
9896bbc1
TP		 615 /* We only check SnapShot and not FrameGrab here. SnapShot==1
616 * means a capture is already in progress, but FrameGrab==1
617 * doesn't necessary mean that. It's more correct to say a 1
618 * to 0 transition indicates a capture completed. If a
619 * capture is pending when capturing is tuned off, FrameGrab
620 * will be stuck at 1 until capturing is turned back on.
621 */
622 if (btread(ZR36057_VSSFGR) & ZR36057_VSSFGR_SnapShot)
1da177e4
LT		 623 dprintk(1,
624 KERN_WARNING
9896bbc1 625 "%s: zr36057_set_memgrab(1) with SnapShot on!?\n",
1da177e4
LT		 626 ZR_DEVNAME(zr));
627
628 /* switch on VSync interrupts */
629 btwrite(IRQ_MASK, ZR36057_ISR); // Clear Interrupts
630 btor(zr->card.vsync_int, ZR36057_ICR); // SW
631
632 /* enable SnapShot */
633 btor(ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
634
635 /* Set zr36057 video front end and enable video */
636 zr36057_set_vfe(zr, zr->v4l_settings.width,
637 zr->v4l_settings.height,
638 zr->v4l_settings.format);
639
640 zr->v4l_memgrab_active = 1;
641 } else {
1da177e4
LT		 642 /* switch off VSync interrupts */
643 btand(~zr->card.vsync_int, ZR36057_ICR); // SW
644
9896bbc1
TP		 645 zr->v4l_memgrab_active = 0;
646 zr->v4l_grab_frame = NO_GRAB_ACTIVE;
647
1da177e4
LT		 648 /* reenable grabbing to screen if it was running */
649 if (zr->v4l_overlay_active) {
650 zr36057_overlay(zr, 1);
651 } else {
652 btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
653 btand(~ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
654 }
655 }
656}
657
658int
659wait_grab_pending (struct zoran *zr)
660{
661 unsigned long flags;
662
663 /* wait until all pending grabs are finished */
664
665 if (!zr->v4l_memgrab_active)
666 return 0;
667
668 wait_event_interruptible(zr->v4l_capq,
669 (zr->v4l_pend_tail == zr->v4l_pend_head));
670 if (signal_pending(current))
671 return -ERESTARTSYS;
672
673 spin_lock_irqsave(&zr->spinlock, flags);
674 zr36057_set_memgrab(zr, 0);
675 spin_unlock_irqrestore(&zr->spinlock, flags);
676
677 return 0;
678}
679
680/*****************************************************************************
681 * *
682 * Set up the Buz-specific MJPEG part *
683 * *
684 *****************************************************************************/
685
686static inline void
687set_frame (struct zoran *zr,
688 int val)
689{
6165894f 690 GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_FRAME], val);
1da177e4
LT		 691}
692
693static void
694set_videobus_dir (struct zoran *zr,
695 int val)
696{
697 switch (zr->card.type) {
698 case LML33:
699 case LML33R10:
700 if (lml33dpath == 0)
701 GPIO(zr, 5, val);
702 else
703 GPIO(zr, 5, 1);
704 break;
705 default:
6165894f
MCC		 706 GPIO(zr, zr->card.gpio[ZR_GPIO_VID_DIR],
707 zr->card.gpio_pol[ZR_GPIO_VID_DIR] ? !val : val);
1da177e4
LT		 708 break;
709 }
710}
711
712static void
713init_jpeg_queue (struct zoran *zr)
714{
715 int i;
716
717 /* re-initialize DMA ring stuff */
718 zr->jpg_que_head = 0;
719 zr->jpg_dma_head = 0;
720 zr->jpg_dma_tail = 0;
721 zr->jpg_que_tail = 0;
722 zr->jpg_seq_num = 0;
723 zr->JPEG_error = 0;
724 zr->num_errors = 0;
725 zr->jpg_err_seq = 0;
726 zr->jpg_err_shift = 0;
727 zr->jpg_queued_num = 0;
728 for (i = 0; i < zr->jpg_buffers.num_buffers; i++) {
729 zr->jpg_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
730 }
731 for (i = 0; i < BUZ_NUM_STAT_COM; i++) {
732 zr->stat_com[i] = cpu_to_le32(1); /* mark as unavailable to zr36057 */
733 }
734}
735
736static void
737zr36057_set_jpg (struct zoran *zr,
738 enum zoran_codec_mode mode)
739{
740 struct tvnorm *tvn;
741 u32 reg;
742
743 tvn = zr->timing;
744
745 /* assert P_Reset, disable code transfer, deassert Active */
746 btwrite(0, ZR36057_JPC);
747
748 /* MJPEG compression mode */
749 switch (mode) {
750
751 case BUZ_MODE_MOTION_COMPRESS:
752 default:
753 reg = ZR36057_JMC_MJPGCmpMode;
754 break;
755
756 case BUZ_MODE_MOTION_DECOMPRESS:
757 reg = ZR36057_JMC_MJPGExpMode;
758 reg |= ZR36057_JMC_SyncMstr;
759 /* RJ: The following is experimental - improves the output to screen */
760 //if(zr->jpg_settings.VFIFO_FB) reg |= ZR36057_JMC_VFIFO_FB; // No, it doesn't. SM
761 break;
762
763 case BUZ_MODE_STILL_COMPRESS:
764 reg = ZR36057_JMC_JPGCmpMode;
765 break;
766
767 case BUZ_MODE_STILL_DECOMPRESS:
768 reg = ZR36057_JMC_JPGExpMode;
769 break;
770
771 }
772 reg |= ZR36057_JMC_JPG;
773 if (zr->jpg_settings.field_per_buff == 1)
774 reg |= ZR36057_JMC_Fld_per_buff;
775 btwrite(reg, ZR36057_JMC);
776
777 /* vertical */
778 btor(ZR36057_VFEVCR_VSPol, ZR36057_VFEVCR);
779 reg = (6 << ZR36057_VSP_VsyncSize) |
780 (tvn->Ht << ZR36057_VSP_FrmTot);
781 btwrite(reg, ZR36057_VSP);
782 reg = ((zr->jpg_settings.img_y + tvn->VStart) << ZR36057_FVAP_NAY) |
783 (zr->jpg_settings.img_height << ZR36057_FVAP_PAY);
784 btwrite(reg, ZR36057_FVAP);
785
786 /* horizontal */
787 if (zr->card.vfe_pol.hsync_pol)
788 btor(ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
789 else
d56410e0 790 btand(~ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
1da177e4
LT		 791 reg = ((tvn->HSyncStart) << ZR36057_HSP_HsyncStart) |
792 (tvn->Wt << ZR36057_HSP_LineTot);
793 btwrite(reg, ZR36057_HSP);
794 reg = ((zr->jpg_settings.img_x +
d56410e0 795 tvn->HStart + 4) << ZR36057_FHAP_NAX) |
1da177e4
LT		 796 (zr->jpg_settings.img_width << ZR36057_FHAP_PAX);
797 btwrite(reg, ZR36057_FHAP);
798
799 /* field process parameters */
800 if (zr->jpg_settings.odd_even)
801 reg = ZR36057_FPP_Odd_Even;
802 else
803 reg = 0;
804
805 btwrite(reg, ZR36057_FPP);
806
807 /* Set proper VCLK Polarity, else colors will be wrong during playback */
808 //btor(ZR36057_VFESPFR_VCLKPol, ZR36057_VFESPFR);
809
810 /* code base address */
811 reg = virt_to_bus(zr->stat_com);
812 btwrite(reg, ZR36057_JCBA);
813
814 /* FIFO threshold (FIFO is 160. double words) */
815 /* NOTE: decimal values here */
816 switch (mode) {
817
818 case BUZ_MODE_STILL_COMPRESS:
819 case BUZ_MODE_MOTION_COMPRESS:
820 if (zr->card.type != BUZ)
821 reg = 140;
822 else
823 reg = 60;
824 break;
825
826 case BUZ_MODE_STILL_DECOMPRESS:
827 case BUZ_MODE_MOTION_DECOMPRESS:
828 reg = 20;
829 break;
830
831 default:
832 reg = 80;
833 break;
834
835 }
836 btwrite(reg, ZR36057_JCFT);
837 zr36057_adjust_vfe(zr, mode);
838
839}
840
841void
842print_interrupts (struct zoran *zr)
843{
844 int res, noerr = 0;
845
846 printk(KERN_INFO "%s: interrupts received:", ZR_DEVNAME(zr));
847 if ((res = zr->field_counter) < -1 || res > 1) {
848 printk(" FD:%d", res);
849 }
850 if ((res = zr->intr_counter_GIRQ1) != 0) {
851 printk(" GIRQ1:%d", res);
852 noerr++;
853 }
854 if ((res = zr->intr_counter_GIRQ0) != 0) {
855 printk(" GIRQ0:%d", res);
856 noerr++;
857 }
858 if ((res = zr->intr_counter_CodRepIRQ) != 0) {
859 printk(" CodRepIRQ:%d", res);
860 noerr++;
861 }
862 if ((res = zr->intr_counter_JPEGRepIRQ) != 0) {
863 printk(" JPEGRepIRQ:%d", res);
864 noerr++;
865 }
866 if (zr->JPEG_max_missed) {
867 printk(" JPEG delays: max=%d min=%d", zr->JPEG_max_missed,
868 zr->JPEG_min_missed);
869 }
870 if (zr->END_event_missed) {
871 printk(" ENDs missed: %d", zr->END_event_missed);
872 }
873 //if (zr->jpg_queued_num) {
874 printk(" queue_state=%ld/%ld/%ld/%ld", zr->jpg_que_tail,
875 zr->jpg_dma_tail, zr->jpg_dma_head, zr->jpg_que_head);
876 //}
877 if (!noerr) {
878 printk(": no interrupts detected.");
879 }
880 printk("\n");
881}
882
883void
884clear_interrupt_counters (struct zoran *zr)
885{
886 zr->intr_counter_GIRQ1 = 0;
887 zr->intr_counter_GIRQ0 = 0;
888 zr->intr_counter_CodRepIRQ = 0;
889 zr->intr_counter_JPEGRepIRQ = 0;
890 zr->field_counter = 0;
891 zr->IRQ1_in = 0;
892 zr->IRQ1_out = 0;
893 zr->JPEG_in = 0;
894 zr->JPEG_out = 0;
895 zr->JPEG_0 = 0;
896 zr->JPEG_1 = 0;
897 zr->END_event_missed = 0;
898 zr->JPEG_missed = 0;
899 zr->JPEG_max_missed = 0;
900 zr->JPEG_min_missed = 0x7fffffff;
901}
902
903static u32
904count_reset_interrupt (struct zoran *zr)
905{
906 u32 isr;
907
908 if ((isr = btread(ZR36057_ISR) & 0x78000000)) {
909 if (isr & ZR36057_ISR_GIRQ1) {
910 btwrite(ZR36057_ISR_GIRQ1, ZR36057_ISR);
911 zr->intr_counter_GIRQ1++;
912 }
913 if (isr & ZR36057_ISR_GIRQ0) {
914 btwrite(ZR36057_ISR_GIRQ0, ZR36057_ISR);
915 zr->intr_counter_GIRQ0++;
916 }
917 if (isr & ZR36057_ISR_CodRepIRQ) {
918 btwrite(ZR36057_ISR_CodRepIRQ, ZR36057_ISR);
919 zr->intr_counter_CodRepIRQ++;
920 }
921 if (isr & ZR36057_ISR_JPEGRepIRQ) {
922 btwrite(ZR36057_ISR_JPEGRepIRQ, ZR36057_ISR);
923 zr->intr_counter_JPEGRepIRQ++;
924 }
925 }
926 return isr;
927}
928
1da177e4
LT		 929void
930jpeg_start (struct zoran *zr)
931{
932 int reg;
933
934 zr->frame_num = 0;
935
936 /* deassert P_reset, disable code transfer, deassert Active */
937 btwrite(ZR36057_JPC_P_Reset, ZR36057_JPC);
938 /* stop flushing the internal code buffer */
939 btand(~ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
940 /* enable code transfer */
941 btor(ZR36057_JPC_CodTrnsEn, ZR36057_JPC);
942
943 /* clear IRQs */
944 btwrite(IRQ_MASK, ZR36057_ISR);
945 /* enable the JPEG IRQs */
946 btwrite(zr->card.jpeg_int |
947 ZR36057_ICR_JPEGRepIRQ |
948 ZR36057_ICR_IntPinEn,
949 ZR36057_ICR);
950
951 set_frame(zr, 0); // \FRAME
952
953 /* set the JPEG codec guest ID */
954 reg = (zr->card.gpcs[1] << ZR36057_JCGI_JPEGuestID) |
955 (0 << ZR36057_JCGI_JPEGuestReg);
956 btwrite(reg, ZR36057_JCGI);
957
958 if (zr->card.video_vfe == CODEC_TYPE_ZR36016 &&
959 zr->card.video_codec == CODEC_TYPE_ZR36050) {
960 /* Enable processing on the ZR36016 */
961 if (zr->vfe)
962 zr36016_write(zr->vfe, 0, 1);
963
964 /* load the address of the GO register in the ZR36050 latch */
965 post_office_write(zr, 0, 0, 0);
966 }
967
968 /* assert Active */
969 btor(ZR36057_JPC_Active, ZR36057_JPC);
970
971 /* enable the Go generation */
972 btor(ZR36057_JMC_Go_en, ZR36057_JMC);
973 udelay(30);
974
975 set_frame(zr, 1); // /FRAME
976
977 dprintk(3, KERN_DEBUG "%s: jpeg_start\n", ZR_DEVNAME(zr));
978}
979
980void
981zr36057_enable_jpg (struct zoran *zr,
982 enum zoran_codec_mode mode)
983{
ff699e6b 984 static int zero;
1da177e4
LT		 985 static int one = 1;
986 struct vfe_settings cap;
987 int field_size =
988 zr->jpg_buffers.buffer_size / zr->jpg_settings.field_per_buff;
989
990 zr->codec_mode = mode;
991
992 cap.x = zr->jpg_settings.img_x;
993 cap.y = zr->jpg_settings.img_y;
994 cap.width = zr->jpg_settings.img_width;
995 cap.height = zr->jpg_settings.img_height;
996 cap.decimation =
997 zr->jpg_settings.HorDcm | (zr->jpg_settings.VerDcm << 8);
998 cap.quality = zr->jpg_settings.jpg_comp.quality;
999
1000 switch (mode) {
1001
1002 case BUZ_MODE_MOTION_COMPRESS: {
1003 struct jpeg_app_marker app;
1004 struct jpeg_com_marker com;
1005
1006 /* In motion compress mode, the decoder output must be enabled, and
1007 * the video bus direction set to input.
1008 */
1009 set_videobus_dir(zr, 0);
1010 decoder_command(zr, DECODER_ENABLE_OUTPUT, &one);
1011 encoder_command(zr, ENCODER_SET_INPUT, &zero);
1012
1013 /* Take the JPEG codec and the VFE out of sleep */
1014 jpeg_codec_sleep(zr, 0);
1015
1016 /* set JPEG app/com marker */
1017 app.appn = zr->jpg_settings.jpg_comp.APPn;
1018 app.len = zr->jpg_settings.jpg_comp.APP_len;
1019 memcpy(app.data, zr->jpg_settings.jpg_comp.APP_data, 60);
1020 zr->codec->control(zr->codec, CODEC_S_JPEG_APP_DATA,
1021 sizeof(struct jpeg_app_marker), &app);
1022
1023 com.len = zr->jpg_settings.jpg_comp.COM_len;
1024 memcpy(com.data, zr->jpg_settings.jpg_comp.COM_data, 60);
1025 zr->codec->control(zr->codec, CODEC_S_JPEG_COM_DATA,
1026 sizeof(struct jpeg_com_marker), &com);
1027
1028 /* Setup the JPEG codec */
1029 zr->codec->control(zr->codec, CODEC_S_JPEG_TDS_BYTE,
1030 sizeof(int), &field_size);
1031 zr->codec->set_video(zr->codec, zr->timing, &cap,
1032 &zr->card.vfe_pol);
1033 zr->codec->set_mode(zr->codec, CODEC_DO_COMPRESSION);
1034
1035 /* Setup the VFE */
1036 if (zr->vfe) {
1037 zr->vfe->control(zr->vfe, CODEC_S_JPEG_TDS_BYTE,
1038 sizeof(int), &field_size);
1039 zr->vfe->set_video(zr->vfe, zr->timing, &cap,
1040 &zr->card.vfe_pol);
1041 zr->vfe->set_mode(zr->vfe, CODEC_DO_COMPRESSION);
1042 }
1043
1044 init_jpeg_queue(zr);
1045 zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
1046
1047 clear_interrupt_counters(zr);
1048 dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_COMPRESS)\n",
1049 ZR_DEVNAME(zr));
1050 break;
1051 }
1052
1053 case BUZ_MODE_MOTION_DECOMPRESS:
1054 /* In motion decompression mode, the decoder output must be disabled, and
1055 * the video bus direction set to output.
1056 */
1057 decoder_command(zr, DECODER_ENABLE_OUTPUT, &zero);
1058 set_videobus_dir(zr, 1);
1059 encoder_command(zr, ENCODER_SET_INPUT, &one);
1060
1061 /* Take the JPEG codec and the VFE out of sleep */
1062 jpeg_codec_sleep(zr, 0);
1063 /* Setup the VFE */
1064 if (zr->vfe) {
1065 zr->vfe->set_video(zr->vfe, zr->timing, &cap,
1066 &zr->card.vfe_pol);
1067 zr->vfe->set_mode(zr->vfe, CODEC_DO_EXPANSION);
1068 }
1069 /* Setup the JPEG codec */
1070 zr->codec->set_video(zr->codec, zr->timing, &cap,
1071 &zr->card.vfe_pol);
1072 zr->codec->set_mode(zr->codec, CODEC_DO_EXPANSION);
1073
1074 init_jpeg_queue(zr);
1075 zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
1076
1077 clear_interrupt_counters(zr);
1078 dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_DECOMPRESS)\n",
1079 ZR_DEVNAME(zr));
1080 break;
1081
1082 case BUZ_MODE_IDLE:
1083 default:
1084 /* shut down processing */
1085 btand(~(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ),
1086 ZR36057_ICR);
1087 btwrite(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ,
1088 ZR36057_ISR);
1089 btand(~ZR36057_JMC_Go_en, ZR36057_JMC); // \Go_en
1090
1091 msleep(50);
1092
1093 set_videobus_dir(zr, 0);
1094 set_frame(zr, 1); // /FRAME
1095 btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR); // /CFlush
1096 btwrite(0, ZR36057_JPC); // \P_Reset,\CodTrnsEn,\Active
1097 btand(~ZR36057_JMC_VFIFO_FB, ZR36057_JMC);
1098 btand(~ZR36057_JMC_SyncMstr, ZR36057_JMC);
1099 jpeg_codec_reset(zr);
1100 jpeg_codec_sleep(zr, 1);
1101 zr36057_adjust_vfe(zr, mode);
1102
1103 decoder_command(zr, DECODER_ENABLE_OUTPUT, &one);
1104 encoder_command(zr, ENCODER_SET_INPUT, &zero);
1105
1106 dprintk(2, KERN_INFO "%s: enable_jpg(IDLE)\n", ZR_DEVNAME(zr));
1107 break;
1108
1109 }
1110}
1111
1112/* when this is called the spinlock must be held */
1113void
1114zoran_feed_stat_com (struct zoran *zr)
1115{
1116 /* move frames from pending queue to DMA */
1117
1118 int frame, i, max_stat_com;
1119
1120 max_stat_com =
1121 (zr->jpg_settings.TmpDcm ==
1122 1) ? BUZ_NUM_STAT_COM : (BUZ_NUM_STAT_COM >> 1);
1123
1124 while ((zr->jpg_dma_head - zr->jpg_dma_tail) < max_stat_com &&
1125 zr->jpg_dma_head < zr->jpg_que_head) {
1126
1127 frame = zr->jpg_pend[zr->jpg_dma_head & BUZ_MASK_FRAME];
1128 if (zr->jpg_settings.TmpDcm == 1) {
1129 /* fill 1 stat_com entry */
1130 i = (zr->jpg_dma_head -
1131 zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
1132 if (!(zr->stat_com[i] & cpu_to_le32(1)))
1133 break;
1134 zr->stat_com[i] =
1135 cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
1136 } else {
1137 /* fill 2 stat_com entries */
1138 i = ((zr->jpg_dma_head -
1139 zr->jpg_err_shift) & 1) * 2;
1140 if (!(zr->stat_com[i] & cpu_to_le32(1)))
1141 break;
1142 zr->stat_com[i] =
1143 cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
1144 zr->stat_com[i + 1] =
1145 cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
1146 }
1147 zr->jpg_buffers.buffer[frame].state = BUZ_STATE_DMA;
1148 zr->jpg_dma_head++;
1149
1150 }
1151 if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS)
1152 zr->jpg_queued_num++;
1153}
1154
1155/* when this is called the spinlock must be held */
1156static void
1157zoran_reap_stat_com (struct zoran *zr)
1158{
1159 /* move frames from DMA queue to done queue */
1160
1161 int i;
1162 u32 stat_com;
1163 unsigned int seq;
1164 unsigned int dif;
1165 struct zoran_jpg_buffer *buffer;
1166 int frame;
1167
1168 /* In motion decompress we don't have a hardware frame counter,
1169 * we just count the interrupts here */
1170
1171 if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
1172 zr->jpg_seq_num++;
1173 }
1174 while (zr->jpg_dma_tail < zr->jpg_dma_head) {
1175 if (zr->jpg_settings.TmpDcm == 1)
1176 i = (zr->jpg_dma_tail -
1177 zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
1178 else
1179 i = ((zr->jpg_dma_tail -
1180 zr->jpg_err_shift) & 1) * 2 + 1;
1181
1182 stat_com = le32_to_cpu(zr->stat_com[i]);
1183
1184 if ((stat_com & 1) == 0) {
1185 return;
1186 }
1187 frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
1188 buffer = &zr->jpg_buffers.buffer[frame];
1189 do_gettimeofday(&buffer->bs.timestamp);
1190
1191 if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
1192 buffer->bs.length = (stat_com & 0x7fffff) >> 1;
1193
1194 /* update sequence number with the help of the counter in stat_com */
1195
1196 seq = ((stat_com >> 24) + zr->jpg_err_seq) & 0xff;
1197 dif = (seq - zr->jpg_seq_num) & 0xff;
1198 zr->jpg_seq_num += dif;
1199 } else {
1200 buffer->bs.length = 0;
1201 }
1202 buffer->bs.seq =
1203 zr->jpg_settings.TmpDcm ==
1204 2 ? (zr->jpg_seq_num >> 1) : zr->jpg_seq_num;
1205 buffer->state = BUZ_STATE_DONE;
1206
1207 zr->jpg_dma_tail++;
1208 }
1209}
1210
7f37cc9b
HV		 1211static void zoran_restart(struct zoran *zr)
1212{
1213 /* Now the stat_comm buffer is ready for restart */
1214 int status, mode;
1215
1216 if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
1217 decoder_command(zr, DECODER_GET_STATUS, &status);
1218 mode = CODEC_DO_COMPRESSION;
1219 } else {
1220 status = 0;
1221 mode = CODEC_DO_EXPANSION;
1222 }
1223 if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
1224 (status & DECODER_STATUS_GOOD)) {
1225 /********** RESTART code *************/
1226 jpeg_codec_reset(zr);
1227 zr->codec->set_mode(zr->codec, mode);
1228 zr36057_set_jpg(zr, zr->codec_mode);
1229 jpeg_start(zr);
1230
1231 if (zr->num_errors <= 8)
1232 dprintk(2, KERN_INFO "%s: Restart\n",
1233 ZR_DEVNAME(zr));
1234
1235 zr->JPEG_missed = 0;
1236 zr->JPEG_error = 2;
1237 /********** End RESTART code ***********/
1238 }
1239}
1240
1da177e4
LT		 1241static void
1242error_handler (struct zoran *zr,
1243 u32 astat,
1244 u32 stat)
1245{
7f37cc9b
HV		 1246 int i, j;
1247
1da177e4 1248 /* This is JPEG error handling part */
7f37cc9b
HV		 1249 if (zr->codec_mode != BUZ_MODE_MOTION_COMPRESS &&
1250 zr->codec_mode != BUZ_MODE_MOTION_DECOMPRESS) {
1da177e4
LT		 1251 return;
1252 }
1253
1254 if ((stat & 1) == 0 &&
1255 zr->codec_mode == BUZ_MODE_MOTION_COMPRESS &&
7f37cc9b 1256 zr->jpg_dma_tail - zr->jpg_que_tail >= zr->jpg_buffers.num_buffers) {
1da177e4
LT		 1257 /* No free buffers... */
1258 zoran_reap_stat_com(zr);
1259 zoran_feed_stat_com(zr);
1260 wake_up_interruptible(&zr->jpg_capq);
1261 zr->JPEG_missed = 0;
1262 return;
1263 }
1264
7f37cc9b
HV		 1265 if (zr->JPEG_error == 1) {
1266 zoran_restart(zr);
1267 return;
1268 }
1da177e4 1269
7f37cc9b
HV		 1270 /*
1271 * First entry: error just happened during normal operation
1272 *
1273 * In BUZ_MODE_MOTION_COMPRESS:
1274 *
1275 * Possible glitch in TV signal. In this case we should
1276 * stop the codec and wait for good quality signal before
1277 * restarting it to avoid further problems
1278 *
1279 * In BUZ_MODE_MOTION_DECOMPRESS:
1280 *
1281 * Bad JPEG frame: we have to mark it as processed (codec crashed
1282 * and was not able to do it itself), and to remove it from queue.
1283 */
1284 btand(~ZR36057_JMC_Go_en, ZR36057_JMC);
1285 udelay(1);
1286 stat = stat | (post_office_read(zr, 7, 0) & 3) << 8;
1287 btwrite(0, ZR36057_JPC);
1288 btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
1289 jpeg_codec_reset(zr);
1290 jpeg_codec_sleep(zr, 1);
1291 zr->JPEG_error = 1;
1292 zr->num_errors++;
1293
1294 /* Report error */
1295 if (zr36067_debug > 1 && zr->num_errors <= 8) {
1296 long frame;
1297
1298 frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
1299 printk(KERN_ERR
1300 "%s: JPEG error stat=0x%08x(0x%08x) queue_state=%ld/%ld/%ld/%ld seq=%ld frame=%ld. Codec stopped. ",
1301 ZR_DEVNAME(zr), stat, zr->last_isr,
1302 zr->jpg_que_tail, zr->jpg_dma_tail,
1303 zr->jpg_dma_head, zr->jpg_que_head,
1304 zr->jpg_seq_num, frame);
1305 printk(KERN_INFO "stat_com frames:");
1306 for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
1307 for (i = 0; i < zr->jpg_buffers.num_buffers; i++) {
1308 if (le32_to_cpu(zr->stat_com[j]) == zr->jpg_buffers.buffer[i].frag_tab_bus)
1309 printk(KERN_CONT "% d->%d", j, i);
1da177e4 1310 }
1da177e4 1311 }
7f37cc9b 1312 printk(KERN_CONT "\n");
1da177e4 1313 }
7f37cc9b
HV		 1314 /* Find an entry in stat_com and rotate contents */
1315 if (zr->jpg_settings.TmpDcm == 1)
1316 i = (zr->jpg_dma_tail - zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
1317 else
1318 i = ((zr->jpg_dma_tail - zr->jpg_err_shift) & 1) * 2;
1319 if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
1320 /* Mimic zr36067 operation */
1321 zr->stat_com[i] |= cpu_to_le32(1);
1322 if (zr->jpg_settings.TmpDcm != 1)
1323 zr->stat_com[i + 1] |= cpu_to_le32(1);
1324 /* Refill */
1325 zoran_reap_stat_com(zr);
1326 zoran_feed_stat_com(zr);
1327 wake_up_interruptible(&zr->jpg_capq);
1328 /* Find an entry in stat_com again after refill */
1329 if (zr->jpg_settings.TmpDcm == 1)
1330 i = (zr->jpg_dma_tail - zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
1331 else
1332 i = ((zr->jpg_dma_tail - zr->jpg_err_shift) & 1) * 2;
1333 }
1334 if (i) {
1335 /* Rotate stat_comm entries to make current entry first */
1336 int j;
1337 __le32 bus_addr[BUZ_NUM_STAT_COM];
1338
1339 /* Here we are copying the stat_com array, which
1340 * is already in little endian format, so
1341 * no endian conversions here
1342 */
1343 memcpy(bus_addr, zr->stat_com, sizeof(bus_addr));
1da177e4 1344
7f37cc9b
HV		 1345 for (j = 0; j < BUZ_NUM_STAT_COM; j++)
1346 zr->stat_com[j] = bus_addr[(i + j) & BUZ_MASK_STAT_COM];
1da177e4 1347
7f37cc9b
HV		 1348 zr->jpg_err_shift += i;
1349 zr->jpg_err_shift &= BUZ_MASK_STAT_COM;
1350 }
1351 if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS)
1352 zr->jpg_err_seq = zr->jpg_seq_num; /* + 1; */
1353 zoran_restart(zr);
1da177e4
LT		 1354}
1355
1356irqreturn_t
1357zoran_irq (int irq,
7d12e780 1358 void *dev_id)
1da177e4
LT		 1359{
1360 u32 stat, astat;
1361 int count;
1362 struct zoran *zr;
1363 unsigned long flags;
1364
c7bec5ab 1365 zr = dev_id;
1da177e4
LT		 1366 count = 0;
1367
1368 if (zr->testing) {
1369 /* Testing interrupts */
1370 spin_lock_irqsave(&zr->spinlock, flags);
1371 while ((stat = count_reset_interrupt(zr))) {
1372 if (count++ > 100) {
1373 btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
1374 dprintk(1,
1375 KERN_ERR
1376 "%s: IRQ lockup while testing, isr=0x%08x, cleared int mask\n",
1377 ZR_DEVNAME(zr), stat);
1378 wake_up_interruptible(&zr->test_q);
1379 }
1380 }
1381 zr->last_isr = stat;
1382 spin_unlock_irqrestore(&zr->spinlock, flags);
1383 return IRQ_HANDLED;
1384 }
1385
1386 spin_lock_irqsave(&zr->spinlock, flags);
1387 while (1) {
1388 /* get/clear interrupt status bits */
1389 stat = count_reset_interrupt(zr);
1390 astat = stat & IRQ_MASK;
1391 if (!astat) {
1392 break;
1393 }
1394 dprintk(4,
1395 KERN_DEBUG
1396 "zoran_irq: astat: 0x%08x, mask: 0x%08x\n",
1397 astat, btread(ZR36057_ICR));
1398 if (astat & zr->card.vsync_int) { // SW
1399
1400 if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
1401 zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
1402 /* count missed interrupts */
1403 zr->JPEG_missed++;
1404 }
1405 //post_office_read(zr,1,0);
1406 /* Interrupts may still happen when
1407 * zr->v4l_memgrab_active is switched off.
1408 * We simply ignore them */
1409
1410 if (zr->v4l_memgrab_active) {
1da177e4 1411 /* A lot more checks should be here ... */
7f37cc9b 1412 if ((btread(ZR36057_VSSFGR) & ZR36057_VSSFGR_SnapShot) == 0)
1da177e4
LT		 1413 dprintk(1,
1414 KERN_WARNING
1415 "%s: BuzIRQ with SnapShot off ???\n",
1416 ZR_DEVNAME(zr));
1417
1418 if (zr->v4l_grab_frame != NO_GRAB_ACTIVE) {
1419 /* There is a grab on a frame going on, check if it has finished */
7f37cc9b 1420 if ((btread(ZR36057_VSSFGR) & ZR36057_VSSFGR_FrameGrab) == 0) {
1da177e4
LT		 1421 /* it is finished, notify the user */
1422
1423 zr->v4l_buffers.buffer[zr->v4l_grab_frame].state = BUZ_STATE_DONE;
1424 zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.seq = zr->v4l_grab_seq;
1425 do_gettimeofday(&zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.timestamp);
1426 zr->v4l_grab_frame = NO_GRAB_ACTIVE;
1427 zr->v4l_pend_tail++;
1428 }
1429 }
1430
1431 if (zr->v4l_grab_frame == NO_GRAB_ACTIVE)
1432 wake_up_interruptible(&zr->v4l_capq);
1433
1434 /* Check if there is another grab queued */
1435
1436 if (zr->v4l_grab_frame == NO_GRAB_ACTIVE &&
1437 zr->v4l_pend_tail != zr->v4l_pend_head) {
7f37cc9b 1438 int frame = zr->v4l_pend[zr->v4l_pend_tail & V4L_MASK_FRAME];
1da177e4
LT		 1439 u32 reg;
1440
1441 zr->v4l_grab_frame = frame;
1442
1443 /* Set zr36057 video front end and enable video */
1444
1445 /* Buffer address */
1446
7f37cc9b 1447 reg = zr->v4l_buffers.buffer[frame].fbuffer_bus;
1da177e4 1448 btwrite(reg, ZR36057_VDTR);
7f37cc9b
HV		 1449 if (zr->v4l_settings.height > BUZ_MAX_HEIGHT / 2)
1450 reg += zr->v4l_settings.bytesperline;
1da177e4
LT		 1451 btwrite(reg, ZR36057_VDBR);
1452
1453 /* video stride, status, and frame grab register */
1454 reg = 0;
7f37cc9b
HV		 1455 if (zr->v4l_settings.height > BUZ_MAX_HEIGHT / 2)
1456 reg += zr->v4l_settings.bytesperline;
1457 reg = (reg << ZR36057_VSSFGR_DispStride);
1da177e4
LT		 1458 reg |= ZR36057_VSSFGR_VidOvf;
1459 reg |= ZR36057_VSSFGR_SnapShot;
1460 reg |= ZR36057_VSSFGR_FrameGrab;
1461 btwrite(reg, ZR36057_VSSFGR);
1462
1463 btor(ZR36057_VDCR_VidEn,
1464 ZR36057_VDCR);
1465 }
1466 }
1467
1468 /* even if we don't grab, we do want to increment
1469 * the sequence counter to see lost frames */
1470 zr->v4l_grab_seq++;
1471 }
1472#if (IRQ_MASK & ZR36057_ISR_CodRepIRQ)
1473 if (astat & ZR36057_ISR_CodRepIRQ) {
1474 zr->intr_counter_CodRepIRQ++;
7f37cc9b 1475 IDEBUG(printk(KERN_DEBUG "%s: ZR36057_ISR_CodRepIRQ\n",
1da177e4
LT		 1476 ZR_DEVNAME(zr)));
1477 btand(~ZR36057_ICR_CodRepIRQ, ZR36057_ICR);
1478 }
1479#endif /* (IRQ_MASK & ZR36057_ISR_CodRepIRQ) */
1480
1481#if (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ)
7f37cc9b
HV		 1482 if ((astat & ZR36057_ISR_JPEGRepIRQ) &&
1483 (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
1484 zr->codec_mode == BUZ_MODE_MOTION_COMPRESS)) {
1485 if (zr36067_debug > 1 && (!zr->frame_num || zr->JPEG_error)) {
1486 char sc[] = "0000";
1487 char sv[5];
1488 int i;
1489
1490 printk(KERN_INFO
1491 "%s: first frame ready: state=0x%08x odd_even=%d field_per_buff=%d delay=%d\n",
1492 ZR_DEVNAME(zr), stat,
1493 zr->jpg_settings.odd_even,
1494 zr->jpg_settings.field_per_buff,
1495 zr->JPEG_missed);
1496
1497 strcpy(sv, sc);
1498 for (i = 0; i < 4; i++) {
1499 if (le32_to_cpu(zr->stat_com[i]) & 1)
1500 sv[i] = '1';
1da177e4 1501 }
7f37cc9b
HV		 1502 sv[4] = 0;
1503 printk(KERN_INFO
1504 "%s: stat_com=%s queue_state=%ld/%ld/%ld/%ld\n",
1505 ZR_DEVNAME(zr), sv,
1506 zr->jpg_que_tail,
1507 zr->jpg_dma_tail,
1508 zr->jpg_dma_head,
1509 zr->jpg_que_head);
1510 } else {
1511 /* Get statistics */
1512 if (zr->JPEG_missed > zr->JPEG_max_missed)
1513 zr->JPEG_max_missed = zr->JPEG_missed;
1514 if (zr->JPEG_missed < zr->JPEG_min_missed)
1515 zr->JPEG_min_missed = zr->JPEG_missed;
1516 }
1da177e4 1517
7f37cc9b
HV		 1518 if (zr36067_debug > 2 && zr->frame_num < 6) {
1519 int i;
1520
1521 printk(KERN_INFO "%s: seq=%ld stat_com:",
1522 ZR_DEVNAME(zr), zr->jpg_seq_num);
1523 for (i = 0; i < 4; i++) {
1524 printk(KERN_CONT " %08x",
1525 le32_to_cpu(zr->stat_com[i]));
1da177e4 1526 }
7f37cc9b
HV		 1527 printk(KERN_CONT "\n");
1528 }
1529 zr->frame_num++;
1530 zr->JPEG_missed = 0;
1531 zr->JPEG_error = 0;
1532 zoran_reap_stat_com(zr);
1533 zoran_feed_stat_com(zr);
1534 wake_up_interruptible(&zr->jpg_capq);
1da177e4
LT		 1535 }
1536#endif /* (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ) */
1537
1538 /* DATERR, too many fields missed, error processing */
1539 if ((astat & zr->card.jpeg_int) ||
1540 zr->JPEG_missed > 25 ||
1541 zr->JPEG_error == 1 ||
1542 ((zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) &&
7f37cc9b 1543 (zr->frame_num & (zr->JPEG_missed > zr->jpg_settings.field_per_buff)))) {
1da177e4
LT		 1544 error_handler(zr, astat, stat);
1545 }
1546
1547 count++;
1548 if (count > 10) {
1549 dprintk(2, KERN_WARNING "%s: irq loop %d\n",
1550 ZR_DEVNAME(zr), count);
1551 if (count > 20) {
1552 btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
1553 dprintk(2,
1554 KERN_ERR
1555 "%s: IRQ lockup, cleared int mask\n",
1556 ZR_DEVNAME(zr));
1557 break;
1558 }
1559 }
1560 zr->last_isr = stat;
1561 }
1562 spin_unlock_irqrestore(&zr->spinlock, flags);
1563
1564 return IRQ_HANDLED;
1565}
1566
1567void
1568zoran_set_pci_master (struct zoran *zr,
1569 int set_master)
1570{
1571 if (set_master) {
1572 pci_set_master(zr->pci_dev);
1573 } else {
1574 u16 command;
1575
1576 pci_read_config_word(zr->pci_dev, PCI_COMMAND, &command);
1577 command &= ~PCI_COMMAND_MASTER;
1578 pci_write_config_word(zr->pci_dev, PCI_COMMAND, command);
1579 }
1580}
1581
1582void
1583zoran_init_hardware (struct zoran *zr)
1584{
1585 int j, zero = 0;
1586
1587 /* Enable bus-mastering */
1588 zoran_set_pci_master(zr, 1);
1589
1590 /* Initialize the board */
1591 if (zr->card.init) {
1592 zr->card.init(zr);
1593 }
1594
1595 j = zr->card.input[zr->input].muxsel;
1596
1597 decoder_command(zr, 0, NULL);
1598 decoder_command(zr, DECODER_SET_NORM, &zr->norm);
1599 decoder_command(zr, DECODER_SET_INPUT, &j);
1600
1601 encoder_command(zr, 0, NULL);
1602 encoder_command(zr, ENCODER_SET_NORM, &zr->norm);
1603 encoder_command(zr, ENCODER_SET_INPUT, &zero);
1604
1605 /* toggle JPEG codec sleep to sync PLL */
1606 jpeg_codec_sleep(zr, 1);
1607 jpeg_codec_sleep(zr, 0);
1608
1609 /* set individual interrupt enables (without GIRQ1)
1610 * but don't global enable until zoran_open() */
1611
1612 //btwrite(IRQ_MASK & ~ZR36057_ISR_GIRQ1, ZR36057_ICR); // SW
1613 // It looks like using only JPEGRepIRQEn is not always reliable,
1614 // may be when JPEG codec crashes it won't generate IRQ? So,
1615 /*CP*/ // btwrite(IRQ_MASK, ZR36057_ICR); // Enable Vsync interrupts too. SM WHY ? LP
1616 zr36057_init_vfe(zr);
1617
1618 zr36057_enable_jpg(zr, BUZ_MODE_IDLE);
1619
1620 btwrite(IRQ_MASK, ZR36057_ISR); // Clears interrupts
1621}
1622
1623void
1624zr36057_restart (struct zoran *zr)
1625{
1626 btwrite(0, ZR36057_SPGPPCR);
1627 mdelay(1);
1628 btor(ZR36057_SPGPPCR_SoftReset, ZR36057_SPGPPCR);
1629 mdelay(1);
1630
1631 /* assert P_Reset */
1632 btwrite(0, ZR36057_JPC);
1633 /* set up GPIO direction - all output */
1634 btwrite(ZR36057_SPGPPCR_SoftReset | 0, ZR36057_SPGPPCR);
1635
1636 /* set up GPIO pins and guest bus timing */
1637 btwrite((0x81 << 24) | 0x8888, ZR36057_GPPGCR1);
1638}
1639
1640/*
1641 * initialize video front end
1642 */
1643
1644static void
1645zr36057_init_vfe (struct zoran *zr)
1646{
1647 u32 reg;
1648
1649 reg = btread(ZR36057_VFESPFR);
1650 reg |= ZR36057_VFESPFR_LittleEndian;
1651 reg &= ~ZR36057_VFESPFR_VCLKPol;
1652 reg |= ZR36057_VFESPFR_ExtFl;
1653 reg |= ZR36057_VFESPFR_TopField;
1654 btwrite(reg, ZR36057_VFESPFR);
1655 reg = btread(ZR36057_VDCR);
1656 if (pci_pci_problems & PCIPCI_TRITON)
1657 // || zr->revision < 1) // Revision 1 has also Triton support
1658 reg &= ~ZR36057_VDCR_Triton;
1659 else
1660 reg |= ZR36057_VDCR_Triton;
1661 btwrite(reg, ZR36057_VDCR);
1662}
1663
1664/*
1665 * Interface to decoder and encoder chips using i2c bus
1666 */
1667
1668int
1669decoder_command (struct zoran *zr,
1670 int cmd,
1671 void *data)
1672{
1673 if (zr->decoder == NULL)
1674 return -EIO;
1675
1676 if (zr->card.type == LML33 &&
7bf9746d 1677 (cmd == DECODER_SET_NORM || cmd == DECODER_SET_INPUT)) {
1da177e4
LT		 1678 int res;
1679
1680 // Bt819 needs to reset its FIFO buffer using #FRST pin and
1681 // LML33 card uses GPIO(7) for that.
1682 GPIO(zr, 7, 0);
1683 res = zr->decoder->driver->command(zr->decoder, cmd, data);
1684 // Pull #FRST high.
1685 GPIO(zr, 7, 1);
1686 return res;
1687 } else
1688 return zr->decoder->driver->command(zr->decoder, cmd,
1689 data);
1690}
1691
1692int
1693encoder_command (struct zoran *zr,
1694 int cmd,
1695 void *data)
1696{
1697 if (zr->encoder == NULL)
1698 return -1;
1699
1700 return zr->encoder->driver->command(zr->encoder, cmd, data);
1701}
Ubuntu Artful kernel mirror