]>
Commit | Line | Data |
---|---|---|
7ec94453 A |
1 | # |
2 | # Memory devices | |
3 | # | |
4 | ||
5 | menuconfig MEMORY | |
6 | bool "Memory Controller drivers" | |
7 | ||
8 | if MEMORY | |
9 | ||
10 | config TI_EMIF | |
11 | tristate "Texas Instruments EMIF driver" | |
18e9a971 | 12 | depends on ARCH_OMAP2PLUS |
7ec94453 A |
13 | select DDR |
14 | help | |
15 | This driver is for the EMIF module available in Texas Instruments | |
16 | SoCs. EMIF is an SDRAM controller that, based on its revision, | |
17 | supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. | |
18 | This driver takes care of only LPDDR2 memories presently. The | |
19 | functions of the driver includes re-configuring AC timing | |
20 | parameters and other settings during frequency, voltage and | |
21 | temperature changes | |
22 | ||
c542fb79 | 23 | config TEGRA20_MC |
f0e33f98 HD |
24 | bool "Tegra20 Memory Controller(MC) driver" |
25 | default y | |
c542fb79 | 26 | depends on ARCH_TEGRA_2x_SOC |
f0e33f98 HD |
27 | help |
28 | This driver is for the Memory Controller(MC) module available | |
29 | in Tegra20 SoCs, mainly for a address translation fault | |
30 | analysis, especially for IOMMU/GART(Graphics Address | |
31 | Relocation Table) module. | |
c542fb79 | 32 | |
af468109 | 33 | config TEGRA30_MC |
42d1149f HD |
34 | bool "Tegra30 Memory Controller(MC) driver" |
35 | default y | |
af468109 | 36 | depends on ARCH_TEGRA_3x_SOC |
42d1149f HD |
37 | help |
38 | This driver is for the Memory Controller(MC) module available | |
39 | in Tegra30 SoCs, mainly for a address translation fault | |
40 | analysis, especially for IOMMU/SMMU(System Memory Management | |
41 | Unit) module. | |
af468109 | 42 | |
7ec94453 | 43 | endif |