[mirror_ubuntu-bionic-kernel.git] / drivers / memory / Kconfig

#
# Memory devices
#

menuconfig MEMORY
	bool "Memory Controller drivers"

if MEMORY

config ARM_PL172_MPMC
	tristate "ARM PL172 MPMC driver"
	depends on ARM_AMBA && OF
	help
	  This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
	  If you have an embedded system with an AMBA bus and a PL172
	  controller, say Y or M here.

config ATMEL_SDRAMC
	bool "Atmel (Multi-port DDR-)SDRAM Controller"
	default y
	depends on ARCH_AT91 && OF
	help
	  This driver is for Atmel SDRAM Controller or Atmel Multi-port
	  DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
	  Starting with the at91sam9g45, this controller supports SDR, DDR and
	  LP-DDR memories.

config TI_AEMIF
	tristate "Texas Instruments AEMIF driver"
	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
	help
	  This driver is for the AEMIF module available in Texas Instruments
	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
	  is intended to provide a glue-less interface to a variety of
	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	  of 256M bytes of any of these memories can be accessed at a given
	  time via four chip selects with 64M byte access per chip select.

config TI_EMIF
	tristate "Texas Instruments EMIF driver"
	depends on ARCH_OMAP2PLUS
	select DDR
	help
	  This driver is for the EMIF module available in Texas Instruments
	  SoCs. EMIF is an SDRAM controller that, based on its revision,
	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	  This driver takes care of only LPDDR2 memories presently. The
	  functions of the driver includes re-configuring AC timing
	  parameters and other settings during frequency, voltage and
	  temperature changes

config OMAP_GPMC
	bool
	help
	  This driver is for the General Purpose Memory Controller (GPMC)
	  present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
	  interfacing to a variety of asynchronous as well as synchronous
	  memory drives like NOR, NAND, OneNAND, SRAM.

config OMAP_GPMC_DEBUG
	bool
	depends on OMAP_GPMC
	help
	  Enables verbose debugging mostly to decode the bootloader provided
	  timings. Enable this during development to configure devices
	  connected to the GPMC bus.

config MVEBU_DEVBUS
	bool "Marvell EBU Device Bus Controller"
	default y
	depends on PLAT_ORION && OF
	help
	  This driver is for the Device Bus controller available in some
	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	  Armada 370 and Armada XP. This controller allows to handle flash
	  devices such as NOR, NAND, SRAM, and FPGA.

config TEGRA20_MC
	bool "Tegra20 Memory Controller(MC) driver"
	default y
	depends on ARCH_TEGRA_2x_SOC
	help
	  This driver is for the Memory Controller(MC) module available
	  in Tegra20 SoCs, mainly for a address translation fault
	  analysis, especially for IOMMU/GART(Graphics Address
	  Relocation Table) module.

config FSL_CORENET_CF
	tristate "Freescale CoreNet Error Reporting"
	depends on FSL_SOC_BOOKE
	help
	  Say Y for reporting of errors from the Freescale CoreNet
	  Coherency Fabric.  Errors reported include accesses to
	  physical addresses that mapped by no local access window
	  (LAW) or an invalid LAW, as well as bad cache state that
	  represents a coherency violation.

config FSL_IFC
	bool
	depends on FSL_SOC

config JZ4780_NEMC
	bool "Ingenic JZ4780 SoC NEMC driver"
	default y
	depends on MACH_JZ4780
	help
	  This driver is for the NAND/External Memory Controller (NEMC) in
	  the Ingenic JZ4780. This controller is used to handle external
	  memory devices such as NAND and SRAM.

source "drivers/memory/tegra/Kconfig"

endif
Commit	Line	Data
7ec94453 A	1	#
	2	# Memory devices
	3	#
	4
	5	menuconfig MEMORY
	6	bool "Memory Controller drivers"
	7
	8	if MEMORY
	9
17c50b70 JE	10	config ARM_PL172_MPMC
	11	tristate "ARM PL172 MPMC driver"
	12	depends on ARM_AMBA && OF
	13	help
	14	This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
	15	If you have an embedded system with an AMBA bus and a PL172
	16	controller, say Y or M here.
	17
e81b6abe AB	18	config ATMEL_SDRAMC
	19	bool "Atmel (Multi-port DDR-)SDRAM Controller"
	20	default y
	21	depends on ARCH_AT91 && OF
	22	help
	23	This driver is for Atmel SDRAM Controller or Atmel Multi-port
	24	DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
	25	Starting with the at91sam9g45, this controller supports SDR, DDR and
	26	LP-DDR memories.
	27
5a7c8154 IK	28	config TI_AEMIF
	29	tristate "Texas Instruments AEMIF driver"
	30	depends on (ARCH_DAVINCI \|\| ARCH_KEYSTONE) && OF
	31	help
	32	This driver is for the AEMIF module available in Texas Instruments
	33	SoCs. AEMIF stands for Asynchronous External Memory Interface and
	34	is intended to provide a glue-less interface to a variety of
	35	asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	36	of 256M bytes of any of these memories can be accessed at a given
	37	time via four chip selects with 64M byte access per chip select.
	38
7ec94453 A	39	config TI_EMIF
7ec94453 A	40	tristate "Texas Instruments EMIF driver"
18e9a971	41	depends on ARCH_OMAP2PLUS
7ec94453 A	42	select DDR
	43	help
	44	This driver is for the EMIF module available in Texas Instruments
	45	SoCs. EMIF is an SDRAM controller that, based on its revision,
	46	supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	47	This driver takes care of only LPDDR2 memories presently. The
	48	functions of the driver includes re-configuring AC timing
	49	parameters and other settings during frequency, voltage and
	50	temperature changes
	51
18640193 TL	52	config OMAP_GPMC
	53	bool
	54	help
	55	This driver is for the General Purpose Memory Controller (GPMC)
	56	present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
	57	interfacing to a variety of asynchronous as well as synchronous
	58	memory drives like NOR, NAND, OneNAND, SRAM.
	59
63aa945b TL	60	config OMAP_GPMC_DEBUG
	61	bool
	62	depends on OMAP_GPMC
	63	help
	64	Enables verbose debugging mostly to decode the bootloader provided
	65	timings. Enable this during development to configure devices
	66	connected to the GPMC bus.
	67
3edad321 EG	68	config MVEBU_DEVBUS
	69	bool "Marvell EBU Device Bus Controller"
	70	default y
	71	depends on PLAT_ORION && OF
	72	help
	73	This driver is for the Device Bus controller available in some
	74	Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	75	Armada 370 and Armada XP. This controller allows to handle flash
	76	devices such as NOR, NAND, SRAM, and FPGA.
	77
c542fb79	78	config TEGRA20_MC
f0e33f98 HD	79	bool "Tegra20 Memory Controller(MC) driver"
f0e33f98 HD	80	default y
c542fb79	81	depends on ARCH_TEGRA_2x_SOC
f0e33f98 HD	82	help
	83	This driver is for the Memory Controller(MC) module available
	84	in Tegra20 SoCs, mainly for a address translation fault
	85	analysis, especially for IOMMU/GART(Graphics Address
	86	Relocation Table) module.
c542fb79	87
54afbec0 SW	88	config FSL_CORENET_CF
	89	tristate "Freescale CoreNet Error Reporting"
	90	depends on FSL_SOC_BOOKE
	91	help
	92	Say Y for reporting of errors from the Freescale CoreNet
	93	Coherency Fabric. Errors reported include accesses to
	94	physical addresses that mapped by no local access window
	95	(LAW) or an invalid LAW, as well as bad cache state that
	96	represents a coherency violation.
	97
42d87b18 PG	98	config FSL_IFC
	99	bool
	100	depends on FSL_SOC
	101
911a8882 AS	102	config JZ4780_NEMC
	103	bool "Ingenic JZ4780 SoC NEMC driver"
	104	default y
	105	depends on MACH_JZ4780
	106	help
	107	This driver is for the NAND/External Memory Controller (NEMC) in
	108	the Ingenic JZ4780. This controller is used to handle external
	109	memory devices such as NAND and SRAM.
	110
89184651 TR	111	source "drivers/memory/tegra/Kconfig"
89184651 TR	112
7ec94453	113	endif