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6a4ec4cd BB |
1 | /* |
2 | * EBI driver for Atmel chips | |
3 | * inspired by the fsl weim bus driver | |
4 | * | |
5 | * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> | |
6 | * | |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/clk.h> | |
13 | #include <linux/io.h> | |
14 | #include <linux/mfd/syscon.h> | |
15 | #include <linux/mfd/syscon/atmel-matrix.h> | |
16 | #include <linux/mfd/syscon/atmel-smc.h> | |
8a86a093 | 17 | #include <linux/init.h> |
6a4ec4cd BB |
18 | #include <linux/of_device.h> |
19 | #include <linux/regmap.h> | |
20 | ||
21 | struct at91sam9_smc_timings { | |
22 | u32 ncs_rd_setup_ns; | |
23 | u32 nrd_setup_ns; | |
24 | u32 ncs_wr_setup_ns; | |
25 | u32 nwe_setup_ns; | |
26 | u32 ncs_rd_pulse_ns; | |
27 | u32 nrd_pulse_ns; | |
28 | u32 ncs_wr_pulse_ns; | |
29 | u32 nwe_pulse_ns; | |
30 | u32 nrd_cycle_ns; | |
31 | u32 nwe_cycle_ns; | |
32 | u32 tdf_ns; | |
33 | }; | |
34 | ||
35 | struct at91sam9_smc_generic_fields { | |
36 | struct regmap_field *setup; | |
37 | struct regmap_field *pulse; | |
38 | struct regmap_field *cycle; | |
39 | struct regmap_field *mode; | |
40 | }; | |
41 | ||
42 | struct at91sam9_ebi_dev_config { | |
43 | struct at91sam9_smc_timings timings; | |
44 | u32 mode; | |
45 | }; | |
46 | ||
47 | struct at91_ebi_dev_config { | |
48 | int cs; | |
49 | union { | |
50 | struct at91sam9_ebi_dev_config sam9; | |
51 | }; | |
52 | }; | |
53 | ||
54 | struct at91_ebi; | |
55 | ||
56 | struct at91_ebi_dev { | |
57 | struct list_head node; | |
58 | struct at91_ebi *ebi; | |
59 | u32 mode; | |
60 | int numcs; | |
61 | struct at91_ebi_dev_config configs[]; | |
62 | }; | |
63 | ||
64 | struct at91_ebi_caps { | |
65 | unsigned int available_cs; | |
66 | const struct reg_field *ebi_csa; | |
67 | void (*get_config)(struct at91_ebi_dev *ebid, | |
68 | struct at91_ebi_dev_config *conf); | |
69 | int (*xlate_config)(struct at91_ebi_dev *ebid, | |
70 | struct device_node *configs_np, | |
71 | struct at91_ebi_dev_config *conf); | |
72 | int (*apply_config)(struct at91_ebi_dev *ebid, | |
73 | struct at91_ebi_dev_config *conf); | |
74 | int (*init)(struct at91_ebi *ebi); | |
75 | }; | |
76 | ||
77 | struct at91_ebi { | |
78 | struct clk *clk; | |
79 | struct regmap *smc; | |
80 | struct regmap *matrix; | |
81 | ||
82 | struct regmap_field *ebi_csa; | |
83 | ||
84 | struct device *dev; | |
85 | const struct at91_ebi_caps *caps; | |
86 | struct list_head devs; | |
87 | union { | |
88 | struct at91sam9_smc_generic_fields sam9; | |
89 | }; | |
90 | }; | |
91 | ||
92 | static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid, | |
93 | struct at91_ebi_dev_config *conf) | |
94 | { | |
95 | struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9; | |
0ac202a2 | 96 | unsigned int clk_period = NSEC_PER_SEC / clk_get_rate(ebid->ebi->clk); |
6a4ec4cd BB |
97 | struct at91sam9_ebi_dev_config *config = &conf->sam9; |
98 | struct at91sam9_smc_timings *timings = &config->timings; | |
99 | unsigned int val; | |
100 | ||
101 | regmap_fields_read(fields->mode, conf->cs, &val); | |
102 | config->mode = val & ~AT91_SMC_TDF; | |
103 | ||
104 | val = (val & AT91_SMC_TDF) >> 16; | |
0ac202a2 | 105 | timings->tdf_ns = clk_period * val; |
6a4ec4cd BB |
106 | |
107 | regmap_fields_read(fields->setup, conf->cs, &val); | |
108 | timings->ncs_rd_setup_ns = (val >> 24) & 0x1f; | |
109 | timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128; | |
0ac202a2 | 110 | timings->ncs_rd_setup_ns *= clk_period; |
6a4ec4cd BB |
111 | timings->nrd_setup_ns = (val >> 16) & 0x1f; |
112 | timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128; | |
0ac202a2 | 113 | timings->nrd_setup_ns *= clk_period; |
6a4ec4cd BB |
114 | timings->ncs_wr_setup_ns = (val >> 8) & 0x1f; |
115 | timings->ncs_wr_setup_ns += ((val >> 13) & 0x1) * 128; | |
0ac202a2 | 116 | timings->ncs_wr_setup_ns *= clk_period; |
6a4ec4cd BB |
117 | timings->nwe_setup_ns = val & 0x1f; |
118 | timings->nwe_setup_ns += ((val >> 5) & 0x1) * 128; | |
0ac202a2 | 119 | timings->nwe_setup_ns *= clk_period; |
6a4ec4cd BB |
120 | |
121 | regmap_fields_read(fields->pulse, conf->cs, &val); | |
122 | timings->ncs_rd_pulse_ns = (val >> 24) & 0x3f; | |
123 | timings->ncs_rd_pulse_ns += ((val >> 30) & 0x1) * 256; | |
0ac202a2 | 124 | timings->ncs_rd_pulse_ns *= clk_period; |
6a4ec4cd BB |
125 | timings->nrd_pulse_ns = (val >> 16) & 0x3f; |
126 | timings->nrd_pulse_ns += ((val >> 22) & 0x1) * 256; | |
0ac202a2 | 127 | timings->nrd_pulse_ns *= clk_period; |
6a4ec4cd BB |
128 | timings->ncs_wr_pulse_ns = (val >> 8) & 0x3f; |
129 | timings->ncs_wr_pulse_ns += ((val >> 14) & 0x1) * 256; | |
0ac202a2 | 130 | timings->ncs_wr_pulse_ns *= clk_period; |
6a4ec4cd BB |
131 | timings->nwe_pulse_ns = val & 0x3f; |
132 | timings->nwe_pulse_ns += ((val >> 6) & 0x1) * 256; | |
0ac202a2 | 133 | timings->nwe_pulse_ns *= clk_period; |
6a4ec4cd BB |
134 | |
135 | regmap_fields_read(fields->cycle, conf->cs, &val); | |
136 | timings->nrd_cycle_ns = (val >> 16) & 0x7f; | |
137 | timings->nrd_cycle_ns += ((val >> 23) & 0x3) * 256; | |
0ac202a2 | 138 | timings->nrd_cycle_ns *= clk_period; |
6a4ec4cd BB |
139 | timings->nwe_cycle_ns = val & 0x7f; |
140 | timings->nwe_cycle_ns += ((val >> 7) & 0x3) * 256; | |
0ac202a2 | 141 | timings->nwe_cycle_ns *= clk_period; |
6a4ec4cd BB |
142 | } |
143 | ||
144 | static int at91_xlate_timing(struct device_node *np, const char *prop, | |
145 | u32 *val, bool *required) | |
146 | { | |
147 | if (!of_property_read_u32(np, prop, val)) { | |
148 | *required = true; | |
149 | return 0; | |
150 | } | |
151 | ||
152 | if (*required) | |
153 | return -EINVAL; | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
158 | static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid, | |
159 | struct device_node *np, | |
160 | struct at91sam9_smc_timings *timings, | |
161 | bool *required) | |
162 | { | |
163 | int ret; | |
164 | ||
165 | ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-setup-ns", | |
166 | &timings->ncs_rd_setup_ns, required); | |
167 | if (ret) | |
168 | goto out; | |
169 | ||
170 | ret = at91_xlate_timing(np, "atmel,smc-nrd-setup-ns", | |
171 | &timings->nrd_setup_ns, required); | |
172 | if (ret) | |
173 | goto out; | |
174 | ||
175 | ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-setup-ns", | |
176 | &timings->ncs_wr_setup_ns, required); | |
177 | if (ret) | |
178 | goto out; | |
179 | ||
180 | ret = at91_xlate_timing(np, "atmel,smc-nwe-setup-ns", | |
181 | &timings->nwe_setup_ns, required); | |
182 | if (ret) | |
183 | goto out; | |
184 | ||
185 | ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-pulse-ns", | |
186 | &timings->ncs_rd_pulse_ns, required); | |
187 | if (ret) | |
188 | goto out; | |
189 | ||
190 | ret = at91_xlate_timing(np, "atmel,smc-nrd-pulse-ns", | |
191 | &timings->nrd_pulse_ns, required); | |
192 | if (ret) | |
193 | goto out; | |
194 | ||
195 | ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-pulse-ns", | |
196 | &timings->ncs_wr_pulse_ns, required); | |
197 | if (ret) | |
198 | goto out; | |
199 | ||
200 | ret = at91_xlate_timing(np, "atmel,smc-nwe-pulse-ns", | |
201 | &timings->nwe_pulse_ns, required); | |
202 | if (ret) | |
203 | goto out; | |
204 | ||
205 | ret = at91_xlate_timing(np, "atmel,smc-nwe-cycle-ns", | |
206 | &timings->nwe_cycle_ns, required); | |
207 | if (ret) | |
208 | goto out; | |
209 | ||
210 | ret = at91_xlate_timing(np, "atmel,smc-nrd-cycle-ns", | |
211 | &timings->nrd_cycle_ns, required); | |
212 | if (ret) | |
213 | goto out; | |
214 | ||
215 | ret = at91_xlate_timing(np, "atmel,smc-tdf-ns", | |
216 | &timings->tdf_ns, required); | |
217 | ||
218 | out: | |
219 | if (ret) | |
220 | dev_err(ebid->ebi->dev, | |
221 | "missing or invalid timings definition in %s", | |
222 | np->full_name); | |
223 | ||
224 | return ret; | |
225 | } | |
226 | ||
227 | static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid, | |
228 | struct device_node *np, | |
229 | struct at91_ebi_dev_config *conf) | |
230 | { | |
231 | struct at91sam9_ebi_dev_config *config = &conf->sam9; | |
232 | bool required = false; | |
233 | const char *tmp_str; | |
234 | u32 tmp; | |
235 | int ret; | |
236 | ||
237 | ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp); | |
238 | if (!ret) { | |
239 | switch (tmp) { | |
240 | case 8: | |
241 | config->mode |= AT91_SMC_DBW_8; | |
242 | break; | |
243 | ||
244 | case 16: | |
245 | config->mode |= AT91_SMC_DBW_16; | |
246 | break; | |
247 | ||
248 | case 32: | |
249 | config->mode |= AT91_SMC_DBW_32; | |
250 | break; | |
251 | ||
252 | default: | |
253 | return -EINVAL; | |
254 | } | |
255 | ||
256 | required = true; | |
257 | } | |
258 | ||
259 | if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) { | |
260 | config->mode |= AT91_SMC_TDFMODE_OPTIMIZED; | |
261 | required = true; | |
262 | } | |
263 | ||
264 | tmp_str = NULL; | |
265 | of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str); | |
266 | if (tmp_str && !strcmp(tmp_str, "write")) { | |
267 | config->mode |= AT91_SMC_BAT_WRITE; | |
268 | required = true; | |
269 | } | |
270 | ||
271 | tmp_str = NULL; | |
272 | of_property_read_string(np, "atmel,smc-read-mode", &tmp_str); | |
273 | if (tmp_str && !strcmp(tmp_str, "nrd")) { | |
274 | config->mode |= AT91_SMC_READMODE_NRD; | |
275 | required = true; | |
276 | } | |
277 | ||
278 | tmp_str = NULL; | |
279 | of_property_read_string(np, "atmel,smc-write-mode", &tmp_str); | |
280 | if (tmp_str && !strcmp(tmp_str, "nwe")) { | |
281 | config->mode |= AT91_SMC_WRITEMODE_NWE; | |
282 | required = true; | |
283 | } | |
284 | ||
285 | tmp_str = NULL; | |
286 | of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str); | |
287 | if (tmp_str) { | |
288 | if (!strcmp(tmp_str, "frozen")) | |
289 | config->mode |= AT91_SMC_EXNWMODE_FROZEN; | |
290 | else if (!strcmp(tmp_str, "ready")) | |
291 | config->mode |= AT91_SMC_EXNWMODE_READY; | |
292 | else if (strcmp(tmp_str, "disabled")) | |
293 | return -EINVAL; | |
294 | ||
295 | required = true; | |
296 | } | |
297 | ||
298 | ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp); | |
299 | if (!ret) { | |
300 | switch (tmp) { | |
301 | case 4: | |
302 | config->mode |= AT91_SMC_PS_4; | |
303 | break; | |
304 | ||
305 | case 8: | |
306 | config->mode |= AT91_SMC_PS_8; | |
307 | break; | |
308 | ||
309 | case 16: | |
310 | config->mode |= AT91_SMC_PS_16; | |
311 | break; | |
312 | ||
313 | case 32: | |
314 | config->mode |= AT91_SMC_PS_32; | |
315 | break; | |
316 | ||
317 | default: | |
318 | return -EINVAL; | |
319 | } | |
320 | ||
321 | config->mode |= AT91_SMC_PMEN; | |
322 | required = true; | |
323 | } | |
324 | ||
325 | ret = at91sam9_smc_xslate_timings(ebid, np, &config->timings, | |
326 | &required); | |
327 | if (ret) | |
328 | return ret; | |
329 | ||
330 | return required; | |
331 | } | |
332 | ||
333 | static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid, | |
334 | struct at91_ebi_dev_config *conf) | |
335 | { | |
336 | unsigned int clk_rate = clk_get_rate(ebid->ebi->clk); | |
0ac202a2 | 337 | unsigned int clk_period = NSEC_PER_SEC / clk_rate; |
6a4ec4cd BB |
338 | struct at91sam9_ebi_dev_config *config = &conf->sam9; |
339 | struct at91sam9_smc_timings *timings = &config->timings; | |
340 | struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9; | |
341 | u32 coded_val; | |
342 | u32 val; | |
343 | ||
344 | coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate, | |
345 | timings->ncs_rd_setup_ns); | |
346 | val = AT91SAM9_SMC_NCS_NRDSETUP(coded_val); | |
347 | coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate, | |
348 | timings->nrd_setup_ns); | |
349 | val |= AT91SAM9_SMC_NRDSETUP(coded_val); | |
350 | coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate, | |
351 | timings->ncs_wr_setup_ns); | |
352 | val |= AT91SAM9_SMC_NCS_WRSETUP(coded_val); | |
353 | coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate, | |
354 | timings->nwe_setup_ns); | |
355 | val |= AT91SAM9_SMC_NWESETUP(coded_val); | |
356 | regmap_fields_write(fields->setup, conf->cs, val); | |
357 | ||
358 | coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate, | |
359 | timings->ncs_rd_pulse_ns); | |
360 | val = AT91SAM9_SMC_NCS_NRDPULSE(coded_val); | |
361 | coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate, | |
362 | timings->nrd_pulse_ns); | |
363 | val |= AT91SAM9_SMC_NRDPULSE(coded_val); | |
364 | coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate, | |
365 | timings->ncs_wr_pulse_ns); | |
366 | val |= AT91SAM9_SMC_NCS_WRPULSE(coded_val); | |
367 | coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate, | |
368 | timings->nwe_pulse_ns); | |
369 | val |= AT91SAM9_SMC_NWEPULSE(coded_val); | |
370 | regmap_fields_write(fields->pulse, conf->cs, val); | |
371 | ||
372 | coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate, | |
373 | timings->nrd_cycle_ns); | |
374 | val = AT91SAM9_SMC_NRDCYCLE(coded_val); | |
375 | coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate, | |
376 | timings->nwe_cycle_ns); | |
377 | val |= AT91SAM9_SMC_NWECYCLE(coded_val); | |
378 | regmap_fields_write(fields->cycle, conf->cs, val); | |
379 | ||
0ac202a2 | 380 | val = DIV_ROUND_UP(timings->tdf_ns, clk_period); |
6a4ec4cd BB |
381 | if (val > AT91_SMC_TDF_MAX) |
382 | val = AT91_SMC_TDF_MAX; | |
383 | regmap_fields_write(fields->mode, conf->cs, | |
384 | config->mode | AT91_SMC_TDF_(val)); | |
385 | ||
386 | return 0; | |
387 | } | |
388 | ||
389 | static int at91sam9_ebi_init(struct at91_ebi *ebi) | |
390 | { | |
391 | struct at91sam9_smc_generic_fields *fields = &ebi->sam9; | |
392 | struct reg_field field = REG_FIELD(0, 0, 31); | |
393 | ||
394 | field.id_size = fls(ebi->caps->available_cs); | |
395 | field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ; | |
396 | ||
397 | field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC); | |
398 | fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
399 | if (IS_ERR(fields->setup)) | |
400 | return PTR_ERR(fields->setup); | |
401 | ||
402 | field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC); | |
403 | fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
404 | if (IS_ERR(fields->pulse)) | |
405 | return PTR_ERR(fields->pulse); | |
406 | ||
407 | field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC); | |
408 | fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
409 | if (IS_ERR(fields->cycle)) | |
410 | return PTR_ERR(fields->cycle); | |
411 | ||
412 | field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC); | |
413 | fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
ee4fec5f | 414 | return PTR_ERR_OR_ZERO(fields->mode); |
6a4ec4cd BB |
415 | } |
416 | ||
417 | static int sama5d3_ebi_init(struct at91_ebi *ebi) | |
418 | { | |
419 | struct at91sam9_smc_generic_fields *fields = &ebi->sam9; | |
420 | struct reg_field field = REG_FIELD(0, 0, 31); | |
421 | ||
422 | field.id_size = fls(ebi->caps->available_cs); | |
423 | field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ; | |
424 | ||
425 | field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC); | |
426 | fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
427 | if (IS_ERR(fields->setup)) | |
428 | return PTR_ERR(fields->setup); | |
429 | ||
430 | field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC); | |
431 | fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
432 | if (IS_ERR(fields->pulse)) | |
433 | return PTR_ERR(fields->pulse); | |
434 | ||
435 | field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC); | |
436 | fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
437 | if (IS_ERR(fields->cycle)) | |
438 | return PTR_ERR(fields->cycle); | |
439 | ||
440 | field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC); | |
441 | fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field); | |
ee4fec5f | 442 | return PTR_ERR_OR_ZERO(fields->mode); |
6a4ec4cd BB |
443 | } |
444 | ||
445 | static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np, | |
446 | int reg_cells) | |
447 | { | |
448 | const struct at91_ebi_caps *caps = ebi->caps; | |
449 | struct at91_ebi_dev_config conf = { }; | |
450 | struct device *dev = ebi->dev; | |
451 | struct at91_ebi_dev *ebid; | |
452 | int ret, numcs = 0, i; | |
453 | bool apply = false; | |
454 | ||
455 | numcs = of_property_count_elems_of_size(np, "reg", | |
456 | reg_cells * sizeof(u32)); | |
457 | if (numcs <= 0) { | |
458 | dev_err(dev, "invalid reg property in %s\n", np->full_name); | |
459 | return -EINVAL; | |
460 | } | |
461 | ||
462 | ebid = devm_kzalloc(ebi->dev, | |
463 | sizeof(*ebid) + (numcs * sizeof(*ebid->configs)), | |
464 | GFP_KERNEL); | |
465 | if (!ebid) | |
466 | return -ENOMEM; | |
467 | ||
468 | ebid->ebi = ebi; | |
469 | ||
470 | ret = caps->xlate_config(ebid, np, &conf); | |
471 | if (ret < 0) | |
472 | return ret; | |
473 | else if (ret) | |
474 | apply = true; | |
475 | ||
476 | for (i = 0; i < numcs; i++) { | |
477 | u32 cs; | |
478 | ||
479 | ret = of_property_read_u32_index(np, "reg", i * reg_cells, | |
480 | &cs); | |
481 | if (ret) | |
482 | return ret; | |
483 | ||
484 | if (cs > AT91_MATRIX_EBI_NUM_CS || | |
485 | !(ebi->caps->available_cs & BIT(cs))) { | |
486 | dev_err(dev, "invalid reg property in %s\n", | |
487 | np->full_name); | |
488 | return -EINVAL; | |
489 | } | |
490 | ||
491 | ebid->configs[i].cs = cs; | |
492 | ||
493 | if (apply) { | |
494 | conf.cs = cs; | |
495 | ret = caps->apply_config(ebid, &conf); | |
496 | if (ret) | |
497 | return ret; | |
498 | } | |
499 | ||
500 | caps->get_config(ebid, &ebid->configs[i]); | |
501 | ||
502 | /* | |
503 | * Attach the EBI device to the generic SMC logic if at least | |
504 | * one "atmel,smc-" property is present. | |
505 | */ | |
506 | if (ebi->ebi_csa && ret) | |
507 | regmap_field_update_bits(ebi->ebi_csa, | |
508 | BIT(cs), 0); | |
509 | } | |
510 | ||
511 | list_add_tail(&ebid->node, &ebi->devs); | |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
516 | static const struct reg_field at91sam9260_ebi_csa = | |
517 | REG_FIELD(AT91SAM9260_MATRIX_EBICSA, 0, | |
518 | AT91_MATRIX_EBI_NUM_CS - 1); | |
519 | ||
520 | static const struct at91_ebi_caps at91sam9260_ebi_caps = { | |
521 | .available_cs = 0xff, | |
522 | .ebi_csa = &at91sam9260_ebi_csa, | |
523 | .get_config = at91sam9_ebi_get_config, | |
524 | .xlate_config = at91sam9_ebi_xslate_config, | |
525 | .apply_config = at91sam9_ebi_apply_config, | |
526 | .init = at91sam9_ebi_init, | |
527 | }; | |
528 | ||
529 | static const struct reg_field at91sam9261_ebi_csa = | |
530 | REG_FIELD(AT91SAM9261_MATRIX_EBICSA, 0, | |
531 | AT91_MATRIX_EBI_NUM_CS - 1); | |
532 | ||
533 | static const struct at91_ebi_caps at91sam9261_ebi_caps = { | |
534 | .available_cs = 0xff, | |
535 | .ebi_csa = &at91sam9261_ebi_csa, | |
536 | .get_config = at91sam9_ebi_get_config, | |
537 | .xlate_config = at91sam9_ebi_xslate_config, | |
538 | .apply_config = at91sam9_ebi_apply_config, | |
539 | .init = at91sam9_ebi_init, | |
540 | }; | |
541 | ||
542 | static const struct reg_field at91sam9263_ebi0_csa = | |
543 | REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA, 0, | |
544 | AT91_MATRIX_EBI_NUM_CS - 1); | |
545 | ||
546 | static const struct at91_ebi_caps at91sam9263_ebi0_caps = { | |
547 | .available_cs = 0x3f, | |
548 | .ebi_csa = &at91sam9263_ebi0_csa, | |
549 | .get_config = at91sam9_ebi_get_config, | |
550 | .xlate_config = at91sam9_ebi_xslate_config, | |
551 | .apply_config = at91sam9_ebi_apply_config, | |
552 | .init = at91sam9_ebi_init, | |
553 | }; | |
554 | ||
555 | static const struct reg_field at91sam9263_ebi1_csa = | |
556 | REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA, 0, | |
557 | AT91_MATRIX_EBI_NUM_CS - 1); | |
558 | ||
559 | static const struct at91_ebi_caps at91sam9263_ebi1_caps = { | |
560 | .available_cs = 0x7, | |
561 | .ebi_csa = &at91sam9263_ebi1_csa, | |
562 | .get_config = at91sam9_ebi_get_config, | |
563 | .xlate_config = at91sam9_ebi_xslate_config, | |
564 | .apply_config = at91sam9_ebi_apply_config, | |
565 | .init = at91sam9_ebi_init, | |
566 | }; | |
567 | ||
568 | static const struct reg_field at91sam9rl_ebi_csa = | |
569 | REG_FIELD(AT91SAM9RL_MATRIX_EBICSA, 0, | |
570 | AT91_MATRIX_EBI_NUM_CS - 1); | |
571 | ||
572 | static const struct at91_ebi_caps at91sam9rl_ebi_caps = { | |
573 | .available_cs = 0x3f, | |
574 | .ebi_csa = &at91sam9rl_ebi_csa, | |
575 | .get_config = at91sam9_ebi_get_config, | |
576 | .xlate_config = at91sam9_ebi_xslate_config, | |
577 | .apply_config = at91sam9_ebi_apply_config, | |
578 | .init = at91sam9_ebi_init, | |
579 | }; | |
580 | ||
581 | static const struct reg_field at91sam9g45_ebi_csa = | |
582 | REG_FIELD(AT91SAM9G45_MATRIX_EBICSA, 0, | |
583 | AT91_MATRIX_EBI_NUM_CS - 1); | |
584 | ||
585 | static const struct at91_ebi_caps at91sam9g45_ebi_caps = { | |
586 | .available_cs = 0x3f, | |
587 | .ebi_csa = &at91sam9g45_ebi_csa, | |
588 | .get_config = at91sam9_ebi_get_config, | |
589 | .xlate_config = at91sam9_ebi_xslate_config, | |
590 | .apply_config = at91sam9_ebi_apply_config, | |
591 | .init = at91sam9_ebi_init, | |
592 | }; | |
593 | ||
594 | static const struct at91_ebi_caps at91sam9x5_ebi_caps = { | |
595 | .available_cs = 0x3f, | |
596 | .ebi_csa = &at91sam9263_ebi0_csa, | |
597 | .get_config = at91sam9_ebi_get_config, | |
598 | .xlate_config = at91sam9_ebi_xslate_config, | |
599 | .apply_config = at91sam9_ebi_apply_config, | |
600 | .init = at91sam9_ebi_init, | |
601 | }; | |
602 | ||
603 | static const struct at91_ebi_caps sama5d3_ebi_caps = { | |
604 | .available_cs = 0xf, | |
605 | .get_config = at91sam9_ebi_get_config, | |
606 | .xlate_config = at91sam9_ebi_xslate_config, | |
607 | .apply_config = at91sam9_ebi_apply_config, | |
608 | .init = sama5d3_ebi_init, | |
609 | }; | |
610 | ||
611 | static const struct of_device_id at91_ebi_id_table[] = { | |
612 | { | |
613 | .compatible = "atmel,at91sam9260-ebi", | |
614 | .data = &at91sam9260_ebi_caps, | |
615 | }, | |
616 | { | |
617 | .compatible = "atmel,at91sam9261-ebi", | |
618 | .data = &at91sam9261_ebi_caps, | |
619 | }, | |
620 | { | |
621 | .compatible = "atmel,at91sam9263-ebi0", | |
622 | .data = &at91sam9263_ebi0_caps, | |
623 | }, | |
624 | { | |
625 | .compatible = "atmel,at91sam9263-ebi1", | |
626 | .data = &at91sam9263_ebi1_caps, | |
627 | }, | |
628 | { | |
629 | .compatible = "atmel,at91sam9rl-ebi", | |
630 | .data = &at91sam9rl_ebi_caps, | |
631 | }, | |
632 | { | |
633 | .compatible = "atmel,at91sam9g45-ebi", | |
634 | .data = &at91sam9g45_ebi_caps, | |
635 | }, | |
636 | { | |
637 | .compatible = "atmel,at91sam9x5-ebi", | |
638 | .data = &at91sam9x5_ebi_caps, | |
639 | }, | |
640 | { | |
641 | .compatible = "atmel,sama5d3-ebi", | |
642 | .data = &sama5d3_ebi_caps, | |
643 | }, | |
644 | { /* sentinel */ } | |
645 | }; | |
6a4ec4cd BB |
646 | |
647 | static int at91_ebi_dev_disable(struct at91_ebi *ebi, struct device_node *np) | |
648 | { | |
649 | struct device *dev = ebi->dev; | |
650 | struct property *newprop; | |
651 | ||
652 | newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL); | |
653 | if (!newprop) | |
654 | return -ENOMEM; | |
655 | ||
656 | newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL); | |
657 | if (!newprop->name) | |
658 | return -ENOMEM; | |
659 | ||
660 | newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL); | |
ecc2d430 | 661 | if (!newprop->value) |
6a4ec4cd BB |
662 | return -ENOMEM; |
663 | ||
664 | newprop->length = sizeof("disabled"); | |
665 | ||
666 | return of_update_property(np, newprop); | |
667 | } | |
668 | ||
669 | static int at91_ebi_probe(struct platform_device *pdev) | |
670 | { | |
671 | struct device *dev = &pdev->dev; | |
672 | struct device_node *child, *np = dev->of_node; | |
673 | const struct of_device_id *match; | |
674 | struct at91_ebi *ebi; | |
675 | int ret, reg_cells; | |
676 | struct clk *clk; | |
677 | u32 val; | |
678 | ||
679 | match = of_match_device(at91_ebi_id_table, dev); | |
680 | if (!match || !match->data) | |
681 | return -EINVAL; | |
682 | ||
683 | ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL); | |
684 | if (!ebi) | |
685 | return -ENOMEM; | |
686 | ||
687 | INIT_LIST_HEAD(&ebi->devs); | |
688 | ebi->caps = match->data; | |
689 | ebi->dev = dev; | |
690 | ||
691 | clk = devm_clk_get(dev, NULL); | |
692 | if (IS_ERR(clk)) | |
693 | return PTR_ERR(clk); | |
694 | ||
695 | ebi->clk = clk; | |
696 | ||
697 | ebi->smc = syscon_regmap_lookup_by_phandle(np, "atmel,smc"); | |
698 | if (IS_ERR(ebi->smc)) | |
699 | return PTR_ERR(ebi->smc); | |
700 | ||
701 | /* | |
702 | * The sama5d3 does not provide an EBICSA register and thus does need | |
703 | * to access the matrix registers. | |
704 | */ | |
705 | if (ebi->caps->ebi_csa) { | |
706 | ebi->matrix = | |
707 | syscon_regmap_lookup_by_phandle(np, "atmel,matrix"); | |
708 | if (IS_ERR(ebi->matrix)) | |
709 | return PTR_ERR(ebi->matrix); | |
710 | ||
711 | ebi->ebi_csa = regmap_field_alloc(ebi->matrix, | |
712 | *ebi->caps->ebi_csa); | |
713 | if (IS_ERR(ebi->ebi_csa)) | |
714 | return PTR_ERR(ebi->ebi_csa); | |
715 | } | |
716 | ||
717 | ret = ebi->caps->init(ebi); | |
718 | if (ret) | |
719 | return ret; | |
720 | ||
721 | ret = of_property_read_u32(np, "#address-cells", &val); | |
722 | if (ret) { | |
723 | dev_err(dev, "missing #address-cells property\n"); | |
724 | return ret; | |
725 | } | |
726 | ||
727 | reg_cells = val; | |
728 | ||
729 | ret = of_property_read_u32(np, "#size-cells", &val); | |
730 | if (ret) { | |
731 | dev_err(dev, "missing #address-cells property\n"); | |
732 | return ret; | |
733 | } | |
734 | ||
735 | reg_cells += val; | |
736 | ||
737 | for_each_available_child_of_node(np, child) { | |
738 | if (!of_find_property(child, "reg", NULL)) | |
739 | continue; | |
740 | ||
741 | ret = at91_ebi_dev_setup(ebi, child, reg_cells); | |
742 | if (ret) { | |
743 | dev_err(dev, "failed to configure EBI bus for %s, disabling the device", | |
744 | child->full_name); | |
745 | ||
746 | ret = at91_ebi_dev_disable(ebi, child); | |
747 | if (ret) | |
748 | return ret; | |
749 | } | |
750 | } | |
751 | ||
752 | return of_platform_populate(np, NULL, NULL, dev); | |
753 | } | |
754 | ||
755 | static struct platform_driver at91_ebi_driver = { | |
756 | .driver = { | |
757 | .name = "atmel-ebi", | |
758 | .of_match_table = at91_ebi_id_table, | |
759 | }, | |
760 | }; | |
8a86a093 | 761 | builtin_platform_driver_probe(at91_ebi_driver, at91_ebi_probe); |