[mirror_ubuntu-bionic-kernel.git] / drivers / memory / mtk-smi.c

/*
 * Copyright (c) 2015-2016 MediaTek Inc.
 * Author: Yong Wu <yong.wu@mediatek.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <soc/mediatek/smi.h>
#include <dt-bindings/memory/mt2701-larb-port.h>

#define SMI_LARB_MMU_EN		0xf00
#define REG_SMI_SECUR_CON_BASE		0x5c0

/* every register control 8 port, register offset 0x4 */
#define REG_SMI_SECUR_CON_OFFSET(id)	(((id) >> 3) << 2)
#define REG_SMI_SECUR_CON_ADDR(id)	\
	(REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))

/*
 * every port have 4 bit to control, bit[port + 3] control virtual or physical,
 * bit[port + 2 : port + 1] control the domain, bit[port] control the security
 * or non-security.
 */
#define SMI_SECUR_CON_VAL_MSK(id)	(~(0xf << (((id) & 0x7) << 2)))
#define SMI_SECUR_CON_VAL_VIRT(id)	BIT((((id) & 0x7) << 2) + 3)
/* mt2701 domain should be set to 3 */
#define SMI_SECUR_CON_VAL_DOMAIN(id)	(0x3 << ((((id) & 0x7) << 2) + 1))

struct mtk_smi_larb_gen {
	bool need_larbid;
	int port_in_larb[MTK_LARB_NR_MAX + 1];
	void (*config_port)(struct device *);
};

struct mtk_smi {
	struct device			*dev;
	struct clk			*clk_apb, *clk_smi;
	struct clk			*clk_async; /*only needed by mt2701*/
	void __iomem			*smi_ao_base;
};

struct mtk_smi_larb { /* larb: local arbiter */
	struct mtk_smi			smi;
	void __iomem			*base;
	struct device			*smi_common_dev;
	const struct mtk_smi_larb_gen	*larb_gen;
	int				larbid;
	u32				*mmu;
};

enum mtk_smi_gen {
	MTK_SMI_GEN1,
	MTK_SMI_GEN2
};

static int mtk_smi_enable(const struct mtk_smi *smi)
{
	int ret;

	ret = pm_runtime_get_sync(smi->dev);
	if (ret < 0)
		return ret;

	ret = clk_prepare_enable(smi->clk_apb);
	if (ret)
		goto err_put_pm;

	ret = clk_prepare_enable(smi->clk_smi);
	if (ret)
		goto err_disable_apb;

	return 0;

err_disable_apb:
	clk_disable_unprepare(smi->clk_apb);
err_put_pm:
	pm_runtime_put_sync(smi->dev);
	return ret;
}

static void mtk_smi_disable(const struct mtk_smi *smi)
{
	clk_disable_unprepare(smi->clk_smi);
	clk_disable_unprepare(smi->clk_apb);
	pm_runtime_put_sync(smi->dev);
}

int mtk_smi_larb_get(struct device *larbdev)
{
	struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
	const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
	struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
	int ret;

	/* Enable the smi-common's power and clocks */
	ret = mtk_smi_enable(common);
	if (ret)
		return ret;

	/* Enable the larb's power and clocks */
	ret = mtk_smi_enable(&larb->smi);
	if (ret) {
		mtk_smi_disable(common);
		return ret;
	}

	/* Configure the iommu info for this larb */
	larb_gen->config_port(larbdev);

	return 0;
}
EXPORT_SYMBOL_GPL(mtk_smi_larb_get);

void mtk_smi_larb_put(struct device *larbdev)
{
	struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
	struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);

	/*
	 * Don't de-configure the iommu info for this larb since there may be
	 * several modules in this larb.
	 * The iommu info will be reset after power off.
	 */

	mtk_smi_disable(&larb->smi);
	mtk_smi_disable(common);
}
EXPORT_SYMBOL_GPL(mtk_smi_larb_put);

static int
mtk_smi_larb_bind(struct device *dev, struct device *master, void *data)
{
	struct mtk_smi_larb *larb = dev_get_drvdata(dev);
	struct mtk_smi_iommu *smi_iommu = data;
	unsigned int         i;

	for (i = 0; i < smi_iommu->larb_nr; i++) {
		if (dev == smi_iommu->larb_imu[i].dev) {
			/* The 'mmu' may be updated in iommu-attach/detach. */
			larb->mmu = &smi_iommu->larb_imu[i].mmu;
			return 0;
		}
	}
	return -ENODEV;
}

static void mtk_smi_larb_config_port(struct device *dev)
{
	struct mtk_smi_larb *larb = dev_get_drvdata(dev);

	writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
}


static void mtk_smi_larb_config_port_gen1(struct device *dev)
{
	struct mtk_smi_larb *larb = dev_get_drvdata(dev);
	const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
	struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
	int i, m4u_port_id, larb_port_num;
	u32 sec_con_val, reg_val;

	m4u_port_id = larb_gen->port_in_larb[larb->larbid];
	larb_port_num = larb_gen->port_in_larb[larb->larbid + 1]
			- larb_gen->port_in_larb[larb->larbid];

	for (i = 0; i < larb_port_num; i++, m4u_port_id++) {
		if (*larb->mmu & BIT(i)) {
			/* bit[port + 3] controls the virtual or physical */
			sec_con_val = SMI_SECUR_CON_VAL_VIRT(m4u_port_id);
		} else {
			/* do not need to enable m4u for this port */
			continue;
		}
		reg_val = readl(common->smi_ao_base
			+ REG_SMI_SECUR_CON_ADDR(m4u_port_id));
		reg_val &= SMI_SECUR_CON_VAL_MSK(m4u_port_id);
		reg_val |= sec_con_val;
		reg_val |= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id);
		writel(reg_val,
			common->smi_ao_base
			+ REG_SMI_SECUR_CON_ADDR(m4u_port_id));
	}
}

static void
mtk_smi_larb_unbind(struct device *dev, struct device *master, void *data)
{
	/* Do nothing as the iommu is always enabled. */
}

static const struct component_ops mtk_smi_larb_component_ops = {
	.bind = mtk_smi_larb_bind,
	.unbind = mtk_smi_larb_unbind,
};

static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = {
	/* mt8173 do not need the port in larb */
	.config_port = mtk_smi_larb_config_port,
};

static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
	.need_larbid = true,
	.port_in_larb = {
		LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
		LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
	},
	.config_port = mtk_smi_larb_config_port_gen1,
};

static const struct of_device_id mtk_smi_larb_of_ids[] = {
	{
		.compatible = "mediatek,mt8173-smi-larb",
		.data = &mtk_smi_larb_mt8173
	},
	{
		.compatible = "mediatek,mt2701-smi-larb",
		.data = &mtk_smi_larb_mt2701
	},
	{}
};

static int mtk_smi_larb_probe(struct platform_device *pdev)
{
	struct mtk_smi_larb *larb;
	struct resource *res;
	struct device *dev = &pdev->dev;
	struct device_node *smi_node;
	struct platform_device *smi_pdev;
	int err;

	if (!dev->pm_domain)
		return -EPROBE_DEFER;

	larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL);
	if (!larb)
		return -ENOMEM;

	larb->larb_gen = of_device_get_match_data(dev);
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	larb->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(larb->base))
		return PTR_ERR(larb->base);

	larb->smi.clk_apb = devm_clk_get(dev, "apb");
	if (IS_ERR(larb->smi.clk_apb))
		return PTR_ERR(larb->smi.clk_apb);

	larb->smi.clk_smi = devm_clk_get(dev, "smi");
	if (IS_ERR(larb->smi.clk_smi))
		return PTR_ERR(larb->smi.clk_smi);
	larb->smi.dev = dev;

	if (larb->larb_gen->need_larbid) {
		err = of_property_read_u32(dev->of_node, "mediatek,larb-id",
					   &larb->larbid);
		if (err) {
			dev_err(dev, "missing larbid property\n");
			return err;
		}
	}

	smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);
	if (!smi_node)
		return -EINVAL;

	smi_pdev = of_find_device_by_node(smi_node);
	of_node_put(smi_node);
	if (smi_pdev) {
		larb->smi_common_dev = &smi_pdev->dev;
	} else {
		dev_err(dev, "Failed to get the smi_common device\n");
		return -EINVAL;
	}

	pm_runtime_enable(dev);
	platform_set_drvdata(pdev, larb);
	return component_add(dev, &mtk_smi_larb_component_ops);
}

static int mtk_smi_larb_remove(struct platform_device *pdev)
{
	pm_runtime_disable(&pdev->dev);
	component_del(&pdev->dev, &mtk_smi_larb_component_ops);
	return 0;
}

static struct platform_driver mtk_smi_larb_driver = {
	.probe	= mtk_smi_larb_probe,
	.remove	= mtk_smi_larb_remove,
	.driver	= {
		.name = "mtk-smi-larb",
		.of_match_table = mtk_smi_larb_of_ids,
	}
};

static const struct of_device_id mtk_smi_common_of_ids[] = {
	{
		.compatible = "mediatek,mt8173-smi-common",
		.data = (void *)MTK_SMI_GEN2
	},
	{
		.compatible = "mediatek,mt2701-smi-common",
		.data = (void *)MTK_SMI_GEN1
	},
	{}
};

static int mtk_smi_common_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct mtk_smi *common;
	struct resource *res;
	enum mtk_smi_gen smi_gen;

	if (!dev->pm_domain)
		return -EPROBE_DEFER;

	common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
	if (!common)
		return -ENOMEM;
	common->dev = dev;

	common->clk_apb = devm_clk_get(dev, "apb");
	if (IS_ERR(common->clk_apb))
		return PTR_ERR(common->clk_apb);

	common->clk_smi = devm_clk_get(dev, "smi");
	if (IS_ERR(common->clk_smi))
		return PTR_ERR(common->clk_smi);

	/*
	 * for mtk smi gen 1, we need to get the ao(always on) base to config
	 * m4u port, and we need to enable the aync clock for transform the smi
	 * clock into emi clock domain, but for mtk smi gen2, there's no smi ao
	 * base.
	 */
	smi_gen = (enum mtk_smi_gen)of_device_get_match_data(dev);
	if (smi_gen == MTK_SMI_GEN1) {
		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		common->smi_ao_base = devm_ioremap_resource(dev, res);
		if (IS_ERR(common->smi_ao_base))
			return PTR_ERR(common->smi_ao_base);

		common->clk_async = devm_clk_get(dev, "async");
		if (IS_ERR(common->clk_async))
			return PTR_ERR(common->clk_async);

		clk_prepare_enable(common->clk_async);
	}
	pm_runtime_enable(dev);
	platform_set_drvdata(pdev, common);
	return 0;
}

static int mtk_smi_common_remove(struct platform_device *pdev)
{
	pm_runtime_disable(&pdev->dev);
	return 0;
}

static struct platform_driver mtk_smi_common_driver = {
	.probe	= mtk_smi_common_probe,
	.remove = mtk_smi_common_remove,
	.driver	= {
		.name = "mtk-smi-common",
		.of_match_table = mtk_smi_common_of_ids,
	}
};

static int __init mtk_smi_init(void)
{
	int ret;

	ret = platform_driver_register(&mtk_smi_common_driver);
	if (ret != 0) {
		pr_err("Failed to register SMI driver\n");
		return ret;
	}

	ret = platform_driver_register(&mtk_smi_larb_driver);
	if (ret != 0) {
		pr_err("Failed to register SMI-LARB driver\n");
		goto err_unreg_smi;
	}
	return ret;

err_unreg_smi:
	platform_driver_unregister(&mtk_smi_common_driver);
	return ret;
}

subsys_initcall(mtk_smi_init);
Commit	Line	Data
cc8bbe1a YW	1	/*
	2	* Copyright (c) 2015-2016 MediaTek Inc.
	3	* Author: Yong Wu <yong.wu@mediatek.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*/
	14	#include <linux/clk.h>
	15	#include <linux/component.h>
	16	#include <linux/device.h>
	17	#include <linux/err.h>
	18	#include <linux/io.h>
	19	#include <linux/of.h>
	20	#include <linux/of_platform.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/pm_runtime.h>
	23	#include <soc/mediatek/smi.h>
3c8f4ad8	24	#include <dt-bindings/memory/mt2701-larb-port.h>
cc8bbe1a YW	25
cc8bbe1a YW	26	#define SMI_LARB_MMU_EN 0xf00
3c8f4ad8 HZ	27	#define REG_SMI_SECUR_CON_BASE 0x5c0
	28
	29	/* every register control 8 port, register offset 0x4 */
	30	#define REG_SMI_SECUR_CON_OFFSET(id) (((id) >> 3) << 2)
	31	#define REG_SMI_SECUR_CON_ADDR(id) \
	32	(REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))
	33
	34	/*
	35	* every port have 4 bit to control, bit[port + 3] control virtual or physical,
	36	* bit[port + 2 : port + 1] control the domain, bit[port] control the security
	37	* or non-security.
	38	*/
	39	#define SMI_SECUR_CON_VAL_MSK(id) (~(0xf << (((id) & 0x7) << 2)))
	40	#define SMI_SECUR_CON_VAL_VIRT(id) BIT((((id) & 0x7) << 2) + 3)
	41	/* mt2701 domain should be set to 3 */
	42	#define SMI_SECUR_CON_VAL_DOMAIN(id) (0x3 << ((((id) & 0x7) << 2) + 1))
	43
	44	struct mtk_smi_larb_gen {
363932cd	45	bool need_larbid;
3c8f4ad8 HZ	46	int port_in_larb[MTK_LARB_NR_MAX + 1];
	47	void (config_port)(struct device );
	48	};
cc8bbe1a YW	49
cc8bbe1a YW	50	struct mtk_smi {
3c8f4ad8 HZ	51	struct device *dev;
	52	struct clk clk_apb, clk_smi;
	53	struct clk clk_async; /only needed by mt2701*/
	54	void __iomem *smi_ao_base;
cc8bbe1a YW	55	};
	56
	57	struct mtk_smi_larb { /* larb: local arbiter */
3c8f4ad8 HZ	58	struct mtk_smi smi;
	59	void __iomem *base;
	60	struct device *smi_common_dev;
	61	const struct mtk_smi_larb_gen *larb_gen;
	62	int larbid;
	63	u32 *mmu;
	64	};
	65
	66	enum mtk_smi_gen {
	67	MTK_SMI_GEN1,
	68	MTK_SMI_GEN2
cc8bbe1a YW	69	};
	70
	71	static int mtk_smi_enable(const struct mtk_smi *smi)
	72	{
	73	int ret;
	74
	75	ret = pm_runtime_get_sync(smi->dev);
	76	if (ret < 0)
	77	return ret;
	78
	79	ret = clk_prepare_enable(smi->clk_apb);
	80	if (ret)
	81	goto err_put_pm;
	82
	83	ret = clk_prepare_enable(smi->clk_smi);
	84	if (ret)
	85	goto err_disable_apb;
	86
	87	return 0;
	88
	89	err_disable_apb:
	90	clk_disable_unprepare(smi->clk_apb);
	91	err_put_pm:
	92	pm_runtime_put_sync(smi->dev);
	93	return ret;
	94	}
	95
	96	static void mtk_smi_disable(const struct mtk_smi *smi)
	97	{
	98	clk_disable_unprepare(smi->clk_smi);
	99	clk_disable_unprepare(smi->clk_apb);
	100	pm_runtime_put_sync(smi->dev);
	101	}
	102
	103	int mtk_smi_larb_get(struct device *larbdev)
	104	{
	105	struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
3c8f4ad8	106	const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
cc8bbe1a YW	107	struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
	108	int ret;
	109
	110	/* Enable the smi-common's power and clocks */
	111	ret = mtk_smi_enable(common);
	112	if (ret)
	113	return ret;
	114
	115	/* Enable the larb's power and clocks */
	116	ret = mtk_smi_enable(&larb->smi);
	117	if (ret) {
	118	mtk_smi_disable(common);
	119	return ret;
	120	}
	121
	122	/* Configure the iommu info for this larb */
3c8f4ad8	123	larb_gen->config_port(larbdev);
cc8bbe1a YW	124
	125	return 0;
	126	}
cb1b5dff	127	EXPORT_SYMBOL_GPL(mtk_smi_larb_get);
cc8bbe1a YW	128
	129	void mtk_smi_larb_put(struct device *larbdev)
	130	{
	131	struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
	132	struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
	133
	134	/*
	135	* Don't de-configure the iommu info for this larb since there may be
	136	* several modules in this larb.
	137	* The iommu info will be reset after power off.
	138	*/
	139
	140	mtk_smi_disable(&larb->smi);
	141	mtk_smi_disable(common);
	142	}
cb1b5dff	143	EXPORT_SYMBOL_GPL(mtk_smi_larb_put);
cc8bbe1a YW	144
	145	static int
	146	mtk_smi_larb_bind(struct device dev, struct device master, void *data)
	147	{
	148	struct mtk_smi_larb *larb = dev_get_drvdata(dev);
	149	struct mtk_smi_iommu *smi_iommu = data;
	150	unsigned int i;
	151
	152	for (i = 0; i < smi_iommu->larb_nr; i++) {
	153	if (dev == smi_iommu->larb_imu[i].dev) {
	154	/* The 'mmu' may be updated in iommu-attach/detach. */
	155	larb->mmu = &smi_iommu->larb_imu[i].mmu;
	156	return 0;
	157	}
	158	}
	159	return -ENODEV;
	160	}
	161
3c8f4ad8 HZ	162	static void mtk_smi_larb_config_port(struct device *dev)
	163	{
	164	struct mtk_smi_larb *larb = dev_get_drvdata(dev);
	165
	166	writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
	167	}
	168
	169
	170	static void mtk_smi_larb_config_port_gen1(struct device *dev)
	171	{
	172	struct mtk_smi_larb *larb = dev_get_drvdata(dev);
	173	const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
	174	struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
	175	int i, m4u_port_id, larb_port_num;
	176	u32 sec_con_val, reg_val;
	177
	178	m4u_port_id = larb_gen->port_in_larb[larb->larbid];
	179	larb_port_num = larb_gen->port_in_larb[larb->larbid + 1]
	180	- larb_gen->port_in_larb[larb->larbid];
	181
	182	for (i = 0; i < larb_port_num; i++, m4u_port_id++) {
	183	if (*larb->mmu & BIT(i)) {
	184	/* bit[port + 3] controls the virtual or physical */
	185	sec_con_val = SMI_SECUR_CON_VAL_VIRT(m4u_port_id);
	186	} else {
	187	/* do not need to enable m4u for this port */
	188	continue;
	189	}
	190	reg_val = readl(common->smi_ao_base
	191	+ REG_SMI_SECUR_CON_ADDR(m4u_port_id));
	192	reg_val &= SMI_SECUR_CON_VAL_MSK(m4u_port_id);
	193	reg_val \|= sec_con_val;
	194	reg_val \|= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id);
	195	writel(reg_val,
	196	common->smi_ao_base
	197	+ REG_SMI_SECUR_CON_ADDR(m4u_port_id));
	198	}
	199	}
	200
cc8bbe1a YW	201	static void
	202	mtk_smi_larb_unbind(struct device dev, struct device master, void *data)
	203	{
	204	/* Do nothing as the iommu is always enabled. */
	205	}
	206
	207	static const struct component_ops mtk_smi_larb_component_ops = {
	208	.bind = mtk_smi_larb_bind,
	209	.unbind = mtk_smi_larb_unbind,
	210	};
	211
3c8f4ad8 HZ	212	static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = {
	213	/* mt8173 do not need the port in larb */
	214	.config_port = mtk_smi_larb_config_port,
	215	};
	216
	217	static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
363932cd	218	.need_larbid = true,
3c8f4ad8 HZ	219	.port_in_larb = {
	220	LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
	221	LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
	222	},
	223	.config_port = mtk_smi_larb_config_port_gen1,
	224	};
	225
	226	static const struct of_device_id mtk_smi_larb_of_ids[] = {
	227	{
	228	.compatible = "mediatek,mt8173-smi-larb",
	229	.data = &mtk_smi_larb_mt8173
	230	},
	231	{
	232	.compatible = "mediatek,mt2701-smi-larb",
	233	.data = &mtk_smi_larb_mt2701
	234	},
	235	{}
	236	};
	237
cc8bbe1a YW	238	static int mtk_smi_larb_probe(struct platform_device *pdev)
	239	{
	240	struct mtk_smi_larb *larb;
	241	struct resource *res;
	242	struct device *dev = &pdev->dev;
	243	struct device_node *smi_node;
	244	struct platform_device *smi_pdev;
363932cd	245	int err;
cc8bbe1a YW	246
	247	if (!dev->pm_domain)
	248	return -EPROBE_DEFER;
	249
	250	larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL);
	251	if (!larb)
	252	return -ENOMEM;
	253
75487860	254	larb->larb_gen = of_device_get_match_data(dev);
cc8bbe1a YW	255	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	256	larb->base = devm_ioremap_resource(dev, res);
	257	if (IS_ERR(larb->base))
	258	return PTR_ERR(larb->base);
	259
	260	larb->smi.clk_apb = devm_clk_get(dev, "apb");
	261	if (IS_ERR(larb->smi.clk_apb))
	262	return PTR_ERR(larb->smi.clk_apb);
	263
	264	larb->smi.clk_smi = devm_clk_get(dev, "smi");
	265	if (IS_ERR(larb->smi.clk_smi))
	266	return PTR_ERR(larb->smi.clk_smi);
	267	larb->smi.dev = dev;
	268
363932cd HZ	269	if (larb->larb_gen->need_larbid) {
	270	err = of_property_read_u32(dev->of_node, "mediatek,larb-id",
	271	&larb->larbid);
	272	if (err) {
	273	dev_err(dev, "missing larbid property\n");
	274	return err;
	275	}
	276	}
	277
cc8bbe1a YW	278	smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);
	279	if (!smi_node)
	280	return -EINVAL;
	281
	282	smi_pdev = of_find_device_by_node(smi_node);
	283	of_node_put(smi_node);
	284	if (smi_pdev) {
	285	larb->smi_common_dev = &smi_pdev->dev;
	286	} else {
	287	dev_err(dev, "Failed to get the smi_common device\n");
	288	return -EINVAL;
	289	}
	290
	291	pm_runtime_enable(dev);
	292	platform_set_drvdata(pdev, larb);
	293	return component_add(dev, &mtk_smi_larb_component_ops);
	294	}
	295
	296	static int mtk_smi_larb_remove(struct platform_device *pdev)
	297	{
	298	pm_runtime_disable(&pdev->dev);
	299	component_del(&pdev->dev, &mtk_smi_larb_component_ops);
	300	return 0;
	301	}
	302
cc8bbe1a YW	303	static struct platform_driver mtk_smi_larb_driver = {
cc8bbe1a YW	304	.probe = mtk_smi_larb_probe,
3c8f4ad8	305	.remove = mtk_smi_larb_remove,
cc8bbe1a YW	306	.driver = {
	307	.name = "mtk-smi-larb",
	308	.of_match_table = mtk_smi_larb_of_ids,
	309	}
	310	};
	311
3c8f4ad8 HZ	312	static const struct of_device_id mtk_smi_common_of_ids[] = {
	313	{
	314	.compatible = "mediatek,mt8173-smi-common",
	315	.data = (void *)MTK_SMI_GEN2
	316	},
	317	{
	318	.compatible = "mediatek,mt2701-smi-common",
	319	.data = (void *)MTK_SMI_GEN1
	320	},
	321	{}
	322	};
	323
cc8bbe1a YW	324	static int mtk_smi_common_probe(struct platform_device *pdev)
	325	{
	326	struct device *dev = &pdev->dev;
	327	struct mtk_smi *common;
3c8f4ad8	328	struct resource *res;
3c8f4ad8	329	enum mtk_smi_gen smi_gen;
cc8bbe1a YW	330
	331	if (!dev->pm_domain)
	332	return -EPROBE_DEFER;
	333
	334	common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
	335	if (!common)
	336	return -ENOMEM;
	337	common->dev = dev;
	338
	339	common->clk_apb = devm_clk_get(dev, "apb");
	340	if (IS_ERR(common->clk_apb))
	341	return PTR_ERR(common->clk_apb);
	342
	343	common->clk_smi = devm_clk_get(dev, "smi");
	344	if (IS_ERR(common->clk_smi))
	345	return PTR_ERR(common->clk_smi);
	346
3c8f4ad8 HZ	347	/*
	348	* for mtk smi gen 1, we need to get the ao(always on) base to config
	349	* m4u port, and we need to enable the aync clock for transform the smi
	350	* clock into emi clock domain, but for mtk smi gen2, there's no smi ao
	351	* base.
	352	*/
75487860	353	smi_gen = (enum mtk_smi_gen)of_device_get_match_data(dev);
3c8f4ad8 HZ	354	if (smi_gen == MTK_SMI_GEN1) {
	355	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	356	common->smi_ao_base = devm_ioremap_resource(dev, res);
	357	if (IS_ERR(common->smi_ao_base))
	358	return PTR_ERR(common->smi_ao_base);
	359
	360	common->clk_async = devm_clk_get(dev, "async");
	361	if (IS_ERR(common->clk_async))
	362	return PTR_ERR(common->clk_async);
	363
	364	clk_prepare_enable(common->clk_async);
	365	}
cc8bbe1a YW	366	pm_runtime_enable(dev);
	367	platform_set_drvdata(pdev, common);
	368	return 0;
	369	}
	370
	371	static int mtk_smi_common_remove(struct platform_device *pdev)
	372	{
	373	pm_runtime_disable(&pdev->dev);
	374	return 0;
	375	}
	376
cc8bbe1a YW	377	static struct platform_driver mtk_smi_common_driver = {
	378	.probe = mtk_smi_common_probe,
	379	.remove = mtk_smi_common_remove,
	380	.driver = {
	381	.name = "mtk-smi-common",
	382	.of_match_table = mtk_smi_common_of_ids,
	383	}
	384	};
	385
	386	static int __init mtk_smi_init(void)
	387	{
	388	int ret;
	389
	390	ret = platform_driver_register(&mtk_smi_common_driver);
	391	if (ret != 0) {
	392	pr_err("Failed to register SMI driver\n");
	393	return ret;
	394	}
	395
	396	ret = platform_driver_register(&mtk_smi_larb_driver);
	397	if (ret != 0) {
	398	pr_err("Failed to register SMI-LARB driver\n");
	399	goto err_unreg_smi;
	400	}
	401	return ret;
	402
	403	err_unreg_smi:
	404	platform_driver_unregister(&mtk_smi_common_driver);
	405	return ret;
	406	}
3c8f4ad8	407
cc8bbe1a	408	subsys_initcall(mtk_smi_init);