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89184651 TR |
1 | /* |
2 | * Copyright (C) 2014 NVIDIA CORPORATION. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #ifndef MEMORY_TEGRA_MC_H | |
10 | #define MEMORY_TEGRA_MC_H | |
11 | ||
12 | #include <linux/io.h> | |
13 | #include <linux/types.h> | |
14 | ||
15 | #include <soc/tegra/mc.h> | |
16 | ||
1de828ce DO |
17 | #define MC_INT_DECERR_MTS (1 << 16) |
18 | #define MC_INT_SECERR_SEC (1 << 13) | |
19 | #define MC_INT_DECERR_VPR (1 << 12) | |
20 | #define MC_INT_INVALID_APB_ASID_UPDATE (1 << 11) | |
21 | #define MC_INT_INVALID_SMMU_PAGE (1 << 10) | |
22 | #define MC_INT_ARBITRATION_EMEM (1 << 9) | |
23 | #define MC_INT_SECURITY_VIOLATION (1 << 8) | |
24 | #define MC_INT_DECERR_EMEM (1 << 6) | |
25 | ||
89184651 TR |
26 | static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset) |
27 | { | |
28 | return readl(mc->regs + offset); | |
29 | } | |
30 | ||
31 | static inline void mc_writel(struct tegra_mc *mc, u32 value, | |
32 | unsigned long offset) | |
33 | { | |
34 | writel(value, mc->regs + offset); | |
35 | } | |
36 | ||
37 | #ifdef CONFIG_ARCH_TEGRA_3x_SOC | |
38 | extern const struct tegra_mc_soc tegra30_mc_soc; | |
39 | #endif | |
40 | ||
41 | #ifdef CONFIG_ARCH_TEGRA_114_SOC | |
42 | extern const struct tegra_mc_soc tegra114_mc_soc; | |
43 | #endif | |
44 | ||
45 | #ifdef CONFIG_ARCH_TEGRA_124_SOC | |
46 | extern const struct tegra_mc_soc tegra124_mc_soc; | |
47 | #endif | |
48 | ||
242b1d71 TR |
49 | #ifdef CONFIG_ARCH_TEGRA_132_SOC |
50 | extern const struct tegra_mc_soc tegra132_mc_soc; | |
51 | #endif | |
52 | ||
588c43a7 TR |
53 | #ifdef CONFIG_ARCH_TEGRA_210_SOC |
54 | extern const struct tegra_mc_soc tegra210_mc_soc; | |
55 | #endif | |
56 | ||
89184651 | 57 | #endif /* MEMORY_TEGRA_MC_H */ |