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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ecryptfs...
[mirror_ubuntu-zesty-kernel.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/mfd/core.h>
47c16975 19#include <linux/mfd/abx500.h>
62579266 20#include <linux/mfd/ab8500.h>
549931f9 21#include <linux/regulator/ab8500.h>
62579266
RV		 22
23/*
24 * Interrupt register offsets
25 * Bank : 0x0E
26 */
47c16975
MW		 27#define AB8500_IT_SOURCE1_REG 0x00
28#define AB8500_IT_SOURCE2_REG 0x01
29#define AB8500_IT_SOURCE3_REG 0x02
30#define AB8500_IT_SOURCE4_REG 0x03
31#define AB8500_IT_SOURCE5_REG 0x04
32#define AB8500_IT_SOURCE6_REG 0x05
33#define AB8500_IT_SOURCE7_REG 0x06
34#define AB8500_IT_SOURCE8_REG 0x07
35#define AB8500_IT_SOURCE19_REG 0x12
36#define AB8500_IT_SOURCE20_REG 0x13
37#define AB8500_IT_SOURCE21_REG 0x14
38#define AB8500_IT_SOURCE22_REG 0x15
39#define AB8500_IT_SOURCE23_REG 0x16
40#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 41
42/*
43 * latch registers
44 */
47c16975
MW		 45#define AB8500_IT_LATCH1_REG 0x20
46#define AB8500_IT_LATCH2_REG 0x21
47#define AB8500_IT_LATCH3_REG 0x22
48#define AB8500_IT_LATCH4_REG 0x23
49#define AB8500_IT_LATCH5_REG 0x24
50#define AB8500_IT_LATCH6_REG 0x25
51#define AB8500_IT_LATCH7_REG 0x26
52#define AB8500_IT_LATCH8_REG 0x27
53#define AB8500_IT_LATCH9_REG 0x28
54#define AB8500_IT_LATCH10_REG 0x29
92d50a41 55#define AB8500_IT_LATCH12_REG 0x2B
47c16975
MW		 56#define AB8500_IT_LATCH19_REG 0x32
57#define AB8500_IT_LATCH20_REG 0x33
58#define AB8500_IT_LATCH21_REG 0x34
59#define AB8500_IT_LATCH22_REG 0x35
60#define AB8500_IT_LATCH23_REG 0x36
61#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 62
63/*
64 * mask registers
65 */
66
47c16975
MW		 67#define AB8500_IT_MASK1_REG 0x40
68#define AB8500_IT_MASK2_REG 0x41
69#define AB8500_IT_MASK3_REG 0x42
70#define AB8500_IT_MASK4_REG 0x43
71#define AB8500_IT_MASK5_REG 0x44
72#define AB8500_IT_MASK6_REG 0x45
73#define AB8500_IT_MASK7_REG 0x46
74#define AB8500_IT_MASK8_REG 0x47
75#define AB8500_IT_MASK9_REG 0x48
76#define AB8500_IT_MASK10_REG 0x49
77#define AB8500_IT_MASK11_REG 0x4A
78#define AB8500_IT_MASK12_REG 0x4B
79#define AB8500_IT_MASK13_REG 0x4C
80#define AB8500_IT_MASK14_REG 0x4D
81#define AB8500_IT_MASK15_REG 0x4E
82#define AB8500_IT_MASK16_REG 0x4F
83#define AB8500_IT_MASK17_REG 0x50
84#define AB8500_IT_MASK18_REG 0x51
85#define AB8500_IT_MASK19_REG 0x52
86#define AB8500_IT_MASK20_REG 0x53
87#define AB8500_IT_MASK21_REG 0x54
88#define AB8500_IT_MASK22_REG 0x55
89#define AB8500_IT_MASK23_REG 0x56
90#define AB8500_IT_MASK24_REG 0x57
91
92#define AB8500_REV_REG 0x80
e5c238c3 93#define AB8500_SWITCH_OFF_STATUS 0x00
62579266
RV		 94
95/*
96 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
97 * numbers are indexed into this array with (num / 8).
98 *
99 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
100 * offset 0.
101 */
102static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 103 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 104};
105
47c16975
MW		 106static int ab8500_get_chip_id(struct device *dev)
107{
6bce7bf1
MW		 108 struct ab8500 *ab8500;
109
110 if (!dev)
111 return -EINVAL;
112 ab8500 = dev_get_drvdata(dev->parent);
113 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 114}
115
116static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
117 u8 reg, u8 data)
62579266
RV		 118{
119 int ret;
47c16975
MW		 120 /*
121 * Put the u8 bank and u8 register together into a an u16.
122 * The bank on higher 8 bits and register in lower 8 bits.
123 * */
124 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 125
126 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
127
47c16975
MW		 128 ret = mutex_lock_interruptible(&ab8500->lock);
129 if (ret)
130 return ret;
131
62579266
RV		 132 ret = ab8500->write(ab8500, addr, data);
133 if (ret < 0)
134 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
135 addr, ret);
47c16975 136 mutex_unlock(&ab8500->lock);
62579266
RV		 137
138 return ret;
139}
140
47c16975
MW		 141static int ab8500_set_register(struct device *dev, u8 bank,
142 u8 reg, u8 value)
62579266 143{
47c16975 144 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 145
47c16975 146 return set_register_interruptible(ab8500, bank, reg, value);
62579266 147}
62579266 148
47c16975
MW		 149static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
150 u8 reg, u8 *value)
62579266
RV		 151{
152 int ret;
47c16975
MW		 153 /* put the u8 bank and u8 reg together into a an u16.
154 * bank on higher 8 bits and reg in lower */
155 u16 addr = ((u16)bank) << 8 | reg;
156
157 ret = mutex_lock_interruptible(&ab8500->lock);
158 if (ret)
159 return ret;
62579266
RV		 160
161 ret = ab8500->read(ab8500, addr);
162 if (ret < 0)
163 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
164 addr, ret);
47c16975
MW		 165 else
166 *value = ret;
62579266 167
47c16975 168 mutex_unlock(&ab8500->lock);
62579266
RV		 169 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
170
171 return ret;
172}
173
47c16975
MW		 174static int ab8500_get_register(struct device *dev, u8 bank,
175 u8 reg, u8 *value)
62579266 176{
47c16975 177 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 178
47c16975 179 return get_register_interruptible(ab8500, bank, reg, value);
62579266 180}
47c16975
MW		 181
182static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
183 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 184{
185 int ret;
47c16975
MW		 186 u8 data;
187 /* put the u8 bank and u8 reg together into a an u16.
188 * bank on higher 8 bits and reg in lower */
189 u16 addr = ((u16)bank) << 8 | reg;
62579266 190
47c16975
MW		 191 ret = mutex_lock_interruptible(&ab8500->lock);
192 if (ret)
193 return ret;
62579266 194
47c16975
MW		 195 ret = ab8500->read(ab8500, addr);
196 if (ret < 0) {
197 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
198 addr, ret);
62579266 199 goto out;
47c16975 200 }
62579266 201
47c16975
MW		 202 data = (u8)ret;
203 data = (~bitmask & data) | (bitmask & bitvalues);
62579266 204
47c16975
MW		 205 ret = ab8500->write(ab8500, addr, data);
206 if (ret < 0)
207 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
208 addr, ret);
62579266 209
47c16975 210 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
62579266
RV		 211out:
212 mutex_unlock(&ab8500->lock);
213 return ret;
214}
47c16975
MW		 215
216static int ab8500_mask_and_set_register(struct device *dev,
217 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
218{
219 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
220
221 return mask_and_set_register_interruptible(ab8500, bank, reg,
222 bitmask, bitvalues);
223
224}
225
226static struct abx500_ops ab8500_ops = {
227 .get_chip_id = ab8500_get_chip_id,
228 .get_register = ab8500_get_register,
229 .set_register = ab8500_set_register,
230 .get_register_page = NULL,
231 .set_register_page = NULL,
232 .mask_and_set_register = ab8500_mask_and_set_register,
233 .event_registers_startup_state_get = NULL,
234 .startup_irq_enabled = NULL,
235};
62579266 236
9505a0a0 237static void ab8500_irq_lock(struct irq_data *data)
62579266 238{
9505a0a0 239 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 240
241 mutex_lock(&ab8500->irq_lock);
242}
243
9505a0a0 244static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 245{
9505a0a0 246 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 247 int i;
248
249 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
250 u8 old = ab8500->oldmask[i];
251 u8 new = ab8500->mask[i];
252 int reg;
253
254 if (new == old)
255 continue;
256
92d50a41
MW		 257 /* Interrupt register 12 does'nt exist prior to version 0x20 */
258 if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20)
259 continue;
260
62579266
RV		 261 ab8500->oldmask[i] = new;
262
263 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
47c16975 264 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266
RV		 265 }
266
267 mutex_unlock(&ab8500->irq_lock);
268}
269
9505a0a0 270static void ab8500_irq_mask(struct irq_data *data)
62579266 271{
9505a0a0
MB		 272 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
273 int offset = data->irq - ab8500->irq_base;
62579266
RV		 274 int index = offset / 8;
275 int mask = 1 << (offset % 8);
276
277 ab8500->mask[index] |= mask;
278}
279
9505a0a0 280static void ab8500_irq_unmask(struct irq_data *data)
62579266 281{
9505a0a0
MB		 282 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
283 int offset = data->irq - ab8500->irq_base;
62579266
RV		 284 int index = offset / 8;
285 int mask = 1 << (offset % 8);
286
287 ab8500->mask[index] &= ~mask;
288}
289
290static struct irq_chip ab8500_irq_chip = {
291 .name = "ab8500",
9505a0a0
MB		 292 .irq_bus_lock = ab8500_irq_lock,
293 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
294 .irq_mask = ab8500_irq_mask,
295 .irq_unmask = ab8500_irq_unmask,
62579266
RV		 296};
297
298static irqreturn_t ab8500_irq(int irq, void *dev)
299{
300 struct ab8500 *ab8500 = dev;
301 int i;
302
303 dev_vdbg(ab8500->dev, "interrupt\n");
304
305 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
306 int regoffset = ab8500_irq_regoffset[i];
307 int status;
47c16975 308 u8 value;
62579266 309
92d50a41
MW		 310 /* Interrupt register 12 does'nt exist prior to version 0x20 */
311 if (regoffset == 11 && ab8500->chip_id < 0x20)
312 continue;
313
47c16975
MW		 314 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
315 AB8500_IT_LATCH1_REG + regoffset, &value);
316 if (status < 0 || value == 0)
62579266
RV		 317 continue;
318
319 do {
88aec4f7 320 int bit = __ffs(value);
62579266
RV		 321 int line = i * 8 + bit;
322
323 handle_nested_irq(ab8500->irq_base + line);
47c16975
MW		 324 value &= ~(1 << bit);
325 } while (value);
62579266
RV		 326 }
327
328 return IRQ_HANDLED;
329}
330
331static int ab8500_irq_init(struct ab8500 *ab8500)
332{
333 int base = ab8500->irq_base;
334 int irq;
335
336 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
d5bb1221
TG		 337 irq_set_chip_data(irq, ab8500);
338 irq_set_chip_and_handler(irq, &ab8500_irq_chip,
62579266 339 handle_simple_irq);
d5bb1221 340 irq_set_nested_thread(irq, 1);
62579266
RV		 341#ifdef CONFIG_ARM
342 set_irq_flags(irq, IRQF_VALID);
343#else
d5bb1221 344 irq_set_noprobe(irq);
62579266
RV		 345#endif
346 }
347
348 return 0;
349}
350
351static void ab8500_irq_remove(struct ab8500 *ab8500)
352{
353 int base = ab8500->irq_base;
354 int irq;
355
356 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
357#ifdef CONFIG_ARM
358 set_irq_flags(irq, 0);
359#endif
d5bb1221
TG		 360 irq_set_chip_and_handler(irq, NULL, NULL);
361 irq_set_chip_data(irq, NULL);
62579266
RV		 362 }
363}
364
0cb3fcd7
BB		 365static struct resource ab8500_gpio_resources[] = {
366 {
367 .name = "GPIO_INT6",
368 .start = AB8500_INT_GPIO6R,
369 .end = AB8500_INT_GPIO41F,
370 .flags = IORESOURCE_IRQ,
371 }
372};
373
62579266
RV		 374static struct resource ab8500_gpadc_resources[] = {
375 {
376 .name = "HW_CONV_END",
377 .start = AB8500_INT_GP_HW_ADC_CONV_END,
378 .end = AB8500_INT_GP_HW_ADC_CONV_END,
379 .flags = IORESOURCE_IRQ,
380 },
381 {
382 .name = "SW_CONV_END",
383 .start = AB8500_INT_GP_SW_ADC_CONV_END,
384 .end = AB8500_INT_GP_SW_ADC_CONV_END,
385 .flags = IORESOURCE_IRQ,
386 },
387};
388
389static struct resource ab8500_rtc_resources[] = {
390 {
391 .name = "60S",
392 .start = AB8500_INT_RTC_60S,
393 .end = AB8500_INT_RTC_60S,
394 .flags = IORESOURCE_IRQ,
395 },
396 {
397 .name = "ALARM",
398 .start = AB8500_INT_RTC_ALARM,
399 .end = AB8500_INT_RTC_ALARM,
400 .flags = IORESOURCE_IRQ,
401 },
402};
403
77686517
SI		 404static struct resource ab8500_poweronkey_db_resources[] = {
405 {
406 .name = "ONKEY_DBF",
407 .start = AB8500_INT_PON_KEY1DB_F,
408 .end = AB8500_INT_PON_KEY1DB_F,
409 .flags = IORESOURCE_IRQ,
410 },
411 {
412 .name = "ONKEY_DBR",
413 .start = AB8500_INT_PON_KEY1DB_R,
414 .end = AB8500_INT_PON_KEY1DB_R,
415 .flags = IORESOURCE_IRQ,
416 },
417};
418
e098aded
MW		 419static struct resource ab8500_bm_resources[] = {
420 {
421 .name = "MAIN_EXT_CH_NOT_OK",
422 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
423 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
424 .flags = IORESOURCE_IRQ,
425 },
426 {
427 .name = "BATT_OVV",
428 .start = AB8500_INT_BATT_OVV,
429 .end = AB8500_INT_BATT_OVV,
430 .flags = IORESOURCE_IRQ,
431 },
432 {
433 .name = "MAIN_CH_UNPLUG_DET",
434 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
435 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
436 .flags = IORESOURCE_IRQ,
437 },
438 {
439 .name = "MAIN_CHARGE_PLUG_DET",
440 .start = AB8500_INT_MAIN_CH_PLUG_DET,
441 .end = AB8500_INT_MAIN_CH_PLUG_DET,
442 .flags = IORESOURCE_IRQ,
443 },
444 {
445 .name = "VBUS_DET_F",
446 .start = AB8500_INT_VBUS_DET_F,
447 .end = AB8500_INT_VBUS_DET_F,
448 .flags = IORESOURCE_IRQ,
449 },
450 {
451 .name = "VBUS_DET_R",
452 .start = AB8500_INT_VBUS_DET_R,
453 .end = AB8500_INT_VBUS_DET_R,
454 .flags = IORESOURCE_IRQ,
455 },
456 {
457 .name = "BAT_CTRL_INDB",
458 .start = AB8500_INT_BAT_CTRL_INDB,
459 .end = AB8500_INT_BAT_CTRL_INDB,
460 .flags = IORESOURCE_IRQ,
461 },
462 {
463 .name = "CH_WD_EXP",
464 .start = AB8500_INT_CH_WD_EXP,
465 .end = AB8500_INT_CH_WD_EXP,
466 .flags = IORESOURCE_IRQ,
467 },
468 {
469 .name = "VBUS_OVV",
470 .start = AB8500_INT_VBUS_OVV,
471 .end = AB8500_INT_VBUS_OVV,
472 .flags = IORESOURCE_IRQ,
473 },
474 {
475 .name = "NCONV_ACCU",
476 .start = AB8500_INT_CCN_CONV_ACC,
477 .end = AB8500_INT_CCN_CONV_ACC,
478 .flags = IORESOURCE_IRQ,
479 },
480 {
481 .name = "LOW_BAT_F",
482 .start = AB8500_INT_LOW_BAT_F,
483 .end = AB8500_INT_LOW_BAT_F,
484 .flags = IORESOURCE_IRQ,
485 },
486 {
487 .name = "LOW_BAT_R",
488 .start = AB8500_INT_LOW_BAT_R,
489 .end = AB8500_INT_LOW_BAT_R,
490 .flags = IORESOURCE_IRQ,
491 },
492 {
493 .name = "BTEMP_LOW",
494 .start = AB8500_INT_BTEMP_LOW,
495 .end = AB8500_INT_BTEMP_LOW,
496 .flags = IORESOURCE_IRQ,
497 },
498 {
499 .name = "BTEMP_HIGH",
500 .start = AB8500_INT_BTEMP_HIGH,
501 .end = AB8500_INT_BTEMP_HIGH,
502 .flags = IORESOURCE_IRQ,
503 },
504 {
505 .name = "USB_CHARGER_NOT_OKR",
506 .start = AB8500_INT_USB_CHARGER_NOT_OK,
507 .end = AB8500_INT_USB_CHARGER_NOT_OK,
508 .flags = IORESOURCE_IRQ,
509 },
510 {
511 .name = "USB_CHARGE_DET_DONE",
512 .start = AB8500_INT_USB_CHG_DET_DONE,
513 .end = AB8500_INT_USB_CHG_DET_DONE,
514 .flags = IORESOURCE_IRQ,
515 },
516 {
517 .name = "USB_CH_TH_PROT_R",
518 .start = AB8500_INT_USB_CH_TH_PROT_R,
519 .end = AB8500_INT_USB_CH_TH_PROT_R,
520 .flags = IORESOURCE_IRQ,
521 },
522 {
523 .name = "MAIN_CH_TH_PROT_R",
524 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
525 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
526 .flags = IORESOURCE_IRQ,
527 },
528 {
529 .name = "USB_CHARGER_NOT_OKF",
530 .start = AB8500_INT_USB_CHARGER_NOT_OKF,
531 .end = AB8500_INT_USB_CHARGER_NOT_OKF,
532 .flags = IORESOURCE_IRQ,
533 },
534};
535
536static struct resource ab8500_debug_resources[] = {
537 {
538 .name = "IRQ_FIRST",
539 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
540 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
541 .flags = IORESOURCE_IRQ,
542 },
543 {
544 .name = "IRQ_LAST",
545 .start = AB8500_INT_USB_CHARGER_NOT_OKF,
546 .end = AB8500_INT_USB_CHARGER_NOT_OKF,
547 .flags = IORESOURCE_IRQ,
548 },
549};
550
551static struct resource ab8500_usb_resources[] = {
552 {
553 .name = "ID_WAKEUP_R",
554 .start = AB8500_INT_ID_WAKEUP_R,
555 .end = AB8500_INT_ID_WAKEUP_R,
556 .flags = IORESOURCE_IRQ,
557 },
558 {
559 .name = "ID_WAKEUP_F",
560 .start = AB8500_INT_ID_WAKEUP_F,
561 .end = AB8500_INT_ID_WAKEUP_F,
562 .flags = IORESOURCE_IRQ,
563 },
564 {
565 .name = "VBUS_DET_F",
566 .start = AB8500_INT_VBUS_DET_F,
567 .end = AB8500_INT_VBUS_DET_F,
568 .flags = IORESOURCE_IRQ,
569 },
570 {
571 .name = "VBUS_DET_R",
572 .start = AB8500_INT_VBUS_DET_R,
573 .end = AB8500_INT_VBUS_DET_R,
574 .flags = IORESOURCE_IRQ,
575 },
92d50a41
MW		 576 {
577 .name = "USB_LINK_STATUS",
578 .start = AB8500_INT_USB_LINK_STATUS,
579 .end = AB8500_INT_USB_LINK_STATUS,
580 .flags = IORESOURCE_IRQ,
581 },
e098aded
MW		 582};
583
584static struct resource ab8500_temp_resources[] = {
585 {
586 .name = "AB8500_TEMP_WARM",
587 .start = AB8500_INT_TEMP_WARM,
588 .end = AB8500_INT_TEMP_WARM,
589 .flags = IORESOURCE_IRQ,
590 },
591};
592
62579266 593static struct mfd_cell ab8500_devs[] = {
5814fc35
MW		 594#ifdef CONFIG_DEBUG_FS
595 {
596 .name = "ab8500-debug",
e098aded
MW		 597 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
598 .resources = ab8500_debug_resources,
5814fc35
MW		 599 },
600#endif
e098aded
MW		 601 {
602 .name = "ab8500-sysctrl",
603 },
604 {
605 .name = "ab8500-regulator",
606 },
0cb3fcd7
BB		 607 {
608 .name = "ab8500-gpio",
609 .num_resources = ARRAY_SIZE(ab8500_gpio_resources),
610 .resources = ab8500_gpio_resources,
611 },
62579266
RV		 612 {
613 .name = "ab8500-gpadc",
614 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
615 .resources = ab8500_gpadc_resources,
616 },
617 {
618 .name = "ab8500-rtc",
619 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
620 .resources = ab8500_rtc_resources,
621 },
e098aded
MW		 622 {
623 .name = "ab8500-bm",
624 .num_resources = ARRAY_SIZE(ab8500_bm_resources),
625 .resources = ab8500_bm_resources,
626 },
627 { .name = "ab8500-codec", },
628 {
629 .name = "ab8500-usb",
630 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
631 .resources = ab8500_usb_resources,
632 },
633 {
634 .name = "ab8500-poweron-key",
635 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
636 .resources = ab8500_poweronkey_db_resources,
637 },
f0f05b1c
AM		 638 {
639 .name = "ab8500-pwm",
640 .id = 1,
641 },
642 {
643 .name = "ab8500-pwm",
644 .id = 2,
645 },
646 {
647 .name = "ab8500-pwm",
648 .id = 3,
649 },
e098aded 650 { .name = "ab8500-leds", },
77686517 651 {
e098aded
MW		 652 .name = "ab8500-denc",
653 },
654 {
655 .name = "ab8500-temp",
656 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
657 .resources = ab8500_temp_resources,
77686517 658 },
62579266
RV		 659};
660
cca69b67
MW		 661static ssize_t show_chip_id(struct device *dev,
662 struct device_attribute *attr, char *buf)
663{
664 struct ab8500 *ab8500;
665
666 ab8500 = dev_get_drvdata(dev);
667 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
668}
669
e5c238c3
MW		 670/*
671 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
672 * 0x01 Swoff bit programming
673 * 0x02 Thermal protection activation
674 * 0x04 Vbat lower then BattOk falling threshold
675 * 0x08 Watchdog expired
676 * 0x10 Non presence of 32kHz clock
677 * 0x20 Battery level lower than power on reset threshold
678 * 0x40 Power on key 1 pressed longer than 10 seconds
679 * 0x80 DB8500 thermal shutdown
680 */
681static ssize_t show_switch_off_status(struct device *dev,
682 struct device_attribute *attr, char *buf)
683{
684 int ret;
685 u8 value;
686 struct ab8500 *ab8500;
687
688 ab8500 = dev_get_drvdata(dev);
689 ret = get_register_interruptible(ab8500, AB8500_RTC,
690 AB8500_SWITCH_OFF_STATUS, &value);
691 if (ret < 0)
692 return ret;
693 return sprintf(buf, "%#x\n", value);
694}
695
cca69b67 696static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 697static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
cca69b67
MW		 698
699static struct attribute *ab8500_sysfs_entries[] = {
700 &dev_attr_chip_id.attr,
e5c238c3 701 &dev_attr_switch_off_status.attr,
cca69b67
MW		 702 NULL,
703};
704
705static struct attribute_group ab8500_attr_group = {
706 .attrs = ab8500_sysfs_entries,
707};
708
62579266
RV		 709int __devinit ab8500_init(struct ab8500 *ab8500)
710{
711 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
712 int ret;
713 int i;
47c16975 714 u8 value;
62579266
RV		 715
716 if (plat)
717 ab8500->irq_base = plat->irq_base;
718
719 mutex_init(&ab8500->lock);
720 mutex_init(&ab8500->irq_lock);
721
47c16975
MW		 722 ret = get_register_interruptible(ab8500, AB8500_MISC,
723 AB8500_REV_REG, &value);
62579266
RV		 724 if (ret < 0)
725 return ret;
726
727 /*
728 * 0x0 - Early Drop
729 * 0x10 - Cut 1.0
730 * 0x11 - Cut 1.1
92d50a41 731 * 0x20 - Cut 2.0
adceed62 732 * 0x30 - Cut 3.0
62579266 733 */
adceed62
MW		 734 if (value == 0x0 || value == 0x10 || value == 0x11 || value == 0x20 ||
735 value == 0x30) {
47c16975 736 dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
62579266 737 } else {
47c16975 738 dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
62579266
RV		 739 return -EINVAL;
740 }
47c16975 741 ab8500->chip_id = value;
62579266 742
e5c238c3
MW		 743 /*
744 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
745 * 0x01 Swoff bit programming
746 * 0x02 Thermal protection activation
747 * 0x04 Vbat lower then BattOk falling threshold
748 * 0x08 Watchdog expired
749 * 0x10 Non presence of 32kHz clock
750 * 0x20 Battery level lower than power on reset threshold
751 * 0x40 Power on key 1 pressed longer than 10 seconds
752 * 0x80 DB8500 thermal shutdown
753 */
754
755 ret = get_register_interruptible(ab8500, AB8500_RTC,
756 AB8500_SWITCH_OFF_STATUS, &value);
757 if (ret < 0)
758 return ret;
759 dev_info(ab8500->dev, "switch off status: %#x", value);
760
62579266
RV		 761 if (plat && plat->init)
762 plat->init(ab8500);
763
764 /* Clear and mask all interrupts */
92d50a41
MW		 765 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
766 /* Interrupt register 12 does'nt exist prior to version 0x20 */
767 if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20)
768 continue;
62579266 769
47c16975 770 get_register_interruptible(ab8500, AB8500_INTERRUPT,
92d50a41
MW		 771 AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i],
772 &value);
47c16975 773 set_register_interruptible(ab8500, AB8500_INTERRUPT,
92d50a41 774 AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff);
62579266
RV		 775 }
776
47c16975
MW		 777 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
778 if (ret)
779 return ret;
780
62579266
RV		 781 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
782 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
783
784 if (ab8500->irq_base) {
785 ret = ab8500_irq_init(ab8500);
786 if (ret)
787 return ret;
788
789 ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
4f079985
MW		 790 IRQF_ONESHOT | IRQF_NO_SUSPEND,
791 "ab8500", ab8500);
62579266
RV		 792 if (ret)
793 goto out_removeirq;
794 }
795
549931f9 796 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
62579266
RV		 797 ARRAY_SIZE(ab8500_devs), NULL,
798 ab8500->irq_base);
799 if (ret)
800 goto out_freeirq;
801
cca69b67
MW		 802 ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
803 if (ret)
804 dev_err(ab8500->dev, "error creating sysfs entries\n");
805
62579266
RV		 806 return ret;
807
808out_freeirq:
809 if (ab8500->irq_base) {
810 free_irq(ab8500->irq, ab8500);
811out_removeirq:
812 ab8500_irq_remove(ab8500);
813 }
814 return ret;
815}
816
817int __devexit ab8500_exit(struct ab8500 *ab8500)
818{
cca69b67 819 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
62579266
RV		 820 mfd_remove_devices(ab8500->dev);
821 if (ab8500->irq_base) {
822 free_irq(ab8500->irq, ab8500);
823 ab8500_irq_remove(ab8500);
824 }
825
826 return 0;
827}
828
adceed62 829MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 830MODULE_DESCRIPTION("AB8500 MFD core");
831MODULE_LICENSE("GPL v2");
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