[mirror_ubuntu-artful-kernel.git] / drivers / mfd / ab8500-core.c

/*
 * Copyright (C) ST-Ericsson SA 2010
 *
 * License Terms: GNU General Public License v2
 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
 * Changes: Mattias Wallin <mattias.wallin@stericsson.com>
 */

#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
#include <linux/mfd/abx500.h>
#include <linux/mfd/ab8500.h>
#include <linux/regulator/ab8500.h>

/*
 * Interrupt register offsets
 * Bank : 0x0E
 */
#define AB8500_IT_SOURCE1_REG		0x00
#define AB8500_IT_SOURCE2_REG		0x01
#define AB8500_IT_SOURCE3_REG		0x02
#define AB8500_IT_SOURCE4_REG		0x03
#define AB8500_IT_SOURCE5_REG		0x04
#define AB8500_IT_SOURCE6_REG		0x05
#define AB8500_IT_SOURCE7_REG		0x06
#define AB8500_IT_SOURCE8_REG		0x07
#define AB8500_IT_SOURCE19_REG		0x12
#define AB8500_IT_SOURCE20_REG		0x13
#define AB8500_IT_SOURCE21_REG		0x14
#define AB8500_IT_SOURCE22_REG		0x15
#define AB8500_IT_SOURCE23_REG		0x16
#define AB8500_IT_SOURCE24_REG		0x17

/*
 * latch registers
 */
#define AB8500_IT_LATCH1_REG		0x20
#define AB8500_IT_LATCH2_REG		0x21
#define AB8500_IT_LATCH3_REG		0x22
#define AB8500_IT_LATCH4_REG		0x23
#define AB8500_IT_LATCH5_REG		0x24
#define AB8500_IT_LATCH6_REG		0x25
#define AB8500_IT_LATCH7_REG		0x26
#define AB8500_IT_LATCH8_REG		0x27
#define AB8500_IT_LATCH9_REG		0x28
#define AB8500_IT_LATCH10_REG		0x29
#define AB8500_IT_LATCH19_REG		0x32
#define AB8500_IT_LATCH20_REG		0x33
#define AB8500_IT_LATCH21_REG		0x34
#define AB8500_IT_LATCH22_REG		0x35
#define AB8500_IT_LATCH23_REG		0x36
#define AB8500_IT_LATCH24_REG		0x37

/*
 * mask registers
 */

#define AB8500_IT_MASK1_REG		0x40
#define AB8500_IT_MASK2_REG		0x41
#define AB8500_IT_MASK3_REG		0x42
#define AB8500_IT_MASK4_REG		0x43
#define AB8500_IT_MASK5_REG		0x44
#define AB8500_IT_MASK6_REG		0x45
#define AB8500_IT_MASK7_REG		0x46
#define AB8500_IT_MASK8_REG		0x47
#define AB8500_IT_MASK9_REG		0x48
#define AB8500_IT_MASK10_REG		0x49
#define AB8500_IT_MASK11_REG		0x4A
#define AB8500_IT_MASK12_REG		0x4B
#define AB8500_IT_MASK13_REG		0x4C
#define AB8500_IT_MASK14_REG		0x4D
#define AB8500_IT_MASK15_REG		0x4E
#define AB8500_IT_MASK16_REG		0x4F
#define AB8500_IT_MASK17_REG		0x50
#define AB8500_IT_MASK18_REG		0x51
#define AB8500_IT_MASK19_REG		0x52
#define AB8500_IT_MASK20_REG		0x53
#define AB8500_IT_MASK21_REG		0x54
#define AB8500_IT_MASK22_REG		0x55
#define AB8500_IT_MASK23_REG		0x56
#define AB8500_IT_MASK24_REG		0x57

#define AB8500_REV_REG			0x80

/*
 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
 * numbers are indexed into this array with (num / 8).
 *
 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
 * offset 0.
 */
static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
	0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21,
};

static int ab8500_get_chip_id(struct device *dev)
{
	struct ab8500 *ab8500;

	if (!dev)
		return -EINVAL;
	ab8500 = dev_get_drvdata(dev->parent);
	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
}

static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
	u8 reg, u8 data)
{
	int ret;
	/*
	 * Put the u8 bank and u8 register together into a an u16.
	 * The bank on higher 8 bits and register in lower 8 bits.
	 * */
	u16 addr = ((u16)bank) << 8 | reg;

	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);

	ret = mutex_lock_interruptible(&ab8500->lock);
	if (ret)
		return ret;

	ret = ab8500->write(ab8500, addr, data);
	if (ret < 0)
		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
			addr, ret);
	mutex_unlock(&ab8500->lock);

	return ret;
}

static int ab8500_set_register(struct device *dev, u8 bank,
	u8 reg, u8 value)
{
	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);

	return set_register_interruptible(ab8500, bank, reg, value);
}

static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
	u8 reg, u8 *value)
{
	int ret;
	/* put the u8 bank and u8 reg together into a an u16.
	 * bank on higher 8 bits and reg in lower */
	u16 addr = ((u16)bank) << 8 | reg;

	ret = mutex_lock_interruptible(&ab8500->lock);
	if (ret)
		return ret;

	ret = ab8500->read(ab8500, addr);
	if (ret < 0)
		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
			addr, ret);
	else
		*value = ret;

	mutex_unlock(&ab8500->lock);
	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);

	return ret;
}

static int ab8500_get_register(struct device *dev, u8 bank,
	u8 reg, u8 *value)
{
	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);

	return get_register_interruptible(ab8500, bank, reg, value);
}

static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
	u8 reg, u8 bitmask, u8 bitvalues)
{
	int ret;
	u8 data;
	/* put the u8 bank and u8 reg together into a an u16.
	 * bank on higher 8 bits and reg in lower */
	u16 addr = ((u16)bank) << 8 | reg;

	ret = mutex_lock_interruptible(&ab8500->lock);
	if (ret)
		return ret;

	ret = ab8500->read(ab8500, addr);
	if (ret < 0) {
		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
			addr, ret);
		goto out;
	}

	data = (u8)ret;
	data = (~bitmask & data) | (bitmask & bitvalues);

	ret = ab8500->write(ab8500, addr, data);
	if (ret < 0)
		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
			addr, ret);

	dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
out:
	mutex_unlock(&ab8500->lock);
	return ret;
}

static int ab8500_mask_and_set_register(struct device *dev,
	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
{
	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);

	return mask_and_set_register_interruptible(ab8500, bank, reg,
		bitmask, bitvalues);

}

static struct abx500_ops ab8500_ops = {
	.get_chip_id = ab8500_get_chip_id,
	.get_register = ab8500_get_register,
	.set_register = ab8500_set_register,
	.get_register_page = NULL,
	.set_register_page = NULL,
	.mask_and_set_register = ab8500_mask_and_set_register,
	.event_registers_startup_state_get = NULL,
	.startup_irq_enabled = NULL,
};

static void ab8500_irq_lock(struct irq_data *data)
{
	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);

	mutex_lock(&ab8500->irq_lock);
}

static void ab8500_irq_sync_unlock(struct irq_data *data)
{
	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
	int i;

	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
		u8 old = ab8500->oldmask[i];
		u8 new = ab8500->mask[i];
		int reg;

		if (new == old)
			continue;

		ab8500->oldmask[i] = new;

		reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
	}

	mutex_unlock(&ab8500->irq_lock);
}

static void ab8500_irq_mask(struct irq_data *data)
{
	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
	int offset = data->irq - ab8500->irq_base;
	int index = offset / 8;
	int mask = 1 << (offset % 8);

	ab8500->mask[index] |= mask;
}

static void ab8500_irq_unmask(struct irq_data *data)
{
	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
	int offset = data->irq - ab8500->irq_base;
	int index = offset / 8;
	int mask = 1 << (offset % 8);

	ab8500->mask[index] &= ~mask;
}

static struct irq_chip ab8500_irq_chip = {
	.name			= "ab8500",
	.irq_bus_lock		= ab8500_irq_lock,
	.irq_bus_sync_unlock	= ab8500_irq_sync_unlock,
	.irq_mask		= ab8500_irq_mask,
	.irq_unmask		= ab8500_irq_unmask,
};

static irqreturn_t ab8500_irq(int irq, void *dev)
{
	struct ab8500 *ab8500 = dev;
	int i;

	dev_vdbg(ab8500->dev, "interrupt\n");

	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
		int regoffset = ab8500_irq_regoffset[i];
		int status;
		u8 value;

		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
			AB8500_IT_LATCH1_REG + regoffset, &value);
		if (status < 0 || value == 0)
			continue;

		do {
			int bit = __ffs(value);
			int line = i * 8 + bit;

			handle_nested_irq(ab8500->irq_base + line);
			value &= ~(1 << bit);
		} while (value);
	}

	return IRQ_HANDLED;
}

static int ab8500_irq_init(struct ab8500 *ab8500)
{
	int base = ab8500->irq_base;
	int irq;

	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
		set_irq_chip_data(irq, ab8500);
		set_irq_chip_and_handler(irq, &ab8500_irq_chip,
					 handle_simple_irq);
		set_irq_nested_thread(irq, 1);
#ifdef CONFIG_ARM
		set_irq_flags(irq, IRQF_VALID);
#else
		set_irq_noprobe(irq);
#endif
	}

	return 0;
}

static void ab8500_irq_remove(struct ab8500 *ab8500)
{
	int base = ab8500->irq_base;
	int irq;

	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
#ifdef CONFIG_ARM
		set_irq_flags(irq, 0);
#endif
		set_irq_chip_and_handler(irq, NULL, NULL);
		set_irq_chip_data(irq, NULL);
	}
}

static struct resource ab8500_gpadc_resources[] = {
	{
		.name	= "HW_CONV_END",
		.start	= AB8500_INT_GP_HW_ADC_CONV_END,
		.end	= AB8500_INT_GP_HW_ADC_CONV_END,
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "SW_CONV_END",
		.start	= AB8500_INT_GP_SW_ADC_CONV_END,
		.end	= AB8500_INT_GP_SW_ADC_CONV_END,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct resource ab8500_rtc_resources[] = {
	{
		.name	= "60S",
		.start	= AB8500_INT_RTC_60S,
		.end	= AB8500_INT_RTC_60S,
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "ALARM",
		.start	= AB8500_INT_RTC_ALARM,
		.end	= AB8500_INT_RTC_ALARM,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct resource ab8500_poweronkey_db_resources[] = {
	{
		.name	= "ONKEY_DBF",
		.start	= AB8500_INT_PON_KEY1DB_F,
		.end	= AB8500_INT_PON_KEY1DB_F,
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "ONKEY_DBR",
		.start	= AB8500_INT_PON_KEY1DB_R,
		.end	= AB8500_INT_PON_KEY1DB_R,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct resource ab8500_bm_resources[] = {
	{
		.name = "MAIN_EXT_CH_NOT_OK",
		.start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
		.end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "BATT_OVV",
		.start = AB8500_INT_BATT_OVV,
		.end = AB8500_INT_BATT_OVV,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "MAIN_CH_UNPLUG_DET",
		.start = AB8500_INT_MAIN_CH_UNPLUG_DET,
		.end = AB8500_INT_MAIN_CH_UNPLUG_DET,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "MAIN_CHARGE_PLUG_DET",
		.start = AB8500_INT_MAIN_CH_PLUG_DET,
		.end = AB8500_INT_MAIN_CH_PLUG_DET,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "VBUS_DET_F",
		.start = AB8500_INT_VBUS_DET_F,
		.end = AB8500_INT_VBUS_DET_F,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "VBUS_DET_R",
		.start = AB8500_INT_VBUS_DET_R,
		.end = AB8500_INT_VBUS_DET_R,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "BAT_CTRL_INDB",
		.start = AB8500_INT_BAT_CTRL_INDB,
		.end = AB8500_INT_BAT_CTRL_INDB,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "CH_WD_EXP",
		.start = AB8500_INT_CH_WD_EXP,
		.end = AB8500_INT_CH_WD_EXP,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "VBUS_OVV",
		.start = AB8500_INT_VBUS_OVV,
		.end = AB8500_INT_VBUS_OVV,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "NCONV_ACCU",
		.start = AB8500_INT_CCN_CONV_ACC,
		.end = AB8500_INT_CCN_CONV_ACC,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "LOW_BAT_F",
		.start = AB8500_INT_LOW_BAT_F,
		.end = AB8500_INT_LOW_BAT_F,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "LOW_BAT_R",
		.start = AB8500_INT_LOW_BAT_R,
		.end = AB8500_INT_LOW_BAT_R,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "BTEMP_LOW",
		.start = AB8500_INT_BTEMP_LOW,
		.end = AB8500_INT_BTEMP_LOW,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "BTEMP_HIGH",
		.start = AB8500_INT_BTEMP_HIGH,
		.end = AB8500_INT_BTEMP_HIGH,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "USB_CHARGER_NOT_OKR",
		.start = AB8500_INT_USB_CHARGER_NOT_OK,
		.end = AB8500_INT_USB_CHARGER_NOT_OK,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "USB_CHARGE_DET_DONE",
		.start = AB8500_INT_USB_CHG_DET_DONE,
		.end = AB8500_INT_USB_CHG_DET_DONE,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "USB_CH_TH_PROT_R",
		.start = AB8500_INT_USB_CH_TH_PROT_R,
		.end = AB8500_INT_USB_CH_TH_PROT_R,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "MAIN_CH_TH_PROT_R",
		.start = AB8500_INT_MAIN_CH_TH_PROT_R,
		.end = AB8500_INT_MAIN_CH_TH_PROT_R,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "USB_CHARGER_NOT_OKF",
		.start = AB8500_INT_USB_CHARGER_NOT_OKF,
		.end = AB8500_INT_USB_CHARGER_NOT_OKF,
		.flags = IORESOURCE_IRQ,
	},
};

static struct resource ab8500_debug_resources[] = {
	{
		.name	= "IRQ_FIRST",
		.start	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
		.end	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
		.flags	= IORESOURCE_IRQ,
	},
	{
		.name	= "IRQ_LAST",
		.start	= AB8500_INT_USB_CHARGER_NOT_OKF,
		.end	= AB8500_INT_USB_CHARGER_NOT_OKF,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct resource ab8500_usb_resources[] = {
	{
		.name = "ID_WAKEUP_R",
		.start = AB8500_INT_ID_WAKEUP_R,
		.end = AB8500_INT_ID_WAKEUP_R,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "ID_WAKEUP_F",
		.start = AB8500_INT_ID_WAKEUP_F,
		.end = AB8500_INT_ID_WAKEUP_F,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "VBUS_DET_F",
		.start = AB8500_INT_VBUS_DET_F,
		.end = AB8500_INT_VBUS_DET_F,
		.flags = IORESOURCE_IRQ,
	},
	{
		.name = "VBUS_DET_R",
		.start = AB8500_INT_VBUS_DET_R,
		.end = AB8500_INT_VBUS_DET_R,
		.flags = IORESOURCE_IRQ,
	},
};

static struct resource ab8500_temp_resources[] = {
	{
		.name  = "AB8500_TEMP_WARM",
		.start = AB8500_INT_TEMP_WARM,
		.end   = AB8500_INT_TEMP_WARM,
		.flags = IORESOURCE_IRQ,
	},
};

static struct mfd_cell ab8500_devs[] = {
#ifdef CONFIG_DEBUG_FS
	{
		.name = "ab8500-debug",
		.num_resources = ARRAY_SIZE(ab8500_debug_resources),
		.resources = ab8500_debug_resources,
	},
#endif
	{
		.name = "ab8500-sysctrl",
	},
	{
		.name = "ab8500-regulator",
	},
	{
		.name = "ab8500-gpadc",
		.num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
		.resources = ab8500_gpadc_resources,
	},
	{
		.name = "ab8500-rtc",
		.num_resources = ARRAY_SIZE(ab8500_rtc_resources),
		.resources = ab8500_rtc_resources,
	},
	{
		.name = "ab8500-bm",
		.num_resources = ARRAY_SIZE(ab8500_bm_resources),
		.resources = ab8500_bm_resources,
	},
	{ .name = "ab8500-codec", },
	{
		.name = "ab8500-usb",
		.num_resources = ARRAY_SIZE(ab8500_usb_resources),
		.resources = ab8500_usb_resources,
	},
	{
		.name = "ab8500-poweron-key",
		.num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
		.resources = ab8500_poweronkey_db_resources,
	},
	{
		.name = "ab8500-pwm",
		.id = 1,
	},
	{
		.name = "ab8500-pwm",
		.id = 2,
	},
	{
		.name = "ab8500-pwm",
		.id = 3,
	},
	{ .name = "ab8500-leds", },
	{
		.name = "ab8500-denc",
	},
	{
		.name = "ab8500-temp",
		.num_resources = ARRAY_SIZE(ab8500_temp_resources),
		.resources = ab8500_temp_resources,
	},
};

static ssize_t show_chip_id(struct device *dev,
				struct device_attribute *attr, char *buf)
{
	struct ab8500 *ab8500;

	ab8500 = dev_get_drvdata(dev);
	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
}

static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);

static struct attribute *ab8500_sysfs_entries[] = {
	&dev_attr_chip_id.attr,
	NULL,
};

static struct attribute_group ab8500_attr_group = {
	.attrs	= ab8500_sysfs_entries,
};

int __devinit ab8500_init(struct ab8500 *ab8500)
{
	struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
	int ret;
	int i;
	u8 value;

	if (plat)
		ab8500->irq_base = plat->irq_base;

	mutex_init(&ab8500->lock);
	mutex_init(&ab8500->irq_lock);

	ret = get_register_interruptible(ab8500, AB8500_MISC,
		AB8500_REV_REG, &value);
	if (ret < 0)
		return ret;

	/*
	 * 0x0 - Early Drop
	 * 0x10 - Cut 1.0
	 * 0x11 - Cut 1.1
	 */
	if (value == 0x0 || value == 0x10 || value == 0x11) {
		ab8500->revision = value;
		dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
	} else {
		dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
		return -EINVAL;
	}
	ab8500->chip_id = value;

	if (plat && plat->init)
		plat->init(ab8500);

	/* Clear and mask all interrupts */
	for (i = 0; i < 10; i++) {
		get_register_interruptible(ab8500, AB8500_INTERRUPT,
			AB8500_IT_LATCH1_REG + i, &value);
		set_register_interruptible(ab8500, AB8500_INTERRUPT,
			AB8500_IT_MASK1_REG + i, 0xff);
	}

	for (i = 18; i < 24; i++) {
		get_register_interruptible(ab8500, AB8500_INTERRUPT,
			AB8500_IT_LATCH1_REG + i, &value);
		set_register_interruptible(ab8500, AB8500_INTERRUPT,
			AB8500_IT_MASK1_REG + i, 0xff);
	}

	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
	if (ret)
		return ret;

	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
		ab8500->mask[i] = ab8500->oldmask[i] = 0xff;

	if (ab8500->irq_base) {
		ret = ab8500_irq_init(ab8500);
		if (ret)
			return ret;

		ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
					   IRQF_ONESHOT | IRQF_NO_SUSPEND,
					   "ab8500", ab8500);
		if (ret)
			goto out_removeirq;
	}

	ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
			      ARRAY_SIZE(ab8500_devs), NULL,
			      ab8500->irq_base);
	if (ret)
		goto out_freeirq;

	ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
	if (ret)
		dev_err(ab8500->dev, "error creating sysfs entries\n");

	return ret;

out_freeirq:
	if (ab8500->irq_base) {
		free_irq(ab8500->irq, ab8500);
out_removeirq:
		ab8500_irq_remove(ab8500);
	}
	return ret;
}

int __devexit ab8500_exit(struct ab8500 *ab8500)
{
	sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
	mfd_remove_devices(ab8500->dev);
	if (ab8500->irq_base) {
		free_irq(ab8500->irq, ab8500);
		ab8500_irq_remove(ab8500);
	}

	return 0;
}

MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent");
MODULE_DESCRIPTION("AB8500 MFD core");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
62579266 RV	1	/*
	2	* Copyright (C) ST-Ericsson SA 2010
	3	*
	4	* License Terms: GNU General Public License v2
	5	* Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
	6	* Author: Rabin Vincent <rabin.vincent@stericsson.com>
47c16975	7	* Changes: Mattias Wallin <mattias.wallin@stericsson.com>
62579266 RV	8	*/
	9
	10	#include <linux/kernel.h>
	11	#include <linux/slab.h>
	12	#include <linux/init.h>
	13	#include <linux/irq.h>
	14	#include <linux/delay.h>
	15	#include <linux/interrupt.h>
	16	#include <linux/module.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/mfd/core.h>
47c16975	19	#include <linux/mfd/abx500.h>
62579266	20	#include <linux/mfd/ab8500.h>
549931f9	21	#include <linux/regulator/ab8500.h>
62579266 RV	22
	23	/*
	24	* Interrupt register offsets
	25	* Bank : 0x0E
	26	*/
47c16975 MW	27	#define AB8500_IT_SOURCE1_REG 0x00
	28	#define AB8500_IT_SOURCE2_REG 0x01
	29	#define AB8500_IT_SOURCE3_REG 0x02
	30	#define AB8500_IT_SOURCE4_REG 0x03
	31	#define AB8500_IT_SOURCE5_REG 0x04
	32	#define AB8500_IT_SOURCE6_REG 0x05
	33	#define AB8500_IT_SOURCE7_REG 0x06
	34	#define AB8500_IT_SOURCE8_REG 0x07
	35	#define AB8500_IT_SOURCE19_REG 0x12
	36	#define AB8500_IT_SOURCE20_REG 0x13
	37	#define AB8500_IT_SOURCE21_REG 0x14
	38	#define AB8500_IT_SOURCE22_REG 0x15
	39	#define AB8500_IT_SOURCE23_REG 0x16
	40	#define AB8500_IT_SOURCE24_REG 0x17
62579266 RV	41
	42	/*
	43	* latch registers
	44	*/
47c16975 MW	45	#define AB8500_IT_LATCH1_REG 0x20
	46	#define AB8500_IT_LATCH2_REG 0x21
	47	#define AB8500_IT_LATCH3_REG 0x22
	48	#define AB8500_IT_LATCH4_REG 0x23
	49	#define AB8500_IT_LATCH5_REG 0x24
	50	#define AB8500_IT_LATCH6_REG 0x25
	51	#define AB8500_IT_LATCH7_REG 0x26
	52	#define AB8500_IT_LATCH8_REG 0x27
	53	#define AB8500_IT_LATCH9_REG 0x28
	54	#define AB8500_IT_LATCH10_REG 0x29
	55	#define AB8500_IT_LATCH19_REG 0x32
	56	#define AB8500_IT_LATCH20_REG 0x33
	57	#define AB8500_IT_LATCH21_REG 0x34
	58	#define AB8500_IT_LATCH22_REG 0x35
	59	#define AB8500_IT_LATCH23_REG 0x36
	60	#define AB8500_IT_LATCH24_REG 0x37
62579266 RV	61
	62	/*
	63	* mask registers
	64	*/
	65
47c16975 MW	66	#define AB8500_IT_MASK1_REG 0x40
	67	#define AB8500_IT_MASK2_REG 0x41
	68	#define AB8500_IT_MASK3_REG 0x42
	69	#define AB8500_IT_MASK4_REG 0x43
	70	#define AB8500_IT_MASK5_REG 0x44
	71	#define AB8500_IT_MASK6_REG 0x45
	72	#define AB8500_IT_MASK7_REG 0x46
	73	#define AB8500_IT_MASK8_REG 0x47
	74	#define AB8500_IT_MASK9_REG 0x48
	75	#define AB8500_IT_MASK10_REG 0x49
	76	#define AB8500_IT_MASK11_REG 0x4A
	77	#define AB8500_IT_MASK12_REG 0x4B
	78	#define AB8500_IT_MASK13_REG 0x4C
	79	#define AB8500_IT_MASK14_REG 0x4D
	80	#define AB8500_IT_MASK15_REG 0x4E
	81	#define AB8500_IT_MASK16_REG 0x4F
	82	#define AB8500_IT_MASK17_REG 0x50
	83	#define AB8500_IT_MASK18_REG 0x51
	84	#define AB8500_IT_MASK19_REG 0x52
	85	#define AB8500_IT_MASK20_REG 0x53
	86	#define AB8500_IT_MASK21_REG 0x54
	87	#define AB8500_IT_MASK22_REG 0x55
	88	#define AB8500_IT_MASK23_REG 0x56
	89	#define AB8500_IT_MASK24_REG 0x57
	90
	91	#define AB8500_REV_REG 0x80
62579266 RV	92
	93	/*
	94	* Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
	95	* numbers are indexed into this array with (num / 8).
	96	*
	97	* This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
	98	* offset 0.
	99	*/
	100	static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
	101	0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21,
	102	};
	103
47c16975 MW	104	static int ab8500_get_chip_id(struct device *dev)
47c16975 MW	105	{
6bce7bf1 MW	106	struct ab8500 *ab8500;
	107
	108	if (!dev)
	109	return -EINVAL;
	110	ab8500 = dev_get_drvdata(dev->parent);
	111	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975 MW	112	}
	113
	114	static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
	115	u8 reg, u8 data)
62579266 RV	116	{
62579266 RV	117	int ret;
47c16975 MW	118	/*
	119	* Put the u8 bank and u8 register together into a an u16.
	120	* The bank on higher 8 bits and register in lower 8 bits.
	121	* */
	122	u16 addr = ((u16)bank) << 8 \| reg;
62579266 RV	123
	124	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
	125
47c16975 MW	126	ret = mutex_lock_interruptible(&ab8500->lock);
	127	if (ret)
	128	return ret;
	129
62579266 RV	130	ret = ab8500->write(ab8500, addr, data);
	131	if (ret < 0)
	132	dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
	133	addr, ret);
47c16975	134	mutex_unlock(&ab8500->lock);
62579266 RV	135
	136	return ret;
	137	}
	138
47c16975 MW	139	static int ab8500_set_register(struct device *dev, u8 bank,
47c16975 MW	140	u8 reg, u8 value)
62579266	141	{
47c16975	142	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266	143
47c16975	144	return set_register_interruptible(ab8500, bank, reg, value);
62579266	145	}
62579266	146
47c16975 MW	147	static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
47c16975 MW	148	u8 reg, u8 *value)
62579266 RV	149	{
62579266 RV	150	int ret;
47c16975 MW	151	/* put the u8 bank and u8 reg together into a an u16.
	152	* bank on higher 8 bits and reg in lower */
	153	u16 addr = ((u16)bank) << 8 \| reg;
	154
	155	ret = mutex_lock_interruptible(&ab8500->lock);
	156	if (ret)
	157	return ret;
62579266 RV	158
	159	ret = ab8500->read(ab8500, addr);
	160	if (ret < 0)
	161	dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
	162	addr, ret);
47c16975 MW	163	else
47c16975 MW	164	*value = ret;
62579266	165
47c16975	166	mutex_unlock(&ab8500->lock);
62579266 RV	167	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
	168
	169	return ret;
	170	}
	171
47c16975 MW	172	static int ab8500_get_register(struct device *dev, u8 bank,
47c16975 MW	173	u8 reg, u8 *value)
62579266	174	{
47c16975	175	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266	176
47c16975	177	return get_register_interruptible(ab8500, bank, reg, value);
62579266	178	}
47c16975 MW	179
	180	static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
	181	u8 reg, u8 bitmask, u8 bitvalues)
62579266 RV	182	{
62579266 RV	183	int ret;
47c16975 MW	184	u8 data;
	185	/* put the u8 bank and u8 reg together into a an u16.
	186	* bank on higher 8 bits and reg in lower */
	187	u16 addr = ((u16)bank) << 8 \| reg;
62579266	188
47c16975 MW	189	ret = mutex_lock_interruptible(&ab8500->lock);
	190	if (ret)
	191	return ret;
62579266	192
47c16975 MW	193	ret = ab8500->read(ab8500, addr);
	194	if (ret < 0) {
	195	dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
	196	addr, ret);
62579266	197	goto out;
47c16975	198	}
62579266	199
47c16975 MW	200	data = (u8)ret;
47c16975 MW	201	data = (~bitmask & data) \| (bitmask & bitvalues);
62579266	202
47c16975 MW	203	ret = ab8500->write(ab8500, addr, data);
	204	if (ret < 0)
	205	dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
	206	addr, ret);
62579266	207
47c16975	208	dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
62579266 RV	209	out:
	210	mutex_unlock(&ab8500->lock);
	211	return ret;
	212	}
47c16975 MW	213
	214	static int ab8500_mask_and_set_register(struct device *dev,
	215	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
	216	{
	217	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
	218
	219	return mask_and_set_register_interruptible(ab8500, bank, reg,
	220	bitmask, bitvalues);
	221
	222	}
	223
	224	static struct abx500_ops ab8500_ops = {
	225	.get_chip_id = ab8500_get_chip_id,
	226	.get_register = ab8500_get_register,
	227	.set_register = ab8500_set_register,
	228	.get_register_page = NULL,
	229	.set_register_page = NULL,
	230	.mask_and_set_register = ab8500_mask_and_set_register,
	231	.event_registers_startup_state_get = NULL,
	232	.startup_irq_enabled = NULL,
	233	};
62579266	234
9505a0a0	235	static void ab8500_irq_lock(struct irq_data *data)
62579266	236	{
9505a0a0	237	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266 RV	238
	239	mutex_lock(&ab8500->irq_lock);
	240	}
	241
9505a0a0	242	static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266	243	{
9505a0a0	244	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266 RV	245	int i;
	246
	247	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
	248	u8 old = ab8500->oldmask[i];
	249	u8 new = ab8500->mask[i];
	250	int reg;
	251
	252	if (new == old)
	253	continue;
	254
	255	ab8500->oldmask[i] = new;
	256
	257	reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
47c16975	258	set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 RV	259	}
	260
	261	mutex_unlock(&ab8500->irq_lock);
	262	}
	263
9505a0a0	264	static void ab8500_irq_mask(struct irq_data *data)
62579266	265	{
9505a0a0 MB	266	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9505a0a0 MB	267	int offset = data->irq - ab8500->irq_base;
62579266 RV	268	int index = offset / 8;
	269	int mask = 1 << (offset % 8);
	270
	271	ab8500->mask[index] \|= mask;
	272	}
	273
9505a0a0	274	static void ab8500_irq_unmask(struct irq_data *data)
62579266	275	{
9505a0a0 MB	276	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9505a0a0 MB	277	int offset = data->irq - ab8500->irq_base;
62579266 RV	278	int index = offset / 8;
	279	int mask = 1 << (offset % 8);
	280
	281	ab8500->mask[index] &= ~mask;
	282	}
	283
	284	static struct irq_chip ab8500_irq_chip = {
	285	.name = "ab8500",
9505a0a0 MB	286	.irq_bus_lock = ab8500_irq_lock,
	287	.irq_bus_sync_unlock = ab8500_irq_sync_unlock,
	288	.irq_mask = ab8500_irq_mask,
	289	.irq_unmask = ab8500_irq_unmask,
62579266 RV	290	};
	291
	292	static irqreturn_t ab8500_irq(int irq, void *dev)
	293	{
	294	struct ab8500 *ab8500 = dev;
	295	int i;
	296
	297	dev_vdbg(ab8500->dev, "interrupt\n");
	298
	299	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
	300	int regoffset = ab8500_irq_regoffset[i];
	301	int status;
47c16975	302	u8 value;
62579266	303
47c16975 MW	304	status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
	305	AB8500_IT_LATCH1_REG + regoffset, &value);
	306	if (status < 0 \|\| value == 0)
62579266 RV	307	continue;
	308
	309	do {
88aec4f7	310	int bit = __ffs(value);
62579266 RV	311	int line = i * 8 + bit;
	312
	313	handle_nested_irq(ab8500->irq_base + line);
47c16975 MW	314	value &= ~(1 << bit);
47c16975 MW	315	} while (value);
62579266 RV	316	}
	317
	318	return IRQ_HANDLED;
	319	}
	320
	321	static int ab8500_irq_init(struct ab8500 *ab8500)
	322	{
	323	int base = ab8500->irq_base;
	324	int irq;
	325
	326	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
	327	set_irq_chip_data(irq, ab8500);
	328	set_irq_chip_and_handler(irq, &ab8500_irq_chip,
	329	handle_simple_irq);
	330	set_irq_nested_thread(irq, 1);
	331	#ifdef CONFIG_ARM
	332	set_irq_flags(irq, IRQF_VALID);
	333	#else
	334	set_irq_noprobe(irq);
	335	#endif
	336	}
	337
	338	return 0;
	339	}
	340
	341	static void ab8500_irq_remove(struct ab8500 *ab8500)
	342	{
	343	int base = ab8500->irq_base;
	344	int irq;
	345
	346	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
	347	#ifdef CONFIG_ARM
	348	set_irq_flags(irq, 0);
	349	#endif
	350	set_irq_chip_and_handler(irq, NULL, NULL);
	351	set_irq_chip_data(irq, NULL);
	352	}
	353	}
	354
	355	static struct resource ab8500_gpadc_resources[] = {
	356	{
	357	.name = "HW_CONV_END",
	358	.start = AB8500_INT_GP_HW_ADC_CONV_END,
	359	.end = AB8500_INT_GP_HW_ADC_CONV_END,
	360	.flags = IORESOURCE_IRQ,
	361	},
	362	{
	363	.name = "SW_CONV_END",
	364	.start = AB8500_INT_GP_SW_ADC_CONV_END,
	365	.end = AB8500_INT_GP_SW_ADC_CONV_END,
	366	.flags = IORESOURCE_IRQ,
	367	},
	368	};
	369
	370	static struct resource ab8500_rtc_resources[] = {
	371	{
	372	.name = "60S",
	373	.start = AB8500_INT_RTC_60S,
	374	.end = AB8500_INT_RTC_60S,
	375	.flags = IORESOURCE_IRQ,
	376	},
	377	{
	378	.name = "ALARM",
	379	.start = AB8500_INT_RTC_ALARM,
380	.end = AB8500_INT_RTC_ALARM,
381	.flags = IORESOURCE_IRQ,
382	},
383	};
384
77686517 SI	385	static struct resource ab8500_poweronkey_db_resources[] = {
	386	{
	387	.name = "ONKEY_DBF",
	388	.start = AB8500_INT_PON_KEY1DB_F,
	389	.end = AB8500_INT_PON_KEY1DB_F,
	390	.flags = IORESOURCE_IRQ,
	391	},
	392	{
	393	.name = "ONKEY_DBR",
	394	.start = AB8500_INT_PON_KEY1DB_R,
	395	.end = AB8500_INT_PON_KEY1DB_R,
	396	.flags = IORESOURCE_IRQ,
	397	},
	398	};
	399
e098aded MW	400	static struct resource ab8500_bm_resources[] = {
	401	{
	402	.name = "MAIN_EXT_CH_NOT_OK",
	403	.start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
	404	.end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
	405	.flags = IORESOURCE_IRQ,
	406	},
	407	{
	408	.name = "BATT_OVV",
	409	.start = AB8500_INT_BATT_OVV,
	410	.end = AB8500_INT_BATT_OVV,
	411	.flags = IORESOURCE_IRQ,
	412	},
	413	{
	414	.name = "MAIN_CH_UNPLUG_DET",
	415	.start = AB8500_INT_MAIN_CH_UNPLUG_DET,
	416	.end = AB8500_INT_MAIN_CH_UNPLUG_DET,
	417	.flags = IORESOURCE_IRQ,
	418	},
	419	{
	420	.name = "MAIN_CHARGE_PLUG_DET",
	421	.start = AB8500_INT_MAIN_CH_PLUG_DET,
	422	.end = AB8500_INT_MAIN_CH_PLUG_DET,
	423	.flags = IORESOURCE_IRQ,
	424	},
	425	{
	426	.name = "VBUS_DET_F",
	427	.start = AB8500_INT_VBUS_DET_F,
	428	.end = AB8500_INT_VBUS_DET_F,
	429	.flags = IORESOURCE_IRQ,
	430	},
	431	{
	432	.name = "VBUS_DET_R",
	433	.start = AB8500_INT_VBUS_DET_R,
	434	.end = AB8500_INT_VBUS_DET_R,
	435	.flags = IORESOURCE_IRQ,
	436	},
	437	{
	438	.name = "BAT_CTRL_INDB",
	439	.start = AB8500_INT_BAT_CTRL_INDB,
	440	.end = AB8500_INT_BAT_CTRL_INDB,
	441	.flags = IORESOURCE_IRQ,
	442	},
	443	{
	444	.name = "CH_WD_EXP",
	445	.start = AB8500_INT_CH_WD_EXP,
	446	.end = AB8500_INT_CH_WD_EXP,
	447	.flags = IORESOURCE_IRQ,
	448	},
	449	{
	450	.name = "VBUS_OVV",
	451	.start = AB8500_INT_VBUS_OVV,
	452	.end = AB8500_INT_VBUS_OVV,
	453	.flags = IORESOURCE_IRQ,
	454	},
	455	{
	456	.name = "NCONV_ACCU",
	457	.start = AB8500_INT_CCN_CONV_ACC,
	458	.end = AB8500_INT_CCN_CONV_ACC,
	459	.flags = IORESOURCE_IRQ,
	460	},
	461	{
	462	.name = "LOW_BAT_F",
	463	.start = AB8500_INT_LOW_BAT_F,
464	.end = AB8500_INT_LOW_BAT_F,
465	.flags = IORESOURCE_IRQ,
466	},
467	{
468	.name = "LOW_BAT_R",
469	.start = AB8500_INT_LOW_BAT_R,
470	.end = AB8500_INT_LOW_BAT_R,
471	.flags = IORESOURCE_IRQ,
472	},
473	{
474	.name = "BTEMP_LOW",
475	.start = AB8500_INT_BTEMP_LOW,
476	.end = AB8500_INT_BTEMP_LOW,
477	.flags = IORESOURCE_IRQ,
478	},
479	{
480	.name = "BTEMP_HIGH",
481	.start = AB8500_INT_BTEMP_HIGH,
482	.end = AB8500_INT_BTEMP_HIGH,
483	.flags = IORESOURCE_IRQ,
484	},
485	{
486	.name = "USB_CHARGER_NOT_OKR",
487	.start = AB8500_INT_USB_CHARGER_NOT_OK,
488	.end = AB8500_INT_USB_CHARGER_NOT_OK,
489	.flags = IORESOURCE_IRQ,
490	},
491	{
492	.name = "USB_CHARGE_DET_DONE",
493	.start = AB8500_INT_USB_CHG_DET_DONE,
494	.end = AB8500_INT_USB_CHG_DET_DONE,
495	.flags = IORESOURCE_IRQ,
496	},
497	{
498	.name = "USB_CH_TH_PROT_R",
499	.start = AB8500_INT_USB_CH_TH_PROT_R,
500	.end = AB8500_INT_USB_CH_TH_PROT_R,
501	.flags = IORESOURCE_IRQ,
502	},
503	{
504	.name = "MAIN_CH_TH_PROT_R",
505	.start = AB8500_INT_MAIN_CH_TH_PROT_R,
506	.end = AB8500_INT_MAIN_CH_TH_PROT_R,
507	.flags = IORESOURCE_IRQ,
508	},
509	{
510	.name = "USB_CHARGER_NOT_OKF",
511	.start = AB8500_INT_USB_CHARGER_NOT_OKF,
512	.end = AB8500_INT_USB_CHARGER_NOT_OKF,
513	.flags = IORESOURCE_IRQ,
514	},
515	};
516
517	static struct resource ab8500_debug_resources[] = {
518	{
519	.name = "IRQ_FIRST",
520	.start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
521	.end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
522	.flags = IORESOURCE_IRQ,
523	},
524	{
525	.name = "IRQ_LAST",
526	.start = AB8500_INT_USB_CHARGER_NOT_OKF,
527	.end = AB8500_INT_USB_CHARGER_NOT_OKF,
528	.flags = IORESOURCE_IRQ,
529	},
530	};
531
532	static struct resource ab8500_usb_resources[] = {
533	{
534	.name = "ID_WAKEUP_R",
535	.start = AB8500_INT_ID_WAKEUP_R,
536	.end = AB8500_INT_ID_WAKEUP_R,
537	.flags = IORESOURCE_IRQ,
538	},
539	{
540	.name = "ID_WAKEUP_F",
541	.start = AB8500_INT_ID_WAKEUP_F,
542	.end = AB8500_INT_ID_WAKEUP_F,
543	.flags = IORESOURCE_IRQ,
544	},
545	{
546	.name = "VBUS_DET_F",
547	.start = AB8500_INT_VBUS_DET_F,
548	.end = AB8500_INT_VBUS_DET_F,
549	.flags = IORESOURCE_IRQ,
550	},
551	{
552	.name = "VBUS_DET_R",
553	.start = AB8500_INT_VBUS_DET_R,
554	.end = AB8500_INT_VBUS_DET_R,
555	.flags = IORESOURCE_IRQ,
556	},
557	};
558
559	static struct resource ab8500_temp_resources[] = {
560	{
561	.name = "AB8500_TEMP_WARM",
562	.start = AB8500_INT_TEMP_WARM,
563	.end = AB8500_INT_TEMP_WARM,
564	.flags = IORESOURCE_IRQ,
565	},
566	};
567
62579266	568	static struct mfd_cell ab8500_devs[] = {
5814fc35 MW	569	#ifdef CONFIG_DEBUG_FS
	570	{
	571	.name = "ab8500-debug",
e098aded MW	572	.num_resources = ARRAY_SIZE(ab8500_debug_resources),
e098aded MW	573	.resources = ab8500_debug_resources,
5814fc35 MW	574	},
5814fc35 MW	575	#endif
e098aded MW	576	{
	577	.name = "ab8500-sysctrl",
	578	},
	579	{
	580	.name = "ab8500-regulator",
	581	},
62579266 RV	582	{
	583	.name = "ab8500-gpadc",
	584	.num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
	585	.resources = ab8500_gpadc_resources,
	586	},
	587	{
	588	.name = "ab8500-rtc",
	589	.num_resources = ARRAY_SIZE(ab8500_rtc_resources),
	590	.resources = ab8500_rtc_resources,
	591	},
e098aded MW	592	{
	593	.name = "ab8500-bm",
	594	.num_resources = ARRAY_SIZE(ab8500_bm_resources),
	595	.resources = ab8500_bm_resources,
	596	},
	597	{ .name = "ab8500-codec", },
	598	{
	599	.name = "ab8500-usb",
	600	.num_resources = ARRAY_SIZE(ab8500_usb_resources),
	601	.resources = ab8500_usb_resources,
	602	},
	603	{
	604	.name = "ab8500-poweron-key",
	605	.num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
	606	.resources = ab8500_poweronkey_db_resources,
	607	},
f0f05b1c AM	608	{
	609	.name = "ab8500-pwm",
	610	.id = 1,
	611	},
	612	{
	613	.name = "ab8500-pwm",
	614	.id = 2,
	615	},
	616	{
	617	.name = "ab8500-pwm",
	618	.id = 3,
	619	},
e098aded	620	{ .name = "ab8500-leds", },
77686517	621	{
e098aded MW	622	.name = "ab8500-denc",
	623	},
	624	{
	625	.name = "ab8500-temp",
	626	.num_resources = ARRAY_SIZE(ab8500_temp_resources),
	627	.resources = ab8500_temp_resources,
77686517	628	},
62579266 RV	629	};
62579266 RV	630
cca69b67 MW	631	static ssize_t show_chip_id(struct device *dev,
	632	struct device_attribute attr, char buf)
	633	{
	634	struct ab8500 *ab8500;
	635
	636	ab8500 = dev_get_drvdata(dev);
	637	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
	638	}
	639
	640	static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
	641
	642	static struct attribute *ab8500_sysfs_entries[] = {
	643	&dev_attr_chip_id.attr,
	644	NULL,
	645	};
	646
	647	static struct attribute_group ab8500_attr_group = {
	648	.attrs = ab8500_sysfs_entries,
	649	};
	650
62579266 RV	651	int __devinit ab8500_init(struct ab8500 *ab8500)
	652	{
	653	struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
	654	int ret;
	655	int i;
47c16975	656	u8 value;
62579266 RV	657
	658	if (plat)
	659	ab8500->irq_base = plat->irq_base;
	660
	661	mutex_init(&ab8500->lock);
	662	mutex_init(&ab8500->irq_lock);
	663
47c16975 MW	664	ret = get_register_interruptible(ab8500, AB8500_MISC,
47c16975 MW	665	AB8500_REV_REG, &value);
62579266 RV	666	if (ret < 0)
	667	return ret;
	668
	669	/*
	670	* 0x0 - Early Drop
	671	* 0x10 - Cut 1.0
	672	* 0x11 - Cut 1.1
	673	*/
47c16975 MW	674	if (value == 0x0 \|\| value == 0x10 \|\| value == 0x11) {
	675	ab8500->revision = value;
	676	dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
62579266	677	} else {
47c16975	678	dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
62579266 RV	679	return -EINVAL;
62579266 RV	680	}
47c16975	681	ab8500->chip_id = value;
62579266 RV	682
	683	if (plat && plat->init)
	684	plat->init(ab8500);
	685
	686	/* Clear and mask all interrupts */
	687	for (i = 0; i < 10; i++) {
47c16975 MW	688	get_register_interruptible(ab8500, AB8500_INTERRUPT,
	689	AB8500_IT_LATCH1_REG + i, &value);
	690	set_register_interruptible(ab8500, AB8500_INTERRUPT,
	691	AB8500_IT_MASK1_REG + i, 0xff);
62579266 RV	692	}
	693
	694	for (i = 18; i < 24; i++) {
47c16975 MW	695	get_register_interruptible(ab8500, AB8500_INTERRUPT,
	696	AB8500_IT_LATCH1_REG + i, &value);
	697	set_register_interruptible(ab8500, AB8500_INTERRUPT,
	698	AB8500_IT_MASK1_REG + i, 0xff);
62579266 RV	699	}
62579266 RV	700
47c16975 MW	701	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
	702	if (ret)
	703	return ret;
	704
62579266 RV	705	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
	706	ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
	707
	708	if (ab8500->irq_base) {
	709	ret = ab8500_irq_init(ab8500);
	710	if (ret)
	711	return ret;
	712
	713	ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
4f079985 MW	714	IRQF_ONESHOT \| IRQF_NO_SUSPEND,
4f079985 MW	715	"ab8500", ab8500);
62579266 RV	716	if (ret)
	717	goto out_removeirq;
	718	}
	719
549931f9	720	ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
62579266 RV	721	ARRAY_SIZE(ab8500_devs), NULL,
	722	ab8500->irq_base);
	723	if (ret)
	724	goto out_freeirq;
	725
cca69b67 MW	726	ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
	727	if (ret)
	728	dev_err(ab8500->dev, "error creating sysfs entries\n");
	729
62579266 RV	730	return ret;
	731
	732	out_freeirq:
	733	if (ab8500->irq_base) {
	734	free_irq(ab8500->irq, ab8500);
	735	out_removeirq:
	736	ab8500_irq_remove(ab8500);
	737	}
	738	return ret;
	739	}
	740
	741	int __devexit ab8500_exit(struct ab8500 *ab8500)
	742	{
cca69b67	743	sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
62579266 RV	744	mfd_remove_devices(ab8500->dev);
	745	if (ab8500->irq_base) {
	746	free_irq(ab8500->irq, ab8500);
	747	ab8500_irq_remove(ab8500);
	748	}
	749
	750	return 0;
	751	}
	752
	753	MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent");
	754	MODULE_DESCRIPTION("AB8500 MFD core");
	755	MODULE_LICENSE("GPL v2");