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mfd: ab8500-core: Add abx500-clk as an mfd child device
[mirror_ubuntu-jammy-kernel.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
00441b5e 22#include <linux/mfd/abx500/ab8500-bm.h>
d28f1db8 23#include <linux/mfd/dbx500-prcmu.h>
549931f9 24#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 25#include <linux/of.h>
26#include <linux/of_device.h>
62579266
RV		 27
28/*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
47c16975
MW		 32#define AB8500_IT_SOURCE1_REG 0x00
33#define AB8500_IT_SOURCE2_REG 0x01
34#define AB8500_IT_SOURCE3_REG 0x02
35#define AB8500_IT_SOURCE4_REG 0x03
36#define AB8500_IT_SOURCE5_REG 0x04
37#define AB8500_IT_SOURCE6_REG 0x05
38#define AB8500_IT_SOURCE7_REG 0x06
39#define AB8500_IT_SOURCE8_REG 0x07
d6255529 40#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 41#define AB8500_IT_SOURCE19_REG 0x12
42#define AB8500_IT_SOURCE20_REG 0x13
43#define AB8500_IT_SOURCE21_REG 0x14
44#define AB8500_IT_SOURCE22_REG 0x15
45#define AB8500_IT_SOURCE23_REG 0x16
46#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 47
48/*
49 * latch registers
50 */
47c16975
MW		 51#define AB8500_IT_LATCH1_REG 0x20
52#define AB8500_IT_LATCH2_REG 0x21
53#define AB8500_IT_LATCH3_REG 0x22
54#define AB8500_IT_LATCH4_REG 0x23
55#define AB8500_IT_LATCH5_REG 0x24
56#define AB8500_IT_LATCH6_REG 0x25
57#define AB8500_IT_LATCH7_REG 0x26
58#define AB8500_IT_LATCH8_REG 0x27
59#define AB8500_IT_LATCH9_REG 0x28
60#define AB8500_IT_LATCH10_REG 0x29
92d50a41 61#define AB8500_IT_LATCH12_REG 0x2B
d6255529 62#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 63#define AB8500_IT_LATCH19_REG 0x32
64#define AB8500_IT_LATCH20_REG 0x33
65#define AB8500_IT_LATCH21_REG 0x34
66#define AB8500_IT_LATCH22_REG 0x35
67#define AB8500_IT_LATCH23_REG 0x36
68#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 69
70/*
71 * mask registers
72 */
73
47c16975
MW		 74#define AB8500_IT_MASK1_REG 0x40
75#define AB8500_IT_MASK2_REG 0x41
76#define AB8500_IT_MASK3_REG 0x42
77#define AB8500_IT_MASK4_REG 0x43
78#define AB8500_IT_MASK5_REG 0x44
79#define AB8500_IT_MASK6_REG 0x45
80#define AB8500_IT_MASK7_REG 0x46
81#define AB8500_IT_MASK8_REG 0x47
82#define AB8500_IT_MASK9_REG 0x48
83#define AB8500_IT_MASK10_REG 0x49
84#define AB8500_IT_MASK11_REG 0x4A
85#define AB8500_IT_MASK12_REG 0x4B
86#define AB8500_IT_MASK13_REG 0x4C
87#define AB8500_IT_MASK14_REG 0x4D
88#define AB8500_IT_MASK15_REG 0x4E
89#define AB8500_IT_MASK16_REG 0x4F
90#define AB8500_IT_MASK17_REG 0x50
91#define AB8500_IT_MASK18_REG 0x51
92#define AB8500_IT_MASK19_REG 0x52
93#define AB8500_IT_MASK20_REG 0x53
94#define AB8500_IT_MASK21_REG 0x54
95#define AB8500_IT_MASK22_REG 0x55
96#define AB8500_IT_MASK23_REG 0x56
97#define AB8500_IT_MASK24_REG 0x57
a29264b6 98#define AB8500_IT_MASK25_REG 0x58
47c16975 99
7ccfe9b1
MJ		 100/*
101 * latch hierarchy registers
102 */
103#define AB8500_IT_LATCHHIER1_REG 0x60
104#define AB8500_IT_LATCHHIER2_REG 0x61
105#define AB8500_IT_LATCHHIER3_REG 0x62
3e1a498f 106#define AB8540_IT_LATCHHIER4_REG 0x63
7ccfe9b1
MJ		 107
108#define AB8500_IT_LATCHHIER_NUM 3
3e1a498f 109#define AB8540_IT_LATCHHIER_NUM 4
7ccfe9b1 110
47c16975 111#define AB8500_REV_REG 0x80
0f620837 112#define AB8500_IC_NAME_REG 0x82
e5c238c3 113#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 114
b4a31037
AL		 115#define AB8500_TURN_ON_STATUS 0x00
116
f04a9d8a
RK		 117#define AB8500_CH_USBCH_STAT1_REG 0x02
118#define VBUS_DET_DBNC100 0x02
119#define VBUS_DET_DBNC1 0x01
120
121static DEFINE_SPINLOCK(on_stat_lock);
122static u8 turn_on_stat_mask = 0xFF;
123static u8 turn_on_stat_set;
6ef9418c
RA		 124static bool no_bm; /* No battery management */
125module_param(no_bm, bool, S_IRUGO);
126
d6255529
LW		 127#define AB9540_MODEM_CTRL2_REG 0x23
128#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
129
62579266
RV		 130/*
131 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 132 * numbers are indexed into this array with (num / 8). The interupts are
133 * defined in linux/mfd/ab8500.h
62579266
RV		 134 *
135 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
136 * offset 0.
137 */
2ced445e 138/* AB8500 support */
62579266 139static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 140 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 141};
142
a29264b6 143/* AB9540 / AB8505 support */
d6255529 144static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
a29264b6 145 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
d6255529
LW		 146};
147
3e1a498f
LJ		 148/* AB8540 support */
149static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
150 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23,
151 25, 26, 27, 28, 29, 30, 31,
152};
153
0f620837
LW		 154static const char ab8500_version_str[][7] = {
155 [AB8500_VERSION_AB8500] = "AB8500",
156 [AB8500_VERSION_AB8505] = "AB8505",
157 [AB8500_VERSION_AB9540] = "AB9540",
158 [AB8500_VERSION_AB8540] = "AB8540",
159};
160
822672a7 161static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 162{
163 int ret;
164
165 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
166 if (ret < 0)
167 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
168 return ret;
169}
170
822672a7 171static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 172 u8 data)
173{
174 int ret;
175
176 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
177 &mask, 1);
178 if (ret < 0)
179 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
180 return ret;
181}
182
822672a7 183static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 184{
185 int ret;
186 u8 data;
187
188 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
189 if (ret < 0) {
190 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
191 return ret;
192 }
193 return (int)data;
194}
195
47c16975
MW		 196static int ab8500_get_chip_id(struct device *dev)
197{
6bce7bf1
MW		 198 struct ab8500 *ab8500;
199
200 if (!dev)
201 return -EINVAL;
202 ab8500 = dev_get_drvdata(dev->parent);
203 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 204}
205
206static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
207 u8 reg, u8 data)
62579266
RV		 208{
209 int ret;
47c16975
MW		 210 /*
211 * Put the u8 bank and u8 register together into a an u16.
212 * The bank on higher 8 bits and register in lower 8 bits.
213 * */
214 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 215
216 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
217
392cbd1e 218 mutex_lock(&ab8500->lock);
47c16975 219
62579266
RV		 220 ret = ab8500->write(ab8500, addr, data);
221 if (ret < 0)
222 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
223 addr, ret);
47c16975 224 mutex_unlock(&ab8500->lock);
62579266
RV		 225
226 return ret;
227}
228
47c16975
MW		 229static int ab8500_set_register(struct device *dev, u8 bank,
230 u8 reg, u8 value)
62579266 231{
112a80d2 232 int ret;
47c16975 233 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 234
112a80d2
JA		 235 atomic_inc(&ab8500->transfer_ongoing);
236 ret = set_register_interruptible(ab8500, bank, reg, value);
237 atomic_dec(&ab8500->transfer_ongoing);
238 return ret;
62579266 239}
62579266 240
47c16975
MW		 241static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
242 u8 reg, u8 *value)
62579266
RV		 243{
244 int ret;
47c16975
MW		 245 /* put the u8 bank and u8 reg together into a an u16.
246 * bank on higher 8 bits and reg in lower */
247 u16 addr = ((u16)bank) << 8 | reg;
248
392cbd1e 249 mutex_lock(&ab8500->lock);
62579266
RV		 250
251 ret = ab8500->read(ab8500, addr);
252 if (ret < 0)
253 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
254 addr, ret);
47c16975
MW		 255 else
256 *value = ret;
62579266 257
47c16975 258 mutex_unlock(&ab8500->lock);
62579266
RV		 259 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
260
261 return ret;
262}
263
47c16975
MW		 264static int ab8500_get_register(struct device *dev, u8 bank,
265 u8 reg, u8 *value)
62579266 266{
112a80d2 267 int ret;
47c16975 268 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 269
112a80d2
JA		 270 atomic_inc(&ab8500->transfer_ongoing);
271 ret = get_register_interruptible(ab8500, bank, reg, value);
272 atomic_dec(&ab8500->transfer_ongoing);
273 return ret;
62579266 274}
47c16975
MW		 275
276static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
277 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 278{
279 int ret;
47c16975
MW		 280 /* put the u8 bank and u8 reg together into a an u16.
281 * bank on higher 8 bits and reg in lower */
282 u16 addr = ((u16)bank) << 8 | reg;
62579266 283
392cbd1e 284 mutex_lock(&ab8500->lock);
62579266 285
bc628fd1
MN		 286 if (ab8500->write_masked == NULL) {
287 u8 data;
62579266 288
bc628fd1
MN		 289 ret = ab8500->read(ab8500, addr);
290 if (ret < 0) {
291 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
292 addr, ret);
293 goto out;
294 }
62579266 295
bc628fd1
MN		 296 data = (u8)ret;
297 data = (~bitmask & data) | (bitmask & bitvalues);
298
299 ret = ab8500->write(ab8500, addr, data);
300 if (ret < 0)
301 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
302 addr, ret);
62579266 303
bc628fd1
MN		 304 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
305 data);
306 goto out;
307 }
308 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
309 if (ret < 0)
310 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
311 ret);
62579266
RV		 312out:
313 mutex_unlock(&ab8500->lock);
314 return ret;
315}
47c16975
MW		 316
317static int ab8500_mask_and_set_register(struct device *dev,
318 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
319{
112a80d2 320 int ret;
47c16975
MW		 321 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
322
112a80d2
JA		 323 atomic_inc(&ab8500->transfer_ongoing);
324 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
325 bitmask, bitvalues);
326 atomic_dec(&ab8500->transfer_ongoing);
327 return ret;
47c16975
MW		 328}
329
330static struct abx500_ops ab8500_ops = {
331 .get_chip_id = ab8500_get_chip_id,
332 .get_register = ab8500_get_register,
333 .set_register = ab8500_set_register,
334 .get_register_page = NULL,
335 .set_register_page = NULL,
336 .mask_and_set_register = ab8500_mask_and_set_register,
337 .event_registers_startup_state_get = NULL,
338 .startup_irq_enabled = NULL,
1d843a6c 339 .dump_all_banks = ab8500_dump_all_banks,
47c16975 340};
62579266 341
9505a0a0 342static void ab8500_irq_lock(struct irq_data *data)
62579266 343{
9505a0a0 344 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 345
346 mutex_lock(&ab8500->irq_lock);
112a80d2 347 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 348}
349
9505a0a0 350static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 351{
9505a0a0 352 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 353 int i;
354
2ced445e 355 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 356 u8 old = ab8500->oldmask[i];
357 u8 new = ab8500->mask[i];
358 int reg;
359
360 if (new == old)
361 continue;
362
0f620837
LW		 363 /*
364 * Interrupt register 12 doesn't exist prior to AB8500 version
365 * 2.0
366 */
367 if (ab8500->irq_reg_offset[i] == 11 &&
368 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 369 continue;
370
3e1a498f
LJ		 371 if (ab8500->irq_reg_offset[i] < 0)
372 continue;
373
62579266
RV		 374 ab8500->oldmask[i] = new;
375
2ced445e 376 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 377 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 378 }
112a80d2 379 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 380 mutex_unlock(&ab8500->irq_lock);
381}
382
9505a0a0 383static void ab8500_irq_mask(struct irq_data *data)
62579266 384{
9505a0a0 385 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 386 int offset = data->hwirq;
62579266
RV		 387 int index = offset / 8;
388 int mask = 1 << (offset % 8);
389
390 ab8500->mask[index] |= mask;
9c677b9b
LJ		 391
392 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
393 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
394 ab8500->mask[index + 2] |= mask;
395 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
396 ab8500->mask[index + 1] |= mask;
397 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 398 /* Here the falling IRQ is one bit lower */
399 ab8500->mask[index] |= (mask << 1);
62579266
RV		 400}
401
9505a0a0 402static void ab8500_irq_unmask(struct irq_data *data)
62579266 403{
9505a0a0 404 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 405 unsigned int type = irqd_get_trigger_type(data);
06e589ef 406 int offset = data->hwirq;
62579266
RV		 407 int index = offset / 8;
408 int mask = 1 << (offset % 8);
409
9c677b9b
LJ		 410 if (type & IRQ_TYPE_EDGE_RISING)
411 ab8500->mask[index] &= ~mask;
412
413 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
414 if (type & IRQ_TYPE_EDGE_FALLING) {
415 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
416 ab8500->mask[index + 2] &= ~mask;
417 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
418 ab8500->mask[index + 1] &= ~mask;
419 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 420 /* Here the falling IRQ is one bit lower */
421 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ		 422 else
423 ab8500->mask[index] &= ~mask;
e2ddf46a 424 } else {
9c677b9b
LJ		 425 /* Satisfies the case where type is not set. */
426 ab8500->mask[index] &= ~mask;
e2ddf46a 427 }
62579266
RV		 428}
429
40f6e5a2
LJ		 430static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
431{
432 return 0;
62579266
RV		 433}
434
435static struct irq_chip ab8500_irq_chip = {
436 .name = "ab8500",
9505a0a0
MB		 437 .irq_bus_lock = ab8500_irq_lock,
438 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
439 .irq_mask = ab8500_irq_mask,
e6f9306e 440 .irq_disable = ab8500_irq_mask,
9505a0a0 441 .irq_unmask = ab8500_irq_unmask,
40f6e5a2 442 .irq_set_type = ab8500_irq_set_type,
62579266
RV		 443};
444
3e1a498f
LJ		 445static void update_latch_offset(u8 *offset, int i)
446{
447 /* Fix inconsistent ITFromLatch25 bit mapping... */
448 if (unlikely(*offset == 17))
449 *offset = 24;
450 /* Fix inconsistent ab8540 bit mapping... */
451 if (unlikely(*offset == 16))
452 *offset = 25;
453 if ((i==3) && (*offset >= 24))
454 *offset += 2;
455}
456
7ccfe9b1
MJ		 457static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
458 int latch_offset, u8 latch_val)
459{
460 int int_bit = __ffs(latch_val);
461 int line, i;
462
463 do {
464 int_bit = __ffs(latch_val);
465
466 for (i = 0; i < ab8500->mask_size; i++)
467 if (ab8500->irq_reg_offset[i] == latch_offset)
468 break;
469
470 if (i >= ab8500->mask_size) {
471 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
472 latch_offset);
473 return -ENXIO;
474 }
475
476 line = (i << 3) + int_bit;
477 latch_val &= ~(1 << int_bit);
478
e2ddf46a
LW		 479 /*
480 * This handles the falling edge hwirqs from the GPIO
481 * lines. Route them back to the line registered for the
482 * rising IRQ, as this is merely a flag for the same IRQ
483 * in linux terms.
484 */
485 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
486 line -= 16;
487 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
488 line -= 8;
489 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
490 line += 1;
491
7ccfe9b1
MJ		 492 handle_nested_irq(ab8500->irq_base + line);
493 } while (latch_val);
494
495 return 0;
496}
497
498static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
499 int hier_offset, u8 hier_val)
500{
501 int latch_bit, status;
502 u8 latch_offset, latch_val;
503
504 do {
505 latch_bit = __ffs(hier_val);
506 latch_offset = (hier_offset << 3) + latch_bit;
507
3e1a498f 508 update_latch_offset(&latch_offset, hier_offset);
7ccfe9b1
MJ		 509
510 status = get_register_interruptible(ab8500,
511 AB8500_INTERRUPT,
512 AB8500_IT_LATCH1_REG + latch_offset,
513 &latch_val);
514 if (status < 0 || latch_val == 0)
515 goto discard;
516
517 status = ab8500_handle_hierarchical_line(ab8500,
518 latch_offset, latch_val);
519 if (status < 0)
520 return status;
521discard:
522 hier_val &= ~(1 << latch_bit);
523 } while (hier_val);
524
525 return 0;
526}
527
528static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
529{
530 struct ab8500 *ab8500 = dev;
531 u8 i;
532
533 dev_vdbg(ab8500->dev, "interrupt\n");
534
535 /* Hierarchical interrupt version */
3e1a498f 536 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
7ccfe9b1
MJ		 537 int status;
538 u8 hier_val;
539
540 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
541 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
542 if (status < 0 || hier_val == 0)
543 continue;
544
545 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
546 if (status < 0)
547 break;
548 }
549 return IRQ_HANDLED;
550}
551
80633f05
LJ		 552/**
553 * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
554 *
555 * @ab8500: ab8500_irq controller to operate on.
556 * @irq: index of the interrupt requested in the chip IRQs
557 *
558 * Useful for drivers to request their own IRQs.
559 */
560static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq)
561{
562 if (!ab8500)
563 return -EINVAL;
564
565 return irq_create_mapping(ab8500->domain, irq);
566}
567
62579266
RV		 568static irqreturn_t ab8500_irq(int irq, void *dev)
569{
570 struct ab8500 *ab8500 = dev;
571 int i;
572
573 dev_vdbg(ab8500->dev, "interrupt\n");
574
112a80d2
JA		 575 atomic_inc(&ab8500->transfer_ongoing);
576
2ced445e
LW		 577 for (i = 0; i < ab8500->mask_size; i++) {
578 int regoffset = ab8500->irq_reg_offset[i];
62579266 579 int status;
47c16975 580 u8 value;
62579266 581
0f620837
LW		 582 /*
583 * Interrupt register 12 doesn't exist prior to AB8500 version
584 * 2.0
585 */
586 if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 587 continue;
588
3e1a498f
LJ		 589 if (regoffset < 0)
590 continue;
591
47c16975
MW		 592 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
593 AB8500_IT_LATCH1_REG + regoffset, &value);
594 if (status < 0 || value == 0)
62579266
RV		 595 continue;
596
597 do {
88aec4f7 598 int bit = __ffs(value);
62579266 599 int line = i * 8 + bit;
0a37fc56 600 int virq = ab8500_irq_get_virq(ab8500, line);
62579266 601
0a37fc56 602 handle_nested_irq(virq);
8f0eb43b 603 ab8500_debug_register_interrupt(line);
47c16975 604 value &= ~(1 << bit);
112a80d2 605
47c16975 606 } while (value);
62579266 607 }
112a80d2 608 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 609 return IRQ_HANDLED;
610}
611
06e589ef
LJ		 612static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
613 irq_hw_number_t hwirq)
614{
615 struct ab8500 *ab8500 = d->host_data;
616
617 if (!ab8500)
618 return -EINVAL;
619
620 irq_set_chip_data(virq, ab8500);
621 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
622 handle_simple_irq);
623 irq_set_nested_thread(virq, 1);
62579266 624#ifdef CONFIG_ARM
06e589ef 625 set_irq_flags(virq, IRQF_VALID);
62579266 626#else
06e589ef 627 irq_set_noprobe(virq);
62579266 628#endif
62579266
RV		 629
630 return 0;
631}
632
06e589ef
LJ		 633static struct irq_domain_ops ab8500_irq_ops = {
634 .map = ab8500_irq_map,
635 .xlate = irq_domain_xlate_twocell,
636};
637
638static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 639{
2ced445e
LW		 640 int num_irqs;
641
3e1a498f
LJ		 642 if (is_ab8540(ab8500))
643 num_irqs = AB8540_NR_IRQS;
644 else if (is_ab9540(ab8500))
d6255529 645 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 646 else if (is_ab8505(ab8500))
647 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 648 else
649 num_irqs = AB8500_NR_IRQS;
62579266 650
f1d11f39
LW		 651 /* If ->irq_base is zero this will give a linear mapping */
652 ab8500->domain = irq_domain_add_simple(NULL,
653 num_irqs, ab8500->irq_base,
654 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 655
656 if (!ab8500->domain) {
657 dev_err(ab8500->dev, "Failed to create irqdomain\n");
658 return -ENOSYS;
659 }
660
661 return 0;
62579266
RV		 662}
663
112a80d2
JA		 664int ab8500_suspend(struct ab8500 *ab8500)
665{
666 if (atomic_read(&ab8500->transfer_ongoing))
667 return -EINVAL;
668 else
669 return 0;
670}
671
a9e9ce4c 672static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 673 {
674 .name = "HW_CONV_END",
675 .start = AB8500_INT_GP_HW_ADC_CONV_END,
676 .end = AB8500_INT_GP_HW_ADC_CONV_END,
677 .flags = IORESOURCE_IRQ,
678 },
679 {
680 .name = "SW_CONV_END",
681 .start = AB8500_INT_GP_SW_ADC_CONV_END,
682 .end = AB8500_INT_GP_SW_ADC_CONV_END,
683 .flags = IORESOURCE_IRQ,
684 },
685};
686
4b106fb9 687static struct resource ab8505_gpadc_resources[] = {
c0eda9ae
LJ		 688 {
689 .name = "SW_CONV_END",
690 .start = AB8500_INT_GP_SW_ADC_CONV_END,
691 .end = AB8500_INT_GP_SW_ADC_CONV_END,
692 .flags = IORESOURCE_IRQ,
693 },
694};
695
a9e9ce4c 696static struct resource ab8500_rtc_resources[] = {
62579266
RV		 697 {
698 .name = "60S",
699 .start = AB8500_INT_RTC_60S,
700 .end = AB8500_INT_RTC_60S,
701 .flags = IORESOURCE_IRQ,
702 },
703 {
704 .name = "ALARM",
705 .start = AB8500_INT_RTC_ALARM,
706 .end = AB8500_INT_RTC_ALARM,
707 .flags = IORESOURCE_IRQ,
708 },
709};
710
a9e9ce4c 711static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 712 {
713 .name = "ONKEY_DBF",
714 .start = AB8500_INT_PON_KEY1DB_F,
715 .end = AB8500_INT_PON_KEY1DB_F,
716 .flags = IORESOURCE_IRQ,
717 },
718 {
719 .name = "ONKEY_DBR",
720 .start = AB8500_INT_PON_KEY1DB_R,
721 .end = AB8500_INT_PON_KEY1DB_R,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
a9e9ce4c 726static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 727 {
6af75ecd
LW		 728 .name = "ACC_DETECT_1DB_F",
729 .start = AB8500_INT_ACC_DETECT_1DB_F,
730 .end = AB8500_INT_ACC_DETECT_1DB_F,
731 .flags = IORESOURCE_IRQ,
e098aded
MW		 732 },
733 {
6af75ecd
LW		 734 .name = "ACC_DETECT_1DB_R",
735 .start = AB8500_INT_ACC_DETECT_1DB_R,
736 .end = AB8500_INT_ACC_DETECT_1DB_R,
737 .flags = IORESOURCE_IRQ,
738 },
739 {
740 .name = "ACC_DETECT_21DB_F",
741 .start = AB8500_INT_ACC_DETECT_21DB_F,
742 .end = AB8500_INT_ACC_DETECT_21DB_F,
743 .flags = IORESOURCE_IRQ,
744 },
745 {
746 .name = "ACC_DETECT_21DB_R",
747 .start = AB8500_INT_ACC_DETECT_21DB_R,
748 .end = AB8500_INT_ACC_DETECT_21DB_R,
749 .flags = IORESOURCE_IRQ,
750 },
751 {
752 .name = "ACC_DETECT_22DB_F",
753 .start = AB8500_INT_ACC_DETECT_22DB_F,
754 .end = AB8500_INT_ACC_DETECT_22DB_F,
755 .flags = IORESOURCE_IRQ,
e098aded 756 },
6af75ecd
LW		 757 {
758 .name = "ACC_DETECT_22DB_R",
759 .start = AB8500_INT_ACC_DETECT_22DB_R,
760 .end = AB8500_INT_ACC_DETECT_22DB_R,
761 .flags = IORESOURCE_IRQ,
762 },
763};
764
a9e9ce4c 765static struct resource ab8500_charger_resources[] = {
e098aded
MW		 766 {
767 .name = "MAIN_CH_UNPLUG_DET",
768 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
769 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
770 .flags = IORESOURCE_IRQ,
771 },
772 {
773 .name = "MAIN_CHARGE_PLUG_DET",
774 .start = AB8500_INT_MAIN_CH_PLUG_DET,
775 .end = AB8500_INT_MAIN_CH_PLUG_DET,
776 .flags = IORESOURCE_IRQ,
777 },
e098aded
MW		 778 {
779 .name = "VBUS_DET_R",
780 .start = AB8500_INT_VBUS_DET_R,
781 .end = AB8500_INT_VBUS_DET_R,
782 .flags = IORESOURCE_IRQ,
783 },
784 {
6af75ecd
LW		 785 .name = "VBUS_DET_F",
786 .start = AB8500_INT_VBUS_DET_F,
787 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 788 .flags = IORESOURCE_IRQ,
789 },
790 {
6af75ecd
LW		 791 .name = "USB_LINK_STATUS",
792 .start = AB8500_INT_USB_LINK_STATUS,
793 .end = AB8500_INT_USB_LINK_STATUS,
794 .flags = IORESOURCE_IRQ,
795 },
e098aded
MW		 796 {
797 .name = "VBUS_OVV",
798 .start = AB8500_INT_VBUS_OVV,
799 .end = AB8500_INT_VBUS_OVV,
800 .flags = IORESOURCE_IRQ,
801 },
802 {
6af75ecd
LW		 803 .name = "USB_CH_TH_PROT_R",
804 .start = AB8500_INT_USB_CH_TH_PROT_R,
805 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 806 .flags = IORESOURCE_IRQ,
807 },
808 {
6af75ecd
LW		 809 .name = "USB_CH_TH_PROT_F",
810 .start = AB8500_INT_USB_CH_TH_PROT_F,
811 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 812 .flags = IORESOURCE_IRQ,
813 },
814 {
6af75ecd
LW		 815 .name = "MAIN_EXT_CH_NOT_OK",
816 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
817 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
818 .flags = IORESOURCE_IRQ,
819 },
820 {
821 .name = "MAIN_CH_TH_PROT_R",
822 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
823 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
824 .flags = IORESOURCE_IRQ,
825 },
826 {
827 .name = "MAIN_CH_TH_PROT_F",
828 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
829 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
830 .flags = IORESOURCE_IRQ,
831 },
832 {
833 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 834 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
835 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 836 .flags = IORESOURCE_IRQ,
837 },
838 {
839 .name = "CH_WD_EXP",
840 .start = AB8500_INT_CH_WD_EXP,
841 .end = AB8500_INT_CH_WD_EXP,
842 .flags = IORESOURCE_IRQ,
843 },
34c11a70
POH		 844 {
845 .name = "VBUS_CH_DROP_END",
846 .start = AB8500_INT_VBUS_CH_DROP_END,
847 .end = AB8500_INT_VBUS_CH_DROP_END,
848 .flags = IORESOURCE_IRQ,
849 },
6af75ecd
LW		 850};
851
a9e9ce4c 852static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 853 {
854 .name = "BAT_CTRL_INDB",
855 .start = AB8500_INT_BAT_CTRL_INDB,
856 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 857 .flags = IORESOURCE_IRQ,
858 },
859 {
860 .name = "BTEMP_LOW",
861 .start = AB8500_INT_BTEMP_LOW,
862 .end = AB8500_INT_BTEMP_LOW,
863 .flags = IORESOURCE_IRQ,
864 },
865 {
866 .name = "BTEMP_HIGH",
867 .start = AB8500_INT_BTEMP_HIGH,
868 .end = AB8500_INT_BTEMP_HIGH,
869 .flags = IORESOURCE_IRQ,
870 },
871 {
6af75ecd
LW		 872 .name = "BTEMP_LOW_MEDIUM",
873 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
874 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 875 .flags = IORESOURCE_IRQ,
876 },
877 {
6af75ecd
LW		 878 .name = "BTEMP_MEDIUM_HIGH",
879 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
880 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 881 .flags = IORESOURCE_IRQ,
882 },
6af75ecd
LW		 883};
884
a9e9ce4c 885static struct resource ab8500_fg_resources[] = {
e098aded 886 {
6af75ecd
LW		 887 .name = "NCONV_ACCU",
888 .start = AB8500_INT_CCN_CONV_ACC,
889 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 890 .flags = IORESOURCE_IRQ,
891 },
892 {
6af75ecd
LW		 893 .name = "BATT_OVV",
894 .start = AB8500_INT_BATT_OVV,
895 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 896 .flags = IORESOURCE_IRQ,
897 },
898 {
6af75ecd
LW		 899 .name = "LOW_BAT_F",
900 .start = AB8500_INT_LOW_BAT_F,
901 .end = AB8500_INT_LOW_BAT_F,
902 .flags = IORESOURCE_IRQ,
903 },
904 {
905 .name = "LOW_BAT_R",
906 .start = AB8500_INT_LOW_BAT_R,
907 .end = AB8500_INT_LOW_BAT_R,
908 .flags = IORESOURCE_IRQ,
909 },
910 {
911 .name = "CC_INT_CALIB",
912 .start = AB8500_INT_CC_INT_CALIB,
913 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 914 .flags = IORESOURCE_IRQ,
915 },
a982362c
BJ		 916 {
917 .name = "CCEOC",
918 .start = AB8500_INT_CCEOC,
919 .end = AB8500_INT_CCEOC,
920 .flags = IORESOURCE_IRQ,
921 },
e098aded
MW		 922};
923
a9e9ce4c 924static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 925
df720647 926#ifdef CONFIG_DEBUG_FS
a9e9ce4c 927static struct resource ab8500_debug_resources[] = {
e098aded
MW		 928 {
929 .name = "IRQ_FIRST",
930 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
931 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
932 .flags = IORESOURCE_IRQ,
933 },
934 {
935 .name = "IRQ_LAST",
a982362c
BJ		 936 .start = AB8500_INT_XTAL32K_KO,
937 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 938 .flags = IORESOURCE_IRQ,
939 },
940};
df720647 941#endif
e098aded 942
a9e9ce4c 943static struct resource ab8500_usb_resources[] = {
e098aded
MW		 944 {
945 .name = "ID_WAKEUP_R",
946 .start = AB8500_INT_ID_WAKEUP_R,
947 .end = AB8500_INT_ID_WAKEUP_R,
948 .flags = IORESOURCE_IRQ,
949 },
950 {
951 .name = "ID_WAKEUP_F",
952 .start = AB8500_INT_ID_WAKEUP_F,
953 .end = AB8500_INT_ID_WAKEUP_F,
954 .flags = IORESOURCE_IRQ,
955 },
956 {
957 .name = "VBUS_DET_F",
958 .start = AB8500_INT_VBUS_DET_F,
959 .end = AB8500_INT_VBUS_DET_F,
960 .flags = IORESOURCE_IRQ,
961 },
962 {
963 .name = "VBUS_DET_R",
964 .start = AB8500_INT_VBUS_DET_R,
965 .end = AB8500_INT_VBUS_DET_R,
966 .flags = IORESOURCE_IRQ,
967 },
92d50a41
MW		 968 {
969 .name = "USB_LINK_STATUS",
970 .start = AB8500_INT_USB_LINK_STATUS,
971 .end = AB8500_INT_USB_LINK_STATUS,
972 .flags = IORESOURCE_IRQ,
973 },
6af75ecd
LW		 974 {
975 .name = "USB_ADP_PROBE_PLUG",
976 .start = AB8500_INT_ADP_PROBE_PLUG,
977 .end = AB8500_INT_ADP_PROBE_PLUG,
978 .flags = IORESOURCE_IRQ,
979 },
980 {
981 .name = "USB_ADP_PROBE_UNPLUG",
982 .start = AB8500_INT_ADP_PROBE_UNPLUG,
983 .end = AB8500_INT_ADP_PROBE_UNPLUG,
984 .flags = IORESOURCE_IRQ,
985 },
e098aded
MW		 986};
987
a9e9ce4c 988static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 989 {
990 .name = "KeyDeglitch",
991 .start = AB8505_INT_KEYDEGLITCH,
992 .end = AB8505_INT_KEYDEGLITCH,
993 .flags = IORESOURCE_IRQ,
994 },
995 {
996 .name = "KP",
997 .start = AB8505_INT_KP,
998 .end = AB8505_INT_KP,
999 .flags = IORESOURCE_IRQ,
1000 },
1001 {
1002 .name = "IKP",
1003 .start = AB8505_INT_IKP,
1004 .end = AB8505_INT_IKP,
1005 .flags = IORESOURCE_IRQ,
1006 },
1007 {
1008 .name = "IKR",
1009 .start = AB8505_INT_IKR,
1010 .end = AB8505_INT_IKR,
1011 .flags = IORESOURCE_IRQ,
1012 },
1013 {
1014 .name = "KeyStuck",
1015 .start = AB8505_INT_KEYSTUCK,
1016 .end = AB8505_INT_KEYSTUCK,
1017 .flags = IORESOURCE_IRQ,
1018 },
492390c8
LJ		 1019 {
1020 .name = "VBUS_DET_R",
1021 .start = AB8500_INT_VBUS_DET_R,
1022 .end = AB8500_INT_VBUS_DET_R,
1023 .flags = IORESOURCE_IRQ,
1024 },
1025 {
1026 .name = "VBUS_DET_F",
1027 .start = AB8500_INT_VBUS_DET_F,
1028 .end = AB8500_INT_VBUS_DET_F,
1029 .flags = IORESOURCE_IRQ,
1030 },
1031 {
1032 .name = "ID_DET_PLUGR",
1033 .start = AB8500_INT_ID_DET_PLUGR,
1034 .end = AB8500_INT_ID_DET_PLUGR,
1035 .flags = IORESOURCE_IRQ,
1036 },
1037 {
1038 .name = "ID_DET_PLUGF",
1039 .start = AB8500_INT_ID_DET_PLUGF,
1040 .end = AB8500_INT_ID_DET_PLUGF,
1041 .flags = IORESOURCE_IRQ,
1042 },
44f72e53
VS		 1043};
1044
a9e9ce4c 1045static struct resource ab8500_temp_resources[] = {
e098aded 1046 {
151621a7 1047 .name = "ABX500_TEMP_WARM",
e098aded
MW		 1048 .start = AB8500_INT_TEMP_WARM,
1049 .end = AB8500_INT_TEMP_WARM,
1050 .flags = IORESOURCE_IRQ,
1051 },
1052};
1053
4b106fb9
LJ		 1054static struct mfd_cell ab8500_bm_devs[] = {
1055 {
1056 .name = "ab8500-charger",
1057 .of_compatible = "stericsson,ab8500-charger",
1058 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1059 .resources = ab8500_charger_resources,
1060 .platform_data = &ab8500_bm_data,
1061 .pdata_size = sizeof(ab8500_bm_data),
1062 },
1063 {
1064 .name = "ab8500-btemp",
1065 .of_compatible = "stericsson,ab8500-btemp",
1066 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1067 .resources = ab8500_btemp_resources,
1068 .platform_data = &ab8500_bm_data,
1069 .pdata_size = sizeof(ab8500_bm_data),
1070 },
1071 {
1072 .name = "ab8500-fg",
1073 .of_compatible = "stericsson,ab8500-fg",
1074 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1075 .resources = ab8500_fg_resources,
1076 .platform_data = &ab8500_bm_data,
1077 .pdata_size = sizeof(ab8500_bm_data),
1078 },
1079 {
1080 .name = "ab8500-chargalg",
1081 .of_compatible = "stericsson,ab8500-chargalg",
1082 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1083 .resources = ab8500_chargalg_resources,
1084 .platform_data = &ab8500_bm_data,
1085 .pdata_size = sizeof(ab8500_bm_data),
1086 },
1087};
1088
1089static struct mfd_cell ab8500_devs[] = {
5814fc35
MW		 1090#ifdef CONFIG_DEBUG_FS
1091 {
1092 .name = "ab8500-debug",
bad76991 1093 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 1094 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1095 .resources = ab8500_debug_resources,
5814fc35
MW		 1096 },
1097#endif
e098aded
MW		 1098 {
1099 .name = "ab8500-sysctrl",
bad76991 1100 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 1101 },
1102 {
1103 .name = "ab8500-regulator",
bad76991 1104 .of_compatible = "stericsson,ab8500-regulator",
e098aded 1105 },
916a871c
UH		 1106 {
1107 .name = "abx500-clk",
1108 .of_compatible = "stericsson,abx500-clk",
1109 },
4b106fb9
LJ		 1110 {
1111 .name = "ab8500-gpadc",
1112 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1113 .resources = ab8500_gpadc_resources,
1114 },
62579266
RV		 1115 {
1116 .name = "ab8500-rtc",
bad76991 1117 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 1118 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1119 .resources = ab8500_rtc_resources,
1120 },
6af75ecd
LW		 1121 {
1122 .name = "ab8500-acc-det",
bad76991 1123 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 1124 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1125 .resources = ab8500_av_acc_detect_resources,
1126 },
e098aded 1127 {
4b106fb9 1128
e098aded 1129 .name = "ab8500-poweron-key",
bad76991 1130 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 1131 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1132 .resources = ab8500_poweronkey_db_resources,
1133 },
f0f05b1c
AM		 1134 {
1135 .name = "ab8500-pwm",
bad76991 1136 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1137 .id = 1,
1138 },
1139 {
1140 .name = "ab8500-pwm",
bad76991 1141 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1142 .id = 2,
1143 },
1144 {
1145 .name = "ab8500-pwm",
bad76991 1146 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1147 .id = 3,
1148 },
bad76991
LJ		 1149 {
1150 .name = "ab8500-leds",
1151 .of_compatible = "stericsson,ab8500-leds",
1152 },
77686517 1153 {
e098aded 1154 .name = "ab8500-denc",
bad76991 1155 .of_compatible = "stericsson,ab8500-denc",
e098aded 1156 },
4b106fb9
LJ		 1157 {
1158 .name = "ab8500-gpio",
1159 .of_compatible = "stericsson,ab8500-gpio",
1160 },
e098aded 1161 {
151621a7
HZ		 1162 .name = "abx500-temp",
1163 .of_compatible = "stericsson,abx500-temp",
e098aded
MW		 1164 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1165 .resources = ab8500_temp_resources,
77686517 1166 },
6ef9418c 1167 {
4b106fb9
LJ		 1168 .name = "ab8500-usb",
1169 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1170 .resources = ab8500_usb_resources,
6ef9418c
RA		 1171 },
1172 {
4b106fb9 1173 .name = "ab8500-codec",
6ef9418c
RA		 1174 },
1175};
1176
4b106fb9
LJ		 1177static struct mfd_cell ab9540_devs[] = {
1178#ifdef CONFIG_DEBUG_FS
d6255529 1179 {
4b106fb9
LJ		 1180 .name = "ab8500-debug",
1181 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1182 .resources = ab8500_debug_resources,
d6255529 1183 },
4b106fb9 1184#endif
d6255529 1185 {
4b106fb9 1186 .name = "ab8500-sysctrl",
d6255529 1187 },
44f72e53 1188 {
4b106fb9 1189 .name = "ab8500-regulator",
44f72e53 1190 },
9ee17676
UH		 1191 {
1192 .name = "abx500-clk",
1193 .of_compatible = "stericsson,abx500-clk",
1194 },
c0eda9ae
LJ		 1195 {
1196 .name = "ab8500-gpadc",
1197 .of_compatible = "stericsson,ab8500-gpadc",
1198 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1199 .resources = ab8500_gpadc_resources,
1200 },
4b106fb9
LJ		 1201 {
1202 .name = "ab8500-rtc",
1203 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1204 .resources = ab8500_rtc_resources,
1205 },
1206 {
1207 .name = "ab8500-acc-det",
1208 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1209 .resources = ab8500_av_acc_detect_resources,
1210 },
1211 {
1212 .name = "ab8500-poweron-key",
1213 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1214 .resources = ab8500_poweronkey_db_resources,
1215 },
1216 {
1217 .name = "ab8500-pwm",
1218 .id = 1,
1219 },
1220 {
1221 .name = "ab8500-leds",
1222 },
1223 {
1224 .name = "abx500-temp",
1225 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1226 .resources = ab8500_temp_resources,
1227 },
d6255529 1228 {
e64d905e
LJ		 1229 .name = "pinctrl-ab9540",
1230 .of_compatible = "stericsson,ab9540-gpio",
d6255529
LW		 1231 },
1232 {
1233 .name = "ab9540-usb",
1234 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1235 .resources = ab8500_usb_resources,
1236 },
44f72e53
VS		 1237 {
1238 .name = "ab9540-codec",
1239 },
c0eda9ae
LJ		 1240 {
1241 .name = "ab-iddet",
1242 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1243 .resources = ab8505_iddet_resources,
1244 },
44f72e53
VS		 1245};
1246
c0eda9ae
LJ		 1247/* Device list for ab8505 */
1248static struct mfd_cell ab8505_devs[] = {
4b106fb9
LJ		 1249#ifdef CONFIG_DEBUG_FS
1250 {
1251 .name = "ab8500-debug",
1252 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1253 .resources = ab8500_debug_resources,
1254 },
1255#endif
1256 {
1257 .name = "ab8500-sysctrl",
1258 },
1259 {
1260 .name = "ab8500-regulator",
1261 },
9ee17676
UH		 1262 {
1263 .name = "abx500-clk",
1264 .of_compatible = "stericsson,abx500-clk",
1265 },
4b106fb9
LJ		 1266 {
1267 .name = "ab8500-gpadc",
1268 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1269 .resources = ab8505_gpadc_resources,
1270 },
1271 {
1272 .name = "ab8500-rtc",
1273 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1274 .resources = ab8500_rtc_resources,
1275 },
1276 {
1277 .name = "ab8500-acc-det",
1278 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1279 .resources = ab8500_av_acc_detect_resources,
1280 },
1281 {
1282 .name = "ab8500-poweron-key",
1283 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1284 .resources = ab8500_poweronkey_db_resources,
1285 },
1286 {
1287 .name = "ab8500-pwm",
1288 .id = 1,
1289 },
1290 {
1291 .name = "ab8500-leds",
1292 },
1293 {
1294 .name = "ab8500-gpio",
1295 },
1296 {
1297 .name = "ab8500-usb",
1298 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1299 .resources = ab8500_usb_resources,
1300 },
1301 {
1302 .name = "ab8500-codec",
1303 },
c0eda9ae
LJ		 1304 {
1305 .name = "ab-iddet",
1306 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1307 .resources = ab8505_iddet_resources,
1308 },
1309};
1310
1311static struct mfd_cell ab8540_devs[] = {
4b106fb9
LJ		 1312#ifdef CONFIG_DEBUG_FS
1313 {
1314 .name = "ab8500-debug",
1315 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1316 .resources = ab8500_debug_resources,
1317 },
1318#endif
1319 {
1320 .name = "ab8500-sysctrl",
1321 },
1322 {
1323 .name = "ab8500-regulator",
1324 },
9ee17676
UH		 1325 {
1326 .name = "abx500-clk",
1327 .of_compatible = "stericsson,abx500-clk",
1328 },
4b106fb9
LJ		 1329 {
1330 .name = "ab8500-gpadc",
1331 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1332 .resources = ab8505_gpadc_resources,
1333 },
1334 {
1335 .name = "ab8500-rtc",
1336 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1337 .resources = ab8500_rtc_resources,
1338 },
1339 {
1340 .name = "ab8500-acc-det",
1341 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1342 .resources = ab8500_av_acc_detect_resources,
1343 },
1344 {
1345 .name = "ab8500-poweron-key",
1346 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1347 .resources = ab8500_poweronkey_db_resources,
1348 },
1349 {
1350 .name = "ab8500-pwm",
1351 .id = 1,
1352 },
1353 {
1354 .name = "ab8500-leds",
1355 },
1356 {
1357 .name = "abx500-temp",
1358 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1359 .resources = ab8500_temp_resources,
1360 },
c0eda9ae
LJ		 1361 {
1362 .name = "ab8500-gpio",
1363 },
1364 {
1365 .name = "ab8540-usb",
1366 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1367 .resources = ab8500_usb_resources,
1368 },
1369 {
1370 .name = "ab8540-codec",
1371 },
44f72e53
VS		 1372 {
1373 .name = "ab-iddet",
1374 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1375 .resources = ab8505_iddet_resources,
1376 },
d6255529
LW		 1377};
1378
cca69b67
MW		 1379static ssize_t show_chip_id(struct device *dev,
1380 struct device_attribute *attr, char *buf)
1381{
1382 struct ab8500 *ab8500;
1383
1384 ab8500 = dev_get_drvdata(dev);
e436ddff 1385
cca69b67
MW		 1386 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1387}
1388
e5c238c3
MW		 1389/*
1390 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1391 * 0x01 Swoff bit programming
1392 * 0x02 Thermal protection activation
1393 * 0x04 Vbat lower then BattOk falling threshold
1394 * 0x08 Watchdog expired
1395 * 0x10 Non presence of 32kHz clock
1396 * 0x20 Battery level lower than power on reset threshold
1397 * 0x40 Power on key 1 pressed longer than 10 seconds
1398 * 0x80 DB8500 thermal shutdown
1399 */
1400static ssize_t show_switch_off_status(struct device *dev,
1401 struct device_attribute *attr, char *buf)
1402{
1403 int ret;
1404 u8 value;
1405 struct ab8500 *ab8500;
1406
1407 ab8500 = dev_get_drvdata(dev);
1408 ret = get_register_interruptible(ab8500, AB8500_RTC,
1409 AB8500_SWITCH_OFF_STATUS, &value);
1410 if (ret < 0)
1411 return ret;
1412 return sprintf(buf, "%#x\n", value);
1413}
1414
f04a9d8a
RK		 1415/* use mask and set to override the register turn_on_stat value */
1416void ab8500_override_turn_on_stat(u8 mask, u8 set)
1417{
1418 spin_lock(&on_stat_lock);
1419 turn_on_stat_mask = mask;
1420 turn_on_stat_set = set;
1421 spin_unlock(&on_stat_lock);
1422}
1423
b4a31037
AL		 1424/*
1425 * ab8500 has turned on due to (TURN_ON_STATUS):
1426 * 0x01 PORnVbat
1427 * 0x02 PonKey1dbF
1428 * 0x04 PonKey2dbF
1429 * 0x08 RTCAlarm
1430 * 0x10 MainChDet
1431 * 0x20 VbusDet
1432 * 0x40 UsbIDDetect
1433 * 0x80 Reserved
1434 */
1435static ssize_t show_turn_on_status(struct device *dev,
1436 struct device_attribute *attr, char *buf)
1437{
1438 int ret;
1439 u8 value;
1440 struct ab8500 *ab8500;
1441
1442 ab8500 = dev_get_drvdata(dev);
1443 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1444 AB8500_TURN_ON_STATUS, &value);
1445 if (ret < 0)
1446 return ret;
f04a9d8a
RK		 1447
1448 /*
1449 * In L9540, turn_on_status register is not updated correctly if
1450 * the device is rebooted with AC/USB charger connected. Due to
1451 * this, the device boots android instead of entering into charge
1452 * only mode. Read the AC/USB status register to detect the charger
1453 * presence and update the turn on status manually.
1454 */
1455 if (is_ab9540(ab8500)) {
1456 spin_lock(&on_stat_lock);
1457 value = (value & turn_on_stat_mask) | turn_on_stat_set;
1458 spin_unlock(&on_stat_lock);
1459 }
1460
b4a31037
AL		 1461 return sprintf(buf, "%#x\n", value);
1462}
1463
d6255529
LW		 1464static ssize_t show_ab9540_dbbrstn(struct device *dev,
1465 struct device_attribute *attr, char *buf)
1466{
1467 struct ab8500 *ab8500;
1468 int ret;
1469 u8 value;
1470
1471 ab8500 = dev_get_drvdata(dev);
1472
1473 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1474 AB9540_MODEM_CTRL2_REG, &value);
1475 if (ret < 0)
1476 return ret;
1477
1478 return sprintf(buf, "%d\n",
1479 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1480}
1481
1482static ssize_t store_ab9540_dbbrstn(struct device *dev,
1483 struct device_attribute *attr, const char *buf, size_t count)
1484{
1485 struct ab8500 *ab8500;
1486 int ret = count;
1487 int err;
1488 u8 bitvalues;
1489
1490 ab8500 = dev_get_drvdata(dev);
1491
1492 if (count > 0) {
1493 switch (buf[0]) {
1494 case '0':
1495 bitvalues = 0;
1496 break;
1497 case '1':
1498 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1499 break;
1500 default:
1501 goto exit;
1502 }
1503
1504 err = mask_and_set_register_interruptible(ab8500,
1505 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1506 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1507 if (err)
1508 dev_info(ab8500->dev,
1509 "Failed to set DBBRSTN %c, err %#x\n",
1510 buf[0], err);
1511 }
1512
1513exit:
1514 return ret;
1515}
1516
cca69b67 1517static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1518static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1519static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
d6255529
LW		 1520static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1521 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1522
1523static struct attribute *ab8500_sysfs_entries[] = {
1524 &dev_attr_chip_id.attr,
e5c238c3 1525 &dev_attr_switch_off_status.attr,
b4a31037 1526 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1527 NULL,
1528};
1529
d6255529
LW		 1530static struct attribute *ab9540_sysfs_entries[] = {
1531 &dev_attr_chip_id.attr,
1532 &dev_attr_switch_off_status.attr,
1533 &dev_attr_turn_on_status.attr,
1534 &dev_attr_dbbrstn.attr,
1535 NULL,
1536};
1537
cca69b67
MW		 1538static struct attribute_group ab8500_attr_group = {
1539 .attrs = ab8500_sysfs_entries,
1540};
1541
d6255529
LW		 1542static struct attribute_group ab9540_attr_group = {
1543 .attrs = ab9540_sysfs_entries,
1544};
1545
f791be49 1546static int ab8500_probe(struct platform_device *pdev)
62579266 1547{
b04c530c
JA		 1548 static char *switch_off_status[] = {
1549 "Swoff bit programming",
1550 "Thermal protection activation",
1551 "Vbat lower then BattOk falling threshold",
1552 "Watchdog expired",
1553 "Non presence of 32kHz clock",
1554 "Battery level lower than power on reset threshold",
1555 "Power on key 1 pressed longer than 10 seconds",
1556 "DB8500 thermal shutdown"};
abee26cd
MW		 1557 static char *turn_on_status[] = {
1558 "Battery rising (Vbat)",
1559 "Power On Key 1 dbF",
1560 "Power On Key 2 dbF",
1561 "RTC Alarm",
1562 "Main Charger Detect",
1563 "Vbus Detect (USB)",
1564 "USB ID Detect",
1565 "UART Factory Mode Detect"};
d28f1db8
LJ		 1566 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1567 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1568 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1569 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1570 struct ab8500 *ab8500;
1571 struct resource *resource;
62579266
RV		 1572 int ret;
1573 int i;
47c16975 1574 u8 value;
62579266 1575
8c4203cb 1576 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1577 if (!ab8500)
1578 return -ENOMEM;
1579
62579266
RV		 1580 if (plat)
1581 ab8500->irq_base = plat->irq_base;
1582
d28f1db8
LJ		 1583 ab8500->dev = &pdev->dev;
1584
1585 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1586 if (!resource)
1587 return -ENODEV;
d28f1db8
LJ		 1588
1589 ab8500->irq = resource->start;
1590
822672a7
LJ		 1591 ab8500->read = ab8500_prcmu_read;
1592 ab8500->write = ab8500_prcmu_write;
1593 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1594
62579266
RV		 1595 mutex_init(&ab8500->lock);
1596 mutex_init(&ab8500->irq_lock);
112a80d2 1597 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1598
d28f1db8
LJ		 1599 platform_set_drvdata(pdev, ab8500);
1600
6bc4a568
LJ		 1601 if (platid)
1602 version = platid->driver_data;
6bc4a568 1603
0f620837
LW		 1604 if (version != AB8500_VERSION_UNDEFINED)
1605 ab8500->version = version;
1606 else {
1607 ret = get_register_interruptible(ab8500, AB8500_MISC,
1608 AB8500_IC_NAME_REG, &value);
1609 if (ret < 0)
8c4203cb 1610 return ret;
0f620837
LW		 1611
1612 ab8500->version = value;
1613 }
1614
47c16975
MW		 1615 ret = get_register_interruptible(ab8500, AB8500_MISC,
1616 AB8500_REV_REG, &value);
62579266 1617 if (ret < 0)
8c4203cb 1618 return ret;
62579266 1619
47c16975 1620 ab8500->chip_id = value;
62579266 1621
0f620837
LW		 1622 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1623 ab8500_version_str[ab8500->version],
1624 ab8500->chip_id >> 4,
1625 ab8500->chip_id & 0x0F);
1626
3e1a498f
LJ		 1627 /* Configure AB8540 */
1628 if (is_ab8540(ab8500)) {
1629 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1630 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1631 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1632 }/* Configure AB8500 or AB9540 IRQ */
1633 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1634 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1635 ab8500->irq_reg_offset = ab9540_irq_regoffset;
3e1a498f 1636 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529
LW		 1637 } else {
1638 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1639 ab8500->irq_reg_offset = ab8500_irq_regoffset;
3e1a498f 1640 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529 1641 }
8c4203cb 1642 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1643 if (!ab8500->mask)
1644 return -ENOMEM;
8c4203cb
LJ		 1645 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1646 if (!ab8500->oldmask)
1647 return -ENOMEM;
1648
e5c238c3
MW		 1649 /*
1650 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1651 * 0x01 Swoff bit programming
1652 * 0x02 Thermal protection activation
1653 * 0x04 Vbat lower then BattOk falling threshold
1654 * 0x08 Watchdog expired
1655 * 0x10 Non presence of 32kHz clock
1656 * 0x20 Battery level lower than power on reset threshold
1657 * 0x40 Power on key 1 pressed longer than 10 seconds
1658 * 0x80 DB8500 thermal shutdown
1659 */
1660
1661 ret = get_register_interruptible(ab8500, AB8500_RTC,
1662 AB8500_SWITCH_OFF_STATUS, &value);
1663 if (ret < 0)
1664 return ret;
b04c530c
JA		 1665 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1666
1667 if (value) {
1668 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1669 if (value & 1)
1670 printk(KERN_CONT " \"%s\"",
1671 switch_off_status[i]);
1672 value = value >> 1;
1673
1674 }
1675 printk(KERN_CONT "\n");
1676 } else {
1677 printk(KERN_CONT " None\n");
1678 }
abee26cd
MW		 1679 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1680 AB8500_TURN_ON_STATUS, &value);
1681 if (ret < 0)
1682 return ret;
1683 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1684
1685 if (value) {
1686 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1687 if (value & 1)
1688 printk("\"%s\" ", turn_on_status[i]);
1689 value = value >> 1;
1690 }
1691 printk("\n");
1692 } else {
1693 printk("None\n");
1694 }
e5c238c3 1695
62579266
RV		 1696 if (plat && plat->init)
1697 plat->init(ab8500);
abee26cd 1698
f04a9d8a
RK		 1699 if (is_ab9540(ab8500)) {
1700 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1701 AB8500_CH_USBCH_STAT1_REG, &value);
1702 if (ret < 0)
1703 return ret;
1704 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1705 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1706 AB8500_VBUS_DET);
1707 }
62579266
RV		 1708
1709 /* Clear and mask all interrupts */
2ced445e 1710 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1711 /*
1712 * Interrupt register 12 doesn't exist prior to AB8500 version
1713 * 2.0
1714 */
1715 if (ab8500->irq_reg_offset[i] == 11 &&
1716 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1717 continue;
62579266 1718
3e1a498f
LJ		 1719 if (ab8500->irq_reg_offset[i] < 0)
1720 continue;
1721
47c16975 1722 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1723 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1724 &value);
47c16975 1725 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1726 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1727 }
1728
47c16975
MW		 1729 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1730 if (ret)
8c4203cb 1731 return ret;
47c16975 1732
2ced445e 1733 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1734 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1735
06e589ef
LJ		 1736 ret = ab8500_irq_init(ab8500, np);
1737 if (ret)
8c4203cb 1738 return ret;
62579266 1739
06e589ef
LJ		 1740 /* Activate this feature only in ab9540 */
1741 /* till tests are done on ab8500 1p2 or later*/
e436ddff 1742 if (is_ab9540(ab8500) || is_ab8540(ab8500))
8c4203cb
LJ		 1743 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1744 ab8500_hierarchical_irq,
1745 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1746 "ab8500", ab8500);
06e589ef
LJ		 1747 }
1748 else {
8c4203cb
LJ		 1749 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1750 ab8500_irq,
1751 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1752 "ab8500", ab8500);
62579266 1753 if (ret)
8c4203cb 1754 return ret;
62579266
RV		 1755 }
1756
bad76991
LJ		 1757 if (is_ab9540(ab8500))
1758 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1759 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1760 ab8500->irq_base, ab8500->domain);
c0eda9ae
LJ		 1761 else if (is_ab8540(ab8500))
1762 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1763 ARRAY_SIZE(ab8540_devs), NULL,
1764 ab8500->irq_base, ab8500->domain);
1765 else if (is_ab8505(ab8500))
1766 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1767 ARRAY_SIZE(ab8505_devs), NULL,
1768 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1769 else
1770 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1771 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1772 ab8500->irq_base, ab8500->domain);
bad76991 1773 if (ret)
8c4203cb 1774 return ret;
44f72e53 1775
6ef9418c
RA		 1776 if (!no_bm) {
1777 /* Add battery management devices */
1778 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1779 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1780 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1781 if (ret)
1782 dev_err(ab8500->dev, "error adding bm devices\n");
1783 }
1784
e436ddff
LJ		 1785 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1786 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1787 ret = sysfs_create_group(&ab8500->dev->kobj,
1788 &ab9540_attr_group);
1789 else
1790 ret = sysfs_create_group(&ab8500->dev->kobj,
1791 &ab8500_attr_group);
cca69b67
MW		 1792 if (ret)
1793 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1794
1795 return ret;
62579266
RV		 1796}
1797
4740f73f 1798static int ab8500_remove(struct platform_device *pdev)
62579266 1799{
d28f1db8
LJ		 1800 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1801
e436ddff
LJ		 1802 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1803 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1804 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1805 else
1806 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1807
62579266 1808 mfd_remove_devices(ab8500->dev);
62579266
RV		 1809
1810 return 0;
1811}
1812
d28f1db8
LJ		 1813static const struct platform_device_id ab8500_id[] = {
1814 { "ab8500-core", AB8500_VERSION_AB8500 },
1815 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1816 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1817 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1818 { }
1819};
1820
1821static struct platform_driver ab8500_core_driver = {
1822 .driver = {
1823 .name = "ab8500-core",
1824 .owner = THIS_MODULE,
1825 },
1826 .probe = ab8500_probe,
84449216 1827 .remove = ab8500_remove,
d28f1db8
LJ		 1828 .id_table = ab8500_id,
1829};
1830
1831static int __init ab8500_core_init(void)
1832{
1833 return platform_driver_register(&ab8500_core_driver);
1834}
1835
1836static void __exit ab8500_core_exit(void)
1837{
1838 platform_driver_unregister(&ab8500_core_driver);
1839}
ba7cbc3e 1840core_initcall(ab8500_core_init);
d28f1db8
LJ		 1841module_exit(ab8500_core_exit);
1842
adceed62 1843MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1844MODULE_DESCRIPTION("AB8500 MFD core");
1845MODULE_LICENSE("GPL v2");
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